Commit Graph

443 Commits

Author SHA1 Message Date
FUJITA Tomonori
d904c5bf8f mips: use use asm-generic/scatterlist.h
Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp>
Cc: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2010-05-27 09:12:55 -07:00
Linus Torvalds
6969a43473 Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus: (25 commits)
  MIPS: Use GCC __builtin_prefetch() to implement prefetch().
  MIPS: Octeon: Serial port fixes for OCTEON simulator.
  MIPS: Octeon: Get rid of early serial.
  MIPS: AR7: prevent race between clock initialization and devices registration
  MIPS: AR7: use ar7_has_high_vlynq() to determine watchdog base address
  MIPS: BCM63xx: Avoid namespace clash on GPIO_DIR_{IN,OUT}
  MIPS: MTX-1: Update defconfig
  MIPS: BCM47xx: Update defconfig
  MIPS: RB532: Update defconfig
  MIPS: AR7: Update defconfig
  RTC: rtc-cmos: Fix binary mode support
  MIPS: Oprofile: Loongson: Cleanup the comments
  MIPS: Oprofile: Loongson: Cleanup of the macros
  MIPS: Oprofile: Loongson: Remove unused variable from loongson2_cpu_setup()
  MIPS: Oprofile: Loongson: Remove useless parentheses
  MIPS: Oprofile: Loongson: Unify macro for setting events
  MIPS: nofpu and nodsp only affect CPU0
  MIPS: Clean up tables for bootmem allocation
  MIPS: Coding style cleanups of access of FCSR rounding mode bits
  MIPS: Loongson 2F: Add gpio/gpioilb support
  ...
2010-05-21 15:23:54 -07:00
David Daney
0453fb3c52 MIPS: Use GCC __builtin_prefetch() to implement prefetch().
GCC's __builtin_prefetch() was introduced a long time ago, all
supported GCC versions have it.  Lets do what the big boys up in
linux/prefetch.h do, except we use '1' as the third parameter to
provoke 'PREF 0,...'  and 'PREF 1,...' instead of other prefetch
hints.

This allows for better code generation.  In theory the existing
embedded asm could be optimized, but the compiler has these builtins,
so there is really no point.

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/1235/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-05-21 21:31:23 +01:00
Florian Fainelli
3e1bf29f73 MIPS: BCM63xx: Avoid namespace clash on GPIO_DIR_{IN,OUT}
This is too generic a name, so prefix it with BCM63XX_ to avoid potential
namespace clashes when including <asm/gpio.h>.

Signed-off-by: Florian Fainelli <ffainelli@freebox.fr>
To:     linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/1171/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-05-21 21:31:22 +01:00
Arnaud Patard
c197da9163 MIPS: Loongson 2F: Add gpio/gpioilb support
Signed-off-by: Arnaud Patard <apatard@mandriva.com>
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/1163/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-05-21 21:31:16 +01:00
Manuel Lauss
96d660c482 MIPS: Alchemy: add sysdev for DBDMA PM.
Add a sysdev for DBDMA PM.

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
To: Linux-MIPS <linux-mips@linux-mips.org>
Patchwork: http://patchwork.linux-mips.org/patch/1119/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-05-21 21:31:15 +01:00
Manuel Lauss
0f0d85bcc3 MIPS: Alchemy: add sysdev for IRQ PM.
Use a sysdev to implement PM methods for the Au1000 interrupt controllers.

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
To: Linux-MIPS <linux-mips@linux-mips.org>
Patchwork: http://patchwork.linux-mips.org/patch/1114/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-05-21 21:31:15 +01:00
Wu Zhangjin
b8853aa3d9 MIPS: Loongson: update cpu-feature-overrides.h
Loongson doesn't support MIPSR2, therefore, MIPSR2 vectored interrupts
(cpu_has_vint) and MIPSR2 external interrupt controller mode
(cpu_has_veic) are 0.

Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: Linux-MIPS <linux-mips@linux-mips.org>
Patchwork: http://patchwork.linux-mips.org/patch/1112/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-05-21 21:31:14 +01:00
Jason Wessel
5dd11d5d47 mips,kgdb: kdb low level trap catch and stack trace
The only way the debugger can handle a trap in inside rcu_lock,
notify_die, or atomic_notifier_call_chain without a recursive fault is
to have a low level "first opportunity handler" do_trap_or_bp() handler.

Generally this will be something the vast majority of folks will not
need, but for those who need it, it is added as a kernel .config
option called KGDB_LOW_LEVEL_TRAP.

Also added was a die notification for oops such that kdb can catch an
oops for analysis.

There appeared to be no obvious way to pass the struct pt_regs from
the original exception back to the stack back tracer, so a special
case was added to show_stack() for when kdb is active because you
generally desire to generally look at the back trace of the original
exception.

Signed-off-by: Jason Wessel <jason.wessel@windriver.com>
Acked-by: Ralf Baechle <ralf@linux-mips.org>
2010-05-20 21:04:26 -05:00
Linus Torvalds
f39d01be4c Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial: (44 commits)
  vlynq: make whole Kconfig-menu dependant on architecture
  add descriptive comment for TIF_MEMDIE task flag declaration.
  EEPROM: max6875: Header file cleanup
  EEPROM: 93cx6: Header file cleanup
  EEPROM: Header file cleanup
  agp: use NULL instead of 0 when pointer is needed
  rtc-v3020: make bitfield unsigned
  PCI: make bitfield unsigned
  jbd2: use NULL instead of 0 when pointer is needed
  cciss: fix shadows sparse warning
  doc: inode uses a mutex instead of a semaphore.
  uml: i386: Avoid redefinition of NR_syscalls
  fix "seperate" typos in comments
  cocbalt_lcdfb: correct sections
  doc: Change urls for sparse
  Powerpc: wii: Fix typo in comment
  i2o: cleanup some exit paths
  Documentation/: it's -> its where appropriate
  UML: Fix compiler warning due to missing task_struct declaration
  UML: add kernel.h include to signal.c
  ...
2010-05-20 09:20:59 -07:00
Linus Torvalds
1014cfe2fb Merge branch 'core-locking-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip
* 'core-locking-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:
  lockdep: Reduce stack_trace usage
  lockdep: No need to disable preemption in debug atomic ops
  lockdep: Actually _dec_ in debug_atomic_dec
  lockdep: Provide off case for redundant_hardirqs_on increment
  lockdep: Simplify debug atomic ops
  lockdep: Fix redundant_hardirqs_on incremented with irqs enabled
  lockstat: Make lockstat counting per cpu
  i8253: Convert i8253_lock to raw_spinlock
2010-05-18 08:17:35 -07:00
Anton Blanchard
f3d46f9d31 atomic_t: Cast to volatile when accessing atomic variables
In preparation for removing volatile from the atomic_t definition, this
patch adds a volatile cast to all the atomic read functions.

Signed-off-by: Anton Blanchard <anton@samba.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2010-05-17 07:57:27 -07:00
Shane McDonald
95e8f634d7 MIPS FPU emulator: allow Cause bits of FCSR to be writeable by ctc1
In the FPU emulator code of the MIPS, the Cause bits of the FCSR register
    are not currently writeable by the ctc1 instruction.  In odd corner cases,
    this can cause problems.  For example, a case existed where a divide-by-zero
    exception was generated by the FPU, and the signal handler attempted to
    restore the FPU registers to their state before the exception occurred.  In
    this particular setup, writing the old value to the FCSR register would
    cause another divide-by-zero exception to occur immediately.  The solution
    is to change the ctc1 instruction emulator code to allow the Cause bits of
    the FCSR register to be writeable.  This is the behaviour of the hardware
    that the code is emulating.
    
    This problem was found by Shane McDonald, but the credit for the fix goes
    to Kevin Kissell.  In Kevin's words:
    
    I submit that the bug is indeed in that ctc_op:  case of the emulator.  The
    Cause bits (17:12) are supposed to be writable by that instruction, but the
    CTC1 emulation won't let them be updated by the instruction.  I think that
    actually if you just completely removed lines 387-388 [...] things would
    work a good deal better.  At least, it would be a more accurate emulation of
    the architecturally defined FPU.  If I wanted to be really, really pedantic
    (which I sometimes do), I'd also protect the reserved bits that aren't
    necessarily writable.
    
    Signed-off-by: Shane McDonald <mcdonald.shane@gmail.com>
    To: anemo@mba.ocn.ne.jp
    To: kevink@paralogos.com
    To: sshtylyov@mvista.com
    Patchwork: http://patchwork.linux-mips.org/patch/1205/
    Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

---
2010-05-15 21:59:53 +01:00
Andreas Dilger
0ddc9324b1 add descriptive comment for TIF_MEMDIE task flag declaration.
Signed-off-by: Andreas Dilger <adilger@dilger.ca>
Acked-by: KOSAKI Motohiro <kosaki.motohiro@jp.fujitsu.com>
Signed-off-by: Jiri Kosina <jkosina@suse.cz>
2010-05-14 11:13:27 +02:00
Ingo Molnar
53ba4f2fa7 Merge commit 'v2.6.34-rc6' into core/locking 2010-05-03 09:17:01 +02:00
Wu Zhangjin
b197b62866 MIPS: Loongson-2F: Use CONFIG_CPU_JUMP_WORKAROUNDS to control workarounds.
Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: linux-mips <linux-mips@linux-mips.org>
Patchwork: http://patchwork.linux-mips.org/patch/1106/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-04-30 20:52:58 +01:00
Arnaud Patard
94c26c9a66 MIPS: Loongson: Fix LOONGSON_ADDRWIN_CFG macro.
There's a typo in the LOONGSON_ADDRWIN_CFG macro. The cpu window mmap
register address should contain the destination parameters not the
source one.  This has not been noticed because the code is only using
source = destination.

Signed-off-by: Arnaud Patard <apatard@mandriva.com>
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/1162/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-04-30 20:52:51 +01:00
David Daney
26b9e547e9 MIPS: Add uasm_i_dsrl_safe() and uasm_i_dsll_safe() to uasm.
This allows us to clean up the code by not having to explicitly code
checks for shift amounts greater than 32.

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/1153/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-04-30 20:52:45 +01:00
Yury Polyanskiy
ce384d83d0 MIPS: die() does not call die notifier chain
The MIPS implementation of die() forgets to call notify_die() and thus notifiers
registered via register_die_notifier() are not called.  This results in kgdb not
being activated on exceptions.

The only subtlety is that notify_die declares its regs argument w/o const, so
the const had to be removed from mips die() as well.

[Ralf: Fixed build error for SGI IP22 and IP28 platforms.]

Signed-off-by: Yury Polyanskiy <ypolyans@princeton.edu>
Cc: linux-mips@linux-mips.org
Patchworks: http://patchwork.linux-mips.org/patch/1142/
Acked-by: Jason Wessel <jason.wessel@windriver.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

---
2010-04-30 20:52:45 +01:00
Ralf Baechle
9eed4124c0 MIPS: cmpxchg.h: Fix excessive indentation.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-04-30 20:52:41 +01:00
David Daney
c8f3cc0b65 MIPS: Don't vmap things at address zero.
In the 64-bit kernel we use swapper_pg_dir for three different things.

1) xuseg mappings for kernel threads.

2) vmap mappings for all kernel-space accesses in xkseg.

3) vmap mappings for kernel modules in ksseg (kseg2).

Due to how the TLB refill handlers work, any mapping established in
xkseg or ksseg will also establish a xuseg mapping that should never
be used by the kernel.

In order to be able to use exceptions to trap NULL pointer
dereferences, we need to ensure that nothing is mapped at address
zero.  Since vmap mappings in xkseg are reflected in xuseg, this means
we need to ensure that there are no vmap mappings established at the
start of xkseg.  So we move back VMALLOC_START to avoid establishing
vmap mappings at the start of xkseg.

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/1129/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-04-30 20:52:41 +01:00
Ralf Baechle
5808184f1b MIPS: uasm: Add OR instruction.
This is needed for the fix of the M3 workaround.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-04-12 17:26:20 +01:00
Ralf Baechle
8d9df29db2 MIPS: Sibyte: Apply M3 workaround only on affected chip types and versions.
Previously it was unconditionally used on all Sibyte family SOCs.  The
M3 bug has to be handled in the TLB exception handler which is extremly
performance sensitive, so this modification is expected to deliver around
2-3% performance improvment.  This is important as required changes to the
M3 workaround will make it more costly.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-04-12 17:26:19 +01:00
Maxime Bizon
4fe67e44a0 MIPS: BCM63xx: Fix typo in cpu-feature-overrides file.
Fix typo: CONFIG_BCMCPU_IS_63xx does not exist;
CONFIG_BCM63XX_CPU_63xx is the valid config option.

Signed-off-by: Maxime Bizon <mbizon@freebox.fr>
To: linux-mips@linux-mips.org
Cc: Maxime Bizon <mbizon@freebox.fr>
Patchwork: http://patchwork.linux-mips.org/patch/901/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-04-12 17:26:18 +01:00
Maxime Bizon
524ef29cff MIPS: BCM63xx: Add support for second uart.
The BCm63xx SOC has two uarts.  Some boards use the second one for
bluetooth.  This patch changes platform device registration code to
handle this.  Changes to the UART driver were already merged in
6a2c7eabfd.

Signed-off-by: Maxime Bizon <mbizon@freebox.fr>
To: linux-mips@linux-mips.org
Cc: Maxime Bizon <mbizon@freebox.fr>
Patchwork: http://patchwork.linux-mips.org/patch/900/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-04-12 17:26:18 +01:00