Commit Graph

962 Commits

Author SHA1 Message Date
Ralf Baechle
54822de779 MIPS: Wire up accept4 syscall.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-08-03 17:52:50 +01:00
Ralf Baechle
ce21f4e86f MIPS: VPE: Delete unused function get_tc_unused().
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-08-03 17:52:50 +01:00
Ralf Baechle
349c4229ed MIPS: VPE: Fix bogus indentation.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-08-03 17:52:49 +01:00
Ralf Baechle
f18b51cc1f MIPS: VPE: Make various functions static.
None of these is used outside the VPE loader.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-08-03 17:52:49 +01:00
Ralf Baechle
477c4b0740 MIPS: VPE: Free relocation chain on error.
This may happen if a bad sequence of relocations is being encountered.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-08-03 17:52:49 +01:00
Raghu Gandham
e2a9cf96a0 MIPS: VPE: Fix compiler warning.
Signed-off-by: Raghu Gandham <raghu@mips.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-08-03 17:52:48 +01:00
Ralf Baechle
6f9fdeb676 MIPS: Module: Make error messages unique.
There were three different errors resulting in a "dangerous relocation"
message.  Add the relocation type to the messgages to make them more
useful.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-08-03 17:52:48 +01:00
Gabor Juhos
0e66fff883 MIPS: Fix loading of modules with unresolved weak symbols
Loading of modules with unresolved weak symbols fails on MIPS
since '88173507e4fc1e7ecd111b0565e8cba0cb7dae6d'.

Modules: handle symbols that have a zero value

The module subsystem cannot handle symbols that are zero.  If symbols
are present that have a zero value then the module resolver prints out a
message that these symbols are unresolved.

We have to use IS_ERR_VALUE() to check that a symbol has been resolved
or not.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-08-03 17:52:42 +01:00
Kurt Martin
d8e5f9fe5d MIPS: SMTC: Move cross VPE writes to after a TC is assigned to VPE.
Signed-off-by: Chris Dearman <chris@mips.com>
Signed-off-by: Raghu Gandham <raghu@mips.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-08-03 17:52:42 +01:00
David Daney
484889fc85 MIPS: Avoid clobbering struct pt_regs in kthreads
The resume() implementation octeon_switch.S examines the saved cp0_status
register.  We were clobbering the entire pt_regs structure in kernel
threads leading to random crashes.

When switching away from a kernel thread, the saved cp0_status is examined
and if bit 30 is set it is cleared and the CP2 state saved into the pt_regs
structure.  Since the kernel thread stack overlaid the pt_regs structure
this resulted in a corrupt stack.  When the kthread with the corrupt stack
was resumed, it could crash if it used any of the data in the stack that was
clobbered.

We fix it by moving the kernel thread stack down so it doesn't overlay
pt_regs.

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-08-03 17:52:41 +01:00
Ralf Baechle
49316cbf0a MIPS: Eleminate filenames from comments
They tend to get not updated when files are moved around or copied and
lack any obvious use.  While at it zap some only too obvious comments and
as per Shinya's suggestion, add a copyright header to extable.c.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Acked-by: Shinya Kuribayashi <shinya.kuribayashi@necel.com>
Acked-by: Thadeu Lima de Souza Cascardo <cascardo@holoscopio.com>
2009-08-03 17:52:40 +01:00
Alexey Dobriyan
405f55712d headers: smp_lock.h redux
* Remove smp_lock.h from files which don't need it (including some headers!)
* Add smp_lock.h to files which do need it
* Make smp_lock.h include conditional in hardirq.h
  It's needed only for one kernel_locked() usage which is under CONFIG_PREEMPT

  This will make hardirq.h inclusion cheaper for every PREEMPT=n config
  (which includes allmodconfig/allyesconfig, BTW)

Signed-off-by: Alexey Dobriyan <adobriyan@gmail.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2009-07-12 12:22:34 -07:00
Yoichi Yuasa
ada8e9514b Update Yoichi Yuasa's e-mail address
Signed-off-by: Yoichi Yuasa <yuasa@linux-mips.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-07-03 15:45:29 +01:00
Yong Zhang
cad9bc6904 MIPS: 64-bit: Fix o32 core dump
If an o32 process generates a core dump on a 64 bit kernel, the core file
will not be correctly recognized. This is because ELF_CORE_COPY_REGS and
ELF_CORE_COPY_TASK_REGS are not correctly defined for o32 and will use
the default register set which would be CONFIG_64BIT in asm/elf.h.

So we'll switch to use the right register defines in this situation by
checking for WANT_COMPAT_REG_H and use the right defines of
ELF_CORE_COPY_REGS and ELF_CORE_COPY_TASK_REGS.

[Ralf: made ELF_CORE_COPY_TASK_REGS() bullet-proof against funny arguments.]

Signed-off-by: Yong Zhang <yong.zhang@windriver.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-07-03 15:45:27 +01:00
Tim Anderson
eb9b5141a9 MIPS: CMP: Update sync-r4k for current kernel
This revises the sync-4k so it will boot and operate since the removal of
expirelo from the timer code.

Signed-off-by: Tim Anderson <tanderson@mvista.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-07-03 15:45:27 +01:00
Tim Anderson
0365070f05 MIPS: CMP: activate CMP support
Most of the CMP support was added before, this mostly correct compile
problems but adds a platform specific translation for the interrupt number
based on cpu number.

Signed-off-by: Tim Anderson <tanderson@mvista.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-07-03 15:45:26 +01:00
Tim Anderson
a214cef9a5 MIPS: CMP: Extend IPI handling to CPU number
This takes the current IPI interrupt assignment from the fix number of 4
to the number of CPUs defined in the system.

Signed-off-by: Tim Anderson <tanderson@mvista.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-07-03 15:45:26 +01:00
Tim Anderson
9306c8def6 MIPS: CMP: Extend the GIC IPI interrupts beyond 32
This patch extends the GIC interrupt handling beyond the current 32 bit
range as well as extending the number of interrupts based on the number
of CPUs.

Signed-off-by: Tim Anderson <tanderson@mvista.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-07-03 15:45:25 +01:00
David Daney
69f16c9a86 MIPS: Hookup new syscalls sys_rt_tgsigqueueinfo and sys_perf_counter_open.
[Ralf: I fixed up the numbering in the comment in scall64-n32.S.]

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-07-03 15:45:24 +01:00
Joe Perches
52a7a27cd8 MIPS: MT: Remove unnecessary semicolons
Signed-off-by: Joe Perches <joe@perches.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-07-03 15:45:23 +01:00
Ralf Baechle
1b2bc75c1b MIPS: Add arch generic CPU hotplug
Each platform has to add support for CPU hotplugging itself by providing
suitable definitions for the cpu_disable and cpu_die of the smp_ops
methods and setting SYS_SUPPORTS_HOTPLUG_CPU.  A platform should only set
SYS_SUPPORTS_HOTPLUG_CPU once all it's smp_ops definitions have the
necessary changes.  This patch contains the changes to the dummy smp_ops
definition for uni-processor systems.

Parts of the code contributed by Cavium Inc.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-06-24 18:34:40 +01:00
Ralf Baechle
631330f584 MIPS: Build fix - include <linux/smp.h> into all smp_processor_id() users.
Some of the were relying into smp.h being dragged in by another header
which of course is fragile.  <asm/cpu-info.h> uses smp_processor_id()
only in macros and including smp.h there leads to an include loop, so
don't change cpu-info.h.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-06-24 18:34:39 +01:00
Wu Zhangjin
363c55cae5 MIPS: Add hibernation support
[Ralf: SMP support requires CPU hotplugging which MIPS currently doesn't
support.  As implemented in this patch cache and tlb flushing will also be
invoked with interrupts disabled so smp_call_function() will blow up in
charming ways.  So limit to !SMP.]

Reviewed-by: Pavel Machek <pavel@ucw.cz>
Reviewed-by: Yan Hua <yanh@lemote.com>
Reviewed-by: Arnaud Patard <apatard@mandriva.com>
Reviewed-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Wu Zhangjin <wuzj@lemote.com>
Signed-off-by: Hu Hongbing <huhb@lemote.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-06-17 11:06:31 +01:00
David Daney
4bb1a1089e MIPS: Move Cavium CP0 hwrena impl bits to cpu-feature-overrides.h
We had an ugly #ifdef for Cavium Octeon hwrena bits in traps.c, remove
it to mach-cavium-octeon/cpu-feature-overrides.h

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-06-17 11:06:31 +01:00
David Daney
fbeda19f82 MIPS: Allow CPU specific overriding of CP0 hwrena impl bits.
Some CPUs have implementation dependent rdhwr registers.  Allow them
to be enabled on a per CPU basis.

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-06-17 11:06:31 +01:00