Commit Graph

7086 Commits

Author SHA1 Message Date
Alex Deucher
02779c082c drm/radeon/kms: add radeon_asic struct for SI
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-03-21 06:55:55 +00:00
Alex Deucher
8d5ef7b1f6 drm/radeon/kms: add support for compute rings in CS ioctl on SI
Very basic implementation for picking the ring priority.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-03-21 06:55:55 +00:00
Alex Deucher
9b136d514e drm/radeon/kms: fill in startup/shutdown callbacks for SI
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-03-21 06:55:54 +00:00
Alex Deucher
25a857fbe9 drm/radeon/kms: add support for interrupts on SI
This is mostly identical to evergreen/ni, however
there are some additional fields in the IV vector
for RINGID and VMID.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-03-21 06:55:54 +00:00
Alex Deucher
347e7592be drm/radeon/kms: Add support for RLC init on SI
RLC handles the interrupt controller and other tasks
on the GPU.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-03-21 06:55:54 +00:00
Alex Deucher
2ece2e8b7d drm/radeon/kms: add IB and fence dispatch functions for SI
Support both IBs (DE) and CONST IBs (CE).

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-03-21 06:55:54 +00:00
Alex Deucher
48c0c902e2 drm/radeon/kms: add support for CP setup on SI
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-03-21 06:55:54 +00:00
Alex Deucher
8b074dd640 drm/radeon/kms: add support for MC ucode loading on SI
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-03-21 06:55:53 +00:00
Alex Deucher
0f0de06c80 drm/radeon/kms: add ucode loading for SI
Currently the driver required 5 sets of ucode:
1. pfp - pre-fetch parser, part of the CP
2. me - micro engine, part of the CP
3. ce - constant engine, part of the CP
4. rlc - interrupt controller
5. mc - memory controller

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-03-21 06:55:53 +00:00
Alex Deucher
1b5475dba7 drm/radeon/kms: Only VM CS ioctl is supported on SI (v2)
v2: avoid double free.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-03-21 06:55:53 +00:00
Alex Deucher
498dd8b35a drm/radeon/kms: add VM CS checker for SI
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-03-21 06:55:53 +00:00
Alex Deucher
dfcf5f3652 drm/radeon/kms: add support for the CONST IB to the CS ioctl
This adds a new chunk id to the CS ioctl to support the
INDIRECT_BUFFER_CONST packet.

On SI, the CP adds a new engine called the CE (Constant Engine)
which runs simulatenously with the DE (Drawing Engine, formerly
called the ME).  This allows the CP to process two related IBs
simultaneously.  The CE is tasked with loading the constant data
(constant buffers, resource descriptors, samplers, etc.) while
the DE loads context register state and issues drawing commands.
It's up to the userspace application to sychronize the CE and the
DE using special synchronization packets.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-03-21 06:55:53 +00:00
Alex Deucher
d2800ee59e drm/radeon/kms: add support for MC/VM setup on SI
Sets up the VM and adds support for the new VM ioctls.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-03-21 06:55:52 +00:00
Alex Deucher
c476dde2ed drm/radeon/kms: Add support for SI GPU reset
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-03-21 06:55:52 +00:00
Alex Deucher
0a96d72be9 drm/radeon/kms: add gpu init support for SI
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-03-21 06:55:52 +00:00
Alex Deucher
1bd47d2e16 drm/radeon/kms: add support for internal thermal sensor on SI
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-03-21 06:55:52 +00:00
Alex Deucher
14607d0836 drm/radeon/kms: update power table parsing for SI
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-03-21 06:55:52 +00:00
Alex Deucher
e83753bb61 drm/radeon/kms/atom: add support for SI SetVoltage table
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-03-21 06:55:51 +00:00
Alex Deucher
2d415869f1 drm/radeon/kms: update comments about dig encoders/transmitters
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-03-21 06:55:51 +00:00
Alex Deucher
97412a7a1d drm/radeon/kms: DP aux updates for DCE6
DCE6 requires a non-0 value for lpAuxRequest for the
ProcessAuxChannelTransaction command table.  Setting
lpAuxRequest to 0 is a special case used by AsicInit
for setting up the aux pads.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-03-21 06:55:51 +00:00
Alex Deucher
47aef7a892 drm/radeon/kms/atom: add support for DCE6.x dig transmitters
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-03-21 06:55:51 +00:00
Alex Deucher
f3f1f03ed0 drm/radeon/kms: DCE6 disp eng pll updates
Rename the function to better match the functionality.
DCPLL became PLL0 on DCE6.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-03-21 06:55:51 +00:00
Alex Deucher
fef9f91fec drm/radeon/kms/atom: add support for crtc power gating
Each pair of crtcs (0/1, 2/3, 4/5) can be power gated.
Make sure the power is applied when the crtc is in use and
only power down the pair when both are off.

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-03-21 06:55:51 +00:00
Alex Deucher
79f17c64b2 drm/radeon/kms/atom: DCE6 no longer has crtcmemreq bits
The hw no longer has the bits and the table is removed.

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-03-21 06:55:50 +00:00
Alex Deucher
82d118efc6 drm/radeon/kms: fix up atom HPD gpio parsing for DCE6
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-03-21 06:55:50 +00:00