This adds the TCM interface to Linux, when active, it will
detect and report TCM memories and sizes early in boot if
present, introduce generic TCM memory handling, provide a
generic TCM memory pool and select TCM memory for the U300
platform.
See the Documentation/arm/tcm.txt for documentation.
Signed-off-by: Linus Walleij <linus.walleij@stericsson.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The interface provides device drivers, CPUFreq, and DSPBridge with a
means of controlling OMAP power management parameters that are not yet
supported by the Linux PM PMQoS interface. Copious documentation is
in the patch in Documentation/arm/OMAP/omap_pm and the interface
header file, arch/arm/plat-omap/include/mach/omap-pm.h.
Thanks to Rajendra Nayak <rnayak@ti.com> for adding CORE (VDD2) OPP
support and moving the OPP table initialization earlier in the event
that the clock code needs them. Thanks to Tero Kristo
<tero.kristo@nokia.com> for fixing the parameter check in
omap_pm_set_min_bus_tput(). Jouni signed off on Tero's patch.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Tero Kristo <tero.kristo@nokia.com>
Signed-off-by: Jouni Högander <jouni.hogander@nokia.com>
Cc: Tony Lindgren <tony@atomide.com>
Cc: Igor Stoppa <igor.stoppa@nokia.com>
Cc: Richard Woodruff <r-woodruff2@ti.com>
Cc: Anand Sawant <sawant@ti.com>
Cc: Sakari Poussa <sakari.poussa@nokia.com>
Cc: Veeramanikandan Raju <veera@ti.com>
Cc: Karthik Dasu <karthik-dp@ti.com>
Prepare to remove the large number of S3C2410_GPxn defines
by moving to S3C2410_GPx(n) in arch/arm.
The following perl was used to change the files:
perl -pi~ -e 's/S3C2410_GP([A-Z])([0-9]+)([^_^0-9])/S3C2410_GP\1\(\2\)\3/g'
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
This is the minimum fixmap interface expected to be implemented by
architectures supporting highmem.
We have a second level page table already allocated and covering
0xfff00000-0xffffffff because the exception vector page is located
at 0xffff0000, and various cache tricks already use some entries above
0xffff0000. Therefore the PTEs covering 0xfff00000-0xfffeffff are free
to be used.
However the XScale cache flushing code already uses virtual addresses
between 0xfffe0000 and 0xfffeffff.
So this reserves the 0xfff00000-0xfffdffff range for fixmap stuff.
The Documentation/arm/memory.txt information is updated accordingly,
including the information about the actual top of DMA memory mapping
region which didn't match the code.
Signed-off-by: Nicolas Pitre <nico@marvell.com>
Since we have moved a large proportion of the PM code to the common
support area, remove the cpu specific name from the initialisation
function.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
The documents aren't particularly useful anyway and the hardware in
question has never run anything newer than a v2.2.14 kernel to my
knowledge.
Signed-off-by: Mike Crowe <mac@mcrowe.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
IRQT_* and __IRQT_* were obsoleted long ago by patch [3692/1].
Remove them completely. Sed script for the reference:
s/__IRQT_RISEDGE/IRQ_TYPE_EDGE_RISING/g
s/__IRQT_FALEDGE/IRQ_TYPE_EDGE_FALLING/g
s/__IRQT_LOWLVL/IRQ_TYPE_LEVEL_LOW/g
s/__IRQT_HIGHLVL/IRQ_TYPE_LEVEL_HIGH/g
s/IRQT_RISING/IRQ_TYPE_EDGE_RISING/g
s/IRQT_FALLING/IRQ_TYPE_EDGE_FALLING/g
s/IRQT_BOTHEDGE/IRQ_TYPE_EDGE_BOTH/g
s/IRQT_LOW/IRQ_TYPE_LEVEL_LOW/g
s/IRQT_HIGH/IRQ_TYPE_LEVEL_HIGH/g
s/IRQT_PROBE/IRQ_TYPE_PROBE/g
s/IRQT_NOEDGE/IRQ_TYPE_NONE/g
Signed-off-by: Dmitry Baryshkov <dbaryshkov@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This adds support for using large page NAND devices
with the S3C24XX NAND controller. This also adds the
file Documentation/arm/Samsung-S3C24XX/NAND.txt to
describe the differences.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
