Being a value which isn't in the table is a case we explicitly check for
in the caller. Don't BUG_ON() because it does actually happen in
practice.
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
When a flash-based BBT is not used, nand_default_mark_blockbad() is supposed
to mark the block bad in the oob. However, it sets the wrong length variable
so that no bad block marker is in fact written. This patch attempts to
rectify that.
(As note, it seems to be that logically, it shouldn't be necessary to set
both length variables, as one appears to be for the main buffer, and
one for the oob buffer, but this is how it is done in several places,
including the code for the mtd character device MEMWRITEOOB and MEMREADOOB
ioctls. I'm not sure if this is a temporary solution during some rework of
the mtd infrastructure, or whether there is a deeper thought here.)
Signed-off-by: Ricard Wanderlöf <ricardw@axis.com>
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
Ditch the separate oobrbuf and oobwbuf fields from the chip buffers,
and use only a single buffer immediately after the data. This accommodates
NAND controllers such as the OLPC CAFÉ chip, which can't do scatter/gather
DMA so needs the OOB buffer to be contiguous with the data, for both read
and write.
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
As flash cannot do 0->1 bit transitions when programming, do not do this in
the simulator too. This makes nandsim able to accept subpage writes.
Signed-off-by: Artem Bityutskiy <dedekind@infradead.org>
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
During some testing with several samsung s3c24xx based
devices it was discovered that often the
cfi_cmdset_0001.c would not leave the chip in
read-array mode on suspend. this is an issue if the
same flash chip is used for the bootloader that needs
to be read on resume.
Signed-off-by: David Anders <danders@amltd.com>
Signed-off-by: Nicolas Pitre <nico@cam.org>
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
Removes line break after return type in function definitions, to be
consistent with the Linux coding style.
Signed-off-by: Vijay Kumar <vijaykumar@bravegnu.org>
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
For page wise allocation, an array of flash page pointers is allocated
during initialization. The flash pages are themselves allocated when a
write occurs to the page. The flash pages are deallocated when they
are erased.
Signed-off-by: Vijay Kumar <vijaykumar@bravegnu.org>
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
This patch removes code that does chip mapping. The chip mapping code
is no longer used.
Signed-off-by: Vijay Kumar <vijaykumar@bravegnu.org>
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
This patch has removed ITE 8172G and Globespan IVR MTD support.
These boards support have already been removed.
Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
Acked-by: Ralf Bächle <ralf@linux-mips.org>
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
1. The ECCGETLAYOUT ioctl copy_to_user() call has a superfluous '&'
causing the resulting information to be garbage rather than the intended
mtd->ecclayout.
2. The MEMGETOOBSEL misses copying mtd->ecclayout->eccbytes so the
resulting field of the returned structure contains garbage.
Signed-off-by: Ricard Wanderlöf <ricardw@axis.com>
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
This version only differs from version posted by Savin Zlobec (20 Jun
2006) in that the AT91RM9200-specific chip-select / bus setup code has
been moved from the at91_nand.c driver into the processor-specific file.
From: Savin Zlobec <savin@epico.si>
Signed-off-by: Andrew Victor <andrew@sanpeople.com>
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
Fairly self explanatory. Keep a reference initially, drop it when we free up
the driver resources.
Signed-off-by: Alan Cox <alan@redhat.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
Add MTD map driver for BIOS flash chips connected to the Intel ESB2
southbridge.
[akpm@osdl.org: coding-style fixes, build fix]
Signed-off-by: Ryan Jackson <rjackson@lnxi.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
Add chip driver and JEDEC probe support for the SST 49LF040B flash chip.
Signed-off-by: Ryan Jackson <rjackson@lnxi.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
The 2 bits controlling the window size are often set to allow reading the
BIOS, but too small to allow writing, since the lock registers are 4MiB
lower in the address space than the data. This is intended to prevent
flashing the bios, perhaps accidentally.
The bits are 6 and 7. If both bits are set, it is a 5MiB window. If only
the 7 Bit is set, it is a 4MiB window. Otherwise, it is a 64KiB window.
This parameter allows the driver to override the BIOS settings.
Signed-off-by: Ryan Jackson <rjackson@lnxi.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
