The quirk was meant to just inhibit some resets, but ended up blocking
all of them. Fortunately, this was just what was needed. Change the
comment to reflect reality.
Also, this issue has just been observed on Samsung laptops, so reduce
the number of chips the quirk affects.
Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
Hook up the controller LED to the LED subsystem, allowing more flexible
control than simply indicating an ongoing request.
Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
Some devices have several controllers; need add the index info to
device slot name host->slot_desc[]
Signed-off-by: Feng Tang <feng.tang@intel.com>
Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
The JMicron JMB38x chip doesn't support transfers that aren't 32-bit
aligned (both size and start address). It also doesn't like switching
between PIO and DMA mode, so it needs to be reset after each request.
Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
Some controllers have been designed on the assumption that all transfers
will be 32-bit aligned, both in start address and in size. This is not a
guarantee the SDHCI specification provides and not one we can provide.
Revert back to PIO for individual requests in order to work around the
hardware bug.
Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
Do a full scan of the directory to try and be a bit more proactive,
instead of waiting for things to break.
Signed-off-by: Jens Axboe <jens.axboe@oracle.com>
Commits
58b053e4ce ("Update arch/ to use sg helpers")
45711f1af6 ("[SG] Update drivers to use sg helpers")
fa05f1286b ("Update net/ to use sg helpers")
converted many files to use the scatter gather helpers without ensuring
that the necessary headerfile <linux/scatterlist> is included. This
happened to work for ia64, powerpc, sparc64 and x86 because they
happened to drag in that file via their <asm/dma-mapping.h>.
On most of the others this probably broke.
Instead of increasing the header file spider web I choose to include
<linux/scatterlist.h> directly into the affectes files.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Jens Axboe <jens.axboe@oracle.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
The forcedma and nodma module parameters can be replaced with the quirks
parameter, so remove the redundancy.
Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
Some controllers like ENE712 can't work properly with DMA mode,
add this quirk to force these kinds of HW work with PIO mode
Signed-off-by: Feng Tang <feng.tang@intel.com>
Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
Many host controllers don't fully follow the PCI spec to claim
whether they support DMA in PCI class register. Leave the driver
to judge it from the Capability register, quirks and module parameter
Signed-off-by: Feng Tang <feng.tang@intel.com>
Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
It is fully legal for a controller to start issuing data related
interrupts before it has signalled that the command has completed.
Make sure the driver actually can handle this.
Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
Some SDHC cards report an invalid maximum block size, in these cases
assume they support block sizes up to 512 bytes instead of returning
an error.
Signed-off-by: David Vrabel <david.vrabel@csr.com>
Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
The block count register shouldn't be trusted for single block transfers,
so avoid using it completely when calculating transferred bytes.
Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
