This patch fixes a numbers of issues regarding to that both 8xx and 82xx
began to use ppc_sys model:
- Platform is now identified by default deviceless SOC, if no
BOARD_CHIP_NAME is specified in the bard-specific header. For the list
of supported names refer to (arch/ppc/syslib/) mpc8xx_sys.c and
mpc82xx_sys.c for 8xx and 82xx respectively.
- Fixed a bug in identification by name - if the name was not found,
it returned -1 instead of default deviceless ppc_spec.
- fixed devices amount in the 8xx platform system descriptions
Signed-off-by: Vitaly Bordug <vbordug@ru.mvista.com>
Signed-off-by: Marcelo Tosatti <marcelo.tosatti@cyclades.com>
Signed-off-by: Kumar Gala <kumar.gala@freescale.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Add proper entry to support the Marvell MV64361 (Marvell Discovery II)
SRAM.
This feature may be used by the mv643xx_eth driver.
Signed-off-by: Nicolas DET <det.nicolas@free.fr>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
This implements a nvram acccess method, similar to
arch/ppc64/kernel/pSeries_nvram.c tested on CHRP B50.
Signed-off-by: Olaf Hering <olh@suse.de>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Change the phys_mem_access_prot() function to take a pfn instead of an
address. This allows mmap64() to work on /dev/mem for addresses above 4G
on 32-bit architectures. We start with a pfn in mmap_mem(), so there's no
need to convert to an address; in fact, it's actively bad, since the
conversion can overflow when the address is above 4G.
Similarly fix the ppc32 page_is_ram() function to avoid a conversion to an
address by directly comparing to max_pfn. Working with max_pfn instead of
high_memory fixes page_is_ram() to give the right answer for highmem pages.
Signed-off-by: Roland Dreier <rolandd@cisco.com>
Cc: Anton Blanchard <anton@samba.org>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Mention a few more commands in xmon. System.map processing was replaced
with kallsyms.
Signed-off-by: Olaf Hering <olh@suse.de>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Cleanup PPC440 eval boards (bamboo, ebony, luan and ocotea) to better
support U-Boot as bootloader.
Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Matt Porter <mporter@kernel.crashing.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Convert core 8xx drivers to use in_xxxbe/in_xxx macros instead of direct
memory references.
Other than making IO accesses explicit (which is a plus for readability), a
common set of macros provides a unified place for the volatile flag to
constraint compiler code reordering.
There are several unlucky places at the moment which lack the volatile
flag.
Signed-off-by: Marcelo Tosatti <marcelo.tosatti@cyclades.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Depending on how GCC is built, GCC 4 may generate altivec instructions without
user explicitly requesting vector operations in the code. Although this is a
performance booster for user applications, it is a problem for kernel.
This patch explicitly instruct GCC to NOT generate altivec instructions while
building the kernel.
Here are some test cases I ran.
(1) build gcc 4.0.1 with '--with-cpu=7450 --enable-altivec
--enable-cxx-flags=-mcpu=7450', and use this gcc to build kernel WITHOUT
this kernel patch. Kernel fail to boot up on a 7450 board because of
altivec instructions in kernel.
(2) build gcc 4.0.1 with "--with-cpu=7450 --enable-altivec
--enable-cxx-flags=-mcpu=7450", and use this gcc to build kernel WITH this
kernel patch. Kernel boot up on a 7450 board without any problem.
(3) build gcc 4.0.1 with "--with-cpu=750 --enable-cxx-flags=-mcpu=750",
and use this gcc to build kernel with or without this kernel patch.
Kernel boot up on a 7450 board without any problem.
This patch should also work with GCC 3 or even earlier GCC 2.95.3.
Signed-off-by: Lee Nicks <allinux@gmail.com>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
The recent merge of fpu.S broken the handling of fpscr for
ARCH=powerpc and CONFIG_PPC64=y. FP registers could be corrupted,
leading to strange random application crashes.
The confusion arises, because the thread_struct has (and requires) a
64-bit area to save the fpscr, because we use load/store double
instructions to get it in to/out of the FPU. However, only the low
32-bits are actually used, so we want to treat it as a 32-bit quantity
when manipulating its bits to avoid extra load/stores on 32-bit. This
patch replaces the current definition with a structure of two 32-bit
quantities (pad and val), to clarify things as much as is possible.
The 'val' field is used when manipulating bits, the structure itself
is used when obtaining the address for loading/unloading the value
from the FPU.
While we're at it, consolidate the 4 (!) almost identical versions of
cvt_fd() and cvt_df() (arch/ppc/kernel/misc.S,
arch/ppc64/kernel/misc.S, arch/powerpc/kernel/misc_32.S,
arch/powerpc/kernel/misc_64.S) into a single version in fpu.S. The
new version takes a pointer to thread_struct and applies the correct
offset itself, rather than a pointer to the fpscr field itself, again
to avoid confusion as to which is the correct field to use.
Finally, this patch makes ARCH=ppc64 also use the consolidated fpu.S
code, which it previously did not.
Built for G5 (ARCH=ppc64 and ARCH=powerpc), 32-bit powermac (ARCH=ppc
and ARCH=powerpc) and Walnut (ARCH=ppc, CONFIG_MATH_EMULATION=y).
Booted on G5 (ARCH=powerpc) and things which previously fell over no
longer do.
Signed-off-by: David Gibson <dwg@au1.ibm.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Talk about buggy firmware... the OF on the Longtrail returns 0
from the claim client service rather than -1 when the claim fails.
It also has no device_type on the /memory node and blows up if
the output buffer for package-to-path is too big.
This also fixes a bug with calling alloc_up with align == 0, where
we did _ALIGN_UP(alloc_bottom, 0) which will end up as 0.
Lastly, we now check the return value (in r3) from calling the
prom, and return -1 from call_prom if we get a negative value back.
That is supposed to indicate that the requested client service
doesn't exist.
Signed-off-by: Paul Mackerras <paulus@samba.org>
This changes the parameters for i8259_init so that it takes two
parameters: a physical address for generating an interrupt
acknowledge cycle, and an interrupt number offset. i8259_init
now sets the irq_desc[] for its interrupts; all the callers
were doing this, and that code is gone now. This also defines
a CONFIG_PPC_I8259 symbol to select i8259.o for inclusion, and
makes the platforms that need it select that symbol.
Signed-off-by: Paul Mackerras <paulus@samba.org>
This defines a CONFIG_INDIRECT_PCI symbol to control whether it
gets used or not, and fixes the Kconfig to select that symbol for
platforms that need it.
Signed-off-by: Paul Mackerras <paulus@samba.org>
A recent patch updated the name of pci_assign_all_busses to
pci_assign_all_buses. This instance of its use wasn't corrected
by the original patch to use the new name.
Builds cleanly on ads8272.
Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Previously it claimed 7MB starting at the 9M point and loaded the
kernel there. That meant that prom_init put the flattened device
tree above 16M. On the 601 that caused the early device tree scan
to fail, since only 16MB are mapped with BATs on the 601. Moving
this down to 8MB allows prom_init to put the flattened device tree
between 15M and 16M, so it works on the 601.
Signed-off-by: Paul Mackerras <paulus@samba.org>
Merge ppc32 and ppc64 versions of thread_info.h. They were pretty
similar already, the chief changes are:
- Instead of inline asm to implement current_thread_info(),
which needs to be different for ppc32 and ppc64, we use C with an
asm("r1") register variable. gcc turns it into the same asm as we
used to have for both platforms.
- We replace ppc32's 'local_flags' with the ppc64
'syscall_noerror' field. The noerror flag was in fact the only thing
in the local_flags field anyway, so the ppc64 approach is simpler, and
means we only need a load-immediate/store instead of load/mask/store
when clearing the flag.
- In readiness for 64k pages, when THREAD_SIZE will be less
than a page, ppc64 used kmalloc() rather than get_free_pages() to
allocate the kernel stack. With this patch we do the same for ppc32,
since there's no strong reason not to.
- For ppc64, we no longer export THREAD_SHIFT and THREAD_SIZE
via asm-offsets, thread_info.h can now be safely included in asm, as
on ppc32.
Built and booted on G4 Powerbook (ARCH=ppc and ARCH=powerpc) and
Power5 (ARCH=ppc64 and ARCH=powerpc).
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Paul Mackerras <paulus@samba.org>
This declares powersave_nap in system.h and makes it an int everywhere,
fixes typos for the maple platform, fixes a couple of places where
I missed removing the last two arguments from a message_pass function,
and makes ppc64 consistent with ppc32 in the type of the
pci_bridge.cfg_data field.
Signed-off-by: Paul Mackerras <paulus@samba.org>
This patches the ppc32 and ppc64 versions of the headers and .c files
with helper functions for manipulating the performance counting
hardware. As a side effect, it removes use of the term "perfmon" from
ppc32, thus avoiding confusion with the unrelated performance counter
interface from HP Labs also called "perfmon".
Built, but not booted, for g5, pSeries, iSeries, and 32-bit Powermac
with both ARCH=powerpc and ARCH=ppc{,64} as appropriate.
Signed-off-by: David Gibson <dwg@au1.ibm.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
