Commit Graph

247 Commits

Author SHA1 Message Date
Adrian Bunk
a640630460 [MIPS] unexport __kmap_atomic_to_page
This patch removes the no longer used export of __kmap_atomic_to_page.

Signed-off-by: Adrian Bunk <bunk@kernel.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-05-12 16:46:51 +01:00
Dmitri Vorobiev
e698d66b81 [MIPS] unexport copy_from_user_page()
No users for the copy_from_user_page() routine exist outside of the
core kernel code. Therefore, EXPORT_SYMBOL(copy_from_user_page) is
useless, and this patch removes it.

Signed-off-by: Dmitri Vorobiev <dmitri.vorobiev@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-04-28 17:14:30 +01:00
Dmitri Vorobiev
715243e6c3 [MIPS] unexport copy_to_user_page()
The copy_to_user_page() function is called only in the core kernel
code. Therefore, there is no need to export it. This patch removes
EXPORT_SYMBOL(copy_to_user_page).

Signed-off-by: Dmitri Vorobiev <dmitri.vorobiev@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-04-28 17:14:30 +01:00
Dmitri Vorobiev
11327ef77f [MIPS] unexport copy_user_highpage()
The copy_user_highpage() routine has no users outside of the
core kernel code, so exporting this symbol is pointless.
This patch removes EXPORT_SYMBOL(copy_user_highpage).

Signed-off-by: Dmitri Vorobiev <dmitri.vorobiev@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-04-28 17:14:30 +01:00
Johannes Weiner
f2ce89f30e [MIPS] remove redundant display of free swap space in show_mem()
Signed-off-by: Johannes Weiner <hannes@saeurebad.de>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-04-28 17:14:27 +01:00
Ralf Baechle
39b8d52542 [MIPS] Add support for MIPS CMP platform.
Signed-off-by: Chris Dearman <chris@mips.com>
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-04-28 17:14:26 +01:00
Chris Dearman
351336929c [MIPS] Allow setting of the cache attribute at run time.
Slightly tacky, but there is a precedent in the sparc archirecture code.

Signed-off-by: Chris Dearman <chris@mips.com>
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-04-28 17:14:25 +01:00
Chris Dearman
962f480e0f [MIPS] All MIPS32 processors support64-bit physical addresses.
Still, only the 4K may actually implement it.

Signed-off-by: Chris Dearman <chris@mips.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-04-28 17:14:25 +01:00
Thiemo Seufer
fb2a27e743 [MIPS] Reimplement clear_page/copy_page
Fold the SB-1 specific implementation of clear_page/copy_page in the
generic version, and rewrite that one in tlbex style. The immediate
benefits:
  - It converts the compile-time workaround for SB-1 pass 1 prefetches
    to a more efficient run-time check.
  - It allows adjustment of loop unfolling, which helps to reduce the
    number of redundant cdex cache ops.
  - It fixes some esoteric cornercases (the cache line length calculations
    can go wrong, and support for 64k pages without prefetch instructions
    will overflow the addiu immediate).
  - Somewhat better guesses of "good" prefetch values.

Signed-off-by: Thiemo Seufer <ths@networkno.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-04-28 17:14:23 +01:00
Ralf Baechle
9c5a3d729c [MIPS] Handle aliases in vmalloc correctly.
flush_cache_vmap / flush_cache_vunmap were calling flush_cache_all which -
having been deprecated - turned into a nop ...

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-04-07 22:31:04 +01:00
Thomas Bogendoerfer
b1ec4c8e48 [MIPS] Add missing 4KEC TLB refill handler
Early 4KEc were MIPS32r1 and therefore need some love to get a TLB
refill handler.

Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-04-01 15:46:33 +01:00
Ralf Baechle
234fcd1484 [MIPS] Fix loads of section missmatches
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-03-12 14:14:41 +00:00
Thiemo Seufer
a7c2996e41 [MIPS] Fix typo in comment
We support now other page sizes as well.

Signed-off-by: Thiemo Seufer <ths@networkno.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-03-12 14:14:41 +00:00
Thiemo Seufer
345599ab12 [MIPS] SB1: Fix CONFIG_SIBYTE_DMA_PAGEOPS build failure.
Fix type mismatch warnings for 64-bit kernel builds which trigger -Werror.
The problem affects only SB-1 kernels with CONFIG_SIBYTE_DMA_PAGEOPS
enabled.

Signed-off-by: Thiemo Seufer <ths@networkno.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-02-19 17:01:31 +00:00
Ralf Baechle
9a74b3eb22 [MIPS] Fix buggy invocations of kmap_coherent()
kmap_coherent will only work correctly if the page it is called on is
not marked dirty.  If it's dirty the kernel address of the page should
be used instead of a temporary mapping.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-02-19 17:01:31 +00:00
Ralf Baechle
2eaa7ec286 [MIPS] Handle I-cache coherency in flush_cache_range()
So far flush_cache_range() did't consider the I-cache largely because it
did rarely ever matter to real world code.  This was working primarily
because normally code and data are don't share the same pages - with the
exception of MIPS16 code which uses address constants embedded between
the code.   The following sequence of events may break the code:

 o MIPS16 executable being loaded
 o dynamic linker relocates the address constants embedded into the code:
 o   Uses mprotect(2) to make code pages PROT_READ|PROT_WRITE
 o   Performs the actual relocations by writing to the pages which likely
     are COW.  Because no PROT_EXEC is set I-cache coherence will not be
     considered.
 o   Uses mprotect(2) to switch code pages back to PROT_READ|PROT_EXEC.
     This results in a call to flush_cache_range() which also does not
     consider I-caches.
 o => executing the page just having been relocated may now result in the
   I-cache getting refilled with stale data from memory.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-02-19 17:01:31 +00:00
Joe Perches
603e82edf7 arch/mips/: Spelling fixes
Signed-off-by: Joe Perches <joe@perches.com>
Signed-off-by: Adrian Bunk <bunk@kernel.org>
2008-02-03 16:54:53 +02:00
Thiemo Seufer
e30ec4525d [MIPS] Split the micro-assembler from tlbex.c.
This patch moves the micro-assembler in a separate implementation, as
it is useful for further run-time optimizations. The only change in
behaviour is cutting down printk noise at kernel startup time.

Checkpatch complains about macro parameters which aren't protected by
parentheses. I believe this is a flaw in checkpatch, the paste operator
used in those macros won't work with parenthesised parameters.

Signed-off-by: Thiemo Seufer <ths@networkno.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-02-01 14:48:44 +00:00
Manuel Lauss
237cfee1db [MIPS] Alchemy: Au1210/Au1250 CPU support
This patch adds IDs for new Au1200 variants: Au1210 and Au1250.
They are essentially identical to the Au1200 except for the Au1210
which has a different SoC-ID in the PRId register [bits 31:24].
The Au1250 is a "Au1200 V0.2".

Signed-off-by: Manuel Lauss <mano@roarinelk.homelinux.net>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-01-29 10:14:59 +00:00
Thomas Bogendoerfer
c7c6b39050 [MIPS] Use correct dma flushing in dma_cache_sync()
Not cache coherent R10k systems (like IP28) need to do real cache
invalidates in dma_cache_sync().

Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-01-29 10:14:58 +00:00
Thomas Bogendoerfer
e9c33572a9 [MIPS] Use real cache invalidate
R10k non coherent machines need a real dma cache invalidate to get rid of
speculative stores in cache.  For other machines this promises a slight
speedup.

Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-01-29 10:14:57 +00:00
Franck Bui-Huu
92b1e6a64a [MIPS] tlbex.c: cleanup debug code
Signed-off-by: Franck Bui-Huu <fbuihuu@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-01-29 10:14:57 +00:00
Franck Bui-Huu
cbdbe07f9d [MIPS] tlbex.c: use __cacheline_aligned instead of __tlb_handler_align
Signed-off-by: Franck Bui-Huu <fbuihuu@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-01-29 10:14:57 +00:00
Franck Bui-Huu
f49b94d8c1 [MIPS] tlbex.c: cleanup include files
Signed-off-by: Franck Bui-Huu <fbuihuu@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-01-29 10:14:56 +00:00
Franck Bui-Huu
a9af6041e9 [MIPS] tlbex.c: Cleanup __init usages.
Signed-off-by: Franck Bui-Huu <fbuihuu@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-01-29 10:14:56 +00:00