"make dep" is no longer required in kernel 2.6, but was still mentioned
in some places.
Signed-off-by: Adrian Bunk <bunk@kernel.org>
Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
The AITC code did not allow to start kernel, if bootloader
manipulates with interrupt level mask. The change ensures,
that NIMASK is initialized into correct state and that
interrupts enable registers are cleared.
Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* master.kernel.org:/pub/scm/linux/kernel/git/davej/cpufreq:
[CPUFREQ] Don't take semaphore in cpufreq_quick_get()
[CPUFREQ] Support different families in fid/did to frequency conversion
[CPUFREQ] cpufreq_stats: misc cpuinit section annotations
[CPUFREQ] implement !CONFIG_CPU_FREQ stub for cpufreq_unregister_notifier()
[CPUFREQ] mark hotplug notifier callback as __cpuinit
[CPUFREQ] Only check for transition latency on problematic governors (kconfig fix)
[CPUFREQ] allow ondemand and conservative cpufreq governors to be used as default
[CPUFREQ] move policy's governor initialisation out of low-level drivers into cpufreq core
[CPUFREQ] Longhaul - Add support for PM133 northbridge
[CPUFREQ] x86: use num_online_nodes to get physical cpus numbers for
The patch enables to define MMC host get_ro() method through platform data.
Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
During GPIO testing on PiMX1 board there has been revealed
problem with some pins input functions. The GIUS bit has
to be set for inputs to work reliably too. It is surprising
that input worked on some inputs with incorrect setup before.
DR is not mandatory, but it ensures stable constant level
on internal traces.
Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The pins for GPIO should be provided as plain number
build as (GPIO_PORTx + pin_number). But to setup
the output GPIO_GIUS and GPIO_DR have to be specified
in mode to route right value to the pin.
This is a fix, it should go to 2.6.23
Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
We need to make sure, that the clockevent devices are resumed, before
the tick is resumed. The current resume logic does not guarantee this.
Add CLOCK_EVT_MODE_RESUME and call the set mode functions of the clock
event devices before resuming the tick / oneshot functionality.
Fixup the existing users.
Thanks to Nigel Cunningham for tracking down a long standing thinko,
which affected the jinxed VAIO.
[akpm@linux-foundation.org: xen build fix]
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: john stultz <johnstul@us.ibm.com>
Cc: Rusty Russell <rusty@rustcorp.com.au>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Support for generic input output for MX1 family.
The implementation prevents allocation of one pin
by two users, but does not store pointer to the user
description permanently, because this solution
would have bigger memory overhead.
The simple way to integrate code with per BSP
pins setup and allocation is required else all GPIO
registration checking is useless. The function
imx_gpio_setup_multiple_pins() can be used for this
purpose in future.
Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Only System PLL clock source is selectable by CSCR_SYSTEM_SEL
bit. MPU PLL is driven by 512*CLK32 for each case.
Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The minimal bus clock prescaler should be kept at value
selected by the board / boot loader designer.
Switching frequency above startup limit could
lead to the external memory/devices misbehave.
Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The transition latency has to be defined and reasonably
small to allow on-demand and conservative governors.
The value has been defined according to manual.
The imx_set_target() protected against seen out of range
requests now.
Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Support to change MX1 CPU frequency at runtime.
Tested on PiKRON's PiMX1 board and seems to be fully
stable up to 200 MHz end even as low as 8 MHz.
Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The future high resolution support inclusion utilizes
imx_decode_pll() in timer base frequency computation.
This use requires more precise computation without
discarding 10 bits by shifting left.
Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Untested, but this should fix up the bulk of the totally mechanical
issues, and should make the actual detail fixing easier.
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Many files include the filename at the beginning, serveral used a wrong one.
Signed-off-by: Uwe Zeisberger <Uwe_Zeisberger@digi.com>
Signed-off-by: Adrian Bunk <bunk@stusta.de>
Patch from David Brownell
ARM genirq cleanups/updates:
- Start switching platforms to newer APIs
* use "irq_chip" name, not "irqchip"
* providing irq_chip.name
- Show irq_chip.name in /proc/interrupts, like on x86.
This update a bit more than half of the ARM code. The irq_chip.name
values were chosen to match docs (if I have them) or be otherwise
obvious ("FPGA", "CPLD", or matching the code).
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
