Claudiu Beznea d8c7983f31 ARM: at91: ddr: add registers definitions for sama7g5's ddr ...

Add registers and bits definitions for SAMA7G5's UDDRC and DDR3PHY.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20210415105010.569620-12-claudiu.beznea@microchip.com

2021-07-19 14:32:12 +02:00

..

at91sam9_ddrsdr.h

treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152

2019-05-30 11:26:32 -07:00

at91sam9_sdramc.h

treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152

2019-05-30 11:26:32 -07:00

atmel_tcb.h

ARM: at91: add atmel tcb capabilities

2020-07-11 18:57:03 +02:00

atmel-secumod.h

treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500

2019-06-19 17:09:55 +02:00

atmel-sfr.h

treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500

2019-06-19 17:09:55 +02:00

pm.h

ARM: at91: pm: Move prototypes to mutually included header

2021-03-26 18:20:49 +01:00

sama7-ddr.h

ARM: at91: ddr: add registers definitions for sama7g5's ddr

2021-07-19 14:32:12 +02:00

sama7-sfrbu.h

ARM: at91: sfrbu: add sfrbu registers definitions for sama7g5

2021-07-19 14:32:12 +02:00