Max Filippov 1dd031eb99 xtensa: fix xtensa_wsr always writing 0 ...

commit a3d0245c58 upstream.

The commit cad6fade6e ("xtensa: clean up WSR*/RSR*/get_sr/set_sr")
replaced 'WSR' macro in the function xtensa_wsr with 'xtensa_set_sr',
but variable 'v' in the xtensa_set_sr body shadowed the argument 'v'
passed to it, resulting in wrong value written to debug registers.

Fix that by removing intermediate variable from the xtensa_set_sr
macro body.

Cc: stable@vger.kernel.org
Fixes: cad6fade6e ("xtensa: clean up WSR*/RSR*/get_sr/set_sr")
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

2022-04-08 14:39:58 +02:00

..

asm

xtensa: fix xtensa_wsr always writing 0

2022-04-08 14:39:58 +02:00

uapi/asm

xtensa: expose syscall through user_pt_regs

2020-07-28 00:57:05 -07:00