Commit Graph

178 Commits

Author SHA1 Message Date
Arnd Bergmann
bccb5d53e2 Merge tag 'memory-controller-drv-5.16-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl into arm/drivers
Memory controller drivers for v5.16, part two

1. Convert LPDDR2 bindings to dtschema and extend them with new
   properties.
2. Tegra 20 EMC: support matching timings by LPDDR2 configuration from
   devicetree.

* tag 'memory-controller-drv-5.16-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl:
  memory: tegra20-emc: Add runtime dependency on devfreq governor module
  memory: tegra20-emc: Support matching timings by LPDDR2 configuration
  memory: Add LPDDR2-info helpers
  dt-bindings: memory: tegra20: emc: Document new LPDDR2 sub-node
  dt-bindings: Add vendor prefix for Elpida Memory
  dt-bindings: memory: lpddr2: Document Elpida B8132B2PB-6D-F
  dt-bindings: memory: lpddr2: Add revision-id properties
  dt-bindings: memory: lpddr2: Convert to schema
  dt-bindings: Relocate DDR bindings

Link: https://lore.kernel.org/r/20211021093002.118192-1-krzysztof.kozlowski@canonical.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-10-21 21:34:21 +02:00
Dmitry Osipenko
14b43c20c2 memory: tegra20-emc: Add runtime dependency on devfreq governor module
Tegra20 EMC driver uses simple devfreq governor. Add simple devfreq
governor to the list of the Tegra20 EMC driver module softdeps to allow
userspace initramfs tools like dracut to automatically pull the devfreq
module into ramfs image together with the EMC module.

Reported-by: Nicolas Chauvet <kwizart@gmail.com>
Suggested-by: Nicolas Chauvet <kwizart@gmail.com>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Link: https://lore.kernel.org/r/20211019231524.888-1-digetx@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-10-21 11:18:08 +02:00
Dmitry Osipenko
131dd9a436 memory: tegra20-emc: Support matching timings by LPDDR2 configuration
ASUS Transformer TF101 doesn't provide RAM code and in this case memory
timings should be selected based on identity information read out from
SDRAM chip. Support matching timings by LPDDR2 configuration.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Link: https://lore.kernel.org/r/20211006224659.21434-10-digetx@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-10-15 09:52:47 +02:00
Kai Song
31b88d85f0 memory: tegra210-emc: replace DEFINE_SIMPLE_ATTRIBUTE with
fix debugfs_simple_attr.cocci warning:
drivers/memory/tegra/tegra210-emc-core.c:1665:0-23: WARNING:tegra210_emc_debug_min_rate_fops
should be defined with DEFINE_DEBUGFS_ATTRIBUTE

Commit 6fc5f1adf5 ("memory: tegra210-emc: replace
DEFINE_SIMPLE_ATTRIBUTE with DEFINE_DEBUGFS_ATTRIBUTE") fixed the same
warning, but didn't fix all matches in this file at once.

Signed-off-by: Kai Song <songkai01@inspur.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Link: https://lore.kernel.org/r/20211005043514.9650-1-songkai01@inspur.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-10-07 20:37:33 +02:00
Yang Yingliang
982ca19a09 memory: tegra186-emc: Fix error return code in tegra186_emc_probe()
Return the error code when command fails.

Fixes: 13324edbe9 ("memory: tegra186-emc: Handle errors in BPMP response")
Signed-off-by: Yang Yingliang <yangyingliang@huawei.com>
Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com>
Link: https://lore.kernel.org/r/20210928021545.3774677-1-yangyingliang@huawei.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-10-07 20:32:33 +02:00
Cai Huoqing
1d8e0223bb memory: tegra: Make use of the helper function devm_add_action_or_reset()
Use devm_add_action_or_reset() instead of devm_add_action() to simplify
the error handling.

Signed-off-by: Cai Huoqing <caihuoqing@baidu.com>
Link: https://lore.kernel.org/r/20210922130002.586-1-caihuoqing@baidu.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-09-24 13:18:47 +02:00
Mikko Perttunen
13324edbe9 memory: tegra186-emc: Handle errors in BPMP response
The return value from tegra_bpmp_transfer indicates the success or
failure of the IPC transaction with BPMP. If the transaction
succeeded, we also need to check the actual command's result code.
Add code to do this.

Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Link: https://lore.kernel.org/r/20210915085517.1669675-3-mperttunen@nvidia.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-09-20 10:33:28 +02:00
Dmitry Osipenko
77b14c9d05 memory: tegra: Remove interconnect state syncing hack
State syncing works properly now, previously the sync callback was never
invoked. Apparently it was fixed in drivers core, so let's remove the
hack. The state won't be synced until all consumer drivers of devices
that reference memory controller in a device-tree are probed, i.e. keeping
bandwidth at maximum until both display and devfreq drivers are probed.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Link: https://lore.kernel.org/r/20210912183009.6400-1-digetx@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-09-20 10:32:53 +02:00
Jing Yangyang
6fc5f1adf5 memory: tegra210-emc: replace DEFINE_SIMPLE_ATTRIBUTE with DEFINE_DEBUGFS_ATTRIBUTE
Fix the following coccicheck warning:
  drivers/memory/tegra/tegra210-emc-core.c:1665:0-23:WARNING
    tegra210_emc_debug_min_rate_fops should be defined  with DEFINE_DEBUGFS_ATTRIBUTE

Signed-off-by: Jing Yangyang <jing.yangyang@zte.com.cn>
Link: https://lore.kernel.org/r/20210825063739.70260-1-deng.changcheng@zte.com.cn
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-09-15 09:33:58 +02:00
jing yangyang
e12bc3540a memory: tegra30-emc: replace DEFINE_SIMPLE_ATTRIBUTE with DEFINE_DEBUGFS_ATTRIBUTE
Fix the following coccicheck warning:
  drivers/memory/tegra/tegra30-emc.c:1322:0-23:WARNING:
    tegra_emc_debug_max_rate_fops should be defined with DEFINE_DEBUGFS_ATTRIBUTE

Signed-off-by: jing yangyang <jing.yangyang@zte.com.cn>
Link: https://lore.kernel.org/r/20210821035223.28282-1-jing.yangyang@zte.com.cn
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-09-15 09:33:05 +02:00
Colin Ian King
d71b90e363 memory: tegra: make the array list static const, makes object smaller
Don't populate the array list on the stack but instead it
static const. Makes the object code smaller by 110 bytes:

Before:
   text    data     bss     dec     hex filename
  37713   21992      64   59769    e979 .../tegra/tegra210-emc-cc-r21021.o

After:
   text    data     bss     dec     hex filename
  37539   22056      64   59659    e90b .../tegra/tegra210-emc-cc-r21021.o

(gcc version 10.3.0)

Signed-off-by: Colin Ian King <colin.king@canonical.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Link: https://lore.kernel.org/r/20210819133155.10441-1-colin.king@canonical.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-09-15 09:31:19 +02:00
Arnd Bergmann
eaf89f1cd3 memory: tegra: fix unused-function warning
The tegra186_mc_client_sid_override() is only called from
an #ifdef block:

drivers/memory/tegra/tegra186.c:74:13: error: 'tegra186_mc_client_sid_override' defined but not used [-Werror=unused-function]
   74 | static void tegra186_mc_client_sid_override(struct tegra_mc *mc,
      |             ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

Add another #ifdef around the called function.

Fixes: 393d66fd2c ("memory: tegra: Implement SID override programming")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Link: https://lore.kernel.org/r/20210722090748.1157470-1-arnd@kernel.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-07-23 08:25:34 +02:00
Dan Carpenter
c7c6570326 memory: tegra: Delete dead debugfs checking code
The debugfs_create_dir() function does not return NULL, it returns error
pointers.  But in normal situations like this where the caller is not
dereferencing "emc->debugfs.root" then we are not supposed to check the
return.  So instead of fixing these checks, we should delete them.

Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Link: https://lore.kernel.org/r/YMCQDTSyG8UuQoh0@mwanda
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-06-10 09:18:15 +02:00
Thierry Reding
393d66fd2c memory: tegra: Implement SID override programming
Instead of programming all SID overrides during early boot, perform the
operation on-demand after the SMMU translations have been set up for a
device. This reuses data from device tree to match memory clients for a
device and programs the SID specified in device tree, which corresponds
to the SID used for the SMMU context banks for the device.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Link: https://lore.kernel.org/r/20210603164632.1000458-2-thierry.reding@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-06-03 21:50:43 +02:00
Thierry Reding
8fd9f632ba memory: tegra: Split Tegra194 data into separate file
Keep the directory structure consistent by splitting the Tegra194 data
into a separate file.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Link: https://lore.kernel.org/r/20210602163302.120041-13-thierry.reding@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-06-03 21:49:41 +02:00
Thierry Reding
7191b623a2 memory: tegra: Add memory client IDs to tables
The memory client IDs will subsequently be used to program override SIDs
for the given clients depending on the device tree configuration.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Link: https://lore.kernel.org/r/20210602163302.120041-12-thierry.reding@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-06-03 21:49:41 +02:00
Thierry Reding
7355c7b9ae memory: tegra: Unify drivers
The Tegra210 (and earlier) driver now supports all the functionality
that the Tegra186 (and later) driver does, so they can be unified.

Note that previously the Tegra186 (and later) driver could be unloaded,
even if that was perhaps not very useful. Older chips don't support that
yet, but once they do this code can be reenabled.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Link: https://lore.kernel.org/r/20210602163302.120041-11-thierry.reding@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-06-03 21:49:41 +02:00
Thierry Reding
0de93c6985 memory: tegra: Only initialize reset controller if available
The memory controller hot resets are implemented in the BPMP on Tegra186
and later, so there's no need to provide an implementation via the
memory controller driver. Conditionally register the reset controller
only if needed.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Link: https://lore.kernel.org/r/20210602163302.120041-10-thierry.reding@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-06-03 21:49:41 +02:00
Thierry Reding
e474b3a15d memory: tegra: Make IRQ support opitonal
Make IRQ support optional to help unify the Tegra186 memory controller
driver with this one.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Link: https://lore.kernel.org/r/20210602163302.120041-9-thierry.reding@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-06-03 21:49:41 +02:00
Thierry Reding
1079a66bc3 memory: tegra: Parameterize interrupt handler
Tegra20 requires a slightly different interrupt handler than Tegra30 and
later, so parameterize the handler, so that each SoC implementation can
provide its own.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Link: https://lore.kernel.org/r/20210602163302.120041-8-thierry.reding@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-06-03 21:49:41 +02:00
Thierry Reding
ddeceab0a9 memory: tegra: Extract setup code into callback
Separate the setup code for Tegra30 and later into a ->setup() callback
and set it for all applicable chips.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Link: https://lore.kernel.org/r/20210602163302.120041-7-thierry.reding@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-06-03 21:49:41 +02:00
Thierry Reding
c64738e949 memory: tegra: Make per-SoC setup more generic
The current per-SoC setup code runs at a fairly arbitrary point during
probe, thereby making it less flexible for other SoC generations. Move
the call around slightly (after only the very basic, common setup that
applies to all SoC generations has been performed), which will allow
it to be used for other implementations.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Link: https://lore.kernel.org/r/20210602163302.120041-6-thierry.reding@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-06-03 21:49:41 +02:00
Thierry Reding
5c9016f0a8 memory: tegra: Push suspend/resume into SoC drivers
Continuing the scheme of unification, push suspend/resume callbacks into
per-SoC driver so that they can be properly parameterized.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Link: https://lore.kernel.org/r/20210602163302.120041-5-thierry.reding@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-06-03 21:49:41 +02:00
Thierry Reding
6cc884c1c7 memory: tegra: Introduce struct tegra_mc_ops
Subsequent patches will introduce further callbacks, so create a new
struct tegra_mc_ops to collect all of them in a single place. Move the
existing ->init() callback into the new structure.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Link: https://lore.kernel.org/r/20210602163302.120041-4-thierry.reding@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-06-03 21:49:40 +02:00
Thierry Reding
e899993845 memory: tegra: Unify struct tegra_mc across SoC generations
As another step towards unifying both the Tegra210 (and earlier) and
Tegra186 (and later) memory controller drivers, unify the structures
that are used to represent them.

Note that this comes at a slight space penalty since some fields are
not used on all generations, but the benefits of unifying the driver
outweigh the downsides.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Link: https://lore.kernel.org/r/20210602163302.120041-3-thierry.reding@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-06-03 21:49:40 +02:00