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spi: bcm-qspi: Add Broadcom MSPI driver

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Master SPI driver for Broadcom settop, iProc SoCs. The driver
is used for devices that use SPI protocol on BRCMSTB, NSP, NS2
SoCs. SoC platform driver call exported porbe(), remove()
and suspend/resume pm_ops implemented in this common driver.

Signed-off-by: Kamal Dasu <kdasu.kdev@gmail.com>
Signed-off-by: Yendapally Reddy Dhananjaya Reddy
Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Kamal Dasu
2016-08-24 18:04:23 -04:00
committed by Mark Brown
parent 5fc78f4c84
commit fa236a7ef2
4 changed files with 786 additions and 0 deletions
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10
drivers/spi/Kconfig
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@@ -153,6 +153,16 @@ config SPI_BCM63XX_HSSPI
This enables support for the High Speed SPI controller present on
newer Broadcom BCM63XX SoCs.
config SPI_BCM_QSPI
tristate "Broadcom BSPI and MSPI controller support"
depends on ARCH_BRCMSTB || ARCH_BCM || ARCH_BCM_IPROC || COMPILE_TEST
default ARCH_BCM_IPROC
help
Enables support for the Broadcom SPI flash and MSPI controller.
Select this option for any one of BRCMSTB, iProc NSP and NS2 SoCs
based platforms. This driver works for both SPI master for spi-nor
flash device as well as MSPI device.
config SPI_BITBANG
tristate "Utilities for Bitbanging SPI masters"
help

1
drivers/spi/Makefile
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@@ -21,6 +21,7 @@ obj-$(CONFIG_SPI_BCM2835AUX) += spi-bcm2835aux.o
obj-$(CONFIG_SPI_BCM53XX) += spi-bcm53xx.o
obj-$(CONFIG_SPI_BCM63XX) += spi-bcm63xx.o
obj-$(CONFIG_SPI_BCM63XX_HSSPI) += spi-bcm63xx-hsspi.o
obj-$(CONFIG_SPI_BCM_QSPI) += spi-bcm-qspi.o
obj-$(CONFIG_SPI_BFIN5XX) += spi-bfin5xx.o
obj-$(CONFIG_SPI_ADI_V3) += spi-adi-v3.o
obj-$(CONFIG_SPI_BFIN_SPORT) += spi-bfin-sport.o

712
drivers/spi/spi-bcm-qspi.c Normal file
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63
drivers/spi/spi-bcm-qspi.h Normal file
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@@ -0,0 +1,63 @@
/*
* Copyright 2016 Broadcom
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License, version 2, as
* published by the Free Software Foundation (the "GPL").
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* General Public License version 2 (GPLv2) for more details.
*
* You should have received a copy of the GNU General Public License
* version 2 (GPLv2) along with this source code.
*/
#ifndef __SPI_BCM_QSPI_H__
#define __SPI_BCM_QSPI_H__
#include <linux/types.h>
#include <linux/io.h>
/* MSPI Interrupt masks */
#define INTR_MSPI_HALTED_MASK BIT(6)
#define INTR_MSPI_DONE_MASK BIT(5)
#define MSPI_INTERRUPTS_ALL \
(INTR_MSPI_DONE_MASK | \
INTR_MSPI_HALTED_MASK)
struct platform_device;
struct dev_pm_ops;
struct bcm_qspi_soc_intc;
/* Read controller register*/
static inline u32 bcm_qspi_readl(bool be, void __iomem *addr)
{
if (be)
return ioread32be(addr);
else
return readl_relaxed(addr);
}
/* Write controller register*/
static inline void bcm_qspi_writel(bool be,
unsigned int data, void __iomem *addr)
{
if (be)
iowrite32be(data, addr);
else
writel_relaxed(data, addr);
}
/* The common driver functions to be called by the SoC platform driver */
int bcm_qspi_probe(struct platform_device *pdev,
struct bcm_qspi_soc_intc *soc_intc);
int bcm_qspi_remove(struct platform_device *pdev);
/* pm_ops used by the SoC platform driver called on PM suspend/resume */
extern const struct dev_pm_ops bcm_qspi_pm_ops;
#endif /* __SPI_BCM_QSPI_H__ */