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drm/i915: Add HDCP framework + base implementation
This patch adds the framework required to add HDCP support to intel connectors. It implements Aksv loading from fuse, and parts 1/2/3 of the HDCP authentication scheme. Note that without shim implementations, this does not actually implement HDCP. That will come in subsequent patches. Changes in v2: - Don't open code wait_fors (Chris) - drm_hdcp.c under MIT license (Daniel) - Move intel_hdcp_disable() call above ddi_disable (Ram) - Fix // comments (I wore a cone of shame for 12 hours to atone) (Daniel) - Justify intel_hdcp_shim with comments (Daniel) - Fixed async locking issues by adding hdcp_mutex (Daniel) - Don't alter connector_state in enable/disable (Daniel) Changes in v3: - Added hdcp_mutex/hdcp_value to make async reasonable - Added hdcp_prop_work to separate link checking & property setting - Added new helper for atomic_check state tracking (Daniel) - Moved enable/disable into atomic_commit with matching helpers - Moved intel_hdcp_check_link out of all locks when called from dp - Bumped up ksv_fifo timeout (noticed failure on one of my dongles) Changes in v4: - Remove SKL_ prefix from most register names (Daniel) - Move enable/disable back to modeset path (Daniel) - s/get_random_long/get_random_u32/ (Daniel) - Remove mode_config.mutex lock in prop_work (Daniel) - Add intel_hdcp_init to handle init of conn components (Daniel) - Actually check return value of attach_property - Check Bksv is valid before trying to authenticate (Ram) Changes in v5: - checkpatch whitespace changes - s/DRM_MODE_CONTENT_PROTECTION_OFF/DRM_MODE_CONTENT_PROTECTION_UNDESIRED/ - Fix ksv list wait timeout (actually wait 5s) - Increase the R0 timeout to 300ms (Ram) Changes in v6: - SPDX license Cc: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Ramalingam C <ramalingm.c@intel.com> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Sean Paul <seanpaul@chromium.org> Link: https://patchwork.freedesktop.org/patch/msgid/20180108195545.218615-6-seanpaul@chromium.org
This commit is contained in:
Sean Paul
@@ -108,6 +108,7 @@ i915-y += intel_audio.o \
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intel_fbc.o \
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intel_fifo_underrun.o \
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intel_frontbuffer.o \
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intel_hdcp.o \
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intel_hotplug.o \
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intel_modes.o \
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intel_overlay.o \
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@@ -8043,6 +8043,7 @@ enum {
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#define GEN9_MEM_LATENCY_LEVEL_1_5_SHIFT 8
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#define GEN9_MEM_LATENCY_LEVEL_2_6_SHIFT 16
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#define GEN9_MEM_LATENCY_LEVEL_3_7_SHIFT 24
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#define SKL_PCODE_LOAD_HDCP_KEYS 0x5
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#define SKL_PCODE_CDCLK_CONTROL 0x7
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#define SKL_CDCLK_PREPARE_FOR_CHANGE 0x3
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#define SKL_CDCLK_READY_FOR_CHANGE 0x1
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@@ -8345,6 +8346,88 @@ enum skl_power_gate {
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#define SKL_PW_TO_PG(pw) ((pw) - SKL_DISP_PW_1 + SKL_PG1)
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#define SKL_FUSE_PG_DIST_STATUS(pg) (1 << (27 - (pg)))
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/* HDCP Key Registers */
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#define HDCP_KEY_CONF _MMIO(0x66c00)
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#define HDCP_AKSV_SEND_TRIGGER BIT(31)
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#define HDCP_CLEAR_KEYS_TRIGGER BIT(30)
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#define HDCP_KEY_STATUS _MMIO(0x66c04)
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#define HDCP_FUSE_IN_PROGRESS BIT(7)
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#define HDCP_FUSE_ERROR BIT(6)
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#define HDCP_FUSE_DONE BIT(5)
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#define HDCP_KEY_LOAD_STATUS BIT(1)
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#define HDCP_KEY_LOAD_DONE BIT(0)
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#define HDCP_AKSV_LO _MMIO(0x66c10)
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#define HDCP_AKSV_HI _MMIO(0x66c14)
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/* HDCP Repeater Registers */
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#define HDCP_REP_CTL _MMIO(0x66d00)
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#define HDCP_DDIB_REP_PRESENT BIT(30)
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#define HDCP_DDIA_REP_PRESENT BIT(29)
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#define HDCP_DDIC_REP_PRESENT BIT(28)
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#define HDCP_DDID_REP_PRESENT BIT(27)
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#define HDCP_DDIF_REP_PRESENT BIT(26)
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#define HDCP_DDIE_REP_PRESENT BIT(25)
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#define HDCP_DDIB_SHA1_M0 (1 << 20)
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#define HDCP_DDIA_SHA1_M0 (2 << 20)
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#define HDCP_DDIC_SHA1_M0 (3 << 20)
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#define HDCP_DDID_SHA1_M0 (4 << 20)
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#define HDCP_DDIF_SHA1_M0 (5 << 20)
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#define HDCP_DDIE_SHA1_M0 (6 << 20) /* Bspec says 5? */
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#define HDCP_SHA1_BUSY BIT(16)
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#define HDCP_SHA1_READY BIT(17)
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#define HDCP_SHA1_COMPLETE BIT(18)
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#define HDCP_SHA1_V_MATCH BIT(19)
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#define HDCP_SHA1_TEXT_32 (1 << 1)
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#define HDCP_SHA1_COMPLETE_HASH (2 << 1)
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#define HDCP_SHA1_TEXT_24 (4 << 1)
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#define HDCP_SHA1_TEXT_16 (5 << 1)
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#define HDCP_SHA1_TEXT_8 (6 << 1)
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#define HDCP_SHA1_TEXT_0 (7 << 1)
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#define HDCP_SHA_V_PRIME_H0 _MMIO(0x66d04)
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#define HDCP_SHA_V_PRIME_H1 _MMIO(0x66d08)
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#define HDCP_SHA_V_PRIME_H2 _MMIO(0x66d0C)
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#define HDCP_SHA_V_PRIME_H3 _MMIO(0x66d10)
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#define HDCP_SHA_V_PRIME_H4 _MMIO(0x66d14)
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#define HDCP_SHA_V_PRIME(h) _MMIO((0x66d04 + h * 4))
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#define HDCP_SHA_TEXT _MMIO(0x66d18)
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/* HDCP Auth Registers */
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#define _PORTA_HDCP_AUTHENC 0x66800
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#define _PORTB_HDCP_AUTHENC 0x66500
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#define _PORTC_HDCP_AUTHENC 0x66600
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#define _PORTD_HDCP_AUTHENC 0x66700
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#define _PORTE_HDCP_AUTHENC 0x66A00
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#define _PORTF_HDCP_AUTHENC 0x66900
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#define _PORT_HDCP_AUTHENC(port, x) _MMIO(_PICK(port, \
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_PORTA_HDCP_AUTHENC, \
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_PORTB_HDCP_AUTHENC, \
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_PORTC_HDCP_AUTHENC, \
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_PORTD_HDCP_AUTHENC, \
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_PORTE_HDCP_AUTHENC, \
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_PORTF_HDCP_AUTHENC) + x)
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#define PORT_HDCP_CONF(port) _PORT_HDCP_AUTHENC(port, 0x0)
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#define HDCP_CONF_CAPTURE_AN BIT(0)
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#define HDCP_CONF_AUTH_AND_ENC (BIT(1) | BIT(0))
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#define PORT_HDCP_ANINIT(port) _PORT_HDCP_AUTHENC(port, 0x4)
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#define PORT_HDCP_ANLO(port) _PORT_HDCP_AUTHENC(port, 0x8)
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#define PORT_HDCP_ANHI(port) _PORT_HDCP_AUTHENC(port, 0xC)
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#define PORT_HDCP_BKSVLO(port) _PORT_HDCP_AUTHENC(port, 0x10)
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#define PORT_HDCP_BKSVHI(port) _PORT_HDCP_AUTHENC(port, 0x14)
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#define PORT_HDCP_RPRIME(port) _PORT_HDCP_AUTHENC(port, 0x18)
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#define PORT_HDCP_STATUS(port) _PORT_HDCP_AUTHENC(port, 0x1C)
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#define HDCP_STATUS_STREAM_A_ENC BIT(31)
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#define HDCP_STATUS_STREAM_B_ENC BIT(30)
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#define HDCP_STATUS_STREAM_C_ENC BIT(29)
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#define HDCP_STATUS_STREAM_D_ENC BIT(28)
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#define HDCP_STATUS_AUTH BIT(21)
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#define HDCP_STATUS_ENC BIT(20)
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#define HDCP_STATUS_RI_MATCH BIT(19)
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#define HDCP_STATUS_R0_READY BIT(18)
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#define HDCP_STATUS_AN_READY BIT(17)
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#define HDCP_STATUS_CIPHER BIT(16)
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#define HDCP_STATUS_FRAME_CNT(x) ((x >> 8) & 0xff)
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/* Per-pipe DDI Function Control */
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#define _TRANS_DDI_FUNC_CTL_A 0x60400
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#define _TRANS_DDI_FUNC_CTL_B 0x61400
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@@ -110,6 +110,8 @@ int intel_digital_connector_atomic_check(struct drm_connector *conn,
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to_intel_digital_connector_state(old_state);
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struct drm_crtc_state *crtc_state;
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intel_hdcp_atomic_check(conn, old_state, new_state);
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if (!new_state->crtc)
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return 0;
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@@ -2423,6 +2423,11 @@ static void intel_enable_ddi(struct intel_encoder *encoder,
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intel_enable_ddi_hdmi(encoder, crtc_state, conn_state);
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else
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intel_enable_ddi_dp(encoder, crtc_state, conn_state);
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/* Enable hdcp if it's desired */
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if (conn_state->content_protection ==
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DRM_MODE_CONTENT_PROTECTION_DESIRED)
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intel_hdcp_enable(to_intel_connector(conn_state->connector));
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}
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static void intel_disable_ddi_dp(struct intel_encoder *encoder,
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@@ -2457,6 +2462,8 @@ static void intel_disable_ddi(struct intel_encoder *encoder,
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const struct intel_crtc_state *old_crtc_state,
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const struct drm_connector_state *old_conn_state)
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{
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intel_hdcp_disable(to_intel_connector(old_conn_state->connector));
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if (intel_crtc_has_type(old_crtc_state, INTEL_OUTPUT_HDMI))
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intel_disable_ddi_hdmi(encoder, old_crtc_state, old_conn_state);
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else
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@@ -15217,6 +15217,10 @@ static void intel_hpd_poll_fini(struct drm_device *dev)
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for_each_intel_connector_iter(connector, &conn_iter) {
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if (connector->modeset_retry_work.func)
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cancel_work_sync(&connector->modeset_retry_work);
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if (connector->hdcp_shim) {
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cancel_delayed_work_sync(&connector->hdcp_check_work);
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cancel_work_sync(&connector->hdcp_prop_work);
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}
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}
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drm_connector_list_iter_end(&conn_iter);
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}
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@@ -301,6 +301,76 @@ struct intel_panel {
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} backlight;
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};
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/*
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* This structure serves as a translation layer between the generic HDCP code
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* and the bus-specific code. What that means is that HDCP over HDMI differs
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* from HDCP over DP, so to account for these differences, we need to
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* communicate with the receiver through this shim.
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*
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* For completeness, the 2 buses differ in the following ways:
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* - DP AUX vs. DDC
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* HDCP registers on the receiver are set via DP AUX for DP, and
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* they are set via DDC for HDMI.
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* - Receiver register offsets
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* The offsets of the registers are different for DP vs. HDMI
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* - Receiver register masks/offsets
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* For instance, the ready bit for the KSV fifo is in a different
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* place on DP vs HDMI
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* - Receiver register names
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* Seriously. In the DP spec, the 16-bit register containing
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* downstream information is called BINFO, on HDMI it's called
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* BSTATUS. To confuse matters further, DP has a BSTATUS register
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* with a completely different definition.
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* - KSV FIFO
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* On HDMI, the ksv fifo is read all at once, whereas on DP it must
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* be read 3 keys at a time
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* - Aksv output
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* Since Aksv is hidden in hardware, there's different procedures
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* to send it over DP AUX vs DDC
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*/
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struct intel_hdcp_shim {
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/* Outputs the transmitter's An and Aksv values to the receiver. */
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int (*write_an_aksv)(struct intel_digital_port *intel_dig_port, u8 *an);
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/* Reads the receiver's key selection vector */
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int (*read_bksv)(struct intel_digital_port *intel_dig_port, u8 *bksv);
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/*
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* Reads BINFO from DP receivers and BSTATUS from HDMI receivers. The
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* definitions are the same in the respective specs, but the names are
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* different. Call it BSTATUS since that's the name the HDMI spec
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* uses and it was there first.
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*/
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int (*read_bstatus)(struct intel_digital_port *intel_dig_port,
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u8 *bstatus);
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/* Determines whether a repeater is present downstream */
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int (*repeater_present)(struct intel_digital_port *intel_dig_port,
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bool *repeater_present);
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/* Reads the receiver's Ri' value */
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int (*read_ri_prime)(struct intel_digital_port *intel_dig_port, u8 *ri);
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/* Determines if the receiver's KSV FIFO is ready for consumption */
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int (*read_ksv_ready)(struct intel_digital_port *intel_dig_port,
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bool *ksv_ready);
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/* Reads the ksv fifo for num_downstream devices */
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int (*read_ksv_fifo)(struct intel_digital_port *intel_dig_port,
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int num_downstream, u8 *ksv_fifo);
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/* Reads a 32-bit part of V' from the receiver */
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int (*read_v_prime_part)(struct intel_digital_port *intel_dig_port,
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int i, u32 *part);
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/* Enables HDCP signalling on the port */
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int (*toggle_signalling)(struct intel_digital_port *intel_dig_port,
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bool enable);
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/* Ensures the link is still protected */
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bool (*check_link)(struct intel_digital_port *intel_dig_port);
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};
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struct intel_connector {
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struct drm_connector base;
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/*
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@@ -332,6 +402,12 @@ struct intel_connector {
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/* Work struct to schedule a uevent on link train failure */
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struct work_struct modeset_retry_work;
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const struct intel_hdcp_shim *hdcp_shim;
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struct mutex hdcp_mutex;
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uint64_t hdcp_value; /* protected by hdcp_mutex */
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struct delayed_work hdcp_check_work;
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struct work_struct hdcp_prop_work;
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};
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struct intel_digital_connector_state {
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@@ -1761,6 +1837,15 @@ static inline void intel_backlight_device_unregister(struct intel_connector *con
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}
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#endif /* CONFIG_BACKLIGHT_CLASS_DEVICE */
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/* intel_hdcp.c */
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void intel_hdcp_atomic_check(struct drm_connector *connector,
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struct drm_connector_state *old_state,
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struct drm_connector_state *new_state);
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int intel_hdcp_init(struct intel_connector *connector,
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const struct intel_hdcp_shim *hdcp_shim);
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int intel_hdcp_enable(struct intel_connector *connector);
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int intel_hdcp_disable(struct intel_connector *connector);
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int intel_hdcp_check_link(struct intel_connector *connector);
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/* intel_psr.c */
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void intel_psr_enable(struct intel_dp *intel_dp,
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723
drivers/gpu/drm/i915/intel_hdcp.c
Normal file
723
drivers/gpu/drm/i915/intel_hdcp.c
Normal file
File diff suppressed because it is too large
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