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Merge 5.10.184 into android12-5.10-lts
Changes in 5.10.184
ata: ahci: fix enum constants for gcc-13
gcc-plugins: Reorganize gimple includes for GCC 13
sfc (gcc13): synchronize ef100_enqueue_skb()'s return type
remove the sx8 block driver
bonding (gcc13): synchronize bond_{a,t}lb_xmit() types
f2fs: fix iostat lock protection
blk-iocost: avoid 64-bit division in ioc_timer_fn
block/blk-iocost (gcc13): keep large values in a new enum
i40iw: fix build warning in i40iw_manage_apbvt()
i40e: fix build warnings in i40e_alloc.h
i40e: fix build warning in ice_fltr_add_mac_to_list()
staging: vchiq_core: drop vchiq_status from vchiq_initialise
spi: qup: Request DMA before enabling clocks
afs: Fix setting of mtime when creating a file/dir/symlink
wifi: mt76: mt7615: fix possible race in mt7615_mac_sta_poll
neighbour: fix unaligned access to pneigh_entry
net: dsa: lan9303: allow vid != 0 in port_fdb_{add|del} methods
net/smc: Avoid to access invalid RMBs' MRs in SMCRv1 ADD LINK CONT
net/sched: fq_pie: ensure reasonable TCA_FQ_PIE_QUANTUM values
Bluetooth: Fix l2cap_disconnect_req deadlock
Bluetooth: L2CAP: Add missing checks for invalid DCID
qed/qede: Fix scheduling while atomic
netfilter: conntrack: fix NULL pointer dereference in nf_confirm_cthelper
netfilter: ipset: Add schedule point in call_ad().
ipv6: rpl: Fix Route of Death.
rfs: annotate lockless accesses to sk->sk_rxhash
rfs: annotate lockless accesses to RFS sock flow table
net: sched: move rtm_tca_policy declaration to include file
net: sched: fix possible refcount leak in tc_chain_tmplt_add()
bpf: Add extra path pointer check to d_path helper
lib: cpu_rmap: Fix potential use-after-free in irq_cpu_rmap_release()
bnxt_en: Don't issue AP reset during ethtool's reset operation
bnxt_en: Query default VLAN before VNIC setup on a VF
bnxt_en: Implement .set_port / .unset_port UDP tunnel callbacks
batman-adv: Broken sync while rescheduling delayed work
Input: xpad - delete a Razer DeathAdder mouse VID/PID entry
Input: psmouse - fix OOB access in Elantech protocol
ALSA: hda/realtek: Add a quirk for HP Slim Desktop S01
ALSA: hda/realtek: Add Lenovo P3 Tower platform
drm/amdgpu: fix xclk freq on CHIP_STONEY
can: j1939: j1939_sk_send_loop_abort(): improved error queue handling in J1939 Socket
can: j1939: change j1939_netdev_lock type to mutex
can: j1939: avoid possible use-after-free when j1939_can_rx_register fails
ceph: fix use-after-free bug for inodes when flushing capsnaps
s390/dasd: Use correct lock while counting channel queue length
Bluetooth: Fix use-after-free in hci_remove_ltk/hci_remove_irk
Bluetooth: hci_qca: fix debugfs registration
tee: amdtee: Add return_origin to 'struct tee_cmd_load_ta'
rbd: move RBD_OBJ_FLAG_COPYUP_ENABLED flag setting
rbd: get snapshot context after exclusive lock is ensured to be held
pinctrl: meson-axg: add missing GPIOA_18 gpio group
usb: usbfs: Enforce page requirements for mmap
usb: usbfs: Use consistent mmap functions
staging: vc04_services: fix gcc-13 build warning
ASoC: codecs: wsa881x: do not set can_multi_write flag
i2c: sprd: Delete i2c adapter in .remove's error path
eeprom: at24: also select REGMAP
riscv: fix kprobe __user string arg print fault issue
vhost: support PACKED when setting-getting vring_base
Revert "ext4: don't clear SB_RDONLY when remounting r/w until quota is re-enabled"
ext4: only check dquot_initialize_needed() when debugging
tcp: fix tcp_min_tso_segs sysctl
xfs: verify buffer contents when we skip log replay
MIPS: locking/atomic: Fix atomic{_64,}_sub_if_positive
drm/atomic: Don't pollute crtc_state->mode_blob with error pointers
btrfs: check return value of btrfs_commit_transaction in relocation
btrfs: unset reloc control if transaction commit fails in prepare_to_relocate()
Revert "staging: rtl8192e: Replace macro RTL_PCI_DEVICE with PCI_DEVICE"
Linux 5.10.184
Change-Id: If2d013f1bba8d713f8935810a5887f80eabae81c
Signed-off-by: Greg Kroah-Hartman <gregkh@google.com>
This commit is contained in:
Greg Kroah-Hartman
2
Makefile
2
Makefile
@@ -1,7 +1,7 @@
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||||
# SPDX-License-Identifier: GPL-2.0
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VERSION = 5
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PATCHLEVEL = 10
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SUBLEVEL = 183
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SUBLEVEL = 184
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EXTRAVERSION =
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NAME = Dare mighty things
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||||
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@@ -203,7 +203,7 @@ ATOMIC_OPS(atomic64, xor, s64, ^=, xor, lld, scd)
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* The function returns the old value of @v minus @i.
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*/
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#define ATOMIC_SIP_OP(pfx, type, op, ll, sc) \
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static __inline__ int pfx##_sub_if_positive(type i, pfx##_t * v) \
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static __inline__ type pfx##_sub_if_positive(type i, pfx##_t * v) \
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{ \
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type temp, result; \
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\
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@@ -22,6 +22,7 @@ config RISCV
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select ARCH_HAS_GIGANTIC_PAGE
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select ARCH_HAS_KCOV
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select ARCH_HAS_MMIOWB
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select ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE
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select ARCH_HAS_PTE_SPECIAL
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select ARCH_HAS_SET_DIRECT_MAP
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select ARCH_HAS_SET_MEMORY
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@@ -232,7 +232,9 @@ enum {
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/* 1/64k is granular enough and can easily be handled w/ u32 */
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WEIGHT_ONE = 1 << 16,
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};
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enum {
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/*
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* As vtime is used to calculate the cost of each IO, it needs to
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* be fairly high precision. For example, it should be able to
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@@ -256,6 +258,11 @@ enum {
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VRATE_MIN = VTIME_PER_USEC * VRATE_MIN_PPM / MILLION,
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VRATE_CLAMP_ADJ_PCT = 4,
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/* switch iff the conditions are met for longer than this */
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AUTOP_CYCLE_NSEC = 10LLU * NSEC_PER_SEC,
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};
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enum {
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/* if IOs end up waiting for requests, issue less */
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RQ_WAIT_BUSY_PCT = 5,
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@@ -294,9 +301,6 @@ enum {
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/* don't let cmds which take a very long time pin lagging for too long */
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MAX_LAGGING_PERIODS = 10,
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/* switch iff the conditions are met for longer than this */
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AUTOP_CYCLE_NSEC = 10LLU * NSEC_PER_SEC,
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/*
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* Count IO size in 4k pages. The 12bit shift helps keeping
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* size-proportional components of cost calculation in closer
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@@ -24,6 +24,7 @@
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#include <linux/libata.h>
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#include <linux/phy/phy.h>
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#include <linux/regulator/consumer.h>
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#include <linux/bits.h>
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/* Enclosure Management Control */
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#define EM_CTRL_MSG_TYPE 0x000f0000
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@@ -54,12 +55,12 @@ enum {
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AHCI_PORT_PRIV_FBS_DMA_SZ = AHCI_CMD_SLOT_SZ +
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AHCI_CMD_TBL_AR_SZ +
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(AHCI_RX_FIS_SZ * 16),
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AHCI_IRQ_ON_SG = (1 << 31),
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AHCI_CMD_ATAPI = (1 << 5),
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AHCI_CMD_WRITE = (1 << 6),
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AHCI_CMD_PREFETCH = (1 << 7),
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AHCI_CMD_RESET = (1 << 8),
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AHCI_CMD_CLR_BUSY = (1 << 10),
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AHCI_IRQ_ON_SG = BIT(31),
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AHCI_CMD_ATAPI = BIT(5),
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AHCI_CMD_WRITE = BIT(6),
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AHCI_CMD_PREFETCH = BIT(7),
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AHCI_CMD_RESET = BIT(8),
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AHCI_CMD_CLR_BUSY = BIT(10),
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RX_FIS_PIO_SETUP = 0x20, /* offset of PIO Setup FIS data */
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RX_FIS_D2H_REG = 0x40, /* offset of D2H Register FIS data */
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@@ -77,37 +78,37 @@ enum {
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HOST_CAP2 = 0x24, /* host capabilities, extended */
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/* HOST_CTL bits */
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HOST_RESET = (1 << 0), /* reset controller; self-clear */
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HOST_IRQ_EN = (1 << 1), /* global IRQ enable */
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HOST_MRSM = (1 << 2), /* MSI Revert to Single Message */
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HOST_AHCI_EN = (1 << 31), /* AHCI enabled */
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HOST_RESET = BIT(0), /* reset controller; self-clear */
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HOST_IRQ_EN = BIT(1), /* global IRQ enable */
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HOST_MRSM = BIT(2), /* MSI Revert to Single Message */
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HOST_AHCI_EN = BIT(31), /* AHCI enabled */
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/* HOST_CAP bits */
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HOST_CAP_SXS = (1 << 5), /* Supports External SATA */
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HOST_CAP_EMS = (1 << 6), /* Enclosure Management support */
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HOST_CAP_CCC = (1 << 7), /* Command Completion Coalescing */
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HOST_CAP_PART = (1 << 13), /* Partial state capable */
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HOST_CAP_SSC = (1 << 14), /* Slumber state capable */
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HOST_CAP_PIO_MULTI = (1 << 15), /* PIO multiple DRQ support */
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HOST_CAP_FBS = (1 << 16), /* FIS-based switching support */
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HOST_CAP_PMP = (1 << 17), /* Port Multiplier support */
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HOST_CAP_ONLY = (1 << 18), /* Supports AHCI mode only */
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HOST_CAP_CLO = (1 << 24), /* Command List Override support */
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HOST_CAP_LED = (1 << 25), /* Supports activity LED */
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HOST_CAP_ALPM = (1 << 26), /* Aggressive Link PM support */
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HOST_CAP_SSS = (1 << 27), /* Staggered Spin-up */
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HOST_CAP_MPS = (1 << 28), /* Mechanical presence switch */
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HOST_CAP_SNTF = (1 << 29), /* SNotification register */
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HOST_CAP_NCQ = (1 << 30), /* Native Command Queueing */
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HOST_CAP_64 = (1 << 31), /* PCI DAC (64-bit DMA) support */
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HOST_CAP_SXS = BIT(5), /* Supports External SATA */
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HOST_CAP_EMS = BIT(6), /* Enclosure Management support */
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HOST_CAP_CCC = BIT(7), /* Command Completion Coalescing */
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HOST_CAP_PART = BIT(13), /* Partial state capable */
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HOST_CAP_SSC = BIT(14), /* Slumber state capable */
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HOST_CAP_PIO_MULTI = BIT(15), /* PIO multiple DRQ support */
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HOST_CAP_FBS = BIT(16), /* FIS-based switching support */
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HOST_CAP_PMP = BIT(17), /* Port Multiplier support */
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HOST_CAP_ONLY = BIT(18), /* Supports AHCI mode only */
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HOST_CAP_CLO = BIT(24), /* Command List Override support */
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HOST_CAP_LED = BIT(25), /* Supports activity LED */
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HOST_CAP_ALPM = BIT(26), /* Aggressive Link PM support */
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HOST_CAP_SSS = BIT(27), /* Staggered Spin-up */
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HOST_CAP_MPS = BIT(28), /* Mechanical presence switch */
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HOST_CAP_SNTF = BIT(29), /* SNotification register */
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HOST_CAP_NCQ = BIT(30), /* Native Command Queueing */
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HOST_CAP_64 = BIT(31), /* PCI DAC (64-bit DMA) support */
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/* HOST_CAP2 bits */
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HOST_CAP2_BOH = (1 << 0), /* BIOS/OS handoff supported */
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HOST_CAP2_NVMHCI = (1 << 1), /* NVMHCI supported */
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HOST_CAP2_APST = (1 << 2), /* Automatic partial to slumber */
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HOST_CAP2_SDS = (1 << 3), /* Support device sleep */
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HOST_CAP2_SADM = (1 << 4), /* Support aggressive DevSlp */
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HOST_CAP2_DESO = (1 << 5), /* DevSlp from slumber only */
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HOST_CAP2_BOH = BIT(0), /* BIOS/OS handoff supported */
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HOST_CAP2_NVMHCI = BIT(1), /* NVMHCI supported */
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HOST_CAP2_APST = BIT(2), /* Automatic partial to slumber */
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HOST_CAP2_SDS = BIT(3), /* Support device sleep */
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HOST_CAP2_SADM = BIT(4), /* Support aggressive DevSlp */
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HOST_CAP2_DESO = BIT(5), /* DevSlp from slumber only */
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/* registers for each SATA port */
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PORT_LST_ADDR = 0x00, /* command list DMA addr */
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@@ -129,24 +130,24 @@ enum {
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PORT_DEVSLP = 0x44, /* device sleep */
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/* PORT_IRQ_{STAT,MASK} bits */
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PORT_IRQ_COLD_PRES = (1 << 31), /* cold presence detect */
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PORT_IRQ_TF_ERR = (1 << 30), /* task file error */
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PORT_IRQ_HBUS_ERR = (1 << 29), /* host bus fatal error */
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PORT_IRQ_HBUS_DATA_ERR = (1 << 28), /* host bus data error */
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PORT_IRQ_IF_ERR = (1 << 27), /* interface fatal error */
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PORT_IRQ_IF_NONFATAL = (1 << 26), /* interface non-fatal error */
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PORT_IRQ_OVERFLOW = (1 << 24), /* xfer exhausted available S/G */
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PORT_IRQ_BAD_PMP = (1 << 23), /* incorrect port multiplier */
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PORT_IRQ_COLD_PRES = BIT(31), /* cold presence detect */
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PORT_IRQ_TF_ERR = BIT(30), /* task file error */
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PORT_IRQ_HBUS_ERR = BIT(29), /* host bus fatal error */
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PORT_IRQ_HBUS_DATA_ERR = BIT(28), /* host bus data error */
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PORT_IRQ_IF_ERR = BIT(27), /* interface fatal error */
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PORT_IRQ_IF_NONFATAL = BIT(26), /* interface non-fatal error */
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PORT_IRQ_OVERFLOW = BIT(24), /* xfer exhausted available S/G */
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PORT_IRQ_BAD_PMP = BIT(23), /* incorrect port multiplier */
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PORT_IRQ_PHYRDY = (1 << 22), /* PhyRdy changed */
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PORT_IRQ_DEV_ILCK = (1 << 7), /* device interlock */
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PORT_IRQ_CONNECT = (1 << 6), /* port connect change status */
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PORT_IRQ_SG_DONE = (1 << 5), /* descriptor processed */
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PORT_IRQ_UNK_FIS = (1 << 4), /* unknown FIS rx'd */
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PORT_IRQ_SDB_FIS = (1 << 3), /* Set Device Bits FIS rx'd */
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PORT_IRQ_DMAS_FIS = (1 << 2), /* DMA Setup FIS rx'd */
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PORT_IRQ_PIOS_FIS = (1 << 1), /* PIO Setup FIS rx'd */
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PORT_IRQ_D2H_REG_FIS = (1 << 0), /* D2H Register FIS rx'd */
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PORT_IRQ_PHYRDY = BIT(22), /* PhyRdy changed */
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PORT_IRQ_DEV_ILCK = BIT(7), /* device interlock */
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PORT_IRQ_CONNECT = BIT(6), /* port connect change status */
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PORT_IRQ_SG_DONE = BIT(5), /* descriptor processed */
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PORT_IRQ_UNK_FIS = BIT(4), /* unknown FIS rx'd */
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PORT_IRQ_SDB_FIS = BIT(3), /* Set Device Bits FIS rx'd */
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PORT_IRQ_DMAS_FIS = BIT(2), /* DMA Setup FIS rx'd */
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PORT_IRQ_PIOS_FIS = BIT(1), /* PIO Setup FIS rx'd */
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PORT_IRQ_D2H_REG_FIS = BIT(0), /* D2H Register FIS rx'd */
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PORT_IRQ_FREEZE = PORT_IRQ_HBUS_ERR |
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PORT_IRQ_IF_ERR |
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@@ -162,34 +163,34 @@ enum {
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PORT_IRQ_PIOS_FIS | PORT_IRQ_D2H_REG_FIS,
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/* PORT_CMD bits */
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PORT_CMD_ASP = (1 << 27), /* Aggressive Slumber/Partial */
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PORT_CMD_ALPE = (1 << 26), /* Aggressive Link PM enable */
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PORT_CMD_ATAPI = (1 << 24), /* Device is ATAPI */
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PORT_CMD_FBSCP = (1 << 22), /* FBS Capable Port */
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PORT_CMD_ESP = (1 << 21), /* External Sata Port */
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PORT_CMD_HPCP = (1 << 18), /* HotPlug Capable Port */
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PORT_CMD_PMP = (1 << 17), /* PMP attached */
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PORT_CMD_LIST_ON = (1 << 15), /* cmd list DMA engine running */
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PORT_CMD_FIS_ON = (1 << 14), /* FIS DMA engine running */
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PORT_CMD_FIS_RX = (1 << 4), /* Enable FIS receive DMA engine */
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PORT_CMD_CLO = (1 << 3), /* Command list override */
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PORT_CMD_POWER_ON = (1 << 2), /* Power up device */
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PORT_CMD_SPIN_UP = (1 << 1), /* Spin up device */
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PORT_CMD_START = (1 << 0), /* Enable port DMA engine */
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PORT_CMD_ASP = BIT(27), /* Aggressive Slumber/Partial */
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PORT_CMD_ALPE = BIT(26), /* Aggressive Link PM enable */
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PORT_CMD_ATAPI = BIT(24), /* Device is ATAPI */
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PORT_CMD_FBSCP = BIT(22), /* FBS Capable Port */
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PORT_CMD_ESP = BIT(21), /* External Sata Port */
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PORT_CMD_HPCP = BIT(18), /* HotPlug Capable Port */
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PORT_CMD_PMP = BIT(17), /* PMP attached */
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PORT_CMD_LIST_ON = BIT(15), /* cmd list DMA engine running */
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PORT_CMD_FIS_ON = BIT(14), /* FIS DMA engine running */
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PORT_CMD_FIS_RX = BIT(4), /* Enable FIS receive DMA engine */
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PORT_CMD_CLO = BIT(3), /* Command list override */
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PORT_CMD_POWER_ON = BIT(2), /* Power up device */
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PORT_CMD_SPIN_UP = BIT(1), /* Spin up device */
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PORT_CMD_START = BIT(0), /* Enable port DMA engine */
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PORT_CMD_ICC_MASK = (0xf << 28), /* i/f ICC state mask */
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PORT_CMD_ICC_ACTIVE = (0x1 << 28), /* Put i/f in active state */
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PORT_CMD_ICC_PARTIAL = (0x2 << 28), /* Put i/f in partial state */
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PORT_CMD_ICC_SLUMBER = (0x6 << 28), /* Put i/f in slumber state */
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PORT_CMD_ICC_MASK = (0xfu << 28), /* i/f ICC state mask */
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PORT_CMD_ICC_ACTIVE = (0x1u << 28), /* Put i/f in active state */
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PORT_CMD_ICC_PARTIAL = (0x2u << 28), /* Put i/f in partial state */
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PORT_CMD_ICC_SLUMBER = (0x6u << 28), /* Put i/f in slumber state */
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/* PORT_FBS bits */
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PORT_FBS_DWE_OFFSET = 16, /* FBS device with error offset */
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PORT_FBS_ADO_OFFSET = 12, /* FBS active dev optimization offset */
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PORT_FBS_DEV_OFFSET = 8, /* FBS device to issue offset */
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PORT_FBS_DEV_MASK = (0xf << PORT_FBS_DEV_OFFSET), /* FBS.DEV */
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PORT_FBS_SDE = (1 << 2), /* FBS single device error */
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PORT_FBS_DEC = (1 << 1), /* FBS device error clear */
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PORT_FBS_EN = (1 << 0), /* Enable FBS */
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PORT_FBS_SDE = BIT(2), /* FBS single device error */
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PORT_FBS_DEC = BIT(1), /* FBS device error clear */
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PORT_FBS_EN = BIT(0), /* Enable FBS */
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/* PORT_DEVSLP bits */
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PORT_DEVSLP_DM_OFFSET = 25, /* DITO multiplier offset */
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@@ -197,52 +198,52 @@ enum {
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PORT_DEVSLP_DITO_OFFSET = 15, /* DITO offset */
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PORT_DEVSLP_MDAT_OFFSET = 10, /* Minimum assertion time */
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PORT_DEVSLP_DETO_OFFSET = 2, /* DevSlp exit timeout */
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PORT_DEVSLP_DSP = (1 << 1), /* DevSlp present */
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PORT_DEVSLP_ADSE = (1 << 0), /* Aggressive DevSlp enable */
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PORT_DEVSLP_DSP = BIT(1), /* DevSlp present */
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PORT_DEVSLP_ADSE = BIT(0), /* Aggressive DevSlp enable */
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/* hpriv->flags bits */
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#define AHCI_HFLAGS(flags) .private_data = (void *)(flags)
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AHCI_HFLAG_NO_NCQ = (1 << 0),
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AHCI_HFLAG_IGN_IRQ_IF_ERR = (1 << 1), /* ignore IRQ_IF_ERR */
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AHCI_HFLAG_IGN_SERR_INTERNAL = (1 << 2), /* ignore SERR_INTERNAL */
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AHCI_HFLAG_32BIT_ONLY = (1 << 3), /* force 32bit */
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AHCI_HFLAG_MV_PATA = (1 << 4), /* PATA port */
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AHCI_HFLAG_NO_MSI = (1 << 5), /* no PCI MSI */
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AHCI_HFLAG_NO_PMP = (1 << 6), /* no PMP */
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AHCI_HFLAG_SECT255 = (1 << 8), /* max 255 sectors */
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AHCI_HFLAG_YES_NCQ = (1 << 9), /* force NCQ cap on */
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AHCI_HFLAG_NO_SUSPEND = (1 << 10), /* don't suspend */
|
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AHCI_HFLAG_SRST_TOUT_IS_OFFLINE = (1 << 11), /* treat SRST timeout as
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link offline */
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AHCI_HFLAG_NO_SNTF = (1 << 12), /* no sntf */
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AHCI_HFLAG_NO_FPDMA_AA = (1 << 13), /* no FPDMA AA */
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AHCI_HFLAG_YES_FBS = (1 << 14), /* force FBS cap on */
|
||||
AHCI_HFLAG_DELAY_ENGINE = (1 << 15), /* do not start engine on
|
||||
port start (wait until
|
||||
error-handling stage) */
|
||||
AHCI_HFLAG_NO_DEVSLP = (1 << 17), /* no device sleep */
|
||||
AHCI_HFLAG_NO_FBS = (1 << 18), /* no FBS */
|
||||
AHCI_HFLAG_NO_NCQ = BIT(0),
|
||||
AHCI_HFLAG_IGN_IRQ_IF_ERR = BIT(1), /* ignore IRQ_IF_ERR */
|
||||
AHCI_HFLAG_IGN_SERR_INTERNAL = BIT(2), /* ignore SERR_INTERNAL */
|
||||
AHCI_HFLAG_32BIT_ONLY = BIT(3), /* force 32bit */
|
||||
AHCI_HFLAG_MV_PATA = BIT(4), /* PATA port */
|
||||
AHCI_HFLAG_NO_MSI = BIT(5), /* no PCI MSI */
|
||||
AHCI_HFLAG_NO_PMP = BIT(6), /* no PMP */
|
||||
AHCI_HFLAG_SECT255 = BIT(8), /* max 255 sectors */
|
||||
AHCI_HFLAG_YES_NCQ = BIT(9), /* force NCQ cap on */
|
||||
AHCI_HFLAG_NO_SUSPEND = BIT(10), /* don't suspend */
|
||||
AHCI_HFLAG_SRST_TOUT_IS_OFFLINE = BIT(11), /* treat SRST timeout as
|
||||
link offline */
|
||||
AHCI_HFLAG_NO_SNTF = BIT(12), /* no sntf */
|
||||
AHCI_HFLAG_NO_FPDMA_AA = BIT(13), /* no FPDMA AA */
|
||||
AHCI_HFLAG_YES_FBS = BIT(14), /* force FBS cap on */
|
||||
AHCI_HFLAG_DELAY_ENGINE = BIT(15), /* do not start engine on
|
||||
port start (wait until
|
||||
error-handling stage) */
|
||||
AHCI_HFLAG_NO_DEVSLP = BIT(17), /* no device sleep */
|
||||
AHCI_HFLAG_NO_FBS = BIT(18), /* no FBS */
|
||||
|
||||
#ifdef CONFIG_PCI_MSI
|
||||
AHCI_HFLAG_MULTI_MSI = (1 << 20), /* per-port MSI(-X) */
|
||||
AHCI_HFLAG_MULTI_MSI = BIT(20), /* per-port MSI(-X) */
|
||||
#else
|
||||
/* compile out MSI infrastructure */
|
||||
AHCI_HFLAG_MULTI_MSI = 0,
|
||||
#endif
|
||||
AHCI_HFLAG_WAKE_BEFORE_STOP = (1 << 22), /* wake before DMA stop */
|
||||
AHCI_HFLAG_YES_ALPM = (1 << 23), /* force ALPM cap on */
|
||||
AHCI_HFLAG_NO_WRITE_TO_RO = (1 << 24), /* don't write to read
|
||||
only registers */
|
||||
AHCI_HFLAG_IS_MOBILE = (1 << 25), /* mobile chipset, use
|
||||
SATA_MOBILE_LPM_POLICY
|
||||
as default lpm_policy */
|
||||
AHCI_HFLAG_SUSPEND_PHYS = (1 << 26), /* handle PHYs during
|
||||
suspend/resume */
|
||||
AHCI_HFLAG_IGN_NOTSUPP_POWER_ON = (1 << 27), /* ignore -EOPNOTSUPP
|
||||
from phy_power_on() */
|
||||
AHCI_HFLAG_NO_SXS = (1 << 28), /* SXS not supported */
|
||||
AHCI_HFLAG_WAKE_BEFORE_STOP = BIT(22), /* wake before DMA stop */
|
||||
AHCI_HFLAG_YES_ALPM = BIT(23), /* force ALPM cap on */
|
||||
AHCI_HFLAG_NO_WRITE_TO_RO = BIT(24), /* don't write to read
|
||||
only registers */
|
||||
AHCI_HFLAG_IS_MOBILE = BIT(25), /* mobile chipset, use
|
||||
SATA_MOBILE_LPM_POLICY
|
||||
as default lpm_policy */
|
||||
AHCI_HFLAG_SUSPEND_PHYS = BIT(26), /* handle PHYs during
|
||||
suspend/resume */
|
||||
AHCI_HFLAG_IGN_NOTSUPP_POWER_ON = BIT(27), /* ignore -EOPNOTSUPP
|
||||
from phy_power_on() */
|
||||
AHCI_HFLAG_NO_SXS = BIT(28), /* SXS not supported */
|
||||
|
||||
/* ap->flags bits */
|
||||
|
||||
@@ -258,22 +259,22 @@ enum {
|
||||
EM_MAX_RETRY = 5,
|
||||
|
||||
/* em_ctl bits */
|
||||
EM_CTL_RST = (1 << 9), /* Reset */
|
||||
EM_CTL_TM = (1 << 8), /* Transmit Message */
|
||||
EM_CTL_MR = (1 << 0), /* Message Received */
|
||||
EM_CTL_ALHD = (1 << 26), /* Activity LED */
|
||||
EM_CTL_XMT = (1 << 25), /* Transmit Only */
|
||||
EM_CTL_SMB = (1 << 24), /* Single Message Buffer */
|
||||
EM_CTL_SGPIO = (1 << 19), /* SGPIO messages supported */
|
||||
EM_CTL_SES = (1 << 18), /* SES-2 messages supported */
|
||||
EM_CTL_SAFTE = (1 << 17), /* SAF-TE messages supported */
|
||||
EM_CTL_LED = (1 << 16), /* LED messages supported */
|
||||
EM_CTL_RST = BIT(9), /* Reset */
|
||||
EM_CTL_TM = BIT(8), /* Transmit Message */
|
||||
EM_CTL_MR = BIT(0), /* Message Received */
|
||||
EM_CTL_ALHD = BIT(26), /* Activity LED */
|
||||
EM_CTL_XMT = BIT(25), /* Transmit Only */
|
||||
EM_CTL_SMB = BIT(24), /* Single Message Buffer */
|
||||
EM_CTL_SGPIO = BIT(19), /* SGPIO messages supported */
|
||||
EM_CTL_SES = BIT(18), /* SES-2 messages supported */
|
||||
EM_CTL_SAFTE = BIT(17), /* SAF-TE messages supported */
|
||||
EM_CTL_LED = BIT(16), /* LED messages supported */
|
||||
|
||||
/* em message type */
|
||||
EM_MSG_TYPE_LED = (1 << 0), /* LED */
|
||||
EM_MSG_TYPE_SAFTE = (1 << 1), /* SAF-TE */
|
||||
EM_MSG_TYPE_SES2 = (1 << 2), /* SES-2 */
|
||||
EM_MSG_TYPE_SGPIO = (1 << 3), /* SGPIO */
|
||||
EM_MSG_TYPE_LED = BIT(0), /* LED */
|
||||
EM_MSG_TYPE_SAFTE = BIT(1), /* SAF-TE */
|
||||
EM_MSG_TYPE_SES2 = BIT(2), /* SES-2 */
|
||||
EM_MSG_TYPE_SGPIO = BIT(3), /* SGPIO */
|
||||
};
|
||||
|
||||
struct ahci_cmd_hdr {
|
||||
|
||||
@@ -293,15 +293,6 @@ config BLK_DEV_SKD
|
||||
|
||||
Use device /dev/skd$N amd /dev/skd$Np$M.
|
||||
|
||||
config BLK_DEV_SX8
|
||||
tristate "Promise SATA SX8 support"
|
||||
depends on PCI
|
||||
help
|
||||
Saying Y or M here will enable support for the
|
||||
Promise SATA SX8 controllers.
|
||||
|
||||
Use devices /dev/sx8/$N and /dev/sx8/$Np$M.
|
||||
|
||||
config BLK_DEV_RAM
|
||||
tristate "RAM block device support"
|
||||
help
|
||||
|
||||
@@ -29,8 +29,6 @@ obj-$(CONFIG_BLK_DEV_NBD) += nbd.o
|
||||
obj-$(CONFIG_BLK_DEV_CRYPTOLOOP) += cryptoloop.o
|
||||
obj-$(CONFIG_VIRTIO_BLK) += virtio_blk.o
|
||||
|
||||
obj-$(CONFIG_BLK_DEV_SX8) += sx8.o
|
||||
|
||||
obj-$(CONFIG_XEN_BLKDEV_FRONTEND) += xen-blkfront.o
|
||||
obj-$(CONFIG_XEN_BLKDEV_BACKEND) += xen-blkback/
|
||||
obj-$(CONFIG_BLK_DEV_DRBD) += drbd/
|
||||
|
||||
@@ -1397,14 +1397,30 @@ static bool rbd_obj_is_tail(struct rbd_obj_request *obj_req)
|
||||
/*
|
||||
* Must be called after rbd_obj_calc_img_extents().
|
||||
*/
|
||||
static bool rbd_obj_copyup_enabled(struct rbd_obj_request *obj_req)
|
||||
static void rbd_obj_set_copyup_enabled(struct rbd_obj_request *obj_req)
|
||||
{
|
||||
if (!obj_req->num_img_extents ||
|
||||
(rbd_obj_is_entire(obj_req) &&
|
||||
!obj_req->img_request->snapc->num_snaps))
|
||||
return false;
|
||||
rbd_assert(obj_req->img_request->snapc);
|
||||
|
||||
return true;
|
||||
if (obj_req->img_request->op_type == OBJ_OP_DISCARD) {
|
||||
dout("%s %p objno %llu discard\n", __func__, obj_req,
|
||||
obj_req->ex.oe_objno);
|
||||
return;
|
||||
}
|
||||
|
||||
if (!obj_req->num_img_extents) {
|
||||
dout("%s %p objno %llu not overlapping\n", __func__, obj_req,
|
||||
obj_req->ex.oe_objno);
|
||||
return;
|
||||
}
|
||||
|
||||
if (rbd_obj_is_entire(obj_req) &&
|
||||
!obj_req->img_request->snapc->num_snaps) {
|
||||
dout("%s %p objno %llu entire\n", __func__, obj_req,
|
||||
obj_req->ex.oe_objno);
|
||||
return;
|
||||
}
|
||||
|
||||
obj_req->flags |= RBD_OBJ_FLAG_COPYUP_ENABLED;
|
||||
}
|
||||
|
||||
static u64 rbd_obj_img_extents_bytes(struct rbd_obj_request *obj_req)
|
||||
@@ -1505,6 +1521,7 @@ __rbd_obj_add_osd_request(struct rbd_obj_request *obj_req,
|
||||
static struct ceph_osd_request *
|
||||
rbd_obj_add_osd_request(struct rbd_obj_request *obj_req, int num_ops)
|
||||
{
|
||||
rbd_assert(obj_req->img_request->snapc);
|
||||
return __rbd_obj_add_osd_request(obj_req, obj_req->img_request->snapc,
|
||||
num_ops);
|
||||
}
|
||||
@@ -1641,15 +1658,18 @@ static void rbd_img_request_init(struct rbd_img_request *img_request,
|
||||
mutex_init(&img_request->state_mutex);
|
||||
}
|
||||
|
||||
/*
|
||||
* Only snap_id is captured here, for reads. For writes, snapshot
|
||||
* context is captured in rbd_img_object_requests() after exclusive
|
||||
* lock is ensured to be held.
|
||||
*/
|
||||
static void rbd_img_capture_header(struct rbd_img_request *img_req)
|
||||
{
|
||||
struct rbd_device *rbd_dev = img_req->rbd_dev;
|
||||
|
||||
lockdep_assert_held(&rbd_dev->header_rwsem);
|
||||
|
||||
if (rbd_img_is_write(img_req))
|
||||
img_req->snapc = ceph_get_snap_context(rbd_dev->header.snapc);
|
||||
else
|
||||
if (!rbd_img_is_write(img_req))
|
||||
img_req->snap_id = rbd_dev->spec->snap_id;
|
||||
|
||||
if (rbd_dev_parent_get(rbd_dev))
|
||||
@@ -2296,9 +2316,6 @@ static int rbd_obj_init_write(struct rbd_obj_request *obj_req)
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
if (rbd_obj_copyup_enabled(obj_req))
|
||||
obj_req->flags |= RBD_OBJ_FLAG_COPYUP_ENABLED;
|
||||
|
||||
obj_req->write_state = RBD_OBJ_WRITE_START;
|
||||
return 0;
|
||||
}
|
||||
@@ -2404,8 +2421,6 @@ static int rbd_obj_init_zeroout(struct rbd_obj_request *obj_req)
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
if (rbd_obj_copyup_enabled(obj_req))
|
||||
obj_req->flags |= RBD_OBJ_FLAG_COPYUP_ENABLED;
|
||||
if (!obj_req->num_img_extents) {
|
||||
obj_req->flags |= RBD_OBJ_FLAG_NOOP_FOR_NONEXISTENT;
|
||||
if (rbd_obj_is_entire(obj_req))
|
||||
@@ -3351,6 +3366,7 @@ again:
|
||||
case RBD_OBJ_WRITE_START:
|
||||
rbd_assert(!*result);
|
||||
|
||||
rbd_obj_set_copyup_enabled(obj_req);
|
||||
if (rbd_obj_write_is_noop(obj_req))
|
||||
return true;
|
||||
|
||||
@@ -3537,9 +3553,19 @@ static int rbd_img_exclusive_lock(struct rbd_img_request *img_req)
|
||||
|
||||
static void rbd_img_object_requests(struct rbd_img_request *img_req)
|
||||
{
|
||||
struct rbd_device *rbd_dev = img_req->rbd_dev;
|
||||
struct rbd_obj_request *obj_req;
|
||||
|
||||
rbd_assert(!img_req->pending.result && !img_req->pending.num_pending);
|
||||
rbd_assert(!need_exclusive_lock(img_req) ||
|
||||
__rbd_is_lock_owner(rbd_dev));
|
||||
|
||||
if (rbd_img_is_write(img_req)) {
|
||||
rbd_assert(!img_req->snapc);
|
||||
down_read(&rbd_dev->header_rwsem);
|
||||
img_req->snapc = ceph_get_snap_context(rbd_dev->header.snapc);
|
||||
up_read(&rbd_dev->header_rwsem);
|
||||
}
|
||||
|
||||
for_each_obj_request(img_req, obj_req) {
|
||||
int result = 0;
|
||||
@@ -3557,7 +3583,6 @@ static void rbd_img_object_requests(struct rbd_img_request *img_req)
|
||||
|
||||
static bool rbd_img_advance(struct rbd_img_request *img_req, int *result)
|
||||
{
|
||||
struct rbd_device *rbd_dev = img_req->rbd_dev;
|
||||
int ret;
|
||||
|
||||
again:
|
||||
@@ -3578,9 +3603,6 @@ again:
|
||||
if (*result)
|
||||
return true;
|
||||
|
||||
rbd_assert(!need_exclusive_lock(img_req) ||
|
||||
__rbd_is_lock_owner(rbd_dev));
|
||||
|
||||
rbd_img_object_requests(img_req);
|
||||
if (!img_req->pending.num_pending) {
|
||||
*result = img_req->pending.result;
|
||||
@@ -4038,6 +4060,10 @@ static int rbd_post_acquire_action(struct rbd_device *rbd_dev)
|
||||
{
|
||||
int ret;
|
||||
|
||||
ret = rbd_dev_refresh(rbd_dev);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
if (rbd_dev->header.features & RBD_FEATURE_OBJECT_MAP) {
|
||||
ret = rbd_object_map_open(rbd_dev);
|
||||
if (ret)
|
||||
|
||||
1586
drivers/block/sx8.c
1586
drivers/block/sx8.c
File diff suppressed because it is too large
Load Diff
@@ -78,7 +78,8 @@ enum qca_flags {
|
||||
QCA_HW_ERROR_EVENT,
|
||||
QCA_SSR_TRIGGERED,
|
||||
QCA_BT_OFF,
|
||||
QCA_ROM_FW
|
||||
QCA_ROM_FW,
|
||||
QCA_DEBUGFS_CREATED,
|
||||
};
|
||||
|
||||
enum qca_capabilities {
|
||||
@@ -633,6 +634,9 @@ static void qca_debugfs_init(struct hci_dev *hdev)
|
||||
if (!hdev->debugfs)
|
||||
return;
|
||||
|
||||
if (test_and_set_bit(QCA_DEBUGFS_CREATED, &qca->flags))
|
||||
return;
|
||||
|
||||
ibs_dir = debugfs_create_dir("ibs", hdev->debugfs);
|
||||
|
||||
/* read only */
|
||||
|
||||
@@ -329,8 +329,15 @@ static u32 vi_get_xclk(struct amdgpu_device *adev)
|
||||
u32 reference_clock = adev->clock.spll.reference_freq;
|
||||
u32 tmp;
|
||||
|
||||
if (adev->flags & AMD_IS_APU)
|
||||
return reference_clock;
|
||||
if (adev->flags & AMD_IS_APU) {
|
||||
switch (adev->asic_type) {
|
||||
case CHIP_STONEY:
|
||||
/* vbios says 48Mhz, but the actual freq is 100Mhz */
|
||||
return 10000;
|
||||
default:
|
||||
return reference_clock;
|
||||
}
|
||||
}
|
||||
|
||||
tmp = RREG32_SMC(ixCG_CLKPIN_CNTL_2);
|
||||
if (REG_GET_FIELD(tmp, CG_CLKPIN_CNTL_2, MUX_TCLK_TO_XCLK))
|
||||
|
||||
@@ -75,15 +75,17 @@ int drm_atomic_set_mode_for_crtc(struct drm_crtc_state *state,
|
||||
state->mode_blob = NULL;
|
||||
|
||||
if (mode) {
|
||||
struct drm_property_blob *blob;
|
||||
|
||||
drm_mode_convert_to_umode(&umode, mode);
|
||||
state->mode_blob =
|
||||
drm_property_create_blob(state->crtc->dev,
|
||||
sizeof(umode),
|
||||
&umode);
|
||||
if (IS_ERR(state->mode_blob))
|
||||
return PTR_ERR(state->mode_blob);
|
||||
blob = drm_property_create_blob(crtc->dev,
|
||||
sizeof(umode), &umode);
|
||||
if (IS_ERR(blob))
|
||||
return PTR_ERR(blob);
|
||||
|
||||
drm_mode_copy(&state->mode, mode);
|
||||
|
||||
state->mode_blob = blob;
|
||||
state->enable = true;
|
||||
DRM_DEBUG_ATOMIC("Set [MODE:%s] for [CRTC:%d:%s] state %p\n",
|
||||
mode->name, crtc->base.id, crtc->name, state);
|
||||
|
||||
@@ -576,12 +576,14 @@ static int sprd_i2c_remove(struct platform_device *pdev)
|
||||
struct sprd_i2c *i2c_dev = platform_get_drvdata(pdev);
|
||||
int ret;
|
||||
|
||||
ret = pm_runtime_resume_and_get(i2c_dev->dev);
|
||||
ret = pm_runtime_get_sync(i2c_dev->dev);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
dev_err(&pdev->dev, "Failed to resume device (%pe)\n", ERR_PTR(ret));
|
||||
|
||||
i2c_del_adapter(&i2c_dev->adap);
|
||||
clk_disable_unprepare(i2c_dev->clk);
|
||||
|
||||
if (ret >= 0)
|
||||
clk_disable_unprepare(i2c_dev->clk);
|
||||
|
||||
pm_runtime_put_noidle(i2c_dev->dev);
|
||||
pm_runtime_disable(i2c_dev->dev);
|
||||
|
||||
@@ -422,9 +422,8 @@ void i40iw_manage_arp_cache(struct i40iw_device *iwdev,
|
||||
bool ipv4,
|
||||
u32 action);
|
||||
|
||||
int i40iw_manage_apbvt(struct i40iw_device *iwdev,
|
||||
u16 accel_local_port,
|
||||
bool add_port);
|
||||
enum i40iw_status_code i40iw_manage_apbvt(struct i40iw_device *iwdev,
|
||||
u16 accel_local_port, bool add_port);
|
||||
|
||||
struct i40iw_cqp_request *i40iw_get_cqp_request(struct i40iw_cqp *cqp, bool wait);
|
||||
void i40iw_free_cqp_request(struct i40iw_cqp *cqp, struct i40iw_cqp_request *cqp_request);
|
||||
|
||||
@@ -262,7 +262,6 @@ static const struct xpad_device {
|
||||
{ 0x1430, 0xf801, "RedOctane Controller", 0, XTYPE_XBOX360 },
|
||||
{ 0x146b, 0x0601, "BigBen Interactive XBOX 360 Controller", 0, XTYPE_XBOX360 },
|
||||
{ 0x146b, 0x0604, "Bigben Interactive DAIJA Arcade Stick", MAP_TRIGGERS_TO_BUTTONS, XTYPE_XBOX360 },
|
||||
{ 0x1532, 0x0037, "Razer Sabertooth", 0, XTYPE_XBOX360 },
|
||||
{ 0x1532, 0x0a00, "Razer Atrox Arcade Stick", MAP_TRIGGERS_TO_BUTTONS, XTYPE_XBOXONE },
|
||||
{ 0x1532, 0x0a03, "Razer Wildcat", 0, XTYPE_XBOXONE },
|
||||
{ 0x15e4, 0x3f00, "Power A Mini Pro Elite", 0, XTYPE_XBOX360 },
|
||||
|
||||
@@ -674,10 +674,11 @@ static void process_packet_head_v4(struct psmouse *psmouse)
|
||||
struct input_dev *dev = psmouse->dev;
|
||||
struct elantech_data *etd = psmouse->private;
|
||||
unsigned char *packet = psmouse->packet;
|
||||
int id = ((packet[3] & 0xe0) >> 5) - 1;
|
||||
int id;
|
||||
int pres, traces;
|
||||
|
||||
if (id < 0)
|
||||
id = ((packet[3] & 0xe0) >> 5) - 1;
|
||||
if (id < 0 || id >= ETP_MAX_FINGERS)
|
||||
return;
|
||||
|
||||
etd->mt[id].x = ((packet[1] & 0x0f) << 8) | packet[2];
|
||||
@@ -707,7 +708,7 @@ static void process_packet_motion_v4(struct psmouse *psmouse)
|
||||
int id, sid;
|
||||
|
||||
id = ((packet[0] & 0xe0) >> 5) - 1;
|
||||
if (id < 0)
|
||||
if (id < 0 || id >= ETP_MAX_FINGERS)
|
||||
return;
|
||||
|
||||
sid = ((packet[3] & 0xe0) >> 5) - 1;
|
||||
@@ -728,7 +729,7 @@ static void process_packet_motion_v4(struct psmouse *psmouse)
|
||||
input_report_abs(dev, ABS_MT_POSITION_X, etd->mt[id].x);
|
||||
input_report_abs(dev, ABS_MT_POSITION_Y, etd->mt[id].y);
|
||||
|
||||
if (sid >= 0) {
|
||||
if (sid >= 0 && sid < ETP_MAX_FINGERS) {
|
||||
etd->mt[sid].x += delta_x2 * weight;
|
||||
etd->mt[sid].y -= delta_y2 * weight;
|
||||
input_mt_slot(dev, sid);
|
||||
|
||||
@@ -6,6 +6,7 @@ config EEPROM_AT24
|
||||
depends on I2C && SYSFS
|
||||
select NVMEM
|
||||
select NVMEM_SYSFS
|
||||
select REGMAP
|
||||
select REGMAP_I2C
|
||||
help
|
||||
Enable this driver to get read/write support to most I2C EEPROMs
|
||||
|
||||
@@ -1187,8 +1187,6 @@ static int lan9303_port_fdb_add(struct dsa_switch *ds, int port,
|
||||
struct lan9303 *chip = ds->priv;
|
||||
|
||||
dev_dbg(chip->dev, "%s(%d, %pM, %d)\n", __func__, port, addr, vid);
|
||||
if (vid)
|
||||
return -EOPNOTSUPP;
|
||||
|
||||
return lan9303_alr_add_port(chip, addr, port, false);
|
||||
}
|
||||
@@ -1200,8 +1198,6 @@ static int lan9303_port_fdb_del(struct dsa_switch *ds, int port,
|
||||
struct lan9303 *chip = ds->priv;
|
||||
|
||||
dev_dbg(chip->dev, "%s(%d, %pM, %d)\n", __func__, port, addr, vid);
|
||||
if (vid)
|
||||
return -EOPNOTSUPP;
|
||||
lan9303_alr_del_port(chip, addr, port);
|
||||
|
||||
return 0;
|
||||
|
||||
@@ -8337,6 +8337,9 @@ static int bnxt_init_chip(struct bnxt *bp, bool irq_re_init)
|
||||
goto err_out;
|
||||
}
|
||||
|
||||
if (BNXT_VF(bp))
|
||||
bnxt_hwrm_func_qcfg(bp);
|
||||
|
||||
rc = bnxt_setup_vnic(bp, 0);
|
||||
if (rc)
|
||||
goto err_out;
|
||||
@@ -12101,26 +12104,37 @@ static void bnxt_cfg_ntp_filters(struct bnxt *bp)
|
||||
|
||||
#endif /* CONFIG_RFS_ACCEL */
|
||||
|
||||
static int bnxt_udp_tunnel_sync(struct net_device *netdev, unsigned int table)
|
||||
static int bnxt_udp_tunnel_set_port(struct net_device *netdev, unsigned int table,
|
||||
unsigned int entry, struct udp_tunnel_info *ti)
|
||||
{
|
||||
struct bnxt *bp = netdev_priv(netdev);
|
||||
struct udp_tunnel_info ti;
|
||||
unsigned int cmd;
|
||||
|
||||
udp_tunnel_nic_get_port(netdev, table, 0, &ti);
|
||||
if (ti.type == UDP_TUNNEL_TYPE_VXLAN)
|
||||
if (ti->type == UDP_TUNNEL_TYPE_VXLAN)
|
||||
cmd = TUNNEL_DST_PORT_FREE_REQ_TUNNEL_TYPE_VXLAN;
|
||||
else
|
||||
cmd = TUNNEL_DST_PORT_FREE_REQ_TUNNEL_TYPE_GENEVE;
|
||||
|
||||
if (ti.port)
|
||||
return bnxt_hwrm_tunnel_dst_port_alloc(bp, ti.port, cmd);
|
||||
return bnxt_hwrm_tunnel_dst_port_alloc(bp, ti->port, cmd);
|
||||
}
|
||||
|
||||
static int bnxt_udp_tunnel_unset_port(struct net_device *netdev, unsigned int table,
|
||||
unsigned int entry, struct udp_tunnel_info *ti)
|
||||
{
|
||||
struct bnxt *bp = netdev_priv(netdev);
|
||||
unsigned int cmd;
|
||||
|
||||
if (ti->type == UDP_TUNNEL_TYPE_VXLAN)
|
||||
cmd = TUNNEL_DST_PORT_FREE_REQ_TUNNEL_TYPE_VXLAN;
|
||||
else
|
||||
cmd = TUNNEL_DST_PORT_FREE_REQ_TUNNEL_TYPE_GENEVE;
|
||||
|
||||
return bnxt_hwrm_tunnel_dst_port_free(bp, cmd);
|
||||
}
|
||||
|
||||
static const struct udp_tunnel_nic_info bnxt_udp_tunnels = {
|
||||
.sync_table = bnxt_udp_tunnel_sync,
|
||||
.set_port = bnxt_udp_tunnel_set_port,
|
||||
.unset_port = bnxt_udp_tunnel_unset_port,
|
||||
.flags = UDP_TUNNEL_NIC_INFO_MAY_SLEEP |
|
||||
UDP_TUNNEL_NIC_INFO_OPEN_ONLY,
|
||||
.tables = {
|
||||
|
||||
@@ -3440,7 +3440,7 @@ static int bnxt_reset(struct net_device *dev, u32 *flags)
|
||||
}
|
||||
}
|
||||
|
||||
if (req & BNXT_FW_RESET_AP) {
|
||||
if (!BNXT_CHIP_P4_PLUS(bp) && (req & BNXT_FW_RESET_AP)) {
|
||||
/* This feature is not supported in older firmware versions */
|
||||
if (bp->hwrm_spec_code >= 0x10803) {
|
||||
if (!bnxt_firmware_reset_ap(dev)) {
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user