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powerpc/crypto: nx driver code supporting nx encryption
These routines add the base device driver code supporting the Power7+ in-Nest encryption accelerator (nx) device. Signed-off-by: Kent Yoder <key@linux.vnet.ibm.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
This commit is contained in:
committed by
Benjamin Herrenschmidt
parent
828d2b5971
commit
ae0222b728
716
drivers/crypto/nx/nx.c
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716
drivers/crypto/nx/nx.c
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File diff suppressed because it is too large
Load Diff
193
drivers/crypto/nx/nx.h
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193
drivers/crypto/nx/nx.h
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@@ -0,0 +1,193 @@
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#ifndef __NX_H__
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#define __NX_H__
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#define NX_NAME "nx-crypto"
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#define NX_STRING "IBM Power7+ Nest Accelerator Crypto Driver"
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#define NX_VERSION "1.0"
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static const char nx_driver_string[] = NX_STRING;
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static const char nx_driver_version[] = NX_VERSION;
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/* a scatterlist in the format PHYP is expecting */
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struct nx_sg {
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u64 addr;
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u32 rsvd;
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u32 len;
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} __attribute((packed));
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#define NX_PAGE_SIZE (4096)
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#define NX_MAX_SG_ENTRIES (NX_PAGE_SIZE/(sizeof(struct nx_sg)))
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enum nx_status {
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NX_DISABLED,
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NX_WAITING,
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NX_OKAY
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};
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/* msc_triplet and max_sync_cop are used only to assist in parsing the
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* openFirmware property */
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struct msc_triplet {
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u32 keybitlen;
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u32 databytelen;
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u32 sglen;
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} __packed;
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struct max_sync_cop {
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u32 fc;
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u32 mode;
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u32 triplets;
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struct msc_triplet trip[0];
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} __packed;
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struct alg_props {
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u32 databytelen;
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u32 sglen;
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};
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#define NX_OF_FLAG_MAXSGLEN_SET (1)
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#define NX_OF_FLAG_STATUS_SET (2)
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#define NX_OF_FLAG_MAXSYNCCOP_SET (4)
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#define NX_OF_FLAG_MASK_READY (NX_OF_FLAG_MAXSGLEN_SET | \
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NX_OF_FLAG_STATUS_SET | \
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NX_OF_FLAG_MAXSYNCCOP_SET)
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struct nx_of {
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u32 flags;
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u32 max_sg_len;
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enum nx_status status;
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struct alg_props ap[NX_MAX_FC][NX_MAX_MODE][3];
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};
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struct nx_stats {
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atomic_t aes_ops;
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atomic64_t aes_bytes;
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atomic_t sha256_ops;
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atomic64_t sha256_bytes;
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atomic_t sha512_ops;
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atomic64_t sha512_bytes;
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atomic_t sync_ops;
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atomic_t errors;
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atomic_t last_error;
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atomic_t last_error_pid;
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};
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struct nx_debugfs {
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struct dentry *dfs_root;
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struct dentry *dfs_aes_ops, *dfs_aes_bytes;
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struct dentry *dfs_sha256_ops, *dfs_sha256_bytes;
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struct dentry *dfs_sha512_ops, *dfs_sha512_bytes;
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struct dentry *dfs_errors, *dfs_last_error, *dfs_last_error_pid;
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};
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struct nx_crypto_driver {
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struct nx_stats stats;
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struct nx_of of;
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struct vio_dev *viodev;
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struct vio_driver viodriver;
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struct nx_debugfs dfs;
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};
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#define NX_GCM4106_NONCE_LEN (4)
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#define NX_GCM_CTR_OFFSET (12)
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struct nx_gcm_priv {
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u8 iv[16];
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u8 iauth_tag[16];
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u8 nonce[NX_GCM4106_NONCE_LEN];
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};
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#define NX_CCM_AES_KEY_LEN (16)
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#define NX_CCM4309_AES_KEY_LEN (19)
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#define NX_CCM4309_NONCE_LEN (3)
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struct nx_ccm_priv {
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u8 iv[16];
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u8 b0[16];
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u8 iauth_tag[16];
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u8 oauth_tag[16];
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u8 nonce[NX_CCM4309_NONCE_LEN];
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};
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struct nx_xcbc_priv {
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u8 key[16];
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};
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struct nx_ctr_priv {
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u8 iv[16];
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};
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struct nx_crypto_ctx {
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void *kmem; /* unaligned, kmalloc'd buffer */
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size_t kmem_len; /* length of kmem */
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struct nx_csbcpb *csbcpb; /* aligned page given to phyp @ hcall time */
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struct vio_pfo_op op; /* operation struct with hcall parameters */
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struct nx_csbcpb *csbcpb_aead; /* secondary csbcpb used by AEAD algs */
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struct vio_pfo_op op_aead;/* operation struct for csbcpb_aead */
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struct nx_sg *in_sg; /* aligned pointer into kmem to an sg list */
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struct nx_sg *out_sg; /* aligned pointer into kmem to an sg list */
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struct alg_props *ap; /* pointer into props based on our key size */
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struct alg_props props[3];/* openFirmware properties for requests */
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struct nx_stats *stats; /* pointer into an nx_crypto_driver for stats
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reporting */
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union {
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struct nx_gcm_priv gcm;
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struct nx_ccm_priv ccm;
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struct nx_xcbc_priv xcbc;
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struct nx_ctr_priv ctr;
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} priv;
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};
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/* prototypes */
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int nx_crypto_ctx_aes_ccm_init(struct crypto_tfm *tfm);
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int nx_crypto_ctx_aes_gcm_init(struct crypto_tfm *tfm);
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int nx_crypto_ctx_aes_xcbc_init(struct crypto_tfm *tfm);
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int nx_crypto_ctx_aes_ctr_init(struct crypto_tfm *tfm);
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int nx_crypto_ctx_aes_cbc_init(struct crypto_tfm *tfm);
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int nx_crypto_ctx_aes_ecb_init(struct crypto_tfm *tfm);
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int nx_crypto_ctx_sha_init(struct crypto_tfm *tfm);
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void nx_crypto_ctx_exit(struct crypto_tfm *tfm);
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void nx_ctx_init(struct nx_crypto_ctx *nx_ctx, unsigned int function);
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int nx_hcall_sync(struct nx_crypto_ctx *ctx, struct vio_pfo_op *op,
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u32 may_sleep);
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struct nx_sg *nx_build_sg_list(struct nx_sg *, u8 *, unsigned int, u32);
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int nx_build_sg_lists(struct nx_crypto_ctx *, struct blkcipher_desc *,
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struct scatterlist *, struct scatterlist *, unsigned int,
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u8 *);
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struct nx_sg *nx_walk_and_build(struct nx_sg *, unsigned int,
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struct scatterlist *, unsigned int,
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unsigned int);
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#ifdef CONFIG_DEBUG_FS
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#define NX_DEBUGFS_INIT(drv) nx_debugfs_init(drv)
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#define NX_DEBUGFS_FINI(drv) nx_debugfs_fini(drv)
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int nx_debugfs_init(struct nx_crypto_driver *);
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void nx_debugfs_fini(struct nx_crypto_driver *);
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#else
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#define NX_DEBUGFS_INIT(drv) (0)
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#define NX_DEBUGFS_FINI(drv) (0)
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#endif
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#define NX_PAGE_NUM(x) ((u64)(x) & 0xfffffffffffff000ULL)
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extern struct crypto_alg nx_cbc_aes_alg;
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extern struct crypto_alg nx_ecb_aes_alg;
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extern struct crypto_alg nx_gcm_aes_alg;
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extern struct crypto_alg nx_gcm4106_aes_alg;
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extern struct crypto_alg nx_ctr_aes_alg;
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extern struct crypto_alg nx_ctr3686_aes_alg;
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extern struct crypto_alg nx_ccm_aes_alg;
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extern struct crypto_alg nx_ccm4309_aes_alg;
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extern struct shash_alg nx_shash_aes_xcbc_alg;
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extern struct shash_alg nx_shash_sha512_alg;
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extern struct shash_alg nx_shash_sha256_alg;
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extern struct nx_crypto_driver nx_driver;
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#define SCATTERWALK_TO_SG 1
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#define SCATTERWALK_FROM_SG 0
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#endif
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205
drivers/crypto/nx/nx_csbcpb.h
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205
drivers/crypto/nx/nx_csbcpb.h
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#ifndef __NX_CSBCPB_H__
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#define __NX_CSBCPB_H__
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struct cop_symcpb_aes_ecb {
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u8 key[32];
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u8 __rsvd[80];
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} __packed;
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struct cop_symcpb_aes_cbc {
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u8 iv[16];
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u8 key[32];
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u8 cv[16];
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u32 spbc;
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u8 __rsvd[44];
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} __packed;
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struct cop_symcpb_aes_gca {
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u8 in_pat[16];
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u8 key[32];
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u8 out_pat[16];
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u32 spbc;
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u8 __rsvd[44];
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} __packed;
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struct cop_symcpb_aes_gcm {
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u8 in_pat_or_aad[16];
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u8 iv_or_cnt[16];
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u64 bit_length_aad;
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u64 bit_length_data;
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u8 in_s0[16];
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u8 key[32];
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u8 __rsvd1[16];
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u8 out_pat_or_mac[16];
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u8 out_s0[16];
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u8 out_cnt[16];
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u32 spbc;
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u8 __rsvd2[12];
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} __packed;
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struct cop_symcpb_aes_ctr {
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u8 iv[16];
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u8 key[32];
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u8 cv[16];
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u32 spbc;
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u8 __rsvd2[44];
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} __packed;
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struct cop_symcpb_aes_cca {
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u8 b0[16];
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u8 b1[16];
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u8 key[16];
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u8 out_pat_or_b0[16];
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u32 spbc;
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u8 __rsvd[44];
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} __packed;
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struct cop_symcpb_aes_ccm {
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u8 in_pat_or_b0[16];
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u8 iv_or_ctr[16];
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u8 in_s0[16];
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u8 key[16];
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u8 __rsvd1[48];
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u8 out_pat_or_mac[16];
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u8 out_s0[16];
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u8 out_ctr[16];
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u32 spbc;
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u8 __rsvd2[12];
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} __packed;
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struct cop_symcpb_aes_xcbc {
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u8 cv[16];
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u8 key[16];
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u8 __rsvd1[16];
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u8 out_cv_mac[16];
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u32 spbc;
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u8 __rsvd2[44];
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} __packed;
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struct cop_symcpb_sha256 {
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u64 message_bit_length;
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u64 __rsvd1;
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u8 input_partial_digest[32];
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u8 message_digest[32];
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u32 spbc;
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u8 __rsvd2[44];
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} __packed;
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struct cop_symcpb_sha512 {
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u64 message_bit_length_hi;
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u64 message_bit_length_lo;
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u8 input_partial_digest[64];
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u8 __rsvd1[32];
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u8 message_digest[64];
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u32 spbc;
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u8 __rsvd2[76];
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} __packed;
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#define NX_FDM_INTERMEDIATE 0x01
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#define NX_FDM_CONTINUATION 0x02
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#define NX_FDM_ENDE_ENCRYPT 0x80
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#define NX_CPB_FDM(c) ((c)->cpb.hdr.fdm)
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#define NX_CPB_KS_DS(c) ((c)->cpb.hdr.ks_ds)
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#define NX_CPB_KEY_SIZE(c) (NX_CPB_KS_DS(c) >> 4)
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#define NX_CPB_SET_KEY_SIZE(c, x) NX_CPB_KS_DS(c) |= ((x) << 4)
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#define NX_CPB_SET_DIGEST_SIZE(c, x) NX_CPB_KS_DS(c) |= (x)
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struct cop_symcpb_header {
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u8 mode;
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u8 fdm;
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u8 ks_ds;
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u8 pad_byte;
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u8 __rsvd[12];
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} __packed;
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struct cop_parameter_block {
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struct cop_symcpb_header hdr;
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union {
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struct cop_symcpb_aes_ecb aes_ecb;
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struct cop_symcpb_aes_cbc aes_cbc;
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struct cop_symcpb_aes_gca aes_gca;
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struct cop_symcpb_aes_gcm aes_gcm;
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struct cop_symcpb_aes_cca aes_cca;
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struct cop_symcpb_aes_ccm aes_ccm;
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struct cop_symcpb_aes_ctr aes_ctr;
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struct cop_symcpb_aes_xcbc aes_xcbc;
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struct cop_symcpb_sha256 sha256;
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struct cop_symcpb_sha512 sha512;
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};
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} __packed;
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#define NX_CSB_VALID_BIT 0x80
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/* co-processor status block */
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struct cop_status_block {
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u8 valid;
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u8 crb_seq_number;
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u8 completion_code;
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u8 completion_extension;
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u32 processed_byte_count;
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u64 address;
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} __packed;
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/* Nest accelerator workbook section 4.4 */
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struct nx_csbcpb {
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unsigned char __rsvd[112];
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struct cop_status_block csb;
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struct cop_parameter_block cpb;
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} __packed;
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/* nx_csbcpb related definitions */
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#define NX_MODE_AES_ECB 0
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#define NX_MODE_AES_CBC 1
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#define NX_MODE_AES_GMAC 2
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#define NX_MODE_AES_GCA 3
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#define NX_MODE_AES_GCM 4
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#define NX_MODE_AES_CCA 5
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#define NX_MODE_AES_CCM 6
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#define NX_MODE_AES_CTR 7
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#define NX_MODE_AES_XCBC_MAC 20
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#define NX_MODE_SHA 0
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#define NX_MODE_SHA_HMAC 1
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#define NX_MODE_AES_CBC_HMAC_ETA 8
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#define NX_MODE_AES_CBC_HMAC_ATE 9
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#define NX_MODE_AES_CBC_HMAC_EAA 10
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#define NX_MODE_AES_CTR_HMAC_ETA 12
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#define NX_MODE_AES_CTR_HMAC_ATE 13
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#define NX_MODE_AES_CTR_HMAC_EAA 14
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#define NX_FDM_CI_FULL 0
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#define NX_FDM_CI_FIRST 1
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#define NX_FDM_CI_LAST 2
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#define NX_FDM_CI_MIDDLE 3
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#define NX_FDM_PR_NONE 0
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#define NX_FDM_PR_PAD 1
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#define NX_KS_AES_128 1
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#define NX_KS_AES_192 2
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#define NX_KS_AES_256 3
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#define NX_DS_SHA256 2
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#define NX_DS_SHA512 3
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#define NX_FC_AES 0
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#define NX_FC_SHA 2
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#define NX_FC_AES_HMAC 6
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#define NX_MAX_FC (NX_FC_AES_HMAC + 1)
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#define NX_MAX_MODE (NX_MODE_AES_XCBC_MAC + 1)
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#define HCOP_FC_AES NX_FC_AES
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#define HCOP_FC_SHA NX_FC_SHA
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#define HCOP_FC_AES_HMAC NX_FC_AES_HMAC
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/* indices into the array of algorithm properties */
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#define NX_PROPS_AES_128 0
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#define NX_PROPS_AES_192 1
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#define NX_PROPS_AES_256 2
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#define NX_PROPS_SHA256 1
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#define NX_PROPS_SHA512 2
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#endif
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