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drivers/perf: hisi: Add support for HiSilicon PA PMU driver
On HiSilicon Hip09 platform, there is a PA (Protocol Adapter) module on each chip SICL (Super I/O Cluster) which incorporates three Hydra interface and facilitates the cache coherency between the dies on the chip. While PA uncore PMU model is the same as other Hip09 PMU modules and many PMU events are supported. Let's support the PMU driver using the HiSilicon uncore PMU framework. PA PMU supports the following filter functions: * tracetag_en: allows user to count events according to tt_req or tt_core set in L3C PMU. It's the same as other PMUs. * srcid_cmd & srcid_msk: allows user to filter statistics that come from specific CCL/ICL by configuration source ID. * tgtid_cmd & tgtid_msk: it is the similar function to srcid_cmd & srcid_msk. Both are used to check where the data comes from or go to. Cc: Mark Rutland <mark.rutland@arm.com> Cc: Will Deacon <will@kernel.org> Cc: John Garry <john.garry@huawei.com> Cc: Jonathan Cameron <Jonathan.Cameron@huawei.com> Reviewed-by: John Garry <john.garry@huawei.com> Co-developed-by: Qi Liu <liuqi115@huawei.com> Signed-off-by: Qi Liu <liuqi115@huawei.com> Signed-off-by: Shaokun Zhang <zhangshaokun@hisilicon.com> Link: https://lore.kernel.org/r/1615186237-22263-9-git-send-email-zhangshaokun@hisilicon.com Signed-off-by: Will Deacon <will@kernel.org>
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Will Deacon
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3bf30882c3
commit
a0ab25cd82
@@ -1,3 +1,4 @@
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# SPDX-License-Identifier: GPL-2.0-only
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obj-$(CONFIG_HISI_PMU) += hisi_uncore_pmu.o hisi_uncore_l3c_pmu.o \
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hisi_uncore_hha_pmu.o hisi_uncore_ddrc_pmu.o hisi_uncore_sllc_pmu.o
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hisi_uncore_hha_pmu.o hisi_uncore_ddrc_pmu.o hisi_uncore_sllc_pmu.o \
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hisi_uncore_pa_pmu.o
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500
drivers/perf/hisilicon/hisi_uncore_pa_pmu.c
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500
drivers/perf/hisilicon/hisi_uncore_pa_pmu.c
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File diff suppressed because it is too large
Load Diff
@@ -175,6 +175,7 @@ enum cpuhp_state {
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CPUHP_AP_PERF_ARM_HISI_DDRC_ONLINE,
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CPUHP_AP_PERF_ARM_HISI_HHA_ONLINE,
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CPUHP_AP_PERF_ARM_HISI_L3_ONLINE,
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CPUHP_AP_PERF_ARM_HISI_PA_ONLINE,
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CPUHP_AP_PERF_ARM_HISI_SLLC_ONLINE,
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CPUHP_AP_PERF_ARM_L2X0_ONLINE,
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CPUHP_AP_PERF_ARM_QCOM_L2_ONLINE,
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