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crypto: caam - add support for RSA algorithm
Add RSA support to caam driver. Initial author is Yashpal Dutta <yashpal.dutta@freescale.com>. Signed-off-by: Tudor Ambarus <tudor-dan.ambarus@nxp.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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Herbert Xu
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57763f5ec7
commit
8c419778ab
@@ -99,6 +99,18 @@ config CRYPTO_DEV_FSL_CAAM_AHASH_API
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To compile this as a module, choose M here: the module
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will be called caamhash.
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config CRYPTO_DEV_FSL_CAAM_PKC_API
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tristate "Register public key cryptography implementations with Crypto API"
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depends on CRYPTO_DEV_FSL_CAAM && CRYPTO_DEV_FSL_CAAM_JR
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default y
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select CRYPTO_RSA
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help
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Selecting this will allow SEC Public key support for RSA.
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Supported cryptographic primitives: encryption, decryption,
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signature and verification.
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To compile this as a module, choose M here: the module
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will be called caam_pkc.
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config CRYPTO_DEV_FSL_CAAM_RNG_API
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tristate "Register caam device for hwrng API"
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depends on CRYPTO_DEV_FSL_CAAM && CRYPTO_DEV_FSL_CAAM_JR
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@@ -10,6 +10,8 @@ obj-$(CONFIG_CRYPTO_DEV_FSL_CAAM_JR) += caam_jr.o
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obj-$(CONFIG_CRYPTO_DEV_FSL_CAAM_CRYPTO_API) += caamalg.o
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obj-$(CONFIG_CRYPTO_DEV_FSL_CAAM_AHASH_API) += caamhash.o
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obj-$(CONFIG_CRYPTO_DEV_FSL_CAAM_RNG_API) += caamrng.o
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obj-$(CONFIG_CRYPTO_DEV_FSL_CAAM_PKC_API) += caam_pkc.o
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caam-objs := ctrl.o
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caam_jr-objs := jr.o key_gen.o error.o
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caam_pkc-y := caampkc.o pkc_desc.o
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607
drivers/crypto/caam/caampkc.c
Normal file
607
drivers/crypto/caam/caampkc.c
Normal file
File diff suppressed because it is too large
Load Diff
70
drivers/crypto/caam/caampkc.h
Normal file
70
drivers/crypto/caam/caampkc.h
Normal file
@@ -0,0 +1,70 @@
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/*
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* caam - Freescale FSL CAAM support for Public Key Cryptography descriptors
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*
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* Copyright 2016 Freescale Semiconductor, Inc.
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*
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* There is no Shared Descriptor for PKC so that the Job Descriptor must carry
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* all the desired key parameters, input and output pointers.
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*/
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#ifndef _PKC_DESC_H_
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#define _PKC_DESC_H_
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#include "compat.h"
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#include "pdb.h"
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/**
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* caam_rsa_key - CAAM RSA key structure. Keys are allocated in DMA zone.
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* @n : RSA modulus raw byte stream
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* @e : RSA public exponent raw byte stream
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* @d : RSA private exponent raw byte stream
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* @n_sz : length in bytes of RSA modulus n
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* @e_sz : length in bytes of RSA public exponent
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* @d_sz : length in bytes of RSA private exponent
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*/
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struct caam_rsa_key {
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u8 *n;
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u8 *e;
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u8 *d;
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size_t n_sz;
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size_t e_sz;
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size_t d_sz;
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};
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/**
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* caam_rsa_ctx - per session context.
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* @key : RSA key in DMA zone
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* @dev : device structure
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*/
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struct caam_rsa_ctx {
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struct caam_rsa_key key;
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struct device *dev;
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};
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/**
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* rsa_edesc - s/w-extended rsa descriptor
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* @src_nents : number of segments in input scatterlist
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* @dst_nents : number of segments in output scatterlist
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* @sec4_sg_bytes : length of h/w link table
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* @sec4_sg_dma : dma address of h/w link table
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* @sec4_sg : pointer to h/w link table
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* @pdb : specific RSA Protocol Data Block (PDB)
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* @hw_desc : descriptor followed by link tables if any
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*/
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struct rsa_edesc {
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int src_nents;
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int dst_nents;
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int sec4_sg_bytes;
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dma_addr_t sec4_sg_dma;
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struct sec4_sg_entry *sec4_sg;
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union {
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struct rsa_pub_pdb pub;
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struct rsa_priv_f1_pdb priv_f1;
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} pdb;
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u32 hw_desc[];
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};
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/* Descriptor construction primitives. */
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void init_rsa_pub_desc(u32 *desc, struct rsa_pub_pdb *pdb);
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void init_rsa_priv_f1_desc(u32 *desc, struct rsa_priv_f1_pdb *pdb);
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#endif
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@@ -35,8 +35,11 @@
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#include <crypto/md5.h>
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#include <crypto/internal/aead.h>
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#include <crypto/authenc.h>
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#include <crypto/akcipher.h>
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#include <crypto/scatterwalk.h>
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#include <crypto/internal/skcipher.h>
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#include <crypto/internal/hash.h>
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#include <crypto/internal/rsa.h>
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#include <crypto/internal/akcipher.h>
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#endif /* !defined(CAAM_COMPAT_H) */
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@@ -453,6 +453,8 @@ struct sec4_sg_entry {
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#define OP_PCLID_PUBLICKEYPAIR (0x14 << OP_PCLID_SHIFT)
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#define OP_PCLID_DSASIGN (0x15 << OP_PCLID_SHIFT)
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#define OP_PCLID_DSAVERIFY (0x16 << OP_PCLID_SHIFT)
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#define OP_PCLID_RSAENC_PUBKEY (0x18 << OP_PCLID_SHIFT)
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#define OP_PCLID_RSADEC_PRVKEY (0x19 << OP_PCLID_SHIFT)
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/* Assuming OP_TYPE = OP_TYPE_DECAP_PROTOCOL/ENCAP_PROTOCOL */
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#define OP_PCLID_IPSEC (0x01 << OP_PCLID_SHIFT)
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@@ -77,6 +77,13 @@ static inline void init_job_desc(u32 *desc, u32 options)
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init_desc(desc, CMD_DESC_HDR | options);
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}
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static inline void init_job_desc_pdb(u32 *desc, u32 options, size_t pdb_bytes)
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{
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u32 pdb_len = (pdb_bytes + CAAM_CMD_SZ - 1) / CAAM_CMD_SZ;
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init_job_desc(desc, (((pdb_len + 1) << HDR_START_IDX_SHIFT)) | options);
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}
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static inline void append_ptr(u32 *desc, dma_addr_t ptr)
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{
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dma_addr_t *offset = (dma_addr_t *)desc_end(desc);
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@@ -1,12 +1,13 @@
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/*
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* CAAM Protocol Data Block (PDB) definition header file
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*
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* Copyright 2008-2012 Freescale Semiconductor, Inc.
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* Copyright 2008-2016 Freescale Semiconductor, Inc.
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*
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*/
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#ifndef CAAM_PDB_H
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#define CAAM_PDB_H
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#include "compat.h"
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/*
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* PDB- IPSec ESP Header Modification Options
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@@ -476,4 +477,52 @@ struct dsa_verify_pdb {
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u8 *ab; /* only used if ECC processing */
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};
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/* RSA Protocol Data Block */
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#define RSA_PDB_SGF_SHIFT 28
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#define RSA_PDB_E_SHIFT 12
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#define RSA_PDB_E_MASK (0xFFF << RSA_PDB_E_SHIFT)
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#define RSA_PDB_D_SHIFT 12
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#define RSA_PDB_D_MASK (0xFFF << RSA_PDB_D_SHIFT)
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#define RSA_PDB_SGF_F (0x8 << RSA_PDB_SGF_SHIFT)
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#define RSA_PDB_SGF_G (0x4 << RSA_PDB_SGF_SHIFT)
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#define RSA_PRIV_PDB_SGF_F (0x4 << RSA_PDB_SGF_SHIFT)
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#define RSA_PRIV_PDB_SGF_G (0x8 << RSA_PDB_SGF_SHIFT)
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#define RSA_PRIV_KEY_FRM_1 0
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/**
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* RSA Encrypt Protocol Data Block
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* @sgf: scatter-gather field
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* @f_dma: dma address of input data
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* @g_dma: dma address of encrypted output data
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* @n_dma: dma address of RSA modulus
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* @e_dma: dma address of RSA public exponent
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* @f_len: length in octets of the input data
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*/
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struct rsa_pub_pdb {
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u32 sgf;
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dma_addr_t f_dma;
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dma_addr_t g_dma;
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dma_addr_t n_dma;
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dma_addr_t e_dma;
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u32 f_len;
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} __packed;
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/**
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* RSA Decrypt PDB - Private Key Form #1
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* @sgf: scatter-gather field
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* @g_dma: dma address of encrypted input data
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* @f_dma: dma address of output data
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* @n_dma: dma address of RSA modulus
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* @d_dma: dma address of RSA private exponent
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*/
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struct rsa_priv_f1_pdb {
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u32 sgf;
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dma_addr_t g_dma;
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dma_addr_t f_dma;
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dma_addr_t n_dma;
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dma_addr_t d_dma;
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} __packed;
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#endif
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36
drivers/crypto/caam/pkc_desc.c
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36
drivers/crypto/caam/pkc_desc.c
Normal file
@@ -0,0 +1,36 @@
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/*
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* caam - Freescale FSL CAAM support for Public Key Cryptography descriptors
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*
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* Copyright 2016 Freescale Semiconductor, Inc.
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*
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* There is no Shared Descriptor for PKC so that the Job Descriptor must carry
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* all the desired key parameters, input and output pointers.
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*/
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#include "caampkc.h"
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#include "desc_constr.h"
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/* Descriptor for RSA Public operation */
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void init_rsa_pub_desc(u32 *desc, struct rsa_pub_pdb *pdb)
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{
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init_job_desc_pdb(desc, 0, sizeof(*pdb));
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append_cmd(desc, pdb->sgf);
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append_ptr(desc, pdb->f_dma);
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append_ptr(desc, pdb->g_dma);
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append_ptr(desc, pdb->n_dma);
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append_ptr(desc, pdb->e_dma);
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append_cmd(desc, pdb->f_len);
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append_operation(desc, OP_TYPE_UNI_PROTOCOL | OP_PCLID_RSAENC_PUBKEY);
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}
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/* Descriptor for RSA Private operation - Private Key Form #1 */
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void init_rsa_priv_f1_desc(u32 *desc, struct rsa_priv_f1_pdb *pdb)
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{
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init_job_desc_pdb(desc, 0, sizeof(*pdb));
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append_cmd(desc, pdb->sgf);
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append_ptr(desc, pdb->g_dma);
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append_ptr(desc, pdb->f_dma);
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append_ptr(desc, pdb->n_dma);
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append_ptr(desc, pdb->d_dma);
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append_operation(desc, OP_TYPE_UNI_PROTOCOL | OP_PCLID_RSADEC_PRVKEY |
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RSA_PRIV_KEY_FRM_1);
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}
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