You've already forked linux-rockchip
mirror of
https://github.com/armbian/linux-rockchip.git
synced 2026-01-06 11:08:10 -08:00
Merge tag 'scsi-misc' of git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsi
Pull SCSI updates from James Bottomley: "Updates to the usual drivers (qla2xxx, lpfc, ufs, hisi_sas, mpi3mr, mpt3sas, target). The biggest change (from my biased viewpoint) being that the mpi3mr now attached to the SAS transport class, making it the first fusion type device to do so. Beyond the usual bug fixing and security class reworks, there aren't a huge number of core changes" * tag 'scsi-misc' of git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsi: (141 commits) scsi: iscsi: iscsi_tcp: Fix null-ptr-deref while calling getpeername() scsi: mpi3mr: Remove unnecessary cast scsi: stex: Properly zero out the passthrough command structure scsi: mpi3mr: Update driver version to 8.2.0.3.0 scsi: mpi3mr: Fix scheduling while atomic type bug scsi: mpi3mr: Scan the devices during resume time scsi: mpi3mr: Free enclosure objects during driver unload scsi: mpi3mr: Handle 0xF003 Fault Code scsi: mpi3mr: Graceful handling of surprise removal of PCIe HBA scsi: mpi3mr: Schedule IRQ kthreads only on non-RT kernels scsi: mpi3mr: Support new power management framework scsi: mpi3mr: Update mpi3 header files scsi: mpt3sas: Revert "scsi: mpt3sas: Fix ioc->base_readl() use" scsi: mpt3sas: Revert "scsi: mpt3sas: Fix writel() use" scsi: wd33c93: Remove dead code related to the long-gone config WD33C93_PIO scsi: core: Add I/O timeout count for SCSI device scsi: qedf: Populate sysfs attributes for vport scsi: pm8001: Replace one-element array with flexible-array member scsi: 3w-xxxx: Replace one-element array with flexible-array member scsi: hptiop: Replace one-element array with flexible-array member in struct hpt_iop_request_ioctl_command() ...
This commit is contained in:
@@ -1417,6 +1417,15 @@ Description: This node is used to set or display whether UFS WriteBooster is
|
||||
platform that doesn't support UFSHCD_CAP_CLK_SCALING, we can
|
||||
disable/enable WriteBooster through this sysfs node.
|
||||
|
||||
What: /sys/bus/platform/drivers/ufshcd/*/enable_wb_buf_flush
|
||||
What: /sys/bus/platform/devices/*.ufs/enable_wb_buf_flush
|
||||
Date: July 2022
|
||||
Contact: Jinyoung Choi <j-young.choi@samsung.com>
|
||||
Description: This entry shows the status of WriteBooster buffer flushing
|
||||
and it can be used to enable or disable the flushing.
|
||||
If flushing is enabled, the device executes the flush
|
||||
operation when the command queue is empty.
|
||||
|
||||
What: /sys/bus/platform/drivers/ufshcd/*/device_descriptor/hpb_version
|
||||
What: /sys/bus/platform/devices/*.ufs/device_descriptor/hpb_version
|
||||
Date: June 2021
|
||||
@@ -1591,6 +1600,43 @@ Description: This entry shows the status of HPB.
|
||||
|
||||
The file is read only.
|
||||
|
||||
Contact: Daniil Lunev <dlunev@chromium.org>
|
||||
What: /sys/bus/platform/drivers/ufshcd/*/capabilities/
|
||||
What: /sys/bus/platform/devices/*.ufs/capabilities/
|
||||
Date: August 2022
|
||||
Description: The group represents the effective capabilities of the
|
||||
host-device pair. i.e. the capabilities which are enabled in the
|
||||
driver for the specific host controller, supported by the host
|
||||
controller and are supported and/or have compatible
|
||||
configuration on the device side.
|
||||
|
||||
Contact: Daniil Lunev <dlunev@chromium.org>
|
||||
What: /sys/bus/platform/drivers/ufshcd/*/capabilities/clock_scaling
|
||||
What: /sys/bus/platform/devices/*.ufs/capabilities/clock_scaling
|
||||
Date: August 2022
|
||||
Contact: Daniil Lunev <dlunev@chromium.org>
|
||||
Description: Indicates status of clock scaling.
|
||||
|
||||
== ============================
|
||||
0 Clock scaling is not supported.
|
||||
1 Clock scaling is supported.
|
||||
== ============================
|
||||
|
||||
The file is read only.
|
||||
|
||||
What: /sys/bus/platform/drivers/ufshcd/*/capabilities/write_booster
|
||||
What: /sys/bus/platform/devices/*.ufs/capabilities/write_booster
|
||||
Date: August 2022
|
||||
Contact: Daniil Lunev <dlunev@chromium.org>
|
||||
Description: Indicates status of Write Booster.
|
||||
|
||||
== ============================
|
||||
0 Write Booster can not be enabled.
|
||||
1 Write Booster can be enabled.
|
||||
== ============================
|
||||
|
||||
The file is read only.
|
||||
|
||||
What: /sys/class/scsi_device/*/device/hpb_param_sysfs/activation_thld
|
||||
Date: February 2021
|
||||
Contact: Avri Altman <avri.altman@wdc.com>
|
||||
|
||||
@@ -401,7 +401,7 @@ Changes from 20041213 to 20041220
|
||||
structure.
|
||||
* Integrated patch from Christoph Hellwig <hch@lst.de> Kill
|
||||
compile warnings on 64 bit platforms: %variables for %llx format
|
||||
specifiers must be caste to long long because %(u)int64_t can
|
||||
specifiers must be cast to long long because %(u)int64_t can
|
||||
just be long on 64bit platforms.
|
||||
* Integrated patch from Christoph Hellwig <hch@lst.de> Removes
|
||||
dead code.
|
||||
|
||||
@@ -620,7 +620,6 @@ __mptctl_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
|
||||
{
|
||||
mpt_ioctl_header __user *uhdr = (void __user *) arg;
|
||||
mpt_ioctl_header khdr;
|
||||
int iocnum;
|
||||
unsigned iocnumX;
|
||||
int nonblock = (file->f_flags & O_NONBLOCK);
|
||||
int ret;
|
||||
@@ -634,12 +633,11 @@ __mptctl_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
|
||||
}
|
||||
ret = -ENXIO; /* (-6) No such device or address */
|
||||
|
||||
/* Verify intended MPT adapter - set iocnum and the adapter
|
||||
/* Verify intended MPT adapter - set iocnumX and the adapter
|
||||
* pointer (iocp)
|
||||
*/
|
||||
iocnumX = khdr.iocnum & 0xFF;
|
||||
if (((iocnum = mpt_verify_adapter(iocnumX, &iocp)) < 0) ||
|
||||
(iocp == NULL))
|
||||
if ((mpt_verify_adapter(iocnumX, &iocp) < 0) || (iocp == NULL))
|
||||
return -ENODEV;
|
||||
|
||||
if (!iocp->active) {
|
||||
|
||||
@@ -2006,7 +2006,7 @@ static int twa_probe(struct pci_dev *pdev, const struct pci_device_id *dev_id)
|
||||
retval = pci_enable_device(pdev);
|
||||
if (retval) {
|
||||
TW_PRINTK(host, TW_DRIVER, 0x34, "Failed to enable pci device");
|
||||
goto out_disable_device;
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
pci_set_master(pdev);
|
||||
|
||||
@@ -912,7 +912,7 @@ static long tw_chrdev_ioctl(struct file *file, unsigned int cmd, unsigned long a
|
||||
data_buffer_length_adjusted = (data_buffer_length + 511) & ~511;
|
||||
|
||||
/* Now allocate ioctl buf memory */
|
||||
cpu_addr = dma_alloc_coherent(&tw_dev->tw_pci_dev->dev, data_buffer_length_adjusted+sizeof(TW_New_Ioctl) - 1, &dma_handle, GFP_KERNEL);
|
||||
cpu_addr = dma_alloc_coherent(&tw_dev->tw_pci_dev->dev, data_buffer_length_adjusted + sizeof(TW_New_Ioctl), &dma_handle, GFP_KERNEL);
|
||||
if (cpu_addr == NULL) {
|
||||
retval = -ENOMEM;
|
||||
goto out;
|
||||
@@ -921,7 +921,7 @@ static long tw_chrdev_ioctl(struct file *file, unsigned int cmd, unsigned long a
|
||||
tw_ioctl = (TW_New_Ioctl *)cpu_addr;
|
||||
|
||||
/* Now copy down the entire ioctl */
|
||||
if (copy_from_user(tw_ioctl, argp, data_buffer_length + sizeof(TW_New_Ioctl) - 1))
|
||||
if (copy_from_user(tw_ioctl, argp, data_buffer_length + sizeof(TW_New_Ioctl)))
|
||||
goto out2;
|
||||
|
||||
passthru = (TW_Passthru *)&tw_ioctl->firmware_command;
|
||||
@@ -966,15 +966,15 @@ static long tw_chrdev_ioctl(struct file *file, unsigned int cmd, unsigned long a
|
||||
/* Load the sg list */
|
||||
switch (TW_SGL_OUT(tw_ioctl->firmware_command.opcode__sgloffset)) {
|
||||
case 2:
|
||||
tw_ioctl->firmware_command.byte8.param.sgl[0].address = dma_handle + sizeof(TW_New_Ioctl) - 1;
|
||||
tw_ioctl->firmware_command.byte8.param.sgl[0].address = dma_handle + sizeof(TW_New_Ioctl);
|
||||
tw_ioctl->firmware_command.byte8.param.sgl[0].length = data_buffer_length_adjusted;
|
||||
break;
|
||||
case 3:
|
||||
tw_ioctl->firmware_command.byte8.io.sgl[0].address = dma_handle + sizeof(TW_New_Ioctl) - 1;
|
||||
tw_ioctl->firmware_command.byte8.io.sgl[0].address = dma_handle + sizeof(TW_New_Ioctl);
|
||||
tw_ioctl->firmware_command.byte8.io.sgl[0].length = data_buffer_length_adjusted;
|
||||
break;
|
||||
case 5:
|
||||
passthru->sg_list[0].address = dma_handle + sizeof(TW_New_Ioctl) - 1;
|
||||
passthru->sg_list[0].address = dma_handle + sizeof(TW_New_Ioctl);
|
||||
passthru->sg_list[0].length = data_buffer_length_adjusted;
|
||||
break;
|
||||
}
|
||||
@@ -1017,12 +1017,12 @@ static long tw_chrdev_ioctl(struct file *file, unsigned int cmd, unsigned long a
|
||||
}
|
||||
|
||||
/* Now copy the response to userspace */
|
||||
if (copy_to_user(argp, tw_ioctl, sizeof(TW_New_Ioctl) + data_buffer_length - 1))
|
||||
if (copy_to_user(argp, tw_ioctl, sizeof(TW_New_Ioctl) + data_buffer_length))
|
||||
goto out2;
|
||||
retval = 0;
|
||||
out2:
|
||||
/* Now free ioctl buf memory */
|
||||
dma_free_coherent(&tw_dev->tw_pci_dev->dev, data_buffer_length_adjusted+sizeof(TW_New_Ioctl) - 1, cpu_addr, dma_handle);
|
||||
dma_free_coherent(&tw_dev->tw_pci_dev->dev, data_buffer_length_adjusted + sizeof(TW_New_Ioctl), cpu_addr, dma_handle);
|
||||
out:
|
||||
mutex_unlock(&tw_dev->ioctl_lock);
|
||||
mutex_unlock(&tw_mutex);
|
||||
|
||||
@@ -348,7 +348,7 @@ typedef struct TAG_TW_New_Ioctl {
|
||||
unsigned int data_buffer_length;
|
||||
unsigned char padding [508];
|
||||
TW_Command firmware_command;
|
||||
char data_buffer[1];
|
||||
char data_buffer[];
|
||||
} TW_New_Ioctl;
|
||||
|
||||
/* GetParam descriptor */
|
||||
|
||||
@@ -2,9 +2,10 @@
|
||||
menu "SCSI device support"
|
||||
|
||||
config SCSI_MOD
|
||||
tristate
|
||||
default y if SCSI=n || SCSI=y
|
||||
default m if SCSI=m
|
||||
tristate
|
||||
default y if SCSI=n || SCSI=y
|
||||
default m if SCSI=m
|
||||
depends on BLOCK
|
||||
|
||||
config RAID_ATTRS
|
||||
tristate "RAID Transport Class"
|
||||
|
||||
@@ -194,7 +194,7 @@ struct ahd_linux_iocell_opts
|
||||
#define AIC79XX_PRECOMP_INDEX 0
|
||||
#define AIC79XX_SLEWRATE_INDEX 1
|
||||
#define AIC79XX_AMPLITUDE_INDEX 2
|
||||
static const struct ahd_linux_iocell_opts aic79xx_iocell_info[] =
|
||||
static struct ahd_linux_iocell_opts aic79xx_iocell_info[] __ro_after_init =
|
||||
{
|
||||
AIC79XX_DEFAULT_IOOPTS,
|
||||
AIC79XX_DEFAULT_IOOPTS,
|
||||
|
||||
@@ -1366,9 +1366,9 @@ csio_show_hw_state(struct device *dev,
|
||||
struct csio_hw *hw = csio_lnode_to_hw(ln);
|
||||
|
||||
if (csio_is_hw_ready(hw))
|
||||
return snprintf(buf, PAGE_SIZE, "ready\n");
|
||||
else
|
||||
return snprintf(buf, PAGE_SIZE, "not ready\n");
|
||||
return sysfs_emit(buf, "ready\n");
|
||||
|
||||
return sysfs_emit(buf, "not ready\n");
|
||||
}
|
||||
|
||||
/* Device reset */
|
||||
@@ -1430,7 +1430,7 @@ csio_show_dbg_level(struct device *dev,
|
||||
{
|
||||
struct csio_lnode *ln = shost_priv(class_to_shost(dev));
|
||||
|
||||
return snprintf(buf, PAGE_SIZE, "%x\n", ln->params.log_level);
|
||||
return sysfs_emit(buf, "%x\n", ln->params.log_level);
|
||||
}
|
||||
|
||||
/* Store debug level */
|
||||
@@ -1476,7 +1476,7 @@ csio_show_num_reg_rnodes(struct device *dev,
|
||||
{
|
||||
struct csio_lnode *ln = shost_priv(class_to_shost(dev));
|
||||
|
||||
return snprintf(buf, PAGE_SIZE, "%d\n", ln->num_reg_rnodes);
|
||||
return sysfs_emit(buf, "%d\n", ln->num_reg_rnodes);
|
||||
}
|
||||
|
||||
static DEVICE_ATTR(num_reg_rnodes, S_IRUGO, csio_show_num_reg_rnodes, NULL);
|
||||
|
||||
@@ -132,7 +132,7 @@ static void process_cmd_err(struct afu_cmd *cmd, struct scsi_cmnd *scp)
|
||||
break;
|
||||
case SISL_AFU_RC_OUT_OF_DATA_BUFS:
|
||||
/* Retry */
|
||||
scp->result = (DID_ALLOC_FAILURE << 16);
|
||||
scp->result = (DID_ERROR << 16);
|
||||
break;
|
||||
default:
|
||||
scp->result = (DID_ERROR << 16);
|
||||
|
||||
@@ -831,6 +831,7 @@ struct __packed atto_hba_trace {
|
||||
u32 total_length;
|
||||
u32 trace_mask;
|
||||
u8 reserved2[48];
|
||||
u8 contents[];
|
||||
};
|
||||
|
||||
#define ATTO_FUNC_SCSI_PASS_THRU 0x04
|
||||
|
||||
@@ -947,10 +947,9 @@ static int hba_ioctl_callback(struct esas2r_adapter *a,
|
||||
break;
|
||||
}
|
||||
|
||||
memcpy(trc + 1,
|
||||
memcpy(trc->contents,
|
||||
a->fw_coredump_buff + offset,
|
||||
len);
|
||||
|
||||
hi->data_length = len;
|
||||
} else if (trc->trace_func == ATTO_TRC_TF_RESET) {
|
||||
memset(a->fw_coredump_buff, 0,
|
||||
|
||||
@@ -649,6 +649,7 @@ extern void hisi_sas_phy_enable(struct hisi_hba *hisi_hba, int phy_no,
|
||||
int enable);
|
||||
extern void hisi_sas_phy_down(struct hisi_hba *hisi_hba, int phy_no, int rdy,
|
||||
gfp_t gfp_flags);
|
||||
extern void hisi_sas_phy_bcast(struct hisi_sas_phy *phy);
|
||||
extern void hisi_sas_slot_task_free(struct hisi_hba *hisi_hba,
|
||||
struct sas_task *task,
|
||||
struct hisi_sas_slot *slot);
|
||||
|
||||
@@ -1341,6 +1341,7 @@ static void hisi_sas_refresh_port_id(struct hisi_hba *hisi_hba)
|
||||
|
||||
static void hisi_sas_rescan_topology(struct hisi_hba *hisi_hba, u32 state)
|
||||
{
|
||||
struct sas_ha_struct *sas_ha = &hisi_hba->sha;
|
||||
struct asd_sas_port *_sas_port = NULL;
|
||||
int phy_no;
|
||||
|
||||
@@ -1369,6 +1370,12 @@ static void hisi_sas_rescan_topology(struct hisi_hba *hisi_hba, u32 state)
|
||||
hisi_sas_phy_down(hisi_hba, phy_no, 0, GFP_KERNEL);
|
||||
}
|
||||
}
|
||||
/*
|
||||
* Ensure any bcast events are processed prior to calling async nexus
|
||||
* reset calls from hisi_sas_clear_nexus_ha() ->
|
||||
* hisi_sas_async_I_T_nexus_reset()
|
||||
*/
|
||||
sas_drain_work(sas_ha);
|
||||
}
|
||||
|
||||
static void hisi_sas_reset_init_all_devices(struct hisi_hba *hisi_hba)
|
||||
@@ -1527,9 +1534,9 @@ static int hisi_sas_controller_reset(struct hisi_hba *hisi_hba)
|
||||
clear_bit(HISI_SAS_RESETTING_BIT, &hisi_hba->flags);
|
||||
return rc;
|
||||
}
|
||||
clear_bit(HISI_SAS_HW_FAULT_BIT, &hisi_hba->flags);
|
||||
|
||||
hisi_sas_controller_reset_done(hisi_hba);
|
||||
clear_bit(HISI_SAS_HW_FAULT_BIT, &hisi_hba->flags);
|
||||
dev_info(dev, "controller reset complete\n");
|
||||
|
||||
return 0;
|
||||
@@ -1816,12 +1823,14 @@ static int hisi_sas_clear_nexus_ha(struct sas_ha_struct *sas_ha)
|
||||
struct hisi_hba *hisi_hba = sas_ha->lldd_ha;
|
||||
HISI_SAS_DECLARE_RST_WORK_ON_STACK(r);
|
||||
ASYNC_DOMAIN_EXCLUSIVE(async);
|
||||
int i;
|
||||
int i, ret;
|
||||
|
||||
queue_work(hisi_hba->wq, &r.work);
|
||||
wait_for_completion(r.completion);
|
||||
if (!r.done)
|
||||
return TMF_RESP_FUNC_FAILED;
|
||||
if (!r.done) {
|
||||
ret = TMF_RESP_FUNC_FAILED;
|
||||
goto out;
|
||||
}
|
||||
|
||||
for (i = 0; i < HISI_SAS_MAX_DEVICES; i++) {
|
||||
struct hisi_sas_device *sas_dev = &hisi_hba->devices[i];
|
||||
@@ -1838,7 +1847,9 @@ static int hisi_sas_clear_nexus_ha(struct sas_ha_struct *sas_ha)
|
||||
async_synchronize_full_domain(&async);
|
||||
hisi_sas_release_tasks(hisi_hba);
|
||||
|
||||
return TMF_RESP_FUNC_COMPLETE;
|
||||
ret = TMF_RESP_FUNC_COMPLETE;
|
||||
out:
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int hisi_sas_query_task(struct sas_task *task)
|
||||
@@ -1982,6 +1993,22 @@ void hisi_sas_phy_down(struct hisi_hba *hisi_hba, int phy_no, int rdy,
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(hisi_sas_phy_down);
|
||||
|
||||
void hisi_sas_phy_bcast(struct hisi_sas_phy *phy)
|
||||
{
|
||||
struct asd_sas_phy *sas_phy = &phy->sas_phy;
|
||||
struct hisi_hba *hisi_hba = phy->hisi_hba;
|
||||
struct sas_ha_struct *sha = &hisi_hba->sha;
|
||||
|
||||
if (test_bit(HISI_SAS_RESETTING_BIT, &hisi_hba->flags))
|
||||
return;
|
||||
|
||||
if (test_bit(SAS_HA_FROZEN, &sha->state))
|
||||
return;
|
||||
|
||||
sas_notify_port_event(sas_phy, PORTE_BROADCAST_RCVD, GFP_ATOMIC);
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(hisi_sas_phy_bcast);
|
||||
|
||||
void hisi_sas_sync_irqs(struct hisi_hba *hisi_hba)
|
||||
{
|
||||
int i;
|
||||
|
||||
@@ -1412,9 +1412,7 @@ static irqreturn_t int_bcast_v1_hw(int irq, void *p)
|
||||
goto end;
|
||||
}
|
||||
|
||||
if (!test_bit(HISI_SAS_RESETTING_BIT, &hisi_hba->flags))
|
||||
sas_notify_port_event(sas_phy, PORTE_BROADCAST_RCVD,
|
||||
GFP_ATOMIC);
|
||||
hisi_sas_phy_bcast(phy);
|
||||
|
||||
end:
|
||||
hisi_sas_phy_write32(hisi_hba, phy_no, CHL_INT2,
|
||||
|
||||
@@ -2811,15 +2811,12 @@ static irqreturn_t int_phy_updown_v2_hw(int irq_no, void *p)
|
||||
static void phy_bcast_v2_hw(int phy_no, struct hisi_hba *hisi_hba)
|
||||
{
|
||||
struct hisi_sas_phy *phy = &hisi_hba->phy[phy_no];
|
||||
struct asd_sas_phy *sas_phy = &phy->sas_phy;
|
||||
u32 bcast_status;
|
||||
|
||||
hisi_sas_phy_write32(hisi_hba, phy_no, SL_RX_BCAST_CHK_MSK, 1);
|
||||
bcast_status = hisi_sas_phy_read32(hisi_hba, phy_no, RX_PRIMS_STATUS);
|
||||
if ((bcast_status & RX_BCAST_CHG_MSK) &&
|
||||
!test_bit(HISI_SAS_RESETTING_BIT, &hisi_hba->flags))
|
||||
sas_notify_port_event(sas_phy, PORTE_BROADCAST_RCVD,
|
||||
GFP_ATOMIC);
|
||||
if (bcast_status & RX_BCAST_CHG_MSK)
|
||||
hisi_sas_phy_bcast(phy);
|
||||
hisi_sas_phy_write32(hisi_hba, phy_no, CHL_INT0,
|
||||
CHL_INT0_SL_RX_BCST_ACK_MSK);
|
||||
hisi_sas_phy_write32(hisi_hba, phy_no, SL_RX_BCAST_CHK_MSK, 0);
|
||||
|
||||
@@ -1626,15 +1626,12 @@ static irqreturn_t phy_down_v3_hw(int phy_no, struct hisi_hba *hisi_hba)
|
||||
static irqreturn_t phy_bcast_v3_hw(int phy_no, struct hisi_hba *hisi_hba)
|
||||
{
|
||||
struct hisi_sas_phy *phy = &hisi_hba->phy[phy_no];
|
||||
struct asd_sas_phy *sas_phy = &phy->sas_phy;
|
||||
u32 bcast_status;
|
||||
|
||||
hisi_sas_phy_write32(hisi_hba, phy_no, SL_RX_BCAST_CHK_MSK, 1);
|
||||
bcast_status = hisi_sas_phy_read32(hisi_hba, phy_no, RX_PRIMS_STATUS);
|
||||
if ((bcast_status & RX_BCAST_CHG_MSK) &&
|
||||
!test_bit(HISI_SAS_RESETTING_BIT, &hisi_hba->flags))
|
||||
sas_notify_port_event(sas_phy, PORTE_BROADCAST_RCVD,
|
||||
GFP_ATOMIC);
|
||||
if (bcast_status & RX_BCAST_CHG_MSK)
|
||||
hisi_sas_phy_bcast(phy);
|
||||
hisi_sas_phy_write32(hisi_hba, phy_no, CHL_INT0,
|
||||
CHL_INT0_SL_RX_BCST_ACK_MSK);
|
||||
hisi_sas_phy_write32(hisi_hba, phy_no, SL_RX_BCAST_CHK_MSK, 0);
|
||||
@@ -2786,7 +2783,6 @@ static int slave_configure_v3_hw(struct scsi_device *sdev)
|
||||
struct hisi_hba *hisi_hba = shost_priv(shost);
|
||||
int ret = hisi_sas_slave_configure(sdev);
|
||||
struct device *dev = hisi_hba->dev;
|
||||
unsigned int max_sectors;
|
||||
|
||||
if (ret)
|
||||
return ret;
|
||||
@@ -2802,12 +2798,6 @@ static int slave_configure_v3_hw(struct scsi_device *sdev)
|
||||
}
|
||||
}
|
||||
|
||||
/* Set according to IOMMU IOVA caching limit */
|
||||
max_sectors = min_t(size_t, queue_max_hw_sectors(sdev->request_queue),
|
||||
(PAGE_SIZE * 32) >> SECTOR_SHIFT);
|
||||
|
||||
blk_queue_max_hw_sectors(sdev->request_queue, max_sectors);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
@@ -6233,8 +6233,7 @@ static struct CommandList *cmd_alloc(struct ctlr_info *h)
|
||||
offset = (i + 1) % HPSA_NRESERVED_CMDS;
|
||||
continue;
|
||||
}
|
||||
set_bit(i & (BITS_PER_LONG - 1),
|
||||
h->cmd_pool_bits + (i / BITS_PER_LONG));
|
||||
set_bit(i, h->cmd_pool_bits);
|
||||
break; /* it's ours now. */
|
||||
}
|
||||
hpsa_cmd_partial_init(h, i, c);
|
||||
@@ -6261,8 +6260,7 @@ static void cmd_free(struct ctlr_info *h, struct CommandList *c)
|
||||
int i;
|
||||
|
||||
i = c - h->cmd_pool;
|
||||
clear_bit(i & (BITS_PER_LONG - 1),
|
||||
h->cmd_pool_bits + (i / BITS_PER_LONG));
|
||||
clear_bit(i, h->cmd_pool_bits);
|
||||
}
|
||||
}
|
||||
|
||||
@@ -8030,7 +8028,7 @@ out_disable:
|
||||
|
||||
static void hpsa_free_cmd_pool(struct ctlr_info *h)
|
||||
{
|
||||
kfree(h->cmd_pool_bits);
|
||||
bitmap_free(h->cmd_pool_bits);
|
||||
h->cmd_pool_bits = NULL;
|
||||
if (h->cmd_pool) {
|
||||
dma_free_coherent(&h->pdev->dev,
|
||||
@@ -8052,9 +8050,7 @@ static void hpsa_free_cmd_pool(struct ctlr_info *h)
|
||||
|
||||
static int hpsa_alloc_cmd_pool(struct ctlr_info *h)
|
||||
{
|
||||
h->cmd_pool_bits = kcalloc(DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG),
|
||||
sizeof(unsigned long),
|
||||
GFP_KERNEL);
|
||||
h->cmd_pool_bits = bitmap_zalloc(h->nr_cmds, GFP_KERNEL);
|
||||
h->cmd_pool = dma_alloc_coherent(&h->pdev->dev,
|
||||
h->nr_cmds * sizeof(*h->cmd_pool),
|
||||
&h->cmd_pool_dhandle, GFP_KERNEL);
|
||||
|
||||
@@ -1044,10 +1044,7 @@ static int hptiop_queuecommand_lck(struct scsi_cmnd *scp)
|
||||
req->channel = scp->device->channel;
|
||||
req->target = scp->device->id;
|
||||
req->lun = scp->device->lun;
|
||||
req->header.size = cpu_to_le32(
|
||||
sizeof(struct hpt_iop_request_scsi_command)
|
||||
- sizeof(struct hpt_iopsg)
|
||||
+ sg_count * sizeof(struct hpt_iopsg));
|
||||
req->header.size = cpu_to_le32(struct_size(req, sg_list, sg_count));
|
||||
|
||||
memcpy(req->cdb, scp->cmnd, sizeof(req->cdb));
|
||||
hba->ops->post_req(hba, _req);
|
||||
@@ -1397,8 +1394,8 @@ static int hptiop_probe(struct pci_dev *pcidev, const struct pci_device_id *id)
|
||||
host->cmd_per_lun = le32_to_cpu(iop_config.max_requests);
|
||||
host->max_cmd_len = 16;
|
||||
|
||||
req_size = sizeof(struct hpt_iop_request_scsi_command)
|
||||
+ sizeof(struct hpt_iopsg) * (hba->max_sg_descriptors - 1);
|
||||
req_size = struct_size((struct hpt_iop_request_scsi_command *)0,
|
||||
sg_list, hba->max_sg_descriptors);
|
||||
if ((req_size & 0x1f) != 0)
|
||||
req_size = (req_size + 0x1f) & ~0x1f;
|
||||
|
||||
|
||||
@@ -228,7 +228,7 @@ struct hpt_iop_request_scsi_command {
|
||||
u8 pad1;
|
||||
u8 cdb[16];
|
||||
__le32 dataxfer_length;
|
||||
struct hpt_iopsg sg_list[1];
|
||||
struct hpt_iopsg sg_list[];
|
||||
};
|
||||
|
||||
struct hpt_iop_request_ioctl_command {
|
||||
@@ -237,7 +237,7 @@ struct hpt_iop_request_ioctl_command {
|
||||
__le32 inbuf_size;
|
||||
__le32 outbuf_size;
|
||||
__le32 bytes_returned;
|
||||
u8 buf[1];
|
||||
u8 buf[];
|
||||
/* out data should be put at buf[(inbuf_size+3)&~3] */
|
||||
};
|
||||
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user