You've already forked linux-rockchip
mirror of
https://github.com/armbian/linux-rockchip.git
synced 2026-01-06 11:08:10 -08:00
Merge 5.10.76 into android12-5.10-lts
Changes in 5.10.76
parisc: math-emu: Fix fall-through warnings
xhci: add quirk for host controllers that don't update endpoint DCS
io_uring: fix splice_fd_in checks backport typo
arm: dts: vexpress-v2p-ca9: Fix the SMB unit-address
ARM: dts: at91: sama5d2_som1_ek: disable ISC node by default
block: decode QUEUE_FLAG_HCTX_ACTIVE in debugfs output
xen/x86: prevent PVH type from getting clobbered
drm/amdgpu/display: fix dependencies for DRM_AMD_DC_SI
xtensa: xtfpga: use CONFIG_USE_OF instead of CONFIG_OF
xtensa: xtfpga: Try software restart before simulating CPU reset
NFSD: Keep existing listeners on portlist error
netfilter: xt_IDLETIMER: fix panic that occurs when timer_type has garbage value
dma-debug: fix sg checks in debug_dma_map_sg()
ASoC: wm8960: Fix clock configuration on slave mode
ice: fix getting UDP tunnel entry
netfilter: ip6t_rt: fix rt0_hdr parsing in rt_mt6
netfilter: ipvs: make global sysctl readonly in non-init netns
lan78xx: select CRC32
tcp: md5: Fix overlap between vrf and non-vrf keys
ipv6: When forwarding count rx stats on the orig netdev
net: dsa: lantiq_gswip: fix register definition
NIOS2: irqflags: rename a redefined register name
powerpc/smp: do not decrement idle task preempt count in CPU offline
net: hns3: reset DWRR of unused tc to zero
net: hns3: add limit ets dwrr bandwidth cannot be 0
net: hns3: schedule the polling again when allocation fails
net: hns3: fix vf reset workqueue cannot exit
net: hns3: disable sriov before unload hclge layer
net: stmmac: Fix E2E delay mechanism
e1000e: Fix packet loss on Tiger Lake and later
ice: Add missing E810 device ids
drm/panel: ilitek-ili9881c: Fix sync for Feixin K101-IM2BYL02 panel
net: enetc: fix ethtool counter name for PM0_TERR
can: rcar_can: fix suspend/resume
can: peak_usb: pcan_usb_fd_decode_status(): fix back to ERROR_ACTIVE state notification
can: peak_pci: peak_pci_remove(): fix UAF
can: isotp: isotp_sendmsg(): fix return error on FC timeout on TX path
can: isotp: isotp_sendmsg(): add result check for wait_event_interruptible()
can: j1939: j1939_tp_rxtimer(): fix errant alert in j1939_tp_rxtimer
can: j1939: j1939_netdev_start(): fix UAF for rx_kref of j1939_priv
can: j1939: j1939_xtp_rx_dat_one(): cancel session if receive TP.DT with error length
can: j1939: j1939_xtp_rx_rts_session_new(): abort TP less than 9 bytes
ceph: skip existing superblocks that are blocklisted or shut down when mounting
ceph: fix handling of "meta" errors
ocfs2: fix data corruption after conversion from inline format
ocfs2: mount fails with buffer overflow in strlen
userfaultfd: fix a race between writeprotect and exit_mmap()
elfcore: correct reference to CONFIG_UML
vfs: check fd has read access in kernel_read_file_from_fd()
ALSA: usb-audio: Provide quirk for Sennheiser GSP670 Headset
ALSA: hda/realtek: Add quirk for Clevo PC50HS
ASoC: DAPM: Fix missing kctl change notifications
audit: fix possible null-pointer dereference in audit_filter_rules
net: dsa: mt7530: correct ds->num_ports
powerpc64/idle: Fix SP offsets when saving GPRs
KVM: PPC: Book3S HV: Fix stack handling in idle_kvm_start_guest()
KVM: PPC: Book3S HV: Make idle_kvm_start_guest() return 0 if it went to guest
powerpc/idle: Don't corrupt back chain when going idle
mm, slub: fix mismatch between reconstructed freelist depth and cnt
mm, slub: fix potential memoryleak in kmem_cache_open()
mm, slub: fix incorrect memcg slab count for bulk free
KVM: nVMX: promptly process interrupts delivered while in guest mode
nfc: nci: fix the UAF of rf_conn_info object
isdn: cpai: check ctr->cnr to avoid array index out of bound
netfilter: Kconfig: use 'default y' instead of 'm' for bool config option
selftests: netfilter: remove stray bash debug line
net: bridge: mcast: use multicast_membership_interval for IGMPv3
drm: mxsfb: Fix NULL pointer dereference crash on unload
net: hns3: fix the max tx size according to user manual
gcc-plugins/structleak: add makefile var for disabling structleak
ALSA: hda: intel: Allow repeatedly probing on codec configuration errors
btrfs: deal with errors when checking if a dir entry exists during log replay
net: stmmac: add support for dwmac 3.40a
ARM: dts: spear3xx: Fix gmac node
isdn: mISDN: Fix sleeping function called from invalid context
platform/x86: intel_scu_ipc: Update timeout value in comment
ALSA: hda: avoid write to STATESTS if controller is in reset
libperf tests: Fix test_stat_cpu
perf/x86/msr: Add Sapphire Rapids CPU support
Input: snvs_pwrkey - add clk handling
scsi: iscsi: Fix set_param() handling
scsi: qla2xxx: Fix a memory leak in an error path of qla2x00_process_els()
sched/scs: Reset the shadow stack when idle_task_exit
net: hns3: fix for miscalculation of rx unused desc
scsi: core: Fix shost->cmd_per_lun calculation in scsi_add_host_with_dma()
can: isotp: isotp_sendmsg(): fix TX buffer concurrent access in isotp_sendmsg()
s390/pci: fix zpci_zdev_put() on reserve
bpf, test, cgroup: Use sk_{alloc,free} for test cases
net: mdiobus: Fix memory leak in __mdiobus_register
tracing: Have all levels of checks prevent recursion
e1000e: Separate TGP board type from SPT
selftests: bpf: fix backported ASSERT_FALSE
ARM: 9122/1: select HAVE_FUTEX_CMPXCHG
pinctrl: stm32: use valid pin identifier in stm32_pinctrl_resume()
Linux 5.10.76
Signed-off-by: Greg Kroah-Hartman <gregkh@google.com>
Change-Id: Ia2eae7445f275464721daabb414beadf1e244c56
This commit is contained in:
2
Makefile
2
Makefile
@@ -1,7 +1,7 @@
|
||||
# SPDX-License-Identifier: GPL-2.0
|
||||
VERSION = 5
|
||||
PATCHLEVEL = 10
|
||||
SUBLEVEL = 75
|
||||
SUBLEVEL = 76
|
||||
EXTRAVERSION =
|
||||
NAME = Dare mighty things
|
||||
|
||||
|
||||
@@ -88,6 +88,7 @@ config ARM
|
||||
select HAVE_FTRACE_MCOUNT_RECORD if !XIP_KERNEL
|
||||
select HAVE_FUNCTION_GRAPH_TRACER if !THUMB2_KERNEL && !CC_IS_CLANG
|
||||
select HAVE_FUNCTION_TRACER if !XIP_KERNEL
|
||||
select HAVE_FUTEX_CMPXCHG if FUTEX
|
||||
select HAVE_GCC_PLUGINS
|
||||
select HAVE_HW_BREAKPOINT if PERF_EVENTS && (CPU_V6 || CPU_V6K || CPU_V7)
|
||||
select HAVE_IDE if PCI || ISA || PCMCIA
|
||||
|
||||
@@ -71,7 +71,6 @@
|
||||
isc: isc@f0008000 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_isc_base &pinctrl_isc_data_8bit &pinctrl_isc_data_9_10 &pinctrl_isc_data_11_12>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
qspi1: spi@f0024000 {
|
||||
|
||||
@@ -47,7 +47,7 @@
|
||||
};
|
||||
|
||||
gmac: eth@e0800000 {
|
||||
compatible = "st,spear600-gmac";
|
||||
compatible = "snps,dwmac-3.40a";
|
||||
reg = <0xe0800000 0x8000>;
|
||||
interrupts = <23 22>;
|
||||
interrupt-names = "macirq", "eth_wake_irq";
|
||||
|
||||
@@ -19,7 +19,7 @@
|
||||
*/
|
||||
|
||||
/ {
|
||||
bus@4000000 {
|
||||
bus@40000000 {
|
||||
motherboard {
|
||||
model = "V2M-P1";
|
||||
arm,hbi = <0x190>;
|
||||
|
||||
@@ -295,7 +295,7 @@
|
||||
};
|
||||
};
|
||||
|
||||
smb: bus@4000000 {
|
||||
smb: bus@40000000 {
|
||||
compatible = "simple-bus";
|
||||
|
||||
#address-cells = <2>;
|
||||
|
||||
@@ -9,7 +9,7 @@
|
||||
|
||||
static inline unsigned long arch_local_save_flags(void)
|
||||
{
|
||||
return RDCTL(CTL_STATUS);
|
||||
return RDCTL(CTL_FSTATUS);
|
||||
}
|
||||
|
||||
/*
|
||||
@@ -18,7 +18,7 @@ static inline unsigned long arch_local_save_flags(void)
|
||||
*/
|
||||
static inline void arch_local_irq_restore(unsigned long flags)
|
||||
{
|
||||
WRCTL(CTL_STATUS, flags);
|
||||
WRCTL(CTL_FSTATUS, flags);
|
||||
}
|
||||
|
||||
static inline void arch_local_irq_disable(void)
|
||||
|
||||
@@ -11,7 +11,7 @@
|
||||
#endif
|
||||
|
||||
/* control register numbers */
|
||||
#define CTL_STATUS 0
|
||||
#define CTL_FSTATUS 0
|
||||
#define CTL_ESTATUS 1
|
||||
#define CTL_BSTATUS 2
|
||||
#define CTL_IENABLE 3
|
||||
|
||||
@@ -310,12 +310,15 @@ decode_0c(u_int ir, u_int class, u_int subop, u_int fpregs[])
|
||||
r1 &= ~3;
|
||||
fpregs[t+3] = fpregs[r1+3];
|
||||
fpregs[t+2] = fpregs[r1+2];
|
||||
fallthrough;
|
||||
case 1: /* double */
|
||||
fpregs[t+1] = fpregs[r1+1];
|
||||
fallthrough;
|
||||
case 0: /* single */
|
||||
fpregs[t] = fpregs[r1];
|
||||
return(NOEXCEPTION);
|
||||
}
|
||||
BUG();
|
||||
case 3: /* FABS */
|
||||
switch (fmt) {
|
||||
case 2: /* illegal */
|
||||
@@ -325,13 +328,16 @@ decode_0c(u_int ir, u_int class, u_int subop, u_int fpregs[])
|
||||
r1 &= ~3;
|
||||
fpregs[t+3] = fpregs[r1+3];
|
||||
fpregs[t+2] = fpregs[r1+2];
|
||||
fallthrough;
|
||||
case 1: /* double */
|
||||
fpregs[t+1] = fpregs[r1+1];
|
||||
fallthrough;
|
||||
case 0: /* single */
|
||||
/* copy and clear sign bit */
|
||||
fpregs[t] = fpregs[r1] & 0x7fffffff;
|
||||
return(NOEXCEPTION);
|
||||
}
|
||||
BUG();
|
||||
case 6: /* FNEG */
|
||||
switch (fmt) {
|
||||
case 2: /* illegal */
|
||||
@@ -341,13 +347,16 @@ decode_0c(u_int ir, u_int class, u_int subop, u_int fpregs[])
|
||||
r1 &= ~3;
|
||||
fpregs[t+3] = fpregs[r1+3];
|
||||
fpregs[t+2] = fpregs[r1+2];
|
||||
fallthrough;
|
||||
case 1: /* double */
|
||||
fpregs[t+1] = fpregs[r1+1];
|
||||
fallthrough;
|
||||
case 0: /* single */
|
||||
/* copy and invert sign bit */
|
||||
fpregs[t] = fpregs[r1] ^ 0x80000000;
|
||||
return(NOEXCEPTION);
|
||||
}
|
||||
BUG();
|
||||
case 7: /* FNEGABS */
|
||||
switch (fmt) {
|
||||
case 2: /* illegal */
|
||||
@@ -357,13 +366,16 @@ decode_0c(u_int ir, u_int class, u_int subop, u_int fpregs[])
|
||||
r1 &= ~3;
|
||||
fpregs[t+3] = fpregs[r1+3];
|
||||
fpregs[t+2] = fpregs[r1+2];
|
||||
fallthrough;
|
||||
case 1: /* double */
|
||||
fpregs[t+1] = fpregs[r1+1];
|
||||
fallthrough;
|
||||
case 0: /* single */
|
||||
/* copy and set sign bit */
|
||||
fpregs[t] = fpregs[r1] | 0x80000000;
|
||||
return(NOEXCEPTION);
|
||||
}
|
||||
BUG();
|
||||
case 4: /* FSQRT */
|
||||
switch (fmt) {
|
||||
case 0:
|
||||
@@ -376,6 +388,7 @@ decode_0c(u_int ir, u_int class, u_int subop, u_int fpregs[])
|
||||
case 3: /* quad not implemented */
|
||||
return(MAJOR_0C_EXCP);
|
||||
}
|
||||
BUG();
|
||||
case 5: /* FRND */
|
||||
switch (fmt) {
|
||||
case 0:
|
||||
@@ -389,7 +402,7 @@ decode_0c(u_int ir, u_int class, u_int subop, u_int fpregs[])
|
||||
return(MAJOR_0C_EXCP);
|
||||
}
|
||||
} /* end of switch (subop) */
|
||||
|
||||
BUG();
|
||||
case 1: /* class 1 */
|
||||
df = extru(ir,fpdfpos,2); /* get dest format */
|
||||
if ((df & 2) || (fmt & 2)) {
|
||||
@@ -419,6 +432,7 @@ decode_0c(u_int ir, u_int class, u_int subop, u_int fpregs[])
|
||||
case 3: /* dbl/dbl */
|
||||
return(MAJOR_0C_EXCP);
|
||||
}
|
||||
BUG();
|
||||
case 1: /* FCNVXF */
|
||||
switch(fmt) {
|
||||
case 0: /* sgl/sgl */
|
||||
@@ -434,6 +448,7 @@ decode_0c(u_int ir, u_int class, u_int subop, u_int fpregs[])
|
||||
return(dbl_to_dbl_fcnvxf(&fpregs[r1],0,
|
||||
&fpregs[t],status));
|
||||
}
|
||||
BUG();
|
||||
case 2: /* FCNVFX */
|
||||
switch(fmt) {
|
||||
case 0: /* sgl/sgl */
|
||||
@@ -449,6 +464,7 @@ decode_0c(u_int ir, u_int class, u_int subop, u_int fpregs[])
|
||||
return(dbl_to_dbl_fcnvfx(&fpregs[r1],0,
|
||||
&fpregs[t],status));
|
||||
}
|
||||
BUG();
|
||||
case 3: /* FCNVFXT */
|
||||
switch(fmt) {
|
||||
case 0: /* sgl/sgl */
|
||||
@@ -464,6 +480,7 @@ decode_0c(u_int ir, u_int class, u_int subop, u_int fpregs[])
|
||||
return(dbl_to_dbl_fcnvfxt(&fpregs[r1],0,
|
||||
&fpregs[t],status));
|
||||
}
|
||||
BUG();
|
||||
case 5: /* FCNVUF (PA2.0 only) */
|
||||
switch(fmt) {
|
||||
case 0: /* sgl/sgl */
|
||||
@@ -479,6 +496,7 @@ decode_0c(u_int ir, u_int class, u_int subop, u_int fpregs[])
|
||||
return(dbl_to_dbl_fcnvuf(&fpregs[r1],0,
|
||||
&fpregs[t],status));
|
||||
}
|
||||
BUG();
|
||||
case 6: /* FCNVFU (PA2.0 only) */
|
||||
switch(fmt) {
|
||||
case 0: /* sgl/sgl */
|
||||
@@ -494,6 +512,7 @@ decode_0c(u_int ir, u_int class, u_int subop, u_int fpregs[])
|
||||
return(dbl_to_dbl_fcnvfu(&fpregs[r1],0,
|
||||
&fpregs[t],status));
|
||||
}
|
||||
BUG();
|
||||
case 7: /* FCNVFUT (PA2.0 only) */
|
||||
switch(fmt) {
|
||||
case 0: /* sgl/sgl */
|
||||
@@ -509,10 +528,11 @@ decode_0c(u_int ir, u_int class, u_int subop, u_int fpregs[])
|
||||
return(dbl_to_dbl_fcnvfut(&fpregs[r1],0,
|
||||
&fpregs[t],status));
|
||||
}
|
||||
BUG();
|
||||
case 4: /* undefined */
|
||||
return(MAJOR_0C_EXCP);
|
||||
} /* end of switch subop */
|
||||
|
||||
BUG();
|
||||
case 2: /* class 2 */
|
||||
fpu_type_flags=fpregs[FPU_TYPE_FLAG_POS];
|
||||
r2 = extru(ir, fpr2pos, 5) * sizeof(double)/sizeof(u_int);
|
||||
@@ -590,6 +610,7 @@ decode_0c(u_int ir, u_int class, u_int subop, u_int fpregs[])
|
||||
case 3: /* quad not implemented */
|
||||
return(MAJOR_0C_EXCP);
|
||||
}
|
||||
BUG();
|
||||
case 1: /* FTEST */
|
||||
switch (fmt) {
|
||||
case 0:
|
||||
@@ -609,8 +630,10 @@ decode_0c(u_int ir, u_int class, u_int subop, u_int fpregs[])
|
||||
case 3:
|
||||
return(MAJOR_0C_EXCP);
|
||||
}
|
||||
BUG();
|
||||
} /* end of switch subop */
|
||||
} /* end of else for PA1.0 & PA1.1 */
|
||||
BUG();
|
||||
case 3: /* class 3 */
|
||||
r2 = extru(ir,fpr2pos,5) * sizeof(double)/sizeof(u_int);
|
||||
if (r2 == 0)
|
||||
@@ -633,6 +656,7 @@ decode_0c(u_int ir, u_int class, u_int subop, u_int fpregs[])
|
||||
case 3: /* quad not implemented */
|
||||
return(MAJOR_0C_EXCP);
|
||||
}
|
||||
BUG();
|
||||
case 1: /* FSUB */
|
||||
switch (fmt) {
|
||||
case 0:
|
||||
@@ -645,6 +669,7 @@ decode_0c(u_int ir, u_int class, u_int subop, u_int fpregs[])
|
||||
case 3: /* quad not implemented */
|
||||
return(MAJOR_0C_EXCP);
|
||||
}
|
||||
BUG();
|
||||
case 2: /* FMPY */
|
||||
switch (fmt) {
|
||||
case 0:
|
||||
@@ -657,6 +682,7 @@ decode_0c(u_int ir, u_int class, u_int subop, u_int fpregs[])
|
||||
case 3: /* quad not implemented */
|
||||
return(MAJOR_0C_EXCP);
|
||||
}
|
||||
BUG();
|
||||
case 3: /* FDIV */
|
||||
switch (fmt) {
|
||||
case 0:
|
||||
@@ -669,6 +695,7 @@ decode_0c(u_int ir, u_int class, u_int subop, u_int fpregs[])
|
||||
case 3: /* quad not implemented */
|
||||
return(MAJOR_0C_EXCP);
|
||||
}
|
||||
BUG();
|
||||
case 4: /* FREM */
|
||||
switch (fmt) {
|
||||
case 0:
|
||||
@@ -681,6 +708,7 @@ decode_0c(u_int ir, u_int class, u_int subop, u_int fpregs[])
|
||||
case 3: /* quad not implemented */
|
||||
return(MAJOR_0C_EXCP);
|
||||
}
|
||||
BUG();
|
||||
} /* end of class 3 switch */
|
||||
} /* end of switch(class) */
|
||||
|
||||
@@ -736,10 +764,12 @@ u_int fpregs[];
|
||||
return(MAJOR_0E_EXCP);
|
||||
case 1: /* double */
|
||||
fpregs[t+1] = fpregs[r1+1];
|
||||
fallthrough;
|
||||
case 0: /* single */
|
||||
fpregs[t] = fpregs[r1];
|
||||
return(NOEXCEPTION);
|
||||
}
|
||||
BUG();
|
||||
case 3: /* FABS */
|
||||
switch (fmt) {
|
||||
case 2:
|
||||
@@ -747,10 +777,12 @@ u_int fpregs[];
|
||||
return(MAJOR_0E_EXCP);
|
||||
case 1: /* double */
|
||||
fpregs[t+1] = fpregs[r1+1];
|
||||
fallthrough;
|
||||
case 0: /* single */
|
||||
fpregs[t] = fpregs[r1] & 0x7fffffff;
|
||||
return(NOEXCEPTION);
|
||||
}
|
||||
BUG();
|
||||
case 6: /* FNEG */
|
||||
switch (fmt) {
|
||||
case 2:
|
||||
@@ -758,10 +790,12 @@ u_int fpregs[];
|
||||
return(MAJOR_0E_EXCP);
|
||||
case 1: /* double */
|
||||
fpregs[t+1] = fpregs[r1+1];
|
||||
fallthrough;
|
||||
case 0: /* single */
|
||||
fpregs[t] = fpregs[r1] ^ 0x80000000;
|
||||
return(NOEXCEPTION);
|
||||
}
|
||||
BUG();
|
||||
case 7: /* FNEGABS */
|
||||
switch (fmt) {
|
||||
case 2:
|
||||
@@ -769,10 +803,12 @@ u_int fpregs[];
|
||||
return(MAJOR_0E_EXCP);
|
||||
case 1: /* double */
|
||||
fpregs[t+1] = fpregs[r1+1];
|
||||
fallthrough;
|
||||
case 0: /* single */
|
||||
fpregs[t] = fpregs[r1] | 0x80000000;
|
||||
return(NOEXCEPTION);
|
||||
}
|
||||
BUG();
|
||||
case 4: /* FSQRT */
|
||||
switch (fmt) {
|
||||
case 0:
|
||||
@@ -785,6 +821,7 @@ u_int fpregs[];
|
||||
case 3:
|
||||
return(MAJOR_0E_EXCP);
|
||||
}
|
||||
BUG();
|
||||
case 5: /* FRMD */
|
||||
switch (fmt) {
|
||||
case 0:
|
||||
@@ -798,7 +835,7 @@ u_int fpregs[];
|
||||
return(MAJOR_0E_EXCP);
|
||||
}
|
||||
} /* end of switch (subop */
|
||||
|
||||
BUG();
|
||||
case 1: /* class 1 */
|
||||
df = extru(ir,fpdfpos,2); /* get dest format */
|
||||
/*
|
||||
@@ -826,6 +863,7 @@ u_int fpregs[];
|
||||
case 3: /* dbl/dbl */
|
||||
return(MAJOR_0E_EXCP);
|
||||
}
|
||||
BUG();
|
||||
case 1: /* FCNVXF */
|
||||
switch(fmt) {
|
||||
case 0: /* sgl/sgl */
|
||||
@@ -841,6 +879,7 @@ u_int fpregs[];
|
||||
return(dbl_to_dbl_fcnvxf(&fpregs[r1],0,
|
||||
&fpregs[t],status));
|
||||
}
|
||||
BUG();
|
||||
case 2: /* FCNVFX */
|
||||
switch(fmt) {
|
||||
case 0: /* sgl/sgl */
|
||||
@@ -856,6 +895,7 @@ u_int fpregs[];
|
||||
return(dbl_to_dbl_fcnvfx(&fpregs[r1],0,
|
||||
&fpregs[t],status));
|
||||
}
|
||||
BUG();
|
||||
case 3: /* FCNVFXT */
|
||||
switch(fmt) {
|
||||
case 0: /* sgl/sgl */
|
||||
@@ -871,6 +911,7 @@ u_int fpregs[];
|
||||
return(dbl_to_dbl_fcnvfxt(&fpregs[r1],0,
|
||||
&fpregs[t],status));
|
||||
}
|
||||
BUG();
|
||||
case 5: /* FCNVUF (PA2.0 only) */
|
||||
switch(fmt) {
|
||||
case 0: /* sgl/sgl */
|
||||
@@ -886,6 +927,7 @@ u_int fpregs[];
|
||||
return(dbl_to_dbl_fcnvuf(&fpregs[r1],0,
|
||||
&fpregs[t],status));
|
||||
}
|
||||
BUG();
|
||||
case 6: /* FCNVFU (PA2.0 only) */
|
||||
switch(fmt) {
|
||||
case 0: /* sgl/sgl */
|
||||
@@ -901,6 +943,7 @@ u_int fpregs[];
|
||||
return(dbl_to_dbl_fcnvfu(&fpregs[r1],0,
|
||||
&fpregs[t],status));
|
||||
}
|
||||
BUG();
|
||||
case 7: /* FCNVFUT (PA2.0 only) */
|
||||
switch(fmt) {
|
||||
case 0: /* sgl/sgl */
|
||||
@@ -916,9 +959,11 @@ u_int fpregs[];
|
||||
return(dbl_to_dbl_fcnvfut(&fpregs[r1],0,
|
||||
&fpregs[t],status));
|
||||
}
|
||||
BUG();
|
||||
case 4: /* undefined */
|
||||
return(MAJOR_0C_EXCP);
|
||||
} /* end of switch subop */
|
||||
BUG();
|
||||
case 2: /* class 2 */
|
||||
/*
|
||||
* Be careful out there.
|
||||
@@ -994,6 +1039,7 @@ u_int fpregs[];
|
||||
}
|
||||
} /* end of switch subop */
|
||||
} /* end of else for PA1.0 & PA1.1 */
|
||||
BUG();
|
||||
case 3: /* class 3 */
|
||||
/*
|
||||
* Be careful out there.
|
||||
@@ -1026,6 +1072,7 @@ u_int fpregs[];
|
||||
return(dbl_fadd(&fpregs[r1],&fpregs[r2],
|
||||
&fpregs[t],status));
|
||||
}
|
||||
BUG();
|
||||
case 1: /* FSUB */
|
||||
switch (fmt) {
|
||||
case 0:
|
||||
@@ -1035,6 +1082,7 @@ u_int fpregs[];
|
||||
return(dbl_fsub(&fpregs[r1],&fpregs[r2],
|
||||
&fpregs[t],status));
|
||||
}
|
||||
BUG();
|
||||
case 2: /* FMPY or XMPYU */
|
||||
/*
|
||||
* check for integer multiply (x bit set)
|
||||
@@ -1071,6 +1119,7 @@ u_int fpregs[];
|
||||
&fpregs[r2],&fpregs[t],status));
|
||||
}
|
||||
}
|
||||
BUG();
|
||||
case 3: /* FDIV */
|
||||
switch (fmt) {
|
||||
case 0:
|
||||
@@ -1080,6 +1129,7 @@ u_int fpregs[];
|
||||
return(dbl_fdiv(&fpregs[r1],&fpregs[r2],
|
||||
&fpregs[t],status));
|
||||
}
|
||||
BUG();
|
||||
case 4: /* FREM */
|
||||
switch (fmt) {
|
||||
case 0:
|
||||
|
||||
@@ -52,28 +52,32 @@ _GLOBAL(isa300_idle_stop_mayloss)
|
||||
std r1,PACAR1(r13)
|
||||
mflr r4
|
||||
mfcr r5
|
||||
/* use stack red zone rather than a new frame for saving regs */
|
||||
std r2,-8*0(r1)
|
||||
std r14,-8*1(r1)
|
||||
std r15,-8*2(r1)
|
||||
std r16,-8*3(r1)
|
||||
std r17,-8*4(r1)
|
||||
std r18,-8*5(r1)
|
||||
std r19,-8*6(r1)
|
||||
std r20,-8*7(r1)
|
||||
std r21,-8*8(r1)
|
||||
std r22,-8*9(r1)
|
||||
std r23,-8*10(r1)
|
||||
std r24,-8*11(r1)
|
||||
std r25,-8*12(r1)
|
||||
std r26,-8*13(r1)
|
||||
std r27,-8*14(r1)
|
||||
std r28,-8*15(r1)
|
||||
std r29,-8*16(r1)
|
||||
std r30,-8*17(r1)
|
||||
std r31,-8*18(r1)
|
||||
std r4,-8*19(r1)
|
||||
std r5,-8*20(r1)
|
||||
/*
|
||||
* Use the stack red zone rather than a new frame for saving regs since
|
||||
* in the case of no GPR loss the wakeup code branches directly back to
|
||||
* the caller without deallocating the stack frame first.
|
||||
*/
|
||||
std r2,-8*1(r1)
|
||||
std r14,-8*2(r1)
|
||||
std r15,-8*3(r1)
|
||||
std r16,-8*4(r1)
|
||||
std r17,-8*5(r1)
|
||||
std r18,-8*6(r1)
|
||||
std r19,-8*7(r1)
|
||||
std r20,-8*8(r1)
|
||||
std r21,-8*9(r1)
|
||||
std r22,-8*10(r1)
|
||||
std r23,-8*11(r1)
|
||||
std r24,-8*12(r1)
|
||||
std r25,-8*13(r1)
|
||||
std r26,-8*14(r1)
|
||||
std r27,-8*15(r1)
|
||||
std r28,-8*16(r1)
|
||||
std r29,-8*17(r1)
|
||||
std r30,-8*18(r1)
|
||||
std r31,-8*19(r1)
|
||||
std r4,-8*20(r1)
|
||||
std r5,-8*21(r1)
|
||||
/* 168 bytes */
|
||||
PPC_STOP
|
||||
b . /* catch bugs */
|
||||
@@ -89,8 +93,8 @@ _GLOBAL(isa300_idle_stop_mayloss)
|
||||
*/
|
||||
_GLOBAL(idle_return_gpr_loss)
|
||||
ld r1,PACAR1(r13)
|
||||
ld r4,-8*19(r1)
|
||||
ld r5,-8*20(r1)
|
||||
ld r4,-8*20(r1)
|
||||
ld r5,-8*21(r1)
|
||||
mtlr r4
|
||||
mtcr r5
|
||||
/*
|
||||
@@ -98,38 +102,40 @@ _GLOBAL(idle_return_gpr_loss)
|
||||
* from PACATOC. This could be avoided for that less common case
|
||||
* if KVM saved its r2.
|
||||
*/
|
||||
ld r2,-8*0(r1)
|
||||
ld r14,-8*1(r1)
|
||||
ld r15,-8*2(r1)
|
||||
ld r16,-8*3(r1)
|
||||
ld r17,-8*4(r1)
|
||||
ld r18,-8*5(r1)
|
||||
ld r19,-8*6(r1)
|
||||
ld r20,-8*7(r1)
|
||||
ld r21,-8*8(r1)
|
||||
ld r22,-8*9(r1)
|
||||
ld r23,-8*10(r1)
|
||||
ld r24,-8*11(r1)
|
||||
ld r25,-8*12(r1)
|
||||
ld r26,-8*13(r1)
|
||||
ld r27,-8*14(r1)
|
||||
ld r28,-8*15(r1)
|
||||
ld r29,-8*16(r1)
|
||||
ld r30,-8*17(r1)
|
||||
ld r31,-8*18(r1)
|
||||
ld r2,-8*1(r1)
|
||||
ld r14,-8*2(r1)
|
||||
ld r15,-8*3(r1)
|
||||
ld r16,-8*4(r1)
|
||||
ld r17,-8*5(r1)
|
||||
ld r18,-8*6(r1)
|
||||
ld r19,-8*7(r1)
|
||||
ld r20,-8*8(r1)
|
||||
ld r21,-8*9(r1)
|
||||
ld r22,-8*10(r1)
|
||||
ld r23,-8*11(r1)
|
||||
ld r24,-8*12(r1)
|
||||
ld r25,-8*13(r1)
|
||||
ld r26,-8*14(r1)
|
||||
ld r27,-8*15(r1)
|
||||
ld r28,-8*16(r1)
|
||||
ld r29,-8*17(r1)
|
||||
ld r30,-8*18(r1)
|
||||
ld r31,-8*19(r1)
|
||||
blr
|
||||
|
||||
/*
|
||||
* This is the sequence required to execute idle instructions, as
|
||||
* specified in ISA v2.07 (and earlier). MSR[IR] and MSR[DR] must be 0.
|
||||
*
|
||||
* The 0(r1) slot is used to save r2 in isa206, so use that here.
|
||||
* We have to store a GPR somewhere, ptesync, then reload it, and create
|
||||
* a false dependency on the result of the load. It doesn't matter which
|
||||
* GPR we store, or where we store it. We have already stored r2 to the
|
||||
* stack at -8(r1) in isa206_idle_insn_mayloss, so use that.
|
||||
*/
|
||||
#define IDLE_STATE_ENTER_SEQ_NORET(IDLE_INST) \
|
||||
/* Magic NAP/SLEEP/WINKLE mode enter sequence */ \
|
||||
std r2,0(r1); \
|
||||
std r2,-8(r1); \
|
||||
ptesync; \
|
||||
ld r2,0(r1); \
|
||||
ld r2,-8(r1); \
|
||||
236: cmpd cr0,r2,r2; \
|
||||
bne 236b; \
|
||||
IDLE_INST; \
|
||||
@@ -154,28 +160,32 @@ _GLOBAL(isa206_idle_insn_mayloss)
|
||||
std r1,PACAR1(r13)
|
||||
mflr r4
|
||||
mfcr r5
|
||||
/* use stack red zone rather than a new frame for saving regs */
|
||||
std r2,-8*0(r1)
|
||||
std r14,-8*1(r1)
|
||||
std r15,-8*2(r1)
|
||||
std r16,-8*3(r1)
|
||||
std r17,-8*4(r1)
|
||||
std r18,-8*5(r1)
|
||||
std r19,-8*6(r1)
|
||||
std r20,-8*7(r1)
|
||||
std r21,-8*8(r1)
|
||||
std r22,-8*9(r1)
|
||||
std r23,-8*10(r1)
|
||||
std r24,-8*11(r1)
|
||||
std r25,-8*12(r1)
|
||||
std r26,-8*13(r1)
|
||||
std r27,-8*14(r1)
|
||||
std r28,-8*15(r1)
|
||||
std r29,-8*16(r1)
|
||||
std r30,-8*17(r1)
|
||||
std r31,-8*18(r1)
|
||||
std r4,-8*19(r1)
|
||||
std r5,-8*20(r1)
|
||||
/*
|
||||
* Use the stack red zone rather than a new frame for saving regs since
|
||||
* in the case of no GPR loss the wakeup code branches directly back to
|
||||
* the caller without deallocating the stack frame first.
|
||||
*/
|
||||
std r2,-8*1(r1)
|
||||
std r14,-8*2(r1)
|
||||
std r15,-8*3(r1)
|
||||
std r16,-8*4(r1)
|
||||
std r17,-8*5(r1)
|
||||
std r18,-8*6(r1)
|
||||
std r19,-8*7(r1)
|
||||
std r20,-8*8(r1)
|
||||
std r21,-8*9(r1)
|
||||
std r22,-8*10(r1)
|
||||
std r23,-8*11(r1)
|
||||
std r24,-8*12(r1)
|
||||
std r25,-8*13(r1)
|
||||
std r26,-8*14(r1)
|
||||
std r27,-8*15(r1)
|
||||
std r28,-8*16(r1)
|
||||
std r29,-8*17(r1)
|
||||
std r30,-8*18(r1)
|
||||
std r31,-8*19(r1)
|
||||
std r4,-8*20(r1)
|
||||
std r5,-8*21(r1)
|
||||
cmpwi r3,PNV_THREAD_NAP
|
||||
bne 1f
|
||||
IDLE_STATE_ENTER_SEQ_NORET(PPC_NAP)
|
||||
|
||||
@@ -1578,8 +1578,6 @@ void __cpu_die(unsigned int cpu)
|
||||
|
||||
void arch_cpu_idle_dead(void)
|
||||
{
|
||||
sched_preempt_enable_no_resched();
|
||||
|
||||
/*
|
||||
* Disable on the down path. This will be re-enabled by
|
||||
* start_secondary() via start_secondary_resume() below
|
||||
|
||||
@@ -292,13 +292,16 @@ kvm_novcpu_exit:
|
||||
* r3 contains the SRR1 wakeup value, SRR1 is trashed.
|
||||
*/
|
||||
_GLOBAL(idle_kvm_start_guest)
|
||||
ld r4,PACAEMERGSP(r13)
|
||||
mfcr r5
|
||||
mflr r0
|
||||
std r1,0(r4)
|
||||
std r5,8(r4)
|
||||
std r0,16(r4)
|
||||
subi r1,r4,STACK_FRAME_OVERHEAD
|
||||
std r5, 8(r1) // Save CR in caller's frame
|
||||
std r0, 16(r1) // Save LR in caller's frame
|
||||
// Create frame on emergency stack
|
||||
ld r4, PACAEMERGSP(r13)
|
||||
stdu r1, -SWITCH_FRAME_SIZE(r4)
|
||||
// Switch to new frame on emergency stack
|
||||
mr r1, r4
|
||||
std r3, 32(r1) // Save SRR1 wakeup value
|
||||
SAVE_NVGPRS(r1)
|
||||
|
||||
/*
|
||||
@@ -350,6 +353,10 @@ kvm_unsplit_wakeup:
|
||||
|
||||
kvm_secondary_got_guest:
|
||||
|
||||
// About to go to guest, clear saved SRR1
|
||||
li r0, 0
|
||||
std r0, 32(r1)
|
||||
|
||||
/* Set HSTATE_DSCR(r13) to something sensible */
|
||||
ld r6, PACA_DSCR_DEFAULT(r13)
|
||||
std r6, HSTATE_DSCR(r13)
|
||||
@@ -441,13 +448,12 @@ kvm_no_guest:
|
||||
mfspr r4, SPRN_LPCR
|
||||
rlwimi r4, r3, 0, LPCR_PECE0 | LPCR_PECE1
|
||||
mtspr SPRN_LPCR, r4
|
||||
/* set up r3 for return */
|
||||
mfspr r3,SPRN_SRR1
|
||||
// Return SRR1 wakeup value, or 0 if we went into the guest
|
||||
ld r3, 32(r1)
|
||||
REST_NVGPRS(r1)
|
||||
addi r1, r1, STACK_FRAME_OVERHEAD
|
||||
ld r0, 16(r1)
|
||||
ld r5, 8(r1)
|
||||
ld r1, 0(r1)
|
||||
ld r1, 0(r1) // Switch back to caller stack
|
||||
ld r0, 16(r1) // Reload LR
|
||||
ld r5, 8(r1) // Reload CR
|
||||
mtlr r0
|
||||
mtcr r5
|
||||
blr
|
||||
|
||||
@@ -205,6 +205,9 @@ int zpci_create_device(u32 fid, u32 fh, enum zpci_state state);
|
||||
void zpci_remove_device(struct zpci_dev *zdev, bool set_error);
|
||||
int zpci_enable_device(struct zpci_dev *);
|
||||
int zpci_disable_device(struct zpci_dev *);
|
||||
void zpci_device_reserved(struct zpci_dev *zdev);
|
||||
bool zpci_is_device_configured(struct zpci_dev *zdev);
|
||||
|
||||
int zpci_register_ioat(struct zpci_dev *, u8, u64, u64, u64);
|
||||
int zpci_unregister_ioat(struct zpci_dev *, u8);
|
||||
void zpci_remove_reserved_devices(void);
|
||||
|
||||
@@ -92,7 +92,7 @@ void zpci_remove_reserved_devices(void)
|
||||
spin_unlock(&zpci_list_lock);
|
||||
|
||||
list_for_each_entry_safe(zdev, tmp, &remove, entry)
|
||||
zpci_zdev_put(zdev);
|
||||
zpci_device_reserved(zdev);
|
||||
}
|
||||
|
||||
int pci_domain_nr(struct pci_bus *bus)
|
||||
@@ -787,6 +787,39 @@ error:
|
||||
return rc;
|
||||
}
|
||||
|
||||
bool zpci_is_device_configured(struct zpci_dev *zdev)
|
||||
{
|
||||
enum zpci_state state = zdev->state;
|
||||
|
||||
return state != ZPCI_FN_STATE_RESERVED &&
|
||||
state != ZPCI_FN_STATE_STANDBY;
|
||||
}
|
||||
|
||||
/**
|
||||
* zpci_device_reserved() - Mark device as resverved
|
||||
* @zdev: the zpci_dev that was reserved
|
||||
*
|
||||
* Handle the case that a given zPCI function was reserved by another system.
|
||||
* After a call to this function the zpci_dev can not be found via
|
||||
* get_zdev_by_fid() anymore but may still be accessible via existing
|
||||
* references though it will not be functional anymore.
|
||||
*/
|
||||
void zpci_device_reserved(struct zpci_dev *zdev)
|
||||
{
|
||||
if (zdev->has_hp_slot)
|
||||
zpci_exit_slot(zdev);
|
||||
/*
|
||||
* Remove device from zpci_list as it is going away. This also
|
||||
* makes sure we ignore subsequent zPCI events for this device.
|
||||
*/
|
||||
spin_lock(&zpci_list_lock);
|
||||
list_del(&zdev->entry);
|
||||
spin_unlock(&zpci_list_lock);
|
||||
zdev->state = ZPCI_FN_STATE_RESERVED;
|
||||
zpci_dbg(3, "rsv fid:%x\n", zdev->fid);
|
||||
zpci_zdev_put(zdev);
|
||||
}
|
||||
|
||||
void zpci_release_device(struct kref *kref)
|
||||
{
|
||||
struct zpci_dev *zdev = container_of(kref, struct zpci_dev, kref);
|
||||
@@ -802,6 +835,12 @@ void zpci_release_device(struct kref *kref)
|
||||
case ZPCI_FN_STATE_STANDBY:
|
||||
if (zdev->has_hp_slot)
|
||||
zpci_exit_slot(zdev);
|
||||
spin_lock(&zpci_list_lock);
|
||||
list_del(&zdev->entry);
|
||||
spin_unlock(&zpci_list_lock);
|
||||
zpci_dbg(3, "rsv fid:%x\n", zdev->fid);
|
||||
fallthrough;
|
||||
case ZPCI_FN_STATE_RESERVED:
|
||||
zpci_cleanup_bus_resources(zdev);
|
||||
zpci_bus_device_unregister(zdev);
|
||||
zpci_destroy_iommu(zdev);
|
||||
@@ -809,10 +848,6 @@ void zpci_release_device(struct kref *kref)
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
spin_lock(&zpci_list_lock);
|
||||
list_del(&zdev->entry);
|
||||
spin_unlock(&zpci_list_lock);
|
||||
zpci_dbg(3, "rem fid:%x\n", zdev->fid);
|
||||
kfree(zdev);
|
||||
}
|
||||
|
||||
@@ -146,7 +146,7 @@ static void __zpci_event_availability(struct zpci_ccdf_avail *ccdf)
|
||||
zdev->state = ZPCI_FN_STATE_STANDBY;
|
||||
if (!clp_get_state(ccdf->fid, &state) &&
|
||||
state == ZPCI_FN_STATE_RESERVED) {
|
||||
zpci_zdev_put(zdev);
|
||||
zpci_device_reserved(zdev);
|
||||
}
|
||||
break;
|
||||
case 0x0306: /* 0x308 or 0x302 for multiple devices */
|
||||
@@ -156,7 +156,7 @@ static void __zpci_event_availability(struct zpci_ccdf_avail *ccdf)
|
||||
case 0x0308: /* Standby -> Reserved */
|
||||
if (!zdev)
|
||||
break;
|
||||
zpci_zdev_put(zdev);
|
||||
zpci_device_reserved(zdev);
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
|
||||
@@ -68,6 +68,7 @@ static bool test_intel(int idx, void *data)
|
||||
case INTEL_FAM6_BROADWELL_D:
|
||||
case INTEL_FAM6_BROADWELL_G:
|
||||
case INTEL_FAM6_BROADWELL_X:
|
||||
case INTEL_FAM6_SAPPHIRERAPIDS_X:
|
||||
|
||||
case INTEL_FAM6_ATOM_SILVERMONT:
|
||||
case INTEL_FAM6_ATOM_SILVERMONT_D:
|
||||
|
||||
@@ -6316,18 +6316,13 @@ static int vmx_sync_pir_to_irr(struct kvm_vcpu *vcpu)
|
||||
|
||||
/*
|
||||
* If we are running L2 and L1 has a new pending interrupt
|
||||
* which can be injected, we should re-evaluate
|
||||
* what should be done with this new L1 interrupt.
|
||||
* If L1 intercepts external-interrupts, we should
|
||||
* exit from L2 to L1. Otherwise, interrupt should be
|
||||
* delivered directly to L2.
|
||||
* which can be injected, this may cause a vmexit or it may
|
||||
* be injected into L2. Either way, this interrupt will be
|
||||
* processed via KVM_REQ_EVENT, not RVI, because we do not use
|
||||
* virtual interrupt delivery to inject L1 interrupts into L2.
|
||||
*/
|
||||
if (is_guest_mode(vcpu) && max_irr_updated) {
|
||||
if (nested_exit_on_intr(vcpu))
|
||||
kvm_vcpu_exiting_guest_mode(vcpu);
|
||||
else
|
||||
kvm_make_request(KVM_REQ_EVENT, vcpu);
|
||||
}
|
||||
if (is_guest_mode(vcpu) && max_irr_updated)
|
||||
kvm_make_request(KVM_REQ_EVENT, vcpu);
|
||||
} else {
|
||||
max_irr = kvm_lapic_find_highest_irr(vcpu);
|
||||
}
|
||||
|
||||
@@ -51,9 +51,6 @@ DEFINE_PER_CPU(struct vcpu_info, xen_vcpu_info);
|
||||
DEFINE_PER_CPU(uint32_t, xen_vcpu_id);
|
||||
EXPORT_PER_CPU_SYMBOL(xen_vcpu_id);
|
||||
|
||||
enum xen_domain_type xen_domain_type = XEN_NATIVE;
|
||||
EXPORT_SYMBOL_GPL(xen_domain_type);
|
||||
|
||||
unsigned long *machine_to_phys_mapping = (void *)MACH2PHYS_VIRT_START;
|
||||
EXPORT_SYMBOL(machine_to_phys_mapping);
|
||||
unsigned long machine_to_phys_nr;
|
||||
@@ -68,9 +65,11 @@ __read_mostly int xen_have_vector_callback;
|
||||
EXPORT_SYMBOL_GPL(xen_have_vector_callback);
|
||||
|
||||
/*
|
||||
* NB: needs to live in .data because it's used by xen_prepare_pvh which runs
|
||||
* before clearing the bss.
|
||||
* NB: These need to live in .data or alike because they're used by
|
||||
* xen_prepare_pvh() which runs before clearing the bss.
|
||||
*/
|
||||
enum xen_domain_type __ro_after_init xen_domain_type = XEN_NATIVE;
|
||||
EXPORT_SYMBOL_GPL(xen_domain_type);
|
||||
uint32_t xen_start_flags __section(".data") = 0;
|
||||
EXPORT_SYMBOL(xen_start_flags);
|
||||
|
||||
|
||||
@@ -51,8 +51,12 @@ void platform_power_off(void)
|
||||
|
||||
void platform_restart(void)
|
||||
{
|
||||
/* Flush and reset the mmu, simulate a processor reset, and
|
||||
* jump to the reset vector. */
|
||||
/* Try software reset first. */
|
||||
WRITE_ONCE(*(u32 *)XTFPGA_SWRST_VADDR, 0xdead);
|
||||
|
||||
/* If software reset did not work, flush and reset the mmu,
|
||||
* simulate a processor reset, and jump to the reset vector.
|
||||
*/
|
||||
cpu_reset();
|
||||
/* control never gets here */
|
||||
}
|
||||
@@ -66,7 +70,7 @@ void __init platform_calibrate_ccount(void)
|
||||
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_OF
|
||||
#ifdef CONFIG_USE_OF
|
||||
|
||||
static void __init xtfpga_clk_setup(struct device_node *np)
|
||||
{
|
||||
@@ -284,4 +288,4 @@ static int __init xtavnet_init(void)
|
||||
*/
|
||||
arch_initcall(xtavnet_init);
|
||||
|
||||
#endif /* CONFIG_OF */
|
||||
#endif /* CONFIG_USE_OF */
|
||||
|
||||
@@ -129,6 +129,7 @@ static const char *const blk_queue_flag_name[] = {
|
||||
QUEUE_FLAG_NAME(PCI_P2PDMA),
|
||||
QUEUE_FLAG_NAME(ZONE_RESETALL),
|
||||
QUEUE_FLAG_NAME(RQ_ALLOC_TIME),
|
||||
QUEUE_FLAG_NAME(HCTX_ACTIVE),
|
||||
QUEUE_FLAG_NAME(NOWAIT),
|
||||
};
|
||||
#undef QUEUE_FLAG_NAME
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user