From 29918d51d62ef05126f3ff2ba1a91c66966e55fe Mon Sep 17 00:00:00 2001 From: Finley Xiao Date: Fri, 11 Oct 2024 11:48:33 +0800 Subject: [PATCH] clk: rockchip: rk3506: Add ROCKCHIP_PLL_ALLOW_POWER_DOWN flag for v1pll Change-Id: Ieb991acf5497aefd4ad041f415bd27f19af4b10d Signed-off-by: Finley Xiao --- drivers/clk/rockchip/clk-rk3506.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/clk/rockchip/clk-rk3506.c b/drivers/clk/rockchip/clk-rk3506.c index b1162aba82f9..df431e9b4202 100644 --- a/drivers/clk/rockchip/clk-rk3506.c +++ b/drivers/clk/rockchip/clk-rk3506.c @@ -161,7 +161,8 @@ static struct rockchip_pll_clock rk3506_pll_clks[] __initdata = { RK3506_MODE_CON, 2, 0, 0, rk3506_pll_rates), [v1pll] = PLL(pll_rk3328, PLL_V1PLL, "v1pll", mux_pll_p, 0, RK3506_PLL_CON(16), - RK3506_MODE_CON, 4, 1, 0, rk3506_pll_rates), + RK3506_MODE_CON, 4, 1, + ROCKCHIP_PLL_ALLOW_POWER_DOWN, rk3506_pll_rates), }; static struct rockchip_clk_branch rk3506_armclk __initdata =