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[media] bdisp: 2D blitter driver using v4l2 mem2mem framework
This v4l2 mem2mem driver is a 2D blitter for STMicroelectronics SoC. It uses the v4l2 mem2mem framework. The following features are supported and tested: - Color format conversion (RGB32, RGB24, RGB16, NV12, YUV420P) - Copy - Scale - Flip - Deinterlace - Wide (4K) picture support - Crop Signed-off-by: Fabien Dessenne <fabien.dessenne@st.com> Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com> [hans.verkuil@cisco.com: added missing slab.h include to bdisp-v4l2.c] Signed-off-by: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
This commit is contained in:
Fabien Dessenne
committed by
Mauro Carvalho Chehab
Mauro Carvalho Chehab
parent
5a54cd2a3f
commit
28ffeebbb7
@@ -212,6 +212,16 @@ config VIDEO_SAMSUNG_EXYNOS_GSC
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help
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This is a v4l2 driver for Samsung EXYNOS5 SoC G-Scaler.
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config VIDEO_STI_BDISP
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tristate "STMicroelectronics BDISP 2D blitter driver"
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depends on VIDEO_DEV && VIDEO_V4L2
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depends on ARCH_STI || COMPILE_TEST
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depends on HAS_DMA
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select VIDEOBUF2_DMA_CONTIG
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select V4L2_MEM2MEM_DEV
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help
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This v4l2 mem2mem driver is a 2D blitter for STMicroelectronics SoC.
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config VIDEO_SH_VEU
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tristate "SuperH VEU mem2mem video processing driver"
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depends on VIDEO_DEV && VIDEO_V4L2 && HAS_DMA
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@@ -34,6 +34,8 @@ obj-$(CONFIG_VIDEO_SAMSUNG_S5P_TV) += s5p-tv/
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obj-$(CONFIG_VIDEO_SAMSUNG_S5P_G2D) += s5p-g2d/
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obj-$(CONFIG_VIDEO_SAMSUNG_EXYNOS_GSC) += exynos-gsc/
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obj-$(CONFIG_VIDEO_STI_BDISP) += sti/bdisp/
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obj-$(CONFIG_BLACKFIN) += blackfin/
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obj-$(CONFIG_ARCH_DAVINCI) += davinci/
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9
drivers/media/platform/sti/bdisp/Kconfig
Normal file
9
drivers/media/platform/sti/bdisp/Kconfig
Normal file
@@ -0,0 +1,9 @@
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config VIDEO_STI_BDISP
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tristate "STMicroelectronics BDISP 2D blitter driver"
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depends on VIDEO_DEV && VIDEO_V4L2
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select VIDEOBUF2_DMA_CONTIG
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select V4L2_MEM2MEM_DEV
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help
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This v4l2 mem2mem driver is a 2D blitter for STMicroelectronics SoC.
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To compile this driver as a module, choose M here: the module will
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be called bdisp.ko.
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3
drivers/media/platform/sti/bdisp/Makefile
Normal file
3
drivers/media/platform/sti/bdisp/Makefile
Normal file
@@ -0,0 +1,3 @@
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obj-$(CONFIG_VIDEO_STI_BDISP) := bdisp.o
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bdisp-objs := bdisp-v4l2.o bdisp-hw.o
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346
drivers/media/platform/sti/bdisp/bdisp-filter.h
Normal file
346
drivers/media/platform/sti/bdisp/bdisp-filter.h
Normal file
@@ -0,0 +1,346 @@
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/*
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* Copyright (C) STMicroelectronics SA 2014
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* Authors: Fabien Dessenne <fabien.dessenne@st.com> for STMicroelectronics.
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* License terms: GNU General Public License (GPL), version 2
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*/
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#define BDISP_HF_NB 64
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#define BDISP_VF_NB 40
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/**
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* struct bdisp_filter_h_spec - Horizontal filter specification
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*
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* @min: min scale factor for this filter (6.10 fixed point)
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* @max: max scale factor for this filter (6.10 fixed point)
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* coef: filter coefficients
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*/
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struct bdisp_filter_h_spec {
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const u16 min;
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const u16 max;
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const u8 coef[BDISP_HF_NB];
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};
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static const struct bdisp_filter_h_spec bdisp_h_spec[] = {
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{
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.min = 0,
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.max = 921,
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.coef = {
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0x00, 0x00, 0x00, 0x00, 0x40, 0x00, 0x00, 0x00,
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0x00, 0x00, 0xff, 0x07, 0x3d, 0xfc, 0x01, 0x00,
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0x00, 0x01, 0xfd, 0x11, 0x36, 0xf9, 0x02, 0x00,
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0x00, 0x01, 0xfb, 0x1b, 0x2e, 0xf9, 0x02, 0x00,
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0x00, 0x01, 0xf9, 0x26, 0x26, 0xf9, 0x01, 0x00,
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0x00, 0x02, 0xf9, 0x30, 0x19, 0xfb, 0x01, 0x00,
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0x00, 0x02, 0xf9, 0x39, 0x0e, 0xfd, 0x01, 0x00,
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0x00, 0x01, 0xfc, 0x3e, 0x06, 0xff, 0x00, 0x00
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}
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},
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{
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.min = 921,
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.max = 1024,
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.coef = {
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0x00, 0x00, 0x00, 0x00, 0x40, 0x00, 0x00, 0x00,
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0xff, 0x03, 0xfd, 0x08, 0x3e, 0xf9, 0x04, 0xfe,
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0xfd, 0x06, 0xf8, 0x13, 0x3b, 0xf4, 0x07, 0xfc,
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0xfb, 0x08, 0xf5, 0x1f, 0x34, 0xf1, 0x09, 0xfb,
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0xfb, 0x09, 0xf2, 0x2b, 0x2a, 0xf1, 0x09, 0xfb,
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0xfb, 0x09, 0xf2, 0x35, 0x1e, 0xf4, 0x08, 0xfb,
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0xfc, 0x07, 0xf5, 0x3c, 0x12, 0xf7, 0x06, 0xfd,
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0xfe, 0x04, 0xfa, 0x3f, 0x07, 0xfc, 0x03, 0xff
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}
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},
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{
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.min = 1024,
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.max = 1126,
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.coef = {
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0x00, 0x00, 0x00, 0x00, 0x40, 0x00, 0x00, 0x00,
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0xff, 0x03, 0xfd, 0x08, 0x3e, 0xf9, 0x04, 0xfe,
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0xfd, 0x06, 0xf8, 0x13, 0x3b, 0xf4, 0x07, 0xfc,
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0xfb, 0x08, 0xf5, 0x1f, 0x34, 0xf1, 0x09, 0xfb,
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0xfb, 0x09, 0xf2, 0x2b, 0x2a, 0xf1, 0x09, 0xfb,
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0xfb, 0x09, 0xf2, 0x35, 0x1e, 0xf4, 0x08, 0xfb,
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0xfc, 0x07, 0xf5, 0x3c, 0x12, 0xf7, 0x06, 0xfd,
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0xfe, 0x04, 0xfa, 0x3f, 0x07, 0xfc, 0x03, 0xff
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}
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},
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{
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.min = 1126,
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.max = 1228,
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.coef = {
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0x00, 0x00, 0x00, 0x00, 0x40, 0x00, 0x00, 0x00,
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0xff, 0x03, 0xfd, 0x08, 0x3e, 0xf9, 0x04, 0xfe,
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0xfd, 0x06, 0xf8, 0x13, 0x3b, 0xf4, 0x07, 0xfc,
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0xfb, 0x08, 0xf5, 0x1f, 0x34, 0xf1, 0x09, 0xfb,
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0xfb, 0x09, 0xf2, 0x2b, 0x2a, 0xf1, 0x09, 0xfb,
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0xfb, 0x09, 0xf2, 0x35, 0x1e, 0xf4, 0x08, 0xfb,
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0xfc, 0x07, 0xf5, 0x3c, 0x12, 0xf7, 0x06, 0xfd,
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0xfe, 0x04, 0xfa, 0x3f, 0x07, 0xfc, 0x03, 0xff
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}
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},
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{
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.min = 1228,
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.max = 1331,
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.coef = {
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0xfd, 0x04, 0xfc, 0x05, 0x39, 0x05, 0xfc, 0x04,
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0xfc, 0x06, 0xf9, 0x0c, 0x39, 0xfe, 0x00, 0x02,
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0xfb, 0x08, 0xf6, 0x17, 0x35, 0xf9, 0x02, 0x00,
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0xfc, 0x08, 0xf4, 0x20, 0x30, 0xf4, 0x05, 0xff,
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0xfd, 0x07, 0xf4, 0x29, 0x28, 0xf3, 0x07, 0xfd,
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0xff, 0x05, 0xf5, 0x31, 0x1f, 0xf3, 0x08, 0xfc,
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0x00, 0x02, 0xf9, 0x38, 0x14, 0xf6, 0x08, 0xfb,
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0x02, 0x00, 0xff, 0x3a, 0x0b, 0xf8, 0x06, 0xfc
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}
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},
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{
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.min = 1331,
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.max = 1433,
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.coef = {
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0xfc, 0x06, 0xf9, 0x09, 0x34, 0x09, 0xf9, 0x06,
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0xfd, 0x07, 0xf7, 0x10, 0x32, 0x02, 0xfc, 0x05,
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0xfe, 0x07, 0xf6, 0x17, 0x2f, 0xfc, 0xff, 0x04,
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0xff, 0x06, 0xf5, 0x20, 0x2a, 0xf9, 0x01, 0x02,
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0x00, 0x04, 0xf6, 0x27, 0x25, 0xf6, 0x04, 0x00,
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0x02, 0x01, 0xf9, 0x2d, 0x1d, 0xf5, 0x06, 0xff,
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0x04, 0xff, 0xfd, 0x31, 0x15, 0xf5, 0x07, 0xfe,
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0x05, 0xfc, 0x02, 0x35, 0x0d, 0xf7, 0x07, 0xfd
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}
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},
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{
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.min = 1433,
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.max = 1536,
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.coef = {
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0xfe, 0x06, 0xf8, 0x0b, 0x30, 0x0b, 0xf8, 0x06,
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0xff, 0x06, 0xf7, 0x12, 0x2d, 0x05, 0xfa, 0x06,
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0x00, 0x04, 0xf6, 0x18, 0x2c, 0x00, 0xfc, 0x06,
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0x01, 0x02, 0xf7, 0x1f, 0x27, 0xfd, 0xff, 0x04,
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0x03, 0x00, 0xf9, 0x24, 0x24, 0xf9, 0x00, 0x03,
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0x04, 0xff, 0xfd, 0x29, 0x1d, 0xf7, 0x02, 0x01,
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0x06, 0xfc, 0x00, 0x2d, 0x17, 0xf6, 0x04, 0x00,
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0x06, 0xfa, 0x05, 0x30, 0x0f, 0xf7, 0x06, 0xff
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}
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},
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{
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.min = 1536,
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.max = 2048,
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.coef = {
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0x05, 0xfd, 0xfb, 0x13, 0x25, 0x13, 0xfb, 0xfd,
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0x05, 0xfc, 0xfd, 0x17, 0x24, 0x0f, 0xf9, 0xff,
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0x04, 0xfa, 0xff, 0x1b, 0x24, 0x0b, 0xf9, 0x00,
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0x03, 0xf9, 0x01, 0x1f, 0x23, 0x08, 0xf8, 0x01,
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0x02, 0xf9, 0x04, 0x22, 0x20, 0x04, 0xf9, 0x02,
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0x01, 0xf8, 0x08, 0x25, 0x1d, 0x01, 0xf9, 0x03,
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0x00, 0xf9, 0x0c, 0x25, 0x1a, 0xfe, 0xfa, 0x04,
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0xff, 0xf9, 0x10, 0x26, 0x15, 0xfc, 0xfc, 0x05
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}
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},
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{
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.min = 2048,
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.max = 3072,
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.coef = {
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0xfc, 0xfd, 0x06, 0x13, 0x18, 0x13, 0x06, 0xfd,
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0xfc, 0xfe, 0x08, 0x15, 0x17, 0x12, 0x04, 0xfc,
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0xfb, 0xfe, 0x0a, 0x16, 0x18, 0x10, 0x03, 0xfc,
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0xfb, 0x00, 0x0b, 0x18, 0x17, 0x0f, 0x01, 0xfb,
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0xfb, 0x00, 0x0d, 0x19, 0x17, 0x0d, 0x00, 0xfb,
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0xfb, 0x01, 0x0f, 0x19, 0x16, 0x0b, 0x00, 0xfb,
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0xfc, 0x03, 0x11, 0x19, 0x15, 0x09, 0xfe, 0xfb,
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0xfc, 0x04, 0x12, 0x1a, 0x12, 0x08, 0xfe, 0xfc
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}
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},
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{
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.min = 3072,
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.max = 4096,
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.coef = {
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0xfe, 0x02, 0x09, 0x0f, 0x0e, 0x0f, 0x09, 0x02,
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0xff, 0x02, 0x09, 0x0f, 0x10, 0x0e, 0x08, 0x01,
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0xff, 0x03, 0x0a, 0x10, 0x10, 0x0d, 0x07, 0x00,
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0x00, 0x04, 0x0b, 0x10, 0x0f, 0x0c, 0x06, 0x00,
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0x00, 0x05, 0x0c, 0x10, 0x0e, 0x0c, 0x05, 0x00,
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0x00, 0x06, 0x0c, 0x11, 0x0e, 0x0b, 0x04, 0x00,
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0x00, 0x07, 0x0d, 0x11, 0x0f, 0x0a, 0x03, 0xff,
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0x01, 0x08, 0x0e, 0x11, 0x0e, 0x09, 0x02, 0xff
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}
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},
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{
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.min = 4096,
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.max = 5120,
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.coef = {
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0x00, 0x04, 0x09, 0x0c, 0x0e, 0x0c, 0x09, 0x04,
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0x01, 0x05, 0x09, 0x0c, 0x0d, 0x0c, 0x08, 0x04,
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0x01, 0x05, 0x0a, 0x0c, 0x0e, 0x0b, 0x08, 0x03,
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0x02, 0x06, 0x0a, 0x0d, 0x0c, 0x0b, 0x07, 0x03,
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0x02, 0x07, 0x0a, 0x0d, 0x0d, 0x0a, 0x07, 0x02,
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0x03, 0x07, 0x0b, 0x0d, 0x0c, 0x0a, 0x06, 0x02,
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0x03, 0x08, 0x0b, 0x0d, 0x0d, 0x0a, 0x05, 0x01,
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0x04, 0x08, 0x0c, 0x0d, 0x0c, 0x09, 0x05, 0x01
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}
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},
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{
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.min = 5120,
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.max = 65535,
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.coef = {
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0x03, 0x06, 0x09, 0x0b, 0x09, 0x0b, 0x09, 0x06,
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0x03, 0x06, 0x09, 0x0b, 0x0c, 0x0a, 0x08, 0x05,
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0x03, 0x06, 0x09, 0x0b, 0x0c, 0x0a, 0x08, 0x05,
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0x04, 0x07, 0x09, 0x0b, 0x0b, 0x0a, 0x08, 0x04,
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0x04, 0x07, 0x0a, 0x0b, 0x0b, 0x0a, 0x07, 0x04,
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0x04, 0x08, 0x0a, 0x0b, 0x0b, 0x09, 0x07, 0x04,
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0x05, 0x08, 0x0a, 0x0b, 0x0c, 0x09, 0x06, 0x03,
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0x05, 0x08, 0x0a, 0x0b, 0x0c, 0x09, 0x06, 0x03
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}
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}
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};
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/**
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* struct bdisp_filter_v_spec - Vertical filter specification
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*
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* @min: min scale factor for this filter (6.10 fixed point)
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* @max: max scale factor for this filter (6.10 fixed point)
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* coef: filter coefficients
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*/
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struct bdisp_filter_v_spec {
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const u16 min;
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const u16 max;
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const u8 coef[BDISP_VF_NB];
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};
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static const struct bdisp_filter_v_spec bdisp_v_spec[] = {
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{
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.min = 0,
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.max = 1024,
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.coef = {
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0x00, 0x00, 0x40, 0x00, 0x00,
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0x00, 0x06, 0x3d, 0xfd, 0x00,
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0xfe, 0x0f, 0x38, 0xfb, 0x00,
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0xfd, 0x19, 0x2f, 0xfb, 0x00,
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0xfc, 0x24, 0x24, 0xfc, 0x00,
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0xfb, 0x2f, 0x19, 0xfd, 0x00,
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0xfb, 0x38, 0x0f, 0xfe, 0x00,
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0xfd, 0x3d, 0x06, 0x00, 0x00
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}
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},
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{
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.min = 1024,
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.max = 1331,
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.coef = {
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0xfc, 0x05, 0x3e, 0x05, 0xfc,
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0xf8, 0x0e, 0x3b, 0xff, 0x00,
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0xf5, 0x18, 0x38, 0xf9, 0x02,
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0xf4, 0x21, 0x31, 0xf5, 0x05,
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0xf4, 0x2a, 0x27, 0xf4, 0x07,
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0xf6, 0x30, 0x1e, 0xf4, 0x08,
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0xf9, 0x35, 0x15, 0xf6, 0x07,
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0xff, 0x37, 0x0b, 0xf9, 0x06
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}
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},
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{
|
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.min = 1331,
|
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.max = 1433,
|
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.coef = {
|
||||
0xf8, 0x0a, 0x3c, 0x0a, 0xf8,
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0xf6, 0x12, 0x3b, 0x02, 0xfb,
|
||||
0xf4, 0x1b, 0x35, 0xfd, 0xff,
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||||
0xf4, 0x23, 0x30, 0xf8, 0x01,
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0xf6, 0x29, 0x27, 0xf6, 0x04,
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0xf9, 0x2e, 0x1e, 0xf5, 0x06,
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0xfd, 0x31, 0x16, 0xf6, 0x06,
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0x02, 0x32, 0x0d, 0xf8, 0x07
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}
|
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},
|
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{
|
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.min = 1433,
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.max = 1536,
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.coef = {
|
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0xf6, 0x0e, 0x38, 0x0e, 0xf6,
|
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0xf5, 0x15, 0x38, 0x06, 0xf8,
|
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0xf5, 0x1d, 0x33, 0x00, 0xfb,
|
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0xf6, 0x23, 0x2d, 0xfc, 0xfe,
|
||||
0xf9, 0x28, 0x26, 0xf9, 0x00,
|
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0xfc, 0x2c, 0x1e, 0xf7, 0x03,
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0x00, 0x2e, 0x18, 0xf6, 0x04,
|
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0x05, 0x2e, 0x11, 0xf7, 0x05
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}
|
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},
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{
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.min = 1536,
|
||||
.max = 2048,
|
||||
.coef = {
|
||||
0xfb, 0x13, 0x24, 0x13, 0xfb,
|
||||
0xfd, 0x17, 0x23, 0x0f, 0xfa,
|
||||
0xff, 0x1a, 0x23, 0x0b, 0xf9,
|
||||
0x01, 0x1d, 0x22, 0x07, 0xf9,
|
||||
0x04, 0x20, 0x1f, 0x04, 0xf9,
|
||||
0x07, 0x22, 0x1c, 0x01, 0xfa,
|
||||
0x0b, 0x24, 0x17, 0xff, 0xfb,
|
||||
0x0f, 0x24, 0x14, 0xfd, 0xfc
|
||||
}
|
||||
},
|
||||
{
|
||||
.min = 2048,
|
||||
.max = 3072,
|
||||
.coef = {
|
||||
0x05, 0x10, 0x16, 0x10, 0x05,
|
||||
0x06, 0x11, 0x16, 0x0f, 0x04,
|
||||
0x08, 0x13, 0x15, 0x0e, 0x02,
|
||||
0x09, 0x14, 0x16, 0x0c, 0x01,
|
||||
0x0b, 0x15, 0x15, 0x0b, 0x00,
|
||||
0x0d, 0x16, 0x13, 0x0a, 0x00,
|
||||
0x0f, 0x17, 0x13, 0x08, 0xff,
|
||||
0x11, 0x18, 0x12, 0x07, 0xfe
|
||||
}
|
||||
},
|
||||
{
|
||||
.min = 3072,
|
||||
.max = 4096,
|
||||
.coef = {
|
||||
0x09, 0x0f, 0x10, 0x0f, 0x09,
|
||||
0x09, 0x0f, 0x12, 0x0e, 0x08,
|
||||
0x0a, 0x10, 0x11, 0x0e, 0x07,
|
||||
0x0b, 0x11, 0x11, 0x0d, 0x06,
|
||||
0x0c, 0x11, 0x12, 0x0c, 0x05,
|
||||
0x0d, 0x12, 0x11, 0x0c, 0x04,
|
||||
0x0e, 0x12, 0x11, 0x0b, 0x04,
|
||||
0x0f, 0x13, 0x11, 0x0a, 0x03
|
||||
}
|
||||
},
|
||||
{
|
||||
.min = 4096,
|
||||
.max = 5120,
|
||||
.coef = {
|
||||
0x0a, 0x0e, 0x10, 0x0e, 0x0a,
|
||||
0x0b, 0x0e, 0x0f, 0x0e, 0x0a,
|
||||
0x0b, 0x0f, 0x10, 0x0d, 0x09,
|
||||
0x0c, 0x0f, 0x10, 0x0d, 0x08,
|
||||
0x0d, 0x0f, 0x0f, 0x0d, 0x08,
|
||||
0x0d, 0x10, 0x10, 0x0c, 0x07,
|
||||
0x0e, 0x10, 0x0f, 0x0c, 0x07,
|
||||
0x0f, 0x10, 0x10, 0x0b, 0x06
|
||||
}
|
||||
},
|
||||
{
|
||||
.min = 5120,
|
||||
.max = 65535,
|
||||
.coef = {
|
||||
0x0b, 0x0e, 0x0e, 0x0e, 0x0b,
|
||||
0x0b, 0x0e, 0x0f, 0x0d, 0x0b,
|
||||
0x0c, 0x0e, 0x0f, 0x0d, 0x0a,
|
||||
0x0c, 0x0e, 0x0f, 0x0d, 0x0a,
|
||||
0x0d, 0x0f, 0x0e, 0x0d, 0x09,
|
||||
0x0d, 0x0f, 0x0f, 0x0c, 0x09,
|
||||
0x0e, 0x0f, 0x0e, 0x0c, 0x09,
|
||||
0x0e, 0x0f, 0x0f, 0x0c, 0x08
|
||||
}
|
||||
}
|
||||
};
|
||||
|
||||
#define NB_H_FILTER ARRAY_SIZE(bdisp_h_spec)
|
||||
#define NB_V_FILTER ARRAY_SIZE(bdisp_v_spec)
|
||||
|
||||
/* RGB YUV 601 standard conversion */
|
||||
static const u32 bdisp_rgb_to_yuv[] = {
|
||||
0x0e1e8bee, 0x08420419, 0xfb5ed471, 0x08004080,
|
||||
};
|
||||
|
||||
static const u32 bdisp_yuv_to_rgb[] = {
|
||||
0x3324a800, 0xe604ab9c, 0x0004a957, 0x32121eeb,
|
||||
};
|
||||
783
drivers/media/platform/sti/bdisp/bdisp-hw.c
Normal file
783
drivers/media/platform/sti/bdisp/bdisp-hw.c
Normal file
File diff suppressed because it is too large
Load Diff
235
drivers/media/platform/sti/bdisp/bdisp-reg.h
Normal file
235
drivers/media/platform/sti/bdisp/bdisp-reg.h
Normal file
@@ -0,0 +1,235 @@
|
||||
/*
|
||||
* Copyright (C) STMicroelectronics SA 2014
|
||||
* Authors: Fabien Dessenne <fabien.dessenne@st.com> for STMicroelectronics.
|
||||
* License terms: GNU General Public License (GPL), version 2
|
||||
*/
|
||||
|
||||
struct bdisp_node {
|
||||
/* 0 - General */
|
||||
u32 nip;
|
||||
u32 cic;
|
||||
u32 ins;
|
||||
u32 ack;
|
||||
/* 1 - Target */
|
||||
u32 tba;
|
||||
u32 tty;
|
||||
u32 txy;
|
||||
u32 tsz;
|
||||
/* 2 - Color Fill */
|
||||
u32 s1cf;
|
||||
u32 s2cf;
|
||||
/* 3 - Source 1 */
|
||||
u32 s1ba;
|
||||
u32 s1ty;
|
||||
u32 s1xy;
|
||||
u32 s1sz_tsz;
|
||||
/* 4 - Source 2 */
|
||||
u32 s2ba;
|
||||
u32 s2ty;
|
||||
u32 s2xy;
|
||||
u32 s2sz;
|
||||
/* 5 - Source 3 */
|
||||
u32 s3ba;
|
||||
u32 s3ty;
|
||||
u32 s3xy;
|
||||
u32 s3sz;
|
||||
/* 6 - Clipping */
|
||||
u32 cwo;
|
||||
u32 cws;
|
||||
/* 7 - CLUT */
|
||||
u32 cco;
|
||||
u32 cml;
|
||||
/* 8 - Filter & Mask */
|
||||
u32 fctl;
|
||||
u32 pmk;
|
||||
/* 9 - Chroma Filter */
|
||||
u32 rsf;
|
||||
u32 rzi;
|
||||
u32 hfp;
|
||||
u32 vfp;
|
||||
/* 10 - Luma Filter */
|
||||
u32 y_rsf;
|
||||
u32 y_rzi;
|
||||
u32 y_hfp;
|
||||
u32 y_vfp;
|
||||
/* 11 - Flicker */
|
||||
u32 ff0;
|
||||
u32 ff1;
|
||||
u32 ff2;
|
||||
u32 ff3;
|
||||
/* 12 - Color Key */
|
||||
u32 key1;
|
||||
u32 key2;
|
||||
/* 14 - Static Address & User */
|
||||
u32 sar;
|
||||
u32 usr;
|
||||
/* 15 - Input Versatile Matrix */
|
||||
u32 ivmx0;
|
||||
u32 ivmx1;
|
||||
u32 ivmx2;
|
||||
u32 ivmx3;
|
||||
/* 16 - Output Versatile Matrix */
|
||||
u32 ovmx0;
|
||||
u32 ovmx1;
|
||||
u32 ovmx2;
|
||||
u32 ovmx3;
|
||||
/* 17 - Pace */
|
||||
u32 pace;
|
||||
/* 18 - VC1R & DEI */
|
||||
u32 vc1r;
|
||||
u32 dei;
|
||||
/* 19 - Gradient Fill */
|
||||
u32 hgf;
|
||||
u32 vgf;
|
||||
};
|
||||
|
||||
/* HW registers : static */
|
||||
#define BLT_CTL 0x0A00
|
||||
#define BLT_ITS 0x0A04
|
||||
#define BLT_STA1 0x0A08
|
||||
#define BLT_AQ1_CTL 0x0A60
|
||||
#define BLT_AQ1_IP 0x0A64
|
||||
#define BLT_AQ1_LNA 0x0A68
|
||||
#define BLT_AQ1_STA 0x0A6C
|
||||
#define BLT_ITM0 0x0AD0
|
||||
/* HW registers : plugs */
|
||||
#define BLT_PLUGS1_OP2 0x0B04
|
||||
#define BLT_PLUGS1_CHZ 0x0B08
|
||||
#define BLT_PLUGS1_MSZ 0x0B0C
|
||||
#define BLT_PLUGS1_PGZ 0x0B10
|
||||
#define BLT_PLUGS2_OP2 0x0B24
|
||||
#define BLT_PLUGS2_CHZ 0x0B28
|
||||
#define BLT_PLUGS2_MSZ 0x0B2C
|
||||
#define BLT_PLUGS2_PGZ 0x0B30
|
||||
#define BLT_PLUGS3_OP2 0x0B44
|
||||
#define BLT_PLUGS3_CHZ 0x0B48
|
||||
#define BLT_PLUGS3_MSZ 0x0B4C
|
||||
#define BLT_PLUGS3_PGZ 0x0B50
|
||||
#define BLT_PLUGT_OP2 0x0B84
|
||||
#define BLT_PLUGT_CHZ 0x0B88
|
||||
#define BLT_PLUGT_MSZ 0x0B8C
|
||||
#define BLT_PLUGT_PGZ 0x0B90
|
||||
/* HW registers : node */
|
||||
#define BLT_NIP 0x0C00
|
||||
#define BLT_CIC 0x0C04
|
||||
#define BLT_INS 0x0C08
|
||||
#define BLT_ACK 0x0C0C
|
||||
#define BLT_TBA 0x0C10
|
||||
#define BLT_TTY 0x0C14
|
||||
#define BLT_TXY 0x0C18
|
||||
#define BLT_TSZ 0x0C1C
|
||||
#define BLT_S1BA 0x0C28
|
||||
#define BLT_S1TY 0x0C2C
|
||||
#define BLT_S1XY 0x0C30
|
||||
#define BLT_S2BA 0x0C38
|
||||
#define BLT_S2TY 0x0C3C
|
||||
#define BLT_S2XY 0x0C40
|
||||
#define BLT_S2SZ 0x0C44
|
||||
#define BLT_S3BA 0x0C48
|
||||
#define BLT_S3TY 0x0C4C
|
||||
#define BLT_S3XY 0x0C50
|
||||
#define BLT_S3SZ 0x0C54
|
||||
#define BLT_FCTL 0x0C68
|
||||
#define BLT_RSF 0x0C70
|
||||
#define BLT_RZI 0x0C74
|
||||
#define BLT_HFP 0x0C78
|
||||
#define BLT_VFP 0x0C7C
|
||||
#define BLT_Y_RSF 0x0C80
|
||||
#define BLT_Y_RZI 0x0C84
|
||||
#define BLT_Y_HFP 0x0C88
|
||||
#define BLT_Y_VFP 0x0C8C
|
||||
#define BLT_IVMX0 0x0CC0
|
||||
#define BLT_IVMX1 0x0CC4
|
||||
#define BLT_IVMX2 0x0CC8
|
||||
#define BLT_IVMX3 0x0CCC
|
||||
#define BLT_OVMX0 0x0CD0
|
||||
#define BLT_OVMX1 0x0CD4
|
||||
#define BLT_OVMX2 0x0CD8
|
||||
#define BLT_OVMX3 0x0CDC
|
||||
#define BLT_DEI 0x0CEC
|
||||
/* HW registers : filters */
|
||||
#define BLT_HFC_N 0x0D00
|
||||
#define BLT_VFC_N 0x0D90
|
||||
#define BLT_Y_HFC_N 0x0E00
|
||||
#define BLT_Y_VFC_N 0x0E90
|
||||
#define BLT_NB_H_COEF 16
|
||||
#define BLT_NB_V_COEF 10
|
||||
|
||||
/* Registers values */
|
||||
#define BLT_CTL_RESET BIT(31) /* Global soft reset */
|
||||
|
||||
#define BLT_ITS_AQ1_LNA BIT(12) /* AQ1 LNA reached */
|
||||
|
||||
#define BLT_STA1_IDLE BIT(0) /* BDISP idle */
|
||||
|
||||
#define BLT_AQ1_CTL_CFG 0x80400003 /* Enable, P3, LNA reached */
|
||||
|
||||
#define BLT_INS_S1_MASK (BIT(0) | BIT(1) | BIT(2))
|
||||
#define BLT_INS_S1_OFF 0x00000000 /* src1 disabled */
|
||||
#define BLT_INS_S1_MEM 0x00000001 /* src1 fetched from memory */
|
||||
#define BLT_INS_S1_CF 0x00000003 /* src1 color fill */
|
||||
#define BLT_INS_S1_COPY 0x00000004 /* src1 direct copy */
|
||||
#define BLT_INS_S1_FILL 0x00000007 /* src1 firect fill */
|
||||
#define BLT_INS_S2_MASK (BIT(3) | BIT(4))
|
||||
#define BLT_INS_S2_OFF 0x00000000 /* src2 disabled */
|
||||
#define BLT_INS_S2_MEM 0x00000008 /* src2 fetched from memory */
|
||||
#define BLT_INS_S2_CF 0x00000018 /* src2 color fill */
|
||||
#define BLT_INS_S3_MASK BIT(5)
|
||||
#define BLT_INS_S3_OFF 0x00000000 /* src3 disabled */
|
||||
#define BLT_INS_S3_MEM 0x00000020 /* src3 fetched from memory */
|
||||
#define BLT_INS_IVMX BIT(6) /* Input versatile matrix */
|
||||
#define BLT_INS_CLUT BIT(7) /* Color Look Up Table */
|
||||
#define BLT_INS_SCALE BIT(8) /* Scaling */
|
||||
#define BLT_INS_FLICK BIT(9) /* Flicker filter */
|
||||
#define BLT_INS_CLIP BIT(10) /* Clipping */
|
||||
#define BLT_INS_CKEY BIT(11) /* Color key */
|
||||
#define BLT_INS_OVMX BIT(12) /* Output versatile matrix */
|
||||
#define BLT_INS_DEI BIT(13) /* Deinterlace */
|
||||
#define BLT_INS_PMASK BIT(14) /* Plane mask */
|
||||
#define BLT_INS_VC1R BIT(17) /* VC1 Range mapping */
|
||||
#define BLT_INS_ROTATE BIT(18) /* Rotation */
|
||||
#define BLT_INS_GRAD BIT(19) /* Gradient fill */
|
||||
#define BLT_INS_AQLOCK BIT(29) /* AQ lock */
|
||||
#define BLT_INS_PACE BIT(30) /* Pace down */
|
||||
#define BLT_INS_IRQ BIT(31) /* Raise IRQ when node done */
|
||||
#define BLT_CIC_ALL_GRP 0x000FDFFC /* all valid groups present */
|
||||
#define BLT_ACK_BYPASS_S2S3 0x00000007 /* Bypass src2 and src3 */
|
||||
|
||||
#define BLT_TTY_COL_SHIFT 16 /* Color format */
|
||||
#define BLT_TTY_COL_MASK 0x001F0000 /* Color format mask */
|
||||
#define BLT_TTY_ALPHA_R BIT(21) /* Alpha range */
|
||||
#define BLT_TTY_CR_NOT_CB BIT(22) /* CR not Cb */
|
||||
#define BLT_TTY_MB BIT(23) /* MB frame / field*/
|
||||
#define BLT_TTY_HSO BIT(24) /* H scan order */
|
||||
#define BLT_TTY_VSO BIT(25) /* V scan order */
|
||||
#define BLT_TTY_DITHER BIT(26) /* Dithering */
|
||||
#define BLT_TTY_CHROMA BIT(27) /* Write chroma / luma */
|
||||
#define BLT_TTY_BIG_END BIT(30) /* Big endianness */
|
||||
|
||||
#define BLT_S1TY_A1_SUBSET BIT(22) /* A1 subset */
|
||||
#define BLT_S1TY_CHROMA_EXT BIT(26) /* Chroma Extended */
|
||||
#define BTL_S1TY_SUBBYTE BIT(28) /* Sub-byte fmt, pixel order */
|
||||
#define BLT_S1TY_RGB_EXP BIT(29) /* RGB expansion mode */
|
||||
|
||||
#define BLT_S2TY_A1_SUBSET BIT(22) /* A1 subset */
|
||||
#define BLT_S2TY_CHROMA_EXT BIT(26) /* Chroma Extended */
|
||||
#define BTL_S2TY_SUBBYTE BIT(28) /* Sub-byte fmt, pixel order */
|
||||
#define BLT_S2TY_RGB_EXP BIT(29) /* RGB expansion mode */
|
||||
|
||||
#define BLT_S3TY_BLANK_ACC BIT(26) /* Blank access */
|
||||
|
||||
#define BLT_FCTL_HV_SCALE 0x00000055 /* H/V resize + color filter */
|
||||
#define BLT_FCTL_Y_HV_SCALE 0x33000000 /* Luma version */
|
||||
|
||||
#define BLT_FCTL_HV_SAMPLE 0x00000044 /* H/V resize */
|
||||
#define BLT_FCTL_Y_HV_SAMPLE 0x22000000 /* Luma version */
|
||||
|
||||
#define BLT_RZI_DEFAULT 0x20003000 /* H/VNB_repeat = 3/2 */
|
||||
|
||||
/* Color format */
|
||||
#define BDISP_RGB565 0x00 /* RGB565 */
|
||||
#define BDISP_RGB888 0x01 /* RGB888 */
|
||||
#define BDISP_XRGB8888 0x02 /* RGB888_32 */
|
||||
#define BDISP_ARGB8888 0x05 /* ARGB888 */
|
||||
#define BDISP_NV12 0x16 /* YCbCr42x R2B */
|
||||
#define BDISP_YUV_3B 0x1E /* YUV (3 buffer) */
|
||||
1405
drivers/media/platform/sti/bdisp/bdisp-v4l2.c
Normal file
1405
drivers/media/platform/sti/bdisp/bdisp-v4l2.c
Normal file
File diff suppressed because it is too large
Load Diff
186
drivers/media/platform/sti/bdisp/bdisp.h
Normal file
186
drivers/media/platform/sti/bdisp/bdisp.h
Normal file
@@ -0,0 +1,186 @@
|
||||
/*
|
||||
* Copyright (C) STMicroelectronics SA 2014
|
||||
* Authors: Fabien Dessenne <fabien.dessenne@st.com> for STMicroelectronics.
|
||||
* License terms: GNU General Public License (GPL), version 2
|
||||
*/
|
||||
|
||||
#include <linux/clk.h>
|
||||
#include <linux/ktime.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/spinlock.h>
|
||||
|
||||
#include <media/v4l2-ctrls.h>
|
||||
#include <media/v4l2-device.h>
|
||||
#include <media/v4l2-mem2mem.h>
|
||||
|
||||
#include <media/videobuf2-dma-contig.h>
|
||||
|
||||
#define BDISP_NAME "bdisp"
|
||||
|
||||
/*
|
||||
* Max nb of nodes in node-list:
|
||||
* - 2 nodes to handle wide 4K pictures
|
||||
* - 2 nodes to handle two planes (Y & CbCr) */
|
||||
#define MAX_OUTPUT_PLANES 2
|
||||
#define MAX_VERTICAL_STRIDES 2
|
||||
#define MAX_NB_NODE (MAX_OUTPUT_PLANES * MAX_VERTICAL_STRIDES)
|
||||
|
||||
/* struct bdisp_ctrls - bdisp control set
|
||||
* @hflip: horizontal flip
|
||||
* @vflip: vertical flip
|
||||
*/
|
||||
struct bdisp_ctrls {
|
||||
struct v4l2_ctrl *hflip;
|
||||
struct v4l2_ctrl *vflip;
|
||||
};
|
||||
|
||||
/**
|
||||
* struct bdisp_fmt - driver's internal color format data
|
||||
* @pixelformat:fourcc code for this format
|
||||
* @nb_planes: number of planes (ex: [0]=RGB/Y - [1]=Cb/Cr, ...)
|
||||
* @bpp: bits per pixel (general)
|
||||
* @bpp_plane0: byte per pixel for the 1st plane
|
||||
* @w_align: width alignment in pixel (multiple of)
|
||||
* @h_align: height alignment in pixel (multiple of)
|
||||
*/
|
||||
struct bdisp_fmt {
|
||||
u32 pixelformat;
|
||||
u8 nb_planes;
|
||||
u8 bpp;
|
||||
u8 bpp_plane0;
|
||||
u8 w_align;
|
||||
u8 h_align;
|
||||
};
|
||||
|
||||
/**
|
||||
* struct bdisp_frame - frame properties
|
||||
*
|
||||
* @width: frame width (including padding)
|
||||
* @height: frame height (including padding)
|
||||
* @fmt: pointer to frame format descriptor
|
||||
* @field: frame / field type
|
||||
* @bytesperline: stride of the 1st plane
|
||||
* @sizeimage: image size in bytes
|
||||
* @colorspace: colorspace
|
||||
* @crop: crop area
|
||||
* @paddr: image physical addresses per plane ([0]=RGB/Y - [1]=Cb/Cr, ...)
|
||||
*/
|
||||
struct bdisp_frame {
|
||||
u32 width;
|
||||
u32 height;
|
||||
const struct bdisp_fmt *fmt;
|
||||
enum v4l2_field field;
|
||||
u32 bytesperline;
|
||||
u32 sizeimage;
|
||||
enum v4l2_colorspace colorspace;
|
||||
struct v4l2_rect crop;
|
||||
dma_addr_t paddr[4];
|
||||
};
|
||||
|
||||
/**
|
||||
* struct bdisp_request - bdisp request
|
||||
*
|
||||
* @src: source frame properties
|
||||
* @dst: destination frame properties
|
||||
* @hflip: horizontal flip
|
||||
* @vflip: vertical flip
|
||||
* @nb_req: number of run request
|
||||
*/
|
||||
struct bdisp_request {
|
||||
struct bdisp_frame src;
|
||||
struct bdisp_frame dst;
|
||||
unsigned int hflip:1;
|
||||
unsigned int vflip:1;
|
||||
int nb_req;
|
||||
};
|
||||
|
||||
/**
|
||||
* struct bdisp_ctx - device context data
|
||||
*
|
||||
* @src: source frame properties
|
||||
* @dst: destination frame properties
|
||||
* @state: flags to keep track of user configuration
|
||||
* @hflip: horizontal flip
|
||||
* @vflip: vertical flip
|
||||
* @bdisp_dev: the device this context applies to
|
||||
* @node: node array
|
||||
* @node_paddr: node physical address array
|
||||
* @fh: v4l2 file handle
|
||||
* @ctrl_handler: v4l2 controls handler
|
||||
* @bdisp_ctrls: bdisp control set
|
||||
* @ctrls_rdy: true if the control handler is initialized
|
||||
*/
|
||||
struct bdisp_ctx {
|
||||
struct bdisp_frame src;
|
||||
struct bdisp_frame dst;
|
||||
u32 state;
|
||||
unsigned int hflip:1;
|
||||
unsigned int vflip:1;
|
||||
struct bdisp_dev *bdisp_dev;
|
||||
struct bdisp_node *node[MAX_NB_NODE];
|
||||
dma_addr_t node_paddr[MAX_NB_NODE];
|
||||
struct v4l2_fh fh;
|
||||
struct v4l2_ctrl_handler ctrl_handler;
|
||||
struct bdisp_ctrls bdisp_ctrls;
|
||||
bool ctrls_rdy;
|
||||
};
|
||||
|
||||
/**
|
||||
* struct bdisp_m2m_device - v4l2 memory-to-memory device data
|
||||
*
|
||||
* @vdev: video device node for v4l2 m2m mode
|
||||
* @m2m_dev: v4l2 m2m device data
|
||||
* @ctx: hardware context data
|
||||
* @refcnt: reference counter
|
||||
*/
|
||||
struct bdisp_m2m_device {
|
||||
struct video_device *vdev;
|
||||
struct v4l2_m2m_dev *m2m_dev;
|
||||
struct bdisp_ctx *ctx;
|
||||
int refcnt;
|
||||
};
|
||||
|
||||
/**
|
||||
* struct bdisp_dev - abstraction for bdisp entity
|
||||
*
|
||||
* @v4l2_dev: v4l2 device
|
||||
* @vdev: video device
|
||||
* @pdev: platform device
|
||||
* @dev: device
|
||||
* @lock: mutex protecting this data structure
|
||||
* @slock: spinlock protecting this data structure
|
||||
* @id: device index
|
||||
* @m2m: memory-to-memory V4L2 device information
|
||||
* @state: flags used to synchronize m2m and capture mode operation
|
||||
* @alloc_ctx: videobuf2 memory allocator context
|
||||
* @clock: IP clock
|
||||
* @regs: registers
|
||||
* @irq_queue: interrupt handler waitqueue
|
||||
* @work_queue: workqueue to handle timeouts
|
||||
* @timeout_work: IRQ timeout structure
|
||||
*/
|
||||
struct bdisp_dev {
|
||||
struct v4l2_device v4l2_dev;
|
||||
struct video_device vdev;
|
||||
struct platform_device *pdev;
|
||||
struct device *dev;
|
||||
spinlock_t slock;
|
||||
struct mutex lock;
|
||||
u16 id;
|
||||
struct bdisp_m2m_device m2m;
|
||||
unsigned long state;
|
||||
struct vb2_alloc_ctx *alloc_ctx;
|
||||
struct clk *clock;
|
||||
void __iomem *regs;
|
||||
wait_queue_head_t irq_queue;
|
||||
struct workqueue_struct *work_queue;
|
||||
struct delayed_work timeout_work;
|
||||
};
|
||||
|
||||
void bdisp_hw_free_nodes(struct bdisp_ctx *ctx);
|
||||
int bdisp_hw_alloc_nodes(struct bdisp_ctx *ctx);
|
||||
void bdisp_hw_free_filters(struct device *dev);
|
||||
int bdisp_hw_alloc_filters(struct device *dev);
|
||||
int bdisp_hw_reset(struct bdisp_dev *bdisp);
|
||||
int bdisp_hw_get_and_clear_irq(struct bdisp_dev *bdisp);
|
||||
int bdisp_hw_update(struct bdisp_ctx *ctx);
|
||||
Reference in New Issue
Block a user