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net: phy: mscc: macsec support

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This patch adds MACsec offloading support to some Microsemi PHYs, to
configure flows and transformations so that matched packets can be
processed by the MACsec engine, either at egress, or at ingress.

Signed-off-by: Antoine Tenart <antoine.tenart@bootlin.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Antoine Tenart
2020-01-13 23:31:46 +01:00
committed by David S. Miller
parent 1bbe0ecc2a
commit 28c5107aa9
3 changed files with 698 additions and 0 deletions
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3
drivers/net/phy/Kconfig
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@@ -437,6 +437,9 @@ config MICROCHIP_T1_PHY
config MICROSEMI_PHY
tristate "Microsemi PHYs"
depends on MACSEC || MACSEC=n
select CRYPTO_AES
select CRYPTO_ECB
---help---
Currently supports VSC8514, VSC8530, VSC8531, VSC8540 and VSC8541 PHYs

691
drivers/net/phy/mscc.c
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File diff suppressed because it is too large Load Diff

4
drivers/net/phy/mscc_macsec.h
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@@ -8,6 +8,8 @@
#ifndef _MSCC_OCELOT_MACSEC_H_
#define _MSCC_OCELOT_MACSEC_H_
#define MSCC_MS_MAX_FLOWS 16
#define CONTROL_TYPE_EGRESS 0x6
#define CONTROL_TYPE_INGRESS 0xf
#define CONTROL_IV0 BIT(5)
@@ -59,6 +61,8 @@ enum mscc_macsec_validate_levels {
#define MSCC_MS_XFORM_REC(x, y) (((x) << 5) + (y))
#define MSCC_MS_ENA_CFG 0x800
#define MSCC_MS_FC_CFG 0x804
#define MSCC_MS_SAM_MAC_SA_MATCH_LO(x) (0x1000 + ((x) << 4))
#define MSCC_MS_SAM_MAC_SA_MATCH_HI(x) (0x1001 + ((x) << 4))
#define MSCC_MS_SAM_MISC_MATCH(x) (0x1004 + ((x) << 4))
#define MSCC_MS_SAM_MATCH_SCI_LO(x) (0x1005 + ((x) << 4))
#define MSCC_MS_SAM_MATCH_SCI_HI(x) (0x1006 + ((x) << 4))