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Merge 5.10.96 into android12-5.10-lts
Changes in 5.10.96
Bluetooth: refactor malicious adv data check
media: venus: core: Drop second v4l2 device unregister
net: sfp: ignore disabled SFP node
net: stmmac: skip only stmmac_ptp_register when resume from suspend
s390/module: fix loading modules with a lot of relocations
s390/hypfs: include z/VM guests with access control group set
bpf: Guard against accessing NULL pt_regs in bpf_get_task_stack()
scsi: zfcp: Fix failed recovery on gone remote port with non-NPIV FCP devices
udf: Restore i_lenAlloc when inode expansion fails
udf: Fix NULL ptr deref when converting from inline format
efi: runtime: avoid EFIv2 runtime services on Apple x86 machines
PM: wakeup: simplify the output logic of pm_show_wakelocks()
tracing/histogram: Fix a potential memory leak for kstrdup()
tracing: Don't inc err_log entry count if entry allocation fails
ceph: properly put ceph_string reference after async create attempt
ceph: set pool_ns in new inode layout for async creates
fsnotify: fix fsnotify hooks in pseudo filesystems
Revert "KVM: SVM: avoid infinite loop on NPF from bad address"
perf/x86/intel/uncore: Fix CAS_COUNT_WRITE issue for ICX
drm/etnaviv: relax submit size limits
KVM: x86: Update vCPU's runtime CPUID on write to MSR_IA32_XSS
arm64: errata: Fix exec handling in erratum 1418040 workaround
netfilter: nft_payload: do not update layer 4 checksum when mangling fragments
serial: 8250: of: Fix mapped region size when using reg-offset property
serial: stm32: fix software flow control transfer
tty: n_gsm: fix SW flow control encoding/handling
tty: Add support for Brainboxes UC cards.
usb-storage: Add unusual-devs entry for VL817 USB-SATA bridge
usb: xhci-plat: fix crash when suspend if remote wake enable
usb: common: ulpi: Fix crash in ulpi_match()
usb: gadget: f_sourcesink: Fix isoc transfer for USB_SPEED_SUPER_PLUS
USB: core: Fix hang in usb_kill_urb by adding memory barriers
usb: typec: tcpm: Do not disconnect while receiving VBUS off
ucsi_ccg: Check DEV_INT bit only when starting CCG4
jbd2: export jbd2_journal_[grab|put]_journal_head
ocfs2: fix a deadlock when commit trans
sched/membarrier: Fix membarrier-rseq fence command missing from query bitmask
x86/MCE/AMD: Allow thresholding interface updates after init
powerpc/32s: Allocate one 256k IBAT instead of two consecutives 128k IBATs
powerpc/32s: Fix kasan_init_region() for KASAN
powerpc/32: Fix boot failure with GCC latent entropy plugin
i40e: Increase delay to 1 s after global EMP reset
i40e: Fix issue when maximum queues is exceeded
i40e: Fix queues reservation for XDP
i40e: Fix for failed to init adminq while VF reset
i40e: fix unsigned stat widths
usb: roles: fix include/linux/usb/role.h compile issue
rpmsg: char: Fix race between the release of rpmsg_ctrldev and cdev
rpmsg: char: Fix race between the release of rpmsg_eptdev and cdev
scsi: bnx2fc: Flush destroy_work queue before calling bnx2fc_interface_put()
ipv6_tunnel: Rate limit warning messages
net: fix information leakage in /proc/net/ptype
hwmon: (lm90) Mark alert as broken for MAX6646/6647/6649
hwmon: (lm90) Mark alert as broken for MAX6680
ping: fix the sk_bound_dev_if match in ping_lookup
ipv4: avoid using shared IP generator for connected sockets
hwmon: (lm90) Reduce maximum conversion rate for G781
NFSv4: Handle case where the lookup of a directory fails
NFSv4: nfs_atomic_open() can race when looking up a non-regular file
net-procfs: show net devices bound packet types
drm/msm: Fix wrong size calculation
drm/msm/dsi: Fix missing put_device() call in dsi_get_phy
drm/msm/dsi: invalid parameter check in msm_dsi_phy_enable
ipv6: annotate accesses to fn->fn_sernum
NFS: Ensure the server has an up to date ctime before hardlinking
NFS: Ensure the server has an up to date ctime before renaming
powerpc64/bpf: Limit 'ldbrx' to processors compliant with ISA v2.06
netfilter: conntrack: don't increment invalid counter on NF_REPEAT
kernel: delete repeated words in comments
perf: Fix perf_event_read_local() time
sched/pelt: Relax the sync of util_sum with util_avg
net: phy: broadcom: hook up soft_reset for BCM54616S
phylib: fix potential use-after-free
octeontx2-pf: Forward error codes to VF
rxrpc: Adjust retransmission backoff
efi/libstub: arm64: Fix image check alignment at entry
hwmon: (lm90) Mark alert as broken for MAX6654
powerpc/perf: Fix power_pmu_disable to call clear_pmi_irq_pending only if PMI is pending
net: ipv4: Move ip_options_fragment() out of loop
net: ipv4: Fix the warning for dereference
ipv4: fix ip option filtering for locally generated fragments
ibmvnic: init ->running_cap_crqs early
ibmvnic: don't spin in tasklet
video: hyperv_fb: Fix validation of screen resolution
drm/msm/hdmi: Fix missing put_device() call in msm_hdmi_get_phy
drm/msm/dpu: invalid parameter check in dpu_setup_dspp_pcc
yam: fix a memory leak in yam_siocdevprivate()
net: cpsw: Properly initialise struct page_pool_params
net: hns3: handle empty unknown interrupt for VF
Revert "ipv6: Honor all IPv6 PIO Valid Lifetime values"
net: bridge: vlan: fix single net device option dumping
ipv4: raw: lock the socket in raw_bind()
ipv4: tcp: send zero IPID in SYNACK messages
ipv4: remove sparse error in ip_neigh_gw4()
net: bridge: vlan: fix memory leak in __allowed_ingress
dt-bindings: can: tcan4x5x: fix mram-cfg RX FIFO config
usr/include/Makefile: add linux/nfc.h to the compile-test coverage
fsnotify: invalidate dcache before IN_DELETE event
block: Fix wrong offset in bio_truncate()
mtd: rawnand: mpc5121: Remove unused variable in ads5121_select_chip()
Linux 5.10.96
Signed-off-by: Greg Kroah-Hartman <gregkh@google.com>
Change-Id: Ie34be06fa082557e93eda246f1a9ebf9f155a138
This commit is contained in:
@@ -31,7 +31,7 @@ tcan4x5x: tcan4x5x@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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spi-max-frequency = <10000000>;
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bosch,mram-cfg = <0x0 0 0 32 0 0 1 1>;
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bosch,mram-cfg = <0x0 0 0 16 0 0 1 1>;
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interrupt-parent = <&gpio1>;
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interrupts = <14 IRQ_TYPE_LEVEL_LOW>;
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device-state-gpios = <&gpio3 21 GPIO_ACTIVE_HIGH>;
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2
Makefile
2
Makefile
@@ -1,7 +1,7 @@
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# SPDX-License-Identifier: GPL-2.0
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VERSION = 5
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PATCHLEVEL = 10
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SUBLEVEL = 95
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SUBLEVEL = 96
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EXTRAVERSION =
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NAME = Dare mighty things
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@@ -506,34 +506,26 @@ static void entry_task_switch(struct task_struct *next)
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/*
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* ARM erratum 1418040 handling, affecting the 32bit view of CNTVCT.
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* Assuming the virtual counter is enabled at the beginning of times:
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*
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* - disable access when switching from a 64bit task to a 32bit task
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* - enable access when switching from a 32bit task to a 64bit task
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* Ensure access is disabled when switching to a 32bit task, ensure
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* access is enabled when switching to a 64bit task.
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*/
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static void erratum_1418040_thread_switch(struct task_struct *prev,
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struct task_struct *next)
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static void erratum_1418040_thread_switch(struct task_struct *next)
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{
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bool prev32, next32;
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u64 val;
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if (!IS_ENABLED(CONFIG_ARM64_ERRATUM_1418040))
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if (!IS_ENABLED(CONFIG_ARM64_ERRATUM_1418040) ||
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!this_cpu_has_cap(ARM64_WORKAROUND_1418040))
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return;
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prev32 = is_compat_thread(task_thread_info(prev));
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next32 = is_compat_thread(task_thread_info(next));
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if (prev32 == next32 || !this_cpu_has_cap(ARM64_WORKAROUND_1418040))
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return;
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val = read_sysreg(cntkctl_el1);
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if (!next32)
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val |= ARCH_TIMER_USR_VCT_ACCESS_EN;
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if (is_compat_thread(task_thread_info(next)))
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sysreg_clear_set(cntkctl_el1, ARCH_TIMER_USR_VCT_ACCESS_EN, 0);
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else
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val &= ~ARCH_TIMER_USR_VCT_ACCESS_EN;
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sysreg_clear_set(cntkctl_el1, 0, ARCH_TIMER_USR_VCT_ACCESS_EN);
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}
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write_sysreg(val, cntkctl_el1);
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static void erratum_1418040_new_exec(void)
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{
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preempt_disable();
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erratum_1418040_thread_switch(current);
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preempt_enable();
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}
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/*
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@@ -569,7 +561,7 @@ __notrace_funcgraph struct task_struct *__switch_to(struct task_struct *prev,
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entry_task_switch(next);
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uao_thread_switch(next);
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ssbs_thread_switch(next);
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erratum_1418040_thread_switch(prev, next);
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erratum_1418040_thread_switch(next);
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ptrauth_thread_switch_user(next);
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/*
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@@ -660,6 +652,7 @@ void arch_setup_new_exec(void)
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current->mm->context.flags = mmflags;
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ptrauth_thread_init_user();
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mte_thread_init_user();
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erratum_1418040_new_exec();
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if (task_spec_ssb_noexec(current)) {
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arch_prctl_spec_ctrl_set(current, PR_SPEC_STORE_BYPASS,
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@@ -102,6 +102,8 @@ extern s32 patch__hash_page_B, patch__hash_page_C;
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extern s32 patch__flush_hash_A0, patch__flush_hash_A1, patch__flush_hash_A2;
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extern s32 patch__flush_hash_B;
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int __init find_free_bat(void);
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unsigned int bat_block_size(unsigned long base, unsigned long top);
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#endif /* !__ASSEMBLY__ */
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/* We happily ignore the smaller BATs on 601, we don't actually use
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@@ -449,6 +449,7 @@
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#define PPC_RAW_LDX(r, base, b) (0x7c00002a | ___PPC_RT(r) | ___PPC_RA(base) | ___PPC_RB(b))
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#define PPC_RAW_LHZ(r, base, i) (0xa0000000 | ___PPC_RT(r) | ___PPC_RA(base) | IMM_L(i))
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#define PPC_RAW_LHBRX(r, base, b) (0x7c00062c | ___PPC_RT(r) | ___PPC_RA(base) | ___PPC_RB(b))
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#define PPC_RAW_LWBRX(r, base, b) (0x7c00042c | ___PPC_RT(r) | ___PPC_RA(base) | ___PPC_RB(b))
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#define PPC_RAW_LDBRX(r, base, b) (0x7c000428 | ___PPC_RT(r) | ___PPC_RA(base) | ___PPC_RB(b))
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#define PPC_RAW_STWCX(s, a, b) (0x7c00012d | ___PPC_RS(s) | ___PPC_RA(a) | ___PPC_RB(b))
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#define PPC_RAW_CMPWI(a, i) (0x2c000000 | ___PPC_RA(a) | IMM_L(i))
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@@ -11,6 +11,7 @@ CFLAGS_prom_init.o += -fPIC
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CFLAGS_btext.o += -fPIC
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endif
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CFLAGS_early_32.o += $(DISABLE_LATENT_ENTROPY_PLUGIN)
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CFLAGS_cputable.o += $(DISABLE_LATENT_ENTROPY_PLUGIN)
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CFLAGS_prom_init.o += $(DISABLE_LATENT_ENTROPY_PLUGIN)
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CFLAGS_btext.o += $(DISABLE_LATENT_ENTROPY_PLUGIN)
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@@ -19,6 +19,9 @@ CFLAGS_code-patching.o += -DDISABLE_BRANCH_PROFILING
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CFLAGS_feature-fixups.o += -DDISABLE_BRANCH_PROFILING
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endif
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CFLAGS_code-patching.o += $(DISABLE_LATENT_ENTROPY_PLUGIN)
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CFLAGS_feature-fixups.o += $(DISABLE_LATENT_ENTROPY_PLUGIN)
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obj-y += alloc.o code-patching.o feature-fixups.o pmem.o inst.o test_code-patching.o
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ifndef CONFIG_KASAN
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@@ -72,7 +72,7 @@ unsigned long p_block_mapped(phys_addr_t pa)
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return 0;
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}
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static int find_free_bat(void)
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int __init find_free_bat(void)
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{
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int b;
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int n = mmu_has_feature(MMU_FTR_USE_HIGH_BATS) ? 8 : 4;
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@@ -96,7 +96,7 @@ static int find_free_bat(void)
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* - block size has to be a power of two. This is calculated by finding the
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* highest bit set to 1.
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*/
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static unsigned int block_size(unsigned long base, unsigned long top)
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unsigned int bat_block_size(unsigned long base, unsigned long top)
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{
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unsigned int max_size = SZ_256M;
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unsigned int base_shift = (ffs(base) - 1) & 31;
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@@ -141,7 +141,7 @@ static unsigned long __init __mmu_mapin_ram(unsigned long base, unsigned long to
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int idx;
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while ((idx = find_free_bat()) != -1 && base != top) {
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unsigned int size = block_size(base, top);
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unsigned int size = bat_block_size(base, top);
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if (size < 128 << 10)
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break;
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@@ -201,18 +201,17 @@ void mmu_mark_initmem_nx(void)
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int nb = mmu_has_feature(MMU_FTR_USE_HIGH_BATS) ? 8 : 4;
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int i;
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unsigned long base = (unsigned long)_stext - PAGE_OFFSET;
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unsigned long top = (unsigned long)_etext - PAGE_OFFSET;
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unsigned long top = ALIGN((unsigned long)_etext - PAGE_OFFSET, SZ_128K);
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unsigned long border = (unsigned long)__init_begin - PAGE_OFFSET;
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unsigned long size;
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for (i = 0; i < nb - 1 && base < top && top - base > (128 << 10);) {
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size = block_size(base, top);
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for (i = 0; i < nb - 1 && base < top;) {
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size = bat_block_size(base, top);
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setibat(i++, PAGE_OFFSET + base, base, size, PAGE_KERNEL_TEXT);
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base += size;
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}
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if (base < top) {
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size = block_size(base, top);
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size = max(size, 128UL << 10);
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size = bat_block_size(base, top);
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if ((top - base) > size) {
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size <<= 1;
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if (strict_kernel_rwx_enabled() && base + size > border)
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@@ -10,48 +10,51 @@ int __init kasan_init_region(void *start, size_t size)
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{
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unsigned long k_start = (unsigned long)kasan_mem_to_shadow(start);
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unsigned long k_end = (unsigned long)kasan_mem_to_shadow(start + size);
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unsigned long k_cur = k_start;
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int k_size = k_end - k_start;
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int k_size_base = 1 << (ffs(k_size) - 1);
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unsigned long k_nobat = k_start;
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unsigned long k_cur;
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phys_addr_t phys;
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int ret;
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void *block;
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block = memblock_alloc(k_size, k_size_base);
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while (k_nobat < k_end) {
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unsigned int k_size = bat_block_size(k_nobat, k_end);
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int idx = find_free_bat();
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if (block && k_size_base >= SZ_128K && k_start == ALIGN(k_start, k_size_base)) {
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int shift = ffs(k_size - k_size_base);
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int k_size_more = shift ? 1 << (shift - 1) : 0;
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if (idx == -1)
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break;
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if (k_size < SZ_128K)
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break;
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phys = memblock_phys_alloc_range(k_size, k_size, 0,
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MEMBLOCK_ALLOC_ANYWHERE);
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if (!phys)
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break;
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setbat(-1, k_start, __pa(block), k_size_base, PAGE_KERNEL);
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if (k_size_more >= SZ_128K)
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setbat(-1, k_start + k_size_base, __pa(block) + k_size_base,
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k_size_more, PAGE_KERNEL);
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if (v_block_mapped(k_start))
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k_cur = k_start + k_size_base;
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if (v_block_mapped(k_start + k_size_base))
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k_cur = k_start + k_size_base + k_size_more;
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update_bats();
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setbat(idx, k_nobat, phys, k_size, PAGE_KERNEL);
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k_nobat += k_size;
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}
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if (k_nobat != k_start)
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update_bats();
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if (!block)
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block = memblock_alloc(k_size, PAGE_SIZE);
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if (!block)
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return -ENOMEM;
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if (k_nobat < k_end) {
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phys = memblock_phys_alloc_range(k_end - k_nobat, PAGE_SIZE, 0,
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MEMBLOCK_ALLOC_ANYWHERE);
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if (!phys)
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return -ENOMEM;
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}
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ret = kasan_init_shadow_page_tables(k_start, k_end);
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if (ret)
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return ret;
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kasan_update_early_region(k_start, k_cur, __pte(0));
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kasan_update_early_region(k_start, k_nobat, __pte(0));
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for (; k_cur < k_end; k_cur += PAGE_SIZE) {
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for (k_cur = k_nobat; k_cur < k_end; k_cur += PAGE_SIZE) {
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pmd_t *pmd = pmd_off_k(k_cur);
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void *va = block + k_cur - k_start;
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pte_t pte = pfn_pte(PHYS_PFN(__pa(va)), PAGE_KERNEL);
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pte_t pte = pfn_pte(PHYS_PFN(phys + k_cur - k_nobat), PAGE_KERNEL);
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__set_pte_at(&init_mm, k_cur, pte_offset_kernel(pmd, k_cur), pte, 0);
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}
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flush_tlb_kernel_range(k_start, k_end);
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memset(kasan_mem_to_shadow(start), 0, k_end - k_start);
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return 0;
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}
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@@ -651,17 +651,21 @@ bpf_alu32_trunc:
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EMIT(PPC_RAW_MR(dst_reg, b2p[TMP_REG_1]));
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break;
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case 64:
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/*
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* Way easier and faster(?) to store the value
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* into stack and then use ldbrx
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*
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* ctx->seen will be reliable in pass2, but
|
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* the instructions generated will remain the
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* same across all passes
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*/
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/* Store the value to stack and then use byte-reverse loads */
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PPC_BPF_STL(dst_reg, 1, bpf_jit_stack_local(ctx));
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EMIT(PPC_RAW_ADDI(b2p[TMP_REG_1], 1, bpf_jit_stack_local(ctx)));
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EMIT(PPC_RAW_LDBRX(dst_reg, 0, b2p[TMP_REG_1]));
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if (cpu_has_feature(CPU_FTR_ARCH_206)) {
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EMIT(PPC_RAW_LDBRX(dst_reg, 0, b2p[TMP_REG_1]));
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} else {
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EMIT(PPC_RAW_LWBRX(dst_reg, 0, b2p[TMP_REG_1]));
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if (IS_ENABLED(CONFIG_CPU_LITTLE_ENDIAN))
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EMIT(PPC_RAW_SLDI(dst_reg, dst_reg, 32));
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EMIT(PPC_RAW_LI(b2p[TMP_REG_2], 4));
|
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EMIT(PPC_RAW_LWBRX(b2p[TMP_REG_2], b2p[TMP_REG_2], b2p[TMP_REG_1]));
|
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if (IS_ENABLED(CONFIG_CPU_BIG_ENDIAN))
|
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EMIT(PPC_RAW_SLDI(b2p[TMP_REG_2], b2p[TMP_REG_2], 32));
|
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EMIT(PPC_RAW_OR(dst_reg, dst_reg, b2p[TMP_REG_2]));
|
||||
}
|
||||
break;
|
||||
}
|
||||
break;
|
||||
|
||||
@@ -1273,9 +1273,20 @@ static void power_pmu_disable(struct pmu *pmu)
|
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* Otherwise provide a warning if there is PMI pending, but
|
||||
* no counter is found overflown.
|
||||
*/
|
||||
if (any_pmc_overflown(cpuhw))
|
||||
clear_pmi_irq_pending();
|
||||
else
|
||||
if (any_pmc_overflown(cpuhw)) {
|
||||
/*
|
||||
* Since power_pmu_disable runs under local_irq_save, it
|
||||
* could happen that code hits a PMC overflow without PMI
|
||||
* pending in paca. Hence only clear PMI pending if it was
|
||||
* set.
|
||||
*
|
||||
* If a PMI is pending, then MSR[EE] must be disabled (because
|
||||
* the masked PMI handler disabling EE). So it is safe to
|
||||
* call clear_pmi_irq_pending().
|
||||
*/
|
||||
if (pmi_irq_pending())
|
||||
clear_pmi_irq_pending();
|
||||
} else
|
||||
WARN_ON(pmi_irq_pending());
|
||||
|
||||
val = mmcra = cpuhw->mmcr.mmcra;
|
||||
|
||||
@@ -20,6 +20,7 @@
|
||||
|
||||
static char local_guest[] = " ";
|
||||
static char all_guests[] = "* ";
|
||||
static char *all_groups = all_guests;
|
||||
static char *guest_query;
|
||||
|
||||
struct diag2fc_data {
|
||||
@@ -62,10 +63,11 @@ static int diag2fc(int size, char* query, void *addr)
|
||||
|
||||
memcpy(parm_list.userid, query, NAME_LEN);
|
||||
ASCEBC(parm_list.userid, NAME_LEN);
|
||||
parm_list.addr = (unsigned long) addr ;
|
||||
memcpy(parm_list.aci_grp, all_groups, NAME_LEN);
|
||||
ASCEBC(parm_list.aci_grp, NAME_LEN);
|
||||
parm_list.addr = (unsigned long)addr;
|
||||
parm_list.size = size;
|
||||
parm_list.fmt = 0x02;
|
||||
memset(parm_list.aci_grp, 0x40, NAME_LEN);
|
||||
rc = -1;
|
||||
|
||||
diag_stat_inc(DIAG_STAT_X2FC);
|
||||
|
||||
@@ -30,7 +30,7 @@
|
||||
#define DEBUGP(fmt , ...)
|
||||
#endif
|
||||
|
||||
#define PLT_ENTRY_SIZE 20
|
||||
#define PLT_ENTRY_SIZE 22
|
||||
|
||||
void *module_alloc(unsigned long size)
|
||||
{
|
||||
@@ -330,27 +330,26 @@ static int apply_rela(Elf_Rela *rela, Elf_Addr base, Elf_Sym *symtab,
|
||||
case R_390_PLTOFF32: /* 32 bit offset from GOT to PLT. */
|
||||
case R_390_PLTOFF64: /* 16 bit offset from GOT to PLT. */
|
||||
if (info->plt_initialized == 0) {
|
||||
unsigned int insn[5];
|
||||
unsigned int *ip = me->core_layout.base +
|
||||
me->arch.plt_offset +
|
||||
info->plt_offset;
|
||||
unsigned char insn[PLT_ENTRY_SIZE];
|
||||
char *plt_base;
|
||||
char *ip;
|
||||
|
||||
insn[0] = 0x0d10e310; /* basr 1,0 */
|
||||
insn[1] = 0x100a0004; /* lg 1,10(1) */
|
||||
plt_base = me->core_layout.base + me->arch.plt_offset;
|
||||
ip = plt_base + info->plt_offset;
|
||||
*(int *)insn = 0x0d10e310; /* basr 1,0 */
|
||||
*(int *)&insn[4] = 0x100c0004; /* lg 1,12(1) */
|
||||
if (IS_ENABLED(CONFIG_EXPOLINE) && !nospec_disable) {
|
||||
unsigned int *ij;
|
||||
ij = me->core_layout.base +
|
||||
me->arch.plt_offset +
|
||||
me->arch.plt_size - PLT_ENTRY_SIZE;
|
||||
insn[2] = 0xa7f40000 + /* j __jump_r1 */
|
||||
(unsigned int)(u16)
|
||||
(((unsigned long) ij - 8 -
|
||||
(unsigned long) ip) / 2);
|
||||
char *jump_r1;
|
||||
|
||||
jump_r1 = plt_base + me->arch.plt_size -
|
||||
PLT_ENTRY_SIZE;
|
||||
/* brcl 0xf,__jump_r1 */
|
||||
*(short *)&insn[8] = 0xc0f4;
|
||||
*(int *)&insn[10] = (jump_r1 - (ip + 8)) / 2;
|
||||
} else {
|
||||
insn[2] = 0x07f10000; /* br %r1 */
|
||||
*(int *)&insn[8] = 0x07f10000; /* br %r1 */
|
||||
}
|
||||
insn[3] = (unsigned int) (val >> 32);
|
||||
insn[4] = (unsigned int) val;
|
||||
*(long *)&insn[14] = val;
|
||||
|
||||
write(ip, insn, sizeof(insn));
|
||||
info->plt_initialized = 1;
|
||||
|
||||
@@ -5239,7 +5239,7 @@ static struct intel_uncore_type icx_uncore_imc = {
|
||||
.fixed_ctr_bits = 48,
|
||||
.fixed_ctr = SNR_IMC_MMIO_PMON_FIXED_CTR,
|
||||
.fixed_ctl = SNR_IMC_MMIO_PMON_FIXED_CTL,
|
||||
.event_descs = hswep_uncore_imc_events,
|
||||
.event_descs = snr_uncore_imc_events,
|
||||
.perf_ctr = SNR_IMC_MMIO_PMON_CTR0,
|
||||
.event_ctl = SNR_IMC_MMIO_PMON_CTL0,
|
||||
.event_mask = SNBEP_PMON_RAW_EVENT_MASK,
|
||||
|
||||
@@ -387,7 +387,7 @@ static void threshold_restart_bank(void *_tr)
|
||||
u32 hi, lo;
|
||||
|
||||
/* sysfs write might race against an offline operation */
|
||||
if (this_cpu_read(threshold_banks))
|
||||
if (!this_cpu_read(threshold_banks) && !tr->set_lvt_off)
|
||||
return;
|
||||
|
||||
rdmsr(tr->b->address, lo, hi);
|
||||
|
||||
@@ -4146,13 +4146,6 @@ static bool svm_can_emulate_instruction(struct kvm_vcpu *vcpu, void *insn, int i
|
||||
if (likely(!insn || insn_len))
|
||||
return true;
|
||||
|
||||
/*
|
||||
* If RIP is invalid, go ahead with emulation which will cause an
|
||||
* internal error exit.
|
||||
*/
|
||||
if (!kvm_vcpu_gfn_to_memslot(vcpu, kvm_rip_read(vcpu) >> PAGE_SHIFT))
|
||||
return true;
|
||||
|
||||
cr4 = kvm_read_cr4(vcpu);
|
||||
smep = cr4 & X86_CR4_SMEP;
|
||||
smap = cr4 & X86_CR4_SMAP;
|
||||
|
||||
@@ -3171,6 +3171,7 @@ int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
|
||||
if (data & ~supported_xss)
|
||||
return 1;
|
||||
vcpu->arch.ia32_xss = data;
|
||||
kvm_update_cpuid_runtime(vcpu);
|
||||
break;
|
||||
case MSR_SMI_COUNT:
|
||||
if (!msr_info->host_initiated)
|
||||
|
||||
@@ -575,7 +575,8 @@ void bio_truncate(struct bio *bio, unsigned new_size)
|
||||
offset = new_size - done;
|
||||
else
|
||||
offset = 0;
|
||||
zero_user(bv.bv_page, offset, bv.bv_len - offset);
|
||||
zero_user(bv.bv_page, bv.bv_offset + offset,
|
||||
bv.bv_len - offset);
|
||||
truncated = true;
|
||||
}
|
||||
done += bv.bv_len;
|
||||
|
||||
@@ -719,6 +719,13 @@ void __init efi_systab_report_header(const efi_table_hdr_t *systab_hdr,
|
||||
systab_hdr->revision >> 16,
|
||||
systab_hdr->revision & 0xffff,
|
||||
vendor);
|
||||
|
||||
if (IS_ENABLED(CONFIG_X86_64) &&
|
||||
systab_hdr->revision > EFI_1_10_SYSTEM_TABLE_REVISION &&
|
||||
!strcmp(vendor, "Apple")) {
|
||||
pr_info("Apple Mac detected, using EFI v1.10 runtime services only\n");
|
||||
efi.runtime_version = EFI_1_10_SYSTEM_TABLE_REVISION;
|
||||
}
|
||||
}
|
||||
|
||||
static __initdata char memory_type_name[][13] = {
|
||||
|
||||
@@ -119,9 +119,9 @@ efi_status_t handle_kernel_image(unsigned long *image_addr,
|
||||
if (image->image_base != _text)
|
||||
efi_err("FIRMWARE BUG: efi_loaded_image_t::image_base has bogus value\n");
|
||||
|
||||
if (!IS_ALIGNED((u64)_text, EFI_KIMG_ALIGN))
|
||||
efi_err("FIRMWARE BUG: kernel image not aligned on %ldk boundary\n",
|
||||
EFI_KIMG_ALIGN >> 10);
|
||||
if (!IS_ALIGNED((u64)_text, SEGMENT_ALIGN))
|
||||
efi_err("FIRMWARE BUG: kernel image not aligned on %dk boundary\n",
|
||||
SEGMENT_ALIGN >> 10);
|
||||
|
||||
kernel_size = _edata - _text;
|
||||
kernel_memsize = kernel_size + (_end - _edata);
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user