Many of the regmap enabled drivers implementing one or more of the
readable, writeable, volatile and precious methods use the same code
pattern:
return ((reg >= X && reg <= Y) || (reg >= W && reg <= Z) || ...)
Switch to a data driven approach, using tables to describe
readable/writeable/volatile and precious registers ranges instead.
The table based check can still be overridden by passing the usual function
pointers via struct regmap_config.
Signed-off-by: Davide Ciminaghi <ciminaghi@gnudd.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
It is sometimes convenient for a regmap user to override the standard
regmap lock/unlock functions with custom functions.
For instance this can be useful in case an already existing spinlock
or mutex has to be used for locking a set of registers instead of the
internal regmap spinlock/mutex.
Note that the fast_io field of struct regmap_bus is ignored in case
custom locking functions are used.
Signed-off-by: Davide Ciminaghi <ciminaghi@gnudd.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
This makes things consistent with the rest of the API and is actually what
the documentation says. We don't currently have any in tree users so low
cost.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
This is useful for integration with other subsystems, especially MFD,
and provides an alternative API for users that request their own IRQs.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Currently, regmap will write 1 to mask_base to mask
an interrupt and write 0 to unmask it.
But some chips do not have an interrupt mask register,
and only have interrupt enable register.
Then we should write 0 to disable interrupt and 1 to enable.
So add an mask_invert flag to handle this.
If it is not set, behavior is same as previous.
If set it to 1, the mask value will be inverted
before written to mask_base
Signed-off-by: Xiaofan Tian <tianxf@marvell.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Some devices need to have a runtime PM reference while handling interrupts
to ensure that the register I/O is available. Support this with a flag in
the chip.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Devices with register paging or indirectly accessed registers can configure
register mapping to map those on virtual address range. During access to
virtually mapped register range, indirect addressing is processed
automatically, in following steps:
1. selector for page or indirect register is updated (when needed);
2. register in data window is accessed.
Configuration should provide minimum and maximum register for virtual range,
details of selector field for page selection, minimum and maximum register of
data window for indirect access.
Virtual range registers are managed by cache as well as direct access
registers. In order to make indirect access more efficient, selector register
should be declared as non-volatile, if possible.
struct regmap_config is extended with the following:
struct regmap_range_cfg *ranges;
unsigned int n_ranges;
[Also reordered debugfs init to later on since the cleanup code was
conflicting with the new cleanup code for ranges anyway -- broonie]
Signed-off-by: Krystian Garbaciak <krystian.garbaciak@diasemi.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
It's perfectly sensible to ask if there's a regmap for a device which
doesn't have one so the stubbed version shouldn't complain, the caller
should be prepared for this.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Allow chips to provide a bank of registers for controlling the wake state
in a similar fashion to the masks and propagate the wake count to the
parent interrupt controller.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Add a field to struct regmap_bus that allows bus drivers to request that
register addresses and values be formatted with a specific endianness.
The default endianness is unchanged from current operation: Big.
Implement native endian formatting/parsing for 16- and 32-bit values.
This will be enough to support regmap-mmio.c.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
In some chips the IRQ status registers are not contiguous in the register
map but spaced at even spaces. This is an easy case to handle with minor
changes. It is assume for this purpose that the stride for status is
equal to the stride for mask/ack registers as well.
Signed-off-by: Graeme Gregory <gg@slimlogic.co.uk>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
This gets us up to date with the recommended current kernel infrastructure
and should transparently give us device tree interrupt bindings for any
devices using the framework. If an explicit IRQ mapping is passed in then
a legacy interrupt range is created, otherwise a simple linear mapping is
used. Previously a mapping was mandatory so existing drivers should not
be affected.
A function regmap_irq_get_virq() is provided to allow drivers to map
individual IRQs which should be used in preference to the existing
regmap_irq_chip_get_base() which is only valid if a legacy IRQ range is
provided.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Use devres to implement dev_get_regmap(). This should mean that in almost
all cases devices wishing to take advantage of framework features based on
regmap shouldn't need to explicitly pass the regmap into the framework.
This simplifies device setup a bit.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Some devices does not support bulk read and write operations, for them
we have series of single write and read operations.
Signed-off-by: Anthony Olech <Anthony.Olech@diasemi.com>
Signed-off-by: Ashish Jangam <ashish.jangam@kpitcummins.com>
[Fixed coding style, don't check use_single_rw before assign --broonie ]
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
regmap_config.reg_stride is introduced. All extant register addresses
are a multiple of this value. Users of serial-oriented regmap busses will
typically set this to 1. Users of the MMIO regmap bus will typically set
this based on the value size of their registers, in bytes, so 4 for a
32-bit register.
Throughout the regmap code, actual register addresses are used. Wherever
the register address is used to index some array of values, the address
is divided by the stride to determine the index, or vice-versa. Error-
checking is added to all entry-points for register address data to ensure
that register addresses actually satisfy the specified stride. The MMIO
bus ensures that the specified stride is large enough for the register
size.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Some devices have multiple separate register regions. Logically, one
regmap would be created per region. One issue that prevents this is that
each instance will attempt to create the same debugfs files. Avoid this
by allowing regmaps to be named, and use the name to construct the
debugfs directory name.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
