Commit Graph

628 Commits

Author SHA1 Message Date
Olof Johansson
1eb5f83ee9 Merge tag 'memory-controller-drv-tegra-5.14-2' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl into arm/drivers
Memory controller drivers for v5.14 - Tegra SoC, part two

Second set of changes for Tegra SoC memory controller drivers,
containing patchset from Thierry Reding:

"The goal here is to avoid early identity mappings altogether and instead
postpone the need for the identity mappings to when devices are attached
to the SMMU. This works by making the SMMU driver coordinate with the
memory controller driver on when to start enforcing SMMU translations.
This makes Tegra behave in a more standard way and pushes the code to
deal with the Tegra-specific programming into the NVIDIA SMMU
implementation."

This pulls a dependency from Will Deacon (ARM SMMU driver) and contains
further ARM SMMU driver patches to resolve complex dependencies between
different patchsets.  The pull from Will contains only one patch
("Implement ->probe_finalize()").  Further work in Will's tree might
depend on this patch, therefore patch was applied there.

On the other hand, this ("Implement ->probe_finalize()") patch is also a
dependency for ARM SMMU driver changes for Tegra.  These changes,
bringing seamless transition from the firmware framebuffer to the OS
framebuffer, depend on earlier Tegra memory controller driver patches.

* tag 'memory-controller-drv-tegra-5.14-2' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl: (37 commits)
  iommu/arm-smmu: Use Tegra implementation on Tegra186
  iommu/arm-smmu: tegra: Implement SID override programming
  iommu/arm-smmu: tegra: Detect number of instances at runtime
  dt-bindings: arm-smmu: Add Tegra186 compatible string
  memory: tegra: Delete dead debugfs checking code
  iommu/arm-smmu: Implement ->probe_finalize()
  memory: tegra: Implement SID override programming
  memory: tegra: Split Tegra194 data into separate file
  memory: tegra: Add memory client IDs to tables
  memory: tegra: Unify drivers
  memory: tegra: Only initialize reset controller if available
  memory: tegra: Make IRQ support opitonal
  memory: tegra: Parameterize interrupt handler
  memory: tegra: Extract setup code into callback
  memory: tegra: Make per-SoC setup more generic
  memory: tegra: Push suspend/resume into SoC drivers
  memory: tegra: Introduce struct tegra_mc_ops
  memory: tegra: Unify struct tegra_mc across SoC generations
  memory: tegra: Consolidate register fields
  memory: tegra30-emc: Use devm_tegra_core_dev_init_opp_table()
  ...

Link: https://lore.kernel.org/r/20210614195200.21657-1-krzysztof.kozlowski@canonical.com
Signed-off-by: Olof Johansson <olof@lixom.net>
2021-06-16 17:36:30 -07:00
Olof Johansson
361aa4be70 Merge tag 'memory-controller-drv-pl353-5.14' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl into arm/drivers
Memory controller drivers for v5.14 - PL353

Bigger work around ARM Primecell PL35x SMC memory controller driver by
Miquel Raynal built on previous series from Naga Sureshkumar Relli.

This includes bindings cleanup and correction, converting these to
dtschema and several cleanyps in pl353-smc driver.

* tag 'memory-controller-drv-pl353-5.14' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl:
  dt-binding: memory: pl353-smc: Convert to yaml
  MAINTAINERS: Add PL353 SMC entry
  memory: pl353-smc: Declare variables following a reverse christmas tree order
  memory: pl353-smc: Avoid useless acronyms in descriptions
  memory: pl353-smc: Let lower level controller drivers handle inits
  memory: pl353-smc: Rename goto labels
  memory: pl353-smc: Fix style
  dt-binding: memory: pl353-smc: Fix the NAND controller node in the example
  dt-binding: memory: pl353-smc: Drop unsupported nodes from the example
  dt-binding: memory: pl353-smc: Fix the example syntax and style
  dt-binding: memory: pl353-smc: Describe the child reg property
  dt-binding: memory: pl353-smc: Drop the partitioning section
  dt-binding: memory: pl353-smc: Document the range property
  dt-binding: memory: pl353-smc: Rephrase the binding

Link: https://lore.kernel.org/r/20210611140659.61980-2-krzysztof.kozlowski@canonical.com
Signed-off-by: Olof Johansson <olof@lixom.net>
2021-06-12 08:53:06 -07:00
Miquel Raynal
df6c2646d0 memory: pl353-smc: Declare variables following a reverse christmas tree order
This is a purely cosmetic change.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/r/20210610082040.2075611-15-miquel.raynal@bootlin.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-06-10 17:15:16 +02:00
Miquel Raynal
9d7bb4493a memory: pl353-smc: Avoid useless acronyms in descriptions
APER does not mean anything, while it seems legitimate to call this
clock the AXI peripheral clock.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/r/20210610082040.2075611-14-miquel.raynal@bootlin.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-06-10 17:15:16 +02:00
Miquel Raynal
493db2b05d memory: pl353-smc: Let lower level controller drivers handle inits
There is no point in having all these definitions at the SMC bus level,
these are extremely tight to the NAND controller driver implementation,
are not particularly generic, imply more boilerplate than needed, do
not really follow the device model by receiving no argument and some of
them are actually buggy.

Let's get rid of these right now as there is no current user and keep
this driver at a simple level: only the SMC bare initializations.

The NAND controller driver which I am going to introduce will take care
of redefining properly all these helpers and using them directly.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/r/20210610082040.2075611-13-miquel.raynal@bootlin.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-06-10 17:15:16 +02:00
Miquel Raynal
edd84c4256 memory: pl353-smc: Rename goto labels
A goto label is better named

        do_something:

than

        out_something_to_do:

Use the former wording and really describe what the jump involves.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/r/20210610082040.2075611-12-miquel.raynal@bootlin.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-06-10 17:15:16 +02:00
Miquel Raynal
62584c870c memory: pl353-smc: Fix style
Use proper spacing.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/r/20210610082040.2075611-11-miquel.raynal@bootlin.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-06-10 17:15:15 +02:00
Krzysztof Kozlowski
729a611e6f memory: emif: remove unused frequency and voltage notifiers
The driver defined several functions related to handling of frequency
and voltage changes:
 - freq_post_notify_handling
 - freq_pre_notify_handling
 - volt_notify_handling

All these are static, not used inside or outside of driver, and marked
as unused with comment: "TODO: voltage notify handling should be hooked
up to regulator framework as soon as the necessary support is available
in mainline kernel. This function is un-used right now.".

These have been added with commit a93de288aa ("memory: emif: handle
frequency and voltage change events") in 2012 and are unused since then.
Additionally mentioned regulator and clock hooking did not happen since
then.  If it did not happen for nine years, let's assume it will not
happen suddenly now.

Remove all unused functions which also allows removal of "t_ck" static
variable "t_ck" and "addressing" member of private structure.

No functionality is lost.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Link: https://lore.kernel.org/r/20210527154101.80556-1-krzysztof.kozlowski@canonical.com
2021-06-10 09:24:46 +02:00
Krzysztof Kozlowski
8e0d09b123 memory: fsl_ifc: fix leak of private memory on probe failure
On probe error the driver should free the memory allocated for private
structure.  Fix this by using resource-managed allocation.

Fixes: a20cbdeffc ("powerpc/fsl: Add support for Integrated Flash Controller")
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Link: https://lore.kernel.org/r/20210527154322.81253-2-krzysztof.kozlowski@canonical.com
2021-06-10 09:24:37 +02:00
Krzysztof Kozlowski
3b132ab67f memory: fsl_ifc: fix leak of IO mapping on probe failure
On probe error the driver should unmap the IO memory.  Smatch reports:

  drivers/memory/fsl_ifc.c:298 fsl_ifc_ctrl_probe() warn: 'fsl_ifc_ctrl_dev->gregs' not released on lines: 298.

Fixes: a20cbdeffc ("powerpc/fsl: Add support for Integrated Flash Controller")
Reported-by: kernel test robot <lkp@intel.com>
Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Link: https://lore.kernel.org/r/20210527154322.81253-1-krzysztof.kozlowski@canonical.com
2021-06-10 09:24:16 +02:00
Dan Carpenter
c7c6570326 memory: tegra: Delete dead debugfs checking code
The debugfs_create_dir() function does not return NULL, it returns error
pointers.  But in normal situations like this where the caller is not
dereferencing "emc->debugfs.root" then we are not supposed to check the
return.  So instead of fixing these checks, we should delete them.

Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Link: https://lore.kernel.org/r/YMCQDTSyG8UuQoh0@mwanda
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-06-10 09:18:15 +02:00
Thierry Reding
393d66fd2c memory: tegra: Implement SID override programming
Instead of programming all SID overrides during early boot, perform the
operation on-demand after the SMMU translations have been set up for a
device. This reuses data from device tree to match memory clients for a
device and programs the SID specified in device tree, which corresponds
to the SID used for the SMMU context banks for the device.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Link: https://lore.kernel.org/r/20210603164632.1000458-2-thierry.reding@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-06-03 21:50:43 +02:00
Thierry Reding
8fd9f632ba memory: tegra: Split Tegra194 data into separate file
Keep the directory structure consistent by splitting the Tegra194 data
into a separate file.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Link: https://lore.kernel.org/r/20210602163302.120041-13-thierry.reding@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-06-03 21:49:41 +02:00
Thierry Reding
7191b623a2 memory: tegra: Add memory client IDs to tables
The memory client IDs will subsequently be used to program override SIDs
for the given clients depending on the device tree configuration.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Link: https://lore.kernel.org/r/20210602163302.120041-12-thierry.reding@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-06-03 21:49:41 +02:00
Thierry Reding
7355c7b9ae memory: tegra: Unify drivers
The Tegra210 (and earlier) driver now supports all the functionality
that the Tegra186 (and later) driver does, so they can be unified.

Note that previously the Tegra186 (and later) driver could be unloaded,
even if that was perhaps not very useful. Older chips don't support that
yet, but once they do this code can be reenabled.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Link: https://lore.kernel.org/r/20210602163302.120041-11-thierry.reding@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-06-03 21:49:41 +02:00
Thierry Reding
0de93c6985 memory: tegra: Only initialize reset controller if available
The memory controller hot resets are implemented in the BPMP on Tegra186
and later, so there's no need to provide an implementation via the
memory controller driver. Conditionally register the reset controller
only if needed.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Link: https://lore.kernel.org/r/20210602163302.120041-10-thierry.reding@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-06-03 21:49:41 +02:00
Thierry Reding
e474b3a15d memory: tegra: Make IRQ support opitonal
Make IRQ support optional to help unify the Tegra186 memory controller
driver with this one.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Link: https://lore.kernel.org/r/20210602163302.120041-9-thierry.reding@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-06-03 21:49:41 +02:00
Thierry Reding
1079a66bc3 memory: tegra: Parameterize interrupt handler
Tegra20 requires a slightly different interrupt handler than Tegra30 and
later, so parameterize the handler, so that each SoC implementation can
provide its own.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Link: https://lore.kernel.org/r/20210602163302.120041-8-thierry.reding@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-06-03 21:49:41 +02:00
Thierry Reding
ddeceab0a9 memory: tegra: Extract setup code into callback
Separate the setup code for Tegra30 and later into a ->setup() callback
and set it for all applicable chips.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Link: https://lore.kernel.org/r/20210602163302.120041-7-thierry.reding@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-06-03 21:49:41 +02:00
Thierry Reding
c64738e949 memory: tegra: Make per-SoC setup more generic
The current per-SoC setup code runs at a fairly arbitrary point during
probe, thereby making it less flexible for other SoC generations. Move
the call around slightly (after only the very basic, common setup that
applies to all SoC generations has been performed), which will allow
it to be used for other implementations.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Link: https://lore.kernel.org/r/20210602163302.120041-6-thierry.reding@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-06-03 21:49:41 +02:00
Thierry Reding
5c9016f0a8 memory: tegra: Push suspend/resume into SoC drivers
Continuing the scheme of unification, push suspend/resume callbacks into
per-SoC driver so that they can be properly parameterized.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Link: https://lore.kernel.org/r/20210602163302.120041-5-thierry.reding@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-06-03 21:49:41 +02:00
Thierry Reding
6cc884c1c7 memory: tegra: Introduce struct tegra_mc_ops
Subsequent patches will introduce further callbacks, so create a new
struct tegra_mc_ops to collect all of them in a single place. Move the
existing ->init() callback into the new structure.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Link: https://lore.kernel.org/r/20210602163302.120041-4-thierry.reding@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-06-03 21:49:40 +02:00
Thierry Reding
e899993845 memory: tegra: Unify struct tegra_mc across SoC generations
As another step towards unifying both the Tegra210 (and earlier) and
Tegra186 (and later) memory controller drivers, unify the structures
that are used to represent them.

Note that this comes at a slight space penalty since some fields are
not used on all generations, but the benefits of unifying the driver
outweigh the downsides.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Link: https://lore.kernel.org/r/20210602163302.120041-3-thierry.reding@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-06-03 21:49:40 +02:00
Thierry Reding
4f1ac76e5e memory: tegra: Consolidate register fields
Subsequent patches will add more register fields to the tegra_mc_client
structure, so consolidate all register field definitions into a common
sub-structure for coherency.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Link: https://lore.kernel.org/r/20210602163302.120041-2-thierry.reding@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-06-03 21:49:40 +02:00
Dmitry Osipenko
b4f74b59b9 memory: tegra30-emc: Use devm_tegra_core_dev_init_opp_table()
Use common devm_tegra_core_dev_init_opp_table() helper for the OPP table
initialization.

Tested-by: Peter Geis <pgwipeout@gmail.com> # Ouya T30
Tested-by: Matt Merhar <mattmerhar@protonmail.com> # Ouya T30
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-06-03 14:24:03 +02:00