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EDAC/igen6: Add EDAC driver for Intel client SoCs using IBECC

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This driver supports Intel client SoC with integrated memory controller
using In-Band ECC(IBECC). The memory correctable and uncorrectable errors
are reported via NMIs. The driver handles the NMIs and decodes the memory
error address to platform specific address. The first IBECC-supported SoC
is Elkhart Lake.

[Tony: s/#include <linux/nmi.h>/#include <asm/nmi.h>/ to fix randconfig build]

Signed-off-by: Qiuxu Zhuo <qiuxu.zhuo@intel.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
This commit is contained in:
Qiuxu Zhuo
2020-11-05 15:49:14 +08:00
committed by Tony Luck
parent 3b20369313
commit 10590a9d4f
3 changed files with 928 additions and 0 deletions
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9
drivers/edac/Kconfig
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@@ -269,6 +269,15 @@ config EDAC_PND2
first used on the Apollo Lake platform and Denverton
micro-server but may appear on others in the future.
config EDAC_IGEN6
tristate "Intel client SoC Integrated MC"
depends on PCI && X86_64 && PCI_MMCONFIG && ARCH_HAVE_NMI_SAFE_CMPXCHG
help
Support for error detection and correction on the Intel
client SoC Integrated Memory Controller using In-Band ECC IP.
This In-Band ECC is first used on the Elkhart Lake SoC but
may appear on others in the future.
config EDAC_MPC85XX
bool "Freescale MPC83xx / MPC85xx"
depends on FSL_SOC && EDAC=y

1
drivers/edac/Makefile
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@@ -32,6 +32,7 @@ obj-$(CONFIG_EDAC_I7300) += i7300_edac.o
obj-$(CONFIG_EDAC_I7CORE) += i7core_edac.o
obj-$(CONFIG_EDAC_SBRIDGE) += sb_edac.o
obj-$(CONFIG_EDAC_PND2) += pnd2_edac.o
obj-$(CONFIG_EDAC_IGEN6) += igen6_edac.o
obj-$(CONFIG_EDAC_E7XXX) += e7xxx_edac.o
obj-$(CONFIG_EDAC_E752X) += e752x_edac.o
obj-$(CONFIG_EDAC_I82443BXGX) += i82443bxgx_edac.o

918
drivers/edac/igen6_edac.c Normal file
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