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arm64: dts: exynos: Add initial device tree support for Exynos7885 SoC
Add initial Exynos7885 device tree nodes with dts for the Samsung Galaxy A8 (2018), a.k.a. "jackpotlte", with model number "SM-A530F". Currently this includes some clock support, UART support, and I2C nodes. Signed-off-by: David Virag <virag.david003@gmail.com> Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org> Link: https://lore.kernel.org/r/20220221194958.117361-2-virag.david003@gmail.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
This commit is contained in:
David Virag
committed by
Krzysztof Kozlowski
Krzysztof Kozlowski
parent
f377d4d4be
commit
0687401532
@@ -1,7 +1,8 @@
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# SPDX-License-Identifier: GPL-2.0
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dtb-$(CONFIG_ARCH_EXYNOS) += \
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exynos5433-tm2.dtb \
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exynos5433-tm2e.dtb \
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exynos7-espresso.dtb \
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exynos850-e850-96.dtb \
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exynos5433-tm2.dtb \
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exynos5433-tm2e.dtb \
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exynos7-espresso.dtb \
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exynos7885-jackpotlte.dtb \
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exynos850-e850-96.dtb \
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exynosautov9-sadk.dtb
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92
arch/arm64/boot/dts/exynos/exynos7885-jackpotlte.dts
Normal file
92
arch/arm64/boot/dts/exynos/exynos7885-jackpotlte.dts
Normal file
@@ -0,0 +1,92 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Samsung Galaxy A8 2018 (jackpotlte/SM-A530F) device tree source
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*
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* Copyright (c) 2021 Samsung Electronics Co., Ltd.
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* Copyright (c) 2021 Dávid Virág
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*/
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/dts-v1/;
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#include "exynos7885.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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/ {
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model = "Samsung Galaxy A8 (2018)";
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compatible = "samsung,jackpotlte", "samsung,exynos7885";
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chassis-type = "handset";
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aliases {
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serial0 = &serial_0;
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serial1 = &serial_1;
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serial2 = &serial_2;
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};
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chosen {
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stdout-path = &serial_2;
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};
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memory@80000000 {
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device_type = "memory";
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reg = <0x0 0x80000000 0x3da00000>,
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<0x0 0xc0000000 0x40000000>,
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<0x8 0x80000000 0x40000000>;
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};
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gpio-keys {
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compatible = "gpio-keys";
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pinctrl-names = "default";
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pinctrl-0 = <&key_volup &key_voldown &key_power>;
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volup-key {
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label = "Volume Up";
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linux,code = <KEY_VOLUMEUP>;
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gpios = <&gpa1 5 GPIO_ACTIVE_LOW>;
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};
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voldown-key {
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label = "Volume Down";
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linux,code = <KEY_VOLUMEDOWN>;
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gpios = <&gpa1 6 GPIO_ACTIVE_LOW>;
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};
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power-key {
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label = "Power";
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linux,code = <KEY_POWER>;
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gpios = <&gpa1 7 GPIO_ACTIVE_LOW>;
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wakeup-source;
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};
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};
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};
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&oscclk {
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clock-frequency = <26000000>;
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};
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&pinctrl_alive {
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key_volup: key-volup-pins {
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samsung,pins = "gpa1-5";
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samsung,pin-function = <EXYNOS_PIN_FUNC_F>;
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samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
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samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
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};
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key_voldown: key-voldown-pins {
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samsung,pins = "gpa1-6";
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samsung,pin-function = <EXYNOS_PIN_FUNC_F>;
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samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
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samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
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};
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key_power: key-power-pins {
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samsung,pins = "gpa1-7";
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samsung,pin-function = <EXYNOS_PIN_FUNC_F>;
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samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
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samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
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};
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};
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&serial_2 {
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status = "okay";
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};
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855
arch/arm64/boot/dts/exynos/exynos7885-pinctrl.dtsi
Normal file
855
arch/arm64/boot/dts/exynos/exynos7885-pinctrl.dtsi
Normal file
File diff suppressed because it is too large
Load Diff
423
arch/arm64/boot/dts/exynos/exynos7885.dtsi
Normal file
423
arch/arm64/boot/dts/exynos/exynos7885.dtsi
Normal file
@@ -0,0 +1,423 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Samsung Exynos7885 SoC device tree source
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*
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* Copyright (c) 2021 Samsung Electronics Co., Ltd.
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* Copyright (c) 2021 Dávid Virág
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*/
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#include <dt-bindings/clock/exynos7885.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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/ {
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compatible = "samsung,exynos7885";
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#address-cells = <2>;
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#size-cells = <1>;
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interrupt-parent = <&gic>;
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aliases {
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pinctrl0 = &pinctrl_alive;
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pinctrl1 = &pinctrl_dispaud;
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pinctrl2 = &pinctrl_fsys;
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pinctrl3 = &pinctrl_top;
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};
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arm-a53-pmu {
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compatible = "arm,cortex-a53-pmu";
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interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-affinity = <&cpu0>,
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<&cpu1>,
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<&cpu2>,
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<&cpu3>,
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<&cpu4>,
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<&cpu5>;
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};
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arm-a73-pmu {
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compatible = "arm,cortex-a73-pmu";
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interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-affinity = <&cpu6>,
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<&cpu7>;
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};
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu-map {
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cluster0 {
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core0 {
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cpu = <&cpu0>;
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};
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core1 {
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cpu = <&cpu1>;
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};
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core2 {
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cpu = <&cpu2>;
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};
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core3 {
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cpu = <&cpu3>;
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};
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core4 {
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cpu = <&cpu4>;
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};
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core5 {
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cpu = <&cpu5>;
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};
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};
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cluster1 {
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core0 {
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cpu = <&cpu6>;
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};
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core1 {
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cpu = <&cpu7>;
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};
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};
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};
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cpu0: cpu@100 {
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device_type = "cpu";
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compatible = "arm,cortex-a53";
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reg = <0x100>;
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enable-method = "psci";
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};
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cpu1: cpu@101 {
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device_type = "cpu";
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compatible = "arm,cortex-a53";
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reg = <0x101>;
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enable-method = "psci";
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};
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cpu2: cpu@102 {
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device_type = "cpu";
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compatible = "arm,cortex-a53";
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reg = <0x102>;
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enable-method = "psci";
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};
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cpu3: cpu@103 {
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device_type = "cpu";
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compatible = "arm,cortex-a53";
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reg = <0x103>;
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enable-method = "psci";
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};
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cpu4: cpu@200 {
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device_type = "cpu";
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compatible = "arm,cortex-a53";
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reg = <0x200>;
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enable-method = "psci";
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};
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cpu5: cpu@201 {
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device_type = "cpu";
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compatible = "arm,cortex-a53";
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reg = <0x201>;
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enable-method = "psci";
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};
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cpu6: cpu@0 {
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device_type = "cpu";
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compatible = "arm,cortex-a73";
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reg = <0x0>;
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enable-method = "psci";
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};
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cpu7: cpu@1 {
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device_type = "cpu";
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compatible = "arm,cortex-a73";
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reg = <0x1>;
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enable-method = "psci";
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};
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};
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psci {
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compatible = "arm,psci";
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method = "smc";
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cpu_suspend = <0xc4000001>;
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cpu_off = <0x84000002>;
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cpu_on = <0xc4000003>;
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};
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timer {
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compatible = "arm,armv8-timer";
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/* Hypervisor Virtual Timer interrupt is not wired to GIC */
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interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
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<GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
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<GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
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<GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>;
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};
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fixed-rate-clocks {
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oscclk: osc-clock {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-output-names = "oscclk";
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};
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};
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soc: soc@0 {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0x0 0x0 0x0 0x20000000>;
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chipid@10000000 {
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compatible = "samsung,exynos850-chipid";
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reg = <0x10000000 0x24>;
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};
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gic: interrupt-controller@12301000 {
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compatible = "arm,gic-400";
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#interrupt-cells = <3>;
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#address-cells = <0>;
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interrupt-controller;
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reg = <0x12301000 0x1000>,
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<0x12302000 0x2000>,
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<0x12304000 0x2000>,
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<0x12306000 0x2000>;
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interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(8) |
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IRQ_TYPE_LEVEL_HIGH)>;
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};
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cmu_peri: clock-controller@10010000 {
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compatible = "samsung,exynos7885-cmu-peri";
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reg = <0x10010000 0x8000>;
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#clock-cells = <1>;
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clocks = <&oscclk>,
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<&cmu_top CLK_DOUT_PERI_BUS>,
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<&cmu_top CLK_DOUT_PERI_SPI0>,
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<&cmu_top CLK_DOUT_PERI_SPI1>,
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<&cmu_top CLK_DOUT_PERI_UART0>,
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<&cmu_top CLK_DOUT_PERI_UART1>,
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<&cmu_top CLK_DOUT_PERI_UART2>,
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<&cmu_top CLK_DOUT_PERI_USI0>,
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<&cmu_top CLK_DOUT_PERI_USI1>,
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<&cmu_top CLK_DOUT_PERI_USI2>;
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clock-names = "oscclk",
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"dout_peri_bus",
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"dout_peri_spi0",
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"dout_peri_spi1",
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"dout_peri_uart0",
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"dout_peri_uart1",
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"dout_peri_uart2",
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"dout_peri_usi0",
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"dout_peri_usi1",
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"dout_peri_usi2";
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};
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cmu_core: clock-controller@12000000 {
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compatible = "samsung,exynos7885-cmu-core";
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reg = <0x12000000 0x8000>;
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#clock-cells = <1>;
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clocks = <&oscclk>,
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<&cmu_top CLK_DOUT_CORE_BUS>,
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<&cmu_top CLK_DOUT_CORE_CCI>,
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<&cmu_top CLK_DOUT_CORE_G3D>;
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clock-names = "oscclk",
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"dout_core_bus",
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"dout_core_cci",
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"dout_core_g3d";
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};
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cmu_top: clock-controller@12060000 {
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compatible = "samsung,exynos7885-cmu-top";
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reg = <0x12060000 0x8000>;
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#clock-cells = <1>;
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clocks = <&oscclk>;
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clock-names = "oscclk";
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};
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pinctrl_alive: pinctrl@11cb0000 {
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compatible = "samsung,exynos7885-pinctrl";
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reg = <0x11cb0000 0x1000>;
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wakeup-interrupt-controller {
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compatible = "samsung,exynos7-wakeup-eint";
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interrupt-parent = <&gic>;
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interrupts = <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
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};
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};
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pinctrl_fsys: pinctrl@13430000 {
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compatible = "samsung,exynos7885-pinctrl";
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reg = <0x13430000 0x1000>;
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interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
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};
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pinctrl_top: pinctrl@139b0000 {
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compatible = "samsung,exynos7885-pinctrl";
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reg = <0x139b0000 0x1000>;
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interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
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};
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pinctrl_dispaud: pinctrl@148f0000 {
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compatible = "samsung,exynos7885-pinctrl";
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reg = <0x148f0000 0x1000>;
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interrupts = <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
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};
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pmu_system_controller: system-controller@11c80000 {
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compatible = "samsung,exynos7-pmu", "syscon";
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reg = <0x11c80000 0x10000>;
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};
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serial_0: serial@13800000 {
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compatible = "samsung,exynos5433-uart";
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reg = <0x13800000 0x100>;
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interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&uart0_bus>;
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clocks = <&cmu_peri CLK_GOUT_UART0_EXT_UCLK>,
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<&cmu_peri CLK_GOUT_UART0_PCLK>;
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clock-names = "uart", "clk_uart_baud0";
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samsung,uart-fifosize = <64>;
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status = "disabled";
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};
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serial_1: serial@13810000 {
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compatible = "samsung,exynos5433-uart";
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reg = <0x13810000 0x100>;
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interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&uart1_bus>;
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clocks = <&cmu_peri CLK_GOUT_UART1_EXT_UCLK>,
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<&cmu_peri CLK_GOUT_UART1_PCLK>;
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clock-names = "uart", "clk_uart_baud0";
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samsung,uart-fifosize = <256>;
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status = "disabled";
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};
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serial_2: serial@13820000 {
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compatible = "samsung,exynos5433-uart";
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reg = <0x13820000 0x100>;
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interrupts = <GIC_SPI 279 IRQ_TYPE_LEVEL_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&uart2_bus>;
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clocks = <&cmu_peri CLK_GOUT_UART2_EXT_UCLK>,
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<&cmu_peri CLK_GOUT_UART2_PCLK>;
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clock-names = "uart", "clk_uart_baud0";
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samsung,uart-fifosize = <256>;
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status = "disabled";
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};
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i2c_0: i2c@13830000 {
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compatible = "samsung,s3c2440-i2c";
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reg = <0x13830000 0x100>;
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interrupts = <GIC_SPI 248 IRQ_TYPE_LEVEL_HIGH>;
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#address-cells = <1>;
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#size-cells = <0>;
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pinctrl-names = "default";
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pinctrl-0 = <&i2c0_bus>;
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clocks = <&cmu_peri CLK_GOUT_I2C0_PCLK>;
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clock-names = "i2c";
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status = "disabled";
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};
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i2c_1: i2c@13840000 {
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compatible = "samsung,s3c2440-i2c";
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reg = <0x13840000 0x100>;
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interrupts = <GIC_SPI 249 IRQ_TYPE_LEVEL_HIGH>;
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#address-cells = <1>;
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#size-cells = <0>;
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||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c1_bus>;
|
||||
clocks = <&cmu_peri CLK_GOUT_I2C1_PCLK>;
|
||||
clock-names = "i2c";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c_2: i2c@13850000 {
|
||||
compatible = "samsung,s3c2440-i2c";
|
||||
reg = <0x13850000 0x100>;
|
||||
interrupts = <GIC_SPI 250 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c2_bus>;
|
||||
clocks = <&cmu_peri CLK_GOUT_I2C2_PCLK>;
|
||||
clock-names = "i2c";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c_3: i2c@13860000 {
|
||||
compatible = "samsung,s3c2440-i2c";
|
||||
reg = <0x13860000 0x100>;
|
||||
interrupts = <GIC_SPI 251 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c3_bus>;
|
||||
clocks = <&cmu_peri CLK_GOUT_I2C3_PCLK>;
|
||||
clock-names = "i2c";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c_4: i2c@13870000 {
|
||||
compatible = "samsung,s3c2440-i2c";
|
||||
reg = <0x13870000 0x100>;
|
||||
interrupts = <GIC_SPI 252 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c4_bus>;
|
||||
clocks = <&cmu_peri CLK_GOUT_I2C4_PCLK>;
|
||||
clock-names = "i2c";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c_5: i2c@13880000 {
|
||||
compatible = "samsung,s3c2440-i2c";
|
||||
reg = <0x13880000 0x100>;
|
||||
interrupts = <GIC_SPI 253 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c5_bus>;
|
||||
clocks = <&cmu_peri CLK_GOUT_I2C5_PCLK>;
|
||||
clock-names = "i2c";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c_6: i2c@13890000 {
|
||||
compatible = "samsung,s3c2440-i2c";
|
||||
reg = <0x13890000 0x100>;
|
||||
interrupts = <GIC_SPI 254 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c6_bus>;
|
||||
clocks = <&cmu_peri CLK_GOUT_I2C6_PCLK>;
|
||||
clock-names = "i2c";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c_7: i2c@11cd0000 {
|
||||
compatible = "samsung,s3c2440-i2c";
|
||||
reg = <0x11cd0000 0x100>;
|
||||
interrupts = <GIC_SPI 255 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c7_bus>;
|
||||
clocks = <&cmu_peri CLK_GOUT_I2C7_PCLK>;
|
||||
clock-names = "i2c";
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
#include "exynos7885-pinctrl.dtsi"
|
||||
#include "arm/exynos-syscon-restart.dtsi"
|
||||
Reference in New Issue
Block a user