From 784d367e8aaffa1e2aed7bd844456921b9e8f97e Mon Sep 17 00:00:00 2001 From: royka1 Date: Mon, 6 Oct 2025 23:39:26 +0200 Subject: [PATCH] Add sata overlay for Orange-Pi-5 (#8707) * OPi5: SATA power via vcc3v3_pcie20; set to 3.3V; rename overlay * Convert spaces to tabs --------- Co-authored-by: Igor --- .../rockchip64-6.12/dt/rk3588s-orangepi-5.dts | 10 +++++-- .../archive/rockchip64-6.12/overlay/Makefile | 3 +- .../overlay/rockchip-rk3588-sata0.dtso | 20 +++++++++++++ .../board-orangepi5-sata-supply.patch | 29 +++++++++++++++++++ .../archive/rockchip64-6.17/overlay/Makefile | 1 + .../overlay/rockchip-rk3588-sata0.dtso | 20 +++++++++++++ 6 files changed, 80 insertions(+), 3 deletions(-) create mode 100644 patch/kernel/archive/rockchip64-6.12/overlay/rockchip-rk3588-sata0.dtso create mode 100644 patch/kernel/archive/rockchip64-6.17/board-orangepi5-sata-supply.patch create mode 100644 patch/kernel/archive/rockchip64-6.17/overlay/rockchip-rk3588-sata0.dtso diff --git a/patch/kernel/archive/rockchip64-6.12/dt/rk3588s-orangepi-5.dts b/patch/kernel/archive/rockchip64-6.12/dt/rk3588s-orangepi-5.dts index ea8c082a5..effede916 100644 --- a/patch/kernel/archive/rockchip64-6.12/dt/rk3588s-orangepi-5.dts +++ b/patch/kernel/archive/rockchip64-6.12/dt/rk3588s-orangepi-5.dts @@ -98,8 +98,8 @@ gpios = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>; regulator-name = "vcc3v3_pcie20"; regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; startup-delay-us = <50000>; vin-supply = <&vcc5v0_sys>; }; @@ -338,6 +338,12 @@ status = "okay"; }; +&sata0 { + sata-port@0 { + target-supply = <&vcc3v3_pcie20>; + }; +}; + &sdmmc { bus-width = <4>; cap-sd-highspeed; diff --git a/patch/kernel/archive/rockchip64-6.12/overlay/Makefile b/patch/kernel/archive/rockchip64-6.12/overlay/Makefile index ba68c79c5..04ea29996 100644 --- a/patch/kernel/archive/rockchip64-6.12/overlay/Makefile +++ b/patch/kernel/archive/rockchip64-6.12/overlay/Makefile @@ -1,7 +1,7 @@ # SPDX-License-Identifier: GPL-2.0 dtbo-$(CONFIG_ARCH_ROCKCHIP) += \ hinlink-h88k-240x135-lcd.dtbo \ - rk3308-otg-host.dtbo \ + rk3308-otg-host.dtbo \ rk3308-s0-ext-antenna.dtbo \ rk3308-b@1.3ghz.dtbo \ rk3308-bs.dtbo rk3308-bs@1.3ghz.dtbo \ @@ -52,6 +52,7 @@ dtbo-$(CONFIG_ARCH_ROCKCHIP) += \ rockchip-rk3568-hk-uart1.dtbo \ rockchip-rk3568-rock-3a-disable-uart2.dtbo \ rockchip-rk3588-fanctrl.dtbo \ + rockchip-rk3588-sata0.dtbo \ rockchip-rk3588-sata1.dtbo \ rockchip-rk3588-sata2.dtbo \ rockchip-rk3588-hdmirx.dtbo \ diff --git a/patch/kernel/archive/rockchip64-6.12/overlay/rockchip-rk3588-sata0.dtso b/patch/kernel/archive/rockchip64-6.12/overlay/rockchip-rk3588-sata0.dtso new file mode 100644 index 000000000..2e04a691d --- /dev/null +++ b/patch/kernel/archive/rockchip64-6.12/overlay/rockchip-rk3588-sata0.dtso @@ -0,0 +1,20 @@ +/dts-v1/; +/plugin/; + +/ { + fragment@0 { + target = <&pcie2x1l2>; + + __overlay__ { + status = "disabled"; + }; + }; + + fragment@1 { + target = <&sata0>; + + __overlay__ { + status = "okay"; + }; + }; +}; diff --git a/patch/kernel/archive/rockchip64-6.17/board-orangepi5-sata-supply.patch b/patch/kernel/archive/rockchip64-6.17/board-orangepi5-sata-supply.patch new file mode 100644 index 000000000..67b165231 --- /dev/null +++ b/patch/kernel/archive/rockchip64-6.17/board-orangepi5-sata-supply.patch @@ -0,0 +1,29 @@ +diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dts b/arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dts +index ad6d04793b0a..b811ec843936 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dts +@@ -14,8 +14,8 @@ vcc3v3_pcie20: regulator-vcc3v3-pcie20 { + gpios = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>; + regulator-name = "vcc3v3_pcie20"; + regulator-boot-on; +- regulator-min-microvolt = <1800000>; +- regulator-max-microvolt = <1800000>; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; + startup-delay-us = <50000>; + vin-supply = <&vcc5v0_sys>; + }; +@@ -27,6 +27,13 @@ &pcie2x1l2 { + status = "okay"; + }; + ++&sata0 { ++ sata-port@0 { ++ target-supply = <&vcc3v3_pcie20>; ++ }; ++}; ++ ++ + &sfc { + status = "okay"; + }; diff --git a/patch/kernel/archive/rockchip64-6.17/overlay/Makefile b/patch/kernel/archive/rockchip64-6.17/overlay/Makefile index 250f215a1..53b53fcb8 100644 --- a/patch/kernel/archive/rockchip64-6.17/overlay/Makefile +++ b/patch/kernel/archive/rockchip64-6.17/overlay/Makefile @@ -53,6 +53,7 @@ dtbo-$(CONFIG_ARCH_ROCKCHIP) += \ rockchip-rk3568-hk-uart1.dtbo \ rockchip-rk3568-rock-3a-disable-uart2.dtbo \ rockchip-rk3588-fanctrl.dtbo \ + rockchip-rk3588-sata0.dtbo \ rockchip-rk3588-sata1.dtbo \ rockchip-rk3588-sata2.dtbo \ rockchip-rk3588-hdmirx.dtbo \ diff --git a/patch/kernel/archive/rockchip64-6.17/overlay/rockchip-rk3588-sata0.dtso b/patch/kernel/archive/rockchip64-6.17/overlay/rockchip-rk3588-sata0.dtso new file mode 100644 index 000000000..2e04a691d --- /dev/null +++ b/patch/kernel/archive/rockchip64-6.17/overlay/rockchip-rk3588-sata0.dtso @@ -0,0 +1,20 @@ +/dts-v1/; +/plugin/; + +/ { + fragment@0 { + target = <&pcie2x1l2>; + + __overlay__ { + status = "disabled"; + }; + }; + + fragment@1 { + target = <&sata0>; + + __overlay__ { + status = "okay"; + }; + }; +};