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The boot-loop investigation exonerated everything except the original 786MHz TPL: a full hardware bisect (no patches, 024 only, 0026 only, both) booted every combination at 333MHz with byte-verified TPL signatures inside the images, which means the earlier "666 and 333 also fail" results came from flashing stale copies of the 786 image. 666MHz therefore goes back in for a clean, checksum-verified hardware test. Co-Authored-By: Claude Fable 5 <noreply@anthropic.com>