mirror of
https://github.com/archr-linux/Arch-R.git
synced 2026-03-31 14:41:55 -07:00
18c229177a
Build pipeline now produces a working bootable image. Found and fixed 11 gaps between the manually-built working SD and build-all.sh output: Boot partition: - extlinux.conf as primary boot method (U-Boot loads first) - PanCho removed from boot.ini and build-image.sh - Stale uInitrd removed (caused wrong boot path) - logo.bmp (U-Boot native BMP) replaces broken splash-1.raw - fstab uses LABEL=ROMS instead of /dev/mmcblk1p3 - Only R36S DTB copied (no extra r35s/rg351mp-linux) Root filesystem: - emulationstation.service created and enabled - getty@tty1 disabled (ES takes over tty1) - archr-boot-setup: Before=emulationstation.service, simplified - All services use After=local-fs.target (not removed getty) - boot-timing captures ES profiling data New files added to repo: - build-mesa.sh, build-retroarch.sh (were untracked) - Custom DTS, ALSA config, controller autoconfig - Runtime scripts (retroarch-launch, pmic-poweroff, hotkeys) - VLC stub source, timezone data Repo cleanup: - README.md rewritten with build instructions + architecture - .gitignore expanded (test scripts, failed approaches, logs) - splash-show.sh removed (failed splash approach) Co-Authored-By: Claude Opus 4.6 <noreply@anthropic.com>
137 lines
4.1 KiB
Python
137 lines
4.1 KiB
Python
#!/usr/bin/python3
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"""
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Arch R - RK817 PMIC Direct Power-Off via I2C
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Two-stage approach:
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Stage 1: SLPPIN_DN_FUN (standard kernel method — needs SLEEP pin)
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Stage 2: Disable all power rails (POWER_EN registers — guaranteed)
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RK817 does NOT have a DEV_OFF bit like RK805/RK808.
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Power-off is via SLPPIN mechanism, but requires the SLEEP pin
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to be physically driven (via pinctrl — which crashes on RK3326).
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Fallback: Disable all DCDC/LDO outputs via POWER_EN registers.
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This cuts power to CPU, RAM, and all peripherals → system dies.
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RK817 I2C: bus=0, addr=0x20
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Register map (from include/linux/mfd/rk808.h):
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POWER_EN_REG(0) = 0xb1 — DCDC1-4 + BOOST enable
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POWER_EN_REG(1) = 0xb2 — LDO1-4 enable
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POWER_EN_REG(2) = 0xb3 — LDO5-8 enable
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POWER_EN_REG(3) = 0xb4 — LDO9 enable
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SYS_CFG(3) = 0xf4 — SLPPIN function + polarity
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INT_STS_MSK_REG0 = 0xf9 — interrupt mask 0
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INT_STS_MSK_REG1 = 0xfb — interrupt mask 1
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INT_STS_MSK_REG2 = 0xfd — interrupt mask 2
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Uses raw I2C via /dev/i2c-0 — no i2c-tools dependency.
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"""
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import os
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import sys
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import fcntl
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import time
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I2C_SLAVE_FORCE = 0x0706
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I2C_BUS = '/dev/i2c-0'
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PMIC_ADDR = 0x20
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# RK817 registers
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SYS_CFG3 = 0xf4
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INT_STS_MSK_REG0 = 0xf9
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INT_STS_MSK_REG1 = 0xfb
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INT_STS_MSK_REG2 = 0xfd
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# Power enable registers — controls DCDC/LDO rail outputs
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POWER_EN_REG0 = 0xb1 # DCDC1-4, BOOST
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POWER_EN_REG1 = 0xb2 # LDO1-4
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POWER_EN_REG2 = 0xb3 # LDO5-8
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POWER_EN_REG3 = 0xb4 # LDO9+
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# SYS_CFG(3) bit definitions
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SLPPIN_FUNC_MSK = 0x18
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SLPPIN_DN_FUN = 0x10
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SLPPOL_MSK = 0x20
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SLPPOL_H = 0x20
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def i2c_read_reg(fd, reg):
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os.write(fd, bytes([reg]))
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return os.read(fd, 1)[0]
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def i2c_write_reg(fd, reg, val):
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os.write(fd, bytes([reg, val]))
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def i2c_update_bits(fd, reg, mask, val):
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cur = i2c_read_reg(fd, reg)
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new = (cur & ~mask) | (val & mask)
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i2c_write_reg(fd, reg, new)
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LOG = "/boot/pmic-poweroff.log"
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def log(msg):
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try:
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with open(LOG, "a") as f:
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f.write(f"{msg}\n")
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except Exception:
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pass
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try:
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log(f"=== PMIC power-off started ===")
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# Sync filesystems before cutting power
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os.sync()
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log("Filesystems synced")
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fd = os.open(I2C_BUS, os.O_RDWR)
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fcntl.ioctl(fd, I2C_SLAVE_FORCE, PMIC_ADDR)
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# Read current state for diagnostics
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cfg3 = i2c_read_reg(fd, SYS_CFG3)
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en0 = i2c_read_reg(fd, POWER_EN_REG0)
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log(f"SYS_CFG3=0x{cfg3:02x} POWER_EN0=0x{en0:02x}")
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# === Stage 1: Mask ALL interrupts ===
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# Prevents any IRQ from firing during shutdown (kernel panic cause)
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i2c_write_reg(fd, INT_STS_MSK_REG0, 0xff)
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i2c_write_reg(fd, INT_STS_MSK_REG1, 0xff)
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i2c_write_reg(fd, INT_STS_MSK_REG2, 0xff)
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log("All interrupts masked")
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# === Stage 2: Try SLPPIN_DN_FUN (standard method) ===
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i2c_update_bits(fd, SYS_CFG3, SLPPIN_FUNC_MSK, 0x00) # Clear
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i2c_update_bits(fd, SYS_CFG3, SLPPOL_MSK, SLPPOL_H) # Polarity HIGH
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i2c_update_bits(fd, SYS_CFG3, SLPPIN_FUNC_MSK, SLPPIN_DN_FUN) # Power down
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time.sleep(0.2) # 200ms — generous wait for SLPPIN to take effect
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log("SLPPIN_DN_FUN set, still alive after 200ms")
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# === Stage 3: Kill all power rails (guaranteed shutdown) ===
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# RK817 has no DEV_OFF bit — SLPPIN needs physical pin drive.
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# Without pinctrl (crashes kernel), SLEEP pin is never toggled.
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# Solution: Disable all DCDC/LDO outputs directly.
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# Order: LDOs first (peripherals), DCDCs last (core power).
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# Once vdd_arm (DCDC2) is cut, CPU dies instantly.
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log("Disabling all power rails...")
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# Disable LDOs (peripherals: LCD, SD, BL, PMU, 1V8, 1V0)
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i2c_write_reg(fd, POWER_EN_REG3, 0x00) # LDO9+
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i2c_write_reg(fd, POWER_EN_REG2, 0x00) # LDO5-8
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i2c_write_reg(fd, POWER_EN_REG1, 0x00) # LDO1-4 (includes vcc_1v8)
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# Disable DCDCs — this kills CPU power (vdd_arm=DCDC2, vdd_logic=DCDC1)
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# After this write, the CPU has no power and the system is dead.
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i2c_write_reg(fd, POWER_EN_REG0, 0x00) # DCDC1-4 + BOOST
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# Should never reach here — CPU is dead
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time.sleep(5)
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os.close(fd)
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except Exception as e:
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log(f"PMIC power-off FAILED: {e}")
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print(f"PMIC power-off failed: {e}", file=sys.stderr)
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sys.exit(1)
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