> "$GITHUB_OUTPUT"
@@ -222,7 +222,7 @@ jobs:
uses: ncipollo/release-action@v1
with:
tag: nightly-${{ env.DATE }}
- artifacts: ROCKNIX-*
+ artifacts: ArchR-*
allowUpdates: true
makeLatest: true
prerelease: true
@@ -242,11 +242,11 @@ jobs:
run: |
FILES=$(find . -type f \( -name "*.tar" -o -name "*.img.gz" -o -name "*.sha256" \))
for FILE in $FILES; do
- rsync -e ssh "$FILE" tiopex@frs.sourceforge.net:/home/frs/project/rocknix/nightly/${{ env.DATE }}/
+ rsync -e ssh "$FILE" tiopex@frs.sourceforge.net:/home/frs/project/archr/nightly/${{ env.DATE }}/
done
release-official:
- if: ${{ always() && !cancelled() && !contains(needs.*.result, 'failure') && !contains(needs.*.result, 'cancelled') && github.repository_owner == 'ROCKNIX' && needs.set-envs.outputs.OFFICIAL == 'yes' }}
+ if: ${{ always() && !cancelled() && !contains(needs.*.result, 'failure') && !contains(needs.*.result, 'cancelled') && github.repository_owner == 'archr-linux' && needs.set-envs.outputs.OFFICIAL == 'yes' }}
name: Release official
needs: build-devices
runs-on: ubuntu-24.04
@@ -269,12 +269,12 @@ jobs:
- name: Download artifacts
uses: actions/download-artifact@v8
with:
- pattern: ROCKNIX-image*
+ pattern: ArchR-image*
merge-multiple: true
- name: Download artifacts
uses: actions/download-artifact@v8
with:
- pattern: ROCKNIX-update*
+ pattern: ArchR-update*
merge-multiple: true
- name: get date
run: echo "DATE=$(date +'%Y%m%d')" >> $GITHUB_ENV
@@ -302,7 +302,7 @@ jobs:
with:
tag: ${{ env.DATE }}
commit: ${{ github.sha }}
- artifacts: ROCKNIX-*
+ artifacts: ArchR-*
allowUpdates: false
makeLatest: true
token: ${{ steps.app-token.outputs.token }}
diff --git a/.github/workflows/update-kernel-configs-docs.yml b/.github/workflows/update-kernel-configs-docs.yml
index 1ce00dfc98..c6e85ff020 100644
--- a/.github/workflows/update-kernel-configs-docs.yml
+++ b/.github/workflows/update-kernel-configs-docs.yml
@@ -5,7 +5,7 @@ on:
workflow_call:
push:
paths:
- - 'projects/ROCKNIX/packages/linux/package.mk'
+ - 'projects/ArchR/packages/linux/package.mk'
branches:
- next
@@ -25,23 +25,23 @@ jobs:
matrix:
include:
- device: RK3326
- project: ROCKNIX
+ project: ArchR
- device: RK3399
- project: ROCKNIX
+ project: ArchR
- device: RK3566
- project: ROCKNIX
+ project: ArchR
- device: RK3588
- project: ROCKNIX
+ project: ArchR
- device: S922X
- project: ROCKNIX
+ project: ArchR
- device: H700
- project: ROCKNIX
+ project: ArchR
- device: SM8250
- project: ROCKNIX
+ project: ArchR
- device: SM8550
- project: ROCKNIX
+ project: ArchR
- device: SM8650
- project: ROCKNIX
+ project: ArchR
runs-on: ubuntu-22.04
steps:
- name: Checkout
diff --git a/.github/workflows/update-mirror-sources.yml b/.github/workflows/update-mirror-sources.yml
index e030a5fced..19d3d88031 100644
--- a/.github/workflows/update-mirror-sources.yml
+++ b/.github/workflows/update-mirror-sources.yml
@@ -8,7 +8,7 @@ on:
jobs:
update-mirror-sources:
- if: (github.event_name != 'schedule') || (github.repository == 'ROCKNIX/distribution' && github.ref_name == 'next')
+ if: (github.event_name != 'schedule') || (github.repository == 'archr-linux/distribution' && github.ref_name == 'next')
name: Update mirror sources
runs-on: ubuntu-24.04
env:
@@ -36,14 +36,14 @@ jobs:
uses: corrupt952/actions-retry-command@v1.0.7
with:
command: |
- PROJECT=ROCKNIX DEVICE=RK3326 ./tools/download-tool
- PROJECT=ROCKNIX DEVICE=RK3399 ./tools/download-tool
- PROJECT=ROCKNIX DEVICE=RK3566 ./tools/download-tool
- PROJECT=ROCKNIX DEVICE=RK3588 ./tools/download-tool
- PROJECT=ROCKNIX DEVICE=H700 ./tools/download-tool
- PROJECT=ROCKNIX DEVICE=S922X ./tools/download-tool
- PROJECT=ROCKNIX DEVICE=SM8250 ./tools/download-tool
- PROJECT=ROCKNIX DEVICE=SM8550 ./tools/download-tool
+ PROJECT=ArchR DEVICE=RK3326 ./tools/download-tool
+ PROJECT=ArchR DEVICE=RK3399 ./tools/download-tool
+ PROJECT=ArchR DEVICE=RK3566 ./tools/download-tool
+ PROJECT=ArchR DEVICE=RK3588 ./tools/download-tool
+ PROJECT=ArchR DEVICE=H700 ./tools/download-tool
+ PROJECT=ArchR DEVICE=S922X ./tools/download-tool
+ PROJECT=ArchR DEVICE=SM8250 ./tools/download-tool
+ PROJECT=ArchR DEVICE=SM8550 ./tools/download-tool
max_attempts: 6
retry_interval: 10
- name: print number of downloaded artifacts
diff --git a/.gitignore b/.gitignore
index 76fd9ee48e..846037a8fe 100644
--- a/.gitignore
+++ b/.gitignore
@@ -2,6 +2,7 @@
/build.*/
/builds
/.fakeroot.*
+.claude
# automatically downloaded source files
/sources/
@@ -34,6 +35,11 @@ mkpkg-temp
# crap
.DS_Store
.directory
+Thumbs.db
+
+# temp scripts (debug/install helpers)
+fix-debug.sh
+install-debug.sh
# ignore git repos from update scripts
tools/mkpkg/*.git
@@ -41,10 +47,131 @@ tools/mkpkg/*.git
# ignore old linux configs
projects/**/*.old
-# ROCKNIX
-/.rocknix
+# Stock DTBs and reference files (binary, not needed for build)
+config/archr-dts/R36S-DTB/R36S/
+config/archr-dts/R36S-DTB/R46H/*.dtb
+config/archr-dts/R36S-DTB/R46H/boot.ini
+config/archr-dts/R36S-DTB/RGB20S/*.dtb
+config/archr-dts/R36S-DTB/RGB20S/boot.ini
+config/archr-dts/R36S-Clones-DTB/*/*.dtb
+config/archr-dts/R36S-Clones-DTB/*/extlinux/
+*.dtb.orig
+*.dtb.tony
+
+# Generated MIPI overlay output (regenerated by generator.sh)
+config/mipi-generator/output/
+
+# Generated DTBO overlays in u-boot config (copied from mipi-generator output)
+projects/ArchR/devices/RK3326/packages/u-boot/config/overlays_original/*.dtbo
+projects/ArchR/devices/RK3326/packages/u-boot/config/overlays_clone/*.dtbo
+
+# ArchR
+/.archr
/.cache
/.doc_cache
/.env
/.es_cache
/.config
+
+# Upstream/legacy distributions (not used by ArchR)
+distributions/ROCKNIX/
+distributions/LibreELEC/
+distributions/LEIoT/
+
+# Upstream/other platform projects (not used by PROJECT=ArchR)
+projects/ROCKNIX/
+projects/Allwinner/
+projects/Amlogic/
+projects/ARM/
+projects/Generic/
+projects/NXP/
+projects/Qualcomm/
+projects/Rockchip/
+projects/RPi/
+projects/Samsung/
+
+# Non-R36S device directories
+projects/ArchR/devices/H700/
+projects/ArchR/devices/RK3399/
+projects/ArchR/devices/RK3566/
+projects/ArchR/devices/RK3588/
+projects/ArchR/devices/S922X/
+projects/ArchR/devices/SDM845/
+projects/ArchR/devices/SM8250/
+projects/ArchR/devices/SM8550/
+projects/ArchR/devices/SM8650/
+
+# Non-R36S device documentation
+documentation/PER_DEVICE_DOCUMENTATION/H700/
+documentation/PER_DEVICE_DOCUMENTATION/RK3399/
+documentation/PER_DEVICE_DOCUMENTATION/RK3566/
+documentation/PER_DEVICE_DOCUMENTATION/RK3588/
+documentation/PER_DEVICE_DOCUMENTATION/S922X/
+documentation/PER_DEVICE_DOCUMENTATION/SDM845/
+documentation/PER_DEVICE_DOCUMENTATION/SM8250/
+documentation/PER_DEVICE_DOCUMENTATION/SM8550/
+documentation/PER_DEVICE_DOCUMENTATION/SM8650/
+
+# Kodi/mediacenter (MEDIACENTER not set in ArchR)
+packages/mediacenter/
+
+# Driver addons (DRIVER_ADDONS_SUPPORT=no in ArchR)
+packages/linux-driver-addons/
+
+# Kodi addons (no MEDIACENTER in ArchR)
+packages/addons/
+
+# Platform-specific bootloaders/tools (not RK3326)
+packages/tools/bcm2835-bootloader/
+packages/tools/bcm2835-utils/
+packages/tools/bcmstat/
+packages/tools/rpi-eeprom/
+packages/tools/amlogic-boot-fip/
+packages/tools/exynos-boot-fip/
+
+# Firmware not used by R36S (FIRMWARE=esp8089-firmware only)
+packages/linux-firmware/brcmfmac_sdio-firmware/
+packages/linux-firmware/brcmfmac_sdio-firmware-imx/
+packages/linux-firmware/brcmfmac_sdio-firmware-rpi/
+packages/linux-firmware/dvb-firmware/
+packages/linux-firmware/firmware-dragonboard/
+packages/linux-firmware/firmware-imx/
+packages/linux-firmware/iwlwifi-firmware/
+
+# Non-R36S CI workflows
+.github/workflows/build-aarch64-emu-libretro.yml
+.github/workflows/build-aarch64-emu-standalone.yml
+.github/workflows/build-aarch64-qt6.yml
+.github/workflows/build-aarch64-mame-lr.yml
+
+# Emulators not used by RK3326 (too heavy or Vulkan-only)
+projects/ArchR/packages/emulators/standalone/aethersx2-sa/
+projects/ArchR/packages/emulators/standalone/azahar-sa/
+projects/ArchR/packages/emulators/standalone/bigpemu-sa/
+projects/ArchR/packages/emulators/standalone/cemu-sa/
+projects/ArchR/packages/emulators/standalone/rpcs3-sa/
+projects/ArchR/packages/emulators/standalone/supermodel-sa/
+projects/ArchR/packages/emulators/standalone/xemu-sa/
+projects/ArchR/packages/emulators/standalone/skyemu-sa/
+projects/ArchR/packages/emulators/libretro/kronos-lr/
+
+# Graphics packages not used by RK3326 (no Vulkan on Mali G31)
+projects/ArchR/packages/graphics/libmali-vulkan/
+projects/ArchR/packages/graphics/vulkan-wsi-layer/
+
+# Qualcomm/non-RK3326 tools
+projects/ArchR/packages/tools/archr-abl/
+projects/ArchR/packages/tools/qcom-abl/
+
+# Platform-specific base packages (not used by RK3326)
+packages/audio/rpi-cirrus-config/
+packages/tools/crust/
+packages/tools/mkbootimg/
+packages/tools/grub/
+packages/linux-firmware/firmware-dragonboard/
+packages/linux-firmware/firmware-imx/
+packages/graphics/nvidia/
+packages/multimedia/intel-vaapi-driver/
+packages/multimedia/media-driver/
+packages/multimedia/gmmlib/
+packages/sysutils/open-vm-tools/
diff --git a/Dockerfile b/Dockerfile
index 9b53a9f111..3a98a2e3f1 100644
--- a/Dockerfile
+++ b/Dockerfile
@@ -1,32 +1,43 @@
-FROM ubuntu:jammy
+FROM archlinux:latest
-ARG DEBIAN_FRONTEND=noninteractive
SHELL ["/usr/bin/bash", "-c"]
-RUN apt-get update --fix-missing\
- && apt-get dist-upgrade -y \
- && apt-get install -y locales sudo
+# Update system and install base packages
+RUN pacman -Syu --noconfirm && \
+ pacman -S --noconfirm --needed \
+ base-devel bc jdk-openjdk file gawk git go gperf \
+ perl-json perl-xml-parser ncurses lzop make patchutils \
+ python python-setuptools parted unzip wget curl \
+ xorg-mkfontscale libxslt zip vim zstd rdfind automake \
+ xmlstarlet rsync which sudo rpcsvc-proto perl-parse-yapp xorg-bdftopcf
-RUN locale-gen en_US.UTF-8 \
- && update-locale LANG=en_US.UTF-8 LANGUAGE=en_US:en
+# Downgrade GCC to 14.x to avoid gnulib _Generic conflicts with GCC 15+
+RUN cd /tmp && \
+ curl -LO 'https://archive.archlinux.org/packages/g/gcc/gcc-14.2.1%2Br134%2Bgab884fffe3fc-1-x86_64.pkg.tar.zst' && \
+ curl -LO 'https://archive.archlinux.org/packages/g/gcc-libs/gcc-libs-14.2.1%2Br134%2Bgab884fffe3fc-1-x86_64.pkg.tar.zst' && \
+ pacman -U --noconfirm --overwrite='*' /tmp/gcc-*.pkg.tar.zst && \
+ rm -f /tmp/gcc-*.pkg.tar.zst
+
+# Create build user
+RUN useradd -m -s /bin/bash docker && \
+ echo 'docker ALL=(ALL) NOPASSWD:ALL' >> /etc/sudoers
+
+# Set locale
+RUN echo "en_US.UTF-8 UTF-8" >> /etc/locale.gen && \
+ locale-gen
ENV LANG=en_US.UTF-8 \
LANGUAGE=en_US:en \
LC_ALL=en_US.UTF-8
-RUN adduser --disabled-password --gecos '' docker \
- && adduser docker sudo \
- && echo '%sudo ALL=(ALL) NOPASSWD:ALL' >> /etc/sudoers
-
-RUN apt-get install -y \
- bc default-jre file gawk gcc git golang-go gperf libjson-perl libncurses5-dev \
- libparse-yapp-perl libxml-parser-perl lzop make patchutils python-is-python3 \
- python3 parted unzip wget curl xfonts-utils xsltproc zip xxd zstd rdfind automake \
- xmlstarlet rsync
+# Ensure Perl tools (pod2man, yapp, etc.) are in standard PATH
+RUN for f in /usr/bin/core_perl/*; do [ -f "$f" ] && ln -sf "$f" /usr/bin/ 2>/dev/null; done; \
+ for f in /usr/bin/vendor_perl/*; do [ -f "$f" ] && ln -sf "$f" /usr/bin/ 2>/dev/null; done; \
+ true
### Cross compiling on ARM
-RUN if [ "$(uname -m)" = "aarch64" ]; then apt-get install -y --no-install-recommends qemu-user-binfmt libc6-dev-amd64-cross; fi
-RUN if [ ! -d /lib64 ]; then ln -sf /usr/x86_64-rocknix-linux-gnu/lib64 /lib64; fi
-RUN if [ ! -d /lib/x86_64-rocknix-linux-gnu ]; then ln -sf /usr/x86_64-rocknix-linux-gnu/lib /lib/x86_64-rocknix-linux-gnu; fi
+RUN if [ "$(uname -m)" = "aarch64" ]; then pacman -S --noconfirm qemu-user-static; fi
+RUN if [ ! -d /lib64 ]; then ln -sf /usr/x86_64-archr-linux-gnu/lib64 /lib64 2>/dev/null || true; fi
+RUN if [ ! -d /lib/x86_64-archr-linux-gnu ]; then ln -sf /usr/x86_64-archr-linux-gnu/lib /lib/x86_64-archr-linux-gnu 2>/dev/null || true; fi
RUN mkdir -p /work && chown docker /work
diff --git a/LICENSE.md b/LICENSE.md
index f2c57de614..1935d7295f 100644
--- a/LICENSE.md
+++ b/LICENSE.md
@@ -1,14 +1,14 @@
-
[](https://github.com/ROCKNIX/distribution/releases/latest) [](https://github.com/ROCKNIX/distribution/commits) [](https://github.com/ROCKNIX/distribution/pulls) [](https://discord.gg/seTxckZjJy)
+
---
## Licenses
-ROCKNIX is a Linux distribution that is made up of many open-source components. Components are provided under their respective licenses. This distribution includes components licensed for non-commercial use only.
+ArchR is a Linux distribution forked from [ROCKNIX](https://github.com/ROCKNIX/distribution), made up of many open-source components. Components are provided under their respective licenses. This distribution includes components licensed for non-commercial use only.
-### ROCKNIX Branding
+### ArchR Branding
-ROCKNIX branding and images are licensed under a [Creative Commons Attribution-NonCommercial-ShareAlike 4.0 International License](https://creativecommons.org/licenses/by-nc-sa/4.0/).
+ArchR branding and images are licensed under a [Creative Commons Attribution-NonCommercial-ShareAlike 4.0 International License](https://creativecommons.org/licenses/by-nc-sa/4.0/). Original ROCKNIX branding remains the property of the ROCKNIX project.
You are free to:
@@ -21,11 +21,13 @@ Under the following terms:
- NonCommercial: You may not use the material for commercial purposes.
- ShareAlike: If you remix, transform, or build upon the material, you must distribute your contributions under the same license as the original.
-### ROCKNIX Software
+### ArchR Software
-Copyright 2024 ROCKNIX (https://github.com/ROCKNIX)
+Copyright 2024-2026 ArchR (https://github.com/archr-linux)
-Original software and scripts developed by the ROCKNIX team are licensed under the terms of the [GNU GPL Version 2](https://choosealicense.com/licenses/gpl-2.0/). The full license can be found in this project's licenses folder.
+Original software and scripts developed by the ArchR team are licensed under the terms of the [GNU GPL Version 2](https://choosealicense.com/licenses/gpl-2.0/). The full license can be found in this project's licenses folder.
+
+Portions of this software are derived from ROCKNIX, Copyright 2024 ROCKNIX (https://github.com/ROCKNIX).
### Bundled Works
-All other software is provided under each component's respective license. These licenses can be found in the software sources or in this project's licenses folder. Modifications to bundled software and scripts by the ROCKNIX team are licensed under the terms of the software being modified.
+All other software is provided under each component's respective license. These licenses can be found in the software sources or in this project's licenses folder. Modifications to bundled software and scripts by the ArchR team are licensed under the terms of the software being modified.
diff --git a/Makefile b/Makefile
index 2565db3ff8..2201a22892 100644
--- a/Makefile
+++ b/Makefile
@@ -1,4 +1,4 @@
--include $(HOME)/.ROCKNIX/options
+-include $(HOME)/.archr/options
all: world
@@ -26,7 +26,7 @@ src-pkg:
docs:
./tools/foreach './scripts/clean emulators && ./scripts/build emulators'
-world: RK3588 RK3566 RK3326 RK3399 S922X SM8250 SM8550 H700 SM8650
+world: RK3326
kconfig-olddefconfig-%:
DEVICE=$* ./tools/adjust_kernel_config olddefconfig
@@ -34,57 +34,13 @@ kconfig-olddefconfig-%:
kconfig-menuconfig-%:
DEVICE=$* ./tools/adjust_kernel_config menuconfig
-RK3588:
- unset DEVICE_ROOT
- PROJECT=ROCKNIX DEVICE=RK3588 ARCH=arm ./scripts/build_distro
- PROJECT=ROCKNIX DEVICE=RK3588 ARCH=aarch64 ./scripts/build_distro
-
-S922X:
- unset DEVICE_ROOT
- PROJECT=ROCKNIX DEVICE=S922X ARCH=arm ./scripts/build_distro
- PROJECT=ROCKNIX DEVICE=S922X ARCH=aarch64 ./scripts/build_distro
-
-RK3566:
- unset DEVICE_ROOT
- DEVICE_ROOT=RK3566 PROJECT=ROCKNIX DEVICE=RK3566 ARCH=arm ./scripts/build_distro
- DEVICE_ROOT=RK3566 PROJECT=ROCKNIX DEVICE=RK3566 ARCH=aarch64 ./scripts/build_distro
-
RK3326:
unset DEVICE_ROOT
- PROJECT=ROCKNIX DEVICE=RK3326 ARCH=arm ./scripts/build_distro
- PROJECT=ROCKNIX DEVICE=RK3326 ARCH=aarch64 ./scripts/build_distro
-
-RK3399:
- unset DEVICE_ROOT
- PROJECT=ROCKNIX DEVICE=RK3399 ARCH=arm ./scripts/build_distro
- PROJECT=ROCKNIX DEVICE=RK3399 ARCH=aarch64 ./scripts/build_distro
-
-H700:
- unset DEVICE_ROOT
- PROJECT=ROCKNIX DEVICE=H700 ARCH=arm ./scripts/build_distro
- PROJECT=ROCKNIX DEVICE=H700 ARCH=aarch64 ./scripts/build_distro
-
-SDM845:
- unset DEVICE_ROOT
- PROJECT=ROCKNIX DEVICE=SDM845 ARCH=arm ./scripts/build_distro
- PROJECT=ROCKNIX DEVICE=SDM845 ARCH=aarch64 ./scripts/build_distro
-
-SM8250:
- unset DEVICE_ROOT
- PROJECT=ROCKNIX DEVICE=SM8250 ARCH=arm ./scripts/build_distro
- PROJECT=ROCKNIX DEVICE=SM8250 ARCH=aarch64 ./scripts/build_distro
-
-SM8550:
- unset DEVICE_ROOT
- PROJECT=ROCKNIX DEVICE=SM8550 ARCH=arm ./scripts/build_distro
- PROJECT=ROCKNIX DEVICE=SM8550 ARCH=aarch64 ./scripts/build_distro
-
-SM8650:
- unset DEVICE_ROOT
- PROJECT=ROCKNIX DEVICE=SM8650 ARCH=aarch64 ./scripts/build_distro
+ PROJECT=ArchR DEVICE=RK3326 ARCH=arm ./scripts/build_distro
+ PROJECT=ArchR DEVICE=RK3326 ARCH=aarch64 ./scripts/build_distro
update:
- PROJECT=ROCKNIX DEVICE=RK3588 ARCH=aarch64 ./scripts/update_packages
+ PROJECT=ArchR DEVICE=RK3326 ARCH=aarch64 ./scripts/update_packages
package:
./scripts/build ${PACKAGE}
@@ -94,17 +50,17 @@ package-clean:
## Docker builds - overview
# docker-* commands just wire up docker to call the normal make command via docker
-# For example: make docker-SM8250 will use docker to call: make SM8250
+# For example: make docker-RK3326 will use docker to call: make RK3326
# All variables are scoped to docker-* commands to prevent weird collisions/behavior with non-docker commands
-docker-%: DOCKER_IMAGE := "ghcr.io/rocknix/rocknix-build:latest"
+docker-%: DOCKER_IMAGE := "archr-build:latest"
# DOCKER_WORK_DIR is the directory in the Docker image - it is set to /work by default
# Anytime this directory changes, you must run `make clean` similarly to moving the distribution directory
docker-%: DOCKER_WORK_DIR := $(shell if [ -n "${DOCKER_WORK_DIR}" ]; then echo ${DOCKER_WORK_DIR}; else echo "$$(pwd)" ; fi)
-# ${HOME}/.ROCKNIX/options is a global options file containing developer and build settings.
-docker-%: GLOBAL_SETTINGS := $(shell if [ -f "${HOME}/.ROCKNIX/options" ]; then echo "-v \"${HOME}/.ROCKNIX/options:${HOME}/.ROCKNIX/options\""; else echo ""; fi)
+# ${HOME}/.archr/options is a global options file containing developer and build settings.
+docker-%: GLOBAL_SETTINGS := $(shell if [ -f "${HOME}/.archr/options" ]; then echo "-v \"${HOME}/.archr/options:${HOME}/.archr/options\""; else echo ""; fi)
# LOCAL_SSH_KEYS_FILE is a variable that contains the location of the authorized keys file for development build use. It will be mounted into the container if it exists.
docker-%: LOCAL_SSH_KEYS_FILE := $(shell if [ -n "${LOCAL_SSH_KEYS_FILE}" ]; then echo "-v \"${LOCAL_SSH_KEYS_FILE}:${LOCAL_SSH_KEYS_FILE}\""; else echo ""; fi)
@@ -152,4 +108,4 @@ docker-image-pull:
# Wire up docker to call equivalent make files using % to match and $* to pass the value matched by %
docker-%:
- BUILD_DIR=$(DOCKER_WORK_DIR) $(DOCKER_CMD) run $(PODMAN_ARGS) $(INTERACTIVE) --init --env-file .env --rm --user $(UID):$(GID) $(GLOBAL_SETTINGS) $(LOCAL_SSH_KEYS_FILE) $(EMULATIONSTATION_SRC) -v $(PWD):$(DOCKER_WORK_DIR) -w $(DOCKER_WORK_DIR) $(DOCKER_EXTRA_OPTS) $(DOCKER_IMAGE) $(COMMAND)
+ BUILD_DIR="$(DOCKER_WORK_DIR)" $(DOCKER_CMD) run $(PODMAN_ARGS) $(INTERACTIVE) --init --env-file .env --rm --user $(UID):$(GID) $(GLOBAL_SETTINGS) $(LOCAL_SSH_KEYS_FILE) $(EMULATIONSTATION_SRC) -v "$(PWD)":"$(DOCKER_WORK_DIR)" -v /tmp:/tmp -w "$(DOCKER_WORK_DIR)" $(DOCKER_EXTRA_OPTS) $(DOCKER_IMAGE) $(COMMAND)
diff --git a/README.md b/README.md
index a627dc3fa6..8f47ce622f 100644
--- a/README.md
+++ b/README.md
@@ -1,63 +1,179 @@
-
[](https://github.com/ROCKNIX/distribution/releases/latest) [](https://github.com/ROCKNIX/distribution/commits) [](https://github.com/ROCKNIX/distribution/pulls) [](https://discord.gg/seTxckZjJy)
+
+
+
+
+
+ Arch Linux-based gaming distribution for handheld devices.
+
+
+
+ 
+ 
+ 
+
---
-ROCKNIX is an immutable Linux distribution for handheld gaming devices developed by a small community of enthusiasts. Our goal is to produce an operating system that has the features and capabilities that we need, and to have fun as we develop it.
+Arch R is a custom Linux distribution for the **R36S** handheld gaming console and all its variants, built on top of [ROCKNIX](https://github.com/ROCKNIX/distribution) with an Arch Linux-based build environment. It supports **16 board profiles** and **20 display panels** across original and clone hardware.
## Features
-* ROCKNIX has a very active community of developers and users.
-* Integrated cross-device local and remote network play.
-* In-game touch support on supported devices.
-* Fine grain control for battery life or performance.
-* Includes support for playing Music and Video.
-* Bluetooth audio and controller support.
-* Support for HDMI audio and video out, and USB audio.
-* Device to device and device to cloud sync with Syncthing and rclone.
-* VPN support with Wireguard, Tailscale, and ZeroTier.
-* Includes built-in support for scraping and retroachievements.
+- Arch Linux-based build system with Docker support.
+- Kernel 6.12 LTS with board auto-detection via SARADC.
+- Mesa Panfrost open-source GPU driver (GLES 3.1, no proprietary blobs).
+- EmulationStation frontend with RetroArch and 18+ cores pre-installed.
+- Full audio support with speaker/headphone auto-switch.
+- Battery monitoring with capacity reporting and LED warning.
+- 20 pre-generated MIPI panel overlays (7 original + 13 clone variants).
+- Separate images for original and clone boards, both with hardware auto-detection.
+- Integrated cross-device local and remote network play.
+- Fine-grained control for battery life and performance.
+- Bluetooth audio and controller support.
+- HDMI audio/video output, USB audio.
+- Device sync with Syncthing and rclone.
+- VPN support with WireGuard, Tailscale, and ZeroTier.
+- Built-in scraping and RetroAchievements.
-## Screenshots
+## Supported Hardware
-
+### Boards
+
+| Board | Image |
+|-------|-------|
+| R36S (original), R33S | Original |
+| Odroid Go Advance / v1.1 / Super | Original |
+| Anbernic RG351V / RG351M | Original |
+| GameForce Chi, MagicX XU10 | Original |
+| K36 / R36S clones / EE Clone | Clone |
+| Powkiddy RGB10 / RGB10X / RGB20S | Clone |
+| MagicX XU-Mini-M, BatLexp G350 | Clone |
+
+### Display Panels
+
+Arch R ships 20 pre-generated MIPI panel overlays covering all known R36S display variants. Panel selection is done by copying the correct `.dtbo` file to `overlays/mipi-panel.dtbo` on the boot partition.
+
+## Quick Start
+
+Download the latest images from [Releases](https://github.com/archr-linux/Arch-R/releases):
+
+- **Original image** -- for genuine R36S and compatible boards.
+- **Clone image** -- for K36 clones and compatible boards.
+
+Flash to a MicroSD card:
+
+```bash
+xz -d ArchR-R36S-*.img.xz
+sudo dd if=ArchR-R36S-*.img of=/dev/sdX bs=4M status=progress
+sync
+```
+
+Insert the SD card and power on. The correct board DTB is selected automatically.
+
+## Building from Source
+
+### Requirements
+
+- Docker (recommended) or native Linux build environment
+- ~40 GB free disk space
+- ~8 GB RAM recommended
+
+### Build
+
+```bash
+git clone https://github.com/archr-linux/Arch-R.git
+cd Arch-R
+
+# Build Docker image (first time only)
+make docker-image-build
+
+# Build for R36S (all variants)
+make docker-RK3326
+```
+
+Output images are generated in `target/`.
+
+### Build Commands
+
+| Command | Description |
+|---------|-------------|
+| `make docker-RK3326` | Full build inside Docker |
+| `make RK3326` | Native build (requires all dependencies) |
+| `make docker-image-build` | Build the Docker build environment |
+| `make clean` | Remove build artifacts |
+
+## Architecture
+
+Arch R separates **board configuration** from **panel configuration**:
+
+- **Board DTB** = hardware profile (GPIOs, PMIC, joypad, audio codec). Selected automatically by U-Boot via SARADC.
+- **Panel overlay** = display init sequence and timings. Applied on top of the board DTB at boot time.
+
+This means the same image works on all boards of a variant. Only the panel overlay needs to match the specific display.
+
+### Boot Flow
+
+```
+Power On
+ U-Boot (BSP or mainline)
+ boot.scr: read SARADC hwrev, select board DTB
+ sysboot: load kernel + DTB + overlay from extlinux.conf
+ Kernel 6.12 + initramfs
+ mount root (ext4) + storage
+ switch_root to systemd
+ systemd
+ archr-autostart (quirks, governors, audio)
+ EmulationStation
+```
+
+### Partition Layout
+
+| Partition | Filesystem | Label | Purpose |
+|-----------|-----------|-------|---------|
+| 1 | FAT32 | ARCHR | Boot (kernel, DTBs, overlays, boot.scr) |
+| 2 | ext4 | ARCHR_ROOT | Root filesystem |
+| 3 | ext4 | STORAGE | User data, ROMs, configs |
## Community
-The ROCKNIX community utilizes Discord for discussion, if you would like to join us please use this link: [https://discord.gg/seTxckZjJy](https://discord.gg/seTxckZjJy)
+Contributions are welcome. Please open issues or pull requests on [GitHub](https://github.com/archr-linux/Arch-R).
## Licenses
-**ROCKNIX** is a fork of [JELOS](https://github.com/JustEnoughLinuxOS/distribution/), all licenses apply and credit to the JELOS team.
+**Arch R** is a fork of [ROCKNIX](https://github.com/ROCKNIX/distribution), which is a fork of [JELOS](https://github.com/JustEnoughLinuxOS/distribution/). All upstream licenses apply.
You are free to:
-- Share: copy and redistribute the material in any medium or format
-- Adapt: remix, transform, and build upon the material
+- **Share**: copy and redistribute the material in any medium or format.
+- **Adapt**: remix, transform, and build upon the material.
Under the following terms:
-- Attribution: You must give appropriate credit, provide a link to the license, and indicate if changes were made. You may do so in any reasonable manner, but not in any way that suggests the licensor endorses you or your use.
-- NonCommercial: You may not use the material for commercial purposes.
-- ShareAlike: If you remix, transform, or build upon the material, you must distribute your contributions under the same license as the original.
+- **Attribution**: You must give appropriate credit, provide a link to the license, and indicate if changes were made. You may do so in any reasonable manner, but not in any way that suggests the licensor endorses you or your use.
+- **NonCommercial**: You may not use the material for commercial purposes.
+- **ShareAlike**: If you remix, transform, or build upon the material, you must distribute your contributions under the same license as the original.
-### ROCKNIX Software
+### Arch R Software
-Copyright (C) 2024-present [ROCKNIX](https://github.com/ROCKNIX)
+Copyright (C) 2026-present [Arch R](https://github.com/archr-linux/Arch-R)
-Original software and scripts developed by the ROCKNIX are licensed under the terms of the [GNU GPL Version 2](https://choosealicense.com/licenses/gpl-2.0/). The full license can be found in this project's licenses folder.
+Original software and scripts developed by Arch R are licensed under the terms of the [GNU GPL Version 2](https://choosealicense.com/licenses/gpl-2.0/). The full license can be found in this project's licenses folder.
### Bundled Works
-All other software is provided under each component's respective license. These licenses can be found in the software sources or in this project's licenses folder. Modifications to bundled software and scripts by the JELOS team are licensed under the terms of the software being modified.
+
+All other software is provided under each component's respective license. These licenses can be found in the software sources or in this project's licenses folder. Modifications to bundled software and scripts by upstream projects are licensed under the terms of the software being modified.
## Credits
-Like any Linux distribution, this project is not the work of one person. It is the work of many persons all over the world who have developed the open source bits without which this project could not exist. Special thanks to CoreELEC, LibreELEC, JELOS, and to developers and contributors across the open source community.
+Like any Linux distribution, this project is not the work of one person. It is the work of many people around the world who have developed the open-source components without which this project could not exist.
+
+Special thanks to:
+
+- **[ROCKNIX](https://github.com/ROCKNIX/distribution)** -- the upstream distribution that Arch R is forked from. ROCKNIX provided the complete build system, device support, EmulationStation integration, and the foundation for handheld gaming on Linux.
+- **[JELOS](https://github.com/JustEnoughLinuxOS/distribution/)** -- the project that ROCKNIX was originally forked from.
+- **[CoreELEC](https://coreelec.org/)** and **[LibreELEC](https://libreelec.tv/)** -- the embedded Linux distributions whose build system forms the backbone of this project.
+- **[Hardkernel](https://www.hardkernel.com/)** -- for the Odroid Go Advance BSP U-Boot and kernel device trees.
+- **[Rockchip](https://www.rock-chips.com/)** -- for the RK3326 SoC and rkbin firmware.
+- **[Mesa](https://mesa3d.org/)** -- for the Panfrost open-source GPU driver.
+- **[RetroArch](https://www.retroarch.com/)** and **[Libretro](https://www.libretro.com/)** -- for the emulation framework and cores.
+- **[EmulationStation](https://emulationstation.org/)** -- for the frontend.
+- All developers and contributors across the open-source community who made this possible.
diff --git a/config/archr-dts/R36S-DTB/DTS/Panel0.dts b/config/archr-dts/R36S-DTB/DTS/Panel0.dts
new file mode 100644
index 0000000000..58cae809aa
--- /dev/null
+++ b/config/archr-dts/R36S-DTB/DTS/Panel0.dts
@@ -0,0 +1,4053 @@
+/dts-v1/;
+
+/ {
+ compatible = "rockchip,rk3326-odroidgo3-linux\0rockchip,rk3326";
+ interrupt-parent = <0x01>;
+ #address-cells = <0x02>;
+ #size-cells = <0x02>;
+ model = "Hardkernel ODROID-GO3";
+
+ ddr_timing {
+ compatible = "rockchip,ddr-timing";
+ ddr2_speed_bin = <0x00>;
+ ddr3_speed_bin = <0x15>;
+ ddr4_speed_bin = <0x0c>;
+ pd_idle = <0x0d>;
+ sr_idle = <0x5d>;
+ sr_mc_gate_idle = <0x00>;
+ srpd_lite_idle = <0x00>;
+ standby_idle = <0x00>;
+ auto_pd_dis_freq = <0x42a>;
+ auto_sr_dis_freq = <0x320>;
+ ddr2_dll_dis_freq = <0x12c>;
+ ddr3_dll_dis_freq = <0x12c>;
+ ddr4_dll_dis_freq = <0x271>;
+ phy_dll_dis_freq = <0x190>;
+ ddr2_odt_dis_freq = <0x64>;
+ phy_ddr2_odt_dis_freq = <0x64>;
+ ddr2_drv = <0x01>;
+ ddr2_odt = <0x96>;
+ phy_ddr2_ca_drv = <0x15>;
+ phy_ddr2_ck_drv = <0x12>;
+ phy_ddr2_dq_drv = <0x15>;
+ phy_ddr2_odt = <0x02>;
+ ddr3_odt_dis_freq = <0x190>;
+ phy_ddr3_odt_dis_freq = <0x190>;
+ ddr3_drv = <0x28>;
+ ddr3_odt = <0x78>;
+ phy_ddr3_ca_drv = <0x15>;
+ phy_ddr3_ck_drv = <0x12>;
+ phy_ddr3_dq_drv = <0x15>;
+ phy_ddr3_odt = <0x02>;
+ phy_lpddr2_odt_dis_freq = <0x29a>;
+ lpddr2_drv = <0x28>;
+ phy_lpddr2_ca_drv = <0x16>;
+ phy_lpddr2_ck_drv = <0x13>;
+ phy_lpddr2_dq_drv = <0x16>;
+ phy_lpddr2_odt = <0x00>;
+ lpddr3_odt_dis_freq = <0x190>;
+ phy_lpddr3_odt_dis_freq = <0x190>;
+ lpddr3_drv = <0x28>;
+ lpddr3_odt = <0xf0>;
+ phy_lpddr3_ca_drv = <0x16>;
+ phy_lpddr3_ck_drv = <0x13>;
+ phy_lpddr3_dq_drv = <0x16>;
+ phy_lpddr3_odt = <0x02>;
+ lpddr4_odt_dis_freq = <0x320>;
+ phy_lpddr4_odt_dis_freq = <0x320>;
+ lpddr4_drv = <0x3c>;
+ lpddr4_dq_odt = <0x28>;
+ lpddr4_ca_odt = <0x28>;
+ phy_lpddr4_ca_drv = <0x14>;
+ phy_lpddr4_ck_cs_drv = <0x06>;
+ phy_lpddr4_dq_drv = <0x06>;
+ phy_lpddr4_odt = <0x10>;
+ ddr4_odt_dis_freq = <0x29a>;
+ phy_ddr4_odt_dis_freq = <0x29a>;
+ ddr4_drv = <0x22>;
+ ddr4_odt = <0xf0>;
+ phy_ddr4_ca_drv = <0x16>;
+ phy_ddr4_ck_drv = <0x13>;
+ phy_ddr4_dq_drv = <0x16>;
+ phy_ddr4_odt = <0x02>;
+ ddr3a1_ddr4a9_de-skew = <0x06>;
+ ddr3a0_ddr4a10_de-skew = <0x07>;
+ ddr3a3_ddr4a6_de-skew = <0x07>;
+ ddr3a2_ddr4a4_de-skew = <0x07>;
+ ddr3a5_ddr4a8_de-skew = <0x07>;
+ ddr3a4_ddr4a5_de-skew = <0x07>;
+ ddr3a7_ddr4a11_de-skew = <0x07>;
+ ddr3a6_ddr4a7_de-skew = <0x06>;
+ ddr3a9_ddr4a0_de-skew = <0x07>;
+ ddr3a8_ddr4a13_de-skew = <0x07>;
+ ddr3a11_ddr4a3_de-skew = <0x07>;
+ ddr3a10_ddr4cs0_de-skew = <0x07>;
+ ddr3a13_ddr4a2_de-skew = <0x07>;
+ ddr3a12_ddr4ba1_de-skew = <0x07>;
+ ddr3a15_ddr4odt0_de-skew = <0x07>;
+ ddr3a14_ddr4a1_de-skew = <0x07>;
+ ddr3ba1_ddr4a15_de-skew = <0x07>;
+ ddr3ba0_ddr4bg0_de-skew = <0x07>;
+ ddr3ras_ddr4cke_de-skew = <0x07>;
+ ddr3ba2_ddr4ba0_de-skew = <0x07>;
+ ddr3we_ddr4bg1_de-skew = <0x07>;
+ ddr3cas_ddr4a12_de-skew = <0x07>;
+ ddr3ckn_ddr4ckn_de-skew = <0x07>;
+ ddr3ckp_ddr4ckp_de-skew = <0x07>;
+ ddr3cke_ddr4a16_de-skew = <0x07>;
+ ddr3odt0_ddr4a14_de-skew = <0x07>;
+ ddr3cs0_ddr4act_de-skew = <0x06>;
+ ddr3reset_ddr4reset_de-skew = <0x07>;
+ ddr3cs1_ddr4cs1_de-skew = <0x06>;
+ ddr3odt1_ddr4odt1_de-skew = <0x07>;
+ cs0_dm0_rx_de-skew = <0x07>;
+ cs0_dm0_tx_de-skew = <0x07>;
+ cs0_dq0_rx_de-skew = <0x08>;
+ cs0_dq0_tx_de-skew = <0x08>;
+ cs0_dq1_rx_de-skew = <0x09>;
+ cs0_dq1_tx_de-skew = <0x08>;
+ cs0_dq2_rx_de-skew = <0x08>;
+ cs0_dq2_tx_de-skew = <0x08>;
+ cs0_dq3_rx_de-skew = <0x08>;
+ cs0_dq3_tx_de-skew = <0x08>;
+ cs0_dq4_rx_de-skew = <0x09>;
+ cs0_dq4_tx_de-skew = <0x08>;
+ cs0_dq5_rx_de-skew = <0x09>;
+ cs0_dq5_tx_de-skew = <0x08>;
+ cs0_dq6_rx_de-skew = <0x09>;
+ cs0_dq6_tx_de-skew = <0x08>;
+ cs0_dq7_rx_de-skew = <0x08>;
+ cs0_dq7_tx_de-skew = <0x08>;
+ cs0_dqs0_rx_de-skew = <0x06>;
+ cs0_dqs0p_tx_de-skew = <0x09>;
+ cs0_dqs0n_tx_de-skew = <0x09>;
+ cs0_dm1_rx_de-skew = <0x07>;
+ cs0_dm1_tx_de-skew = <0x06>;
+ cs0_dq8_rx_de-skew = <0x08>;
+ cs0_dq8_tx_de-skew = <0x07>;
+ cs0_dq9_rx_de-skew = <0x09>;
+ cs0_dq9_tx_de-skew = <0x07>;
+ cs0_dq10_rx_de-skew = <0x08>;
+ cs0_dq10_tx_de-skew = <0x08>;
+ cs0_dq11_rx_de-skew = <0x08>;
+ cs0_dq11_tx_de-skew = <0x07>;
+ cs0_dq12_rx_de-skew = <0x08>;
+ cs0_dq12_tx_de-skew = <0x08>;
+ cs0_dq13_rx_de-skew = <0x09>;
+ cs0_dq13_tx_de-skew = <0x07>;
+ cs0_dq14_rx_de-skew = <0x09>;
+ cs0_dq14_tx_de-skew = <0x08>;
+ cs0_dq15_rx_de-skew = <0x09>;
+ cs0_dq15_tx_de-skew = <0x07>;
+ cs0_dqs1_rx_de-skew = <0x07>;
+ cs0_dqs1p_tx_de-skew = <0x09>;
+ cs0_dqs1n_tx_de-skew = <0x09>;
+ cs0_dm2_rx_de-skew = <0x07>;
+ cs0_dm2_tx_de-skew = <0x07>;
+ cs0_dq16_rx_de-skew = <0x09>;
+ cs0_dq16_tx_de-skew = <0x09>;
+ cs0_dq17_rx_de-skew = <0x07>;
+ cs0_dq17_tx_de-skew = <0x09>;
+ cs0_dq18_rx_de-skew = <0x07>;
+ cs0_dq18_tx_de-skew = <0x08>;
+ cs0_dq19_rx_de-skew = <0x07>;
+ cs0_dq19_tx_de-skew = <0x09>;
+ cs0_dq20_rx_de-skew = <0x09>;
+ cs0_dq20_tx_de-skew = <0x09>;
+ cs0_dq21_rx_de-skew = <0x09>;
+ cs0_dq21_tx_de-skew = <0x09>;
+ cs0_dq22_rx_de-skew = <0x08>;
+ cs0_dq22_tx_de-skew = <0x09>;
+ cs0_dq23_rx_de-skew = <0x08>;
+ cs0_dq23_tx_de-skew = <0x09>;
+ cs0_dqs2_rx_de-skew = <0x06>;
+ cs0_dqs2p_tx_de-skew = <0x09>;
+ cs0_dqs2n_tx_de-skew = <0x09>;
+ cs0_dm3_rx_de-skew = <0x07>;
+ cs0_dm3_tx_de-skew = <0x07>;
+ cs0_dq24_rx_de-skew = <0x08>;
+ cs0_dq24_tx_de-skew = <0x08>;
+ cs0_dq25_rx_de-skew = <0x09>;
+ cs0_dq25_tx_de-skew = <0x09>;
+ cs0_dq26_rx_de-skew = <0x09>;
+ cs0_dq26_tx_de-skew = <0x08>;
+ cs0_dq27_rx_de-skew = <0x09>;
+ cs0_dq27_tx_de-skew = <0x08>;
+ cs0_dq28_rx_de-skew = <0x09>;
+ cs0_dq28_tx_de-skew = <0x09>;
+ cs0_dq29_rx_de-skew = <0x09>;
+ cs0_dq29_tx_de-skew = <0x09>;
+ cs0_dq30_rx_de-skew = <0x08>;
+ cs0_dq30_tx_de-skew = <0x08>;
+ cs0_dq31_rx_de-skew = <0x08>;
+ cs0_dq31_tx_de-skew = <0x08>;
+ cs0_dqs3_rx_de-skew = <0x07>;
+ cs0_dqs3p_tx_de-skew = <0x09>;
+ cs0_dqs3n_tx_de-skew = <0x09>;
+ cs1_dm0_rx_de-skew = <0x07>;
+ cs1_dm0_tx_de-skew = <0x07>;
+ cs1_dq0_rx_de-skew = <0x08>;
+ cs1_dq0_tx_de-skew = <0x08>;
+ cs1_dq1_rx_de-skew = <0x09>;
+ cs1_dq1_tx_de-skew = <0x08>;
+ cs1_dq2_rx_de-skew = <0x08>;
+ cs1_dq2_tx_de-skew = <0x08>;
+ cs1_dq3_rx_de-skew = <0x08>;
+ cs1_dq3_tx_de-skew = <0x08>;
+ cs1_dq4_rx_de-skew = <0x08>;
+ cs1_dq4_tx_de-skew = <0x08>;
+ cs1_dq5_rx_de-skew = <0x09>;
+ cs1_dq5_tx_de-skew = <0x08>;
+ cs1_dq6_rx_de-skew = <0x09>;
+ cs1_dq6_tx_de-skew = <0x08>;
+ cs1_dq7_rx_de-skew = <0x08>;
+ cs1_dq7_tx_de-skew = <0x08>;
+ cs1_dqs0_rx_de-skew = <0x06>;
+ cs1_dqs0p_tx_de-skew = <0x09>;
+ cs1_dqs0n_tx_de-skew = <0x09>;
+ cs1_dm1_rx_de-skew = <0x07>;
+ cs1_dm1_tx_de-skew = <0x07>;
+ cs1_dq8_rx_de-skew = <0x08>;
+ cs1_dq8_tx_de-skew = <0x08>;
+ cs1_dq9_rx_de-skew = <0x08>;
+ cs1_dq9_tx_de-skew = <0x07>;
+ cs1_dq10_rx_de-skew = <0x07>;
+ cs1_dq10_tx_de-skew = <0x08>;
+ cs1_dq11_rx_de-skew = <0x08>;
+ cs1_dq11_tx_de-skew = <0x08>;
+ cs1_dq12_rx_de-skew = <0x08>;
+ cs1_dq12_tx_de-skew = <0x07>;
+ cs1_dq13_rx_de-skew = <0x08>;
+ cs1_dq13_tx_de-skew = <0x08>;
+ cs1_dq14_rx_de-skew = <0x08>;
+ cs1_dq14_tx_de-skew = <0x08>;
+ cs1_dq15_rx_de-skew = <0x08>;
+ cs1_dq15_tx_de-skew = <0x07>;
+ cs1_dqs1_rx_de-skew = <0x07>;
+ cs1_dqs1p_tx_de-skew = <0x09>;
+ cs1_dqs1n_tx_de-skew = <0x09>;
+ cs1_dm2_rx_de-skew = <0x07>;
+ cs1_dm2_tx_de-skew = <0x08>;
+ cs1_dq16_rx_de-skew = <0x08>;
+ cs1_dq16_tx_de-skew = <0x09>;
+ cs1_dq17_rx_de-skew = <0x08>;
+ cs1_dq17_tx_de-skew = <0x09>;
+ cs1_dq18_rx_de-skew = <0x07>;
+ cs1_dq18_tx_de-skew = <0x08>;
+ cs1_dq19_rx_de-skew = <0x08>;
+ cs1_dq19_tx_de-skew = <0x09>;
+ cs1_dq20_rx_de-skew = <0x09>;
+ cs1_dq20_tx_de-skew = <0x09>;
+ cs1_dq21_rx_de-skew = <0x09>;
+ cs1_dq21_tx_de-skew = <0x09>;
+ cs1_dq22_rx_de-skew = <0x08>;
+ cs1_dq22_tx_de-skew = <0x09>;
+ cs1_dq23_rx_de-skew = <0x08>;
+ cs1_dq23_tx_de-skew = <0x09>;
+ cs1_dqs2_rx_de-skew = <0x06>;
+ cs1_dqs2p_tx_de-skew = <0x09>;
+ cs1_dqs2n_tx_de-skew = <0x09>;
+ cs1_dm3_rx_de-skew = <0x07>;
+ cs1_dm3_tx_de-skew = <0x07>;
+ cs1_dq24_rx_de-skew = <0x08>;
+ cs1_dq24_tx_de-skew = <0x09>;
+ cs1_dq25_rx_de-skew = <0x09>;
+ cs1_dq25_tx_de-skew = <0x09>;
+ cs1_dq26_rx_de-skew = <0x09>;
+ cs1_dq26_tx_de-skew = <0x08>;
+ cs1_dq27_rx_de-skew = <0x08>;
+ cs1_dq27_tx_de-skew = <0x08>;
+ cs1_dq28_rx_de-skew = <0x09>;
+ cs1_dq28_tx_de-skew = <0x09>;
+ cs1_dq29_rx_de-skew = <0x09>;
+ cs1_dq29_tx_de-skew = <0x09>;
+ cs1_dq30_rx_de-skew = <0x09>;
+ cs1_dq30_tx_de-skew = <0x08>;
+ cs1_dq31_rx_de-skew = <0x08>;
+ cs1_dq31_tx_de-skew = <0x08>;
+ cs1_dqs3_rx_de-skew = <0x07>;
+ cs1_dqs3p_tx_de-skew = <0x09>;
+ cs1_dqs3n_tx_de-skew = <0x09>;
+ phandle = <0xaf>;
+ };
+
+ aliases {
+ ethernet0 = "/ethernet@ff360000";
+ i2c0 = "/i2c@ff180000";
+ i2c1 = "/i2c@ff190000";
+ i2c2 = "/i2c@ff1a0000";
+ i2c3 = "/i2c@ff1b0000";
+ serial0 = "/serial@ff030000";
+ serial1 = "/serial@ff158000";
+ serial2 = "/serial@ff160000";
+ serial3 = "/serial@ff168000";
+ serial4 = "/serial@ff170000";
+ serial5 = "/serial@ff178000";
+ spi0 = "/spi@ff1d0000";
+ spi1 = "/spi@ff1d8000";
+ };
+
+ cpus {
+ #address-cells = <0x02>;
+ #size-cells = <0x00>;
+
+ cpu@0 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a35\0arm,armv8";
+ reg = <0x00 0x00>;
+ enable-method = "psci";
+ clocks = <0x02 0x07>;
+ #cooling-cells = <0x02>;
+ dynamic-power-coefficient = <0x5a>;
+ operating-points-v2 = <0x03>;
+ cpu-idle-states = <0x04 0x05>;
+ cpu-supply = <0x06>;
+ phandle = <0x09>;
+ };
+
+ cpu@1 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a35\0arm,armv8";
+ reg = <0x00 0x01>;
+ enable-method = "psci";
+ operating-points-v2 = <0x03>;
+ cpu-idle-states = <0x04 0x05>;
+ phandle = <0x0a>;
+ };
+
+ cpu@2 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a35\0arm,armv8";
+ reg = <0x00 0x02>;
+ enable-method = "psci";
+ operating-points-v2 = <0x03>;
+ cpu-idle-states = <0x04 0x05>;
+ phandle = <0x0b>;
+ };
+
+ cpu@3 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a35\0arm,armv8";
+ reg = <0x00 0x03>;
+ enable-method = "psci";
+ operating-points-v2 = <0x03>;
+ cpu-idle-states = <0x04 0x05>;
+ phandle = <0x0c>;
+ };
+
+ idle-states {
+ entry-method = "psci";
+
+ cpu-sleep {
+ compatible = "arm,idle-state";
+ local-timer-stop;
+ arm,psci-suspend-param = <0x10000>;
+ entry-latency-us = <0x78>;
+ exit-latency-us = <0xfa>;
+ min-residency-us = <0x384>;
+ phandle = <0x04>;
+ };
+
+ cluster-sleep {
+ compatible = "arm,idle-state";
+ local-timer-stop;
+ arm,psci-suspend-param = <0x1010000>;
+ entry-latency-us = <0x190>;
+ exit-latency-us = <0x1f4>;
+ min-residency-us = <0x7d0>;
+ phandle = <0x05>;
+ };
+ };
+ };
+
+ cpu0-opp-table {
+ compatible = "operating-points-v2";
+ opp-shared;
+ rockchip,temp-hysteresis = <0x1388>;
+ rockchip,low-temp = <0x00>;
+ rockchip,low-temp-min-volt = <0xf4240>;
+ rockchip,low-temp-adjust-volt = <0x00 0x5e8 0xc350>;
+ clocks = <0x02 0x01>;
+ rockchip,avs-scale = <0x04>;
+ rockchip,max-volt = <0x149970>;
+ rockchip,evb-irdrop = <0x61a8>;
+ nvmem-cells = <0x07 0x08>;
+ nvmem-cell-names = "cpu_leakage\0performance";
+ rockchip,bin-scaling-sel = <0x00 0x0d 0x01 0x0d>;
+ rockchip,pvtm-voltage-sel = <0x00 0xc350 0x00 0xc351 0xd2f0 0x01 0xd2f1 0xea60 0x02 0xea61 0x1869f 0x03>;
+ rockchip,pvtm-freq = <0x639c0>;
+ rockchip,pvtm-volt = <0xf4240>;
+ rockchip,pvtm-ch = <0x00 0x00>;
+ rockchip,pvtm-sample-time = <0x3e8>;
+ rockchip,pvtm-number = <0x0a>;
+ rockchip,pvtm-error = <0x3e8>;
+ rockchip,pvtm-ref-temp = <0x28>;
+ rockchip,pvtm-temp-prop = <0xffffffc8 0xffffffc8>;
+ rockchip,thermal-zone = "soc-thermal";
+ rockchip,avs = <0x01>;
+ phandle = <0x03>;
+
+ opp-1008000000 {
+ opp-hz = <0x00 0x3c14dc00>;
+ opp-microvolt = <0x11edd8 0x11edd8 0x149970>;
+ opp-microvolt-L0 = <0x11edd8 0x11edd8 0x149970>;
+ opp-microvolt-L1 = <0x112a88 0x112a88 0x149970>;
+ opp-microvolt-L2 = <0x112a88 0x112a88 0x149970>;
+ opp-microvolt-L3 = <0x100590 0x100590 0x149970>;
+ clock-latency-ns = <0x9c40>;
+ };
+
+ opp-1200000000 {
+ opp-hz = <0x00 0x47868c00>;
+ opp-microvolt = <0x13d620 0x13d620 0x149970>;
+ opp-microvolt-L0 = <0x13d620 0x13d620 0x149970>;
+ opp-microvolt-L1 = <0x137478 0x137478 0x149970>;
+ opp-microvolt-L2 = <0x1312d0 0x1312d0 0x149970>;
+ opp-microvolt-L3 = <0x124f80 0x124f80 0x149970>;
+ clock-latency-ns = <0x9c40>;
+ };
+
+ opp-1248000000 {
+ opp-hz = <0x00 0x4a62f800>;
+ opp-microvolt = <0x149970 0x149970 0x149970>;
+ opp-microvolt-L0 = <0x149970 0x149970 0x149970>;
+ opp-microvolt-L1 = <0x13d620 0x13d620 0x149970>;
+ opp-microvolt-L2 = <0x137478 0x137478 0x149970>;
+ opp-microvolt-L3 = <0x12b128 0x12b128 0x149970>;
+ clock-latency-ns = <0x9c40>;
+ };
+
+ opp-1296000000 {
+ opp-hz = <0x00 0x4d3f6400>;
+ opp-microvolt = <0x149970 0x149970 0x149970>;
+ opp-microvolt-L0 = <0x149970 0x149970 0x149970>;
+ opp-microvolt-L1 = <0x149970 0x149970 0x149970>;
+ opp-microvolt-L2 = <0x13d620 0x13d620 0x149970>;
+ opp-microvolt-L3 = <0x1312d0 0x1312d0 0x149970>;
+ clock-latency-ns = <0x9c40>;
+ };
+ };
+
+ arm-pmu {
+ compatible = "arm,cortex-a53-pmu";
+ interrupts = <0x00 0x64 0x04 0x00 0x65 0x04 0x00 0x66 0x04 0x00 0x67 0x04>;
+ interrupt-affinity = <0x09 0x0a 0x0b 0x0c>;
+ };
+
+ bus-soc {
+ compatible = "rockchip,px30-bus";
+ rockchip,busfreq-policy = "autocs";
+ phandle = <0xc4>;
+
+ soc-bus0 {
+ bus-id = <0x00>;
+ timer-us = <0x14>;
+ enable-msk = <0x40f7>;
+ status = "disabled";
+ };
+
+ soc-bus1 {
+ bus-id = <0x01>;
+ timer-us = <0xc8>;
+ enable-msk = <0x40bf>;
+ status = "disabled";
+ };
+
+ soc-bus2 {
+ bus-id = <0x02>;
+ timer-us = <0xc8>;
+ enable-msk = <0x4007>;
+ status = "disabled";
+ };
+ };
+
+ bus-apll {
+ compatible = "rockchip,px30-bus";
+ rockchip,busfreq-policy = "clkfreq";
+ clocks = <0x02 0x01>;
+ clock-names = "bus";
+ operating-points-v2 = <0x0d>;
+ status = "okay";
+ bus-supply = <0x0e>;
+ phandle = <0xc5>;
+ };
+
+ bus-apll-opp-table {
+ compatible = "operating-points-v2";
+ opp-shared;
+ phandle = <0x0d>;
+
+ opp-1512000000 {
+ opp-hz = <0x00 0x5a1f4a00>;
+ opp-microvolt = <0xf4240>;
+ };
+
+ opp-1008000000 {
+ opp-hz = <0x00 0x3c14dc00>;
+ opp-microvolt = <0xe7ef0>;
+ };
+ };
+
+ cpuinfo {
+ compatible = "rockchip,cpuinfo";
+ nvmem-cells = <0x0f>;
+ nvmem-cell-names = "id";
+ };
+
+ display-subsystem {
+ compatible = "rockchip,display-subsystem";
+ ports = <0x10>;
+ status = "okay";
+ logo-memory-region = <0x11>;
+ phandle = <0xc6>;
+
+ route {
+
+ route-lvds {
+ status = "disabled";
+ logo,uboot = "logo.bmp";
+ logo,kernel = "logo_kernel.bmp";
+ logo,mode = "center";
+ charge_logo,mode = "center";
+ connect = <0x12>;
+ phandle = <0xc7>;
+ };
+
+ route-dsi {
+ status = "okay";
+ logo,uboot = "logo.bmp";
+ logo,kernel = "logo_kernel.bmp";
+ logo,mode = "center";
+ charge_logo,mode = "center";
+ connect = <0x13>;
+ phandle = <0xc8>;
+ };
+
+ route-rgb {
+ status = "disabled";
+ logo,uboot = "logo.bmp";
+ logo,kernel = "logo_kernel.bmp";
+ logo,mode = "center";
+ charge_logo,mode = "center";
+ connect = <0x14>;
+ phandle = <0xc9>;
+ };
+ };
+ };
+
+ firmware {
+
+ optee {
+ compatible = "linaro,optee-tz";
+ method = "smc";
+ };
+ };
+
+ external-gmac-clock {
+ compatible = "fixed-clock";
+ clock-frequency = <0x2faf080>;
+ clock-output-names = "gmac_clkin";
+ #clock-cells = <0x00>;
+ phandle = <0xca>;
+ };
+
+ psci {
+ compatible = "arm,psci-1.0";
+ method = "smc";
+ };
+
+ rockchip-suspend {
+ compatible = "rockchip,pm-px30";
+ status = "okay";
+ rockchip,sleep-debug-en = <0x01>;
+ rockchip,sleep-mode-config = <0x20702>;
+ rockchip,wakeup-config = <0x85>;
+ phandle = <0xcb>;
+ };
+
+ timer {
+ compatible = "arm,armv8-timer";
+ interrupts = <0x01 0x0d 0xf04 0x01 0x0e 0xf04 0x01 0x0b 0xf04 0x01 0x0a 0xf04>;
+ };
+
+ xin24m {
+ compatible = "fixed-clock";
+ #clock-cells = <0x00>;
+ clock-frequency = <0x16e3600>;
+ clock-output-names = "xin24m";
+ phandle = <0xcc>;
+ };
+
+ xin32k {
+ compatible = "fixed-clock";
+ #clock-cells = <0x00>;
+ clock-frequency = <0x8000>;
+ clock-output-names = "xin32k";
+ phandle = <0xcd>;
+ };
+
+ power-management@ff000000 {
+ compatible = "rockchip,px30-pmu\0syscon\0simple-mfd";
+ reg = <0x00 0xff000000 0x00 0x1000>;
+ phandle = <0xce>;
+
+ power-controller {
+ compatible = "rockchip,px30-power-controller";
+ #power-domain-cells = <0x01>;
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+ phandle = <0x8a>;
+
+ pd_usb@5 {
+ reg = <0x05>;
+ clocks = <0x02 0x103 0x02 0x102 0x02 0x3c>;
+ pm_qos = <0x15 0x16>;
+ };
+
+ pd_sdcard@7 {
+ reg = <0x07>;
+ clocks = <0x02 0xf7 0x02 0x3b>;
+ pm_qos = <0x17>;
+ };
+
+ pd_gmac@9 {
+ reg = <0x09>;
+ clocks = <0x02 0xb2 0x02 0x143 0x02 0x40 0x02 0x3f>;
+ pm_qos = <0x18>;
+ };
+
+ pd_mmc_nand@10 {
+ reg = <0x0a>;
+ clocks = <0x02 0xfe 0x02 0x100 0x02 0xff 0x02 0x101 0x02 0x39 0x02 0x37 0x02 0x38 0x02 0x3a>;
+ pm_qos = <0x19 0x1a 0x1b 0x1c>;
+ };
+
+ pd_vpu@11 {
+ reg = <0x0b>;
+ clocks = <0x02 0xaf 0x02 0xf4 0x02 0x4b>;
+ pm_qos = <0x1d 0x1e>;
+ };
+
+ pd_vo@12 {
+ reg = <0x0c>;
+ clocks = <0x02 0xb7 0x02 0xb5 0x02 0xb6 0x02 0x96 0x02 0x97 0x02 0xfd 0x02 0xfb 0x02 0xfc 0x02 0x144 0x02 0x35 0x02 0x36>;
+ pm_qos = <0x1f 0x20 0x21 0x22>;
+ };
+
+ pd_vi@13 {
+ reg = <0x0d>;
+ clocks = <0x02 0xb3 0x02 0xb4 0x02 0xf9 0x02 0xfa 0x02 0x33>;
+ pm_qos = <0x23 0x24 0x25 0x26 0x27>;
+ };
+
+ pd_gpu@14 {
+ reg = <0x0e>;
+ clocks = <0x02 0x49>;
+ pm_qos = <0x28>;
+ };
+ };
+ };
+
+ syscon@ff010000 {
+ compatible = "rockchip,px30-pmugrf\0syscon\0simple-mfd";
+ reg = <0x00 0xff010000 0x00 0x1000>;
+ #address-cells = <0x01>;
+ #size-cells = <0x01>;
+ phandle = <0xac>;
+
+ io-domains {
+ compatible = "rockchip,px30-pmu-io-voltage-domain";
+ status = "okay";
+ pmuio1-supply = <0x29>;
+ pmuio2-supply = <0x29>;
+ phandle = <0xcf>;
+ };
+
+ reboot-mode {
+ compatible = "syscon-reboot-mode";
+ offset = <0x200>;
+ mode-bootloader = <0x5242c301>;
+ mode-charge = <0x5242c30b>;
+ mode-fastboot = <0x5242c309>;
+ mode-loader = <0x5242c301>;
+ mode-normal = <0x5242c300>;
+ mode-recovery = <0x5242c303>;
+ mode-ums = <0x5242c30c>;
+ };
+
+ pmu-pvtm {
+ compatible = "rockchip,px30-pmu-pvtm";
+ clocks = <0x2a 0x07>;
+ clock-names = "pmu";
+ status = "okay";
+ phandle = <0xd0>;
+ };
+ };
+
+ serial@ff030000 {
+ compatible = "rockchip,px30-uart\0snps,dw-apb-uart";
+ reg = <0x00 0xff030000 0x00 0x100>;
+ interrupts = <0x00 0x0f 0x04>;
+ clocks = <0x2a 0x06 0x2a 0x15>;
+ clock-names = "baudclk\0apb_pclk";
+ reg-shift = <0x02>;
+ reg-io-width = <0x04>;
+ dmas = <0x2b 0x00 0x2b 0x01>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x2c 0x2d 0x2e>;
+ status = "disabled";
+ phandle = <0xd1>;
+ };
+
+ i2s@ff060000 {
+ compatible = "rockchip,px30-i2s-tdm";
+ reg = <0x00 0xff060000 0x00 0x1000>;
+ interrupts = <0x00 0x0c 0x04>;
+ clocks = <0x02 0x10 0x02 0x12 0x02 0x106>;
+ clock-names = "mclk_tx\0mclk_rx\0hclk";
+ dmas = <0x2b 0x10 0x2b 0x11>;
+ dma-names = "tx\0rx";
+ resets = <0x02 0x84 0x02 0xbf>;
+ reset-names = "tx-m\0rx-m";
+ rockchip,cru = <0x02>;
+ rockchip,grf = <0x2f>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x30 0x31 0x32 0x33 0x34 0x35 0x36 0x37 0x38 0x39 0x3a 0x3b>;
+ status = "disabled";
+ phandle = <0xd2>;
+ };
+
+ i2s@ff070000 {
+ compatible = "rockchip,px30-i2s\0rockchip,rk3066-i2s";
+ reg = <0x00 0xff070000 0x00 0x1000>;
+ interrupts = <0x00 0x0d 0x04>;
+ clocks = <0x02 0x14 0x02 0x107>;
+ clock-names = "i2s_clk\0i2s_hclk";
+ dmas = <0x2b 0x12 0x2b 0x13>;
+ dma-names = "tx\0rx";
+ resets = <0x02 0x86 0x02 0x85>;
+ reset-names = "reset-m\0reset-h";
+ pinctrl-names = "default";
+ pinctrl-0 = <0x3c 0x3d 0x3e 0x3f>;
+ status = "okay";
+ #sound-dai-cells = <0x00>;
+ phandle = <0xc2>;
+ };
+
+ i2s@ff080000 {
+ compatible = "rockchip,px30-i2s\0rockchip,rk3066-i2s";
+ reg = <0x00 0xff080000 0x00 0x1000>;
+ interrupts = <0x00 0x0e 0x04>;
+ clocks = <0x02 0x16 0x02 0x108>;
+ clock-names = "i2s_clk\0i2s_hclk";
+ dmas = <0x2b 0x14 0x2b 0x15>;
+ dma-names = "tx\0rx";
+ resets = <0x02 0x88 0x02 0x87>;
+ reset-names = "reset-m\0reset-h";
+ pinctrl-names = "default";
+ pinctrl-0 = <0x40 0x41 0x42 0x43>;
+ status = "disabled";
+ phandle = <0xd3>;
+ };
+
+ pdm@ff0a0000 {
+ compatible = "rockchip,px30-pdm\0rockchip,pdm";
+ reg = <0x00 0xff0a0000 0x00 0x1000>;
+ clocks = <0x02 0x0f 0x02 0x105>;
+ clock-names = "pdm_clk\0pdm_hclk";
+ dmas = <0x2b 0x18>;
+ dma-names = "rx";
+ resets = <0x02 0x82>;
+ reset-names = "pdm-m";
+ pinctrl-names = "default";
+ pinctrl-0 = <0x44 0x45 0x46 0x47 0x48 0x49>;
+ status = "disabled";
+ phandle = <0xd4>;
+ };
+
+ crypto@ff0b0000 {
+ compatible = "rockchip,px30-crypto";
+ reg = <0x00 0xff0b0000 0x00 0x4000>;
+ interrupts = <0x00 0x52 0x04>;
+ clocks = <0x02 0xac 0x02 0xf1 0x02 0x30 0x02 0x31>;
+ clock-names = "aclk\0hclk\0sclk\0apb_pclk";
+ resets = <0x02 0x74>;
+ reset-names = "crypto-rst";
+ status = "disabled";
+ phandle = <0xd5>;
+ };
+
+ rng@ff0b0000 {
+ compatible = "rockchip,cryptov2-rng";
+ reg = <0x00 0xff0b0000 0x00 0x4000>;
+ clocks = <0x02 0x30 0x02 0x31 0x02 0xac 0x02 0xf1>;
+ clock-names = "clk_crypto\0clk_crypto_apk\0aclk_crypto\0hclk_crypto";
+ assigned-clocks = <0x02 0x30 0x02 0x31 0x02 0xac 0x02 0xf1>;
+ assigned-clock-rates = <0x8f0d180 0x8f0d180 0xbebc200 0x5f5e100>;
+ resets = <0x02 0x74>;
+ reset-names = "reset";
+ status = "okay";
+ phandle = <0xd6>;
+ };
+
+ interrupt-controller@ff131000 {
+ compatible = "arm,gic-400";
+ #interrupt-cells = <0x03>;
+ #address-cells = <0x00>;
+ interrupt-controller;
+ reg = <0x00 0xff131000 0x00 0x1000 0x00 0xff132000 0x00 0x2000 0x00 0xff134000 0x00 0x2000 0x00 0xff136000 0x00 0x2000>;
+ interrupts = <0x01 0x09 0xf04>;
+ phandle = <0x01>;
+ };
+
+ syscon@ff140000 {
+ compatible = "rockchip,px30-grf\0syscon\0simple-mfd";
+ reg = <0x00 0xff140000 0x00 0x1000>;
+ #address-cells = <0x01>;
+ #size-cells = <0x01>;
+ phandle = <0x2f>;
+
+ io-domains {
+ compatible = "rockchip,px30-io-voltage-domain";
+ status = "okay";
+ vccio1-supply = <0x4a>;
+ vccio2-supply = <0x4a>;
+ vccio3-supply = <0x4b>;
+ vccio4-supply = <0x4b>;
+ vccio5-supply = <0x4b>;
+ vccio6-supply = <0x4b>;
+ phandle = <0xd7>;
+ };
+
+ lvds {
+ compatible = "rockchip,px30-lvds";
+ phys = <0x4c>;
+ phy-names = "phy";
+ status = "disabled";
+ phandle = <0xd8>;
+
+ ports {
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+
+ port@0 {
+ reg = <0x00>;
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+
+ endpoint@0 {
+ reg = <0x00>;
+ remote-endpoint = <0x12>;
+ phandle = <0xa2>;
+ };
+ };
+ };
+ };
+
+ rgb {
+ compatible = "rockchip,px30-rgb";
+ pinctrl-names = "default\0sleep";
+ pinctrl-0 = <0x4d>;
+ pinctrl-1 = <0x4e>;
+ status = "disabled";
+ phys = <0x4c>;
+ phy-names = "phy";
+ phandle = <0xd9>;
+
+ ports {
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+
+ port@0 {
+ reg = <0x00>;
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+
+ endpoint@0 {
+ reg = <0x00>;
+ remote-endpoint = <0x14>;
+ phandle = <0xa4>;
+ };
+ };
+ };
+ };
+ };
+
+ syscon@ff148000 {
+ compatible = "syscon\0simple-mfd";
+ reg = <0x00 0xff148000 0x00 0x1000>;
+ #address-cells = <0x01>;
+ #size-cells = <0x01>;
+ phandle = <0xda>;
+
+ pvtm {
+ compatible = "rockchip,px30-pvtm";
+ clocks = <0x02 0x4a>;
+ clock-names = "core";
+ status = "okay";
+ phandle = <0xdb>;
+ };
+ };
+
+ serial@ff158000 {
+ compatible = "rockchip,px30-uart\0snps,dw-apb-uart";
+ reg = <0x00 0xff158000 0x00 0x100>;
+ interrupts = <0x00 0x10 0x04>;
+ clocks = <0x02 0x18 0x02 0x149>;
+ clock-names = "baudclk\0apb_pclk";
+ reg-shift = <0x02>;
+ reg-io-width = <0x04>;
+ dmas = <0x2b 0x02 0x2b 0x03>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x4f 0x50>;
+ status = "okay";
+ phandle = <0xdc>;
+ };
+
+ serial@ff160000 {
+ compatible = "rockchip,px30-uart\0snps,dw-apb-uart";
+ reg = <0x00 0xff160000 0x00 0x100>;
+ interrupts = <0x00 0x11 0x04>;
+ clocks = <0x02 0x19 0x02 0x14a>;
+ clock-names = "baudclk\0apb_pclk";
+ reg-shift = <0x02>;
+ reg-io-width = <0x04>;
+ dmas = <0x2b 0x04 0x2b 0x05>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x51>;
+ status = "disabled";
+ phandle = <0xdd>;
+ };
+
+ serial@ff168000 {
+ compatible = "rockchip,px30-uart\0snps,dw-apb-uart";
+ reg = <0x00 0xff168000 0x00 0x100>;
+ interrupts = <0x00 0x12 0x04>;
+ clocks = <0x02 0x1a 0x02 0x14b>;
+ clock-names = "baudclk\0apb_pclk";
+ reg-shift = <0x02>;
+ reg-io-width = <0x04>;
+ dmas = <0x2b 0x06 0x2b 0x07>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x52 0x53 0x54>;
+ status = "disabled";
+ phandle = <0xde>;
+ };
+
+ serial@ff170000 {
+ compatible = "rockchip,px30-uart\0snps,dw-apb-uart";
+ reg = <0x00 0xff170000 0x00 0x100>;
+ interrupts = <0x00 0x13 0x04>;
+ clocks = <0x02 0x1b 0x02 0x14c>;
+ clock-names = "baudclk\0apb_pclk";
+ reg-shift = <0x02>;
+ reg-io-width = <0x04>;
+ dmas = <0x2b 0x08 0x2b 0x09>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x55 0x56 0x57>;
+ status = "disabled";
+ phandle = <0xdf>;
+ };
+
+ serial@ff178000 {
+ compatible = "rockchip,px30-uart\0snps,dw-apb-uart";
+ reg = <0x00 0xff178000 0x00 0x100>;
+ interrupts = <0x00 0x14 0x04>;
+ clocks = <0x02 0x1c 0x02 0x14d>;
+ clock-names = "baudclk\0apb_pclk";
+ reg-shift = <0x02>;
+ reg-io-width = <0x04>;
+ dmas = <0x2b 0x0a 0x2b 0x0b>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x58 0x59 0x5a>;
+ status = "disabled";
+ phandle = <0xe0>;
+ };
+
+ i2c@ff180000 {
+ compatible = "rockchip,rk3399-i2c";
+ reg = <0x00 0xff180000 0x00 0x1000>;
+ clocks = <0x02 0x1d 0x02 0x14e>;
+ clock-names = "i2c\0pclk";
+ interrupts = <0x00 0x07 0x04>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x5b>;
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+ status = "okay";
+ clock-frequency = <0x61a80>;
+ i2c-scl-rising-time-ns = <0x118>;
+ i2c-scl-falling-time-ns = <0x10>;
+ phandle = <0xe1>;
+
+ pmic@20 {
+ compatible = "rockchip,rk817";
+ reg = <0x20>;
+ interrupt-parent = <0x5c>;
+ interrupts = <0x0a 0x08>;
+ pinctrl-names = "default\0pmic-sleep\0pmic-power-off\0pmic-reset";
+ pinctrl-0 = <0x5d>;
+ pinctrl-1 = <0x5e 0x5f>;
+ pinctrl-2 = <0x60 0x61>;
+ pinctrl-3 = <0x62 0x63>;
+ rockchip,system-power-controller;
+ wakeup-source;
+ #clock-cells = <0x01>;
+ clock-output-names = "rk808-clkout1\0rk808-clkout2";
+ pmic-reset-func = <0x01>;
+ vcc1-supply = <0x64>;
+ vcc2-supply = <0x64>;
+ vcc3-supply = <0x64>;
+ vcc4-supply = <0x64>;
+ vcc5-supply = <0x64>;
+ vcc6-supply = <0x64>;
+ vcc7-supply = <0x64>;
+ vcc8-supply = <0x64>;
+ vcc9-supply = <0x65>;
+ phandle = <0xe2>;
+
+ pwrkey {
+ status = "okay";
+ };
+
+ pinctrl_rk8xx {
+ gpio-controller;
+ #gpio-cells = <0x02>;
+ phandle = <0xe3>;
+
+ rk817_ts_gpio1 {
+ pins = "gpio_ts";
+ function = "pin_fun1";
+ phandle = <0xe4>;
+ };
+
+ rk817_gt_gpio2 {
+ pins = "gpio_gt";
+ function = "pin_fun1";
+ phandle = <0xe5>;
+ };
+
+ rk817_pin_ts {
+ pins = "gpio_ts";
+ function = "pin_fun0";
+ phandle = <0xe6>;
+ };
+
+ rk817_pin_gt {
+ pins = "gpio_gt";
+ function = "pin_fun0";
+ phandle = <0xe7>;
+ };
+
+ rk817_slppin_null {
+ pins = "gpio_slp";
+ function = "pin_fun0";
+ phandle = <0xe8>;
+ };
+
+ rk817_slppin_slp {
+ pins = "gpio_slp";
+ function = "pin_fun1";
+ phandle = <0x5f>;
+ };
+
+ rk817_slppin_pwrdn {
+ pins = "gpio_slp";
+ function = "pin_fun2";
+ phandle = <0x61>;
+ };
+
+ rk817_slppin_rst {
+ pins = "gpio_slp";
+ function = "pin_fun3";
+ phandle = <0x63>;
+ };
+ };
+
+ regulators {
+
+ DCDC_REG1 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <0xe7ef0>;
+ regulator-max-microvolt = <0x118c30>;
+ regulator-ramp-delay = <0x1771>;
+ regulator-initial-mode = <0x02>;
+ regulator-name = "vdd_logic";
+ phandle = <0x0e>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <0xe7ef0>;
+ };
+ };
+
+ DCDC_REG2 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <0xe7ef0>;
+ regulator-max-microvolt = <0x149970>;
+ regulator-ramp-delay = <0x1771>;
+ regulator-initial-mode = <0x02>;
+ regulator-name = "vdd_arm";
+ phandle = <0x06>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <0xe7ef0>;
+ };
+ };
+
+ DCDC_REG3 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-initial-mode = <0x02>;
+ regulator-name = "vcc_ddr";
+ phandle = <0xe9>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ };
+ };
+
+ DCDC_REG4 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <0x325aa0>;
+ regulator-max-microvolt = <0x325aa0>;
+ regulator-initial-mode = <0x02>;
+ regulator-name = "vcc_3v3";
+ phandle = <0x4b>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <0x325aa0>;
+ };
+ };
+
+ LDO_REG1 {
+ regulator-min-microvolt = <0xf4240>;
+ regulator-max-microvolt = <0xf4240>;
+ regulator-name = "vcc_1v0";
+ phandle = <0xea>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <0xf4240>;
+ };
+ };
+
+ LDO_REG2 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <0x1b7740>;
+ regulator-max-microvolt = <0x1b7740>;
+ regulator-name = "vcc1v8_soc";
+ phandle = <0x88>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <0x1b7740>;
+ };
+ };
+
+ LDO_REG3 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <0xf4240>;
+ regulator-max-microvolt = <0xf4240>;
+ regulator-name = "vcc1v0_soc";
+ phandle = <0xeb>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <0xf4240>;
+ };
+ };
+
+ LDO_REG4 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <0x325aa0>;
+ regulator-max-microvolt = <0x325aa0>;
+ regulator-name = "vcc3v3_pmu";
+ phandle = <0x29>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <0x325aa0>;
+ };
+ };
+
+ LDO_REG5 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <0x1b7740>;
+ regulator-max-microvolt = <0x1b7740>;
+ regulator-name = "vccio_sd";
+ phandle = <0x4a>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <0x1b7740>;
+ };
+ };
+
+ LDO_REG6 {
+ regulator-min-microvolt = <0x1b7740>;
+ regulator-max-microvolt = <0x2dc6c0>;
+ regulator-boot-on;
+ regulator-name = "vcc_sd";
+ phandle = <0x93>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <0x2dc6c0>;
+ };
+ };
+
+ LDO_REG7 {
+ regulator-min-microvolt = <0x325aa0>;
+ regulator-max-microvolt = <0x325aa0>;
+ regulator-name = "vcc_backlight";
+ phandle = <0x9e>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <0x325aa0>;
+ };
+ };
+
+ LDO_REG8 {
+ regulator-min-microvolt = <0x2ab980>;
+ regulator-max-microvolt = <0x2ab980>;
+ regulator-name = "vcc_lcd";
+ phandle = <0x9f>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <0x2ab980>;
+ };
+ };
+
+ BOOST {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <0x4c4b40>;
+ regulator-max-microvolt = <0x5265c0>;
+ regulator-name = "boost";
+ phandle = <0x65>;
+ };
+
+ OTG_SWITCH {
+ regulator-boot-on;
+ regulator-name = "otg_switch";
+ phandle = <0xec>;
+ };
+ };
+
+ battery {
+ compatible = "rk817,battery";
+ ocv_table = <0xc5d 0xc94 0xcd0 0xd02 0xd34 0xd66 0xd98 0xdca 0xdfc 0xe2e 0xe56 0xe7e 0xea6 0xece 0xef6 0xf1e 0xf46 0xf6e 0xf96 0xf9b 0xfa0>;
+ design_capacity = <0xd34>;
+ design_qmax = <0xe86>;
+ bat_res = <0x64>;
+ sleep_enter_current = <0x12c>;
+ sleep_exit_current = <0x12c>;
+ sleep_filter_current = <0x64>;
+ power_off_thresd = <0xbb8>;
+ zero_algorithm_vol = <0xf0a>;
+ max_soc_offset = <0x3c>;
+ monitor_sec = <0x05>;
+ virtual_power = <0x00>;
+ sample_res = <0x0a>;
+ };
+
+ charger {
+ compatible = "rk817,charger";
+ min_input_voltage = <0x1194>;
+ max_input_current = <0x5dc>;
+ max_chrg_current = <0x7d0>;
+ max_chrg_voltage = <0x1068>;
+ chrg_term_mode = <0x00>;
+ chrg_finish_cur = <0x34>;
+ virtual_power = <0x00>;
+ sample_res = <0x0a>;
+ dc_det_gpio = <0x5c 0x0b 0x00>;
+ bat_low_gpio = <0x66 0x0d 0x00>;
+ extcon = <0x67>;
+ };
+
+ codec {
+ #sound-dai-cells = <0x00>;
+ compatible = "rockchip,rk817-codec";
+ clocks = <0x02 0x15>;
+ clock-names = "mclk";
+ pinctrl-names = "default";
+ pinctrl-0 = <0x68>;
+ hp-volume = <0x14>;
+ spk-volume = <0x03>;
+ status = "okay";
+ phandle = <0xc3>;
+ };
+ };
+ };
+
+ i2c@ff190000 {
+ compatible = "rockchip,rk3399-i2c";
+ reg = <0x00 0xff190000 0x00 0x1000>;
+ clocks = <0x02 0x1e 0x02 0x14f>;
+ clock-names = "i2c\0pclk";
+ interrupts = <0x00 0x08 0x04>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x69>;
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+ status = "okay";
+ clock-frequency = <0x61a80>;
+ phandle = <0xed>;
+ };
+
+ i2c@ff1a0000 {
+ compatible = "rockchip,rk3399-i2c";
+ reg = <0x00 0xff1a0000 0x00 0x1000>;
+ clocks = <0x02 0x1f 0x02 0x150>;
+ clock-names = "i2c\0pclk";
+ interrupts = <0x00 0x09 0x04>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x6a>;
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+ status = "disabled";
+ phandle = <0xee>;
+ };
+
+ i2c@ff1b0000 {
+ compatible = "rockchip,rk3399-i2c";
+ reg = <0x00 0xff1b0000 0x00 0x1000>;
+ clocks = <0x02 0x20 0x02 0x151>;
+ clock-names = "i2c\0pclk";
+ interrupts = <0x00 0x0a 0x04>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x6b>;
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+ status = "disabled";
+ phandle = <0xef>;
+ };
+
+ spi@ff1d0000 {
+ compatible = "rockchip,px30-spi\0rockchip,rk3066-spi";
+ reg = <0x00 0xff1d0000 0x00 0x1000>;
+ interrupts = <0x00 0x1a 0x04>;
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+ clocks = <0x02 0x24 0x02 0x155>;
+ clock-names = "spiclk\0apb_pclk";
+ dmas = <0x2b 0x0c 0x2b 0x0d>;
+ dma-names = "tx\0rx";
+ pinctrl-names = "default\0high_speed";
+ pinctrl-0 = <0x6c 0x6d 0x6e 0x6f>;
+ pinctrl-1 = <0x70 0x6d 0x71 0x72>;
+ status = "disabled";
+ phandle = <0xf0>;
+ };
+
+ spi@ff1d8000 {
+ compatible = "rockchip,px30-spi\0rockchip,rk3066-spi";
+ reg = <0x00 0xff1d8000 0x00 0x1000>;
+ interrupts = <0x00 0x1b 0x04>;
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+ clocks = <0x02 0x25 0x02 0x156>;
+ clock-names = "spiclk\0apb_pclk";
+ dmas = <0x2b 0x0e 0x2b 0x0f>;
+ dma-names = "tx\0rx";
+ pinctrl-names = "default\0high_speed";
+ pinctrl-0 = <0x73 0x74 0x75 0x76 0x77>;
+ pinctrl-1 = <0x78 0x74 0x75 0x79 0x7a>;
+ status = "disabled";
+ phandle = <0xf1>;
+ };
+
+ watchdog@ff1e0000 {
+ compatible = "snps,dw-wdt";
+ reg = <0x00 0xff1e0000 0x00 0x100>;
+ clocks = <0x02 0x15b>;
+ interrupts = <0x00 0x25 0x04>;
+ resets = <0x02 0xb5>;
+ reset-names = "reset";
+ status = "disabled";
+ phandle = <0xf2>;
+ };
+
+ pwm@ff200000 {
+ compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm";
+ reg = <0x00 0xff200000 0x00 0x10>;
+ #pwm-cells = <0x03>;
+ pinctrl-names = "active";
+ pinctrl-0 = <0x7b>;
+ clocks = <0x02 0x22 0x02 0x153>;
+ clock-names = "pwm\0pclk";
+ status = "okay";
+ phandle = <0xbc>;
+ };
+
+ pwm@ff200010 {
+ compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm";
+ reg = <0x00 0xff200010 0x00 0x10>;
+ #pwm-cells = <0x03>;
+ pinctrl-names = "active";
+ pinctrl-0 = <0x7c>;
+ clocks = <0x02 0x22 0x02 0x153>;
+ clock-names = "pwm\0pclk";
+ status = "okay";
+ phandle = <0xc1>;
+ };
+
+ pwm@ff200020 {
+ compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm";
+ reg = <0x00 0xff200020 0x00 0x10>;
+ #pwm-cells = <0x03>;
+ pinctrl-names = "active";
+ pinctrl-0 = <0x7d>;
+ clocks = <0x02 0x22 0x02 0x153>;
+ clock-names = "pwm\0pclk";
+ status = "disabled";
+ phandle = <0xf3>;
+ };
+
+ pwm@ff200030 {
+ compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm";
+ reg = <0x00 0xff200030 0x00 0x10>;
+ #pwm-cells = <0x03>;
+ pinctrl-names = "active";
+ pinctrl-0 = <0x7e>;
+ clocks = <0x02 0x22 0x02 0x153>;
+ clock-names = "pwm\0pclk";
+ status = "disabled";
+ phandle = <0xf4>;
+ };
+
+ pwm@ff208000 {
+ compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm";
+ reg = <0x00 0xff208000 0x00 0x10>;
+ #pwm-cells = <0x03>;
+ pinctrl-names = "active";
+ pinctrl-0 = <0x7f>;
+ clocks = <0x02 0x23 0x02 0x154>;
+ clock-names = "pwm\0pclk";
+ status = "disabled";
+ phandle = <0xf5>;
+ };
+
+ pwm@ff208010 {
+ compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm";
+ reg = <0x00 0xff208010 0x00 0x10>;
+ #pwm-cells = <0x03>;
+ pinctrl-names = "active";
+ pinctrl-0 = <0x80>;
+ clocks = <0x02 0x23 0x02 0x154>;
+ clock-names = "pwm\0pclk";
+ status = "disabled";
+ phandle = <0xf6>;
+ };
+
+ pwm@ff208020 {
+ compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm";
+ reg = <0x00 0xff208020 0x00 0x10>;
+ #pwm-cells = <0x03>;
+ pinctrl-names = "active";
+ pinctrl-0 = <0x81>;
+ clocks = <0x02 0x23 0x02 0x154>;
+ clock-names = "pwm\0pclk";
+ status = "disabled";
+ phandle = <0xf7>;
+ };
+
+ pwm@ff208030 {
+ compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm";
+ reg = <0x00 0xff208030 0x00 0x10>;
+ #pwm-cells = <0x03>;
+ pinctrl-names = "active";
+ pinctrl-0 = <0x82>;
+ clocks = <0x02 0x23 0x02 0x154>;
+ clock-names = "pwm\0pclk";
+ status = "disabled";
+ phandle = <0xf8>;
+ };
+
+ rktimer@ff210000 {
+ compatible = "rockchip,rk3288-timer";
+ reg = <0x00 0xff210000 0x00 0x1000>;
+ interrupts = <0x00 0x1e 0x04>;
+ clocks = <0x02 0x159 0x02 0x26>;
+ clock-names = "pclk\0timer";
+ phandle = <0xf9>;
+ };
+
+ amba {
+ compatible = "simple-bus";
+ #address-cells = <0x02>;
+ #size-cells = <0x02>;
+ ranges;
+
+ dmac@ff240000 {
+ compatible = "arm,pl330\0arm,primecell";
+ reg = <0x00 0xff240000 0x00 0x4000>;
+ interrupts = <0x00 0x01 0x04 0x00 0x02 0x04>;
+ clocks = <0x02 0xbb>;
+ clock-names = "apb_pclk";
+ #dma-cells = <0x01>;
+ peripherals-req-type-burst;
+ phandle = <0x2b>;
+ };
+ };
+
+ thermal-zones {
+ phandle = <0xfa>;
+
+ soc-thermal {
+ polling-delay-passive = <0x14>;
+ polling-delay = <0x3e8>;
+ sustainable-power = <0x2ee>;
+ thermal-sensors = <0x83 0x00>;
+ phandle = <0xfb>;
+
+ trips {
+
+ trip-point-0 {
+ temperature = <0x11170>;
+ hysteresis = <0x7d0>;
+ type = "passive";
+ phandle = <0xfc>;
+ };
+
+ trip-point-1 {
+ temperature = <0x14c08>;
+ hysteresis = <0x7d0>;
+ type = "passive";
+ phandle = <0x84>;
+ };
+
+ soc-crit {
+ temperature = <0x1c138>;
+ hysteresis = <0x7d0>;
+ type = "critical";
+ phandle = <0xfd>;
+ };
+ };
+
+ cooling-maps {
+
+ map0 {
+ trip = <0x84>;
+ cooling-device = <0x09 0xffffffff 0xffffffff>;
+ contribution = <0x1000>;
+ };
+
+ map1 {
+ trip = <0x84>;
+ cooling-device = <0x85 0xffffffff 0xffffffff>;
+ contribution = <0x1000>;
+ };
+ };
+ };
+
+ gpu-thermal {
+ polling-delay-passive = <0x64>;
+ polling-delay = <0x3e8>;
+ thermal-sensors = <0x83 0x01>;
+ phandle = <0xfe>;
+ };
+ };
+
+ tsadc@ff280000 {
+ compatible = "rockchip,px30-tsadc";
+ reg = <0x00 0xff280000 0x00 0x100>;
+ interrupts = <0x00 0x24 0x04>;
+ rockchip,grf = <0x2f>;
+ clocks = <0x02 0x2c 0x02 0x158>;
+ clock-names = "tsadc\0apb_pclk";
+ assigned-clocks = <0x02 0x2c>;
+ assigned-clock-rates = <0xc350>;
+ resets = <0x02 0xa8>;
+ reset-names = "tsadc-apb";
+ #thermal-sensor-cells = <0x01>;
+ rockchip,hw-tshut-temp = <0x1d4c0>;
+ status = "okay";
+ pinctrl-names = "gpio\0otpout";
+ pinctrl-0 = <0x86>;
+ pinctrl-1 = <0x87>;
+ phandle = <0x83>;
+ };
+
+ saradc@ff288000 {
+ compatible = "rockchip,px30-saradc\0rockchip,rk3399-saradc";
+ reg = <0x00 0xff288000 0x00 0x100>;
+ interrupts = <0x00 0x54 0x04>;
+ #io-channel-cells = <0x01>;
+ clocks = <0x02 0x2d 0x02 0x157>;
+ clock-names = "saradc\0apb_pclk";
+ resets = <0x02 0xa5>;
+ reset-names = "saradc-apb";
+ status = "okay";
+ vref-supply = <0x88>;
+ phandle = <0xbe>;
+ };
+
+ otp@ff290000 {
+ compatible = "rockchip,px30-otp";
+ reg = <0x00 0xff290000 0x00 0x4000>;
+ #address-cells = <0x01>;
+ #size-cells = <0x01>;
+ clocks = <0x02 0x2f 0x02 0x15a 0x02 0x161>;
+ clock-names = "clk_otp\0pclk_otp\0pclk_otp_phy";
+ resets = <0x02 0xb4>;
+ reset-names = "otp_phy";
+ phandle = <0xff>;
+
+ id@7 {
+ reg = <0x07 0x10>;
+ phandle = <0x0f>;
+ };
+
+ cpu-leakage@17 {
+ reg = <0x17 0x01>;
+ phandle = <0x07>;
+ };
+
+ performance@1e {
+ reg = <0x1e 0x01>;
+ bits = <0x04 0x03>;
+ phandle = <0x08>;
+ };
+ };
+
+ clock-controller@ff2b0000 {
+ compatible = "rockchip,px30-cru";
+ reg = <0x00 0xff2b0000 0x00 0x1000>;
+ rockchip,grf = <0x2f>;
+ rockchip,boost = <0x89>;
+ #clock-cells = <0x01>;
+ #reset-cells = <0x01>;
+ assigned-clocks = <0x02 0x04>;
+ assigned-clock-rates = <0x3dfd2400>;
+ phandle = <0x02>;
+ };
+
+ cpu-boost@ff2b8000 {
+ compatible = "syscon";
+ reg = <0x00 0xff2b8000 0x00 0x1000>;
+ rockchip,boost-low-con0 = <0x1032>;
+ rockchip,boost-low-con1 = <0x1441>;
+ rockchip,boost-high-con0 = <0x1036>;
+ rockchip,boost-high-con1 = <0x1441>;
+ rockchip,boost-backup-pll = <0x01>;
+ rockchip,boost-backup-pll-usage = <0x00>;
+ rockchip,boost-switch-threshold = <0x249f00>;
+ rockchip,boost-statis-threshold = <0x100>;
+ rockchip,boost-statis-enable = <0x00>;
+ rockchip,boost-enable = <0x00>;
+ phandle = <0x89>;
+ };
+
+ pmu-clock-controller@ff2bc000 {
+ compatible = "rockchip,px30-pmucru";
+ reg = <0x00 0xff2bc000 0x00 0x1000>;
+ rockchip,grf = <0x2f>;
+ #clock-cells = <0x01>;
+ #reset-cells = <0x01>;
+ assigned-clocks = <0x2a 0x01 0x2a 0x08 0x2a 0x05 0x02 0x07 0x02 0xab 0x02 0xb0 0x02 0xf0 0x02 0xf5 0x02 0x140 0x02 0x49>;
+ assigned-clock-rates = <0x47868c00 0x5f5e100 0x18cba80 0x23c34600 0xbebc200 0xbebc200 0x8f0d180 0x8f0d180 0x5f5e100 0xbebc200>;
+ phandle = <0x2a>;
+ };
+
+ syscon@ff2c0000 {
+ compatible = "rockchip,px30-usb2phy-grf\0syscon\0simple-mfd";
+ reg = <0x00 0xff2c0000 0x00 0x10000>;
+ #address-cells = <0x01>;
+ #size-cells = <0x01>;
+ phandle = <0x100>;
+
+ usb2-phy@100 {
+ compatible = "rockchip,px30-usb2phy\0rockchip,rk3328-usb2phy";
+ reg = <0x100 0x10>;
+ clocks = <0x2a 0x0a>;
+ clock-names = "phyclk";
+ #clock-cells = <0x00>;
+ assigned-clocks = <0x02 0x0e 0x02 0x55>;
+ assigned-clock-parents = <0x67 0x02 0x0e>;
+ clock-output-names = "usb480m_phy";
+ status = "okay";
+ phandle = <0x67>;
+
+ host-port {
+ #phy-cells = <0x00>;
+ interrupts = <0x00 0x44 0x04>;
+ interrupt-names = "linestate";
+ status = "okay";
+ phandle = <0x8c>;
+ };
+
+ otg-port {
+ #phy-cells = <0x00>;
+ interrupts = <0x00 0x42 0x04 0x00 0x41 0x04 0x00 0x40 0x04>;
+ interrupt-names = "otg-bvalid\0otg-id\0linestate";
+ status = "disabled";
+ phandle = <0x8b>;
+ };
+ };
+ };
+
+ video-phy@ff2e0000 {
+ compatible = "rockchip,px30-video-phy";
+ reg = <0x00 0xff2e0000 0x00 0x10000 0x00 0xff450000 0x00 0x10000>;
+ clocks = <0x2a 0x0b 0x02 0x145 0x02 0x144>;
+ clock-names = "ref\0pclk_phy\0pclk_host";
+ #clock-cells = <0x00>;
+ resets = <0x02 0x3e>;
+ reset-names = "rst";
+ power-domains = <0x8a 0x0c>;
+ #phy-cells = <0x00>;
+ status = "okay";
+ phandle = <0x4c>;
+ };
+
+ mipi-dphy-rx0@ff2f0000 {
+ compatible = "rockchip,rk3326-mipi-dphy";
+ reg = <0x00 0xff2f0000 0x00 0x4000>;
+ clocks = <0x02 0x146>;
+ clock-names = "dphy-ref";
+ power-domains = <0x8a 0x0d>;
+ rockchip,grf = <0x2f>;
+ status = "okay";
+ phandle = <0x101>;
+ };
+
+ usb@ff300000 {
+ compatible = "rockchip,px30-usb\0rockchip,rk3066-usb\0snps,dwc2";
+ reg = <0x00 0xff300000 0x00 0x40000>;
+ interrupts = <0x00 0x3e 0x04>;
+ clocks = <0x02 0x102>;
+ clock-names = "otg";
+ power-domains = <0x8a 0x05>;
+ dr_mode = "otg";
+ g-np-tx-fifo-size = <0x10>;
+ g-rx-fifo-size = <0x118>;
+ g-tx-fifo-size = <0x100 0x80 0x80 0x40 0x20 0x10>;
+ g-use-dma;
+ phys = <0x8b>;
+ phy-names = "usb2-phy";
+ status = "okay";
+ phandle = <0x102>;
+ };
+
+ usb@ff340000 {
+ compatible = "generic-ehci";
+ reg = <0x00 0xff340000 0x00 0x10000>;
+ interrupts = <0x00 0x3c 0x04>;
+ clocks = <0x02 0x103 0x67>;
+ clock-names = "usbhost\0utmi";
+ power-domains = <0x8a 0x05>;
+ phys = <0x8c>;
+ phy-names = "usb";
+ status = "disabled";
+ phandle = <0x103>;
+ };
+
+ usb@ff350000 {
+ compatible = "generic-ohci";
+ reg = <0x00 0xff350000 0x00 0x10000>;
+ interrupts = <0x00 0x3d 0x04>;
+ clocks = <0x02 0x103 0x67>;
+ clock-names = "usbhost\0utmi";
+ power-domains = <0x8a 0x05>;
+ phys = <0x8c>;
+ phy-names = "usb";
+ status = "disabled";
+ phandle = <0x104>;
+ };
+
+ ethernet@ff360000 {
+ compatible = "rockchip,px30-gmac";
+ reg = <0x00 0xff360000 0x00 0x10000>;
+ rockchip,grf = <0x2f>;
+ interrupts = <0x00 0x2b 0x04>;
+ interrupt-names = "macirq";
+ clocks = <0x02 0x3e 0x02 0x3f 0x02 0x3f 0x02 0x40 0x02 0x41 0x02 0xb2 0x02 0x143 0x02 0x4c>;
+ clock-names = "stmmaceth\0mac_clk_rx\0mac_clk_tx\0clk_mac_ref\0clk_mac_refout\0aclk_mac\0pclk_mac\0clk_mac_speed";
+ phy-mode = "rmii";
+ pinctrl-names = "default";
+ pinctrl-0 = <0x8d 0x8e>;
+ resets = <0x02 0x5e>;
+ reset-names = "stmmaceth";
+ power-domains = <0x8a 0x09>;
+ status = "disabled";
+ phandle = <0x105>;
+ };
+
+ dwmmc@ff370000 {
+ compatible = "rockchip,px30-dw-mshc\0rockchip,rk3288-dw-mshc";
+ reg = <0x00 0xff370000 0x00 0x4000>;
+ max-frequency = <0x8f0d180>;
+ clocks = <0x02 0xf7 0x02 0x3b 0x02 0x43 0x02 0x44>;
+ clock-names = "biu\0ciu\0ciu-drv\0ciu-sample";
+ assigned-clocks = <0x02 0x3b>;
+ assigned-clock-parents = <0x02 0x57>;
+ power-domains = <0x8a 0x07>;
+ fifo-depth = <0x100>;
+ interrupts = <0x00 0x36 0x04>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x8f 0x90 0x91 0x92>;
+ status = "okay";
+ bus-width = <0x04>;
+ cap-mmc-highspeed;
+ cap-sd-highspeed;
+ supports-sd;
+ card-detect-delay = <0x320>;
+ ignore-pm-notify;
+ cd-gpios = <0x5c 0x03 0x01>;
+ sd-uhs-sdr12;
+ sd-uhs-sdr25;
+ sd-uhs-sdr50;
+ sd-uhs-sdr104;
+ vqmmc-supply = <0x4a>;
+ vmmc-supply = <0x93>;
+ phandle = <0x106>;
+ };
+
+ dwmmc@ff380000 {
+ compatible = "rockchip,px30-dw-mshc\0rockchip,rk3288-dw-mshc";
+ reg = <0x00 0xff380000 0x00 0x4000>;
+ max-frequency = <0x8f0d180>;
+ clocks = <0x02 0xff 0x02 0x38 0x02 0x45 0x02 0x46>;
+ clock-names = "biu\0ciu\0ciu-drv\0ciu-sample";
+ assigned-clocks = <0x02 0x38>;
+ assigned-clock-parents = <0x02 0x51>;
+ power-domains = <0x8a 0x0a>;
+ fifo-depth = <0x100>;
+ interrupts = <0x00 0x37 0x04>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x94 0x95 0x96>;
+ status = "okay";
+ bus-width = <0x04>;
+ cap-mmc-highspeed;
+ cap-sd-highspeed;
+ supports-sd;
+ card-detect-delay = <0x320>;
+ ignore-pm-notify;
+ cd-gpios = <0x97 0x0e 0x01>;
+ sd-uhs-sdr12;
+ sd-uhs-sdr25;
+ sd-uhs-sdr50;
+ sd-uhs-sdr104;
+ vqmmc-supply = <0x4a>;
+ vmmc-supply = <0x93>;
+ phandle = <0x107>;
+ };
+
+ dwmmc@ff390000 {
+ compatible = "rockchip,px30-dw-mshc\0rockchip,rk3288-dw-mshc";
+ reg = <0x00 0xff390000 0x00 0x4000>;
+ max-frequency = <0x8f0d180>;
+ clocks = <0x02 0x100 0x02 0x39 0x02 0x47 0x02 0x48>;
+ clock-names = "biu\0ciu\0ciu-drv\0ciu-sample";
+ assigned-clocks = <0x02 0x39>;
+ assigned-clock-parents = <0x02 0x53>;
+ power-domains = <0x8a 0x0a>;
+ fifo-depth = <0x100>;
+ interrupts = <0x00 0x35 0x04>;
+ status = "disabled";
+ phandle = <0x108>;
+ };
+
+ nandc@ff3b0000 {
+ compatible = "rockchip,rk-nandc";
+ reg = <0x00 0xff3b0000 0x00 0x4000>;
+ interrupts = <0x00 0x39 0x04>;
+ nandc_id = <0x00>;
+ clocks = <0x02 0x37 0x02 0xfe>;
+ clock-names = "clk_nandc\0hclk_nandc";
+ assigned-clocks = <0x02 0x37>;
+ assigned-clock-parents = <0x02 0x4f>;
+ power-domains = <0x8a 0x0a>;
+ status = "disabled";
+ phandle = <0x109>;
+ };
+
+ sfc@ff3a0000 {
+ compatible = "rockchip,sfc";
+ reg = <0x00 0xff3a0000 0x00 0x4000>;
+ interrupts = <0x00 0x38 0x04>;
+ clocks = <0x02 0x3a 0x02 0x101>;
+ clock-names = "clk_sfc\0hclk_sfc";
+ assigned-clocks = <0x02 0x3a>;
+ assigned-clock-rates = <0x989680>;
+ status = "disabled";
+ phandle = <0x10a>;
+ };
+
+ gpu@ff400000 {
+ compatible = "arm,malit602\0arm,malit60x\0arm,malit6xx\0arm,mali-midgard";
+ reg = <0x00 0xff400000 0x00 0x4000>;
+ interrupts = <0x00 0x2d 0x04 0x00 0x2e 0x04 0x00 0x2f 0x04>;
+ interrupt-names = "GPU\0MMU\0JOB";
+ clocks = <0x02 0x49>;
+ clock-names = "clk_mali";
+ power-domains = <0x8a 0x0e>;
+ #cooling-cells = <0x02>;
+ operating-points-v2 = <0x98>;
+ status = "okay";
+ mali-supply = <0x0e>;
+ phandle = <0x85>;
+
+ power_model {
+ compatible = "arm,mali-simple-power-model";
+ static-coefficient = <0x64578>;
+ dynamic-coefficient = <0x2dd>;
+ ts = <0x7d00 0x125c 0xffffffb0 0x02>;
+ thermal-zone = "gpu-thermal";
+ };
+ };
+
+ gpu-opp-table {
+ compatible = "operating-points-v2";
+ rockchip,thermal-zone = "soc-thermal";
+ rockchip,temp-hysteresis = <0x1388>;
+ rockchip,low-temp = <0x00>;
+ rockchip,low-temp-min-volt = <0xf4240>;
+ rockchip,low-temp-adjust-volt = <0x00 0x1e0 0xc350>;
+ rockchip,max-volt = <0x11edd8>;
+ rockchip,evb-irdrop = <0x61a8>;
+ rockchip,pvtm-voltage-sel = <0x00 0xc350 0x00 0xc351 0xd2f0 0x01 0xd2f1 0xea60 0x02 0xea61 0x1869f 0x03>;
+ rockchip,pvtm-ch = <0x00 0x00>;
+ phandle = <0x98>;
+
+ opp-400000000 {
+ opp-hz = <0x00 0x17d78400>;
+ opp-microvolt = <0x100590>;
+ opp-microvolt-L0 = <0x100590>;
+ opp-microvolt-L1 = <0xfa3e8>;
+ opp-microvolt-L2 = <0xee098>;
+ opp-microvolt-L3 = <0xe7ef0>;
+ };
+
+ opp-480000000 {
+ opp-hz = <0x00 0x1c9c3800>;
+ opp-microvolt = <0x112a88>;
+ opp-microvolt-L0 = <0x112a88>;
+ opp-microvolt-L1 = <0x10c8e0>;
+ opp-microvolt-L2 = <0x100590>;
+ opp-microvolt-L3 = <0xf4240>;
+ };
+
+ opp-520000000 {
+ opp-hz = <0x00 0x1efe9200>;
+ opp-microvolt = <0x118c30>;
+ opp-microvolt-L0 = <0x118c30>;
+ opp-microvolt-L1 = <0x118c30>;
+ opp-microvolt-L2 = <0x10c8e0>;
+ opp-microvolt-L3 = <0x100590>;
+ };
+ };
+
+ hevc_service@ff440000 {
+ compatible = "rockchip,hevc_sub";
+ iommu_enabled = <0x01>;
+ reg = <0x00 0xff440000 0x00 0x400>;
+ interrupts = <0x00 0x31 0x04>;
+ interrupt-names = "irq_dec";
+ dev_mode = <0x01>;
+ iommus = <0x99>;
+ allocator = <0x01>;
+ phandle = <0x9c>;
+ };
+
+ vpu_service@ff442000 {
+ compatible = "rockchip,vpu_sub";
+ iommu_enabled = <0x01>;
+ reg = <0x00 0xff442000 0x00 0x800>;
+ interrupts = <0x00 0x50 0x04 0x00 0x4f 0x04>;
+ interrupt-names = "irq_enc\0irq_dec";
+ dev_mode = <0x00>;
+ iommus = <0x9a>;
+ allocator = <0x01>;
+ phandle = <0x9b>;
+ };
+
+ vpu_combo {
+ compatible = "rockchip,vpu_combo";
+ subcnt = <0x02>;
+ rockchip,grf = <0x2f>;
+ rockchip,sub = <0x9b 0x9c>;
+ clocks = <0x02 0xaf 0x02 0xf4 0x02 0x4b>;
+ clock-names = "aclk_vcodec\0hclk_vcodec\0clk_core";
+ resets = <0x02 0x24 0x02 0x26 0x02 0x25 0x02 0x27 0x02 0x3f>;
+ reset-names = "video_a\0video_h\0niu_a\0niu_h\0video_core";
+ power-domains = <0x8a 0x0b>;
+ mode_bit = <0x0f>;
+ mode_ctrl = <0x410>;
+ status = "okay";
+ phandle = <0x10b>;
+ };
+
+ iommu@ff440440 {
+ compatible = "rockchip,iommu";
+ reg = <0x00 0xff440440 0x00 0x40 0x00 0xff440480 0x00 0x40>;
+ interrupts = <0x00 0x32 0x04>;
+ interrupt-names = "hevc_mmu";
+ clocks = <0x02 0xaf 0x02 0xf4>;
+ clock-names = "aclk\0hclk";
+ power-domains = <0x8a 0x0b>;
+ #iommu-cells = <0x00>;
+ phandle = <0x99>;
+ };
+
+ iommu@ff442800 {
+ compatible = "rockchip,iommu";
+ reg = <0x00 0xff442800 0x00 0x100>;
+ interrupts = <0x00 0x51 0x04>;
+ interrupt-names = "vpu_mmu";
+ clocks = <0x02 0xaf 0x02 0xf4>;
+ clock-names = "aclk\0hclk";
+ power-domains = <0x8a 0x0b>;
+ #iommu-cells = <0x00>;
+ phandle = <0x9a>;
+ };
+
+ dsi@ff450000 {
+ compatible = "rockchip,px30-mipi-dsi";
+ reg = <0x00 0xff450000 0x00 0x10000>;
+ interrupts = <0x00 0x4b 0x04>;
+ clocks = <0x02 0x144 0x4c>;
+ clock-names = "pclk\0hs_clk";
+ resets = <0x02 0x3d>;
+ reset-names = "apb";
+ phys = <0x4c>;
+ phy-names = "mipi_dphy";
+ power-domains = <0x8a 0x0c>;
+ rockchip,grf = <0x2f>;
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+ status = "okay";
+ phandle = <0x10c>;
+
+ ports {
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+
+ port@0 {
+ reg = <0x00>;
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+
+ endpoint@0 {
+ reg = <0x00>;
+ remote-endpoint = <0x13>;
+ status = "okay";
+ phandle = <0xa3>;
+ };
+ };
+ };
+
+ panel@0 {
+ compatible = "elida,kd35t133\0simple-panel-dsi";
+ reg = <0x00>;
+ backlight = <0x9d>;
+ backlight-supply = <0x9e>;
+ power-supply = <0x9f>;
+ reset-gpios = <0x97 0x10 0x01>;
+ prepare-delay-ms = <0x02>;
+ reset-delay-ms = <0x01>;
+ init-delay-ms = <0x14>;
+ enable-delay-ms = <0x78>;
+ disable-delay-ms = <0x32>;
+ unprepare-delay-ms = <0x14>;
+ width-mm = <0x34>;
+ height-mm = <0x46>;
+ dsi,flags = <0xa03>;
+ dsi,format = <0x00>;
+ dsi,lanes = <0x04>;
+ panel-init-sequence = [39 00 04 b9 f1 12 83 39 00 06 b1 00 00 00 da 80 39 00 04 b2 00 13 70 39 00 0b b3 10 10 28 28 03 ff 00 00 00 00 15 00 02 b4 80 15 00 03 b5 0a 0a 15 00 03 b6 7f 7f 39 00 05 b8 26 62 f0 63 39 00 1c ba 33 81 05 f9 0e 0e 20 00 00 00 00 00 00 00 44 25 00 90 0a 00 00 01 4f 01 00 00 37 15 00 02 bc 47 39 00 04 bf 02 11 00 39 00 0a c0 73 73 50 50 00 00 12 50 00 39 00 0d c1 53 c0 32 32 77 e1 dd dd 77 77 33 33 39 00 07 c6 82 00 bf ff 00 ff 39 00 07 c7 b8 00 0a 00 00 00 39 00 05 c8 10 40 1e 02 15 00 02 cc 0b 39 00 23 e0 00 07 0d 37 35 3f 41 44 06 0c 0d 0f 11 10 12 14 1a 00 07 0d 37 35 3f 41 44 06 0c 0d 0f 11 10 12 14 1a 39 00 0f e3 07 07 0b 0b 0b 0b 00 00 00 00 ff 00 c0 10 39 00 40 e9 c8 10 02 00 00 b0 b1 11 31 23 28 80 b0 b1 27 08 00 04 02 00 00 00 00 04 02 00 00 00 88 88 ba 60 24 08 88 88 88 88 88 88 88 ba 71 35 18 88 88 88 88 88 00 00 00 01 00 00 00 00 00 00 00 00 00 39 00 3e ea 97 0a 82 02 03 07 00 00 00 00 00 00 81 88 ba 17 53 88 88 88 88 88 88 80 88 ba 06 42 88 88 88 88 88 88 23 00 00 02 80 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 39 00 04 ef ff ff 01 05 c8 01 11 05 32 01 29];
+ panel-exit-sequence = <0x5140128 0x50a0110>;
+
+ display-timings {
+ native-mode = <0xa0>;
+
+ 60Hz {
+ clock-frequency = <0x2faf080>;
+ hactive = <0x280>;
+ vactive = <0x1e0>;
+ hfront-porch = <0x1c2>;
+ hsync-len = <0x2e>;
+ hback-porch = <0x1c2>;
+ vfront-porch = <0x11>;
+ vsync-len = <0x05>;
+ vback-porch = <0x0d>;
+ hsync-active = <0x00>;
+ vsync-active = <0x00>;
+ de-active = <0x00>;
+ pixelclk-active = <0x01>;
+ phandle = <0xa0>;
+ };
+
+ 50Hz {
+ clock-frequency = <0x1851960>;
+ hactive = <0x280>;
+ vactive = <0x1e0>;
+ hfront-porch = <0xbc>;
+ hsync-len = <0x02>;
+ hback-porch = <0xbe>;
+ vfront-porch = <0x0d>;
+ vsync-len = <0x02>;
+ vback-porch = <0x05>;
+ hsync-active = <0x00>;
+ vsync-active = <0x00>;
+ de-active = <0x00>;
+ pixelclk-active = <0x00>;
+ phandle = <0x10d>;
+ };
+
+ 75Hz {
+ clock-frequency = <0x1d2eb40>;
+ hactive = <0x280>;
+ vactive = <0x1e0>;
+ hfront-porch = <0x57>;
+ hsync-len = <0x02>;
+ hback-porch = <0x57>;
+ vfront-porch = <0x0d>;
+ vsync-len = <0x02>;
+ vback-porch = <0x05>;
+ hsync-active = <0x00>;
+ vsync-active = <0x00>;
+ de-active = <0x00>;
+ pixelclk-active = <0x00>;
+ phandle = <0x10e>;
+ };
+ };
+ };
+ };
+
+ vop@ff460000 {
+ compatible = "rockchip,px30-vop-big";
+ reg = <0x00 0xff460000 0x00 0x1fc 0x00 0xff460a00 0x00 0x400>;
+ rockchip,grf = <0x2f>;
+ reg-names = "regs\0gamma_lut";
+ interrupts = <0x00 0x4d 0x04>;
+ clocks = <0x02 0xb5 0x02 0x96 0x02 0xfb>;
+ clock-names = "aclk_vop\0dclk_vop\0hclk_vop";
+ power-domains = <0x8a 0x0c>;
+ iommus = <0xa1>;
+ status = "okay";
+ phandle = <0x10f>;
+
+ port {
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+ phandle = <0x10>;
+
+ endpoint@0 {
+ reg = <0x00>;
+ remote-endpoint = <0xa2>;
+ phandle = <0x12>;
+ };
+
+ endpoint@1 {
+ reg = <0x01>;
+ remote-endpoint = <0xa3>;
+ phandle = <0x13>;
+ };
+
+ endpoint@2 {
+ reg = <0x02>;
+ remote-endpoint = <0xa4>;
+ phandle = <0x14>;
+ };
+ };
+ };
+
+ iommu@ff460f00 {
+ compatible = "rockchip,iommu";
+ reg = <0x00 0xff460f00 0x00 0x100>;
+ interrupts = <0x00 0x4d 0x04>;
+ interrupt-names = "vopb_mmu";
+ clocks = <0x02 0xb5 0x02 0xfb>;
+ clock-names = "aclk\0hclk";
+ power-domains = <0x8a 0x0c>;
+ #iommu-cells = <0x00>;
+ status = "okay";
+ phandle = <0xa1>;
+ };
+
+ rk_rga@ff480000 {
+ compatible = "rockchip,rga2";
+ reg = <0x00 0xff480000 0x00 0x1000>;
+ interrupts = <0x00 0x4c 0x04>;
+ clocks = <0x02 0xb7 0x02 0xfd 0x02 0x35>;
+ clock-names = "aclk_rga\0hclk_rga\0clk_rga";
+ power-domains = <0x8a 0x0c>;
+ dma-coherent;
+ status = "okay";
+ phandle = <0x110>;
+ };
+
+ cif@ff490000 {
+ compatible = "rockchip,cif";
+ reg = <0x00 0xff490000 0x00 0x200>;
+ interrupts = <0x00 0x45 0x04>;
+ clocks = <0x02 0xb3 0x02 0xf9 0x02 0x160 0x02 0x34>;
+ clock-names = "aclk_cif0\0hclk_cif0\0pclk_cif\0cif0_out";
+ resets = <0x02 0x2c 0x02 0x2d 0x02 0x2e>;
+ reset-names = "rst_cif_a\0rst_cif_h\0rst_cif_pclkin";
+ power-domains = <0x8a 0x0d>;
+ pinctrl-names = "cif_pin_all";
+ pinctrl-0 = <0xa5>;
+ iommus = <0xa6>;
+ status = "disabled";
+ phandle = <0x111>;
+ };
+
+ cif-new@ff490000 {
+ compatible = "rockchip,px30-cif";
+ reg = <0x00 0xff490000 0x00 0x200>;
+ interrupts = <0x00 0x45 0x04>;
+ clocks = <0x02 0xb3 0x02 0xf9 0x02 0x160 0x02 0x34>;
+ clock-names = "aclk_cif\0hclk_cif\0pclk_cif\0cif_out";
+ resets = <0x02 0x2c 0x02 0x2d 0x02 0x2e>;
+ reset-names = "rst_cif_a\0rst_cif_h\0rst_cif_pclkin";
+ power-domains = <0x8a 0x0d>;
+ iommus = <0xa6>;
+ status = "disabled";
+ phandle = <0x112>;
+ };
+
+ iommu@ff490800 {
+ compatible = "rockchip,iommu";
+ reg = <0x00 0xff490800 0x00 0x100>;
+ interrupts = <0x00 0x45 0x04>;
+ interrupt-names = "vip_mmu";
+ clocks = <0x02 0xb3 0x02 0xf9>;
+ clock-names = "aclk\0hclk";
+ power-domains = <0x8a 0x0d>;
+ rk_iommu,disable_reset_quirk;
+ #iommu-cells = <0x00>;
+ status = "okay";
+ phandle = <0xa6>;
+ };
+
+ rk_isp@ff4a0000 {
+ compatible = "rockchip,px30-isp\0rockchip,isp";
+ reg = <0x00 0xff4a0000 0x00 0x8000>;
+ interrupts = <0x00 0x46 0x04>;
+ clocks = <0x02 0xb4 0x02 0xfa 0x02 0x33 0x02 0x33 0x02 0x15f 0x02 0x34 0x02 0x34 0x02 0x146>;
+ clock-names = "aclk_isp\0hclk_isp\0clk_isp\0clk_isp_jpe\0pclkin_isp\0clk_cif_pll\0clk_cif_out\0pclk_dphyrx";
+ resets = <0x02 0x2b 0x02 0x2f>;
+ reset-names = "rst_isp\0rst_mipicsiphy";
+ power-domains = <0x8a 0x0d>;
+ pinctrl-names = "default\0isp_dvp8bit2\0isp_dvp10bit\0isp_dvp12bit";
+ pinctrl-0 = <0xa7>;
+ pinctrl-1 = <0xa5>;
+ pinctrl-2 = <0xa5 0xa8>;
+ pinctrl-3 = <0xa9 0xa5 0xa8>;
+ rockchip,isp,mipiphy = <0x01>;
+ rockchip,isp,csiphy,reg = <0xff2f0000 0x4000>;
+ rockchip,grf = <0x2f>;
+ rockchip,cru = <0x02>;
+ rockchip,isp,iommu-enable = <0x01>;
+ iommus = <0xaa>;
+ status = "disabled";
+ phandle = <0x113>;
+ };
+
+ rkisp1@ff4a0000 {
+ compatible = "rockchip,rk3326-rkisp1";
+ reg = <0x00 0xff4a0000 0x00 0x8000>;
+ interrupts = <0x00 0x46 0x04 0x00 0x49 0x04 0x00 0x4a 0x04>;
+ interrupt-names = "isp_irq\0mi_irq\0mipi_irq";
+ clocks = <0x02 0xb4 0x02 0xfa 0x02 0x33 0x02 0x15f>;
+ clock-names = "aclk_isp\0hclk_isp\0clk_isp\0pclk_isp";
+ devfreq = <0xab>;
+ power-domains = <0x8a 0x0d>;
+ iommus = <0xaa>;
+ rockchip,grf = <0x2f>;
+ status = "okay";
+ phandle = <0x114>;
+ };
+
+ iommu@ff4a8000 {
+ compatible = "rockchip,iommu";
+ reg = <0x00 0xff4a8000 0x00 0x100>;
+ interrupts = <0x00 0x46 0x04>;
+ interrupt-names = "isp_mmu";
+ clocks = <0x02 0xb4 0x02 0xfa>;
+ clock-names = "aclk\0hclk";
+ power-domains = <0x8a 0x0d>;
+ rk_iommu,disable_reset_quirk;
+ #iommu-cells = <0x00>;
+ status = "okay";
+ phandle = <0xaa>;
+ };
+
+ qos@ff518000 {
+ compatible = "syscon";
+ reg = <0x00 0xff518000 0x00 0x20>;
+ phandle = <0x18>;
+ };
+
+ qos@ff520000 {
+ compatible = "syscon";
+ reg = <0x00 0xff520000 0x00 0x20>;
+ phandle = <0x28>;
+ };
+
+ qos@ff52c000 {
+ compatible = "syscon";
+ reg = <0x00 0xff52c000 0x00 0x20>;
+ phandle = <0x17>;
+ };
+
+ qos@ff538000 {
+ compatible = "syscon";
+ reg = <0x00 0xff538000 0x00 0x20>;
+ phandle = <0x19>;
+ };
+
+ qos@ff538080 {
+ compatible = "syscon";
+ reg = <0x00 0xff538080 0x00 0x20>;
+ phandle = <0x1a>;
+ };
+
+ qos@ff538100 {
+ compatible = "syscon";
+ reg = <0x00 0xff538100 0x00 0x20>;
+ phandle = <0x1b>;
+ };
+
+ qos@ff538180 {
+ compatible = "syscon";
+ reg = <0x00 0xff538180 0x00 0x20>;
+ phandle = <0x1c>;
+ };
+
+ qos@ff540000 {
+ compatible = "syscon";
+ reg = <0x00 0xff540000 0x00 0x20>;
+ phandle = <0x15>;
+ };
+
+ qos@ff540080 {
+ compatible = "syscon";
+ reg = <0x00 0xff540080 0x00 0x20>;
+ phandle = <0x16>;
+ };
+
+ qos@ff548000 {
+ compatible = "syscon";
+ reg = <0x00 0xff548000 0x00 0x20>;
+ phandle = <0x23>;
+ };
+
+ qos@ff548080 {
+ compatible = "syscon";
+ reg = <0x00 0xff548080 0x00 0x20>;
+ phandle = <0x24>;
+ };
+
+ qos@ff548100 {
+ compatible = "syscon";
+ reg = <0x00 0xff548100 0x00 0x20>;
+ phandle = <0x25>;
+ };
+
+ qos@ff548180 {
+ compatible = "syscon";
+ reg = <0x00 0xff548180 0x00 0x20>;
+ phandle = <0x26>;
+ };
+
+ qos@ff548200 {
+ compatible = "syscon";
+ reg = <0x00 0xff548200 0x00 0x20>;
+ phandle = <0x27>;
+ };
+
+ qos@ff550000 {
+ compatible = "syscon";
+ reg = <0x00 0xff550000 0x00 0x20>;
+ phandle = <0x1f>;
+ };
+
+ qos@ff550080 {
+ compatible = "syscon";
+ reg = <0x00 0xff550080 0x00 0x20>;
+ phandle = <0x20>;
+ };
+
+ qos@ff550100 {
+ compatible = "syscon";
+ reg = <0x00 0xff550100 0x00 0x20>;
+ phandle = <0x21>;
+ };
+
+ qos@ff550180 {
+ compatible = "syscon";
+ reg = <0x00 0xff550180 0x00 0x20>;
+ phandle = <0x22>;
+ };
+
+ qos@ff558000 {
+ compatible = "syscon";
+ reg = <0x00 0xff558000 0x00 0x20>;
+ phandle = <0x1d>;
+ };
+
+ qos@ff558080 {
+ compatible = "syscon";
+ reg = <0x00 0xff558080 0x00 0x20>;
+ phandle = <0x1e>;
+ };
+
+ dfi@ff610000 {
+ reg = <0x00 0xff610000 0x00 0x400>;
+ compatible = "rockchip,px30-dfi";
+ rockchip,pmugrf = <0xac>;
+ status = "okay";
+ phandle = <0xad>;
+ };
+
+ dmc {
+ compatible = "rockchip,px30-dmc";
+ interrupts = <0x00 0x69 0x04>;
+ interrupt-names = "complete_irq";
+ devfreq-events = <0xad>;
+ clocks = <0x02 0x54>;
+ clock-names = "dmc_clk";
+ operating-points-v2 = <0xae>;
+ ddr_timing = <0xaf>;
+ upthreshold = <0x28>;
+ downdifferential = <0x14>;
+ system-status-freq = <0x01 0x80e80 0x08 0x6ddd0 0x02 0x2f5d0 0x20 0x6ddd0 0x1000 0x80e80 0x4000 0xa2990 0x2000 0xa2990>;
+ auto-min-freq = <0x50140>;
+ auto-freq-en = <0x01>;
+ #cooling-cells = <0x02>;
+ status = "okay";
+ center-supply = <0x0e>;
+ phandle = <0xab>;
+
+ ddr_power_model {
+ compatible = "ddr_power_model";
+ dynamic-power-coefficient = <0x78>;
+ static-power-coefficient = <0xc8>;
+ ts = <0x7d00 0x125c 0xffffffb0 0x02>;
+ thermal-zone = "soc-thermal";
+ phandle = <0x115>;
+ };
+ };
+
+ dmc-opp-table {
+ compatible = "operating-points-v2";
+ rockchip,max-volt = <0x118c30>;
+ rockchip,evb-irdrop = <0x61a8>;
+ rockchip,pvtm-voltage-sel = <0x00 0xc350 0x00 0xc351 0xd2f0 0x01 0xd2f1 0xea60 0x02 0xea61 0x1869f 0x03>;
+ rockchip,pvtm-ch = <0x00 0x00>;
+ phandle = <0xae>;
+
+ opp-528000000 {
+ opp-hz = <0x00 0x1f78a400>;
+ opp-microvolt = <0xee098>;
+ opp-microvolt-L0 = <0xee098>;
+ opp-microvolt-L1 = <0xee098>;
+ opp-microvolt-L2 = <0xe7ef0>;
+ opp-microvolt-L3 = <0xe7ef0>;
+ };
+
+ opp-666000000 {
+ opp-hz = <0x00 0x27b25a80>;
+ opp-microvolt = <0x100590>;
+ opp-microvolt-L0 = <0x100590>;
+ opp-microvolt-L1 = <0xf4240>;
+ opp-microvolt-L2 = <0xee098>;
+ opp-microvolt-L3 = <0xe7ef0>;
+ };
+
+ opp-786000000 {
+ opp-hz = <0x00 0x2ed96880>;
+ opp-microvolt = <0x10c8e0>;
+ opp-microvolt-L0 = <0x10c8e0>;
+ opp-microvolt-L1 = <0x100590>;
+ opp-microvolt-L2 = <0xfa3e8>;
+ opp-microvolt-L3 = <0xf4240>;
+ status = "okay";
+ };
+ };
+
+ rockchip-system-monitor {
+ compatible = "rockchip,system-monitor";
+ rockchip,thermal-zone = "soc-thermal";
+ rockchip,polling-delay = <0xc8>;
+ phandle = <0x116>;
+ };
+
+ pinctrl {
+ compatible = "rockchip,px30-pinctrl";
+ rockchip,grf = <0x2f>;
+ rockchip,pmu = <0xac>;
+ #address-cells = <0x02>;
+ #size-cells = <0x02>;
+ ranges;
+ phandle = <0x117>;
+
+ gpio0@ff040000 {
+ compatible = "rockchip,gpio-bank";
+ reg = <0x00 0xff040000 0x00 0x100>;
+ interrupts = <0x00 0x03 0x04>;
+ clocks = <0x2a 0x14>;
+ gpio-controller;
+ #gpio-cells = <0x02>;
+ interrupt-controller;
+ #interrupt-cells = <0x02>;
+ phandle = <0x5c>;
+ };
+
+ gpio1@ff250000 {
+ compatible = "rockchip,gpio-bank";
+ reg = <0x00 0xff250000 0x00 0x100>;
+ interrupts = <0x00 0x04 0x04>;
+ clocks = <0x02 0x15c>;
+ gpio-controller;
+ #gpio-cells = <0x02>;
+ interrupt-controller;
+ #interrupt-cells = <0x02>;
+ phandle = <0xbf>;
+ };
+
+ gpio2@ff260000 {
+ compatible = "rockchip,gpio-bank";
+ reg = <0x00 0xff260000 0x00 0x100>;
+ interrupts = <0x00 0x05 0x04>;
+ clocks = <0x02 0x15d>;
+ gpio-controller;
+ #gpio-cells = <0x02>;
+ interrupt-controller;
+ #interrupt-cells = <0x02>;
+ phandle = <0x66>;
+ };
+
+ gpio3@ff270000 {
+ compatible = "rockchip,gpio-bank";
+ reg = <0x00 0xff270000 0x00 0x100>;
+ interrupts = <0x00 0x06 0x04>;
+ clocks = <0x02 0x15e>;
+ gpio-controller;
+ #gpio-cells = <0x02>;
+ interrupt-controller;
+ #interrupt-cells = <0x02>;
+ phandle = <0x97>;
+ };
+
+ pcfg-pull-up {
+ bias-pull-up;
+ phandle = <0xb2>;
+ };
+
+ pcfg-pull-down {
+ bias-pull-down;
+ phandle = <0x118>;
+ };
+
+ pcfg-pull-none {
+ bias-disable;
+ phandle = <0xb1>;
+ };
+
+ pcfg-pull-none-2ma {
+ bias-disable;
+ drive-strength = <0x02>;
+ phandle = <0x119>;
+ };
+
+ pcfg-pull-up-2ma {
+ bias-pull-up;
+ drive-strength = <0x02>;
+ phandle = <0x11a>;
+ };
+
+ pcfg-pull-up-4ma {
+ bias-pull-up;
+ drive-strength = <0x04>;
+ phandle = <0xb3>;
+ };
+
+ pcfg-pull-none-4ma {
+ bias-disable;
+ drive-strength = <0x04>;
+ phandle = <0x11b>;
+ };
+
+ pcfg-pull-down-4ma {
+ bias-pull-down;
+ drive-strength = <0x04>;
+ phandle = <0x11c>;
+ };
+
+ pcfg-pull-none-8ma {
+ bias-disable;
+ drive-strength = <0x08>;
+ phandle = <0xb6>;
+ };
+
+ pcfg-pull-up-8ma {
+ bias-pull-up;
+ drive-strength = <0x08>;
+ phandle = <0xb4>;
+ };
+
+ pcfg-pull-none-12ma {
+ bias-disable;
+ drive-strength = <0x0c>;
+ phandle = <0xb8>;
+ };
+
+ pcfg-pull-up-12ma {
+ bias-pull-up;
+ drive-strength = <0x0c>;
+ phandle = <0xb7>;
+ };
+
+ pcfg-pull-none-smt {
+ bias-disable;
+ input-schmitt-enable;
+ phandle = <0xb0>;
+ };
+
+ pcfg-output-high {
+ output-high;
+ phandle = <0x11d>;
+ };
+
+ pcfg-output-low {
+ output-low;
+ phandle = <0xb9>;
+ };
+
+ pcfg-input-high {
+ bias-pull-up;
+ input-enable;
+ phandle = <0xb5>;
+ };
+
+ pcfg-input {
+ input-enable;
+ phandle = <0x11e>;
+ };
+
+ i2c0 {
+
+ i2c0-xfer {
+ rockchip,pins = <0x00 0x08 0x01 0xb0 0x00 0x09 0x01 0xb0>;
+ phandle = <0x5b>;
+ };
+ };
+
+ i2c1 {
+
+ i2c1-xfer {
+ rockchip,pins = <0x00 0x12 0x01 0xb0 0x00 0x13 0x01 0xb0>;
+ phandle = <0x69>;
+ };
+ };
+
+ i2c2 {
+
+ i2c2-xfer {
+ rockchip,pins = <0x02 0x0f 0x02 0xb0 0x02 0x10 0x02 0xb0>;
+ phandle = <0x6a>;
+ };
+ };
+
+ i2c3 {
+
+ i2c3-xfer {
+ rockchip,pins = <0x01 0x0c 0x04 0xb0 0x01 0x0d 0x04 0xb0>;
+ phandle = <0x6b>;
+ };
+ };
+
+ tsadc {
+
+ tsadc-otp-gpio {
+ rockchip,pins = <0x00 0x06 0x00 0xb1>;
+ phandle = <0x86>;
+ };
+
+ tsadc-otp-out {
+ rockchip,pins = <0x00 0x06 0x01 0xb1>;
+ phandle = <0x87>;
+ };
+ };
+
+ uart0 {
+
+ uart0-xfer {
+ rockchip,pins = <0x00 0x0a 0x01 0xb2 0x00 0x0b 0x01 0xb2>;
+ phandle = <0x2c>;
+ };
+
+ uart0-cts {
+ rockchip,pins = <0x00 0x0c 0x01 0xb1>;
+ phandle = <0x2d>;
+ };
+
+ uart0-rts {
+ rockchip,pins = <0x00 0x0d 0x01 0xb1>;
+ phandle = <0x2e>;
+ };
+
+ uart0-rts-gpio {
+ rockchip,pins = <0x00 0x0d 0x00 0xb1>;
+ phandle = <0x11f>;
+ };
+ };
+
+ uart1 {
+
+ uart1-xfer {
+ rockchip,pins = <0x01 0x11 0x01 0xb2 0x01 0x10 0x01 0xb2>;
+ phandle = <0x4f>;
+ };
+
+ uart1-cts {
+ rockchip,pins = <0x01 0x12 0x01 0xb1>;
+ phandle = <0x50>;
+ };
+
+ uart1-rts {
+ rockchip,pins = <0x01 0x13 0x01 0xb1>;
+ phandle = <0x120>;
+ };
+
+ uart1-rts-gpio {
+ rockchip,pins = <0x01 0x13 0x00 0xb1>;
+ phandle = <0x121>;
+ };
+ };
+
+ uart2-m0 {
+
+ uart2m0-xfer {
+ rockchip,pins = <0x01 0x1a 0x02 0xb2 0x01 0x1b 0x02 0xb2>;
+ phandle = <0x51>;
+ };
+ };
+
+ uart2-m1 {
+
+ uart2m1-xfer {
+ rockchip,pins = <0x02 0x0c 0x02 0xb2 0x02 0x0e 0x02 0xb2>;
+ phandle = <0xba>;
+ };
+ };
+
+ uart3-m0 {
+
+ uart3m0-xfer {
+ rockchip,pins = <0x00 0x10 0x02 0xb2 0x00 0x11 0x02 0xb2>;
+ phandle = <0x122>;
+ };
+
+ uart3m0-cts {
+ rockchip,pins = <0x00 0x12 0x02 0xb1>;
+ phandle = <0x123>;
+ };
+
+ uart3m0-rts {
+ rockchip,pins = <0x00 0x13 0x02 0xb1>;
+ phandle = <0x124>;
+ };
+
+ uart3m0-rts-gpio {
+ rockchip,pins = <0x00 0x13 0x00 0xb1>;
+ phandle = <0x125>;
+ };
+ };
+
+ uart3-m1 {
+
+ uart3m1-xfer {
+ rockchip,pins = <0x01 0x0e 0x02 0xb2 0x01 0x0f 0x02 0xb2>;
+ phandle = <0x52>;
+ };
+
+ uart3m1-cts {
+ rockchip,pins = <0x01 0x0c 0x02 0xb1>;
+ phandle = <0x53>;
+ };
+
+ uart3m1-rts {
+ rockchip,pins = <0x01 0x0d 0x02 0xb1>;
+ phandle = <0x54>;
+ };
+
+ uart3m1-rts-gpio {
+ rockchip,pins = <0x01 0x0d 0x00 0xb1>;
+ phandle = <0x126>;
+ };
+ };
+
+ uart4 {
+
+ uart4-xfer {
+ rockchip,pins = <0x01 0x1c 0x02 0xb2 0x01 0x1d 0x02 0xb2>;
+ phandle = <0x55>;
+ };
+
+ uart4-cts {
+ rockchip,pins = <0x01 0x1e 0x02 0xb1>;
+ phandle = <0x56>;
+ };
+
+ uart4-rts {
+ rockchip,pins = <0x01 0x1f 0x02 0xb1>;
+ phandle = <0x57>;
+ };
+ };
+
+ uart5 {
+
+ uart5-xfer {
+ rockchip,pins = <0x03 0x02 0x04 0xb2 0x03 0x01 0x04 0xb2>;
+ phandle = <0x58>;
+ };
+
+ uart5-cts {
+ rockchip,pins = <0x03 0x03 0x04 0xb1>;
+ phandle = <0x59>;
+ };
+
+ uart5-rts {
+ rockchip,pins = <0x03 0x05 0x04 0xb1>;
+ phandle = <0x5a>;
+ };
+ };
+
+ spi0 {
+
+ spi0-clk {
+ rockchip,pins = <0x01 0x0f 0x03 0xb3>;
+ phandle = <0x6c>;
+ };
+
+ spi0-csn {
+ rockchip,pins = <0x01 0x0e 0x03 0xb3>;
+ phandle = <0x6d>;
+ };
+
+ spi0-miso {
+ rockchip,pins = <0x01 0x0d 0x03 0xb3>;
+ phandle = <0x6e>;
+ };
+
+ spi0-mosi {
+ rockchip,pins = <0x01 0x0c 0x03 0xb3>;
+ phandle = <0x6f>;
+ };
+
+ spi0-clk-hs {
+ rockchip,pins = <0x01 0x0f 0x03 0xb4>;
+ phandle = <0x70>;
+ };
+
+ spi0-miso-hs {
+ rockchip,pins = <0x01 0x0d 0x03 0xb4>;
+ phandle = <0x71>;
+ };
+
+ spi0-mosi-hs {
+ rockchip,pins = <0x01 0x0c 0x03 0xb4>;
+ phandle = <0x72>;
+ };
+ };
+
+ spi1 {
+
+ spi1-clk {
+ rockchip,pins = <0x03 0x0f 0x04 0xb3>;
+ phandle = <0x73>;
+ };
+
+ spi1-csn0 {
+ rockchip,pins = <0x03 0x09 0x04 0xb3>;
+ phandle = <0x74>;
+ };
+
+ spi1-csn1 {
+ rockchip,pins = <0x03 0x0a 0x02 0xb3>;
+ phandle = <0x75>;
+ };
+
+ spi1-miso {
+ rockchip,pins = <0x03 0x0e 0x04 0xb3>;
+ phandle = <0x76>;
+ };
+
+ spi1-mosi {
+ rockchip,pins = <0x03 0x0c 0x04 0xb3>;
+ phandle = <0x77>;
+ };
+
+ spi1-clk-hs {
+ rockchip,pins = <0x03 0x0f 0x04 0xb4>;
+ phandle = <0x78>;
+ };
+
+ spi1-miso-hs {
+ rockchip,pins = <0x03 0x0e 0x04 0xb4>;
+ phandle = <0x79>;
+ };
+
+ spi1-mosi-hs {
+ rockchip,pins = <0x03 0x0c 0x04 0xb4>;
+ phandle = <0x7a>;
+ };
+ };
+
+ pdm {
+
+ pdm-clk0m0 {
+ rockchip,pins = <0x03 0x16 0x02 0xb1>;
+ phandle = <0x44>;
+ };
+
+ pdm-clk0m1 {
+ rockchip,pins = <0x02 0x16 0x01 0xb1>;
+ phandle = <0x127>;
+ };
+
+ pdm-clk1 {
+ rockchip,pins = <0x03 0x17 0x02 0xb1>;
+ phandle = <0x45>;
+ };
+
+ pdm-sdi0m0 {
+ rockchip,pins = <0x03 0x1b 0x02 0xb1>;
+ phandle = <0x46>;
+ };
+
+ pdm-sdi0m1 {
+ rockchip,pins = <0x02 0x15 0x02 0xb1>;
+ phandle = <0x128>;
+ };
+
+ pdm-sdi1 {
+ rockchip,pins = <0x03 0x18 0x02 0xb1>;
+ phandle = <0x47>;
+ };
+
+ pdm-sdi2 {
+ rockchip,pins = <0x03 0x19 0x02 0xb1>;
+ phandle = <0x48>;
+ };
+
+ pdm-sdi3 {
+ rockchip,pins = <0x03 0x1a 0x02 0xb1>;
+ phandle = <0x49>;
+ };
+
+ pdm-clk0m0-sleep {
+ rockchip,pins = <0x03 0x16 0x00 0xb5>;
+ phandle = <0x129>;
+ };
+
+ pdm-clk0m1-sleep {
+ rockchip,pins = <0x02 0x16 0x00 0xb5>;
+ phandle = <0x12a>;
+ };
+
+ pdm-clk1-sleep {
+ rockchip,pins = <0x03 0x17 0x00 0xb5>;
+ phandle = <0x12b>;
+ };
+
+ pdm-sdi0m0-sleep {
+ rockchip,pins = <0x03 0x1b 0x00 0xb5>;
+ phandle = <0x12c>;
+ };
+
+ pdm-sdi0m1-sleep {
+ rockchip,pins = <0x02 0x15 0x00 0xb5>;
+ phandle = <0x12d>;
+ };
+
+ pdm-sdi1-sleep {
+ rockchip,pins = <0x03 0x18 0x00 0xb5>;
+ phandle = <0x12e>;
+ };
+
+ pdm-sdi2-sleep {
+ rockchip,pins = <0x03 0x19 0x00 0xb5>;
+ phandle = <0x12f>;
+ };
+
+ pdm-sdi3-sleep {
+ rockchip,pins = <0x03 0x1a 0x00 0xb5>;
+ phandle = <0x130>;
+ };
+ };
+
+ i2s0 {
+
+ i2s0-8ch-mclk {
+ rockchip,pins = <0x03 0x11 0x02 0xb1>;
+ phandle = <0x131>;
+ };
+
+ i2s0-8ch-sclktx {
+ rockchip,pins = <0x03 0x13 0x02 0xb1>;
+ phandle = <0x30>;
+ };
+
+ i2s0-8ch-sclkrx {
+ rockchip,pins = <0x03 0x0c 0x02 0xb1>;
+ phandle = <0x31>;
+ };
+
+ i2s0-8ch-lrcktx {
+ rockchip,pins = <0x03 0x12 0x02 0xb1>;
+ phandle = <0x32>;
+ };
+
+ i2s0-8ch-lrckrx {
+ rockchip,pins = <0x03 0x0d 0x02 0xb1>;
+ phandle = <0x33>;
+ };
+
+ i2s0-8ch-sdo0 {
+ rockchip,pins = <0x03 0x14 0x02 0xb1>;
+ phandle = <0x38>;
+ };
+
+ i2s0-8ch-sdo1 {
+ rockchip,pins = <0x03 0x10 0x02 0xb1>;
+ phandle = <0x39>;
+ };
+
+ i2s0-8ch-sdo2 {
+ rockchip,pins = <0x03 0x0f 0x02 0xb1>;
+ phandle = <0x3a>;
+ };
+
+ i2s0-8ch-sdo3 {
+ rockchip,pins = <0x03 0x0e 0x02 0xb1>;
+ phandle = <0x3b>;
+ };
+
+ i2s0-8ch-sdi0 {
+ rockchip,pins = <0x03 0x15 0x02 0xb1>;
+ phandle = <0x34>;
+ };
+
+ i2s0-8ch-sdi1 {
+ rockchip,pins = <0x03 0x0b 0x02 0xb1>;
+ phandle = <0x35>;
+ };
+
+ i2s0-8ch-sdi2 {
+ rockchip,pins = <0x03 0x09 0x02 0xb1>;
+ phandle = <0x36>;
+ };
+
+ i2s0-8ch-sdi3 {
+ rockchip,pins = <0x03 0x08 0x02 0xb1>;
+ phandle = <0x37>;
+ };
+ };
+
+ i2s1 {
+
+ i2s1-2ch-mclk {
+ rockchip,pins = <0x02 0x13 0x01 0xb1>;
+ phandle = <0x68>;
+ };
+
+ i2s1-2ch-sclk {
+ rockchip,pins = <0x02 0x12 0x01 0xb1>;
+ phandle = <0x3c>;
+ };
+
+ i2s1-2ch-lrck {
+ rockchip,pins = <0x02 0x11 0x01 0xb1>;
+ phandle = <0x3d>;
+ };
+
+ i2s1-2ch-sdi {
+ rockchip,pins = <0x02 0x15 0x01 0xb1>;
+ phandle = <0x3e>;
+ };
+
+ i2s1-2ch-sdo {
+ rockchip,pins = <0x02 0x14 0x01 0xb1>;
+ phandle = <0x3f>;
+ };
+ };
+
+ i2s2 {
+
+ i2s2-2ch-mclk {
+ rockchip,pins = <0x03 0x01 0x02 0xb1>;
+ phandle = <0x132>;
+ };
+
+ i2s2-2ch-sclk {
+ rockchip,pins = <0x03 0x02 0x02 0xb1>;
+ phandle = <0x40>;
+ };
+
+ i2s2-2ch-lrck {
+ rockchip,pins = <0x03 0x03 0x02 0xb1>;
+ phandle = <0x41>;
+ };
+
+ i2s2-2ch-sdi {
+ rockchip,pins = <0x03 0x05 0x02 0xb1>;
+ phandle = <0x42>;
+ };
+
+ i2s2-2ch-sdo {
+ rockchip,pins = <0x03 0x07 0x02 0xb1>;
+ phandle = <0x43>;
+ };
+ };
+
+ sdmmc {
+
+ sdmmc-clk {
+ rockchip,pins = <0x01 0x1e 0x01 0xb6>;
+ phandle = <0x8f>;
+ };
+
+ sdmmc-cmd {
+ rockchip,pins = <0x01 0x1f 0x01 0xb4>;
+ phandle = <0x90>;
+ };
+
+ sdmmc-det {
+ rockchip,pins = <0x00 0x03 0x01 0xb4>;
+ phandle = <0x91>;
+ };
+
+ sdmmc-bus1 {
+ rockchip,pins = <0x01 0x1a 0x01 0xb4>;
+ phandle = <0x133>;
+ };
+
+ sdmmc-bus4 {
+ rockchip,pins = <0x01 0x1a 0x01 0xb4 0x01 0x1b 0x01 0xb4 0x01 0x1c 0x01 0xb4 0x01 0x1d 0x01 0xb4>;
+ phandle = <0x92>;
+ };
+
+ sdmmc-gpio {
+ rockchip,pins = <0x01 0x1a 0x00 0xb3 0x01 0x1b 0x00 0xb3 0x01 0x1c 0x00 0xb3 0x01 0x1d 0x00 0xb3 0x01 0x1e 0x00 0xb3 0x01 0x1f 0x00 0xb3>;
+ phandle = <0x134>;
+ };
+ };
+
+ sdio {
+
+ sdio-clk {
+ rockchip,pins = <0x01 0x15 0x01 0xb1>;
+ phandle = <0x96>;
+ };
+
+ sdio-cmd {
+ rockchip,pins = <0x01 0x14 0x01 0xb2>;
+ phandle = <0x95>;
+ };
+
+ sdio-bus4 {
+ rockchip,pins = <0x01 0x16 0x01 0xb2 0x01 0x17 0x01 0xb2 0x01 0x18 0x01 0xb2 0x01 0x19 0x01 0xb2>;
+ phandle = <0x94>;
+ };
+
+ sdio-gpio {
+ rockchip,pins = <0x01 0x16 0x00 0xb2 0x01 0x17 0x00 0xb2 0x01 0x18 0x00 0xb2 0x01 0x19 0x00 0xb2 0x01 0x14 0x00 0xb2 0x01 0x15 0x00 0xb2>;
+ phandle = <0x135>;
+ };
+ };
+
+ emmc {
+
+ emmc-clk {
+ rockchip,pins = <0x01 0x09 0x02 0xb6>;
+ phandle = <0x136>;
+ };
+
+ emmc-cmd {
+ rockchip,pins = <0x01 0x0a 0x02 0xb4>;
+ phandle = <0x137>;
+ };
+
+ emmc-pwren {
+ rockchip,pins = <0x01 0x08 0x02 0xb1>;
+ phandle = <0x138>;
+ };
+
+ emmc-rstnout {
+ rockchip,pins = <0x01 0x0b 0x02 0xb1>;
+ phandle = <0x139>;
+ };
+
+ emmc-bus1 {
+ rockchip,pins = <0x01 0x00 0x02 0xb4>;
+ phandle = <0x13a>;
+ };
+
+ emmc-bus4 {
+ rockchip,pins = <0x01 0x00 0x02 0xb4 0x01 0x01 0x02 0xb4 0x01 0x02 0x02 0xb4 0x01 0x03 0x02 0xb4>;
+ phandle = <0x13b>;
+ };
+
+ emmc-bus8 {
+ rockchip,pins = <0x01 0x00 0x02 0xb4 0x01 0x01 0x02 0xb4 0x01 0x02 0x02 0xb4 0x01 0x03 0x02 0xb4 0x01 0x04 0x02 0xb4 0x01 0x05 0x02 0xb4 0x01 0x06 0x02 0xb4 0x01 0x07 0x02 0xb4>;
+ phandle = <0x13c>;
+ };
+ };
+
+ flash {
+
+ flash-cs0 {
+ rockchip,pins = <0x01 0x08 0x01 0xb1>;
+ phandle = <0x13d>;
+ };
+
+ flash-rdy {
+ rockchip,pins = <0x01 0x09 0x01 0xb1>;
+ phandle = <0x13e>;
+ };
+
+ flash-dqs {
+ rockchip,pins = <0x01 0x0a 0x01 0xb1>;
+ phandle = <0x13f>;
+ };
+
+ flash-ale {
+ rockchip,pins = <0x01 0x0b 0x01 0xb1>;
+ phandle = <0x140>;
+ };
+
+ flash-cle {
+ rockchip,pins = <0x01 0x0c 0x01 0xb1>;
+ phandle = <0x141>;
+ };
+
+ flash-wrn {
+ rockchip,pins = <0x01 0x0d 0x01 0xb1>;
+ phandle = <0x142>;
+ };
+
+ flash-csl {
+ rockchip,pins = <0x01 0x0e 0x01 0xb1>;
+ phandle = <0x143>;
+ };
+
+ flash-rdn {
+ rockchip,pins = <0x01 0x0f 0x01 0xb1>;
+ phandle = <0x144>;
+ };
+
+ flash-bus8 {
+ rockchip,pins = <0x01 0x00 0x01 0xb7 0x01 0x01 0x01 0xb7 0x01 0x02 0x01 0xb7 0x01 0x03 0x01 0xb7 0x01 0x04 0x01 0xb7 0x01 0x05 0x01 0xb7 0x01 0x06 0x01 0xb7 0x01 0x07 0x01 0xb7>;
+ phandle = <0x145>;
+ };
+ };
+
+ lcdc {
+
+ lcdc-m0-rgb-pins {
+ rockchip,pins = <0x03 0x00 0x01 0xb6 0x03 0x01 0x01 0xb6 0x03 0x02 0x01 0xb6 0x03 0x03 0x01 0xb6 0x03 0x04 0x01 0xb6 0x03 0x05 0x01 0xb6 0x03 0x06 0x01 0xb6 0x03 0x07 0x01 0xb6 0x03 0x08 0x01 0xb6 0x03 0x09 0x01 0xb6 0x03 0x0a 0x01 0xb6 0x03 0x0b 0x01 0xb6 0x03 0x0c 0x01 0xb6 0x03 0x0d 0x01 0xb6 0x03 0x0e 0x01 0xb6 0x03 0x0f 0x01 0xb6 0x03 0x10 0x01 0xb6 0x03 0x11 0x01 0xb6 0x03 0x12 0x01 0xb6 0x03 0x13 0x01 0xb6 0x03 0x14 0x01 0xb6 0x03 0x15 0x01 0xb6 0x03 0x16 0x01 0xb6 0x03 0x17 0x01 0xb6 0x03 0x18 0x01 0xb6 0x03 0x19 0x01 0xb6 0x03 0x1a 0x01 0xb6 0x03 0x1b 0x01 0xb6>;
+ phandle = <0x146>;
+ };
+
+ lcdc-m0-sleep-pins {
+ rockchip,pins = <0x03 0x00 0x00 0xb1 0x03 0x01 0x00 0xb1 0x03 0x02 0x00 0xb1 0x03 0x03 0x00 0xb1 0x03 0x04 0x00 0xb1 0x03 0x05 0x00 0xb1 0x03 0x06 0x00 0xb1 0x03 0x07 0x00 0xb1 0x03 0x08 0x00 0xb1 0x03 0x09 0x00 0xb1 0x03 0x0a 0x00 0xb1 0x03 0x0b 0x00 0xb1 0x03 0x0c 0x00 0xb1 0x03 0x0d 0x00 0xb1 0x03 0x0e 0x00 0xb1 0x03 0x0f 0x00 0xb1 0x03 0x10 0x00 0xb1 0x03 0x11 0x00 0xb1 0x03 0x12 0x00 0xb1 0x03 0x13 0x00 0xb1 0x03 0x14 0x00 0xb1 0x03 0x15 0x00 0xb1 0x03 0x16 0x00 0xb1 0x03 0x17 0x00 0xb1 0x03 0x18 0x00 0xb1 0x03 0x19 0x00 0xb1 0x03 0x1a 0x00 0xb1 0x03 0x1b 0x00 0xb1>;
+ phandle = <0x147>;
+ };
+
+ lcdc-m1-rgb-pins {
+ rockchip,pins = <0x03 0x00 0x01 0xb6 0x03 0x04 0x01 0xb6 0x03 0x06 0x01 0xb6 0x03 0x0a 0x01 0xb6 0x03 0x0b 0x01 0xb6 0x03 0x0d 0x01 0xb6 0x03 0x10 0x01 0xb6 0x03 0x11 0x01 0xb6 0x03 0x12 0x01 0xb6 0x03 0x13 0x01 0xb6 0x03 0x14 0x01 0xb6 0x03 0x15 0x01 0xb6 0x03 0x16 0x01 0xb6 0x03 0x17 0x01 0xb6 0x03 0x18 0x01 0xb6 0x03 0x19 0x01 0xb6 0x03 0x1a 0x01 0xb6 0x03 0x1b 0x01 0xb6>;
+ phandle = <0x4d>;
+ };
+
+ lcdc-m1-sleep-pins {
+ rockchip,pins = <0x03 0x00 0x00 0xb1 0x03 0x04 0x00 0xb1 0x03 0x06 0x00 0xb1 0x03 0x0a 0x00 0xb1 0x03 0x0b 0x00 0xb1 0x03 0x0d 0x00 0xb1 0x03 0x10 0x00 0xb1 0x03 0x11 0x00 0xb1 0x03 0x12 0x00 0xb1 0x03 0x13 0x00 0xb1 0x03 0x14 0x00 0xb1 0x03 0x15 0x00 0xb1 0x03 0x16 0x00 0xb1 0x03 0x17 0x00 0xb1 0x03 0x18 0x00 0xb1 0x03 0x19 0x00 0xb1 0x03 0x1a 0x00 0xb1 0x03 0x1b 0x00 0xb1>;
+ phandle = <0x4e>;
+ };
+ };
+
+ pwm0 {
+
+ pwm0-pin {
+ rockchip,pins = <0x00 0x0f 0x01 0xb1>;
+ phandle = <0x7b>;
+ };
+ };
+
+ pwm1 {
+
+ pwm1-pin {
+ rockchip,pins = <0x00 0x10 0x01 0xb1>;
+ phandle = <0x7c>;
+ };
+ };
+
+ pwm2 {
+
+ pwm2-pin {
+ rockchip,pins = <0x02 0x0d 0x01 0xb1>;
+ phandle = <0x7d>;
+ };
+ };
+
+ pwm3 {
+
+ pwm3-pin {
+ rockchip,pins = <0x00 0x11 0x01 0xb1>;
+ phandle = <0x7e>;
+ };
+ };
+
+ pwm4 {
+
+ pwm4-pin {
+ rockchip,pins = <0x03 0x12 0x03 0xb1>;
+ phandle = <0x7f>;
+ };
+ };
+
+ pwm5 {
+
+ pwm5-pin {
+ rockchip,pins = <0x03 0x13 0x03 0xb1>;
+ phandle = <0x80>;
+ };
+ };
+
+ pwm6 {
+
+ pwm6-pin {
+ rockchip,pins = <0x03 0x14 0x03 0xb1>;
+ phandle = <0x81>;
+ };
+ };
+
+ pwm7 {
+
+ pwm7-pin {
+ rockchip,pins = <0x03 0x15 0x03 0xb1>;
+ phandle = <0x82>;
+ };
+ };
+
+ gmac {
+
+ rmii-pins {
+ rockchip,pins = <0x02 0x00 0x02 0xb8 0x02 0x01 0x02 0xb8 0x02 0x02 0x02 0xb8 0x02 0x03 0x02 0xb1 0x02 0x04 0x02 0xb1 0x02 0x05 0x02 0xb1 0x02 0x06 0x02 0xb1 0x02 0x07 0x02 0xb1 0x02 0x09 0x02 0xb1>;
+ phandle = <0x8d>;
+ };
+
+ mac-refclk-12ma {
+ rockchip,pins = <0x02 0x0a 0x02 0xb8>;
+ phandle = <0x8e>;
+ };
+
+ mac-refclk {
+ rockchip,pins = <0x02 0x0a 0x02 0xb1>;
+ phandle = <0x148>;
+ };
+ };
+
+ cif-m0 {
+
+ cif-clkout-m0 {
+ rockchip,pins = <0x02 0x0b 0x01 0xb8>;
+ phandle = <0xa7>;
+ };
+
+ dvp-d2d9-m0 {
+ rockchip,pins = <0x02 0x00 0x01 0xb1 0x02 0x01 0x01 0xb1 0x02 0x02 0x01 0xb1 0x02 0x03 0x01 0xb1 0x02 0x04 0x01 0xb1 0x02 0x05 0x01 0xb1 0x02 0x06 0x01 0xb1 0x02 0x07 0x01 0xb1 0x02 0x08 0x01 0xb1 0x02 0x09 0x01 0xb1 0x02 0x0a 0x01 0xb1 0x02 0x0b 0x01 0xb1>;
+ phandle = <0xa5>;
+ };
+
+ dvp-d0d1-m0 {
+ rockchip,pins = <0x02 0x0c 0x01 0xb1 0x02 0x0e 0x01 0xb1>;
+ phandle = <0xa9>;
+ };
+
+ d10-d11-m0 {
+ rockchip,pins = <0x02 0x0f 0x01 0xb1 0x02 0x10 0x01 0xb1>;
+ phandle = <0xa8>;
+ };
+ };
+
+ cif-m1 {
+
+ cif-clkout-m1 {
+ rockchip,pins = <0x03 0x18 0x03 0xb1>;
+ phandle = <0x149>;
+ };
+
+ dvp-d2d9-m1 {
+ rockchip,pins = <0x03 0x03 0x03 0xb1 0x03 0x05 0x03 0xb1 0x03 0x07 0x03 0xb1 0x03 0x08 0x03 0xb1 0x03 0x09 0x03 0xb1 0x03 0x0c 0x03 0xb1 0x03 0x0e 0x03 0xb1 0x03 0x0f 0x03 0xb1 0x03 0x19 0x03 0xb1 0x03 0x1a 0x03 0xb1 0x03 0x1b 0x03 0xb1 0x03 0x18 0x03 0xb1>;
+ phandle = <0x14a>;
+ };
+
+ dvp-d0d1-m1 {
+ rockchip,pins = <0x03 0x01 0x03 0xb1 0x03 0x02 0x03 0xb1>;
+ phandle = <0x14b>;
+ };
+
+ d10-d11-m1 {
+ rockchip,pins = <0x03 0x16 0x03 0xb1 0x03 0x17 0x03 0xb1>;
+ phandle = <0x14c>;
+ };
+ };
+
+ isp {
+
+ isp-prelight {
+ rockchip,pins = <0x03 0x19 0x04 0xb1>;
+ phandle = <0x14d>;
+ };
+ };
+
+ pmic {
+
+ pmic_int {
+ rockchip,pins = <0x00 0x0a 0x00 0xb2 0x00 0x0b 0x00 0xb1>;
+ phandle = <0x5d>;
+ };
+
+ soc_slppin_gpio {
+ rockchip,pins = <0x00 0x04 0x00 0xb9>;
+ phandle = <0x60>;
+ };
+
+ soc_slppin_slp {
+ rockchip,pins = <0x00 0x04 0x01 0xb1>;
+ phandle = <0x5e>;
+ };
+
+ soc_slppin_rst {
+ rockchip,pins = <0x00 0x04 0x02 0xb1>;
+ phandle = <0x62>;
+ };
+ };
+
+ leds {
+
+ led-pins {
+ rockchip,pins = <0x00 0x11 0x00 0xb1>;
+ phandle = <0xc0>;
+ };
+ };
+
+ btns {
+
+ btn-pins {
+ rockchip,pins = <0x01 0x0c 0x00 0xb2 0x01 0x0d 0x00 0xb2 0x01 0x0e 0x00 0xb2 0x01 0x0f 0x00 0xb2 0x01 0x02 0x00 0xb2 0x01 0x05 0x00 0xb2 0x01 0x06 0x00 0xb2 0x01 0x07 0x00 0xb2 0x02 0x00 0x00 0xb2 0x02 0x01 0x00 0xb2 0x02 0x02 0x00 0xb2 0x02 0x03 0x00 0xb2 0x02 0x04 0x00 0xb2 0x02 0x05 0x00 0xb2 0x02 0x06 0x00 0xb2 0x02 0x07 0x00 0xb2 0x03 0x09 0x00 0xb2 0x03 0x0a 0x00 0xb2 0x03 0x0c 0x00 0xb2 0x03 0x0f 0x00 0xb2>;
+ phandle = <0xbd>;
+ };
+ };
+ };
+
+ chosen {
+ bootargs = [00];
+ };
+
+ fiq-debugger {
+ compatible = "rockchip,fiq-debugger";
+ rockchip,serial-id = <0x02>;
+ rockchip,wake-irq = <0x00>;
+ rockchip,irq-mode-enable = <0x00>;
+ rockchip,baudrate = <0x1c200>;
+ interrupts = <0x00 0x7f 0x08>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0xba>;
+ status = "okay";
+ };
+
+ ramoops {
+ compatible = "ramoops";
+ record-size = <0x00 0x20000>;
+ console-size = <0x00 0x80000>;
+ ftrace-size = <0x00 0x00>;
+ pmsg-size = <0x00 0x00>;
+ memory-region = <0xbb>;
+ };
+
+ reserved-memory {
+ #address-cells = <0x02>;
+ #size-cells = <0x02>;
+ ranges;
+
+ drm-logo@00000000 {
+ compatible = "rockchip,drm-logo";
+ reg = <0x00 0x00 0x00 0x00>;
+ phandle = <0x11>;
+ };
+
+ region@110000 {
+ reg = <0x00 0x110000 0x00 0xf0000>;
+ reg-names = "ramoops_mem";
+ phandle = <0xbb>;
+ };
+ };
+
+ odroidgo3-keys {
+ compatible = "gpio-keys";
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+ autorepeat;
+ phandle = <0x14e>;
+
+ button@0 {
+ label = "GPIO BTN-VOLUP";
+ linux,code = <0x73>;
+ gpios = <0x66 0x00 0x01>;
+ };
+
+ button@1 {
+ label = "GPIO BTN-VOLDN";
+ linux,code = <0x72>;
+ gpios = <0x66 0x01 0x01>;
+ };
+ };
+
+ odroidgo3-joypad {
+ compatible = "odroidgo3-joypad";
+ pwms = <0xbc 0x00 0xbebc200 0x00>;
+ pwm-names = "enable";
+ rumble-boost-weak = <0x00>;
+ rumble-boost-strong = <0x00>;
+ joypad-name = "GO-Super Gamepad";
+ joypad-product = <0x1100>;
+ joypad-revision = <0x100>;
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <0xbd>;
+ pinctrl-1 = <0x7b>;
+ io-channel-names = "amux_adc";
+ io-channels = <0xbe 0x01>;
+ amux-count = <0x04>;
+ amux-a-gpios = <0x97 0x0b 0x01>;
+ amux-b-gpios = <0x97 0x08 0x01>;
+ amux-en-gpios = <0x97 0x0d 0x01>;
+ button-adc-scale = <0x02>;
+ button-adc-deadzone = <0x40>;
+ button-adc-fuzz = <0x20>;
+ button-adc-flat = <0x20>;
+ abs_x-p-tuning = <0xc8>;
+ abs_x-n-tuning = <0xc8>;
+ abs_y-p-tuning = <0xc8>;
+ abs_y-n-tuning = <0xc8>;
+ abs_rx-p-tuning = <0xc8>;
+ abs_rx-n-tuning = <0xc8>;
+ abs_ry-p-tuning = <0xc8>;
+ abs_ry-n-tuning = <0xc8>;
+ poll-interval = <0x0a>;
+ invert-absx;
+ invert-absy;
+ phandle = <0x14f>;
+
+ sw1 {
+ gpios = <0xbf 0x0c 0x01>;
+ label = "GPIO DPAD-UP";
+ linux,code = <0x220>;
+ };
+
+ sw2 {
+ gpios = <0xbf 0x0d 0x01>;
+ label = "GPIO DPAD-DOWN";
+ linux,code = <0x221>;
+ };
+
+ sw3 {
+ gpios = <0xbf 0x0e 0x01>;
+ label = "GPIO DPAD-LEFT";
+ linux,code = <0x222>;
+ };
+
+ sw4 {
+ gpios = <0xbf 0x0f 0x01>;
+ label = "GPIO DPAD-RIGHT";
+ linux,code = <0x223>;
+ };
+
+ sw5 {
+ gpios = <0xbf 0x02 0x01>;
+ label = "GPIO KEY BTN-A";
+ linux,code = <0x131>;
+ };
+
+ sw6 {
+ gpios = <0xbf 0x05 0x01>;
+ label = "GPIO BTN-B";
+ linux,code = <0x130>;
+ };
+
+ sw7 {
+ gpios = <0xbf 0x06 0x01>;
+ label = "GPIO BTN-Y";
+ linux,code = <0x134>;
+ };
+
+ sw8 {
+ gpios = <0xbf 0x07 0x01>;
+ label = "GPIO BTN-X";
+ linux,code = <0x133>;
+ };
+
+ sw11 {
+ gpios = <0x66 0x02 0x01>;
+ label = "GPIO F3";
+ linux,code = <0x2c2>;
+ };
+
+ sw12 {
+ gpios = <0x66 0x03 0x01>;
+ label = "GPIO F4";
+ linux,code = <0x2c3>;
+ };
+
+ sw13 {
+ gpios = <0x66 0x04 0x01>;
+ label = "GPIO F5";
+ linux,code = <0x2c4>;
+ };
+
+ sw15 {
+ gpios = <0x66 0x06 0x01>;
+ label = "GPIO TOP-LEFT";
+ linux,code = <0x136>;
+ };
+
+ sw16 {
+ gpios = <0x66 0x07 0x01>;
+ label = "GPIO TOP-RIGHT";
+ linux,code = <0x137>;
+ };
+
+ sw19 {
+ gpios = <0x97 0x09 0x01>;
+ label = "GPIO F1";
+ linux,code = <0x2c0>;
+ };
+
+ sw20 {
+ gpios = <0x97 0x0f 0x01>;
+ label = "GPIO TOP-RIGHT2";
+ linux,code = <0x139>;
+ };
+
+ sw21 {
+ gpios = <0x97 0x0a 0x01>;
+ label = "GPIO TOP-LEFT2";
+ linux,code = <0x138>;
+ };
+
+ sw22 {
+ gpios = <0x97 0x0c 0x01>;
+ label = "GPIO F2";
+ linux,code = <0x2c1>;
+ };
+ };
+
+ gpio_leds {
+ compatible = "gpio-leds";
+ pinctrl-names = "led_pins";
+ pinctrl-0 = <0xc0>;
+ phandle = <0x150>;
+
+ heartbeat {
+ label = "blue:heartbeat";
+ gpios = <0x5c 0x11 0x00>;
+ linux,default-trigger = "heartbeat";
+ };
+ };
+
+ backlight {
+ compatible = "pwm-backlight";
+ pwms = <0xc1 0x00 0x9c40 0x00>;
+ brightness-levels = <0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f 0x20 0x21 0x22 0x23 0x24 0x25 0x26 0x27 0x28 0x29 0x2a 0x2b 0x2c 0x2d 0x2e 0x2f 0x30 0x31 0x32 0x33 0x34 0x35 0x36 0x37 0x38 0x39 0x3a 0x3b 0x3c 0x3d 0x3e 0x3f 0x40 0x41 0x42 0x43 0x44 0x45 0x46 0x47 0x48 0x49 0x4a 0x4b 0x4c 0x4d 0x4e 0x4f 0x50 0x51 0x52 0x53 0x54 0x55 0x56 0x57 0x58 0x59 0x5a 0x5b 0x5c 0x5d 0x5e 0x5f 0x60 0x61 0x62 0x63 0x64 0x65 0x66 0x67 0x68 0x69 0x6a 0x6b 0x6c 0x6d 0x6e 0x6f 0x70 0x71 0x72 0x73 0x74 0x75 0x76 0x77 0x78 0x79 0x7a 0x7b 0x7c 0x7d 0x7e 0x7f 0x80 0x81 0x82 0x83 0x84 0x85 0x86 0x87 0x88 0x89 0x8a 0x8b 0x8c 0x8d 0x8e 0x8f 0x90 0x91 0x92 0x93 0x94 0x95 0x96 0x97 0x98 0x99 0x9a 0x9b 0x9c 0x9d 0x9e 0x9f 0xa0>;
+ default-brightness-level = <0x50>;
+ phandle = <0x9d>;
+ };
+
+ rk817-sound {
+ compatible = "simple-audio-card";
+ simple-audio-card,format = "i2s";
+ simple-audio-card,name = "rockchip,rk817-codec";
+ simple-audio-card,mclk-fs = <0x100>;
+ simple-audio-card,widgets = "Microphone\0Mic Jack\0Headphone\0Headphone Jack";
+ simple-audio-card,routing = "MIC_IN\0Mic Jack\0Headphone Jack\0HPOL\0Headphone Jack\0HPOR";
+ simple-audio-card,hp-det-gpio = <0x66 0x16 0x01>;
+ simple-audio-card,codec-hp-det = <0x01>;
+
+ simple-audio-card,cpu {
+ sound-dai = <0xc2>;
+ };
+
+ simple-audio-card,codec {
+ sound-dai = <0xc3>;
+ };
+ };
+
+ vccsys {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v8_sys";
+ regulator-always-on;
+ regulator-min-microvolt = <0x39fbc0>;
+ regulator-max-microvolt = <0x39fbc0>;
+ phandle = <0x64>;
+ };
+
+ __symbols__ {
+ ddr_timing = "/ddr_timing";
+ cpu0 = "/cpus/cpu@0";
+ cpu1 = "/cpus/cpu@1";
+ cpu2 = "/cpus/cpu@2";
+ cpu3 = "/cpus/cpu@3";
+ CPU_SLEEP = "/cpus/idle-states/cpu-sleep";
+ CLUSTER_SLEEP = "/cpus/idle-states/cluster-sleep";
+ cpu0_opp_table = "/cpu0-opp-table";
+ bus_soc = "/bus-soc";
+ bus_apll = "/bus-apll";
+ bus_apll_opp_table = "/bus-apll-opp-table";
+ display_subsystem = "/display-subsystem";
+ route_lvds = "/display-subsystem/route/route-lvds";
+ route_dsi = "/display-subsystem/route/route-dsi";
+ route_rgb = "/display-subsystem/route/route-rgb";
+ gmac_clkin = "/external-gmac-clock";
+ rockchip_suspend = "/rockchip-suspend";
+ xin24m = "/xin24m";
+ xin32k = "/xin32k";
+ pmu = "/power-management@ff000000";
+ power = "/power-management@ff000000/power-controller";
+ pmugrf = "/syscon@ff010000";
+ pmu_io_domains = "/syscon@ff010000/io-domains";
+ pmu_pvtm = "/syscon@ff010000/pmu-pvtm";
+ uart0 = "/serial@ff030000";
+ i2s0_8ch = "/i2s@ff060000";
+ i2s1_2ch = "/i2s@ff070000";
+ i2s2_2ch = "/i2s@ff080000";
+ pdm = "/pdm@ff0a0000";
+ crypto = "/crypto@ff0b0000";
+ rng = "/rng@ff0b0000";
+ gic = "/interrupt-controller@ff131000";
+ grf = "/syscon@ff140000";
+ io_domains = "/syscon@ff140000/io-domains";
+ lvds = "/syscon@ff140000/lvds";
+ lvds_in_vopb = "/syscon@ff140000/lvds/ports/port@0/endpoint@0";
+ rgb = "/syscon@ff140000/rgb";
+ rgb_in_vopb = "/syscon@ff140000/rgb/ports/port@0/endpoint@0";
+ core_grf = "/syscon@ff148000";
+ pvtm = "/syscon@ff148000/pvtm";
+ uart1 = "/serial@ff158000";
+ uart2 = "/serial@ff160000";
+ uart3 = "/serial@ff168000";
+ uart4 = "/serial@ff170000";
+ uart5 = "/serial@ff178000";
+ i2c0 = "/i2c@ff180000";
+ rk817 = "/i2c@ff180000/pmic@20";
+ pinctrl_rk8xx = "/i2c@ff180000/pmic@20/pinctrl_rk8xx";
+ rk817_ts_gpio1 = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_ts_gpio1";
+ rk817_gt_gpio2 = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_gt_gpio2";
+ rk817_pin_ts = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_pin_ts";
+ rk817_pin_gt = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_pin_gt";
+ rk817_slppin_null = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_slppin_null";
+ rk817_slppin_slp = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_slppin_slp";
+ rk817_slppin_pwrdn = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_slppin_pwrdn";
+ rk817_slppin_rst = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_slppin_rst";
+ vdd_logic = "/i2c@ff180000/pmic@20/regulators/DCDC_REG1";
+ vdd_arm = "/i2c@ff180000/pmic@20/regulators/DCDC_REG2";
+ vcc_ddr = "/i2c@ff180000/pmic@20/regulators/DCDC_REG3";
+ vcc_3v3 = "/i2c@ff180000/pmic@20/regulators/DCDC_REG4";
+ vcc_1v0 = "/i2c@ff180000/pmic@20/regulators/LDO_REG1";
+ vcc1v8_soc = "/i2c@ff180000/pmic@20/regulators/LDO_REG2";
+ vdd1v0_soc = "/i2c@ff180000/pmic@20/regulators/LDO_REG3";
+ vcc3v3_pmu = "/i2c@ff180000/pmic@20/regulators/LDO_REG4";
+ vccio_sd = "/i2c@ff180000/pmic@20/regulators/LDO_REG5";
+ vcc_sd = "/i2c@ff180000/pmic@20/regulators/LDO_REG6";
+ vcc_backlight = "/i2c@ff180000/pmic@20/regulators/LDO_REG7";
+ vcc_lcd = "/i2c@ff180000/pmic@20/regulators/LDO_REG8";
+ dcdc_boost = "/i2c@ff180000/pmic@20/regulators/BOOST";
+ otg_switch = "/i2c@ff180000/pmic@20/regulators/OTG_SWITCH";
+ rk817_codec = "/i2c@ff180000/pmic@20/codec";
+ i2c1 = "/i2c@ff190000";
+ i2c2 = "/i2c@ff1a0000";
+ i2c3 = "/i2c@ff1b0000";
+ spi0 = "/spi@ff1d0000";
+ spi1 = "/spi@ff1d8000";
+ wdt = "/watchdog@ff1e0000";
+ pwm0 = "/pwm@ff200000";
+ pwm1 = "/pwm@ff200010";
+ pwm2 = "/pwm@ff200020";
+ pwm3 = "/pwm@ff200030";
+ pwm4 = "/pwm@ff208000";
+ pwm5 = "/pwm@ff208010";
+ pwm6 = "/pwm@ff208020";
+ pwm7 = "/pwm@ff208030";
+ rktimer = "/rktimer@ff210000";
+ dmac = "/amba/dmac@ff240000";
+ thermal_zones = "/thermal-zones";
+ soc_thermal = "/thermal-zones/soc-thermal";
+ threshold = "/thermal-zones/soc-thermal/trips/trip-point-0";
+ target = "/thermal-zones/soc-thermal/trips/trip-point-1";
+ soc_crit = "/thermal-zones/soc-thermal/trips/soc-crit";
+ gpu_thermal = "/thermal-zones/gpu-thermal";
+ tsadc = "/tsadc@ff280000";
+ saradc = "/saradc@ff288000";
+ otp = "/otp@ff290000";
+ otp_id = "/otp@ff290000/id@7";
+ cpu_leakage = "/otp@ff290000/cpu-leakage@17";
+ performance = "/otp@ff290000/performance@1e";
+ cru = "/clock-controller@ff2b0000";
+ cpu_boost = "/cpu-boost@ff2b8000";
+ pmucru = "/pmu-clock-controller@ff2bc000";
+ usb2phy_grf = "/syscon@ff2c0000";
+ u2phy = "/syscon@ff2c0000/usb2-phy@100";
+ u2phy_host = "/syscon@ff2c0000/usb2-phy@100/host-port";
+ u2phy_otg = "/syscon@ff2c0000/usb2-phy@100/otg-port";
+ video_phy = "/video-phy@ff2e0000";
+ mipi_dphy_rx0 = "/mipi-dphy-rx0@ff2f0000";
+ usb20_otg = "/usb@ff300000";
+ usb_host0_ehci = "/usb@ff340000";
+ usb_host0_ohci = "/usb@ff350000";
+ gmac = "/ethernet@ff360000";
+ sdmmc = "/dwmmc@ff370000";
+ sdio = "/dwmmc@ff380000";
+ emmc = "/dwmmc@ff390000";
+ nandc0 = "/nandc@ff3b0000";
+ sfc = "/sfc@ff3a0000";
+ gpu = "/gpu@ff400000";
+ gpu_opp_table = "/gpu-opp-table";
+ hevc = "/hevc_service@ff440000";
+ vpu = "/vpu_service@ff442000";
+ vpu_combo = "/vpu_combo";
+ hevc_mmu = "/iommu@ff440440";
+ vpu_mmu = "/iommu@ff442800";
+ dsi = "/dsi@ff450000";
+ dsi_in_vopb = "/dsi@ff450000/ports/port@0/endpoint@0";
+ timing0 = "/dsi@ff450000/panel@0/display-timings/60Hz";
+ timing1 = "/dsi@ff450000/panel@0/display-timings/50Hz";
+ timing2 = "/dsi@ff450000/panel@0/display-timings/75Hz";
+ vopb = "/vop@ff460000";
+ vopb_out = "/vop@ff460000/port";
+ vopb_out_lvds = "/vop@ff460000/port/endpoint@0";
+ vopb_out_dsi = "/vop@ff460000/port/endpoint@1";
+ vopb_out_rgb = "/vop@ff460000/port/endpoint@2";
+ vopb_mmu = "/iommu@ff460f00";
+ rk_rga = "/rk_rga@ff480000";
+ cif = "/cif@ff490000";
+ cif_new = "/cif-new@ff490000";
+ vip_mmu = "/iommu@ff490800";
+ rk_isp = "/rk_isp@ff4a0000";
+ rkisp1 = "/rkisp1@ff4a0000";
+ isp_mmu = "/iommu@ff4a8000";
+ qos_gmac = "/qos@ff518000";
+ qos_gpu = "/qos@ff520000";
+ qos_sdmmc = "/qos@ff52c000";
+ qos_emmc = "/qos@ff538000";
+ qos_nand = "/qos@ff538080";
+ qos_sdio = "/qos@ff538100";
+ qos_sfc = "/qos@ff538180";
+ qos_usb_host = "/qos@ff540000";
+ qos_usb_otg = "/qos@ff540080";
+ qos_isp_128 = "/qos@ff548000";
+ qos_isp_rd = "/qos@ff548080";
+ qos_isp_wr = "/qos@ff548100";
+ qos_isp_m1 = "/qos@ff548180";
+ qos_vip = "/qos@ff548200";
+ qos_rga_rd = "/qos@ff550000";
+ qos_rga_wr = "/qos@ff550080";
+ qos_vop_m0 = "/qos@ff550100";
+ qos_vop_m1 = "/qos@ff550180";
+ qos_vpu = "/qos@ff558000";
+ qos_vpu_r128 = "/qos@ff558080";
+ dfi = "/dfi@ff610000";
+ dmc = "/dmc";
+ ddr_power_model = "/dmc/ddr_power_model";
+ dmc_opp_table = "/dmc-opp-table";
+ rockchip_system_monitor = "/rockchip-system-monitor";
+ pinctrl = "/pinctrl";
+ gpio0 = "/pinctrl/gpio0@ff040000";
+ gpio1 = "/pinctrl/gpio1@ff250000";
+ gpio2 = "/pinctrl/gpio2@ff260000";
+ gpio3 = "/pinctrl/gpio3@ff270000";
+ pcfg_pull_up = "/pinctrl/pcfg-pull-up";
+ pcfg_pull_down = "/pinctrl/pcfg-pull-down";
+ pcfg_pull_none = "/pinctrl/pcfg-pull-none";
+ pcfg_pull_none_2ma = "/pinctrl/pcfg-pull-none-2ma";
+ pcfg_pull_up_2ma = "/pinctrl/pcfg-pull-up-2ma";
+ pcfg_pull_up_4ma = "/pinctrl/pcfg-pull-up-4ma";
+ pcfg_pull_none_4ma = "/pinctrl/pcfg-pull-none-4ma";
+ pcfg_pull_down_4ma = "/pinctrl/pcfg-pull-down-4ma";
+ pcfg_pull_none_8ma = "/pinctrl/pcfg-pull-none-8ma";
+ pcfg_pull_up_8ma = "/pinctrl/pcfg-pull-up-8ma";
+ pcfg_pull_none_12ma = "/pinctrl/pcfg-pull-none-12ma";
+ pcfg_pull_up_12ma = "/pinctrl/pcfg-pull-up-12ma";
+ pcfg_pull_none_smt = "/pinctrl/pcfg-pull-none-smt";
+ pcfg_output_high = "/pinctrl/pcfg-output-high";
+ pcfg_output_low = "/pinctrl/pcfg-output-low";
+ pcfg_input_high = "/pinctrl/pcfg-input-high";
+ pcfg_input = "/pinctrl/pcfg-input";
+ i2c0_xfer = "/pinctrl/i2c0/i2c0-xfer";
+ i2c1_xfer = "/pinctrl/i2c1/i2c1-xfer";
+ i2c2_xfer = "/pinctrl/i2c2/i2c2-xfer";
+ i2c3_xfer = "/pinctrl/i2c3/i2c3-xfer";
+ tsadc_otp_gpio = "/pinctrl/tsadc/tsadc-otp-gpio";
+ tsadc_otp_out = "/pinctrl/tsadc/tsadc-otp-out";
+ uart0_xfer = "/pinctrl/uart0/uart0-xfer";
+ uart0_cts = "/pinctrl/uart0/uart0-cts";
+ uart0_rts = "/pinctrl/uart0/uart0-rts";
+ uart0_rts_gpio = "/pinctrl/uart0/uart0-rts-gpio";
+ uart1_xfer = "/pinctrl/uart1/uart1-xfer";
+ uart1_cts = "/pinctrl/uart1/uart1-cts";
+ uart1_rts = "/pinctrl/uart1/uart1-rts";
+ uart1_rts_gpio = "/pinctrl/uart1/uart1-rts-gpio";
+ uart2m0_xfer = "/pinctrl/uart2-m0/uart2m0-xfer";
+ uart2m1_xfer = "/pinctrl/uart2-m1/uart2m1-xfer";
+ uart3m0_xfer = "/pinctrl/uart3-m0/uart3m0-xfer";
+ uart3m0_cts = "/pinctrl/uart3-m0/uart3m0-cts";
+ uart3m0_rts = "/pinctrl/uart3-m0/uart3m0-rts";
+ uart3m0_rts_gpio = "/pinctrl/uart3-m0/uart3m0-rts-gpio";
+ uart3m1_xfer = "/pinctrl/uart3-m1/uart3m1-xfer";
+ uart3m1_cts = "/pinctrl/uart3-m1/uart3m1-cts";
+ uart3m1_rts = "/pinctrl/uart3-m1/uart3m1-rts";
+ uart3m1_rts_gpio = "/pinctrl/uart3-m1/uart3m1-rts-gpio";
+ uart4_xfer = "/pinctrl/uart4/uart4-xfer";
+ uart4_cts = "/pinctrl/uart4/uart4-cts";
+ uart4_rts = "/pinctrl/uart4/uart4-rts";
+ uart5_xfer = "/pinctrl/uart5/uart5-xfer";
+ uart5_cts = "/pinctrl/uart5/uart5-cts";
+ uart5_rts = "/pinctrl/uart5/uart5-rts";
+ spi0_clk = "/pinctrl/spi0/spi0-clk";
+ spi0_csn = "/pinctrl/spi0/spi0-csn";
+ spi0_miso = "/pinctrl/spi0/spi0-miso";
+ spi0_mosi = "/pinctrl/spi0/spi0-mosi";
+ spi0_clk_hs = "/pinctrl/spi0/spi0-clk-hs";
+ spi0_miso_hs = "/pinctrl/spi0/spi0-miso-hs";
+ spi0_mosi_hs = "/pinctrl/spi0/spi0-mosi-hs";
+ spi1_clk = "/pinctrl/spi1/spi1-clk";
+ spi1_csn0 = "/pinctrl/spi1/spi1-csn0";
+ spi1_csn1 = "/pinctrl/spi1/spi1-csn1";
+ spi1_miso = "/pinctrl/spi1/spi1-miso";
+ spi1_mosi = "/pinctrl/spi1/spi1-mosi";
+ spi1_clk_hs = "/pinctrl/spi1/spi1-clk-hs";
+ spi1_miso_hs = "/pinctrl/spi1/spi1-miso-hs";
+ spi1_mosi_hs = "/pinctrl/spi1/spi1-mosi-hs";
+ pdm_clk0m0 = "/pinctrl/pdm/pdm-clk0m0";
+ pdm_clk0m1 = "/pinctrl/pdm/pdm-clk0m1";
+ pdm_clk1 = "/pinctrl/pdm/pdm-clk1";
+ pdm_sdi0m0 = "/pinctrl/pdm/pdm-sdi0m0";
+ pdm_sdi0m1 = "/pinctrl/pdm/pdm-sdi0m1";
+ pdm_sdi1 = "/pinctrl/pdm/pdm-sdi1";
+ pdm_sdi2 = "/pinctrl/pdm/pdm-sdi2";
+ pdm_sdi3 = "/pinctrl/pdm/pdm-sdi3";
+ pdm_clk0m0_sleep = "/pinctrl/pdm/pdm-clk0m0-sleep";
+ pdm_clk0m_sleep1 = "/pinctrl/pdm/pdm-clk0m1-sleep";
+ pdm_clk1_sleep = "/pinctrl/pdm/pdm-clk1-sleep";
+ pdm_sdi0m0_sleep = "/pinctrl/pdm/pdm-sdi0m0-sleep";
+ pdm_sdi0m1_sleep = "/pinctrl/pdm/pdm-sdi0m1-sleep";
+ pdm_sdi1_sleep = "/pinctrl/pdm/pdm-sdi1-sleep";
+ pdm_sdi2_sleep = "/pinctrl/pdm/pdm-sdi2-sleep";
+ pdm_sdi3_sleep = "/pinctrl/pdm/pdm-sdi3-sleep";
+ i2s0_8ch_mclk = "/pinctrl/i2s0/i2s0-8ch-mclk";
+ i2s0_8ch_sclktx = "/pinctrl/i2s0/i2s0-8ch-sclktx";
+ i2s0_8ch_sclkrx = "/pinctrl/i2s0/i2s0-8ch-sclkrx";
+ i2s0_8ch_lrcktx = "/pinctrl/i2s0/i2s0-8ch-lrcktx";
+ i2s0_8ch_lrckrx = "/pinctrl/i2s0/i2s0-8ch-lrckrx";
+ i2s0_8ch_sdo0 = "/pinctrl/i2s0/i2s0-8ch-sdo0";
+ i2s0_8ch_sdo1 = "/pinctrl/i2s0/i2s0-8ch-sdo1";
+ i2s0_8ch_sdo2 = "/pinctrl/i2s0/i2s0-8ch-sdo2";
+ i2s0_8ch_sdo3 = "/pinctrl/i2s0/i2s0-8ch-sdo3";
+ i2s0_8ch_sdi0 = "/pinctrl/i2s0/i2s0-8ch-sdi0";
+ i2s0_8ch_sdi1 = "/pinctrl/i2s0/i2s0-8ch-sdi1";
+ i2s0_8ch_sdi2 = "/pinctrl/i2s0/i2s0-8ch-sdi2";
+ i2s0_8ch_sdi3 = "/pinctrl/i2s0/i2s0-8ch-sdi3";
+ i2s1_2ch_mclk = "/pinctrl/i2s1/i2s1-2ch-mclk";
+ i2s1_2ch_sclk = "/pinctrl/i2s1/i2s1-2ch-sclk";
+ i2s1_2ch_lrck = "/pinctrl/i2s1/i2s1-2ch-lrck";
+ i2s1_2ch_sdi = "/pinctrl/i2s1/i2s1-2ch-sdi";
+ i2s1_2ch_sdo = "/pinctrl/i2s1/i2s1-2ch-sdo";
+ i2s2_2ch_mclk = "/pinctrl/i2s2/i2s2-2ch-mclk";
+ i2s2_2ch_sclk = "/pinctrl/i2s2/i2s2-2ch-sclk";
+ i2s2_2ch_lrck = "/pinctrl/i2s2/i2s2-2ch-lrck";
+ i2s2_2ch_sdi = "/pinctrl/i2s2/i2s2-2ch-sdi";
+ i2s2_2ch_sdo = "/pinctrl/i2s2/i2s2-2ch-sdo";
+ sdmmc_clk = "/pinctrl/sdmmc/sdmmc-clk";
+ sdmmc_cmd = "/pinctrl/sdmmc/sdmmc-cmd";
+ sdmmc_det = "/pinctrl/sdmmc/sdmmc-det";
+ sdmmc_bus1 = "/pinctrl/sdmmc/sdmmc-bus1";
+ sdmmc_bus4 = "/pinctrl/sdmmc/sdmmc-bus4";
+ sdmmc_gpio = "/pinctrl/sdmmc/sdmmc-gpio";
+ sdio_clk = "/pinctrl/sdio/sdio-clk";
+ sdio_cmd = "/pinctrl/sdio/sdio-cmd";
+ sdio_bus4 = "/pinctrl/sdio/sdio-bus4";
+ sdio_gpio = "/pinctrl/sdio/sdio-gpio";
+ emmc_clk = "/pinctrl/emmc/emmc-clk";
+ emmc_cmd = "/pinctrl/emmc/emmc-cmd";
+ emmc_pwren = "/pinctrl/emmc/emmc-pwren";
+ emmc_rstnout = "/pinctrl/emmc/emmc-rstnout";
+ emmc_bus1 = "/pinctrl/emmc/emmc-bus1";
+ emmc_bus4 = "/pinctrl/emmc/emmc-bus4";
+ emmc_bus8 = "/pinctrl/emmc/emmc-bus8";
+ flash_cs0 = "/pinctrl/flash/flash-cs0";
+ flash_rdy = "/pinctrl/flash/flash-rdy";
+ flash_dqs = "/pinctrl/flash/flash-dqs";
+ flash_ale = "/pinctrl/flash/flash-ale";
+ flash_cle = "/pinctrl/flash/flash-cle";
+ flash_wrn = "/pinctrl/flash/flash-wrn";
+ flash_csl = "/pinctrl/flash/flash-csl";
+ flash_rdn = "/pinctrl/flash/flash-rdn";
+ flash_bus8 = "/pinctrl/flash/flash-bus8";
+ lcdc_m0_rgb_pins = "/pinctrl/lcdc/lcdc-m0-rgb-pins";
+ lcdc_m0_sleep_pins = "/pinctrl/lcdc/lcdc-m0-sleep-pins";
+ lcdc_m1_rgb_pins = "/pinctrl/lcdc/lcdc-m1-rgb-pins";
+ lcdc_m1_sleep_pins = "/pinctrl/lcdc/lcdc-m1-sleep-pins";
+ pwm0_pin = "/pinctrl/pwm0/pwm0-pin";
+ pwm1_pin = "/pinctrl/pwm1/pwm1-pin";
+ pwm2_pin = "/pinctrl/pwm2/pwm2-pin";
+ pwm3_pin = "/pinctrl/pwm3/pwm3-pin";
+ pwm4_pin = "/pinctrl/pwm4/pwm4-pin";
+ pwm5_pin = "/pinctrl/pwm5/pwm5-pin";
+ pwm6_pin = "/pinctrl/pwm6/pwm6-pin";
+ pwm7_pin = "/pinctrl/pwm7/pwm7-pin";
+ rmii_pins = "/pinctrl/gmac/rmii-pins";
+ mac_refclk_12ma = "/pinctrl/gmac/mac-refclk-12ma";
+ mac_refclk = "/pinctrl/gmac/mac-refclk";
+ cif_clkout_m0 = "/pinctrl/cif-m0/cif-clkout-m0";
+ dvp_d2d9_m0 = "/pinctrl/cif-m0/dvp-d2d9-m0";
+ dvp_d0d1_m0 = "/pinctrl/cif-m0/dvp-d0d1-m0";
+ dvp_d10d11_m0 = "/pinctrl/cif-m0/d10-d11-m0";
+ cif_clkout_m1 = "/pinctrl/cif-m1/cif-clkout-m1";
+ dvp_d2d9_m1 = "/pinctrl/cif-m1/dvp-d2d9-m1";
+ dvp_d0d1_m1 = "/pinctrl/cif-m1/dvp-d0d1-m1";
+ dvp_d10d11_m1 = "/pinctrl/cif-m1/d10-d11-m1";
+ isp_prelight = "/pinctrl/isp/isp-prelight";
+ pmic_int = "/pinctrl/pmic/pmic_int";
+ soc_slppin_gpio = "/pinctrl/pmic/soc_slppin_gpio";
+ soc_slppin_slp = "/pinctrl/pmic/soc_slppin_slp";
+ soc_slppin_rst = "/pinctrl/pmic/soc_slppin_rst";
+ led_pins = "/pinctrl/leds/led-pins";
+ btn_pins = "/pinctrl/btns/btn-pins";
+ drm_logo = "/reserved-memory/drm-logo@00000000";
+ ramoops_mem = "/reserved-memory/region@110000";
+ gpio_keys = "/odroidgo3-keys";
+ joypad = "/odroidgo3-joypad";
+ leds = "/gpio_leds";
+ backlight = "/backlight";
+ vccsys = "/vccsys";
+ };
+};
diff --git a/config/archr-dts/R36S-DTB/DTS/Panel1.dts b/config/archr-dts/R36S-DTB/DTS/Panel1.dts
new file mode 100644
index 0000000000..f72f03b8d7
--- /dev/null
+++ b/config/archr-dts/R36S-DTB/DTS/Panel1.dts
@@ -0,0 +1,4063 @@
+/dts-v1/;
+
+/ {
+ compatible = "rockchip,rk3326-odroidgo3-linux\0rockchip,rk3326";
+ interrupt-parent = <0x01>;
+ #address-cells = <0x02>;
+ #size-cells = <0x02>;
+ model = "Game Console R35S/R36S fix by AeolusUX";
+
+ ddr_timing {
+ compatible = "rockchip,ddr-timing";
+ ddr2_speed_bin = <0x00>;
+ ddr3_speed_bin = <0x15>;
+ ddr4_speed_bin = <0x0c>;
+ pd_idle = <0x0d>;
+ sr_idle = <0x5d>;
+ sr_mc_gate_idle = <0x00>;
+ srpd_lite_idle = <0x00>;
+ standby_idle = <0x00>;
+ auto_pd_dis_freq = <0x42a>;
+ auto_sr_dis_freq = <0x320>;
+ ddr2_dll_dis_freq = <0x12c>;
+ ddr3_dll_dis_freq = <0x12c>;
+ ddr4_dll_dis_freq = <0x271>;
+ phy_dll_dis_freq = <0x190>;
+ ddr2_odt_dis_freq = <0x64>;
+ phy_ddr2_odt_dis_freq = <0x64>;
+ ddr2_drv = <0x01>;
+ ddr2_odt = <0x96>;
+ phy_ddr2_ca_drv = <0x15>;
+ phy_ddr2_ck_drv = <0x12>;
+ phy_ddr2_dq_drv = <0x15>;
+ phy_ddr2_odt = <0x02>;
+ ddr3_odt_dis_freq = <0x190>;
+ phy_ddr3_odt_dis_freq = <0x190>;
+ ddr3_drv = <0x28>;
+ ddr3_odt = <0x78>;
+ phy_ddr3_ca_drv = <0x15>;
+ phy_ddr3_ck_drv = <0x12>;
+ phy_ddr3_dq_drv = <0x15>;
+ phy_ddr3_odt = <0x02>;
+ phy_lpddr2_odt_dis_freq = <0x29a>;
+ lpddr2_drv = <0x28>;
+ phy_lpddr2_ca_drv = <0x16>;
+ phy_lpddr2_ck_drv = <0x13>;
+ phy_lpddr2_dq_drv = <0x16>;
+ phy_lpddr2_odt = <0x00>;
+ lpddr3_odt_dis_freq = <0x190>;
+ phy_lpddr3_odt_dis_freq = <0x190>;
+ lpddr3_drv = <0x28>;
+ lpddr3_odt = <0xf0>;
+ phy_lpddr3_ca_drv = <0x16>;
+ phy_lpddr3_ck_drv = <0x13>;
+ phy_lpddr3_dq_drv = <0x16>;
+ phy_lpddr3_odt = <0x02>;
+ lpddr4_odt_dis_freq = <0x320>;
+ phy_lpddr4_odt_dis_freq = <0x320>;
+ lpddr4_drv = <0x3c>;
+ lpddr4_dq_odt = <0x28>;
+ lpddr4_ca_odt = <0x28>;
+ phy_lpddr4_ca_drv = <0x14>;
+ phy_lpddr4_ck_cs_drv = <0x06>;
+ phy_lpddr4_dq_drv = <0x06>;
+ phy_lpddr4_odt = <0x10>;
+ ddr4_odt_dis_freq = <0x29a>;
+ phy_ddr4_odt_dis_freq = <0x29a>;
+ ddr4_drv = <0x22>;
+ ddr4_odt = <0xf0>;
+ phy_ddr4_ca_drv = <0x16>;
+ phy_ddr4_ck_drv = <0x13>;
+ phy_ddr4_dq_drv = <0x16>;
+ phy_ddr4_odt = <0x02>;
+ ddr3a1_ddr4a9_de-skew = <0x06>;
+ ddr3a0_ddr4a10_de-skew = <0x07>;
+ ddr3a3_ddr4a6_de-skew = <0x07>;
+ ddr3a2_ddr4a4_de-skew = <0x07>;
+ ddr3a5_ddr4a8_de-skew = <0x07>;
+ ddr3a4_ddr4a5_de-skew = <0x07>;
+ ddr3a7_ddr4a11_de-skew = <0x07>;
+ ddr3a6_ddr4a7_de-skew = <0x06>;
+ ddr3a9_ddr4a0_de-skew = <0x07>;
+ ddr3a8_ddr4a13_de-skew = <0x07>;
+ ddr3a11_ddr4a3_de-skew = <0x07>;
+ ddr3a10_ddr4cs0_de-skew = <0x07>;
+ ddr3a13_ddr4a2_de-skew = <0x07>;
+ ddr3a12_ddr4ba1_de-skew = <0x07>;
+ ddr3a15_ddr4odt0_de-skew = <0x07>;
+ ddr3a14_ddr4a1_de-skew = <0x07>;
+ ddr3ba1_ddr4a15_de-skew = <0x07>;
+ ddr3ba0_ddr4bg0_de-skew = <0x07>;
+ ddr3ras_ddr4cke_de-skew = <0x07>;
+ ddr3ba2_ddr4ba0_de-skew = <0x07>;
+ ddr3we_ddr4bg1_de-skew = <0x07>;
+ ddr3cas_ddr4a12_de-skew = <0x07>;
+ ddr3ckn_ddr4ckn_de-skew = <0x07>;
+ ddr3ckp_ddr4ckp_de-skew = <0x07>;
+ ddr3cke_ddr4a16_de-skew = <0x07>;
+ ddr3odt0_ddr4a14_de-skew = <0x07>;
+ ddr3cs0_ddr4act_de-skew = <0x06>;
+ ddr3reset_ddr4reset_de-skew = <0x07>;
+ ddr3cs1_ddr4cs1_de-skew = <0x06>;
+ ddr3odt1_ddr4odt1_de-skew = <0x07>;
+ cs0_dm0_rx_de-skew = <0x07>;
+ cs0_dm0_tx_de-skew = <0x07>;
+ cs0_dq0_rx_de-skew = <0x08>;
+ cs0_dq0_tx_de-skew = <0x08>;
+ cs0_dq1_rx_de-skew = <0x09>;
+ cs0_dq1_tx_de-skew = <0x08>;
+ cs0_dq2_rx_de-skew = <0x08>;
+ cs0_dq2_tx_de-skew = <0x08>;
+ cs0_dq3_rx_de-skew = <0x08>;
+ cs0_dq3_tx_de-skew = <0x08>;
+ cs0_dq4_rx_de-skew = <0x09>;
+ cs0_dq4_tx_de-skew = <0x08>;
+ cs0_dq5_rx_de-skew = <0x09>;
+ cs0_dq5_tx_de-skew = <0x08>;
+ cs0_dq6_rx_de-skew = <0x09>;
+ cs0_dq6_tx_de-skew = <0x08>;
+ cs0_dq7_rx_de-skew = <0x08>;
+ cs0_dq7_tx_de-skew = <0x08>;
+ cs0_dqs0_rx_de-skew = <0x06>;
+ cs0_dqs0p_tx_de-skew = <0x09>;
+ cs0_dqs0n_tx_de-skew = <0x09>;
+ cs0_dm1_rx_de-skew = <0x07>;
+ cs0_dm1_tx_de-skew = <0x06>;
+ cs0_dq8_rx_de-skew = <0x08>;
+ cs0_dq8_tx_de-skew = <0x07>;
+ cs0_dq9_rx_de-skew = <0x09>;
+ cs0_dq9_tx_de-skew = <0x07>;
+ cs0_dq10_rx_de-skew = <0x08>;
+ cs0_dq10_tx_de-skew = <0x08>;
+ cs0_dq11_rx_de-skew = <0x08>;
+ cs0_dq11_tx_de-skew = <0x07>;
+ cs0_dq12_rx_de-skew = <0x08>;
+ cs0_dq12_tx_de-skew = <0x08>;
+ cs0_dq13_rx_de-skew = <0x09>;
+ cs0_dq13_tx_de-skew = <0x07>;
+ cs0_dq14_rx_de-skew = <0x09>;
+ cs0_dq14_tx_de-skew = <0x08>;
+ cs0_dq15_rx_de-skew = <0x09>;
+ cs0_dq15_tx_de-skew = <0x07>;
+ cs0_dqs1_rx_de-skew = <0x07>;
+ cs0_dqs1p_tx_de-skew = <0x09>;
+ cs0_dqs1n_tx_de-skew = <0x09>;
+ cs0_dm2_rx_de-skew = <0x07>;
+ cs0_dm2_tx_de-skew = <0x07>;
+ cs0_dq16_rx_de-skew = <0x09>;
+ cs0_dq16_tx_de-skew = <0x09>;
+ cs0_dq17_rx_de-skew = <0x07>;
+ cs0_dq17_tx_de-skew = <0x09>;
+ cs0_dq18_rx_de-skew = <0x07>;
+ cs0_dq18_tx_de-skew = <0x08>;
+ cs0_dq19_rx_de-skew = <0x07>;
+ cs0_dq19_tx_de-skew = <0x09>;
+ cs0_dq20_rx_de-skew = <0x09>;
+ cs0_dq20_tx_de-skew = <0x09>;
+ cs0_dq21_rx_de-skew = <0x09>;
+ cs0_dq21_tx_de-skew = <0x09>;
+ cs0_dq22_rx_de-skew = <0x08>;
+ cs0_dq22_tx_de-skew = <0x09>;
+ cs0_dq23_rx_de-skew = <0x08>;
+ cs0_dq23_tx_de-skew = <0x09>;
+ cs0_dqs2_rx_de-skew = <0x06>;
+ cs0_dqs2p_tx_de-skew = <0x09>;
+ cs0_dqs2n_tx_de-skew = <0x09>;
+ cs0_dm3_rx_de-skew = <0x07>;
+ cs0_dm3_tx_de-skew = <0x07>;
+ cs0_dq24_rx_de-skew = <0x08>;
+ cs0_dq24_tx_de-skew = <0x08>;
+ cs0_dq25_rx_de-skew = <0x09>;
+ cs0_dq25_tx_de-skew = <0x09>;
+ cs0_dq26_rx_de-skew = <0x09>;
+ cs0_dq26_tx_de-skew = <0x08>;
+ cs0_dq27_rx_de-skew = <0x09>;
+ cs0_dq27_tx_de-skew = <0x08>;
+ cs0_dq28_rx_de-skew = <0x09>;
+ cs0_dq28_tx_de-skew = <0x09>;
+ cs0_dq29_rx_de-skew = <0x09>;
+ cs0_dq29_tx_de-skew = <0x09>;
+ cs0_dq30_rx_de-skew = <0x08>;
+ cs0_dq30_tx_de-skew = <0x08>;
+ cs0_dq31_rx_de-skew = <0x08>;
+ cs0_dq31_tx_de-skew = <0x08>;
+ cs0_dqs3_rx_de-skew = <0x07>;
+ cs0_dqs3p_tx_de-skew = <0x09>;
+ cs0_dqs3n_tx_de-skew = <0x09>;
+ cs1_dm0_rx_de-skew = <0x07>;
+ cs1_dm0_tx_de-skew = <0x07>;
+ cs1_dq0_rx_de-skew = <0x08>;
+ cs1_dq0_tx_de-skew = <0x08>;
+ cs1_dq1_rx_de-skew = <0x09>;
+ cs1_dq1_tx_de-skew = <0x08>;
+ cs1_dq2_rx_de-skew = <0x08>;
+ cs1_dq2_tx_de-skew = <0x08>;
+ cs1_dq3_rx_de-skew = <0x08>;
+ cs1_dq3_tx_de-skew = <0x08>;
+ cs1_dq4_rx_de-skew = <0x08>;
+ cs1_dq4_tx_de-skew = <0x08>;
+ cs1_dq5_rx_de-skew = <0x09>;
+ cs1_dq5_tx_de-skew = <0x08>;
+ cs1_dq6_rx_de-skew = <0x09>;
+ cs1_dq6_tx_de-skew = <0x08>;
+ cs1_dq7_rx_de-skew = <0x08>;
+ cs1_dq7_tx_de-skew = <0x08>;
+ cs1_dqs0_rx_de-skew = <0x06>;
+ cs1_dqs0p_tx_de-skew = <0x09>;
+ cs1_dqs0n_tx_de-skew = <0x09>;
+ cs1_dm1_rx_de-skew = <0x07>;
+ cs1_dm1_tx_de-skew = <0x07>;
+ cs1_dq8_rx_de-skew = <0x08>;
+ cs1_dq8_tx_de-skew = <0x08>;
+ cs1_dq9_rx_de-skew = <0x08>;
+ cs1_dq9_tx_de-skew = <0x07>;
+ cs1_dq10_rx_de-skew = <0x07>;
+ cs1_dq10_tx_de-skew = <0x08>;
+ cs1_dq11_rx_de-skew = <0x08>;
+ cs1_dq11_tx_de-skew = <0x08>;
+ cs1_dq12_rx_de-skew = <0x08>;
+ cs1_dq12_tx_de-skew = <0x07>;
+ cs1_dq13_rx_de-skew = <0x08>;
+ cs1_dq13_tx_de-skew = <0x08>;
+ cs1_dq14_rx_de-skew = <0x08>;
+ cs1_dq14_tx_de-skew = <0x08>;
+ cs1_dq15_rx_de-skew = <0x08>;
+ cs1_dq15_tx_de-skew = <0x07>;
+ cs1_dqs1_rx_de-skew = <0x07>;
+ cs1_dqs1p_tx_de-skew = <0x09>;
+ cs1_dqs1n_tx_de-skew = <0x09>;
+ cs1_dm2_rx_de-skew = <0x07>;
+ cs1_dm2_tx_de-skew = <0x08>;
+ cs1_dq16_rx_de-skew = <0x08>;
+ cs1_dq16_tx_de-skew = <0x09>;
+ cs1_dq17_rx_de-skew = <0x08>;
+ cs1_dq17_tx_de-skew = <0x09>;
+ cs1_dq18_rx_de-skew = <0x07>;
+ cs1_dq18_tx_de-skew = <0x08>;
+ cs1_dq19_rx_de-skew = <0x08>;
+ cs1_dq19_tx_de-skew = <0x09>;
+ cs1_dq20_rx_de-skew = <0x09>;
+ cs1_dq20_tx_de-skew = <0x09>;
+ cs1_dq21_rx_de-skew = <0x09>;
+ cs1_dq21_tx_de-skew = <0x09>;
+ cs1_dq22_rx_de-skew = <0x08>;
+ cs1_dq22_tx_de-skew = <0x09>;
+ cs1_dq23_rx_de-skew = <0x08>;
+ cs1_dq23_tx_de-skew = <0x09>;
+ cs1_dqs2_rx_de-skew = <0x06>;
+ cs1_dqs2p_tx_de-skew = <0x09>;
+ cs1_dqs2n_tx_de-skew = <0x09>;
+ cs1_dm3_rx_de-skew = <0x07>;
+ cs1_dm3_tx_de-skew = <0x07>;
+ cs1_dq24_rx_de-skew = <0x08>;
+ cs1_dq24_tx_de-skew = <0x09>;
+ cs1_dq25_rx_de-skew = <0x09>;
+ cs1_dq25_tx_de-skew = <0x09>;
+ cs1_dq26_rx_de-skew = <0x09>;
+ cs1_dq26_tx_de-skew = <0x08>;
+ cs1_dq27_rx_de-skew = <0x08>;
+ cs1_dq27_tx_de-skew = <0x08>;
+ cs1_dq28_rx_de-skew = <0x09>;
+ cs1_dq28_tx_de-skew = <0x09>;
+ cs1_dq29_rx_de-skew = <0x09>;
+ cs1_dq29_tx_de-skew = <0x09>;
+ cs1_dq30_rx_de-skew = <0x09>;
+ cs1_dq30_tx_de-skew = <0x08>;
+ cs1_dq31_rx_de-skew = <0x08>;
+ cs1_dq31_tx_de-skew = <0x08>;
+ cs1_dqs3_rx_de-skew = <0x07>;
+ cs1_dqs3p_tx_de-skew = <0x09>;
+ cs1_dqs3n_tx_de-skew = <0x09>;
+ phandle = <0xaf>;
+ };
+
+ aliases {
+ ethernet0 = "/ethernet@ff360000";
+ i2c0 = "/i2c@ff180000";
+ i2c1 = "/i2c@ff190000";
+ i2c2 = "/i2c@ff1a0000";
+ i2c3 = "/i2c@ff1b0000";
+ serial0 = "/serial@ff030000";
+ serial1 = "/serial@ff158000";
+ serial2 = "/serial@ff160000";
+ serial3 = "/serial@ff168000";
+ serial4 = "/serial@ff170000";
+ serial5 = "/serial@ff178000";
+ spi0 = "/spi@ff1d0000";
+ spi1 = "/spi@ff1d8000";
+ };
+
+ cpus {
+ #address-cells = <0x02>;
+ #size-cells = <0x00>;
+
+ cpu@0 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a35\0arm,armv8";
+ reg = <0x00 0x00>;
+ enable-method = "psci";
+ clocks = <0x02 0x07>;
+ #cooling-cells = <0x02>;
+ dynamic-power-coefficient = <0x5a>;
+ operating-points-v2 = <0x03>;
+ cpu-idle-states = <0x04 0x05>;
+ cpu-supply = <0x06>;
+ phandle = <0x09>;
+ };
+
+ cpu@1 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a35\0arm,armv8";
+ reg = <0x00 0x01>;
+ enable-method = "psci";
+ operating-points-v2 = <0x03>;
+ cpu-idle-states = <0x04 0x05>;
+ phandle = <0x0a>;
+ };
+
+ cpu@2 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a35\0arm,armv8";
+ reg = <0x00 0x02>;
+ enable-method = "psci";
+ operating-points-v2 = <0x03>;
+ cpu-idle-states = <0x04 0x05>;
+ phandle = <0x0b>;
+ };
+
+ cpu@3 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a35\0arm,armv8";
+ reg = <0x00 0x03>;
+ enable-method = "psci";
+ operating-points-v2 = <0x03>;
+ cpu-idle-states = <0x04 0x05>;
+ phandle = <0x0c>;
+ };
+
+ idle-states {
+ entry-method = "psci";
+
+ cpu-sleep {
+ compatible = "arm,idle-state";
+ local-timer-stop;
+ arm,psci-suspend-param = <0x10000>;
+ entry-latency-us = <0x78>;
+ exit-latency-us = <0xfa>;
+ min-residency-us = <0x384>;
+ phandle = <0x04>;
+ };
+
+ cluster-sleep {
+ compatible = "arm,idle-state";
+ local-timer-stop;
+ arm,psci-suspend-param = <0x1010000>;
+ entry-latency-us = <0x190>;
+ exit-latency-us = <0x1f4>;
+ min-residency-us = <0x7d0>;
+ phandle = <0x05>;
+ };
+ };
+ };
+
+ cpu0-opp-table {
+ compatible = "operating-points-v2";
+ opp-shared;
+ rockchip,temp-hysteresis = <0x1388>;
+ rockchip,low-temp = <0x00>;
+ rockchip,low-temp-min-volt = <0xf4240>;
+ rockchip,low-temp-adjust-volt = <0x00 0x5e8 0xc350>;
+ clocks = <0x02 0x01>;
+ rockchip,avs-scale = <0x04>;
+ rockchip,max-volt = <0x149970>;
+ rockchip,evb-irdrop = <0x61a8>;
+ nvmem-cells = <0x07 0x08>;
+ nvmem-cell-names = "cpu_leakage\0performance";
+ rockchip,bin-scaling-sel = <0x00 0x0d 0x01 0x0d>;
+ rockchip,pvtm-voltage-sel = <0x00 0xc350 0x00 0xc351 0xd2f0 0x01 0xd2f1 0xea60 0x02 0xea61 0x1869f 0x03>;
+ rockchip,pvtm-freq = <0x639c0>;
+ rockchip,pvtm-volt = <0xf4240>;
+ rockchip,pvtm-ch = <0x00 0x00>;
+ rockchip,pvtm-sample-time = <0x3e8>;
+ rockchip,pvtm-number = <0x0a>;
+ rockchip,pvtm-error = <0x3e8>;
+ rockchip,pvtm-ref-temp = <0x28>;
+ rockchip,pvtm-temp-prop = <0xffffffc8 0xffffffc8>;
+ rockchip,thermal-zone = "soc-thermal";
+ rockchip,avs = <0x01>;
+ phandle = <0x03>;
+
+ opp-1008000000 {
+ opp-hz = <0x00 0x3c14dc00>;
+ opp-microvolt = <0x11edd8 0x11edd8 0x149970>;
+ opp-microvolt-L0 = <0x11edd8 0x11edd8 0x149970>;
+ opp-microvolt-L1 = <0x112a88 0x112a88 0x149970>;
+ opp-microvolt-L2 = <0x112a88 0x112a88 0x149970>;
+ opp-microvolt-L3 = <0x100590 0x100590 0x149970>;
+ clock-latency-ns = <0x9c40>;
+ };
+
+ opp-1200000000 {
+ opp-hz = <0x00 0x47868c00>;
+ opp-microvolt = <0x13d620 0x13d620 0x149970>;
+ opp-microvolt-L0 = <0x13d620 0x13d620 0x149970>;
+ opp-microvolt-L1 = <0x137478 0x137478 0x149970>;
+ opp-microvolt-L2 = <0x1312d0 0x1312d0 0x149970>;
+ opp-microvolt-L3 = <0x124f80 0x124f80 0x149970>;
+ clock-latency-ns = <0x9c40>;
+ };
+
+ opp-1248000000 {
+ opp-hz = <0x00 0x4a62f800>;
+ opp-microvolt = <0x149970 0x149970 0x149970>;
+ opp-microvolt-L0 = <0x149970 0x149970 0x149970>;
+ opp-microvolt-L1 = <0x13d620 0x13d620 0x149970>;
+ opp-microvolt-L2 = <0x137478 0x137478 0x149970>;
+ opp-microvolt-L3 = <0x12b128 0x12b128 0x149970>;
+ clock-latency-ns = <0x9c40>;
+ };
+
+ opp-1296000000 {
+ opp-hz = <0x00 0x4d3f6400>;
+ opp-microvolt = <0x149970 0x149970 0x149970>;
+ opp-microvolt-L0 = <0x149970 0x149970 0x149970>;
+ opp-microvolt-L1 = <0x149970 0x149970 0x149970>;
+ opp-microvolt-L2 = <0x13d620 0x13d620 0x149970>;
+ opp-microvolt-L3 = <0x1312d0 0x1312d0 0x149970>;
+ clock-latency-ns = <0x9c40>;
+ };
+
+ opp-1512000000 {
+ opp-hz = <0x00 0x5a1f4a00>;
+ opp-microvolt = <0x149970 0x149970 0x149970>;
+ opp-microvolt-L0 = <0x149970 0x149970 0x149970>;
+ opp-microvolt-L1 = <0x149970 0x149970 0x149970>;
+ opp-microvolt-L2 = <0x13d620 0x13d620 0x149970>;
+ opp-microvolt-L3 = <0x1312d0 0x1312d0 0x149970>;
+ clock-latency-ns = <0x9c40>;
+ };
+ };
+
+ arm-pmu {
+ compatible = "arm,cortex-a53-pmu";
+ interrupts = <0x00 0x64 0x04 0x00 0x65 0x04 0x00 0x66 0x04 0x00 0x67 0x04>;
+ interrupt-affinity = <0x09 0x0a 0x0b 0x0c>;
+ };
+
+ bus-soc {
+ compatible = "rockchip,px30-bus";
+ rockchip,busfreq-policy = "autocs";
+ phandle = <0xc4>;
+
+ soc-bus0 {
+ bus-id = <0x00>;
+ timer-us = <0x14>;
+ enable-msk = <0x40f7>;
+ status = "disabled";
+ };
+
+ soc-bus1 {
+ bus-id = <0x01>;
+ timer-us = <0xc8>;
+ enable-msk = <0x40bf>;
+ status = "disabled";
+ };
+
+ soc-bus2 {
+ bus-id = <0x02>;
+ timer-us = <0xc8>;
+ enable-msk = <0x4007>;
+ status = "disabled";
+ };
+ };
+
+ bus-apll {
+ compatible = "rockchip,px30-bus";
+ rockchip,busfreq-policy = "clkfreq";
+ clocks = <0x02 0x01>;
+ clock-names = "bus";
+ operating-points-v2 = <0x0d>;
+ status = "okay";
+ bus-supply = <0x0e>;
+ phandle = <0xc5>;
+ };
+
+ bus-apll-opp-table {
+ compatible = "operating-points-v2";
+ opp-shared;
+ phandle = <0x0d>;
+
+ opp-1512000000 {
+ opp-hz = <0x00 0x5a1f4a00>;
+ opp-microvolt = <0xf4240>;
+ };
+
+ opp-1008000000 {
+ opp-hz = <0x00 0x3c14dc00>;
+ opp-microvolt = <0xe7ef0>;
+ };
+ };
+
+ cpuinfo {
+ compatible = "rockchip,cpuinfo";
+ nvmem-cells = <0x0f>;
+ nvmem-cell-names = "id";
+ };
+
+ display-subsystem {
+ compatible = "rockchip,display-subsystem";
+ ports = <0x10>;
+ status = "okay";
+ logo-memory-region = <0x11>;
+ phandle = <0xc6>;
+
+ route {
+
+ route-lvds {
+ status = "disabled";
+ logo,uboot = "logo.gif";
+ logo,kernel = "logo_kernel.gif";
+ logo,mode = "center";
+ charge_logo,mode = "center";
+ connect = <0x12>;
+ phandle = <0xc7>;
+ };
+
+ route-dsi {
+ status = "okay";
+ logo,uboot = "logo.gif";
+ logo,kernel = "logo_kernel.gif";
+ logo,mode = "center";
+ charge_logo,mode = "center";
+ connect = <0x13>;
+ phandle = <0xc8>;
+ };
+
+ route-rgb {
+ status = "disabled";
+ logo,uboot = "logo.gif";
+ logo,kernel = "logo_kernel.gif";
+ logo,mode = "center";
+ charge_logo,mode = "center";
+ connect = <0x14>;
+ phandle = <0xc9>;
+ };
+ };
+ };
+
+ firmware {
+
+ optee {
+ compatible = "linaro,optee-tz";
+ method = "smc";
+ };
+ };
+
+ external-gmac-clock {
+ compatible = "fixed-clock";
+ clock-frequency = <0x2faf080>;
+ clock-output-names = "gmac_clkin";
+ #clock-cells = <0x00>;
+ phandle = <0xca>;
+ };
+
+ psci {
+ compatible = "arm,psci-1.0";
+ method = "smc";
+ };
+
+ rockchip-suspend {
+ compatible = "rockchip,pm-px30";
+ status = "okay";
+ rockchip,sleep-debug-en = <0x01>;
+ rockchip,sleep-mode-config = <0x20702>;
+ rockchip,wakeup-config = <0x85>;
+ phandle = <0xcb>;
+ };
+
+ timer {
+ compatible = "arm,armv8-timer";
+ interrupts = <0x01 0x0d 0xf04 0x01 0x0e 0xf04 0x01 0x0b 0xf04 0x01 0x0a 0xf04>;
+ };
+
+ xin24m {
+ compatible = "fixed-clock";
+ #clock-cells = <0x00>;
+ clock-frequency = <0x16e3600>;
+ clock-output-names = "xin24m";
+ phandle = <0xcc>;
+ };
+
+ xin32k {
+ compatible = "fixed-clock";
+ #clock-cells = <0x00>;
+ clock-frequency = <0x8000>;
+ clock-output-names = "xin32k";
+ phandle = <0xcd>;
+ };
+
+ power-management@ff000000 {
+ compatible = "rockchip,px30-pmu\0syscon\0simple-mfd";
+ reg = <0x00 0xff000000 0x00 0x1000>;
+ phandle = <0xce>;
+
+ power-controller {
+ compatible = "rockchip,px30-power-controller";
+ #power-domain-cells = <0x01>;
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+ phandle = <0x8a>;
+
+ pd_usb@5 {
+ reg = <0x05>;
+ clocks = <0x02 0x103 0x02 0x102 0x02 0x3c>;
+ pm_qos = <0x15 0x16>;
+ };
+
+ pd_sdcard@7 {
+ reg = <0x07>;
+ clocks = <0x02 0xf7 0x02 0x3b>;
+ pm_qos = <0x17>;
+ };
+
+ pd_gmac@9 {
+ reg = <0x09>;
+ clocks = <0x02 0xb2 0x02 0x143 0x02 0x40 0x02 0x3f>;
+ pm_qos = <0x18>;
+ };
+
+ pd_mmc_nand@10 {
+ reg = <0x0a>;
+ clocks = <0x02 0xfe 0x02 0x100 0x02 0xff 0x02 0x101 0x02 0x39 0x02 0x37 0x02 0x38 0x02 0x3a>;
+ pm_qos = <0x19 0x1a 0x1b 0x1c>;
+ };
+
+ pd_vpu@11 {
+ reg = <0x0b>;
+ clocks = <0x02 0xaf 0x02 0xf4 0x02 0x4b>;
+ pm_qos = <0x1d 0x1e>;
+ };
+
+ pd_vo@12 {
+ reg = <0x0c>;
+ clocks = <0x02 0xb7 0x02 0xb5 0x02 0xb6 0x02 0x96 0x02 0x97 0x02 0xfd 0x02 0xfb 0x02 0xfc 0x02 0x144 0x02 0x35 0x02 0x36>;
+ pm_qos = <0x1f 0x20 0x21 0x22>;
+ };
+
+ pd_vi@13 {
+ reg = <0x0d>;
+ clocks = <0x02 0xb3 0x02 0xb4 0x02 0xf9 0x02 0xfa 0x02 0x33>;
+ pm_qos = <0x23 0x24 0x25 0x26 0x27>;
+ };
+
+ pd_gpu@14 {
+ reg = <0x0e>;
+ clocks = <0x02 0x49>;
+ pm_qos = <0x28>;
+ };
+ };
+ };
+
+ syscon@ff010000 {
+ compatible = "rockchip,px30-pmugrf\0syscon\0simple-mfd";
+ reg = <0x00 0xff010000 0x00 0x1000>;
+ #address-cells = <0x01>;
+ #size-cells = <0x01>;
+ phandle = <0xac>;
+
+ io-domains {
+ compatible = "rockchip,px30-pmu-io-voltage-domain";
+ status = "okay";
+ pmuio1-supply = <0x29>;
+ pmuio2-supply = <0x29>;
+ phandle = <0xcf>;
+ };
+
+ reboot-mode {
+ compatible = "syscon-reboot-mode";
+ offset = <0x200>;
+ mode-bootloader = <0x5242c301>;
+ mode-charge = <0x5242c30b>;
+ mode-fastboot = <0x5242c309>;
+ mode-loader = <0x5242c301>;
+ mode-normal = <0x5242c300>;
+ mode-recovery = <0x5242c303>;
+ mode-ums = <0x5242c30c>;
+ };
+
+ pmu-pvtm {
+ compatible = "rockchip,px30-pmu-pvtm";
+ clocks = <0x2a 0x07>;
+ clock-names = "pmu";
+ status = "okay";
+ phandle = <0xd0>;
+ };
+ };
+
+ serial@ff030000 {
+ compatible = "rockchip,px30-uart\0snps,dw-apb-uart";
+ reg = <0x00 0xff030000 0x00 0x100>;
+ interrupts = <0x00 0x0f 0x04>;
+ clocks = <0x2a 0x06 0x2a 0x15>;
+ clock-names = "baudclk\0apb_pclk";
+ reg-shift = <0x02>;
+ reg-io-width = <0x04>;
+ dmas = <0x2b 0x00 0x2b 0x01>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x2c 0x2d 0x2e>;
+ status = "disabled";
+ phandle = <0xd1>;
+ };
+
+ i2s@ff060000 {
+ compatible = "rockchip,px30-i2s-tdm";
+ reg = <0x00 0xff060000 0x00 0x1000>;
+ interrupts = <0x00 0x0c 0x04>;
+ clocks = <0x02 0x10 0x02 0x12 0x02 0x106>;
+ clock-names = "mclk_tx\0mclk_rx\0hclk";
+ dmas = <0x2b 0x10 0x2b 0x11>;
+ dma-names = "tx\0rx";
+ resets = <0x02 0x84 0x02 0xbf>;
+ reset-names = "tx-m\0rx-m";
+ rockchip,cru = <0x02>;
+ rockchip,grf = <0x2f>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x30 0x31 0x32 0x33 0x34 0x35 0x36 0x37 0x38 0x39 0x3a 0x3b>;
+ status = "disabled";
+ phandle = <0xd2>;
+ };
+
+ i2s@ff070000 {
+ compatible = "rockchip,px30-i2s\0rockchip,rk3066-i2s";
+ reg = <0x00 0xff070000 0x00 0x1000>;
+ interrupts = <0x00 0x0d 0x04>;
+ clocks = <0x02 0x14 0x02 0x107>;
+ clock-names = "i2s_clk\0i2s_hclk";
+ dmas = <0x2b 0x12 0x2b 0x13>;
+ dma-names = "tx\0rx";
+ resets = <0x02 0x86 0x02 0x85>;
+ reset-names = "reset-m\0reset-h";
+ pinctrl-names = "default";
+ pinctrl-0 = <0x3c 0x3d 0x3e 0x3f>;
+ status = "okay";
+ #sound-dai-cells = <0x00>;
+ phandle = <0xc2>;
+ };
+
+ i2s@ff080000 {
+ compatible = "rockchip,px30-i2s\0rockchip,rk3066-i2s";
+ reg = <0x00 0xff080000 0x00 0x1000>;
+ interrupts = <0x00 0x0e 0x04>;
+ clocks = <0x02 0x16 0x02 0x108>;
+ clock-names = "i2s_clk\0i2s_hclk";
+ dmas = <0x2b 0x14 0x2b 0x15>;
+ dma-names = "tx\0rx";
+ resets = <0x02 0x88 0x02 0x87>;
+ reset-names = "reset-m\0reset-h";
+ pinctrl-names = "default";
+ pinctrl-0 = <0x40 0x41 0x42 0x43>;
+ status = "disabled";
+ phandle = <0xd3>;
+ };
+
+ pdm@ff0a0000 {
+ compatible = "rockchip,px30-pdm\0rockchip,pdm";
+ reg = <0x00 0xff0a0000 0x00 0x1000>;
+ clocks = <0x02 0x0f 0x02 0x105>;
+ clock-names = "pdm_clk\0pdm_hclk";
+ dmas = <0x2b 0x18>;
+ dma-names = "rx";
+ resets = <0x02 0x82>;
+ reset-names = "pdm-m";
+ pinctrl-names = "default";
+ pinctrl-0 = <0x44 0x45 0x46 0x47 0x48 0x49>;
+ status = "disabled";
+ phandle = <0xd4>;
+ };
+
+ crypto@ff0b0000 {
+ compatible = "rockchip,px30-crypto";
+ reg = <0x00 0xff0b0000 0x00 0x4000>;
+ interrupts = <0x00 0x52 0x04>;
+ clocks = <0x02 0xac 0x02 0xf1 0x02 0x30 0x02 0x31>;
+ clock-names = "aclk\0hclk\0sclk\0apb_pclk";
+ resets = <0x02 0x74>;
+ reset-names = "crypto-rst";
+ status = "disabled";
+ phandle = <0xd5>;
+ };
+
+ rng@ff0b0000 {
+ compatible = "rockchip,cryptov2-rng";
+ reg = <0x00 0xff0b0000 0x00 0x4000>;
+ clocks = <0x02 0x30 0x02 0x31 0x02 0xac 0x02 0xf1>;
+ clock-names = "clk_crypto\0clk_crypto_apk\0aclk_crypto\0hclk_crypto";
+ assigned-clocks = <0x02 0x30 0x02 0x31 0x02 0xac 0x02 0xf1>;
+ assigned-clock-rates = <0x8f0d180 0x8f0d180 0xbebc200 0x5f5e100>;
+ resets = <0x02 0x74>;
+ reset-names = "reset";
+ status = "okay";
+ phandle = <0xd6>;
+ };
+
+ interrupt-controller@ff131000 {
+ compatible = "arm,gic-400";
+ #interrupt-cells = <0x03>;
+ #address-cells = <0x00>;
+ interrupt-controller;
+ reg = <0x00 0xff131000 0x00 0x1000 0x00 0xff132000 0x00 0x2000 0x00 0xff134000 0x00 0x2000 0x00 0xff136000 0x00 0x2000>;
+ interrupts = <0x01 0x09 0xf04>;
+ phandle = <0x01>;
+ };
+
+ syscon@ff140000 {
+ compatible = "rockchip,px30-grf\0syscon\0simple-mfd";
+ reg = <0x00 0xff140000 0x00 0x1000>;
+ #address-cells = <0x01>;
+ #size-cells = <0x01>;
+ phandle = <0x2f>;
+
+ io-domains {
+ compatible = "rockchip,px30-io-voltage-domain";
+ status = "okay";
+ vccio1-supply = <0x4a>;
+ vccio2-supply = <0x4a>;
+ vccio3-supply = <0x4b>;
+ vccio4-supply = <0x4b>;
+ vccio5-supply = <0x4b>;
+ vccio6-supply = <0x4b>;
+ phandle = <0xd7>;
+ };
+
+ lvds {
+ compatible = "rockchip,px30-lvds";
+ phys = <0x4c>;
+ phy-names = "phy";
+ status = "disabled";
+ phandle = <0xd8>;
+
+ ports {
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+
+ port@0 {
+ reg = <0x00>;
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+
+ endpoint@0 {
+ reg = <0x00>;
+ remote-endpoint = <0x12>;
+ phandle = <0xa2>;
+ };
+ };
+ };
+ };
+
+ rgb {
+ compatible = "rockchip,px30-rgb";
+ pinctrl-names = "default\0sleep";
+ pinctrl-0 = <0x4d>;
+ pinctrl-1 = <0x4e>;
+ status = "disabled";
+ phys = <0x4c>;
+ phy-names = "phy";
+ phandle = <0xd9>;
+
+ ports {
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+
+ port@0 {
+ reg = <0x00>;
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+
+ endpoint@0 {
+ reg = <0x00>;
+ remote-endpoint = <0x14>;
+ phandle = <0xa4>;
+ };
+ };
+ };
+ };
+ };
+
+ syscon@ff148000 {
+ compatible = "syscon\0simple-mfd";
+ reg = <0x00 0xff148000 0x00 0x1000>;
+ #address-cells = <0x01>;
+ #size-cells = <0x01>;
+ phandle = <0xda>;
+
+ pvtm {
+ compatible = "rockchip,px30-pvtm";
+ clocks = <0x02 0x4a>;
+ clock-names = "core";
+ status = "okay";
+ phandle = <0xdb>;
+ };
+ };
+
+ serial@ff158000 {
+ compatible = "rockchip,px30-uart\0snps,dw-apb-uart";
+ reg = <0x00 0xff158000 0x00 0x100>;
+ interrupts = <0x00 0x10 0x04>;
+ clocks = <0x02 0x18 0x02 0x149>;
+ clock-names = "baudclk\0apb_pclk";
+ reg-shift = <0x02>;
+ reg-io-width = <0x04>;
+ dmas = <0x2b 0x02 0x2b 0x03>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x4f 0x50>;
+ status = "okay";
+ phandle = <0xdc>;
+ };
+
+ serial@ff160000 {
+ compatible = "rockchip,px30-uart\0snps,dw-apb-uart";
+ reg = <0x00 0xff160000 0x00 0x100>;
+ interrupts = <0x00 0x11 0x04>;
+ clocks = <0x02 0x19 0x02 0x14a>;
+ clock-names = "baudclk\0apb_pclk";
+ reg-shift = <0x02>;
+ reg-io-width = <0x04>;
+ dmas = <0x2b 0x04 0x2b 0x05>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x51>;
+ status = "disabled";
+ phandle = <0xdd>;
+ };
+
+ serial@ff168000 {
+ compatible = "rockchip,px30-uart\0snps,dw-apb-uart";
+ reg = <0x00 0xff168000 0x00 0x100>;
+ interrupts = <0x00 0x12 0x04>;
+ clocks = <0x02 0x1a 0x02 0x14b>;
+ clock-names = "baudclk\0apb_pclk";
+ reg-shift = <0x02>;
+ reg-io-width = <0x04>;
+ dmas = <0x2b 0x06 0x2b 0x07>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x52 0x53 0x54>;
+ status = "disabled";
+ phandle = <0xde>;
+ };
+
+ serial@ff170000 {
+ compatible = "rockchip,px30-uart\0snps,dw-apb-uart";
+ reg = <0x00 0xff170000 0x00 0x100>;
+ interrupts = <0x00 0x13 0x04>;
+ clocks = <0x02 0x1b 0x02 0x14c>;
+ clock-names = "baudclk\0apb_pclk";
+ reg-shift = <0x02>;
+ reg-io-width = <0x04>;
+ dmas = <0x2b 0x08 0x2b 0x09>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x55 0x56 0x57>;
+ status = "disabled";
+ phandle = <0xdf>;
+ };
+
+ serial@ff178000 {
+ compatible = "rockchip,px30-uart\0snps,dw-apb-uart";
+ reg = <0x00 0xff178000 0x00 0x100>;
+ interrupts = <0x00 0x14 0x04>;
+ clocks = <0x02 0x1c 0x02 0x14d>;
+ clock-names = "baudclk\0apb_pclk";
+ reg-shift = <0x02>;
+ reg-io-width = <0x04>;
+ dmas = <0x2b 0x0a 0x2b 0x0b>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x58 0x59 0x5a>;
+ status = "disabled";
+ phandle = <0xe0>;
+ };
+
+ i2c@ff180000 {
+ compatible = "rockchip,rk3399-i2c";
+ reg = <0x00 0xff180000 0x00 0x1000>;
+ clocks = <0x02 0x1d 0x02 0x14e>;
+ clock-names = "i2c\0pclk";
+ interrupts = <0x00 0x07 0x04>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x5b>;
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+ status = "okay";
+ clock-frequency = <0x61a80>;
+ i2c-scl-rising-time-ns = <0x118>;
+ i2c-scl-falling-time-ns = <0x10>;
+ phandle = <0xe1>;
+
+ pmic@20 {
+ compatible = "rockchip,rk817";
+ reg = <0x20>;
+ interrupt-parent = <0x5c>;
+ interrupts = <0x0a 0x08>;
+ pinctrl-names = "default\0pmic-sleep\0pmic-power-off\0pmic-reset";
+ pinctrl-0 = <0x5d>;
+ pinctrl-1 = <0x5e 0x5f>;
+ pinctrl-2 = <0x60 0x61>;
+ pinctrl-3 = <0x62 0x63>;
+ rockchip,system-power-controller;
+ wakeup-source;
+ #clock-cells = <0x01>;
+ clock-output-names = "rk808-clkout1\0rk808-clkout2";
+ pmic-reset-func = <0x01>;
+ vcc1-supply = <0x64>;
+ vcc2-supply = <0x64>;
+ vcc3-supply = <0x64>;
+ vcc4-supply = <0x64>;
+ vcc5-supply = <0x64>;
+ vcc6-supply = <0x64>;
+ vcc7-supply = <0x64>;
+ vcc8-supply = <0x64>;
+ vcc9-supply = <0x65>;
+ phandle = <0xe2>;
+
+ pwrkey {
+ status = "okay";
+ };
+
+ pinctrl_rk8xx {
+ gpio-controller;
+ #gpio-cells = <0x02>;
+ phandle = <0xe3>;
+
+ rk817_ts_gpio1 {
+ pins = "gpio_ts";
+ function = "pin_fun1";
+ phandle = <0xe4>;
+ };
+
+ rk817_gt_gpio2 {
+ pins = "gpio_gt";
+ function = "pin_fun1";
+ phandle = <0xe5>;
+ };
+
+ rk817_pin_ts {
+ pins = "gpio_ts";
+ function = "pin_fun0";
+ phandle = <0xe6>;
+ };
+
+ rk817_pin_gt {
+ pins = "gpio_gt";
+ function = "pin_fun0";
+ phandle = <0xe7>;
+ };
+
+ rk817_slppin_null {
+ pins = "gpio_slp";
+ function = "pin_fun0";
+ phandle = <0xe8>;
+ };
+
+ rk817_slppin_slp {
+ pins = "gpio_slp";
+ function = "pin_fun1";
+ phandle = <0x5f>;
+ };
+
+ rk817_slppin_pwrdn {
+ pins = "gpio_slp";
+ function = "pin_fun2";
+ phandle = <0x61>;
+ };
+
+ rk817_slppin_rst {
+ pins = "gpio_slp";
+ function = "pin_fun3";
+ phandle = <0x63>;
+ };
+ };
+
+ regulators {
+
+ DCDC_REG1 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <0xe7ef0>;
+ regulator-max-microvolt = <0x118c30>;
+ regulator-ramp-delay = <0x1771>;
+ regulator-initial-mode = <0x02>;
+ regulator-name = "vdd_logic";
+ phandle = <0x0e>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <0xe7ef0>;
+ };
+ };
+
+ DCDC_REG2 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <0xe7ef0>;
+ regulator-max-microvolt = <0x149970>;
+ regulator-ramp-delay = <0x1771>;
+ regulator-initial-mode = <0x02>;
+ regulator-name = "vdd_arm";
+ phandle = <0x06>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <0xe7ef0>;
+ };
+ };
+
+ DCDC_REG3 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-initial-mode = <0x02>;
+ regulator-name = "vcc_ddr";
+ phandle = <0xe9>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ };
+ };
+
+ DCDC_REG4 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <0x325aa0>;
+ regulator-max-microvolt = <0x325aa0>;
+ regulator-initial-mode = <0x02>;
+ regulator-name = "vcc_3v3";
+ phandle = <0x4b>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <0x325aa0>;
+ };
+ };
+
+ LDO_REG1 {
+ regulator-min-microvolt = <0xf4240>;
+ regulator-max-microvolt = <0xf4240>;
+ regulator-name = "vcc_1v0";
+ phandle = <0xea>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <0xf4240>;
+ };
+ };
+
+ LDO_REG2 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <0x1b7740>;
+ regulator-max-microvolt = <0x1b7740>;
+ regulator-name = "vcc1v8_soc";
+ phandle = <0x88>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <0x1b7740>;
+ };
+ };
+
+ LDO_REG3 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <0xf4240>;
+ regulator-max-microvolt = <0xf4240>;
+ regulator-name = "vcc1v0_soc";
+ phandle = <0xeb>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <0xf4240>;
+ };
+ };
+
+ LDO_REG4 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <0x325aa0>;
+ regulator-max-microvolt = <0x325aa0>;
+ regulator-name = "vcc3v3_pmu";
+ phandle = <0x29>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <0x325aa0>;
+ };
+ };
+
+ LDO_REG5 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <0x1b7740>;
+ regulator-max-microvolt = <0x1b7740>;
+ regulator-name = "vccio_sd";
+ phandle = <0x4a>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <0x1b7740>;
+ };
+ };
+
+ LDO_REG6 {
+ regulator-min-microvolt = <0x1b7740>;
+ regulator-max-microvolt = <0x2dc6c0>;
+ regulator-boot-on;
+ regulator-name = "vcc_sd";
+ phandle = <0x93>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <0x2dc6c0>;
+ };
+ };
+
+ LDO_REG7 {
+ regulator-min-microvolt = <0x325aa0>;
+ regulator-max-microvolt = <0x325aa0>;
+ regulator-name = "vcc_backlight";
+ phandle = <0x9e>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <0x325aa0>;
+ };
+ };
+
+ LDO_REG8 {
+ regulator-min-microvolt = <0x2ab980>;
+ regulator-max-microvolt = <0x2ab980>;
+ regulator-name = "vcc_lcd";
+ phandle = <0x9f>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <0x2ab980>;
+ };
+ };
+
+ BOOST {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <0x4c4b40>;
+ regulator-max-microvolt = <0x5265c0>;
+ regulator-name = "boost";
+ phandle = <0x65>;
+ };
+
+ OTG_SWITCH {
+ regulator-boot-on;
+ regulator-name = "otg_switch";
+ phandle = <0xec>;
+ };
+ };
+
+ battery {
+ compatible = "rk817,battery";
+ ocv_table = <0xc5d 0xc94 0xcd0 0xd02 0xd34 0xd66 0xd98 0xdca 0xdfc 0xe2e 0xe56 0xe7e 0xea6 0xece 0xef6 0xf1e 0xf46 0xf6e 0xf96 0xf9b 0xfa0>;
+ design_capacity = <0xd34>;
+ design_qmax = <0xe86>;
+ bat_res = <0x64>;
+ sleep_enter_current = <0x12c>;
+ sleep_exit_current = <0x12c>;
+ sleep_filter_current = <0x64>;
+ power_off_thresd = <0xbb8>;
+ zero_algorithm_vol = <0xf0a>;
+ max_soc_offset = <0x3c>;
+ monitor_sec = <0x05>;
+ virtual_power = <0x00>;
+ sample_res = <0x0a>;
+ };
+
+ charger {
+ compatible = "rk817,charger";
+ min_input_voltage = <0x1194>;
+ max_input_current = <0x5dc>;
+ max_chrg_current = <0x7d0>;
+ max_chrg_voltage = <0x1068>;
+ chrg_term_mode = <0x00>;
+ chrg_finish_cur = <0x34>;
+ virtual_power = <0x00>;
+ sample_res = <0x0a>;
+ dc_det_gpio = <0x5c 0x0b 0x00>;
+ bat_low_gpio = <0x66 0x0d 0x00>;
+ extcon = <0x67>;
+ };
+
+ codec {
+ #sound-dai-cells = <0x00>;
+ compatible = "rockchip,rk817-codec";
+ clocks = <0x02 0x15>;
+ clock-names = "mclk";
+ pinctrl-names = "default";
+ pinctrl-0 = <0x68>;
+ hp-volume = <0x14>;
+ spk-volume = <0x03>;
+ status = "okay";
+ phandle = <0xc3>;
+ };
+ };
+ };
+
+ i2c@ff190000 {
+ compatible = "rockchip,rk3399-i2c";
+ reg = <0x00 0xff190000 0x00 0x1000>;
+ clocks = <0x02 0x1e 0x02 0x14f>;
+ clock-names = "i2c\0pclk";
+ interrupts = <0x00 0x08 0x04>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x69>;
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+ status = "okay";
+ clock-frequency = <0x61a80>;
+ phandle = <0xed>;
+ };
+
+ i2c@ff1a0000 {
+ compatible = "rockchip,rk3399-i2c";
+ reg = <0x00 0xff1a0000 0x00 0x1000>;
+ clocks = <0x02 0x1f 0x02 0x150>;
+ clock-names = "i2c\0pclk";
+ interrupts = <0x00 0x09 0x04>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x6a>;
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+ status = "disabled";
+ phandle = <0xee>;
+ };
+
+ i2c@ff1b0000 {
+ compatible = "rockchip,rk3399-i2c";
+ reg = <0x00 0xff1b0000 0x00 0x1000>;
+ clocks = <0x02 0x20 0x02 0x151>;
+ clock-names = "i2c\0pclk";
+ interrupts = <0x00 0x0a 0x04>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x6b>;
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+ status = "disabled";
+ phandle = <0xef>;
+ };
+
+ spi@ff1d0000 {
+ compatible = "rockchip,px30-spi\0rockchip,rk3066-spi";
+ reg = <0x00 0xff1d0000 0x00 0x1000>;
+ interrupts = <0x00 0x1a 0x04>;
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+ clocks = <0x02 0x24 0x02 0x155>;
+ clock-names = "spiclk\0apb_pclk";
+ dmas = <0x2b 0x0c 0x2b 0x0d>;
+ dma-names = "tx\0rx";
+ pinctrl-names = "default\0high_speed";
+ pinctrl-0 = <0x6c 0x6d 0x6e 0x6f>;
+ pinctrl-1 = <0x70 0x6d 0x71 0x72>;
+ status = "disabled";
+ phandle = <0xf0>;
+ };
+
+ spi@ff1d8000 {
+ compatible = "rockchip,px30-spi\0rockchip,rk3066-spi";
+ reg = <0x00 0xff1d8000 0x00 0x1000>;
+ interrupts = <0x00 0x1b 0x04>;
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+ clocks = <0x02 0x25 0x02 0x156>;
+ clock-names = "spiclk\0apb_pclk";
+ dmas = <0x2b 0x0e 0x2b 0x0f>;
+ dma-names = "tx\0rx";
+ pinctrl-names = "default\0high_speed";
+ pinctrl-0 = <0x73 0x74 0x75 0x76 0x77>;
+ pinctrl-1 = <0x78 0x74 0x75 0x79 0x7a>;
+ status = "disabled";
+ phandle = <0xf1>;
+ };
+
+ watchdog@ff1e0000 {
+ compatible = "snps,dw-wdt";
+ reg = <0x00 0xff1e0000 0x00 0x100>;
+ clocks = <0x02 0x15b>;
+ interrupts = <0x00 0x25 0x04>;
+ resets = <0x02 0xb5>;
+ reset-names = "reset";
+ status = "disabled";
+ phandle = <0xf2>;
+ };
+
+ pwm@ff200000 {
+ compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm";
+ reg = <0x00 0xff200000 0x00 0x10>;
+ #pwm-cells = <0x03>;
+ pinctrl-names = "active";
+ pinctrl-0 = <0x7b>;
+ clocks = <0x02 0x22 0x02 0x153>;
+ clock-names = "pwm\0pclk";
+ status = "okay";
+ phandle = <0xbc>;
+ };
+
+ pwm@ff200010 {
+ compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm";
+ reg = <0x00 0xff200010 0x00 0x10>;
+ #pwm-cells = <0x03>;
+ pinctrl-names = "active";
+ pinctrl-0 = <0x7c>;
+ clocks = <0x02 0x22 0x02 0x153>;
+ clock-names = "pwm\0pclk";
+ status = "okay";
+ phandle = <0xc1>;
+ };
+
+ pwm@ff200020 {
+ compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm";
+ reg = <0x00 0xff200020 0x00 0x10>;
+ #pwm-cells = <0x03>;
+ pinctrl-names = "active";
+ pinctrl-0 = <0x7d>;
+ clocks = <0x02 0x22 0x02 0x153>;
+ clock-names = "pwm\0pclk";
+ status = "disabled";
+ phandle = <0xf3>;
+ };
+
+ pwm@ff200030 {
+ compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm";
+ reg = <0x00 0xff200030 0x00 0x10>;
+ #pwm-cells = <0x03>;
+ pinctrl-names = "active";
+ pinctrl-0 = <0x7e>;
+ clocks = <0x02 0x22 0x02 0x153>;
+ clock-names = "pwm\0pclk";
+ status = "disabled";
+ phandle = <0xf4>;
+ };
+
+ pwm@ff208000 {
+ compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm";
+ reg = <0x00 0xff208000 0x00 0x10>;
+ #pwm-cells = <0x03>;
+ pinctrl-names = "active";
+ pinctrl-0 = <0x7f>;
+ clocks = <0x02 0x23 0x02 0x154>;
+ clock-names = "pwm\0pclk";
+ status = "disabled";
+ phandle = <0xf5>;
+ };
+
+ pwm@ff208010 {
+ compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm";
+ reg = <0x00 0xff208010 0x00 0x10>;
+ #pwm-cells = <0x03>;
+ pinctrl-names = "active";
+ pinctrl-0 = <0x80>;
+ clocks = <0x02 0x23 0x02 0x154>;
+ clock-names = "pwm\0pclk";
+ status = "disabled";
+ phandle = <0xf6>;
+ };
+
+ pwm@ff208020 {
+ compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm";
+ reg = <0x00 0xff208020 0x00 0x10>;
+ #pwm-cells = <0x03>;
+ pinctrl-names = "active";
+ pinctrl-0 = <0x81>;
+ clocks = <0x02 0x23 0x02 0x154>;
+ clock-names = "pwm\0pclk";
+ status = "disabled";
+ phandle = <0xf7>;
+ };
+
+ pwm@ff208030 {
+ compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm";
+ reg = <0x00 0xff208030 0x00 0x10>;
+ #pwm-cells = <0x03>;
+ pinctrl-names = "active";
+ pinctrl-0 = <0x82>;
+ clocks = <0x02 0x23 0x02 0x154>;
+ clock-names = "pwm\0pclk";
+ status = "disabled";
+ phandle = <0xf8>;
+ };
+
+ rktimer@ff210000 {
+ compatible = "rockchip,rk3288-timer";
+ reg = <0x00 0xff210000 0x00 0x1000>;
+ interrupts = <0x00 0x1e 0x04>;
+ clocks = <0x02 0x159 0x02 0x26>;
+ clock-names = "pclk\0timer";
+ phandle = <0xf9>;
+ };
+
+ amba {
+ compatible = "simple-bus";
+ #address-cells = <0x02>;
+ #size-cells = <0x02>;
+ ranges;
+
+ dmac@ff240000 {
+ compatible = "arm,pl330\0arm,primecell";
+ reg = <0x00 0xff240000 0x00 0x4000>;
+ interrupts = <0x00 0x01 0x04 0x00 0x02 0x04>;
+ clocks = <0x02 0xbb>;
+ clock-names = "apb_pclk";
+ #dma-cells = <0x01>;
+ peripherals-req-type-burst;
+ phandle = <0x2b>;
+ };
+ };
+
+ thermal-zones {
+ phandle = <0xfa>;
+
+ soc-thermal {
+ polling-delay-passive = <0x14>;
+ polling-delay = <0x3e8>;
+ sustainable-power = <0x2ee>;
+ thermal-sensors = <0x83 0x00>;
+ phandle = <0xfb>;
+
+ trips {
+
+ trip-point-0 {
+ temperature = <0x11170>;
+ hysteresis = <0x7d0>;
+ type = "passive";
+ phandle = <0xfc>;
+ };
+
+ trip-point-1 {
+ temperature = <0x14c08>;
+ hysteresis = <0x7d0>;
+ type = "passive";
+ phandle = <0x84>;
+ };
+
+ soc-crit {
+ temperature = <0x1c138>;
+ hysteresis = <0x7d0>;
+ type = "critical";
+ phandle = <0xfd>;
+ };
+ };
+
+ cooling-maps {
+
+ map0 {
+ trip = <0x84>;
+ cooling-device = <0x09 0xffffffff 0xffffffff>;
+ contribution = <0x1000>;
+ };
+
+ map1 {
+ trip = <0x84>;
+ cooling-device = <0x85 0xffffffff 0xffffffff>;
+ contribution = <0x1000>;
+ };
+ };
+ };
+
+ gpu-thermal {
+ polling-delay-passive = <0x64>;
+ polling-delay = <0x3e8>;
+ thermal-sensors = <0x83 0x01>;
+ phandle = <0xfe>;
+ };
+ };
+
+ tsadc@ff280000 {
+ compatible = "rockchip,px30-tsadc";
+ reg = <0x00 0xff280000 0x00 0x100>;
+ interrupts = <0x00 0x24 0x04>;
+ rockchip,grf = <0x2f>;
+ clocks = <0x02 0x2c 0x02 0x158>;
+ clock-names = "tsadc\0apb_pclk";
+ assigned-clocks = <0x02 0x2c>;
+ assigned-clock-rates = <0xc350>;
+ resets = <0x02 0xa8>;
+ reset-names = "tsadc-apb";
+ #thermal-sensor-cells = <0x01>;
+ rockchip,hw-tshut-temp = <0x1d4c0>;
+ status = "okay";
+ pinctrl-names = "gpio\0otpout";
+ pinctrl-0 = <0x86>;
+ pinctrl-1 = <0x87>;
+ phandle = <0x83>;
+ };
+
+ saradc@ff288000 {
+ compatible = "rockchip,px30-saradc\0rockchip,rk3399-saradc";
+ reg = <0x00 0xff288000 0x00 0x100>;
+ interrupts = <0x00 0x54 0x04>;
+ #io-channel-cells = <0x01>;
+ clocks = <0x02 0x2d 0x02 0x157>;
+ clock-names = "saradc\0apb_pclk";
+ resets = <0x02 0xa5>;
+ reset-names = "saradc-apb";
+ status = "okay";
+ vref-supply = <0x88>;
+ phandle = <0xbe>;
+ };
+
+ otp@ff290000 {
+ compatible = "rockchip,px30-otp";
+ reg = <0x00 0xff290000 0x00 0x4000>;
+ #address-cells = <0x01>;
+ #size-cells = <0x01>;
+ clocks = <0x02 0x2f 0x02 0x15a 0x02 0x161>;
+ clock-names = "clk_otp\0pclk_otp\0pclk_otp_phy";
+ resets = <0x02 0xb4>;
+ reset-names = "otp_phy";
+ phandle = <0xff>;
+
+ id@7 {
+ reg = <0x07 0x10>;
+ phandle = <0x0f>;
+ };
+
+ cpu-leakage@17 {
+ reg = <0x17 0x01>;
+ phandle = <0x07>;
+ };
+
+ performance@1e {
+ reg = <0x1e 0x01>;
+ bits = <0x04 0x03>;
+ phandle = <0x08>;
+ };
+ };
+
+ clock-controller@ff2b0000 {
+ compatible = "rockchip,px30-cru";
+ reg = <0x00 0xff2b0000 0x00 0x1000>;
+ rockchip,grf = <0x2f>;
+ rockchip,boost = <0x89>;
+ #clock-cells = <0x01>;
+ #reset-cells = <0x01>;
+ assigned-clocks = <0x02 0x04>;
+ assigned-clock-rates = <0x3dfd2400>;
+ phandle = <0x02>;
+ };
+
+ cpu-boost@ff2b8000 {
+ compatible = "syscon";
+ reg = <0x00 0xff2b8000 0x00 0x1000>;
+ rockchip,boost-low-con0 = <0x1032>;
+ rockchip,boost-low-con1 = <0x1441>;
+ rockchip,boost-high-con0 = <0x1036>;
+ rockchip,boost-high-con1 = <0x1441>;
+ rockchip,boost-backup-pll = <0x01>;
+ rockchip,boost-backup-pll-usage = <0x00>;
+ rockchip,boost-switch-threshold = <0x249f00>;
+ rockchip,boost-statis-threshold = <0x100>;
+ rockchip,boost-statis-enable = <0x00>;
+ rockchip,boost-enable = <0x00>;
+ phandle = <0x89>;
+ };
+
+ pmu-clock-controller@ff2bc000 {
+ compatible = "rockchip,px30-pmucru";
+ reg = <0x00 0xff2bc000 0x00 0x1000>;
+ rockchip,grf = <0x2f>;
+ #clock-cells = <0x01>;
+ #reset-cells = <0x01>;
+ assigned-clocks = <0x2a 0x01 0x2a 0x08 0x2a 0x05 0x02 0x07 0x02 0xab 0x02 0xb0 0x02 0xf0 0x02 0xf5 0x02 0x140 0x02 0x49>;
+ assigned-clock-rates = <0x47868c00 0x5f5e100 0x18cba80 0x23c34600 0xbebc200 0xbebc200 0x8f0d180 0x8f0d180 0x5f5e100 0xbebc200>;
+ phandle = <0x2a>;
+ };
+
+ syscon@ff2c0000 {
+ compatible = "rockchip,px30-usb2phy-grf\0syscon\0simple-mfd";
+ reg = <0x00 0xff2c0000 0x00 0x10000>;
+ #address-cells = <0x01>;
+ #size-cells = <0x01>;
+ phandle = <0x100>;
+
+ usb2-phy@100 {
+ compatible = "rockchip,px30-usb2phy\0rockchip,rk3328-usb2phy";
+ reg = <0x100 0x10>;
+ clocks = <0x2a 0x0a>;
+ clock-names = "phyclk";
+ #clock-cells = <0x00>;
+ assigned-clocks = <0x02 0x0e 0x02 0x55>;
+ assigned-clock-parents = <0x67 0x02 0x0e>;
+ clock-output-names = "usb480m_phy";
+ status = "okay";
+ phandle = <0x67>;
+
+ host-port {
+ #phy-cells = <0x00>;
+ interrupts = <0x00 0x44 0x04>;
+ interrupt-names = "linestate";
+ status = "okay";
+ phandle = <0x8c>;
+ };
+
+ otg-port {
+ #phy-cells = <0x00>;
+ interrupts = <0x00 0x42 0x04 0x00 0x41 0x04 0x00 0x40 0x04>;
+ interrupt-names = "otg-bvalid\0otg-id\0linestate";
+ status = "disabled";
+ phandle = <0x8b>;
+ };
+ };
+ };
+
+ video-phy@ff2e0000 {
+ compatible = "rockchip,px30-video-phy";
+ reg = <0x00 0xff2e0000 0x00 0x10000 0x00 0xff450000 0x00 0x10000>;
+ clocks = <0x2a 0x0b 0x02 0x145 0x02 0x144>;
+ clock-names = "ref\0pclk_phy\0pclk_host";
+ #clock-cells = <0x00>;
+ resets = <0x02 0x3e>;
+ reset-names = "rst";
+ power-domains = <0x8a 0x0c>;
+ #phy-cells = <0x00>;
+ status = "okay";
+ phandle = <0x4c>;
+ };
+
+ mipi-dphy-rx0@ff2f0000 {
+ compatible = "rockchip,rk3326-mipi-dphy";
+ reg = <0x00 0xff2f0000 0x00 0x4000>;
+ clocks = <0x02 0x146>;
+ clock-names = "dphy-ref";
+ power-domains = <0x8a 0x0d>;
+ rockchip,grf = <0x2f>;
+ status = "okay";
+ phandle = <0x101>;
+ };
+
+ usb@ff300000 {
+ compatible = "rockchip,px30-usb\0rockchip,rk3066-usb\0snps,dwc2";
+ reg = <0x00 0xff300000 0x00 0x40000>;
+ interrupts = <0x00 0x3e 0x04>;
+ clocks = <0x02 0x102>;
+ clock-names = "otg";
+ power-domains = <0x8a 0x05>;
+ dr_mode = "otg";
+ g-np-tx-fifo-size = <0x10>;
+ g-rx-fifo-size = <0x118>;
+ g-tx-fifo-size = <0x100 0x80 0x80 0x40 0x20 0x10>;
+ g-use-dma;
+ phys = <0x8b>;
+ phy-names = "usb2-phy";
+ status = "okay";
+ phandle = <0x102>;
+ };
+
+ usb@ff340000 {
+ compatible = "generic-ehci";
+ reg = <0x00 0xff340000 0x00 0x10000>;
+ interrupts = <0x00 0x3c 0x04>;
+ clocks = <0x02 0x103 0x67>;
+ clock-names = "usbhost\0utmi";
+ power-domains = <0x8a 0x05>;
+ phys = <0x8c>;
+ phy-names = "usb";
+ status = "disabled";
+ phandle = <0x103>;
+ };
+
+ usb@ff350000 {
+ compatible = "generic-ohci";
+ reg = <0x00 0xff350000 0x00 0x10000>;
+ interrupts = <0x00 0x3d 0x04>;
+ clocks = <0x02 0x103 0x67>;
+ clock-names = "usbhost\0utmi";
+ power-domains = <0x8a 0x05>;
+ phys = <0x8c>;
+ phy-names = "usb";
+ status = "disabled";
+ phandle = <0x104>;
+ };
+
+ ethernet@ff360000 {
+ compatible = "rockchip,px30-gmac";
+ reg = <0x00 0xff360000 0x00 0x10000>;
+ rockchip,grf = <0x2f>;
+ interrupts = <0x00 0x2b 0x04>;
+ interrupt-names = "macirq";
+ clocks = <0x02 0x3e 0x02 0x3f 0x02 0x3f 0x02 0x40 0x02 0x41 0x02 0xb2 0x02 0x143 0x02 0x4c>;
+ clock-names = "stmmaceth\0mac_clk_rx\0mac_clk_tx\0clk_mac_ref\0clk_mac_refout\0aclk_mac\0pclk_mac\0clk_mac_speed";
+ phy-mode = "rmii";
+ pinctrl-names = "default";
+ pinctrl-0 = <0x8d 0x8e>;
+ resets = <0x02 0x5e>;
+ reset-names = "stmmaceth";
+ power-domains = <0x8a 0x09>;
+ status = "disabled";
+ phandle = <0x105>;
+ };
+
+ dwmmc@ff370000 {
+ compatible = "rockchip,px30-dw-mshc\0rockchip,rk3288-dw-mshc";
+ reg = <0x00 0xff370000 0x00 0x4000>;
+ max-frequency = <0x8f0d180>;
+ clocks = <0x02 0xf7 0x02 0x3b 0x02 0x43 0x02 0x44>;
+ clock-names = "biu\0ciu\0ciu-drv\0ciu-sample";
+ assigned-clocks = <0x02 0x3b>;
+ assigned-clock-parents = <0x02 0x57>;
+ power-domains = <0x8a 0x07>;
+ fifo-depth = <0x100>;
+ interrupts = <0x00 0x36 0x04>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x8f 0x90 0x91 0x92>;
+ status = "okay";
+ bus-width = <0x04>;
+ cap-mmc-highspeed;
+ cap-sd-highspeed;
+ supports-sd;
+ card-detect-delay = <0x320>;
+ ignore-pm-notify;
+ cd-gpios = <0x5c 0x03 0x01>;
+ sd-uhs-sdr12;
+ sd-uhs-sdr25;
+ sd-uhs-sdr50;
+ sd-uhs-sdr104;
+ vqmmc-supply = <0x4a>;
+ vmmc-supply = <0x93>;
+ phandle = <0x106>;
+ };
+
+ dwmmc@ff380000 {
+ compatible = "rockchip,px30-dw-mshc\0rockchip,rk3288-dw-mshc";
+ reg = <0x00 0xff380000 0x00 0x4000>;
+ max-frequency = <0x8f0d180>;
+ clocks = <0x02 0xff 0x02 0x38 0x02 0x45 0x02 0x46>;
+ clock-names = "biu\0ciu\0ciu-drv\0ciu-sample";
+ assigned-clocks = <0x02 0x38>;
+ assigned-clock-parents = <0x02 0x51>;
+ power-domains = <0x8a 0x0a>;
+ fifo-depth = <0x100>;
+ interrupts = <0x00 0x37 0x04>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x94 0x95 0x96>;
+ status = "okay";
+ bus-width = <0x04>;
+ cap-mmc-highspeed;
+ cap-sd-highspeed;
+ supports-sd;
+ card-detect-delay = <0x320>;
+ ignore-pm-notify;
+ cd-gpios = <0x97 0x0e 0x01>;
+ sd-uhs-sdr12;
+ sd-uhs-sdr25;
+ sd-uhs-sdr50;
+ sd-uhs-sdr104;
+ vqmmc-supply = <0x4a>;
+ vmmc-supply = <0x93>;
+ phandle = <0x107>;
+ };
+
+ dwmmc@ff390000 {
+ compatible = "rockchip,px30-dw-mshc\0rockchip,rk3288-dw-mshc";
+ reg = <0x00 0xff390000 0x00 0x4000>;
+ max-frequency = <0x8f0d180>;
+ clocks = <0x02 0x100 0x02 0x39 0x02 0x47 0x02 0x48>;
+ clock-names = "biu\0ciu\0ciu-drv\0ciu-sample";
+ assigned-clocks = <0x02 0x39>;
+ assigned-clock-parents = <0x02 0x53>;
+ power-domains = <0x8a 0x0a>;
+ fifo-depth = <0x100>;
+ interrupts = <0x00 0x35 0x04>;
+ status = "disabled";
+ phandle = <0x108>;
+ };
+
+ nandc@ff3b0000 {
+ compatible = "rockchip,rk-nandc";
+ reg = <0x00 0xff3b0000 0x00 0x4000>;
+ interrupts = <0x00 0x39 0x04>;
+ nandc_id = <0x00>;
+ clocks = <0x02 0x37 0x02 0xfe>;
+ clock-names = "clk_nandc\0hclk_nandc";
+ assigned-clocks = <0x02 0x37>;
+ assigned-clock-parents = <0x02 0x4f>;
+ power-domains = <0x8a 0x0a>;
+ status = "disabled";
+ phandle = <0x109>;
+ };
+
+ sfc@ff3a0000 {
+ compatible = "rockchip,sfc";
+ reg = <0x00 0xff3a0000 0x00 0x4000>;
+ interrupts = <0x00 0x38 0x04>;
+ clocks = <0x02 0x3a 0x02 0x101>;
+ clock-names = "clk_sfc\0hclk_sfc";
+ assigned-clocks = <0x02 0x3a>;
+ assigned-clock-rates = <0x989680>;
+ status = "disabled";
+ phandle = <0x10a>;
+ };
+
+ gpu@ff400000 {
+ compatible = "arm,malit602\0arm,malit60x\0arm,malit6xx\0arm,mali-midgard";
+ reg = <0x00 0xff400000 0x00 0x4000>;
+ interrupts = <0x00 0x2d 0x04 0x00 0x2e 0x04 0x00 0x2f 0x04>;
+ interrupt-names = "GPU\0MMU\0JOB";
+ clocks = <0x02 0x49>;
+ clock-names = "clk_mali";
+ power-domains = <0x8a 0x0e>;
+ #cooling-cells = <0x02>;
+ operating-points-v2 = <0x98>;
+ status = "okay";
+ mali-supply = <0x0e>;
+ phandle = <0x85>;
+
+ power_model {
+ compatible = "arm,mali-simple-power-model";
+ static-coefficient = <0x64578>;
+ dynamic-coefficient = <0x2dd>;
+ ts = <0x7d00 0x125c 0xffffffb0 0x02>;
+ thermal-zone = "gpu-thermal";
+ };
+ };
+
+ gpu-opp-table {
+ compatible = "operating-points-v2";
+ rockchip,thermal-zone = "soc-thermal";
+ rockchip,temp-hysteresis = <0x1388>;
+ rockchip,low-temp = <0x00>;
+ rockchip,low-temp-min-volt = <0xf4240>;
+ rockchip,low-temp-adjust-volt = <0x00 0x1e0 0xc350>;
+ rockchip,max-volt = <0x11edd8>;
+ rockchip,evb-irdrop = <0x61a8>;
+ rockchip,pvtm-voltage-sel = <0x00 0xc350 0x00 0xc351 0xd2f0 0x01 0xd2f1 0xea60 0x02 0xea61 0x1869f 0x03>;
+ rockchip,pvtm-ch = <0x00 0x00>;
+ phandle = <0x98>;
+
+ opp-400000000 {
+ opp-hz = <0x00 0x17d78400>;
+ opp-microvolt = <0x100590>;
+ opp-microvolt-L0 = <0x100590>;
+ opp-microvolt-L1 = <0xfa3e8>;
+ opp-microvolt-L2 = <0xee098>;
+ opp-microvolt-L3 = <0xe7ef0>;
+ };
+
+ opp-480000000 {
+ opp-hz = <0x00 0x1c9c3800>;
+ opp-microvolt = <0x112a88>;
+ opp-microvolt-L0 = <0x112a88>;
+ opp-microvolt-L1 = <0x10c8e0>;
+ opp-microvolt-L2 = <0x100590>;
+ opp-microvolt-L3 = <0xf4240>;
+ };
+
+ opp-520000000 {
+ opp-hz = <0x00 0x1efe9200>;
+ opp-microvolt = <0x118c30>;
+ opp-microvolt-L0 = <0x118c30>;
+ opp-microvolt-L1 = <0x118c30>;
+ opp-microvolt-L2 = <0x10c8e0>;
+ opp-microvolt-L3 = <0x100590>;
+ };
+ };
+
+ hevc_service@ff440000 {
+ compatible = "rockchip,hevc_sub";
+ iommu_enabled = <0x01>;
+ reg = <0x00 0xff440000 0x00 0x400>;
+ interrupts = <0x00 0x31 0x04>;
+ interrupt-names = "irq_dec";
+ dev_mode = <0x01>;
+ iommus = <0x99>;
+ allocator = <0x01>;
+ phandle = <0x9c>;
+ };
+
+ vpu_service@ff442000 {
+ compatible = "rockchip,vpu_sub";
+ iommu_enabled = <0x01>;
+ reg = <0x00 0xff442000 0x00 0x800>;
+ interrupts = <0x00 0x50 0x04 0x00 0x4f 0x04>;
+ interrupt-names = "irq_enc\0irq_dec";
+ dev_mode = <0x00>;
+ iommus = <0x9a>;
+ allocator = <0x01>;
+ phandle = <0x9b>;
+ };
+
+ vpu_combo {
+ compatible = "rockchip,vpu_combo";
+ subcnt = <0x02>;
+ rockchip,grf = <0x2f>;
+ rockchip,sub = <0x9b 0x9c>;
+ clocks = <0x02 0xaf 0x02 0xf4 0x02 0x4b>;
+ clock-names = "aclk_vcodec\0hclk_vcodec\0clk_core";
+ resets = <0x02 0x24 0x02 0x26 0x02 0x25 0x02 0x27 0x02 0x3f>;
+ reset-names = "video_a\0video_h\0niu_a\0niu_h\0video_core";
+ power-domains = <0x8a 0x0b>;
+ mode_bit = <0x0f>;
+ mode_ctrl = <0x410>;
+ status = "okay";
+ phandle = <0x10b>;
+ };
+
+ iommu@ff440440 {
+ compatible = "rockchip,iommu";
+ reg = <0x00 0xff440440 0x00 0x40 0x00 0xff440480 0x00 0x40>;
+ interrupts = <0x00 0x32 0x04>;
+ interrupt-names = "hevc_mmu";
+ clocks = <0x02 0xaf 0x02 0xf4>;
+ clock-names = "aclk\0hclk";
+ power-domains = <0x8a 0x0b>;
+ #iommu-cells = <0x00>;
+ phandle = <0x99>;
+ };
+
+ iommu@ff442800 {
+ compatible = "rockchip,iommu";
+ reg = <0x00 0xff442800 0x00 0x100>;
+ interrupts = <0x00 0x51 0x04>;
+ interrupt-names = "vpu_mmu";
+ clocks = <0x02 0xaf 0x02 0xf4>;
+ clock-names = "aclk\0hclk";
+ power-domains = <0x8a 0x0b>;
+ #iommu-cells = <0x00>;
+ phandle = <0x9a>;
+ };
+
+ dsi@ff450000 {
+ compatible = "rockchip,px30-mipi-dsi";
+ reg = <0x00 0xff450000 0x00 0x10000>;
+ interrupts = <0x00 0x4b 0x04>;
+ clocks = <0x02 0x144 0x4c>;
+ clock-names = "pclk\0hs_clk";
+ resets = <0x02 0x3d>;
+ reset-names = "apb";
+ phys = <0x4c>;
+ phy-names = "mipi_dphy";
+ power-domains = <0x8a 0x0c>;
+ rockchip,grf = <0x2f>;
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+ status = "okay";
+ phandle = <0x10c>;
+
+ ports {
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+
+ port@0 {
+ reg = <0x00>;
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+
+ endpoint@0 {
+ reg = <0x00>;
+ remote-endpoint = <0x13>;
+ status = "okay";
+ phandle = <0xa3>;
+ };
+ };
+ };
+
+ panel@0 {
+ compatible = "elida,kd35t133\0simple-panel-dsi";
+ reg = <0x00>;
+ backlight = <0x9d>;
+ backlight-supply = <0x9e>;
+ power-supply = <0x9f>;
+ reset-gpios = <0x97 0x10 0x01>;
+ reset-delay-ms = <0x96>;
+ init-delay-ms = <0x14>;
+ enable-delay-ms = <0x78>;
+ prepare-delay-ms = <0x14>;
+ unprepare-delay-ms = <0x14>;
+ disable-delay-ms = <0x32>;
+ width-mm = <0x34>;
+ height-mm = <0x46>;
+ dsi,flags = <0xa03>;
+ dsi,format = <0x00>;
+ dsi,lanes = <0x04>;
+ panel-init-sequence = [39 00 03 e0 ab ba 39 00 03 e1 ba ab 39 00 05 b1 10 01 47 ff 39 00 07 b2 0c 08 04 50 50 14 39 00 04 b3 56 12 e0 39 00 04 b4 33 30 04 39 00 08 b6 b0 00 00 10 00 10 00 39 00 06 b8 05 12 29 49 48 39 00 27 b9 7f 63 52 45 42 34 39 24 3e 3d 3c 59 46 4d 3e 3d 30 22 00 7f 63 52 45 42 34 39 24 3e 3d 3c 59 46 4d 3e 3d 30 22 00 39 00 11 c0 32 10 12 34 22 22 22 22 90 04 90 04 0f 00 00 c1 39 00 0b c1 12 9f 8e 89 90 04 90 04 54 40 39 00 0d c2 77 09 08 89 08 11 22 33 44 87 18 00 39 00 17 c3 88 4a 24 24 1e 1f 12 0c 0e 10 04 06 24 24 02 02 02 02 02 02 02 02 39 00 17 c4 09 0b 24 24 1e 1f 13 0d 0f 11 05 07 24 24 02 02 02 02 02 02 02 02 39 00 03 c6 46 55 39 00 07 c8 12 00 31 42 34 16 39 00 03 ca 18 43 39 00 09 cd 0e 64 64 2c 16 6b 06 b3 39 00 05 d2 e3 2b 38 08 39 00 0c d4 00 01 00 0e 04 44 08 10 00 00 00 39 00 09 e6 80 09 ff ff ff ff ff ff 39 00 06 f0 12 03 20 00 ff 15 00 02 f3 03 05 c8 01 11 05 14 01 29];
+ panel-exit-sequence = <0x5140128 0x50a0110>;
+
+ display-timings {
+ native-mode = <0xa0>;
+
+ 60Hz {
+ clock-frequency = <0x1ba8140>;
+ hactive = <0x280>;
+ vactive = <0x1e0>;
+ hfront-porch = <0x50>;
+ hsync-len = <0x14>;
+ hback-porch = <0x50>;
+ vfront-porch = <0x14>;
+ vsync-len = <0x04>;
+ vback-porch = <0x0c>;
+ hsync-active = <0x00>;
+ vsync-active = <0x00>;
+ de-active = <0x00>;
+ pixelclk-active = <0x01>;
+ phandle = <0xa0>;
+ };
+
+ 50Hz {
+ clock-frequency = <0x1ba8140>;
+ hactive = <0x280>;
+ vactive = <0x1e0>;
+ hfront-porch = <0x50>;
+ hsync-len = <0x14>;
+ hback-porch = <0x50>;
+ vfront-porch = <0x14>;
+ vsync-len = <0x04>;
+ vback-porch = <0x0c>;
+ hsync-active = <0x00>;
+ vsync-active = <0x00>;
+ de-active = <0x00>;
+ pixelclk-active = <0x01>;
+ phandle = <0xa00>;
+ };
+
+ 75Hz {
+ clock-frequency = <0x1ba8140>;
+ hactive = <0x280>;
+ vactive = <0x1e0>;
+ hfront-porch = <0x50>;
+ hsync-len = <0x14>;
+ hback-porch = <0x50>;
+ vfront-porch = <0x14>;
+ vsync-len = <0x04>;
+ vback-porch = <0x0c>;
+ hsync-active = <0x00>;
+ vsync-active = <0x00>;
+ de-active = <0x00>;
+ pixelclk-active = <0x01>;
+ phandle = <0xa01>;
+ };
+ };
+ };
+ };
+
+ vop@ff460000 {
+ compatible = "rockchip,px30-vop-big";
+ reg = <0x00 0xff460000 0x00 0x1fc 0x00 0xff460a00 0x00 0x400>;
+ rockchip,grf = <0x2f>;
+ reg-names = "regs\0gamma_lut";
+ interrupts = <0x00 0x4d 0x04>;
+ clocks = <0x02 0xb5 0x02 0x96 0x02 0xfb>;
+ clock-names = "aclk_vop\0dclk_vop\0hclk_vop";
+ power-domains = <0x8a 0x0c>;
+ iommus = <0xa1>;
+ status = "okay";
+ phandle = <0x10f>;
+
+ port {
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+ phandle = <0x10>;
+
+ endpoint@0 {
+ reg = <0x00>;
+ remote-endpoint = <0xa2>;
+ phandle = <0x12>;
+ };
+
+ endpoint@1 {
+ reg = <0x01>;
+ remote-endpoint = <0xa3>;
+ phandle = <0x13>;
+ };
+
+ endpoint@2 {
+ reg = <0x02>;
+ remote-endpoint = <0xa4>;
+ phandle = <0x14>;
+ };
+ };
+ };
+
+ iommu@ff460f00 {
+ compatible = "rockchip,iommu";
+ reg = <0x00 0xff460f00 0x00 0x100>;
+ interrupts = <0x00 0x4d 0x04>;
+ interrupt-names = "vopb_mmu";
+ clocks = <0x02 0xb5 0x02 0xfb>;
+ clock-names = "aclk\0hclk";
+ power-domains = <0x8a 0x0c>;
+ #iommu-cells = <0x00>;
+ status = "okay";
+ phandle = <0xa1>;
+ };
+
+ rk_rga@ff480000 {
+ compatible = "rockchip,rga2";
+ reg = <0x00 0xff480000 0x00 0x1000>;
+ interrupts = <0x00 0x4c 0x04>;
+ clocks = <0x02 0xb7 0x02 0xfd 0x02 0x35>;
+ clock-names = "aclk_rga\0hclk_rga\0clk_rga";
+ power-domains = <0x8a 0x0c>;
+ dma-coherent;
+ status = "okay";
+ phandle = <0x110>;
+ };
+
+ cif@ff490000 {
+ compatible = "rockchip,cif";
+ reg = <0x00 0xff490000 0x00 0x200>;
+ interrupts = <0x00 0x45 0x04>;
+ clocks = <0x02 0xb3 0x02 0xf9 0x02 0x160 0x02 0x34>;
+ clock-names = "aclk_cif0\0hclk_cif0\0pclk_cif\0cif0_out";
+ resets = <0x02 0x2c 0x02 0x2d 0x02 0x2e>;
+ reset-names = "rst_cif_a\0rst_cif_h\0rst_cif_pclkin";
+ power-domains = <0x8a 0x0d>;
+ pinctrl-names = "cif_pin_all";
+ pinctrl-0 = <0xa5>;
+ iommus = <0xa6>;
+ status = "disabled";
+ phandle = <0x111>;
+ };
+
+ cif-new@ff490000 {
+ compatible = "rockchip,px30-cif";
+ reg = <0x00 0xff490000 0x00 0x200>;
+ interrupts = <0x00 0x45 0x04>;
+ clocks = <0x02 0xb3 0x02 0xf9 0x02 0x160 0x02 0x34>;
+ clock-names = "aclk_cif\0hclk_cif\0pclk_cif\0cif_out";
+ resets = <0x02 0x2c 0x02 0x2d 0x02 0x2e>;
+ reset-names = "rst_cif_a\0rst_cif_h\0rst_cif_pclkin";
+ power-domains = <0x8a 0x0d>;
+ iommus = <0xa6>;
+ status = "disabled";
+ phandle = <0x112>;
+ };
+
+ iommu@ff490800 {
+ compatible = "rockchip,iommu";
+ reg = <0x00 0xff490800 0x00 0x100>;
+ interrupts = <0x00 0x45 0x04>;
+ interrupt-names = "vip_mmu";
+ clocks = <0x02 0xb3 0x02 0xf9>;
+ clock-names = "aclk\0hclk";
+ power-domains = <0x8a 0x0d>;
+ rk_iommu,disable_reset_quirk;
+ #iommu-cells = <0x00>;
+ status = "okay";
+ phandle = <0xa6>;
+ };
+
+ rk_isp@ff4a0000 {
+ compatible = "rockchip,px30-isp\0rockchip,isp";
+ reg = <0x00 0xff4a0000 0x00 0x8000>;
+ interrupts = <0x00 0x46 0x04>;
+ clocks = <0x02 0xb4 0x02 0xfa 0x02 0x33 0x02 0x33 0x02 0x15f 0x02 0x34 0x02 0x34 0x02 0x146>;
+ clock-names = "aclk_isp\0hclk_isp\0clk_isp\0clk_isp_jpe\0pclkin_isp\0clk_cif_pll\0clk_cif_out\0pclk_dphyrx";
+ resets = <0x02 0x2b 0x02 0x2f>;
+ reset-names = "rst_isp\0rst_mipicsiphy";
+ power-domains = <0x8a 0x0d>;
+ pinctrl-names = "default\0isp_dvp8bit2\0isp_dvp10bit\0isp_dvp12bit";
+ pinctrl-0 = <0xa7>;
+ pinctrl-1 = <0xa5>;
+ pinctrl-2 = <0xa5 0xa8>;
+ pinctrl-3 = <0xa9 0xa5 0xa8>;
+ rockchip,isp,mipiphy = <0x01>;
+ rockchip,isp,csiphy,reg = <0xff2f0000 0x4000>;
+ rockchip,grf = <0x2f>;
+ rockchip,cru = <0x02>;
+ rockchip,isp,iommu-enable = <0x01>;
+ iommus = <0xaa>;
+ status = "disabled";
+ phandle = <0x113>;
+ };
+
+ rkisp1@ff4a0000 {
+ compatible = "rockchip,rk3326-rkisp1";
+ reg = <0x00 0xff4a0000 0x00 0x8000>;
+ interrupts = <0x00 0x46 0x04 0x00 0x49 0x04 0x00 0x4a 0x04>;
+ interrupt-names = "isp_irq\0mi_irq\0mipi_irq";
+ clocks = <0x02 0xb4 0x02 0xfa 0x02 0x33 0x02 0x15f>;
+ clock-names = "aclk_isp\0hclk_isp\0clk_isp\0pclk_isp";
+ devfreq = <0xab>;
+ power-domains = <0x8a 0x0d>;
+ iommus = <0xaa>;
+ rockchip,grf = <0x2f>;
+ status = "okay";
+ phandle = <0x114>;
+ };
+
+ iommu@ff4a8000 {
+ compatible = "rockchip,iommu";
+ reg = <0x00 0xff4a8000 0x00 0x100>;
+ interrupts = <0x00 0x46 0x04>;
+ interrupt-names = "isp_mmu";
+ clocks = <0x02 0xb4 0x02 0xfa>;
+ clock-names = "aclk\0hclk";
+ power-domains = <0x8a 0x0d>;
+ rk_iommu,disable_reset_quirk;
+ #iommu-cells = <0x00>;
+ status = "okay";
+ phandle = <0xaa>;
+ };
+
+ qos@ff518000 {
+ compatible = "syscon";
+ reg = <0x00 0xff518000 0x00 0x20>;
+ phandle = <0x18>;
+ };
+
+ qos@ff520000 {
+ compatible = "syscon";
+ reg = <0x00 0xff520000 0x00 0x20>;
+ phandle = <0x28>;
+ };
+
+ qos@ff52c000 {
+ compatible = "syscon";
+ reg = <0x00 0xff52c000 0x00 0x20>;
+ phandle = <0x17>;
+ };
+
+ qos@ff538000 {
+ compatible = "syscon";
+ reg = <0x00 0xff538000 0x00 0x20>;
+ phandle = <0x19>;
+ };
+
+ qos@ff538080 {
+ compatible = "syscon";
+ reg = <0x00 0xff538080 0x00 0x20>;
+ phandle = <0x1a>;
+ };
+
+ qos@ff538100 {
+ compatible = "syscon";
+ reg = <0x00 0xff538100 0x00 0x20>;
+ phandle = <0x1b>;
+ };
+
+ qos@ff538180 {
+ compatible = "syscon";
+ reg = <0x00 0xff538180 0x00 0x20>;
+ phandle = <0x1c>;
+ };
+
+ qos@ff540000 {
+ compatible = "syscon";
+ reg = <0x00 0xff540000 0x00 0x20>;
+ phandle = <0x15>;
+ };
+
+ qos@ff540080 {
+ compatible = "syscon";
+ reg = <0x00 0xff540080 0x00 0x20>;
+ phandle = <0x16>;
+ };
+
+ qos@ff548000 {
+ compatible = "syscon";
+ reg = <0x00 0xff548000 0x00 0x20>;
+ phandle = <0x23>;
+ };
+
+ qos@ff548080 {
+ compatible = "syscon";
+ reg = <0x00 0xff548080 0x00 0x20>;
+ phandle = <0x24>;
+ };
+
+ qos@ff548100 {
+ compatible = "syscon";
+ reg = <0x00 0xff548100 0x00 0x20>;
+ phandle = <0x25>;
+ };
+
+ qos@ff548180 {
+ compatible = "syscon";
+ reg = <0x00 0xff548180 0x00 0x20>;
+ phandle = <0x26>;
+ };
+
+ qos@ff548200 {
+ compatible = "syscon";
+ reg = <0x00 0xff548200 0x00 0x20>;
+ phandle = <0x27>;
+ };
+
+ qos@ff550000 {
+ compatible = "syscon";
+ reg = <0x00 0xff550000 0x00 0x20>;
+ phandle = <0x1f>;
+ };
+
+ qos@ff550080 {
+ compatible = "syscon";
+ reg = <0x00 0xff550080 0x00 0x20>;
+ phandle = <0x20>;
+ };
+
+ qos@ff550100 {
+ compatible = "syscon";
+ reg = <0x00 0xff550100 0x00 0x20>;
+ phandle = <0x21>;
+ };
+
+ qos@ff550180 {
+ compatible = "syscon";
+ reg = <0x00 0xff550180 0x00 0x20>;
+ phandle = <0x22>;
+ };
+
+ qos@ff558000 {
+ compatible = "syscon";
+ reg = <0x00 0xff558000 0x00 0x20>;
+ phandle = <0x1d>;
+ };
+
+ qos@ff558080 {
+ compatible = "syscon";
+ reg = <0x00 0xff558080 0x00 0x20>;
+ phandle = <0x1e>;
+ };
+
+ dfi@ff610000 {
+ reg = <0x00 0xff610000 0x00 0x400>;
+ compatible = "rockchip,px30-dfi";
+ rockchip,pmugrf = <0xac>;
+ status = "okay";
+ phandle = <0xad>;
+ };
+
+ dmc {
+ compatible = "rockchip,px30-dmc";
+ interrupts = <0x00 0x69 0x04>;
+ interrupt-names = "complete_irq";
+ devfreq-events = <0xad>;
+ clocks = <0x02 0x54>;
+ clock-names = "dmc_clk";
+ operating-points-v2 = <0xae>;
+ ddr_timing = <0xaf>;
+ upthreshold = <0x28>;
+ downdifferential = <0x14>;
+ system-status-freq = <0x01 0x80e80 0x08 0x6ddd0 0x02 0x2f5d0 0x20 0x6ddd0 0x1000 0x80e80 0x4000 0xa2990 0x2000 0xa2990>;
+ auto-min-freq = <0x50140>;
+ auto-freq-en = <0x01>;
+ #cooling-cells = <0x02>;
+ status = "okay";
+ center-supply = <0x0e>;
+ phandle = <0xab>;
+
+ ddr_power_model {
+ compatible = "ddr_power_model";
+ dynamic-power-coefficient = <0x78>;
+ static-power-coefficient = <0xc8>;
+ ts = <0x7d00 0x125c 0xffffffb0 0x02>;
+ thermal-zone = "soc-thermal";
+ phandle = <0x115>;
+ };
+ };
+
+ dmc-opp-table {
+ compatible = "operating-points-v2";
+ rockchip,max-volt = <0x118c30>;
+ rockchip,evb-irdrop = <0x61a8>;
+ rockchip,pvtm-voltage-sel = <0x00 0xc350 0x00 0xc351 0xd2f0 0x01 0xd2f1 0xea60 0x02 0xea61 0x1869f 0x03>;
+ rockchip,pvtm-ch = <0x00 0x00>;
+ phandle = <0xae>;
+
+ opp-528000000 {
+ opp-hz = <0x00 0x1f78a400>;
+ opp-microvolt = <0xee098>;
+ opp-microvolt-L0 = <0xee098>;
+ opp-microvolt-L1 = <0xee098>;
+ opp-microvolt-L2 = <0xe7ef0>;
+ opp-microvolt-L3 = <0xe7ef0>;
+ };
+
+ opp-666000000 {
+ opp-hz = <0x00 0x27b25a80>;
+ opp-microvolt = <0x100590>;
+ opp-microvolt-L0 = <0x100590>;
+ opp-microvolt-L1 = <0xf4240>;
+ opp-microvolt-L2 = <0xee098>;
+ opp-microvolt-L3 = <0xe7ef0>;
+ };
+
+ opp-786000000 {
+ opp-hz = <0x00 0x2ed96880>;
+ opp-microvolt = <0x10c8e0>;
+ opp-microvolt-L0 = <0x10c8e0>;
+ opp-microvolt-L1 = <0x100590>;
+ opp-microvolt-L2 = <0xfa3e8>;
+ opp-microvolt-L3 = <0xf4240>;
+ status = "okay";
+ };
+ };
+
+ rockchip-system-monitor {
+ compatible = "rockchip,system-monitor";
+ rockchip,thermal-zone = "soc-thermal";
+ rockchip,polling-delay = <0xc8>;
+ phandle = <0x116>;
+ };
+
+ pinctrl {
+ compatible = "rockchip,px30-pinctrl";
+ rockchip,grf = <0x2f>;
+ rockchip,pmu = <0xac>;
+ #address-cells = <0x02>;
+ #size-cells = <0x02>;
+ ranges;
+ phandle = <0x117>;
+
+ gpio0@ff040000 {
+ compatible = "rockchip,gpio-bank";
+ reg = <0x00 0xff040000 0x00 0x100>;
+ interrupts = <0x00 0x03 0x04>;
+ clocks = <0x2a 0x14>;
+ gpio-controller;
+ #gpio-cells = <0x02>;
+ interrupt-controller;
+ #interrupt-cells = <0x02>;
+ phandle = <0x5c>;
+ };
+
+ gpio1@ff250000 {
+ compatible = "rockchip,gpio-bank";
+ reg = <0x00 0xff250000 0x00 0x100>;
+ interrupts = <0x00 0x04 0x04>;
+ clocks = <0x02 0x15c>;
+ gpio-controller;
+ #gpio-cells = <0x02>;
+ interrupt-controller;
+ #interrupt-cells = <0x02>;
+ phandle = <0xbf>;
+ };
+
+ gpio2@ff260000 {
+ compatible = "rockchip,gpio-bank";
+ reg = <0x00 0xff260000 0x00 0x100>;
+ interrupts = <0x00 0x05 0x04>;
+ clocks = <0x02 0x15d>;
+ gpio-controller;
+ #gpio-cells = <0x02>;
+ interrupt-controller;
+ #interrupt-cells = <0x02>;
+ phandle = <0x66>;
+ };
+
+ gpio3@ff270000 {
+ compatible = "rockchip,gpio-bank";
+ reg = <0x00 0xff270000 0x00 0x100>;
+ interrupts = <0x00 0x06 0x04>;
+ clocks = <0x02 0x15e>;
+ gpio-controller;
+ #gpio-cells = <0x02>;
+ interrupt-controller;
+ #interrupt-cells = <0x02>;
+ phandle = <0x97>;
+ };
+
+ pcfg-pull-up {
+ bias-pull-up;
+ phandle = <0xb2>;
+ };
+
+ pcfg-pull-down {
+ bias-pull-down;
+ phandle = <0x118>;
+ };
+
+ pcfg-pull-none {
+ bias-disable;
+ phandle = <0xb1>;
+ };
+
+ pcfg-pull-none-2ma {
+ bias-disable;
+ drive-strength = <0x02>;
+ phandle = <0x119>;
+ };
+
+ pcfg-pull-up-2ma {
+ bias-pull-up;
+ drive-strength = <0x02>;
+ phandle = <0x11a>;
+ };
+
+ pcfg-pull-up-4ma {
+ bias-pull-up;
+ drive-strength = <0x04>;
+ phandle = <0xb3>;
+ };
+
+ pcfg-pull-none-4ma {
+ bias-disable;
+ drive-strength = <0x04>;
+ phandle = <0x11b>;
+ };
+
+ pcfg-pull-down-4ma {
+ bias-pull-down;
+ drive-strength = <0x04>;
+ phandle = <0x11c>;
+ };
+
+ pcfg-pull-none-8ma {
+ bias-disable;
+ drive-strength = <0x08>;
+ phandle = <0xb6>;
+ };
+
+ pcfg-pull-up-8ma {
+ bias-pull-up;
+ drive-strength = <0x08>;
+ phandle = <0xb4>;
+ };
+
+ pcfg-pull-none-12ma {
+ bias-disable;
+ drive-strength = <0x0c>;
+ phandle = <0xb8>;
+ };
+
+ pcfg-pull-up-12ma {
+ bias-pull-up;
+ drive-strength = <0x0c>;
+ phandle = <0xb7>;
+ };
+
+ pcfg-pull-none-smt {
+ bias-disable;
+ input-schmitt-enable;
+ phandle = <0xb0>;
+ };
+
+ pcfg-output-high {
+ output-high;
+ phandle = <0x11d>;
+ };
+
+ pcfg-output-low {
+ output-low;
+ phandle = <0xb9>;
+ };
+
+ pcfg-input-high {
+ bias-pull-up;
+ input-enable;
+ phandle = <0xb5>;
+ };
+
+ pcfg-input {
+ input-enable;
+ phandle = <0x11e>;
+ };
+
+ i2c0 {
+
+ i2c0-xfer {
+ rockchip,pins = <0x00 0x08 0x01 0xb0 0x00 0x09 0x01 0xb0>;
+ phandle = <0x5b>;
+ };
+ };
+
+ i2c1 {
+
+ i2c1-xfer {
+ rockchip,pins = <0x00 0x12 0x01 0xb0 0x00 0x13 0x01 0xb0>;
+ phandle = <0x69>;
+ };
+ };
+
+ i2c2 {
+
+ i2c2-xfer {
+ rockchip,pins = <0x02 0x0f 0x02 0xb0 0x02 0x10 0x02 0xb0>;
+ phandle = <0x6a>;
+ };
+ };
+
+ i2c3 {
+
+ i2c3-xfer {
+ rockchip,pins = <0x01 0x0c 0x04 0xb0 0x01 0x0d 0x04 0xb0>;
+ phandle = <0x6b>;
+ };
+ };
+
+ tsadc {
+
+ tsadc-otp-gpio {
+ rockchip,pins = <0x00 0x06 0x00 0xb1>;
+ phandle = <0x86>;
+ };
+
+ tsadc-otp-out {
+ rockchip,pins = <0x00 0x06 0x01 0xb1>;
+ phandle = <0x87>;
+ };
+ };
+
+ uart0 {
+
+ uart0-xfer {
+ rockchip,pins = <0x00 0x0a 0x01 0xb2 0x00 0x0b 0x01 0xb2>;
+ phandle = <0x2c>;
+ };
+
+ uart0-cts {
+ rockchip,pins = <0x00 0x0c 0x01 0xb1>;
+ phandle = <0x2d>;
+ };
+
+ uart0-rts {
+ rockchip,pins = <0x00 0x0d 0x01 0xb1>;
+ phandle = <0x2e>;
+ };
+
+ uart0-rts-gpio {
+ rockchip,pins = <0x00 0x0d 0x00 0xb1>;
+ phandle = <0x11f>;
+ };
+ };
+
+ uart1 {
+
+ uart1-xfer {
+ rockchip,pins = <0x01 0x11 0x01 0xb2 0x01 0x10 0x01 0xb2>;
+ phandle = <0x4f>;
+ };
+
+ uart1-cts {
+ rockchip,pins = <0x01 0x12 0x01 0xb1>;
+ phandle = <0x50>;
+ };
+
+ uart1-rts {
+ rockchip,pins = <0x01 0x13 0x01 0xb1>;
+ phandle = <0x120>;
+ };
+
+ uart1-rts-gpio {
+ rockchip,pins = <0x01 0x13 0x00 0xb1>;
+ phandle = <0x121>;
+ };
+ };
+
+ uart2-m0 {
+
+ uart2m0-xfer {
+ rockchip,pins = <0x01 0x1a 0x02 0xb2 0x01 0x1b 0x02 0xb2>;
+ phandle = <0x51>;
+ };
+ };
+
+ uart2-m1 {
+
+ uart2m1-xfer {
+ rockchip,pins = <0x02 0x0c 0x02 0xb2 0x02 0x0e 0x02 0xb2>;
+ phandle = <0xba>;
+ };
+ };
+
+ uart3-m0 {
+
+ uart3m0-xfer {
+ rockchip,pins = <0x00 0x10 0x02 0xb2 0x00 0x11 0x02 0xb2>;
+ phandle = <0x122>;
+ };
+
+ uart3m0-cts {
+ rockchip,pins = <0x00 0x12 0x02 0xb1>;
+ phandle = <0x123>;
+ };
+
+ uart3m0-rts {
+ rockchip,pins = <0x00 0x13 0x02 0xb1>;
+ phandle = <0x124>;
+ };
+
+ uart3m0-rts-gpio {
+ rockchip,pins = <0x00 0x13 0x00 0xb1>;
+ phandle = <0x125>;
+ };
+ };
+
+ uart3-m1 {
+
+ uart3m1-xfer {
+ rockchip,pins = <0x01 0x0e 0x02 0xb2 0x01 0x0f 0x02 0xb2>;
+ phandle = <0x52>;
+ };
+
+ uart3m1-cts {
+ rockchip,pins = <0x01 0x0c 0x02 0xb1>;
+ phandle = <0x53>;
+ };
+
+ uart3m1-rts {
+ rockchip,pins = <0x01 0x0d 0x02 0xb1>;
+ phandle = <0x54>;
+ };
+
+ uart3m1-rts-gpio {
+ rockchip,pins = <0x01 0x0d 0x00 0xb1>;
+ phandle = <0x126>;
+ };
+ };
+
+ uart4 {
+
+ uart4-xfer {
+ rockchip,pins = <0x01 0x1c 0x02 0xb2 0x01 0x1d 0x02 0xb2>;
+ phandle = <0x55>;
+ };
+
+ uart4-cts {
+ rockchip,pins = <0x01 0x1e 0x02 0xb1>;
+ phandle = <0x56>;
+ };
+
+ uart4-rts {
+ rockchip,pins = <0x01 0x1f 0x02 0xb1>;
+ phandle = <0x57>;
+ };
+ };
+
+ uart5 {
+
+ uart5-xfer {
+ rockchip,pins = <0x03 0x02 0x04 0xb2 0x03 0x01 0x04 0xb2>;
+ phandle = <0x58>;
+ };
+
+ uart5-cts {
+ rockchip,pins = <0x03 0x03 0x04 0xb1>;
+ phandle = <0x59>;
+ };
+
+ uart5-rts {
+ rockchip,pins = <0x03 0x05 0x04 0xb1>;
+ phandle = <0x5a>;
+ };
+ };
+
+ spi0 {
+
+ spi0-clk {
+ rockchip,pins = <0x01 0x0f 0x03 0xb3>;
+ phandle = <0x6c>;
+ };
+
+ spi0-csn {
+ rockchip,pins = <0x01 0x0e 0x03 0xb3>;
+ phandle = <0x6d>;
+ };
+
+ spi0-miso {
+ rockchip,pins = <0x01 0x0d 0x03 0xb3>;
+ phandle = <0x6e>;
+ };
+
+ spi0-mosi {
+ rockchip,pins = <0x01 0x0c 0x03 0xb3>;
+ phandle = <0x6f>;
+ };
+
+ spi0-clk-hs {
+ rockchip,pins = <0x01 0x0f 0x03 0xb4>;
+ phandle = <0x70>;
+ };
+
+ spi0-miso-hs {
+ rockchip,pins = <0x01 0x0d 0x03 0xb4>;
+ phandle = <0x71>;
+ };
+
+ spi0-mosi-hs {
+ rockchip,pins = <0x01 0x0c 0x03 0xb4>;
+ phandle = <0x72>;
+ };
+ };
+
+ spi1 {
+
+ spi1-clk {
+ rockchip,pins = <0x03 0x0f 0x04 0xb3>;
+ phandle = <0x73>;
+ };
+
+ spi1-csn0 {
+ rockchip,pins = <0x03 0x09 0x04 0xb3>;
+ phandle = <0x74>;
+ };
+
+ spi1-csn1 {
+ rockchip,pins = <0x03 0x0a 0x02 0xb3>;
+ phandle = <0x75>;
+ };
+
+ spi1-miso {
+ rockchip,pins = <0x03 0x0e 0x04 0xb3>;
+ phandle = <0x76>;
+ };
+
+ spi1-mosi {
+ rockchip,pins = <0x03 0x0c 0x04 0xb3>;
+ phandle = <0x77>;
+ };
+
+ spi1-clk-hs {
+ rockchip,pins = <0x03 0x0f 0x04 0xb4>;
+ phandle = <0x78>;
+ };
+
+ spi1-miso-hs {
+ rockchip,pins = <0x03 0x0e 0x04 0xb4>;
+ phandle = <0x79>;
+ };
+
+ spi1-mosi-hs {
+ rockchip,pins = <0x03 0x0c 0x04 0xb4>;
+ phandle = <0x7a>;
+ };
+ };
+
+ pdm {
+
+ pdm-clk0m0 {
+ rockchip,pins = <0x03 0x16 0x02 0xb1>;
+ phandle = <0x44>;
+ };
+
+ pdm-clk0m1 {
+ rockchip,pins = <0x02 0x16 0x01 0xb1>;
+ phandle = <0x127>;
+ };
+
+ pdm-clk1 {
+ rockchip,pins = <0x03 0x17 0x02 0xb1>;
+ phandle = <0x45>;
+ };
+
+ pdm-sdi0m0 {
+ rockchip,pins = <0x03 0x1b 0x02 0xb1>;
+ phandle = <0x46>;
+ };
+
+ pdm-sdi0m1 {
+ rockchip,pins = <0x02 0x15 0x02 0xb1>;
+ phandle = <0x128>;
+ };
+
+ pdm-sdi1 {
+ rockchip,pins = <0x03 0x18 0x02 0xb1>;
+ phandle = <0x47>;
+ };
+
+ pdm-sdi2 {
+ rockchip,pins = <0x03 0x19 0x02 0xb1>;
+ phandle = <0x48>;
+ };
+
+ pdm-sdi3 {
+ rockchip,pins = <0x03 0x1a 0x02 0xb1>;
+ phandle = <0x49>;
+ };
+
+ pdm-clk0m0-sleep {
+ rockchip,pins = <0x03 0x16 0x00 0xb5>;
+ phandle = <0x129>;
+ };
+
+ pdm-clk0m1-sleep {
+ rockchip,pins = <0x02 0x16 0x00 0xb5>;
+ phandle = <0x12a>;
+ };
+
+ pdm-clk1-sleep {
+ rockchip,pins = <0x03 0x17 0x00 0xb5>;
+ phandle = <0x12b>;
+ };
+
+ pdm-sdi0m0-sleep {
+ rockchip,pins = <0x03 0x1b 0x00 0xb5>;
+ phandle = <0x12c>;
+ };
+
+ pdm-sdi0m1-sleep {
+ rockchip,pins = <0x02 0x15 0x00 0xb5>;
+ phandle = <0x12d>;
+ };
+
+ pdm-sdi1-sleep {
+ rockchip,pins = <0x03 0x18 0x00 0xb5>;
+ phandle = <0x12e>;
+ };
+
+ pdm-sdi2-sleep {
+ rockchip,pins = <0x03 0x19 0x00 0xb5>;
+ phandle = <0x12f>;
+ };
+
+ pdm-sdi3-sleep {
+ rockchip,pins = <0x03 0x1a 0x00 0xb5>;
+ phandle = <0x130>;
+ };
+ };
+
+ i2s0 {
+
+ i2s0-8ch-mclk {
+ rockchip,pins = <0x03 0x11 0x02 0xb1>;
+ phandle = <0x131>;
+ };
+
+ i2s0-8ch-sclktx {
+ rockchip,pins = <0x03 0x13 0x02 0xb1>;
+ phandle = <0x30>;
+ };
+
+ i2s0-8ch-sclkrx {
+ rockchip,pins = <0x03 0x0c 0x02 0xb1>;
+ phandle = <0x31>;
+ };
+
+ i2s0-8ch-lrcktx {
+ rockchip,pins = <0x03 0x12 0x02 0xb1>;
+ phandle = <0x32>;
+ };
+
+ i2s0-8ch-lrckrx {
+ rockchip,pins = <0x03 0x0d 0x02 0xb1>;
+ phandle = <0x33>;
+ };
+
+ i2s0-8ch-sdo0 {
+ rockchip,pins = <0x03 0x14 0x02 0xb1>;
+ phandle = <0x38>;
+ };
+
+ i2s0-8ch-sdo1 {
+ rockchip,pins = <0x03 0x10 0x02 0xb1>;
+ phandle = <0x39>;
+ };
+
+ i2s0-8ch-sdo2 {
+ rockchip,pins = <0x03 0x0f 0x02 0xb1>;
+ phandle = <0x3a>;
+ };
+
+ i2s0-8ch-sdo3 {
+ rockchip,pins = <0x03 0x0e 0x02 0xb1>;
+ phandle = <0x3b>;
+ };
+
+ i2s0-8ch-sdi0 {
+ rockchip,pins = <0x03 0x15 0x02 0xb1>;
+ phandle = <0x34>;
+ };
+
+ i2s0-8ch-sdi1 {
+ rockchip,pins = <0x03 0x0b 0x02 0xb1>;
+ phandle = <0x35>;
+ };
+
+ i2s0-8ch-sdi2 {
+ rockchip,pins = <0x03 0x09 0x02 0xb1>;
+ phandle = <0x36>;
+ };
+
+ i2s0-8ch-sdi3 {
+ rockchip,pins = <0x03 0x08 0x02 0xb1>;
+ phandle = <0x37>;
+ };
+ };
+
+ i2s1 {
+
+ i2s1-2ch-mclk {
+ rockchip,pins = <0x02 0x13 0x01 0xb1>;
+ phandle = <0x68>;
+ };
+
+ i2s1-2ch-sclk {
+ rockchip,pins = <0x02 0x12 0x01 0xb1>;
+ phandle = <0x3c>;
+ };
+
+ i2s1-2ch-lrck {
+ rockchip,pins = <0x02 0x11 0x01 0xb1>;
+ phandle = <0x3d>;
+ };
+
+ i2s1-2ch-sdi {
+ rockchip,pins = <0x02 0x15 0x01 0xb1>;
+ phandle = <0x3e>;
+ };
+
+ i2s1-2ch-sdo {
+ rockchip,pins = <0x02 0x14 0x01 0xb1>;
+ phandle = <0x3f>;
+ };
+ };
+
+ i2s2 {
+
+ i2s2-2ch-mclk {
+ rockchip,pins = <0x03 0x01 0x02 0xb1>;
+ phandle = <0x132>;
+ };
+
+ i2s2-2ch-sclk {
+ rockchip,pins = <0x03 0x02 0x02 0xb1>;
+ phandle = <0x40>;
+ };
+
+ i2s2-2ch-lrck {
+ rockchip,pins = <0x03 0x03 0x02 0xb1>;
+ phandle = <0x41>;
+ };
+
+ i2s2-2ch-sdi {
+ rockchip,pins = <0x03 0x05 0x02 0xb1>;
+ phandle = <0x42>;
+ };
+
+ i2s2-2ch-sdo {
+ rockchip,pins = <0x03 0x07 0x02 0xb1>;
+ phandle = <0x43>;
+ };
+ };
+
+ sdmmc {
+
+ sdmmc-clk {
+ rockchip,pins = <0x01 0x1e 0x01 0xb6>;
+ phandle = <0x8f>;
+ };
+
+ sdmmc-cmd {
+ rockchip,pins = <0x01 0x1f 0x01 0xb4>;
+ phandle = <0x90>;
+ };
+
+ sdmmc-det {
+ rockchip,pins = <0x00 0x03 0x01 0xb4>;
+ phandle = <0x91>;
+ };
+
+ sdmmc-bus1 {
+ rockchip,pins = <0x01 0x1a 0x01 0xb4>;
+ phandle = <0x133>;
+ };
+
+ sdmmc-bus4 {
+ rockchip,pins = <0x01 0x1a 0x01 0xb4 0x01 0x1b 0x01 0xb4 0x01 0x1c 0x01 0xb4 0x01 0x1d 0x01 0xb4>;
+ phandle = <0x92>;
+ };
+
+ sdmmc-gpio {
+ rockchip,pins = <0x01 0x1a 0x00 0xb3 0x01 0x1b 0x00 0xb3 0x01 0x1c 0x00 0xb3 0x01 0x1d 0x00 0xb3 0x01 0x1e 0x00 0xb3 0x01 0x1f 0x00 0xb3>;
+ phandle = <0x134>;
+ };
+ };
+
+ sdio {
+
+ sdio-clk {
+ rockchip,pins = <0x01 0x15 0x01 0xb1>;
+ phandle = <0x96>;
+ };
+
+ sdio-cmd {
+ rockchip,pins = <0x01 0x14 0x01 0xb2>;
+ phandle = <0x95>;
+ };
+
+ sdio-bus4 {
+ rockchip,pins = <0x01 0x16 0x01 0xb2 0x01 0x17 0x01 0xb2 0x01 0x18 0x01 0xb2 0x01 0x19 0x01 0xb2>;
+ phandle = <0x94>;
+ };
+
+ sdio-gpio {
+ rockchip,pins = <0x01 0x16 0x00 0xb2 0x01 0x17 0x00 0xb2 0x01 0x18 0x00 0xb2 0x01 0x19 0x00 0xb2 0x01 0x14 0x00 0xb2 0x01 0x15 0x00 0xb2>;
+ phandle = <0x135>;
+ };
+ };
+
+ emmc {
+
+ emmc-clk {
+ rockchip,pins = <0x01 0x09 0x02 0xb6>;
+ phandle = <0x136>;
+ };
+
+ emmc-cmd {
+ rockchip,pins = <0x01 0x0a 0x02 0xb4>;
+ phandle = <0x137>;
+ };
+
+ emmc-pwren {
+ rockchip,pins = <0x01 0x08 0x02 0xb1>;
+ phandle = <0x138>;
+ };
+
+ emmc-rstnout {
+ rockchip,pins = <0x01 0x0b 0x02 0xb1>;
+ phandle = <0x139>;
+ };
+
+ emmc-bus1 {
+ rockchip,pins = <0x01 0x00 0x02 0xb4>;
+ phandle = <0x13a>;
+ };
+
+ emmc-bus4 {
+ rockchip,pins = <0x01 0x00 0x02 0xb4 0x01 0x01 0x02 0xb4 0x01 0x02 0x02 0xb4 0x01 0x03 0x02 0xb4>;
+ phandle = <0x13b>;
+ };
+
+ emmc-bus8 {
+ rockchip,pins = <0x01 0x00 0x02 0xb4 0x01 0x01 0x02 0xb4 0x01 0x02 0x02 0xb4 0x01 0x03 0x02 0xb4 0x01 0x04 0x02 0xb4 0x01 0x05 0x02 0xb4 0x01 0x06 0x02 0xb4 0x01 0x07 0x02 0xb4>;
+ phandle = <0x13c>;
+ };
+ };
+
+ flash {
+
+ flash-cs0 {
+ rockchip,pins = <0x01 0x08 0x01 0xb1>;
+ phandle = <0x13d>;
+ };
+
+ flash-rdy {
+ rockchip,pins = <0x01 0x09 0x01 0xb1>;
+ phandle = <0x13e>;
+ };
+
+ flash-dqs {
+ rockchip,pins = <0x01 0x0a 0x01 0xb1>;
+ phandle = <0x13f>;
+ };
+
+ flash-ale {
+ rockchip,pins = <0x01 0x0b 0x01 0xb1>;
+ phandle = <0x140>;
+ };
+
+ flash-cle {
+ rockchip,pins = <0x01 0x0c 0x01 0xb1>;
+ phandle = <0x141>;
+ };
+
+ flash-wrn {
+ rockchip,pins = <0x01 0x0d 0x01 0xb1>;
+ phandle = <0x142>;
+ };
+
+ flash-csl {
+ rockchip,pins = <0x01 0x0e 0x01 0xb1>;
+ phandle = <0x143>;
+ };
+
+ flash-rdn {
+ rockchip,pins = <0x01 0x0f 0x01 0xb1>;
+ phandle = <0x144>;
+ };
+
+ flash-bus8 {
+ rockchip,pins = <0x01 0x00 0x01 0xb7 0x01 0x01 0x01 0xb7 0x01 0x02 0x01 0xb7 0x01 0x03 0x01 0xb7 0x01 0x04 0x01 0xb7 0x01 0x05 0x01 0xb7 0x01 0x06 0x01 0xb7 0x01 0x07 0x01 0xb7>;
+ phandle = <0x145>;
+ };
+ };
+
+ lcdc {
+
+ lcdc-m0-rgb-pins {
+ rockchip,pins = <0x03 0x00 0x01 0xb6 0x03 0x01 0x01 0xb6 0x03 0x02 0x01 0xb6 0x03 0x03 0x01 0xb6 0x03 0x04 0x01 0xb6 0x03 0x05 0x01 0xb6 0x03 0x06 0x01 0xb6 0x03 0x07 0x01 0xb6 0x03 0x08 0x01 0xb6 0x03 0x09 0x01 0xb6 0x03 0x0a 0x01 0xb6 0x03 0x0b 0x01 0xb6 0x03 0x0c 0x01 0xb6 0x03 0x0d 0x01 0xb6 0x03 0x0e 0x01 0xb6 0x03 0x0f 0x01 0xb6 0x03 0x10 0x01 0xb6 0x03 0x11 0x01 0xb6 0x03 0x12 0x01 0xb6 0x03 0x13 0x01 0xb6 0x03 0x14 0x01 0xb6 0x03 0x15 0x01 0xb6 0x03 0x16 0x01 0xb6 0x03 0x17 0x01 0xb6 0x03 0x18 0x01 0xb6 0x03 0x19 0x01 0xb6 0x03 0x1a 0x01 0xb6 0x03 0x1b 0x01 0xb6>;
+ phandle = <0x146>;
+ };
+
+ lcdc-m0-sleep-pins {
+ rockchip,pins = <0x03 0x00 0x00 0xb1 0x03 0x01 0x00 0xb1 0x03 0x02 0x00 0xb1 0x03 0x03 0x00 0xb1 0x03 0x04 0x00 0xb1 0x03 0x05 0x00 0xb1 0x03 0x06 0x00 0xb1 0x03 0x07 0x00 0xb1 0x03 0x08 0x00 0xb1 0x03 0x09 0x00 0xb1 0x03 0x0a 0x00 0xb1 0x03 0x0b 0x00 0xb1 0x03 0x0c 0x00 0xb1 0x03 0x0d 0x00 0xb1 0x03 0x0e 0x00 0xb1 0x03 0x0f 0x00 0xb1 0x03 0x10 0x00 0xb1 0x03 0x11 0x00 0xb1 0x03 0x12 0x00 0xb1 0x03 0x13 0x00 0xb1 0x03 0x14 0x00 0xb1 0x03 0x15 0x00 0xb1 0x03 0x16 0x00 0xb1 0x03 0x17 0x00 0xb1 0x03 0x18 0x00 0xb1 0x03 0x19 0x00 0xb1 0x03 0x1a 0x00 0xb1 0x03 0x1b 0x00 0xb1>;
+ phandle = <0x147>;
+ };
+
+ lcdc-m1-rgb-pins {
+ rockchip,pins = <0x03 0x00 0x01 0xb6 0x03 0x04 0x01 0xb6 0x03 0x06 0x01 0xb6 0x03 0x0a 0x01 0xb6 0x03 0x0b 0x01 0xb6 0x03 0x0d 0x01 0xb6 0x03 0x10 0x01 0xb6 0x03 0x11 0x01 0xb6 0x03 0x12 0x01 0xb6 0x03 0x13 0x01 0xb6 0x03 0x14 0x01 0xb6 0x03 0x15 0x01 0xb6 0x03 0x16 0x01 0xb6 0x03 0x17 0x01 0xb6 0x03 0x18 0x01 0xb6 0x03 0x19 0x01 0xb6 0x03 0x1a 0x01 0xb6 0x03 0x1b 0x01 0xb6>;
+ phandle = <0x4d>;
+ };
+
+ lcdc-m1-sleep-pins {
+ rockchip,pins = <0x03 0x00 0x00 0xb1 0x03 0x04 0x00 0xb1 0x03 0x06 0x00 0xb1 0x03 0x0a 0x00 0xb1 0x03 0x0b 0x00 0xb1 0x03 0x0d 0x00 0xb1 0x03 0x10 0x00 0xb1 0x03 0x11 0x00 0xb1 0x03 0x12 0x00 0xb1 0x03 0x13 0x00 0xb1 0x03 0x14 0x00 0xb1 0x03 0x15 0x00 0xb1 0x03 0x16 0x00 0xb1 0x03 0x17 0x00 0xb1 0x03 0x18 0x00 0xb1 0x03 0x19 0x00 0xb1 0x03 0x1a 0x00 0xb1 0x03 0x1b 0x00 0xb1>;
+ phandle = <0x4e>;
+ };
+ };
+
+ pwm0 {
+
+ pwm0-pin {
+ rockchip,pins = <0x00 0x0f 0x01 0xb1>;
+ phandle = <0x7b>;
+ };
+ };
+
+ pwm1 {
+
+ pwm1-pin {
+ rockchip,pins = <0x00 0x10 0x01 0xb1>;
+ phandle = <0x7c>;
+ };
+ };
+
+ pwm2 {
+
+ pwm2-pin {
+ rockchip,pins = <0x02 0x0d 0x01 0xb1>;
+ phandle = <0x7d>;
+ };
+ };
+
+ pwm3 {
+
+ pwm3-pin {
+ rockchip,pins = <0x00 0x11 0x01 0xb1>;
+ phandle = <0x7e>;
+ };
+ };
+
+ pwm4 {
+
+ pwm4-pin {
+ rockchip,pins = <0x03 0x12 0x03 0xb1>;
+ phandle = <0x7f>;
+ };
+ };
+
+ pwm5 {
+
+ pwm5-pin {
+ rockchip,pins = <0x03 0x13 0x03 0xb1>;
+ phandle = <0x80>;
+ };
+ };
+
+ pwm6 {
+
+ pwm6-pin {
+ rockchip,pins = <0x03 0x14 0x03 0xb1>;
+ phandle = <0x81>;
+ };
+ };
+
+ pwm7 {
+
+ pwm7-pin {
+ rockchip,pins = <0x03 0x15 0x03 0xb1>;
+ phandle = <0x82>;
+ };
+ };
+
+ gmac {
+
+ rmii-pins {
+ rockchip,pins = <0x02 0x00 0x02 0xb8 0x02 0x01 0x02 0xb8 0x02 0x02 0x02 0xb8 0x02 0x03 0x02 0xb1 0x02 0x04 0x02 0xb1 0x02 0x05 0x02 0xb1 0x02 0x06 0x02 0xb1 0x02 0x07 0x02 0xb1 0x02 0x09 0x02 0xb1>;
+ phandle = <0x8d>;
+ };
+
+ mac-refclk-12ma {
+ rockchip,pins = <0x02 0x0a 0x02 0xb8>;
+ phandle = <0x8e>;
+ };
+
+ mac-refclk {
+ rockchip,pins = <0x02 0x0a 0x02 0xb1>;
+ phandle = <0x148>;
+ };
+ };
+
+ cif-m0 {
+
+ cif-clkout-m0 {
+ rockchip,pins = <0x02 0x0b 0x01 0xb8>;
+ phandle = <0xa7>;
+ };
+
+ dvp-d2d9-m0 {
+ rockchip,pins = <0x02 0x00 0x01 0xb1 0x02 0x01 0x01 0xb1 0x02 0x02 0x01 0xb1 0x02 0x03 0x01 0xb1 0x02 0x04 0x01 0xb1 0x02 0x05 0x01 0xb1 0x02 0x06 0x01 0xb1 0x02 0x07 0x01 0xb1 0x02 0x08 0x01 0xb1 0x02 0x09 0x01 0xb1 0x02 0x0a 0x01 0xb1 0x02 0x0b 0x01 0xb1>;
+ phandle = <0xa5>;
+ };
+
+ dvp-d0d1-m0 {
+ rockchip,pins = <0x02 0x0c 0x01 0xb1 0x02 0x0e 0x01 0xb1>;
+ phandle = <0xa9>;
+ };
+
+ d10-d11-m0 {
+ rockchip,pins = <0x02 0x0f 0x01 0xb1 0x02 0x10 0x01 0xb1>;
+ phandle = <0xa8>;
+ };
+ };
+
+ cif-m1 {
+
+ cif-clkout-m1 {
+ rockchip,pins = <0x03 0x18 0x03 0xb1>;
+ phandle = <0x149>;
+ };
+
+ dvp-d2d9-m1 {
+ rockchip,pins = <0x03 0x03 0x03 0xb1 0x03 0x05 0x03 0xb1 0x03 0x07 0x03 0xb1 0x03 0x08 0x03 0xb1 0x03 0x09 0x03 0xb1 0x03 0x0c 0x03 0xb1 0x03 0x0e 0x03 0xb1 0x03 0x0f 0x03 0xb1 0x03 0x19 0x03 0xb1 0x03 0x1a 0x03 0xb1 0x03 0x1b 0x03 0xb1 0x03 0x18 0x03 0xb1>;
+ phandle = <0x14a>;
+ };
+
+ dvp-d0d1-m1 {
+ rockchip,pins = <0x03 0x01 0x03 0xb1 0x03 0x02 0x03 0xb1>;
+ phandle = <0x14b>;
+ };
+
+ d10-d11-m1 {
+ rockchip,pins = <0x03 0x16 0x03 0xb1 0x03 0x17 0x03 0xb1>;
+ phandle = <0x14c>;
+ };
+ };
+
+ isp {
+
+ isp-prelight {
+ rockchip,pins = <0x03 0x19 0x04 0xb1>;
+ phandle = <0x14d>;
+ };
+ };
+
+ pmic {
+
+ pmic_int {
+ rockchip,pins = <0x00 0x0a 0x00 0xb2 0x00 0x0b 0x00 0xb1>;
+ phandle = <0x5d>;
+ };
+
+ soc_slppin_gpio {
+ rockchip,pins = <0x00 0x04 0x00 0xb9>;
+ phandle = <0x60>;
+ };
+
+ soc_slppin_slp {
+ rockchip,pins = <0x00 0x04 0x01 0xb1>;
+ phandle = <0x5e>;
+ };
+
+ soc_slppin_rst {
+ rockchip,pins = <0x00 0x04 0x02 0xb1>;
+ phandle = <0x62>;
+ };
+ };
+
+ leds {
+
+ led-pins {
+ rockchip,pins = <0x00 0x11 0x00 0xb1>;
+ phandle = <0xc0>;
+ };
+ };
+
+ btns {
+
+ btn-pins {
+ rockchip,pins = <0x01 0x0c 0x00 0xb2 0x01 0x0d 0x00 0xb2 0x01 0x0e 0x00 0xb2 0x01 0x0f 0x00 0xb2 0x01 0x02 0x00 0xb2 0x01 0x05 0x00 0xb2 0x01 0x06 0x00 0xb2 0x01 0x07 0x00 0xb2 0x02 0x00 0x00 0xb2 0x02 0x01 0x00 0xb2 0x02 0x02 0x00 0xb2 0x02 0x03 0x00 0xb2 0x02 0x04 0x00 0xb2 0x02 0x05 0x00 0xb2 0x02 0x06 0x00 0xb2 0x02 0x07 0x00 0xb2 0x03 0x09 0x00 0xb2 0x03 0x0a 0x00 0xb2 0x03 0x0c 0x00 0xb2 0x03 0x0f 0x00 0xb2>;
+ phandle = <0xbd>;
+ };
+ };
+ };
+
+ chosen {
+ bootargs = [00];
+ };
+
+ fiq-debugger {
+ compatible = "rockchip,fiq-debugger";
+ rockchip,serial-id = <0x02>;
+ rockchip,wake-irq = <0x00>;
+ rockchip,irq-mode-enable = <0x00>;
+ rockchip,baudrate = <0x1c200>;
+ interrupts = <0x00 0x7f 0x08>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0xba>;
+ status = "okay";
+ };
+
+ ramoops {
+ compatible = "ramoops";
+ record-size = <0x00 0x20000>;
+ console-size = <0x00 0x80000>;
+ ftrace-size = <0x00 0x00>;
+ pmsg-size = <0x00 0x00>;
+ memory-region = <0xbb>;
+ };
+
+ reserved-memory {
+ #address-cells = <0x02>;
+ #size-cells = <0x02>;
+ ranges;
+
+ drm-logo@00000000 {
+ compatible = "rockchip,drm-logo";
+ reg = <0x00 0x00 0x00 0x00>;
+ phandle = <0x11>;
+ };
+
+ region@110000 {
+ reg = <0x00 0x110000 0x00 0xf0000>;
+ reg-names = "ramoops_mem";
+ phandle = <0xbb>;
+ };
+ };
+
+ odroidgo3-keys {
+ compatible = "gpio-keys";
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+ autorepeat;
+ phandle = <0x14e>;
+
+ button@0 {
+ label = "GPIO BTN-VOLUP";
+ linux,code = <0x73>;
+ gpios = <0x66 0x00 0x01>;
+ };
+
+ button@1 {
+ label = "GPIO BTN-VOLDN";
+ linux,code = <0x72>;
+ gpios = <0x66 0x01 0x01>;
+ };
+ };
+
+ odroidgo3-joypad {
+ compatible = "odroidgo3-joypad";
+ pwms = <0xbc 0x00 0xbebc200 0x00>;
+ pwm-names = "enable";
+ rumble-boost-weak = <0x00>;
+ rumble-boost-strong = <0x00>;
+ joypad-name = "GO-Super Gamepad";
+ joypad-product = <0x1100>;
+ joypad-revision = <0x100>;
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <0xbd>;
+ pinctrl-1 = <0x7b>;
+ io-channel-names = "amux_adc";
+ io-channels = <0xbe 0x01>;
+ amux-count = <0x04>;
+ amux-a-gpios = <0x97 0x0b 0x01>;
+ amux-b-gpios = <0x97 0x08 0x01>;
+ amux-en-gpios = <0x97 0x0d 0x01>;
+ button-adc-scale = <0x02>;
+ button-adc-deadzone = <0x40>;
+ button-adc-fuzz = <0x20>;
+ button-adc-flat = <0x20>;
+ abs_x-p-tuning = <0xc8>;
+ abs_x-n-tuning = <0xc8>;
+ abs_y-p-tuning = <0xc8>;
+ abs_y-n-tuning = <0xc8>;
+ abs_rx-p-tuning = <0xc8>;
+ abs_rx-n-tuning = <0xc8>;
+ abs_ry-p-tuning = <0xc8>;
+ abs_ry-n-tuning = <0xc8>;
+ poll-interval = <0x0a>;
+ invert-absx;
+ invert-absy;
+ phandle = <0x14f>;
+
+ sw1 {
+ gpios = <0xbf 0x0c 0x01>;
+ label = "GPIO DPAD-UP";
+ linux,code = <0x220>;
+ };
+
+ sw2 {
+ gpios = <0xbf 0x0d 0x01>;
+ label = "GPIO DPAD-DOWN";
+ linux,code = <0x221>;
+ };
+
+ sw3 {
+ gpios = <0xbf 0x0e 0x01>;
+ label = "GPIO DPAD-LEFT";
+ linux,code = <0x222>;
+ };
+
+ sw4 {
+ gpios = <0xbf 0x0f 0x01>;
+ label = "GPIO DPAD-RIGHT";
+ linux,code = <0x223>;
+ };
+
+ sw5 {
+ gpios = <0xbf 0x02 0x01>;
+ label = "GPIO KEY BTN-A";
+ linux,code = <0x131>;
+ };
+
+ sw6 {
+ gpios = <0xbf 0x05 0x01>;
+ label = "GPIO BTN-B";
+ linux,code = <0x130>;
+ };
+
+ sw7 {
+ gpios = <0xbf 0x06 0x01>;
+ label = "GPIO BTN-Y";
+ linux,code = <0x134>;
+ };
+
+ sw8 {
+ gpios = <0xbf 0x07 0x01>;
+ label = "GPIO BTN-X";
+ linux,code = <0x133>;
+ };
+
+ sw11 {
+ gpios = <0x66 0x02 0x01>;
+ label = "GPIO F3";
+ linux,code = <0x2c2>;
+ };
+
+ sw12 {
+ gpios = <0x66 0x03 0x01>;
+ label = "GPIO F4";
+ linux,code = <0x2c3>;
+ };
+
+ sw15 {
+ gpios = <0x66 0x06 0x01>;
+ label = "GPIO TOP-LEFT";
+ linux,code = <0x136>;
+ };
+
+ sw16 {
+ gpios = <0x66 0x07 0x01>;
+ label = "GPIO TOP-RIGHT";
+ linux,code = <0x137>;
+ };
+
+ sw19 {
+ gpios = <0x97 0x09 0x01>;
+ label = "GPIO F1";
+ linux,code = <0x2c0>;
+ };
+
+ sw20 {
+ gpios = <0x97 0x0f 0x01>;
+ label = "GPIO TOP-RIGHT2";
+ linux,code = <0x139>;
+ };
+
+ sw21 {
+ gpios = <0x97 0x0a 0x01>;
+ label = "GPIO TOP-LEFT2";
+ linux,code = <0x138>;
+ };
+
+ sw22 {
+ gpios = <0x97 0x0c 0x01>;
+ label = "GPIO F2";
+ linux,code = <0x2c1>;
+ };
+
+ sw13 {
+ gpios = <0x66 0x04 0x01>;
+ label = "GPIO F5";
+ linux,code = <0x2c4>;
+ };
+ };
+
+ gpio_leds {
+ compatible = "gpio-leds";
+ pinctrl-names = "led_pins";
+ pinctrl-0 = <0xc0>;
+ phandle = <0x150>;
+
+ heartbeat {
+ label = "blue:heartbeat";
+ gpios = <0x5c 0x11 0x00>;
+ linux,default-trigger = "heartbeat";
+ };
+ };
+
+ backlight {
+ compatible = "pwm-backlight";
+ pwms = <0xc1 0x00 0xf519 0x00>;
+ brightness-levels = <0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f 0x20 0x21 0x22 0x23 0x24 0x25 0x26 0x27 0x28 0x29 0x2a 0x2b 0x2c 0x2d 0x2e 0x2f 0x30 0x31 0x32 0x33 0x34 0x35 0x36 0x37 0x38 0x39 0x3a 0x3b 0x3c 0x3d 0x3e 0x3f 0x40 0x41 0x42 0x43 0x44 0x45 0x46 0x47 0x48 0x49 0x4a 0x4b 0x4c 0x4d 0x4e 0x4f 0x50 0x51 0x52 0x53 0x54 0x55 0x56 0x57 0x58 0x59 0x5a 0x5b 0x5c 0x5d 0x5e 0x5f 0x60 0x61 0x62 0x63 0x64 0x65 0x66 0x67 0x68 0x69 0x6a 0x6b 0x6c 0x6d 0x6e 0x6f 0x70 0x71 0x72 0x73 0x74 0x75 0x76 0x77 0x78 0x79 0x7a 0x7b 0x7c 0x7d 0x7e 0x7f 0x80 0x81 0x82 0x83 0x84 0x85 0x86 0x87 0x88 0x89 0x8a 0x8b 0x8c 0x8d 0x8e 0x8f 0x90 0x91 0x92 0x93 0x94 0x95 0x96 0x97 0x98 0x99 0x9a 0x9b 0x9c 0x9d 0x9e 0x9f 0xa0>;
+ default-brightness-level = <0x33>;
+ phandle = <0x9d>;
+ };
+
+ rk817-sound {
+ compatible = "simple-audio-card";
+ simple-audio-card,format = "i2s";
+ simple-audio-card,name = "rockchip,rk817-codec";
+ simple-audio-card,mclk-fs = <0x100>;
+ simple-audio-card,widgets = "Microphone\0Mic Jack\0Headphone\0Headphone Jack";
+ simple-audio-card,routing = "MIC_IN\0Mic Jack\0Headphone Jack\0HPOL\0Headphone Jack\0HPOR";
+ simple-audio-card,hp-det-gpio = <0x66 0x16 0x01>;
+ simple-audio-card,codec-hp-det = <0x01>;
+
+ simple-audio-card,cpu {
+ sound-dai = <0xc2>;
+ };
+
+ simple-audio-card,codec {
+ sound-dai = <0xc3>;
+ };
+ };
+
+ vccsys {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v8_sys";
+ regulator-always-on;
+ regulator-min-microvolt = <0x39fbc0>;
+ regulator-max-microvolt = <0x39fbc0>;
+ phandle = <0x64>;
+ };
+
+ __symbols__ {
+ ddr_timing = "/ddr_timing";
+ cpu0 = "/cpus/cpu@0";
+ cpu1 = "/cpus/cpu@1";
+ cpu2 = "/cpus/cpu@2";
+ cpu3 = "/cpus/cpu@3";
+ CPU_SLEEP = "/cpus/idle-states/cpu-sleep";
+ CLUSTER_SLEEP = "/cpus/idle-states/cluster-sleep";
+ cpu0_opp_table = "/cpu0-opp-table";
+ bus_soc = "/bus-soc";
+ bus_apll = "/bus-apll";
+ bus_apll_opp_table = "/bus-apll-opp-table";
+ display_subsystem = "/display-subsystem";
+ route_lvds = "/display-subsystem/route/route-lvds";
+ route_dsi = "/display-subsystem/route/route-dsi";
+ route_rgb = "/display-subsystem/route/route-rgb";
+ gmac_clkin = "/external-gmac-clock";
+ rockchip_suspend = "/rockchip-suspend";
+ xin24m = "/xin24m";
+ xin32k = "/xin32k";
+ pmu = "/power-management@ff000000";
+ power = "/power-management@ff000000/power-controller";
+ pmugrf = "/syscon@ff010000";
+ pmu_io_domains = "/syscon@ff010000/io-domains";
+ pmu_pvtm = "/syscon@ff010000/pmu-pvtm";
+ uart0 = "/serial@ff030000";
+ i2s0_8ch = "/i2s@ff060000";
+ i2s1_2ch = "/i2s@ff070000";
+ i2s2_2ch = "/i2s@ff080000";
+ pdm = "/pdm@ff0a0000";
+ crypto = "/crypto@ff0b0000";
+ rng = "/rng@ff0b0000";
+ gic = "/interrupt-controller@ff131000";
+ grf = "/syscon@ff140000";
+ io_domains = "/syscon@ff140000/io-domains";
+ lvds = "/syscon@ff140000/lvds";
+ lvds_in_vopb = "/syscon@ff140000/lvds/ports/port@0/endpoint@0";
+ rgb = "/syscon@ff140000/rgb";
+ rgb_in_vopb = "/syscon@ff140000/rgb/ports/port@0/endpoint@0";
+ core_grf = "/syscon@ff148000";
+ pvtm = "/syscon@ff148000/pvtm";
+ uart1 = "/serial@ff158000";
+ uart2 = "/serial@ff160000";
+ uart3 = "/serial@ff168000";
+ uart4 = "/serial@ff170000";
+ uart5 = "/serial@ff178000";
+ i2c0 = "/i2c@ff180000";
+ rk817 = "/i2c@ff180000/pmic@20";
+ pinctrl_rk8xx = "/i2c@ff180000/pmic@20/pinctrl_rk8xx";
+ rk817_ts_gpio1 = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_ts_gpio1";
+ rk817_gt_gpio2 = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_gt_gpio2";
+ rk817_pin_ts = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_pin_ts";
+ rk817_pin_gt = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_pin_gt";
+ rk817_slppin_null = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_slppin_null";
+ rk817_slppin_slp = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_slppin_slp";
+ rk817_slppin_pwrdn = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_slppin_pwrdn";
+ rk817_slppin_rst = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_slppin_rst";
+ vdd_logic = "/i2c@ff180000/pmic@20/regulators/DCDC_REG1";
+ vdd_arm = "/i2c@ff180000/pmic@20/regulators/DCDC_REG2";
+ vcc_ddr = "/i2c@ff180000/pmic@20/regulators/DCDC_REG3";
+ vcc_3v3 = "/i2c@ff180000/pmic@20/regulators/DCDC_REG4";
+ vcc_1v0 = "/i2c@ff180000/pmic@20/regulators/LDO_REG1";
+ vcc1v8_soc = "/i2c@ff180000/pmic@20/regulators/LDO_REG2";
+ vdd1v0_soc = "/i2c@ff180000/pmic@20/regulators/LDO_REG3";
+ vcc3v3_pmu = "/i2c@ff180000/pmic@20/regulators/LDO_REG4";
+ vccio_sd = "/i2c@ff180000/pmic@20/regulators/LDO_REG5";
+ vcc_sd = "/i2c@ff180000/pmic@20/regulators/LDO_REG6";
+ vcc_backlight = "/i2c@ff180000/pmic@20/regulators/LDO_REG7";
+ vcc_lcd = "/i2c@ff180000/pmic@20/regulators/LDO_REG8";
+ dcdc_boost = "/i2c@ff180000/pmic@20/regulators/BOOST";
+ otg_switch = "/i2c@ff180000/pmic@20/regulators/OTG_SWITCH";
+ rk817_codec = "/i2c@ff180000/pmic@20/codec";
+ i2c1 = "/i2c@ff190000";
+ i2c2 = "/i2c@ff1a0000";
+ i2c3 = "/i2c@ff1b0000";
+ spi0 = "/spi@ff1d0000";
+ spi1 = "/spi@ff1d8000";
+ wdt = "/watchdog@ff1e0000";
+ pwm0 = "/pwm@ff200000";
+ pwm1 = "/pwm@ff200010";
+ pwm2 = "/pwm@ff200020";
+ pwm3 = "/pwm@ff200030";
+ pwm4 = "/pwm@ff208000";
+ pwm5 = "/pwm@ff208010";
+ pwm6 = "/pwm@ff208020";
+ pwm7 = "/pwm@ff208030";
+ rktimer = "/rktimer@ff210000";
+ dmac = "/amba/dmac@ff240000";
+ thermal_zones = "/thermal-zones";
+ soc_thermal = "/thermal-zones/soc-thermal";
+ threshold = "/thermal-zones/soc-thermal/trips/trip-point-0";
+ target = "/thermal-zones/soc-thermal/trips/trip-point-1";
+ soc_crit = "/thermal-zones/soc-thermal/trips/soc-crit";
+ gpu_thermal = "/thermal-zones/gpu-thermal";
+ tsadc = "/tsadc@ff280000";
+ saradc = "/saradc@ff288000";
+ otp = "/otp@ff290000";
+ otp_id = "/otp@ff290000/id@7";
+ cpu_leakage = "/otp@ff290000/cpu-leakage@17";
+ performance = "/otp@ff290000/performance@1e";
+ cru = "/clock-controller@ff2b0000";
+ cpu_boost = "/cpu-boost@ff2b8000";
+ pmucru = "/pmu-clock-controller@ff2bc000";
+ usb2phy_grf = "/syscon@ff2c0000";
+ u2phy = "/syscon@ff2c0000/usb2-phy@100";
+ u2phy_host = "/syscon@ff2c0000/usb2-phy@100/host-port";
+ u2phy_otg = "/syscon@ff2c0000/usb2-phy@100/otg-port";
+ video_phy = "/video-phy@ff2e0000";
+ mipi_dphy_rx0 = "/mipi-dphy-rx0@ff2f0000";
+ usb20_otg = "/usb@ff300000";
+ usb_host0_ehci = "/usb@ff340000";
+ usb_host0_ohci = "/usb@ff350000";
+ gmac = "/ethernet@ff360000";
+ sdmmc = "/dwmmc@ff370000";
+ sdio = "/dwmmc@ff380000";
+ emmc = "/dwmmc@ff390000";
+ nandc0 = "/nandc@ff3b0000";
+ sfc = "/sfc@ff3a0000";
+ gpu = "/gpu@ff400000";
+ gpu_opp_table = "/gpu-opp-table";
+ hevc = "/hevc_service@ff440000";
+ vpu = "/vpu_service@ff442000";
+ vpu_combo = "/vpu_combo";
+ hevc_mmu = "/iommu@ff440440";
+ vpu_mmu = "/iommu@ff442800";
+ dsi = "/dsi@ff450000";
+ dsi_in_vopb = "/dsi@ff450000/ports/port@0/endpoint@0";
+ timing0 = "/dsi@ff450000/panel@0/display-timings/60Hz";
+ timing1 = "/dsi@ff450000/panel@0/display-timings/50Hz";
+ timing2 = "/dsi@ff450000/panel@0/display-timings/75Hz";
+ vopb = "/vop@ff460000";
+ vopb_out = "/vop@ff460000/port";
+ vopb_out_lvds = "/vop@ff460000/port/endpoint@0";
+ vopb_out_dsi = "/vop@ff460000/port/endpoint@1";
+ vopb_out_rgb = "/vop@ff460000/port/endpoint@2";
+ vopb_mmu = "/iommu@ff460f00";
+ rk_rga = "/rk_rga@ff480000";
+ cif = "/cif@ff490000";
+ cif_new = "/cif-new@ff490000";
+ vip_mmu = "/iommu@ff490800";
+ rk_isp = "/rk_isp@ff4a0000";
+ rkisp1 = "/rkisp1@ff4a0000";
+ isp_mmu = "/iommu@ff4a8000";
+ qos_gmac = "/qos@ff518000";
+ qos_gpu = "/qos@ff520000";
+ qos_sdmmc = "/qos@ff52c000";
+ qos_emmc = "/qos@ff538000";
+ qos_nand = "/qos@ff538080";
+ qos_sdio = "/qos@ff538100";
+ qos_sfc = "/qos@ff538180";
+ qos_usb_host = "/qos@ff540000";
+ qos_usb_otg = "/qos@ff540080";
+ qos_isp_128 = "/qos@ff548000";
+ qos_isp_rd = "/qos@ff548080";
+ qos_isp_wr = "/qos@ff548100";
+ qos_isp_m1 = "/qos@ff548180";
+ qos_vip = "/qos@ff548200";
+ qos_rga_rd = "/qos@ff550000";
+ qos_rga_wr = "/qos@ff550080";
+ qos_vop_m0 = "/qos@ff550100";
+ qos_vop_m1 = "/qos@ff550180";
+ qos_vpu = "/qos@ff558000";
+ qos_vpu_r128 = "/qos@ff558080";
+ dfi = "/dfi@ff610000";
+ dmc = "/dmc";
+ ddr_power_model = "/dmc/ddr_power_model";
+ dmc_opp_table = "/dmc-opp-table";
+ rockchip_system_monitor = "/rockchip-system-monitor";
+ pinctrl = "/pinctrl";
+ gpio0 = "/pinctrl/gpio0@ff040000";
+ gpio1 = "/pinctrl/gpio1@ff250000";
+ gpio2 = "/pinctrl/gpio2@ff260000";
+ gpio3 = "/pinctrl/gpio3@ff270000";
+ pcfg_pull_up = "/pinctrl/pcfg-pull-up";
+ pcfg_pull_down = "/pinctrl/pcfg-pull-down";
+ pcfg_pull_none = "/pinctrl/pcfg-pull-none";
+ pcfg_pull_none_2ma = "/pinctrl/pcfg-pull-none-2ma";
+ pcfg_pull_up_2ma = "/pinctrl/pcfg-pull-up-2ma";
+ pcfg_pull_up_4ma = "/pinctrl/pcfg-pull-up-4ma";
+ pcfg_pull_none_4ma = "/pinctrl/pcfg-pull-none-4ma";
+ pcfg_pull_down_4ma = "/pinctrl/pcfg-pull-down-4ma";
+ pcfg_pull_none_8ma = "/pinctrl/pcfg-pull-none-8ma";
+ pcfg_pull_up_8ma = "/pinctrl/pcfg-pull-up-8ma";
+ pcfg_pull_none_12ma = "/pinctrl/pcfg-pull-none-12ma";
+ pcfg_pull_up_12ma = "/pinctrl/pcfg-pull-up-12ma";
+ pcfg_pull_none_smt = "/pinctrl/pcfg-pull-none-smt";
+ pcfg_output_high = "/pinctrl/pcfg-output-high";
+ pcfg_output_low = "/pinctrl/pcfg-output-low";
+ pcfg_input_high = "/pinctrl/pcfg-input-high";
+ pcfg_input = "/pinctrl/pcfg-input";
+ i2c0_xfer = "/pinctrl/i2c0/i2c0-xfer";
+ i2c1_xfer = "/pinctrl/i2c1/i2c1-xfer";
+ i2c2_xfer = "/pinctrl/i2c2/i2c2-xfer";
+ i2c3_xfer = "/pinctrl/i2c3/i2c3-xfer";
+ tsadc_otp_gpio = "/pinctrl/tsadc/tsadc-otp-gpio";
+ tsadc_otp_out = "/pinctrl/tsadc/tsadc-otp-out";
+ uart0_xfer = "/pinctrl/uart0/uart0-xfer";
+ uart0_cts = "/pinctrl/uart0/uart0-cts";
+ uart0_rts = "/pinctrl/uart0/uart0-rts";
+ uart0_rts_gpio = "/pinctrl/uart0/uart0-rts-gpio";
+ uart1_xfer = "/pinctrl/uart1/uart1-xfer";
+ uart1_cts = "/pinctrl/uart1/uart1-cts";
+ uart1_rts = "/pinctrl/uart1/uart1-rts";
+ uart1_rts_gpio = "/pinctrl/uart1/uart1-rts-gpio";
+ uart2m0_xfer = "/pinctrl/uart2-m0/uart2m0-xfer";
+ uart2m1_xfer = "/pinctrl/uart2-m1/uart2m1-xfer";
+ uart3m0_xfer = "/pinctrl/uart3-m0/uart3m0-xfer";
+ uart3m0_cts = "/pinctrl/uart3-m0/uart3m0-cts";
+ uart3m0_rts = "/pinctrl/uart3-m0/uart3m0-rts";
+ uart3m0_rts_gpio = "/pinctrl/uart3-m0/uart3m0-rts-gpio";
+ uart3m1_xfer = "/pinctrl/uart3-m1/uart3m1-xfer";
+ uart3m1_cts = "/pinctrl/uart3-m1/uart3m1-cts";
+ uart3m1_rts = "/pinctrl/uart3-m1/uart3m1-rts";
+ uart3m1_rts_gpio = "/pinctrl/uart3-m1/uart3m1-rts-gpio";
+ uart4_xfer = "/pinctrl/uart4/uart4-xfer";
+ uart4_cts = "/pinctrl/uart4/uart4-cts";
+ uart4_rts = "/pinctrl/uart4/uart4-rts";
+ uart5_xfer = "/pinctrl/uart5/uart5-xfer";
+ uart5_cts = "/pinctrl/uart5/uart5-cts";
+ uart5_rts = "/pinctrl/uart5/uart5-rts";
+ spi0_clk = "/pinctrl/spi0/spi0-clk";
+ spi0_csn = "/pinctrl/spi0/spi0-csn";
+ spi0_miso = "/pinctrl/spi0/spi0-miso";
+ spi0_mosi = "/pinctrl/spi0/spi0-mosi";
+ spi0_clk_hs = "/pinctrl/spi0/spi0-clk-hs";
+ spi0_miso_hs = "/pinctrl/spi0/spi0-miso-hs";
+ spi0_mosi_hs = "/pinctrl/spi0/spi0-mosi-hs";
+ spi1_clk = "/pinctrl/spi1/spi1-clk";
+ spi1_csn0 = "/pinctrl/spi1/spi1-csn0";
+ spi1_csn1 = "/pinctrl/spi1/spi1-csn1";
+ spi1_miso = "/pinctrl/spi1/spi1-miso";
+ spi1_mosi = "/pinctrl/spi1/spi1-mosi";
+ spi1_clk_hs = "/pinctrl/spi1/spi1-clk-hs";
+ spi1_miso_hs = "/pinctrl/spi1/spi1-miso-hs";
+ spi1_mosi_hs = "/pinctrl/spi1/spi1-mosi-hs";
+ pdm_clk0m0 = "/pinctrl/pdm/pdm-clk0m0";
+ pdm_clk0m1 = "/pinctrl/pdm/pdm-clk0m1";
+ pdm_clk1 = "/pinctrl/pdm/pdm-clk1";
+ pdm_sdi0m0 = "/pinctrl/pdm/pdm-sdi0m0";
+ pdm_sdi0m1 = "/pinctrl/pdm/pdm-sdi0m1";
+ pdm_sdi1 = "/pinctrl/pdm/pdm-sdi1";
+ pdm_sdi2 = "/pinctrl/pdm/pdm-sdi2";
+ pdm_sdi3 = "/pinctrl/pdm/pdm-sdi3";
+ pdm_clk0m0_sleep = "/pinctrl/pdm/pdm-clk0m0-sleep";
+ pdm_clk0m_sleep1 = "/pinctrl/pdm/pdm-clk0m1-sleep";
+ pdm_clk1_sleep = "/pinctrl/pdm/pdm-clk1-sleep";
+ pdm_sdi0m0_sleep = "/pinctrl/pdm/pdm-sdi0m0-sleep";
+ pdm_sdi0m1_sleep = "/pinctrl/pdm/pdm-sdi0m1-sleep";
+ pdm_sdi1_sleep = "/pinctrl/pdm/pdm-sdi1-sleep";
+ pdm_sdi2_sleep = "/pinctrl/pdm/pdm-sdi2-sleep";
+ pdm_sdi3_sleep = "/pinctrl/pdm/pdm-sdi3-sleep";
+ i2s0_8ch_mclk = "/pinctrl/i2s0/i2s0-8ch-mclk";
+ i2s0_8ch_sclktx = "/pinctrl/i2s0/i2s0-8ch-sclktx";
+ i2s0_8ch_sclkrx = "/pinctrl/i2s0/i2s0-8ch-sclkrx";
+ i2s0_8ch_lrcktx = "/pinctrl/i2s0/i2s0-8ch-lrcktx";
+ i2s0_8ch_lrckrx = "/pinctrl/i2s0/i2s0-8ch-lrckrx";
+ i2s0_8ch_sdo0 = "/pinctrl/i2s0/i2s0-8ch-sdo0";
+ i2s0_8ch_sdo1 = "/pinctrl/i2s0/i2s0-8ch-sdo1";
+ i2s0_8ch_sdo2 = "/pinctrl/i2s0/i2s0-8ch-sdo2";
+ i2s0_8ch_sdo3 = "/pinctrl/i2s0/i2s0-8ch-sdo3";
+ i2s0_8ch_sdi0 = "/pinctrl/i2s0/i2s0-8ch-sdi0";
+ i2s0_8ch_sdi1 = "/pinctrl/i2s0/i2s0-8ch-sdi1";
+ i2s0_8ch_sdi2 = "/pinctrl/i2s0/i2s0-8ch-sdi2";
+ i2s0_8ch_sdi3 = "/pinctrl/i2s0/i2s0-8ch-sdi3";
+ i2s1_2ch_mclk = "/pinctrl/i2s1/i2s1-2ch-mclk";
+ i2s1_2ch_sclk = "/pinctrl/i2s1/i2s1-2ch-sclk";
+ i2s1_2ch_lrck = "/pinctrl/i2s1/i2s1-2ch-lrck";
+ i2s1_2ch_sdi = "/pinctrl/i2s1/i2s1-2ch-sdi";
+ i2s1_2ch_sdo = "/pinctrl/i2s1/i2s1-2ch-sdo";
+ i2s2_2ch_mclk = "/pinctrl/i2s2/i2s2-2ch-mclk";
+ i2s2_2ch_sclk = "/pinctrl/i2s2/i2s2-2ch-sclk";
+ i2s2_2ch_lrck = "/pinctrl/i2s2/i2s2-2ch-lrck";
+ i2s2_2ch_sdi = "/pinctrl/i2s2/i2s2-2ch-sdi";
+ i2s2_2ch_sdo = "/pinctrl/i2s2/i2s2-2ch-sdo";
+ sdmmc_clk = "/pinctrl/sdmmc/sdmmc-clk";
+ sdmmc_cmd = "/pinctrl/sdmmc/sdmmc-cmd";
+ sdmmc_det = "/pinctrl/sdmmc/sdmmc-det";
+ sdmmc_bus1 = "/pinctrl/sdmmc/sdmmc-bus1";
+ sdmmc_bus4 = "/pinctrl/sdmmc/sdmmc-bus4";
+ sdmmc_gpio = "/pinctrl/sdmmc/sdmmc-gpio";
+ sdio_clk = "/pinctrl/sdio/sdio-clk";
+ sdio_cmd = "/pinctrl/sdio/sdio-cmd";
+ sdio_bus4 = "/pinctrl/sdio/sdio-bus4";
+ sdio_gpio = "/pinctrl/sdio/sdio-gpio";
+ emmc_clk = "/pinctrl/emmc/emmc-clk";
+ emmc_cmd = "/pinctrl/emmc/emmc-cmd";
+ emmc_pwren = "/pinctrl/emmc/emmc-pwren";
+ emmc_rstnout = "/pinctrl/emmc/emmc-rstnout";
+ emmc_bus1 = "/pinctrl/emmc/emmc-bus1";
+ emmc_bus4 = "/pinctrl/emmc/emmc-bus4";
+ emmc_bus8 = "/pinctrl/emmc/emmc-bus8";
+ flash_cs0 = "/pinctrl/flash/flash-cs0";
+ flash_rdy = "/pinctrl/flash/flash-rdy";
+ flash_dqs = "/pinctrl/flash/flash-dqs";
+ flash_ale = "/pinctrl/flash/flash-ale";
+ flash_cle = "/pinctrl/flash/flash-cle";
+ flash_wrn = "/pinctrl/flash/flash-wrn";
+ flash_csl = "/pinctrl/flash/flash-csl";
+ flash_rdn = "/pinctrl/flash/flash-rdn";
+ flash_bus8 = "/pinctrl/flash/flash-bus8";
+ lcdc_m0_rgb_pins = "/pinctrl/lcdc/lcdc-m0-rgb-pins";
+ lcdc_m0_sleep_pins = "/pinctrl/lcdc/lcdc-m0-sleep-pins";
+ lcdc_m1_rgb_pins = "/pinctrl/lcdc/lcdc-m1-rgb-pins";
+ lcdc_m1_sleep_pins = "/pinctrl/lcdc/lcdc-m1-sleep-pins";
+ pwm0_pin = "/pinctrl/pwm0/pwm0-pin";
+ pwm1_pin = "/pinctrl/pwm1/pwm1-pin";
+ pwm2_pin = "/pinctrl/pwm2/pwm2-pin";
+ pwm3_pin = "/pinctrl/pwm3/pwm3-pin";
+ pwm4_pin = "/pinctrl/pwm4/pwm4-pin";
+ pwm5_pin = "/pinctrl/pwm5/pwm5-pin";
+ pwm6_pin = "/pinctrl/pwm6/pwm6-pin";
+ pwm7_pin = "/pinctrl/pwm7/pwm7-pin";
+ rmii_pins = "/pinctrl/gmac/rmii-pins";
+ mac_refclk_12ma = "/pinctrl/gmac/mac-refclk-12ma";
+ mac_refclk = "/pinctrl/gmac/mac-refclk";
+ cif_clkout_m0 = "/pinctrl/cif-m0/cif-clkout-m0";
+ dvp_d2d9_m0 = "/pinctrl/cif-m0/dvp-d2d9-m0";
+ dvp_d0d1_m0 = "/pinctrl/cif-m0/dvp-d0d1-m0";
+ dvp_d10d11_m0 = "/pinctrl/cif-m0/d10-d11-m0";
+ cif_clkout_m1 = "/pinctrl/cif-m1/cif-clkout-m1";
+ dvp_d2d9_m1 = "/pinctrl/cif-m1/dvp-d2d9-m1";
+ dvp_d0d1_m1 = "/pinctrl/cif-m1/dvp-d0d1-m1";
+ dvp_d10d11_m1 = "/pinctrl/cif-m1/d10-d11-m1";
+ isp_prelight = "/pinctrl/isp/isp-prelight";
+ pmic_int = "/pinctrl/pmic/pmic_int";
+ soc_slppin_gpio = "/pinctrl/pmic/soc_slppin_gpio";
+ soc_slppin_slp = "/pinctrl/pmic/soc_slppin_slp";
+ soc_slppin_rst = "/pinctrl/pmic/soc_slppin_rst";
+ led_pins = "/pinctrl/leds/led-pins";
+ btn_pins = "/pinctrl/btns/btn-pins";
+ drm_logo = "/reserved-memory/drm-logo@00000000";
+ ramoops_mem = "/reserved-memory/region@110000";
+ gpio_keys = "/odroidgo3-keys";
+ joypad = "/odroidgo3-joypad";
+ leds = "/gpio_leds";
+ backlight = "/backlight";
+ vccsys = "/vccsys";
+ };
+};
diff --git a/config/archr-dts/R36S-DTB/DTS/Panel2.dts b/config/archr-dts/R36S-DTB/DTS/Panel2.dts
new file mode 100644
index 0000000000..2db0b5a537
--- /dev/null
+++ b/config/archr-dts/R36S-DTB/DTS/Panel2.dts
@@ -0,0 +1,4063 @@
+/dts-v1/;
+
+/ {
+ compatible = "rockchip,rk3326-odroidgo3-linux\0rockchip,rk3326";
+ interrupt-parent = <0x01>;
+ #address-cells = <0x02>;
+ #size-cells = <0x02>;
+ model = "Game Console R35S/R36S fix by AeolusUX";
+
+ ddr_timing {
+ compatible = "rockchip,ddr-timing";
+ ddr2_speed_bin = <0x00>;
+ ddr3_speed_bin = <0x15>;
+ ddr4_speed_bin = <0x0c>;
+ pd_idle = <0x0d>;
+ sr_idle = <0x5d>;
+ sr_mc_gate_idle = <0x00>;
+ srpd_lite_idle = <0x00>;
+ standby_idle = <0x00>;
+ auto_pd_dis_freq = <0x42a>;
+ auto_sr_dis_freq = <0x320>;
+ ddr2_dll_dis_freq = <0x12c>;
+ ddr3_dll_dis_freq = <0x12c>;
+ ddr4_dll_dis_freq = <0x271>;
+ phy_dll_dis_freq = <0x190>;
+ ddr2_odt_dis_freq = <0x64>;
+ phy_ddr2_odt_dis_freq = <0x64>;
+ ddr2_drv = <0x01>;
+ ddr2_odt = <0x96>;
+ phy_ddr2_ca_drv = <0x15>;
+ phy_ddr2_ck_drv = <0x12>;
+ phy_ddr2_dq_drv = <0x15>;
+ phy_ddr2_odt = <0x02>;
+ ddr3_odt_dis_freq = <0x190>;
+ phy_ddr3_odt_dis_freq = <0x190>;
+ ddr3_drv = <0x28>;
+ ddr3_odt = <0x78>;
+ phy_ddr3_ca_drv = <0x15>;
+ phy_ddr3_ck_drv = <0x12>;
+ phy_ddr3_dq_drv = <0x15>;
+ phy_ddr3_odt = <0x02>;
+ phy_lpddr2_odt_dis_freq = <0x29a>;
+ lpddr2_drv = <0x28>;
+ phy_lpddr2_ca_drv = <0x16>;
+ phy_lpddr2_ck_drv = <0x13>;
+ phy_lpddr2_dq_drv = <0x16>;
+ phy_lpddr2_odt = <0x00>;
+ lpddr3_odt_dis_freq = <0x190>;
+ phy_lpddr3_odt_dis_freq = <0x190>;
+ lpddr3_drv = <0x28>;
+ lpddr3_odt = <0xf0>;
+ phy_lpddr3_ca_drv = <0x16>;
+ phy_lpddr3_ck_drv = <0x13>;
+ phy_lpddr3_dq_drv = <0x16>;
+ phy_lpddr3_odt = <0x02>;
+ lpddr4_odt_dis_freq = <0x320>;
+ phy_lpddr4_odt_dis_freq = <0x320>;
+ lpddr4_drv = <0x3c>;
+ lpddr4_dq_odt = <0x28>;
+ lpddr4_ca_odt = <0x28>;
+ phy_lpddr4_ca_drv = <0x14>;
+ phy_lpddr4_ck_cs_drv = <0x06>;
+ phy_lpddr4_dq_drv = <0x06>;
+ phy_lpddr4_odt = <0x10>;
+ ddr4_odt_dis_freq = <0x29a>;
+ phy_ddr4_odt_dis_freq = <0x29a>;
+ ddr4_drv = <0x22>;
+ ddr4_odt = <0xf0>;
+ phy_ddr4_ca_drv = <0x16>;
+ phy_ddr4_ck_drv = <0x13>;
+ phy_ddr4_dq_drv = <0x16>;
+ phy_ddr4_odt = <0x02>;
+ ddr3a1_ddr4a9_de-skew = <0x06>;
+ ddr3a0_ddr4a10_de-skew = <0x07>;
+ ddr3a3_ddr4a6_de-skew = <0x07>;
+ ddr3a2_ddr4a4_de-skew = <0x07>;
+ ddr3a5_ddr4a8_de-skew = <0x07>;
+ ddr3a4_ddr4a5_de-skew = <0x07>;
+ ddr3a7_ddr4a11_de-skew = <0x07>;
+ ddr3a6_ddr4a7_de-skew = <0x06>;
+ ddr3a9_ddr4a0_de-skew = <0x07>;
+ ddr3a8_ddr4a13_de-skew = <0x07>;
+ ddr3a11_ddr4a3_de-skew = <0x07>;
+ ddr3a10_ddr4cs0_de-skew = <0x07>;
+ ddr3a13_ddr4a2_de-skew = <0x07>;
+ ddr3a12_ddr4ba1_de-skew = <0x07>;
+ ddr3a15_ddr4odt0_de-skew = <0x07>;
+ ddr3a14_ddr4a1_de-skew = <0x07>;
+ ddr3ba1_ddr4a15_de-skew = <0x07>;
+ ddr3ba0_ddr4bg0_de-skew = <0x07>;
+ ddr3ras_ddr4cke_de-skew = <0x07>;
+ ddr3ba2_ddr4ba0_de-skew = <0x07>;
+ ddr3we_ddr4bg1_de-skew = <0x07>;
+ ddr3cas_ddr4a12_de-skew = <0x07>;
+ ddr3ckn_ddr4ckn_de-skew = <0x07>;
+ ddr3ckp_ddr4ckp_de-skew = <0x07>;
+ ddr3cke_ddr4a16_de-skew = <0x07>;
+ ddr3odt0_ddr4a14_de-skew = <0x07>;
+ ddr3cs0_ddr4act_de-skew = <0x06>;
+ ddr3reset_ddr4reset_de-skew = <0x07>;
+ ddr3cs1_ddr4cs1_de-skew = <0x06>;
+ ddr3odt1_ddr4odt1_de-skew = <0x07>;
+ cs0_dm0_rx_de-skew = <0x07>;
+ cs0_dm0_tx_de-skew = <0x07>;
+ cs0_dq0_rx_de-skew = <0x08>;
+ cs0_dq0_tx_de-skew = <0x08>;
+ cs0_dq1_rx_de-skew = <0x09>;
+ cs0_dq1_tx_de-skew = <0x08>;
+ cs0_dq2_rx_de-skew = <0x08>;
+ cs0_dq2_tx_de-skew = <0x08>;
+ cs0_dq3_rx_de-skew = <0x08>;
+ cs0_dq3_tx_de-skew = <0x08>;
+ cs0_dq4_rx_de-skew = <0x09>;
+ cs0_dq4_tx_de-skew = <0x08>;
+ cs0_dq5_rx_de-skew = <0x09>;
+ cs0_dq5_tx_de-skew = <0x08>;
+ cs0_dq6_rx_de-skew = <0x09>;
+ cs0_dq6_tx_de-skew = <0x08>;
+ cs0_dq7_rx_de-skew = <0x08>;
+ cs0_dq7_tx_de-skew = <0x08>;
+ cs0_dqs0_rx_de-skew = <0x06>;
+ cs0_dqs0p_tx_de-skew = <0x09>;
+ cs0_dqs0n_tx_de-skew = <0x09>;
+ cs0_dm1_rx_de-skew = <0x07>;
+ cs0_dm1_tx_de-skew = <0x06>;
+ cs0_dq8_rx_de-skew = <0x08>;
+ cs0_dq8_tx_de-skew = <0x07>;
+ cs0_dq9_rx_de-skew = <0x09>;
+ cs0_dq9_tx_de-skew = <0x07>;
+ cs0_dq10_rx_de-skew = <0x08>;
+ cs0_dq10_tx_de-skew = <0x08>;
+ cs0_dq11_rx_de-skew = <0x08>;
+ cs0_dq11_tx_de-skew = <0x07>;
+ cs0_dq12_rx_de-skew = <0x08>;
+ cs0_dq12_tx_de-skew = <0x08>;
+ cs0_dq13_rx_de-skew = <0x09>;
+ cs0_dq13_tx_de-skew = <0x07>;
+ cs0_dq14_rx_de-skew = <0x09>;
+ cs0_dq14_tx_de-skew = <0x08>;
+ cs0_dq15_rx_de-skew = <0x09>;
+ cs0_dq15_tx_de-skew = <0x07>;
+ cs0_dqs1_rx_de-skew = <0x07>;
+ cs0_dqs1p_tx_de-skew = <0x09>;
+ cs0_dqs1n_tx_de-skew = <0x09>;
+ cs0_dm2_rx_de-skew = <0x07>;
+ cs0_dm2_tx_de-skew = <0x07>;
+ cs0_dq16_rx_de-skew = <0x09>;
+ cs0_dq16_tx_de-skew = <0x09>;
+ cs0_dq17_rx_de-skew = <0x07>;
+ cs0_dq17_tx_de-skew = <0x09>;
+ cs0_dq18_rx_de-skew = <0x07>;
+ cs0_dq18_tx_de-skew = <0x08>;
+ cs0_dq19_rx_de-skew = <0x07>;
+ cs0_dq19_tx_de-skew = <0x09>;
+ cs0_dq20_rx_de-skew = <0x09>;
+ cs0_dq20_tx_de-skew = <0x09>;
+ cs0_dq21_rx_de-skew = <0x09>;
+ cs0_dq21_tx_de-skew = <0x09>;
+ cs0_dq22_rx_de-skew = <0x08>;
+ cs0_dq22_tx_de-skew = <0x09>;
+ cs0_dq23_rx_de-skew = <0x08>;
+ cs0_dq23_tx_de-skew = <0x09>;
+ cs0_dqs2_rx_de-skew = <0x06>;
+ cs0_dqs2p_tx_de-skew = <0x09>;
+ cs0_dqs2n_tx_de-skew = <0x09>;
+ cs0_dm3_rx_de-skew = <0x07>;
+ cs0_dm3_tx_de-skew = <0x07>;
+ cs0_dq24_rx_de-skew = <0x08>;
+ cs0_dq24_tx_de-skew = <0x08>;
+ cs0_dq25_rx_de-skew = <0x09>;
+ cs0_dq25_tx_de-skew = <0x09>;
+ cs0_dq26_rx_de-skew = <0x09>;
+ cs0_dq26_tx_de-skew = <0x08>;
+ cs0_dq27_rx_de-skew = <0x09>;
+ cs0_dq27_tx_de-skew = <0x08>;
+ cs0_dq28_rx_de-skew = <0x09>;
+ cs0_dq28_tx_de-skew = <0x09>;
+ cs0_dq29_rx_de-skew = <0x09>;
+ cs0_dq29_tx_de-skew = <0x09>;
+ cs0_dq30_rx_de-skew = <0x08>;
+ cs0_dq30_tx_de-skew = <0x08>;
+ cs0_dq31_rx_de-skew = <0x08>;
+ cs0_dq31_tx_de-skew = <0x08>;
+ cs0_dqs3_rx_de-skew = <0x07>;
+ cs0_dqs3p_tx_de-skew = <0x09>;
+ cs0_dqs3n_tx_de-skew = <0x09>;
+ cs1_dm0_rx_de-skew = <0x07>;
+ cs1_dm0_tx_de-skew = <0x07>;
+ cs1_dq0_rx_de-skew = <0x08>;
+ cs1_dq0_tx_de-skew = <0x08>;
+ cs1_dq1_rx_de-skew = <0x09>;
+ cs1_dq1_tx_de-skew = <0x08>;
+ cs1_dq2_rx_de-skew = <0x08>;
+ cs1_dq2_tx_de-skew = <0x08>;
+ cs1_dq3_rx_de-skew = <0x08>;
+ cs1_dq3_tx_de-skew = <0x08>;
+ cs1_dq4_rx_de-skew = <0x08>;
+ cs1_dq4_tx_de-skew = <0x08>;
+ cs1_dq5_rx_de-skew = <0x09>;
+ cs1_dq5_tx_de-skew = <0x08>;
+ cs1_dq6_rx_de-skew = <0x09>;
+ cs1_dq6_tx_de-skew = <0x08>;
+ cs1_dq7_rx_de-skew = <0x08>;
+ cs1_dq7_tx_de-skew = <0x08>;
+ cs1_dqs0_rx_de-skew = <0x06>;
+ cs1_dqs0p_tx_de-skew = <0x09>;
+ cs1_dqs0n_tx_de-skew = <0x09>;
+ cs1_dm1_rx_de-skew = <0x07>;
+ cs1_dm1_tx_de-skew = <0x07>;
+ cs1_dq8_rx_de-skew = <0x08>;
+ cs1_dq8_tx_de-skew = <0x08>;
+ cs1_dq9_rx_de-skew = <0x08>;
+ cs1_dq9_tx_de-skew = <0x07>;
+ cs1_dq10_rx_de-skew = <0x07>;
+ cs1_dq10_tx_de-skew = <0x08>;
+ cs1_dq11_rx_de-skew = <0x08>;
+ cs1_dq11_tx_de-skew = <0x08>;
+ cs1_dq12_rx_de-skew = <0x08>;
+ cs1_dq12_tx_de-skew = <0x07>;
+ cs1_dq13_rx_de-skew = <0x08>;
+ cs1_dq13_tx_de-skew = <0x08>;
+ cs1_dq14_rx_de-skew = <0x08>;
+ cs1_dq14_tx_de-skew = <0x08>;
+ cs1_dq15_rx_de-skew = <0x08>;
+ cs1_dq15_tx_de-skew = <0x07>;
+ cs1_dqs1_rx_de-skew = <0x07>;
+ cs1_dqs1p_tx_de-skew = <0x09>;
+ cs1_dqs1n_tx_de-skew = <0x09>;
+ cs1_dm2_rx_de-skew = <0x07>;
+ cs1_dm2_tx_de-skew = <0x08>;
+ cs1_dq16_rx_de-skew = <0x08>;
+ cs1_dq16_tx_de-skew = <0x09>;
+ cs1_dq17_rx_de-skew = <0x08>;
+ cs1_dq17_tx_de-skew = <0x09>;
+ cs1_dq18_rx_de-skew = <0x07>;
+ cs1_dq18_tx_de-skew = <0x08>;
+ cs1_dq19_rx_de-skew = <0x08>;
+ cs1_dq19_tx_de-skew = <0x09>;
+ cs1_dq20_rx_de-skew = <0x09>;
+ cs1_dq20_tx_de-skew = <0x09>;
+ cs1_dq21_rx_de-skew = <0x09>;
+ cs1_dq21_tx_de-skew = <0x09>;
+ cs1_dq22_rx_de-skew = <0x08>;
+ cs1_dq22_tx_de-skew = <0x09>;
+ cs1_dq23_rx_de-skew = <0x08>;
+ cs1_dq23_tx_de-skew = <0x09>;
+ cs1_dqs2_rx_de-skew = <0x06>;
+ cs1_dqs2p_tx_de-skew = <0x09>;
+ cs1_dqs2n_tx_de-skew = <0x09>;
+ cs1_dm3_rx_de-skew = <0x07>;
+ cs1_dm3_tx_de-skew = <0x07>;
+ cs1_dq24_rx_de-skew = <0x08>;
+ cs1_dq24_tx_de-skew = <0x09>;
+ cs1_dq25_rx_de-skew = <0x09>;
+ cs1_dq25_tx_de-skew = <0x09>;
+ cs1_dq26_rx_de-skew = <0x09>;
+ cs1_dq26_tx_de-skew = <0x08>;
+ cs1_dq27_rx_de-skew = <0x08>;
+ cs1_dq27_tx_de-skew = <0x08>;
+ cs1_dq28_rx_de-skew = <0x09>;
+ cs1_dq28_tx_de-skew = <0x09>;
+ cs1_dq29_rx_de-skew = <0x09>;
+ cs1_dq29_tx_de-skew = <0x09>;
+ cs1_dq30_rx_de-skew = <0x09>;
+ cs1_dq30_tx_de-skew = <0x08>;
+ cs1_dq31_rx_de-skew = <0x08>;
+ cs1_dq31_tx_de-skew = <0x08>;
+ cs1_dqs3_rx_de-skew = <0x07>;
+ cs1_dqs3p_tx_de-skew = <0x09>;
+ cs1_dqs3n_tx_de-skew = <0x09>;
+ phandle = <0xaf>;
+ };
+
+ aliases {
+ ethernet0 = "/ethernet@ff360000";
+ i2c0 = "/i2c@ff180000";
+ i2c1 = "/i2c@ff190000";
+ i2c2 = "/i2c@ff1a0000";
+ i2c3 = "/i2c@ff1b0000";
+ serial0 = "/serial@ff030000";
+ serial1 = "/serial@ff158000";
+ serial2 = "/serial@ff160000";
+ serial3 = "/serial@ff168000";
+ serial4 = "/serial@ff170000";
+ serial5 = "/serial@ff178000";
+ spi0 = "/spi@ff1d0000";
+ spi1 = "/spi@ff1d8000";
+ };
+
+ cpus {
+ #address-cells = <0x02>;
+ #size-cells = <0x00>;
+
+ cpu@0 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a35\0arm,armv8";
+ reg = <0x00 0x00>;
+ enable-method = "psci";
+ clocks = <0x02 0x07>;
+ #cooling-cells = <0x02>;
+ dynamic-power-coefficient = <0x5a>;
+ operating-points-v2 = <0x03>;
+ cpu-idle-states = <0x04 0x05>;
+ cpu-supply = <0x06>;
+ phandle = <0x09>;
+ };
+
+ cpu@1 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a35\0arm,armv8";
+ reg = <0x00 0x01>;
+ enable-method = "psci";
+ operating-points-v2 = <0x03>;
+ cpu-idle-states = <0x04 0x05>;
+ phandle = <0x0a>;
+ };
+
+ cpu@2 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a35\0arm,armv8";
+ reg = <0x00 0x02>;
+ enable-method = "psci";
+ operating-points-v2 = <0x03>;
+ cpu-idle-states = <0x04 0x05>;
+ phandle = <0x0b>;
+ };
+
+ cpu@3 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a35\0arm,armv8";
+ reg = <0x00 0x03>;
+ enable-method = "psci";
+ operating-points-v2 = <0x03>;
+ cpu-idle-states = <0x04 0x05>;
+ phandle = <0x0c>;
+ };
+
+ idle-states {
+ entry-method = "psci";
+
+ cpu-sleep {
+ compatible = "arm,idle-state";
+ local-timer-stop;
+ arm,psci-suspend-param = <0x10000>;
+ entry-latency-us = <0x78>;
+ exit-latency-us = <0xfa>;
+ min-residency-us = <0x384>;
+ phandle = <0x04>;
+ };
+
+ cluster-sleep {
+ compatible = "arm,idle-state";
+ local-timer-stop;
+ arm,psci-suspend-param = <0x1010000>;
+ entry-latency-us = <0x190>;
+ exit-latency-us = <0x1f4>;
+ min-residency-us = <0x7d0>;
+ phandle = <0x05>;
+ };
+ };
+ };
+
+ cpu0-opp-table {
+ compatible = "operating-points-v2";
+ opp-shared;
+ rockchip,temp-hysteresis = <0x1388>;
+ rockchip,low-temp = <0x00>;
+ rockchip,low-temp-min-volt = <0xf4240>;
+ rockchip,low-temp-adjust-volt = <0x00 0x5e8 0xc350>;
+ clocks = <0x02 0x01>;
+ rockchip,avs-scale = <0x04>;
+ rockchip,max-volt = <0x149970>;
+ rockchip,evb-irdrop = <0x61a8>;
+ nvmem-cells = <0x07 0x08>;
+ nvmem-cell-names = "cpu_leakage\0performance";
+ rockchip,bin-scaling-sel = <0x00 0x0d 0x01 0x0d>;
+ rockchip,pvtm-voltage-sel = <0x00 0xc350 0x00 0xc351 0xd2f0 0x01 0xd2f1 0xea60 0x02 0xea61 0x1869f 0x03>;
+ rockchip,pvtm-freq = <0x639c0>;
+ rockchip,pvtm-volt = <0xf4240>;
+ rockchip,pvtm-ch = <0x00 0x00>;
+ rockchip,pvtm-sample-time = <0x3e8>;
+ rockchip,pvtm-number = <0x0a>;
+ rockchip,pvtm-error = <0x3e8>;
+ rockchip,pvtm-ref-temp = <0x28>;
+ rockchip,pvtm-temp-prop = <0xffffffc8 0xffffffc8>;
+ rockchip,thermal-zone = "soc-thermal";
+ rockchip,avs = <0x01>;
+ phandle = <0x03>;
+
+ opp-1008000000 {
+ opp-hz = <0x00 0x3c14dc00>;
+ opp-microvolt = <0x11edd8 0x11edd8 0x149970>;
+ opp-microvolt-L0 = <0x11edd8 0x11edd8 0x149970>;
+ opp-microvolt-L1 = <0x112a88 0x112a88 0x149970>;
+ opp-microvolt-L2 = <0x112a88 0x112a88 0x149970>;
+ opp-microvolt-L3 = <0x100590 0x100590 0x149970>;
+ clock-latency-ns = <0x9c40>;
+ };
+
+ opp-1200000000 {
+ opp-hz = <0x00 0x47868c00>;
+ opp-microvolt = <0x13d620 0x13d620 0x149970>;
+ opp-microvolt-L0 = <0x13d620 0x13d620 0x149970>;
+ opp-microvolt-L1 = <0x137478 0x137478 0x149970>;
+ opp-microvolt-L2 = <0x1312d0 0x1312d0 0x149970>;
+ opp-microvolt-L3 = <0x124f80 0x124f80 0x149970>;
+ clock-latency-ns = <0x9c40>;
+ };
+
+ opp-1248000000 {
+ opp-hz = <0x00 0x4a62f800>;
+ opp-microvolt = <0x149970 0x149970 0x149970>;
+ opp-microvolt-L0 = <0x149970 0x149970 0x149970>;
+ opp-microvolt-L1 = <0x13d620 0x13d620 0x149970>;
+ opp-microvolt-L2 = <0x137478 0x137478 0x149970>;
+ opp-microvolt-L3 = <0x12b128 0x12b128 0x149970>;
+ clock-latency-ns = <0x9c40>;
+ };
+
+ opp-1296000000 {
+ opp-hz = <0x00 0x4d3f6400>;
+ opp-microvolt = <0x149970 0x149970 0x149970>;
+ opp-microvolt-L0 = <0x149970 0x149970 0x149970>;
+ opp-microvolt-L1 = <0x149970 0x149970 0x149970>;
+ opp-microvolt-L2 = <0x13d620 0x13d620 0x149970>;
+ opp-microvolt-L3 = <0x1312d0 0x1312d0 0x149970>;
+ clock-latency-ns = <0x9c40>;
+ };
+
+ opp-1512000000 {
+ opp-hz = <0x00 0x5a1f4a00>;
+ opp-microvolt = <0x149970 0x149970 0x149970>;
+ opp-microvolt-L0 = <0x149970 0x149970 0x149970>;
+ opp-microvolt-L1 = <0x149970 0x149970 0x149970>;
+ opp-microvolt-L2 = <0x13d620 0x13d620 0x149970>;
+ opp-microvolt-L3 = <0x1312d0 0x1312d0 0x149970>;
+ clock-latency-ns = <0x9c40>;
+ };
+ };
+
+ arm-pmu {
+ compatible = "arm,cortex-a53-pmu";
+ interrupts = <0x00 0x64 0x04 0x00 0x65 0x04 0x00 0x66 0x04 0x00 0x67 0x04>;
+ interrupt-affinity = <0x09 0x0a 0x0b 0x0c>;
+ };
+
+ bus-soc {
+ compatible = "rockchip,px30-bus";
+ rockchip,busfreq-policy = "autocs";
+ phandle = <0xc4>;
+
+ soc-bus0 {
+ bus-id = <0x00>;
+ timer-us = <0x14>;
+ enable-msk = <0x40f7>;
+ status = "disabled";
+ };
+
+ soc-bus1 {
+ bus-id = <0x01>;
+ timer-us = <0xc8>;
+ enable-msk = <0x40bf>;
+ status = "disabled";
+ };
+
+ soc-bus2 {
+ bus-id = <0x02>;
+ timer-us = <0xc8>;
+ enable-msk = <0x4007>;
+ status = "disabled";
+ };
+ };
+
+ bus-apll {
+ compatible = "rockchip,px30-bus";
+ rockchip,busfreq-policy = "clkfreq";
+ clocks = <0x02 0x01>;
+ clock-names = "bus";
+ operating-points-v2 = <0x0d>;
+ status = "okay";
+ bus-supply = <0x0e>;
+ phandle = <0xc5>;
+ };
+
+ bus-apll-opp-table {
+ compatible = "operating-points-v2";
+ opp-shared;
+ phandle = <0x0d>;
+
+ opp-1512000000 {
+ opp-hz = <0x00 0x5a1f4a00>;
+ opp-microvolt = <0xf4240>;
+ };
+
+ opp-1008000000 {
+ opp-hz = <0x00 0x3c14dc00>;
+ opp-microvolt = <0xe7ef0>;
+ };
+ };
+
+ cpuinfo {
+ compatible = "rockchip,cpuinfo";
+ nvmem-cells = <0x0f>;
+ nvmem-cell-names = "id";
+ };
+
+ display-subsystem {
+ compatible = "rockchip,display-subsystem";
+ ports = <0x10>;
+ status = "okay";
+ logo-memory-region = <0x11>;
+ phandle = <0xc6>;
+
+ route {
+
+ route-lvds {
+ status = "disabled";
+ logo,uboot = "logo.gif";
+ logo,kernel = "logo_kernel.gif";
+ logo,mode = "center";
+ charge_logo,mode = "center";
+ connect = <0x12>;
+ phandle = <0xc7>;
+ };
+
+ route-dsi {
+ status = "okay";
+ logo,uboot = "logo.gif";
+ logo,kernel = "logo_kernel.gif";
+ logo,mode = "center";
+ charge_logo,mode = "center";
+ connect = <0x13>;
+ phandle = <0xc8>;
+ };
+
+ route-rgb {
+ status = "disabled";
+ logo,uboot = "logo.gif";
+ logo,kernel = "logo_kernel.gif";
+ logo,mode = "center";
+ charge_logo,mode = "center";
+ connect = <0x14>;
+ phandle = <0xc9>;
+ };
+ };
+ };
+
+ firmware {
+
+ optee {
+ compatible = "linaro,optee-tz";
+ method = "smc";
+ };
+ };
+
+ external-gmac-clock {
+ compatible = "fixed-clock";
+ clock-frequency = <0x2faf080>;
+ clock-output-names = "gmac_clkin";
+ #clock-cells = <0x00>;
+ phandle = <0xca>;
+ };
+
+ psci {
+ compatible = "arm,psci-1.0";
+ method = "smc";
+ };
+
+ rockchip-suspend {
+ compatible = "rockchip,pm-px30";
+ status = "okay";
+ rockchip,sleep-debug-en = <0x01>;
+ rockchip,sleep-mode-config = <0x20702>;
+ rockchip,wakeup-config = <0x85>;
+ phandle = <0xcb>;
+ };
+
+ timer {
+ compatible = "arm,armv8-timer";
+ interrupts = <0x01 0x0d 0xf04 0x01 0x0e 0xf04 0x01 0x0b 0xf04 0x01 0x0a 0xf04>;
+ };
+
+ xin24m {
+ compatible = "fixed-clock";
+ #clock-cells = <0x00>;
+ clock-frequency = <0x16e3600>;
+ clock-output-names = "xin24m";
+ phandle = <0xcc>;
+ };
+
+ xin32k {
+ compatible = "fixed-clock";
+ #clock-cells = <0x00>;
+ clock-frequency = <0x8000>;
+ clock-output-names = "xin32k";
+ phandle = <0xcd>;
+ };
+
+ power-management@ff000000 {
+ compatible = "rockchip,px30-pmu\0syscon\0simple-mfd";
+ reg = <0x00 0xff000000 0x00 0x1000>;
+ phandle = <0xce>;
+
+ power-controller {
+ compatible = "rockchip,px30-power-controller";
+ #power-domain-cells = <0x01>;
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+ phandle = <0x8a>;
+
+ pd_usb@5 {
+ reg = <0x05>;
+ clocks = <0x02 0x103 0x02 0x102 0x02 0x3c>;
+ pm_qos = <0x15 0x16>;
+ };
+
+ pd_sdcard@7 {
+ reg = <0x07>;
+ clocks = <0x02 0xf7 0x02 0x3b>;
+ pm_qos = <0x17>;
+ };
+
+ pd_gmac@9 {
+ reg = <0x09>;
+ clocks = <0x02 0xb2 0x02 0x143 0x02 0x40 0x02 0x3f>;
+ pm_qos = <0x18>;
+ };
+
+ pd_mmc_nand@10 {
+ reg = <0x0a>;
+ clocks = <0x02 0xfe 0x02 0x100 0x02 0xff 0x02 0x101 0x02 0x39 0x02 0x37 0x02 0x38 0x02 0x3a>;
+ pm_qos = <0x19 0x1a 0x1b 0x1c>;
+ };
+
+ pd_vpu@11 {
+ reg = <0x0b>;
+ clocks = <0x02 0xaf 0x02 0xf4 0x02 0x4b>;
+ pm_qos = <0x1d 0x1e>;
+ };
+
+ pd_vo@12 {
+ reg = <0x0c>;
+ clocks = <0x02 0xb7 0x02 0xb5 0x02 0xb6 0x02 0x96 0x02 0x97 0x02 0xfd 0x02 0xfb 0x02 0xfc 0x02 0x144 0x02 0x35 0x02 0x36>;
+ pm_qos = <0x1f 0x20 0x21 0x22>;
+ };
+
+ pd_vi@13 {
+ reg = <0x0d>;
+ clocks = <0x02 0xb3 0x02 0xb4 0x02 0xf9 0x02 0xfa 0x02 0x33>;
+ pm_qos = <0x23 0x24 0x25 0x26 0x27>;
+ };
+
+ pd_gpu@14 {
+ reg = <0x0e>;
+ clocks = <0x02 0x49>;
+ pm_qos = <0x28>;
+ };
+ };
+ };
+
+ syscon@ff010000 {
+ compatible = "rockchip,px30-pmugrf\0syscon\0simple-mfd";
+ reg = <0x00 0xff010000 0x00 0x1000>;
+ #address-cells = <0x01>;
+ #size-cells = <0x01>;
+ phandle = <0xac>;
+
+ io-domains {
+ compatible = "rockchip,px30-pmu-io-voltage-domain";
+ status = "okay";
+ pmuio1-supply = <0x29>;
+ pmuio2-supply = <0x29>;
+ phandle = <0xcf>;
+ };
+
+ reboot-mode {
+ compatible = "syscon-reboot-mode";
+ offset = <0x200>;
+ mode-bootloader = <0x5242c301>;
+ mode-charge = <0x5242c30b>;
+ mode-fastboot = <0x5242c309>;
+ mode-loader = <0x5242c301>;
+ mode-normal = <0x5242c300>;
+ mode-recovery = <0x5242c303>;
+ mode-ums = <0x5242c30c>;
+ };
+
+ pmu-pvtm {
+ compatible = "rockchip,px30-pmu-pvtm";
+ clocks = <0x2a 0x07>;
+ clock-names = "pmu";
+ status = "okay";
+ phandle = <0xd0>;
+ };
+ };
+
+ serial@ff030000 {
+ compatible = "rockchip,px30-uart\0snps,dw-apb-uart";
+ reg = <0x00 0xff030000 0x00 0x100>;
+ interrupts = <0x00 0x0f 0x04>;
+ clocks = <0x2a 0x06 0x2a 0x15>;
+ clock-names = "baudclk\0apb_pclk";
+ reg-shift = <0x02>;
+ reg-io-width = <0x04>;
+ dmas = <0x2b 0x00 0x2b 0x01>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x2c 0x2d 0x2e>;
+ status = "disabled";
+ phandle = <0xd1>;
+ };
+
+ i2s@ff060000 {
+ compatible = "rockchip,px30-i2s-tdm";
+ reg = <0x00 0xff060000 0x00 0x1000>;
+ interrupts = <0x00 0x0c 0x04>;
+ clocks = <0x02 0x10 0x02 0x12 0x02 0x106>;
+ clock-names = "mclk_tx\0mclk_rx\0hclk";
+ dmas = <0x2b 0x10 0x2b 0x11>;
+ dma-names = "tx\0rx";
+ resets = <0x02 0x84 0x02 0xbf>;
+ reset-names = "tx-m\0rx-m";
+ rockchip,cru = <0x02>;
+ rockchip,grf = <0x2f>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x30 0x31 0x32 0x33 0x34 0x35 0x36 0x37 0x38 0x39 0x3a 0x3b>;
+ status = "disabled";
+ phandle = <0xd2>;
+ };
+
+ i2s@ff070000 {
+ compatible = "rockchip,px30-i2s\0rockchip,rk3066-i2s";
+ reg = <0x00 0xff070000 0x00 0x1000>;
+ interrupts = <0x00 0x0d 0x04>;
+ clocks = <0x02 0x14 0x02 0x107>;
+ clock-names = "i2s_clk\0i2s_hclk";
+ dmas = <0x2b 0x12 0x2b 0x13>;
+ dma-names = "tx\0rx";
+ resets = <0x02 0x86 0x02 0x85>;
+ reset-names = "reset-m\0reset-h";
+ pinctrl-names = "default";
+ pinctrl-0 = <0x3c 0x3d 0x3e 0x3f>;
+ status = "okay";
+ #sound-dai-cells = <0x00>;
+ phandle = <0xc2>;
+ };
+
+ i2s@ff080000 {
+ compatible = "rockchip,px30-i2s\0rockchip,rk3066-i2s";
+ reg = <0x00 0xff080000 0x00 0x1000>;
+ interrupts = <0x00 0x0e 0x04>;
+ clocks = <0x02 0x16 0x02 0x108>;
+ clock-names = "i2s_clk\0i2s_hclk";
+ dmas = <0x2b 0x14 0x2b 0x15>;
+ dma-names = "tx\0rx";
+ resets = <0x02 0x88 0x02 0x87>;
+ reset-names = "reset-m\0reset-h";
+ pinctrl-names = "default";
+ pinctrl-0 = <0x40 0x41 0x42 0x43>;
+ status = "disabled";
+ phandle = <0xd3>;
+ };
+
+ pdm@ff0a0000 {
+ compatible = "rockchip,px30-pdm\0rockchip,pdm";
+ reg = <0x00 0xff0a0000 0x00 0x1000>;
+ clocks = <0x02 0x0f 0x02 0x105>;
+ clock-names = "pdm_clk\0pdm_hclk";
+ dmas = <0x2b 0x18>;
+ dma-names = "rx";
+ resets = <0x02 0x82>;
+ reset-names = "pdm-m";
+ pinctrl-names = "default";
+ pinctrl-0 = <0x44 0x45 0x46 0x47 0x48 0x49>;
+ status = "disabled";
+ phandle = <0xd4>;
+ };
+
+ crypto@ff0b0000 {
+ compatible = "rockchip,px30-crypto";
+ reg = <0x00 0xff0b0000 0x00 0x4000>;
+ interrupts = <0x00 0x52 0x04>;
+ clocks = <0x02 0xac 0x02 0xf1 0x02 0x30 0x02 0x31>;
+ clock-names = "aclk\0hclk\0sclk\0apb_pclk";
+ resets = <0x02 0x74>;
+ reset-names = "crypto-rst";
+ status = "disabled";
+ phandle = <0xd5>;
+ };
+
+ rng@ff0b0000 {
+ compatible = "rockchip,cryptov2-rng";
+ reg = <0x00 0xff0b0000 0x00 0x4000>;
+ clocks = <0x02 0x30 0x02 0x31 0x02 0xac 0x02 0xf1>;
+ clock-names = "clk_crypto\0clk_crypto_apk\0aclk_crypto\0hclk_crypto";
+ assigned-clocks = <0x02 0x30 0x02 0x31 0x02 0xac 0x02 0xf1>;
+ assigned-clock-rates = <0x8f0d180 0x8f0d180 0xbebc200 0x5f5e100>;
+ resets = <0x02 0x74>;
+ reset-names = "reset";
+ status = "okay";
+ phandle = <0xd6>;
+ };
+
+ interrupt-controller@ff131000 {
+ compatible = "arm,gic-400";
+ #interrupt-cells = <0x03>;
+ #address-cells = <0x00>;
+ interrupt-controller;
+ reg = <0x00 0xff131000 0x00 0x1000 0x00 0xff132000 0x00 0x2000 0x00 0xff134000 0x00 0x2000 0x00 0xff136000 0x00 0x2000>;
+ interrupts = <0x01 0x09 0xf04>;
+ phandle = <0x01>;
+ };
+
+ syscon@ff140000 {
+ compatible = "rockchip,px30-grf\0syscon\0simple-mfd";
+ reg = <0x00 0xff140000 0x00 0x1000>;
+ #address-cells = <0x01>;
+ #size-cells = <0x01>;
+ phandle = <0x2f>;
+
+ io-domains {
+ compatible = "rockchip,px30-io-voltage-domain";
+ status = "okay";
+ vccio1-supply = <0x4a>;
+ vccio2-supply = <0x4a>;
+ vccio3-supply = <0x4b>;
+ vccio4-supply = <0x4b>;
+ vccio5-supply = <0x4b>;
+ vccio6-supply = <0x4b>;
+ phandle = <0xd7>;
+ };
+
+ lvds {
+ compatible = "rockchip,px30-lvds";
+ phys = <0x4c>;
+ phy-names = "phy";
+ status = "disabled";
+ phandle = <0xd8>;
+
+ ports {
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+
+ port@0 {
+ reg = <0x00>;
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+
+ endpoint@0 {
+ reg = <0x00>;
+ remote-endpoint = <0x12>;
+ phandle = <0xa2>;
+ };
+ };
+ };
+ };
+
+ rgb {
+ compatible = "rockchip,px30-rgb";
+ pinctrl-names = "default\0sleep";
+ pinctrl-0 = <0x4d>;
+ pinctrl-1 = <0x4e>;
+ status = "disabled";
+ phys = <0x4c>;
+ phy-names = "phy";
+ phandle = <0xd9>;
+
+ ports {
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+
+ port@0 {
+ reg = <0x00>;
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+
+ endpoint@0 {
+ reg = <0x00>;
+ remote-endpoint = <0x14>;
+ phandle = <0xa4>;
+ };
+ };
+ };
+ };
+ };
+
+ syscon@ff148000 {
+ compatible = "syscon\0simple-mfd";
+ reg = <0x00 0xff148000 0x00 0x1000>;
+ #address-cells = <0x01>;
+ #size-cells = <0x01>;
+ phandle = <0xda>;
+
+ pvtm {
+ compatible = "rockchip,px30-pvtm";
+ clocks = <0x02 0x4a>;
+ clock-names = "core";
+ status = "okay";
+ phandle = <0xdb>;
+ };
+ };
+
+ serial@ff158000 {
+ compatible = "rockchip,px30-uart\0snps,dw-apb-uart";
+ reg = <0x00 0xff158000 0x00 0x100>;
+ interrupts = <0x00 0x10 0x04>;
+ clocks = <0x02 0x18 0x02 0x149>;
+ clock-names = "baudclk\0apb_pclk";
+ reg-shift = <0x02>;
+ reg-io-width = <0x04>;
+ dmas = <0x2b 0x02 0x2b 0x03>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x4f 0x50>;
+ status = "okay";
+ phandle = <0xdc>;
+ };
+
+ serial@ff160000 {
+ compatible = "rockchip,px30-uart\0snps,dw-apb-uart";
+ reg = <0x00 0xff160000 0x00 0x100>;
+ interrupts = <0x00 0x11 0x04>;
+ clocks = <0x02 0x19 0x02 0x14a>;
+ clock-names = "baudclk\0apb_pclk";
+ reg-shift = <0x02>;
+ reg-io-width = <0x04>;
+ dmas = <0x2b 0x04 0x2b 0x05>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x51>;
+ status = "disabled";
+ phandle = <0xdd>;
+ };
+
+ serial@ff168000 {
+ compatible = "rockchip,px30-uart\0snps,dw-apb-uart";
+ reg = <0x00 0xff168000 0x00 0x100>;
+ interrupts = <0x00 0x12 0x04>;
+ clocks = <0x02 0x1a 0x02 0x14b>;
+ clock-names = "baudclk\0apb_pclk";
+ reg-shift = <0x02>;
+ reg-io-width = <0x04>;
+ dmas = <0x2b 0x06 0x2b 0x07>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x52 0x53 0x54>;
+ status = "disabled";
+ phandle = <0xde>;
+ };
+
+ serial@ff170000 {
+ compatible = "rockchip,px30-uart\0snps,dw-apb-uart";
+ reg = <0x00 0xff170000 0x00 0x100>;
+ interrupts = <0x00 0x13 0x04>;
+ clocks = <0x02 0x1b 0x02 0x14c>;
+ clock-names = "baudclk\0apb_pclk";
+ reg-shift = <0x02>;
+ reg-io-width = <0x04>;
+ dmas = <0x2b 0x08 0x2b 0x09>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x55 0x56 0x57>;
+ status = "disabled";
+ phandle = <0xdf>;
+ };
+
+ serial@ff178000 {
+ compatible = "rockchip,px30-uart\0snps,dw-apb-uart";
+ reg = <0x00 0xff178000 0x00 0x100>;
+ interrupts = <0x00 0x14 0x04>;
+ clocks = <0x02 0x1c 0x02 0x14d>;
+ clock-names = "baudclk\0apb_pclk";
+ reg-shift = <0x02>;
+ reg-io-width = <0x04>;
+ dmas = <0x2b 0x0a 0x2b 0x0b>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x58 0x59 0x5a>;
+ status = "disabled";
+ phandle = <0xe0>;
+ };
+
+ i2c@ff180000 {
+ compatible = "rockchip,rk3399-i2c";
+ reg = <0x00 0xff180000 0x00 0x1000>;
+ clocks = <0x02 0x1d 0x02 0x14e>;
+ clock-names = "i2c\0pclk";
+ interrupts = <0x00 0x07 0x04>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x5b>;
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+ status = "okay";
+ clock-frequency = <0x61a80>;
+ i2c-scl-rising-time-ns = <0x118>;
+ i2c-scl-falling-time-ns = <0x10>;
+ phandle = <0xe1>;
+
+ pmic@20 {
+ compatible = "rockchip,rk817";
+ reg = <0x20>;
+ interrupt-parent = <0x5c>;
+ interrupts = <0x0a 0x08>;
+ pinctrl-names = "default\0pmic-sleep\0pmic-power-off\0pmic-reset";
+ pinctrl-0 = <0x5d>;
+ pinctrl-1 = <0x5e 0x5f>;
+ pinctrl-2 = <0x60 0x61>;
+ pinctrl-3 = <0x62 0x63>;
+ rockchip,system-power-controller;
+ wakeup-source;
+ #clock-cells = <0x01>;
+ clock-output-names = "rk808-clkout1\0rk808-clkout2";
+ pmic-reset-func = <0x01>;
+ vcc1-supply = <0x64>;
+ vcc2-supply = <0x64>;
+ vcc3-supply = <0x64>;
+ vcc4-supply = <0x64>;
+ vcc5-supply = <0x64>;
+ vcc6-supply = <0x64>;
+ vcc7-supply = <0x64>;
+ vcc8-supply = <0x64>;
+ vcc9-supply = <0x65>;
+ phandle = <0xe2>;
+
+ pwrkey {
+ status = "okay";
+ };
+
+ pinctrl_rk8xx {
+ gpio-controller;
+ #gpio-cells = <0x02>;
+ phandle = <0xe3>;
+
+ rk817_ts_gpio1 {
+ pins = "gpio_ts";
+ function = "pin_fun1";
+ phandle = <0xe4>;
+ };
+
+ rk817_gt_gpio2 {
+ pins = "gpio_gt";
+ function = "pin_fun1";
+ phandle = <0xe5>;
+ };
+
+ rk817_pin_ts {
+ pins = "gpio_ts";
+ function = "pin_fun0";
+ phandle = <0xe6>;
+ };
+
+ rk817_pin_gt {
+ pins = "gpio_gt";
+ function = "pin_fun0";
+ phandle = <0xe7>;
+ };
+
+ rk817_slppin_null {
+ pins = "gpio_slp";
+ function = "pin_fun0";
+ phandle = <0xe8>;
+ };
+
+ rk817_slppin_slp {
+ pins = "gpio_slp";
+ function = "pin_fun1";
+ phandle = <0x5f>;
+ };
+
+ rk817_slppin_pwrdn {
+ pins = "gpio_slp";
+ function = "pin_fun2";
+ phandle = <0x61>;
+ };
+
+ rk817_slppin_rst {
+ pins = "gpio_slp";
+ function = "pin_fun3";
+ phandle = <0x63>;
+ };
+ };
+
+ regulators {
+
+ DCDC_REG1 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <0xe7ef0>;
+ regulator-max-microvolt = <0x118c30>;
+ regulator-ramp-delay = <0x1771>;
+ regulator-initial-mode = <0x02>;
+ regulator-name = "vdd_logic";
+ phandle = <0x0e>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <0xe7ef0>;
+ };
+ };
+
+ DCDC_REG2 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <0xe7ef0>;
+ regulator-max-microvolt = <0x149970>;
+ regulator-ramp-delay = <0x1771>;
+ regulator-initial-mode = <0x02>;
+ regulator-name = "vdd_arm";
+ phandle = <0x06>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <0xe7ef0>;
+ };
+ };
+
+ DCDC_REG3 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-initial-mode = <0x02>;
+ regulator-name = "vcc_ddr";
+ phandle = <0xe9>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ };
+ };
+
+ DCDC_REG4 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <0x325aa0>;
+ regulator-max-microvolt = <0x325aa0>;
+ regulator-initial-mode = <0x02>;
+ regulator-name = "vcc_3v3";
+ phandle = <0x4b>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <0x325aa0>;
+ };
+ };
+
+ LDO_REG1 {
+ regulator-min-microvolt = <0xf4240>;
+ regulator-max-microvolt = <0xf4240>;
+ regulator-name = "vcc_1v0";
+ phandle = <0xea>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <0xf4240>;
+ };
+ };
+
+ LDO_REG2 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <0x1b7740>;
+ regulator-max-microvolt = <0x1b7740>;
+ regulator-name = "vcc1v8_soc";
+ phandle = <0x88>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <0x1b7740>;
+ };
+ };
+
+ LDO_REG3 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <0xf4240>;
+ regulator-max-microvolt = <0xf4240>;
+ regulator-name = "vcc1v0_soc";
+ phandle = <0xeb>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <0xf4240>;
+ };
+ };
+
+ LDO_REG4 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <0x325aa0>;
+ regulator-max-microvolt = <0x325aa0>;
+ regulator-name = "vcc3v3_pmu";
+ phandle = <0x29>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <0x325aa0>;
+ };
+ };
+
+ LDO_REG5 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <0x1b7740>;
+ regulator-max-microvolt = <0x1b7740>;
+ regulator-name = "vccio_sd";
+ phandle = <0x4a>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <0x1b7740>;
+ };
+ };
+
+ LDO_REG6 {
+ regulator-min-microvolt = <0x1b7740>;
+ regulator-max-microvolt = <0x2dc6c0>;
+ regulator-boot-on;
+ regulator-name = "vcc_sd";
+ phandle = <0x93>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <0x2dc6c0>;
+ };
+ };
+
+ LDO_REG7 {
+ regulator-min-microvolt = <0x325aa0>;
+ regulator-max-microvolt = <0x325aa0>;
+ regulator-name = "vcc_backlight";
+ phandle = <0x9e>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <0x325aa0>;
+ };
+ };
+
+ LDO_REG8 {
+ regulator-min-microvolt = <0x2ab980>;
+ regulator-max-microvolt = <0x2ab980>;
+ regulator-name = "vcc_lcd";
+ phandle = <0x9f>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <0x2ab980>;
+ };
+ };
+
+ BOOST {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <0x4c4b40>;
+ regulator-max-microvolt = <0x5265c0>;
+ regulator-name = "boost";
+ phandle = <0x65>;
+ };
+
+ OTG_SWITCH {
+ regulator-boot-on;
+ regulator-name = "otg_switch";
+ phandle = <0xec>;
+ };
+ };
+
+ battery {
+ compatible = "rk817,battery";
+ ocv_table = <0xc5d 0xc94 0xcd0 0xd02 0xd34 0xd66 0xd98 0xdca 0xdfc 0xe2e 0xe56 0xe7e 0xea6 0xece 0xef6 0xf1e 0xf46 0xf6e 0xf96 0xf9b 0xfa0>;
+ design_capacity = <0xd34>;
+ design_qmax = <0xe86>;
+ bat_res = <0x64>;
+ sleep_enter_current = <0x12c>;
+ sleep_exit_current = <0x12c>;
+ sleep_filter_current = <0x64>;
+ power_off_thresd = <0xbb8>;
+ zero_algorithm_vol = <0xf0a>;
+ max_soc_offset = <0x3c>;
+ monitor_sec = <0x05>;
+ virtual_power = <0x00>;
+ sample_res = <0x0a>;
+ };
+
+ charger {
+ compatible = "rk817,charger";
+ min_input_voltage = <0x1194>;
+ max_input_current = <0x5dc>;
+ max_chrg_current = <0x7d0>;
+ max_chrg_voltage = <0x1068>;
+ chrg_term_mode = <0x00>;
+ chrg_finish_cur = <0x34>;
+ virtual_power = <0x00>;
+ sample_res = <0x0a>;
+ dc_det_gpio = <0x5c 0x0b 0x00>;
+ bat_low_gpio = <0x66 0x0d 0x00>;
+ extcon = <0x67>;
+ };
+
+ codec {
+ #sound-dai-cells = <0x00>;
+ compatible = "rockchip,rk817-codec";
+ clocks = <0x02 0x15>;
+ clock-names = "mclk";
+ pinctrl-names = "default";
+ pinctrl-0 = <0x68>;
+ hp-volume = <0x14>;
+ spk-volume = <0x03>;
+ status = "okay";
+ phandle = <0xc3>;
+ };
+ };
+ };
+
+ i2c@ff190000 {
+ compatible = "rockchip,rk3399-i2c";
+ reg = <0x00 0xff190000 0x00 0x1000>;
+ clocks = <0x02 0x1e 0x02 0x14f>;
+ clock-names = "i2c\0pclk";
+ interrupts = <0x00 0x08 0x04>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x69>;
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+ status = "okay";
+ clock-frequency = <0x61a80>;
+ phandle = <0xed>;
+ };
+
+ i2c@ff1a0000 {
+ compatible = "rockchip,rk3399-i2c";
+ reg = <0x00 0xff1a0000 0x00 0x1000>;
+ clocks = <0x02 0x1f 0x02 0x150>;
+ clock-names = "i2c\0pclk";
+ interrupts = <0x00 0x09 0x04>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x6a>;
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+ status = "disabled";
+ phandle = <0xee>;
+ };
+
+ i2c@ff1b0000 {
+ compatible = "rockchip,rk3399-i2c";
+ reg = <0x00 0xff1b0000 0x00 0x1000>;
+ clocks = <0x02 0x20 0x02 0x151>;
+ clock-names = "i2c\0pclk";
+ interrupts = <0x00 0x0a 0x04>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x6b>;
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+ status = "disabled";
+ phandle = <0xef>;
+ };
+
+ spi@ff1d0000 {
+ compatible = "rockchip,px30-spi\0rockchip,rk3066-spi";
+ reg = <0x00 0xff1d0000 0x00 0x1000>;
+ interrupts = <0x00 0x1a 0x04>;
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+ clocks = <0x02 0x24 0x02 0x155>;
+ clock-names = "spiclk\0apb_pclk";
+ dmas = <0x2b 0x0c 0x2b 0x0d>;
+ dma-names = "tx\0rx";
+ pinctrl-names = "default\0high_speed";
+ pinctrl-0 = <0x6c 0x6d 0x6e 0x6f>;
+ pinctrl-1 = <0x70 0x6d 0x71 0x72>;
+ status = "disabled";
+ phandle = <0xf0>;
+ };
+
+ spi@ff1d8000 {
+ compatible = "rockchip,px30-spi\0rockchip,rk3066-spi";
+ reg = <0x00 0xff1d8000 0x00 0x1000>;
+ interrupts = <0x00 0x1b 0x04>;
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+ clocks = <0x02 0x25 0x02 0x156>;
+ clock-names = "spiclk\0apb_pclk";
+ dmas = <0x2b 0x0e 0x2b 0x0f>;
+ dma-names = "tx\0rx";
+ pinctrl-names = "default\0high_speed";
+ pinctrl-0 = <0x73 0x74 0x75 0x76 0x77>;
+ pinctrl-1 = <0x78 0x74 0x75 0x79 0x7a>;
+ status = "disabled";
+ phandle = <0xf1>;
+ };
+
+ watchdog@ff1e0000 {
+ compatible = "snps,dw-wdt";
+ reg = <0x00 0xff1e0000 0x00 0x100>;
+ clocks = <0x02 0x15b>;
+ interrupts = <0x00 0x25 0x04>;
+ resets = <0x02 0xb5>;
+ reset-names = "reset";
+ status = "disabled";
+ phandle = <0xf2>;
+ };
+
+ pwm@ff200000 {
+ compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm";
+ reg = <0x00 0xff200000 0x00 0x10>;
+ #pwm-cells = <0x03>;
+ pinctrl-names = "active";
+ pinctrl-0 = <0x7b>;
+ clocks = <0x02 0x22 0x02 0x153>;
+ clock-names = "pwm\0pclk";
+ status = "okay";
+ phandle = <0xbc>;
+ };
+
+ pwm@ff200010 {
+ compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm";
+ reg = <0x00 0xff200010 0x00 0x10>;
+ #pwm-cells = <0x03>;
+ pinctrl-names = "active";
+ pinctrl-0 = <0x7c>;
+ clocks = <0x02 0x22 0x02 0x153>;
+ clock-names = "pwm\0pclk";
+ status = "okay";
+ phandle = <0xc1>;
+ };
+
+ pwm@ff200020 {
+ compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm";
+ reg = <0x00 0xff200020 0x00 0x10>;
+ #pwm-cells = <0x03>;
+ pinctrl-names = "active";
+ pinctrl-0 = <0x7d>;
+ clocks = <0x02 0x22 0x02 0x153>;
+ clock-names = "pwm\0pclk";
+ status = "disabled";
+ phandle = <0xf3>;
+ };
+
+ pwm@ff200030 {
+ compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm";
+ reg = <0x00 0xff200030 0x00 0x10>;
+ #pwm-cells = <0x03>;
+ pinctrl-names = "active";
+ pinctrl-0 = <0x7e>;
+ clocks = <0x02 0x22 0x02 0x153>;
+ clock-names = "pwm\0pclk";
+ status = "disabled";
+ phandle = <0xf4>;
+ };
+
+ pwm@ff208000 {
+ compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm";
+ reg = <0x00 0xff208000 0x00 0x10>;
+ #pwm-cells = <0x03>;
+ pinctrl-names = "active";
+ pinctrl-0 = <0x7f>;
+ clocks = <0x02 0x23 0x02 0x154>;
+ clock-names = "pwm\0pclk";
+ status = "disabled";
+ phandle = <0xf5>;
+ };
+
+ pwm@ff208010 {
+ compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm";
+ reg = <0x00 0xff208010 0x00 0x10>;
+ #pwm-cells = <0x03>;
+ pinctrl-names = "active";
+ pinctrl-0 = <0x80>;
+ clocks = <0x02 0x23 0x02 0x154>;
+ clock-names = "pwm\0pclk";
+ status = "disabled";
+ phandle = <0xf6>;
+ };
+
+ pwm@ff208020 {
+ compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm";
+ reg = <0x00 0xff208020 0x00 0x10>;
+ #pwm-cells = <0x03>;
+ pinctrl-names = "active";
+ pinctrl-0 = <0x81>;
+ clocks = <0x02 0x23 0x02 0x154>;
+ clock-names = "pwm\0pclk";
+ status = "disabled";
+ phandle = <0xf7>;
+ };
+
+ pwm@ff208030 {
+ compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm";
+ reg = <0x00 0xff208030 0x00 0x10>;
+ #pwm-cells = <0x03>;
+ pinctrl-names = "active";
+ pinctrl-0 = <0x82>;
+ clocks = <0x02 0x23 0x02 0x154>;
+ clock-names = "pwm\0pclk";
+ status = "disabled";
+ phandle = <0xf8>;
+ };
+
+ rktimer@ff210000 {
+ compatible = "rockchip,rk3288-timer";
+ reg = <0x00 0xff210000 0x00 0x1000>;
+ interrupts = <0x00 0x1e 0x04>;
+ clocks = <0x02 0x159 0x02 0x26>;
+ clock-names = "pclk\0timer";
+ phandle = <0xf9>;
+ };
+
+ amba {
+ compatible = "simple-bus";
+ #address-cells = <0x02>;
+ #size-cells = <0x02>;
+ ranges;
+
+ dmac@ff240000 {
+ compatible = "arm,pl330\0arm,primecell";
+ reg = <0x00 0xff240000 0x00 0x4000>;
+ interrupts = <0x00 0x01 0x04 0x00 0x02 0x04>;
+ clocks = <0x02 0xbb>;
+ clock-names = "apb_pclk";
+ #dma-cells = <0x01>;
+ peripherals-req-type-burst;
+ phandle = <0x2b>;
+ };
+ };
+
+ thermal-zones {
+ phandle = <0xfa>;
+
+ soc-thermal {
+ polling-delay-passive = <0x14>;
+ polling-delay = <0x3e8>;
+ sustainable-power = <0x2ee>;
+ thermal-sensors = <0x83 0x00>;
+ phandle = <0xfb>;
+
+ trips {
+
+ trip-point-0 {
+ temperature = <0x11170>;
+ hysteresis = <0x7d0>;
+ type = "passive";
+ phandle = <0xfc>;
+ };
+
+ trip-point-1 {
+ temperature = <0x14c08>;
+ hysteresis = <0x7d0>;
+ type = "passive";
+ phandle = <0x84>;
+ };
+
+ soc-crit {
+ temperature = <0x1c138>;
+ hysteresis = <0x7d0>;
+ type = "critical";
+ phandle = <0xfd>;
+ };
+ };
+
+ cooling-maps {
+
+ map0 {
+ trip = <0x84>;
+ cooling-device = <0x09 0xffffffff 0xffffffff>;
+ contribution = <0x1000>;
+ };
+
+ map1 {
+ trip = <0x84>;
+ cooling-device = <0x85 0xffffffff 0xffffffff>;
+ contribution = <0x1000>;
+ };
+ };
+ };
+
+ gpu-thermal {
+ polling-delay-passive = <0x64>;
+ polling-delay = <0x3e8>;
+ thermal-sensors = <0x83 0x01>;
+ phandle = <0xfe>;
+ };
+ };
+
+ tsadc@ff280000 {
+ compatible = "rockchip,px30-tsadc";
+ reg = <0x00 0xff280000 0x00 0x100>;
+ interrupts = <0x00 0x24 0x04>;
+ rockchip,grf = <0x2f>;
+ clocks = <0x02 0x2c 0x02 0x158>;
+ clock-names = "tsadc\0apb_pclk";
+ assigned-clocks = <0x02 0x2c>;
+ assigned-clock-rates = <0xc350>;
+ resets = <0x02 0xa8>;
+ reset-names = "tsadc-apb";
+ #thermal-sensor-cells = <0x01>;
+ rockchip,hw-tshut-temp = <0x1d4c0>;
+ status = "okay";
+ pinctrl-names = "gpio\0otpout";
+ pinctrl-0 = <0x86>;
+ pinctrl-1 = <0x87>;
+ phandle = <0x83>;
+ };
+
+ saradc@ff288000 {
+ compatible = "rockchip,px30-saradc\0rockchip,rk3399-saradc";
+ reg = <0x00 0xff288000 0x00 0x100>;
+ interrupts = <0x00 0x54 0x04>;
+ #io-channel-cells = <0x01>;
+ clocks = <0x02 0x2d 0x02 0x157>;
+ clock-names = "saradc\0apb_pclk";
+ resets = <0x02 0xa5>;
+ reset-names = "saradc-apb";
+ status = "okay";
+ vref-supply = <0x88>;
+ phandle = <0xbe>;
+ };
+
+ otp@ff290000 {
+ compatible = "rockchip,px30-otp";
+ reg = <0x00 0xff290000 0x00 0x4000>;
+ #address-cells = <0x01>;
+ #size-cells = <0x01>;
+ clocks = <0x02 0x2f 0x02 0x15a 0x02 0x161>;
+ clock-names = "clk_otp\0pclk_otp\0pclk_otp_phy";
+ resets = <0x02 0xb4>;
+ reset-names = "otp_phy";
+ phandle = <0xff>;
+
+ id@7 {
+ reg = <0x07 0x10>;
+ phandle = <0x0f>;
+ };
+
+ cpu-leakage@17 {
+ reg = <0x17 0x01>;
+ phandle = <0x07>;
+ };
+
+ performance@1e {
+ reg = <0x1e 0x01>;
+ bits = <0x04 0x03>;
+ phandle = <0x08>;
+ };
+ };
+
+ clock-controller@ff2b0000 {
+ compatible = "rockchip,px30-cru";
+ reg = <0x00 0xff2b0000 0x00 0x1000>;
+ rockchip,grf = <0x2f>;
+ rockchip,boost = <0x89>;
+ #clock-cells = <0x01>;
+ #reset-cells = <0x01>;
+ assigned-clocks = <0x02 0x04>;
+ assigned-clock-rates = <0x3dfd2400>;
+ phandle = <0x02>;
+ };
+
+ cpu-boost@ff2b8000 {
+ compatible = "syscon";
+ reg = <0x00 0xff2b8000 0x00 0x1000>;
+ rockchip,boost-low-con0 = <0x1032>;
+ rockchip,boost-low-con1 = <0x1441>;
+ rockchip,boost-high-con0 = <0x1036>;
+ rockchip,boost-high-con1 = <0x1441>;
+ rockchip,boost-backup-pll = <0x01>;
+ rockchip,boost-backup-pll-usage = <0x00>;
+ rockchip,boost-switch-threshold = <0x249f00>;
+ rockchip,boost-statis-threshold = <0x100>;
+ rockchip,boost-statis-enable = <0x00>;
+ rockchip,boost-enable = <0x00>;
+ phandle = <0x89>;
+ };
+
+ pmu-clock-controller@ff2bc000 {
+ compatible = "rockchip,px30-pmucru";
+ reg = <0x00 0xff2bc000 0x00 0x1000>;
+ rockchip,grf = <0x2f>;
+ #clock-cells = <0x01>;
+ #reset-cells = <0x01>;
+ assigned-clocks = <0x2a 0x01 0x2a 0x08 0x2a 0x05 0x02 0x07 0x02 0xab 0x02 0xb0 0x02 0xf0 0x02 0xf5 0x02 0x140 0x02 0x49>;
+ assigned-clock-rates = <0x47868c00 0x5f5e100 0x18cba80 0x23c34600 0xbebc200 0xbebc200 0x8f0d180 0x8f0d180 0x5f5e100 0xbebc200>;
+ phandle = <0x2a>;
+ };
+
+ syscon@ff2c0000 {
+ compatible = "rockchip,px30-usb2phy-grf\0syscon\0simple-mfd";
+ reg = <0x00 0xff2c0000 0x00 0x10000>;
+ #address-cells = <0x01>;
+ #size-cells = <0x01>;
+ phandle = <0x100>;
+
+ usb2-phy@100 {
+ compatible = "rockchip,px30-usb2phy\0rockchip,rk3328-usb2phy";
+ reg = <0x100 0x10>;
+ clocks = <0x2a 0x0a>;
+ clock-names = "phyclk";
+ #clock-cells = <0x00>;
+ assigned-clocks = <0x02 0x0e 0x02 0x55>;
+ assigned-clock-parents = <0x67 0x02 0x0e>;
+ clock-output-names = "usb480m_phy";
+ status = "okay";
+ phandle = <0x67>;
+
+ host-port {
+ #phy-cells = <0x00>;
+ interrupts = <0x00 0x44 0x04>;
+ interrupt-names = "linestate";
+ status = "okay";
+ phandle = <0x8c>;
+ };
+
+ otg-port {
+ #phy-cells = <0x00>;
+ interrupts = <0x00 0x42 0x04 0x00 0x41 0x04 0x00 0x40 0x04>;
+ interrupt-names = "otg-bvalid\0otg-id\0linestate";
+ status = "disabled";
+ phandle = <0x8b>;
+ };
+ };
+ };
+
+ video-phy@ff2e0000 {
+ compatible = "rockchip,px30-video-phy";
+ reg = <0x00 0xff2e0000 0x00 0x10000 0x00 0xff450000 0x00 0x10000>;
+ clocks = <0x2a 0x0b 0x02 0x145 0x02 0x144>;
+ clock-names = "ref\0pclk_phy\0pclk_host";
+ #clock-cells = <0x00>;
+ resets = <0x02 0x3e>;
+ reset-names = "rst";
+ power-domains = <0x8a 0x0c>;
+ #phy-cells = <0x00>;
+ status = "okay";
+ phandle = <0x4c>;
+ };
+
+ mipi-dphy-rx0@ff2f0000 {
+ compatible = "rockchip,rk3326-mipi-dphy";
+ reg = <0x00 0xff2f0000 0x00 0x4000>;
+ clocks = <0x02 0x146>;
+ clock-names = "dphy-ref";
+ power-domains = <0x8a 0x0d>;
+ rockchip,grf = <0x2f>;
+ status = "okay";
+ phandle = <0x101>;
+ };
+
+ usb@ff300000 {
+ compatible = "rockchip,px30-usb\0rockchip,rk3066-usb\0snps,dwc2";
+ reg = <0x00 0xff300000 0x00 0x40000>;
+ interrupts = <0x00 0x3e 0x04>;
+ clocks = <0x02 0x102>;
+ clock-names = "otg";
+ power-domains = <0x8a 0x05>;
+ dr_mode = "otg";
+ g-np-tx-fifo-size = <0x10>;
+ g-rx-fifo-size = <0x118>;
+ g-tx-fifo-size = <0x100 0x80 0x80 0x40 0x20 0x10>;
+ g-use-dma;
+ phys = <0x8b>;
+ phy-names = "usb2-phy";
+ status = "okay";
+ phandle = <0x102>;
+ };
+
+ usb@ff340000 {
+ compatible = "generic-ehci";
+ reg = <0x00 0xff340000 0x00 0x10000>;
+ interrupts = <0x00 0x3c 0x04>;
+ clocks = <0x02 0x103 0x67>;
+ clock-names = "usbhost\0utmi";
+ power-domains = <0x8a 0x05>;
+ phys = <0x8c>;
+ phy-names = "usb";
+ status = "disabled";
+ phandle = <0x103>;
+ };
+
+ usb@ff350000 {
+ compatible = "generic-ohci";
+ reg = <0x00 0xff350000 0x00 0x10000>;
+ interrupts = <0x00 0x3d 0x04>;
+ clocks = <0x02 0x103 0x67>;
+ clock-names = "usbhost\0utmi";
+ power-domains = <0x8a 0x05>;
+ phys = <0x8c>;
+ phy-names = "usb";
+ status = "disabled";
+ phandle = <0x104>;
+ };
+
+ ethernet@ff360000 {
+ compatible = "rockchip,px30-gmac";
+ reg = <0x00 0xff360000 0x00 0x10000>;
+ rockchip,grf = <0x2f>;
+ interrupts = <0x00 0x2b 0x04>;
+ interrupt-names = "macirq";
+ clocks = <0x02 0x3e 0x02 0x3f 0x02 0x3f 0x02 0x40 0x02 0x41 0x02 0xb2 0x02 0x143 0x02 0x4c>;
+ clock-names = "stmmaceth\0mac_clk_rx\0mac_clk_tx\0clk_mac_ref\0clk_mac_refout\0aclk_mac\0pclk_mac\0clk_mac_speed";
+ phy-mode = "rmii";
+ pinctrl-names = "default";
+ pinctrl-0 = <0x8d 0x8e>;
+ resets = <0x02 0x5e>;
+ reset-names = "stmmaceth";
+ power-domains = <0x8a 0x09>;
+ status = "disabled";
+ phandle = <0x105>;
+ };
+
+ dwmmc@ff370000 {
+ compatible = "rockchip,px30-dw-mshc\0rockchip,rk3288-dw-mshc";
+ reg = <0x00 0xff370000 0x00 0x4000>;
+ max-frequency = <0x8f0d180>;
+ clocks = <0x02 0xf7 0x02 0x3b 0x02 0x43 0x02 0x44>;
+ clock-names = "biu\0ciu\0ciu-drv\0ciu-sample";
+ assigned-clocks = <0x02 0x3b>;
+ assigned-clock-parents = <0x02 0x57>;
+ power-domains = <0x8a 0x07>;
+ fifo-depth = <0x100>;
+ interrupts = <0x00 0x36 0x04>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x8f 0x90 0x91 0x92>;
+ status = "okay";
+ bus-width = <0x04>;
+ cap-mmc-highspeed;
+ cap-sd-highspeed;
+ supports-sd;
+ card-detect-delay = <0x320>;
+ ignore-pm-notify;
+ cd-gpios = <0x5c 0x03 0x01>;
+ sd-uhs-sdr12;
+ sd-uhs-sdr25;
+ sd-uhs-sdr50;
+ sd-uhs-sdr104;
+ vqmmc-supply = <0x4a>;
+ vmmc-supply = <0x93>;
+ phandle = <0x106>;
+ };
+
+ dwmmc@ff380000 {
+ compatible = "rockchip,px30-dw-mshc\0rockchip,rk3288-dw-mshc";
+ reg = <0x00 0xff380000 0x00 0x4000>;
+ max-frequency = <0x8f0d180>;
+ clocks = <0x02 0xff 0x02 0x38 0x02 0x45 0x02 0x46>;
+ clock-names = "biu\0ciu\0ciu-drv\0ciu-sample";
+ assigned-clocks = <0x02 0x38>;
+ assigned-clock-parents = <0x02 0x51>;
+ power-domains = <0x8a 0x0a>;
+ fifo-depth = <0x100>;
+ interrupts = <0x00 0x37 0x04>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x94 0x95 0x96>;
+ status = "okay";
+ bus-width = <0x04>;
+ cap-mmc-highspeed;
+ cap-sd-highspeed;
+ supports-sd;
+ card-detect-delay = <0x320>;
+ ignore-pm-notify;
+ cd-gpios = <0x97 0x0e 0x01>;
+ sd-uhs-sdr12;
+ sd-uhs-sdr25;
+ sd-uhs-sdr50;
+ sd-uhs-sdr104;
+ vqmmc-supply = <0x4a>;
+ vmmc-supply = <0x93>;
+ phandle = <0x107>;
+ };
+
+ dwmmc@ff390000 {
+ compatible = "rockchip,px30-dw-mshc\0rockchip,rk3288-dw-mshc";
+ reg = <0x00 0xff390000 0x00 0x4000>;
+ max-frequency = <0x8f0d180>;
+ clocks = <0x02 0x100 0x02 0x39 0x02 0x47 0x02 0x48>;
+ clock-names = "biu\0ciu\0ciu-drv\0ciu-sample";
+ assigned-clocks = <0x02 0x39>;
+ assigned-clock-parents = <0x02 0x53>;
+ power-domains = <0x8a 0x0a>;
+ fifo-depth = <0x100>;
+ interrupts = <0x00 0x35 0x04>;
+ status = "disabled";
+ phandle = <0x108>;
+ };
+
+ nandc@ff3b0000 {
+ compatible = "rockchip,rk-nandc";
+ reg = <0x00 0xff3b0000 0x00 0x4000>;
+ interrupts = <0x00 0x39 0x04>;
+ nandc_id = <0x00>;
+ clocks = <0x02 0x37 0x02 0xfe>;
+ clock-names = "clk_nandc\0hclk_nandc";
+ assigned-clocks = <0x02 0x37>;
+ assigned-clock-parents = <0x02 0x4f>;
+ power-domains = <0x8a 0x0a>;
+ status = "disabled";
+ phandle = <0x109>;
+ };
+
+ sfc@ff3a0000 {
+ compatible = "rockchip,sfc";
+ reg = <0x00 0xff3a0000 0x00 0x4000>;
+ interrupts = <0x00 0x38 0x04>;
+ clocks = <0x02 0x3a 0x02 0x101>;
+ clock-names = "clk_sfc\0hclk_sfc";
+ assigned-clocks = <0x02 0x3a>;
+ assigned-clock-rates = <0x989680>;
+ status = "disabled";
+ phandle = <0x10a>;
+ };
+
+ gpu@ff400000 {
+ compatible = "arm,malit602\0arm,malit60x\0arm,malit6xx\0arm,mali-midgard";
+ reg = <0x00 0xff400000 0x00 0x4000>;
+ interrupts = <0x00 0x2d 0x04 0x00 0x2e 0x04 0x00 0x2f 0x04>;
+ interrupt-names = "GPU\0MMU\0JOB";
+ clocks = <0x02 0x49>;
+ clock-names = "clk_mali";
+ power-domains = <0x8a 0x0e>;
+ #cooling-cells = <0x02>;
+ operating-points-v2 = <0x98>;
+ status = "okay";
+ mali-supply = <0x0e>;
+ phandle = <0x85>;
+
+ power_model {
+ compatible = "arm,mali-simple-power-model";
+ static-coefficient = <0x64578>;
+ dynamic-coefficient = <0x2dd>;
+ ts = <0x7d00 0x125c 0xffffffb0 0x02>;
+ thermal-zone = "gpu-thermal";
+ };
+ };
+
+ gpu-opp-table {
+ compatible = "operating-points-v2";
+ rockchip,thermal-zone = "soc-thermal";
+ rockchip,temp-hysteresis = <0x1388>;
+ rockchip,low-temp = <0x00>;
+ rockchip,low-temp-min-volt = <0xf4240>;
+ rockchip,low-temp-adjust-volt = <0x00 0x1e0 0xc350>;
+ rockchip,max-volt = <0x11edd8>;
+ rockchip,evb-irdrop = <0x61a8>;
+ rockchip,pvtm-voltage-sel = <0x00 0xc350 0x00 0xc351 0xd2f0 0x01 0xd2f1 0xea60 0x02 0xea61 0x1869f 0x03>;
+ rockchip,pvtm-ch = <0x00 0x00>;
+ phandle = <0x98>;
+
+ opp-400000000 {
+ opp-hz = <0x00 0x17d78400>;
+ opp-microvolt = <0x100590>;
+ opp-microvolt-L0 = <0x100590>;
+ opp-microvolt-L1 = <0xfa3e8>;
+ opp-microvolt-L2 = <0xee098>;
+ opp-microvolt-L3 = <0xe7ef0>;
+ };
+
+ opp-480000000 {
+ opp-hz = <0x00 0x1c9c3800>;
+ opp-microvolt = <0x112a88>;
+ opp-microvolt-L0 = <0x112a88>;
+ opp-microvolt-L1 = <0x10c8e0>;
+ opp-microvolt-L2 = <0x100590>;
+ opp-microvolt-L3 = <0xf4240>;
+ };
+
+ opp-520000000 {
+ opp-hz = <0x00 0x1efe9200>;
+ opp-microvolt = <0x118c30>;
+ opp-microvolt-L0 = <0x118c30>;
+ opp-microvolt-L1 = <0x118c30>;
+ opp-microvolt-L2 = <0x10c8e0>;
+ opp-microvolt-L3 = <0x100590>;
+ };
+ };
+
+ hevc_service@ff440000 {
+ compatible = "rockchip,hevc_sub";
+ iommu_enabled = <0x01>;
+ reg = <0x00 0xff440000 0x00 0x400>;
+ interrupts = <0x00 0x31 0x04>;
+ interrupt-names = "irq_dec";
+ dev_mode = <0x01>;
+ iommus = <0x99>;
+ allocator = <0x01>;
+ phandle = <0x9c>;
+ };
+
+ vpu_service@ff442000 {
+ compatible = "rockchip,vpu_sub";
+ iommu_enabled = <0x01>;
+ reg = <0x00 0xff442000 0x00 0x800>;
+ interrupts = <0x00 0x50 0x04 0x00 0x4f 0x04>;
+ interrupt-names = "irq_enc\0irq_dec";
+ dev_mode = <0x00>;
+ iommus = <0x9a>;
+ allocator = <0x01>;
+ phandle = <0x9b>;
+ };
+
+ vpu_combo {
+ compatible = "rockchip,vpu_combo";
+ subcnt = <0x02>;
+ rockchip,grf = <0x2f>;
+ rockchip,sub = <0x9b 0x9c>;
+ clocks = <0x02 0xaf 0x02 0xf4 0x02 0x4b>;
+ clock-names = "aclk_vcodec\0hclk_vcodec\0clk_core";
+ resets = <0x02 0x24 0x02 0x26 0x02 0x25 0x02 0x27 0x02 0x3f>;
+ reset-names = "video_a\0video_h\0niu_a\0niu_h\0video_core";
+ power-domains = <0x8a 0x0b>;
+ mode_bit = <0x0f>;
+ mode_ctrl = <0x410>;
+ status = "okay";
+ phandle = <0x10b>;
+ };
+
+ iommu@ff440440 {
+ compatible = "rockchip,iommu";
+ reg = <0x00 0xff440440 0x00 0x40 0x00 0xff440480 0x00 0x40>;
+ interrupts = <0x00 0x32 0x04>;
+ interrupt-names = "hevc_mmu";
+ clocks = <0x02 0xaf 0x02 0xf4>;
+ clock-names = "aclk\0hclk";
+ power-domains = <0x8a 0x0b>;
+ #iommu-cells = <0x00>;
+ phandle = <0x99>;
+ };
+
+ iommu@ff442800 {
+ compatible = "rockchip,iommu";
+ reg = <0x00 0xff442800 0x00 0x100>;
+ interrupts = <0x00 0x51 0x04>;
+ interrupt-names = "vpu_mmu";
+ clocks = <0x02 0xaf 0x02 0xf4>;
+ clock-names = "aclk\0hclk";
+ power-domains = <0x8a 0x0b>;
+ #iommu-cells = <0x00>;
+ phandle = <0x9a>;
+ };
+
+ dsi@ff450000 {
+ compatible = "rockchip,px30-mipi-dsi";
+ reg = <0x00 0xff450000 0x00 0x10000>;
+ interrupts = <0x00 0x4b 0x04>;
+ clocks = <0x02 0x144 0x4c>;
+ clock-names = "pclk\0hs_clk";
+ resets = <0x02 0x3d>;
+ reset-names = "apb";
+ phys = <0x4c>;
+ phy-names = "mipi_dphy";
+ power-domains = <0x8a 0x0c>;
+ rockchip,grf = <0x2f>;
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+ status = "okay";
+ phandle = <0x10c>;
+
+ ports {
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+
+ port@0 {
+ reg = <0x00>;
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+
+ endpoint@0 {
+ reg = <0x00>;
+ remote-endpoint = <0x13>;
+ status = "okay";
+ phandle = <0xa3>;
+ };
+ };
+ };
+
+ panel@0 {
+ compatible = "elida,kd35t133\0simple-panel-dsi";
+ reg = <0x00>;
+ backlight = <0x9d>;
+ backlight-supply = <0x9e>;
+ power-supply = <0x9f>;
+ reset-gpios = <0x97 0x10 0x01>;
+ reset-delay-ms = <0x96>;
+ init-delay-ms = <0x14>;
+ enable-delay-ms = <0x78>;
+ prepare-delay-ms = <0x14>;
+ unprepare-delay-ms = <0x14>;
+ disable-delay-ms = <0x32>;
+ width-mm = <0x34>;
+ height-mm = <0x46>;
+ dsi,flags = <0xa03>;
+ dsi,format = <0x00>;
+ dsi,lanes = <0x04>;
+ panel-init-sequence = [15 00 02 ff 30 15 00 02 ff 52 15 00 02 ff 01 15 00 02 e3 00 15 00 02 40 0a 15 00 02 03 40 15 00 02 04 00 15 00 02 05 03 15 00 02 24 12 15 00 02 25 1e 15 00 02 26 6f 15 00 02 27 52 15 00 02 28 67 15 00 02 29 01 15 00 02 2a df 15 00 02 37 9c 15 00 02 38 a7 15 00 02 39 53 15 00 02 44 00 15 00 02 49 3c 15 00 02 59 fe 15 00 02 5c 00 15 00 02 80 20 15 00 02 91 77 15 00 02 92 77 15 00 02 a0 55 15 00 02 a1 50 15 00 02 a4 9c 15 00 02 a7 02 15 00 02 a8 01 15 00 02 a9 21 15 00 02 aa fc 15 00 02 ab 28 15 00 02 ac 06 15 00 02 ad 06 15 00 02 ae 06 15 00 02 af 03 15 00 02 b0 08 15 00 02 b1 26 15 00 02 b2 28 15 00 02 b3 28 15 00 02 b4 33 15 00 02 b5 08 15 00 02 b6 26 15 00 02 b7 08 15 00 02 b8 26 15 00 02 ff 30 15 00 02 ff 52 15 00 02 ff 02 15 00 02 b0 0b 15 00 02 b1 16 15 00 02 b2 17 15 00 02 b3 2c 15 00 02 b4 32 15 00 02 b5 3b 15 00 02 b6 29 15 00 02 b7 40 15 00 02 b8 0d 15 00 02 b9 05 15 00 02 ba 12 15 00 02 bb 10 15 00 02 bc 12 15 00 02 bd 15 15 00 02 be 19 15 00 02 bf 0e 15 00 02 c0 16 15 00 02 c1 0a 15 00 02 d0 0c 15 00 02 d1 17 15 00 02 d2 14 15 00 02 d3 2e 15 00 02 d4 32 15 00 02 d5 3c 15 00 02 d6 22 15 00 02 d7 3d 15 00 02 d8 0d 15 00 02 d9 07 15 00 02 da 13 15 00 02 db 13 15 00 02 dc 11 15 00 02 dd 15 15 00 02 de 19 15 00 02 df 10 15 00 02 e0 17 15 00 02 e1 0a 15 00 02 ff 30 15 00 02 ff 52 15 00 02 ff 03 15 00 02 00 2a 15 00 02 01 2a 15 00 02 02 2a 15 00 02 03 2a 15 00 02 04 61 15 00 02 05 80 15 00 02 06 c7 15 00 02 07 01 15 00 02 08 82 15 00 02 09 83 15 00 02 30 2a 15 00 02 31 2a 15 00 02 32 2a 15 00 02 33 2a 15 00 02 34 a1 15 00 02 35 c5 15 00 02 36 80 15 00 02 37 23 15 00 02 40 82 15 00 02 41 83 15 00 02 42 80 15 00 02 43 81 15 00 02 44 55 15 00 02 45 e6 15 00 02 46 e5 15 00 02 47 55 15 00 02 48 e8 15 00 02 49 e7 15 00 02 50 02 15 00 02 51 01 15 00 02 52 04 15 00 02 53 03 15 00 02 54 55 15 00 02 55 ea 15 00 02 56 e9 15 00 02 57 55 15 00 02 58 ec 15 00 02 59 eb 15 00 02 7e 02 15 00 02 7f 80 15 00 02 e0 5a 15 00 02 b1 00 15 00 02 b4 0e 15 00 02 b5 0f 15 00 02 b6 04 15 00 02 b7 07 15 00 02 b8 06 15 00 02 b9 05 15 00 02 ba 0f 15 00 02 c7 00 15 00 02 ca 0e 15 00 02 cb 0f 15 00 02 cc 04 15 00 02 cd 07 15 00 02 ce 06 15 00 02 cf 05 15 00 02 d0 0f 15 00 02 81 0f 15 00 02 84 0e 15 00 02 85 0f 15 00 02 86 07 15 00 02 87 04 15 00 02 88 05 15 00 02 89 06 15 00 02 8a 00 15 00 02 97 0f 15 00 02 9a 0e 15 00 02 9b 0f 15 00 02 9c 07 15 00 02 9d 04 15 00 02 9e 05 15 00 02 9f 06 15 00 02 a0 00 15 00 02 ff 30 15 00 02 ff 52 15 00 02 ff 02 15 00 02 01 01 15 00 02 02 da 15 00 02 03 ba 15 00 02 04 a8 15 00 02 05 9a 15 00 02 06 70 15 00 02 07 ff 15 00 02 08 91 15 00 02 09 90 15 00 02 0a ff 15 00 02 0b 8f 15 00 02 0c 60 15 00 02 0d 58 15 00 02 0e 48 15 00 02 0f 38 15 00 02 10 2b 15 00 02 ff 30 15 00 02 ff 52 15 00 02 ff 00 15 00 02 36 02 15 00 02 3a 70 05 c8 01 11 05 14 01 29];
+ panel-exit-sequence = <0x5140128 0x50a0110>;
+
+ display-timings {
+ native-mode = <0xa0>;
+
+ 60Hz {
+ clock-frequency = <0x1ba8140>;
+ hactive = <0x280>;
+ vactive = <0x1e0>;
+ hfront-porch = <0x2e>;
+ hsync-len = <0x02>;
+ hback-porch = <0x2c>;
+ vfront-porch = <0x10>;
+ vsync-len = <0x02>;
+ vback-porch = <0x0e>;
+ hsync-active = <0x00>;
+ vsync-active = <0x00>;
+ de-active = <0x00>;
+ pixelclk-active = <0x01>;
+ phandle = <0xa0>;
+ };
+
+ 50Hz {
+ clock-frequency = <0x1ba8140>;
+ hactive = <0x280>;
+ vactive = <0x1e0>;
+ hfront-porch = <0x2e>;
+ hsync-len = <0x02>;
+ hback-porch = <0x2c>;
+ vfront-porch = <0x10>;
+ vsync-len = <0x02>;
+ vback-porch = <0x0e>;
+ hsync-active = <0x00>;
+ vsync-active = <0x00>;
+ de-active = <0x00>;
+ pixelclk-active = <0x01>;
+ phandle = <0xa00>;
+ };
+
+ 75Hz {
+ clock-frequency = <0x1ba8140>;
+ hactive = <0x280>;
+ vactive = <0x1e0>;
+ hfront-porch = <0x2e>;
+ hsync-len = <0x02>;
+ hback-porch = <0x2c>;
+ vfront-porch = <0x10>;
+ vsync-len = <0x02>;
+ vback-porch = <0x0e>;
+ hsync-active = <0x00>;
+ vsync-active = <0x00>;
+ de-active = <0x00>;
+ pixelclk-active = <0x01>;
+ phandle = <0xa01>;
+ };
+ };
+ };
+ };
+
+ vop@ff460000 {
+ compatible = "rockchip,px30-vop-big";
+ reg = <0x00 0xff460000 0x00 0x1fc 0x00 0xff460a00 0x00 0x400>;
+ rockchip,grf = <0x2f>;
+ reg-names = "regs\0gamma_lut";
+ interrupts = <0x00 0x4d 0x04>;
+ clocks = <0x02 0xb5 0x02 0x96 0x02 0xfb>;
+ clock-names = "aclk_vop\0dclk_vop\0hclk_vop";
+ power-domains = <0x8a 0x0c>;
+ iommus = <0xa1>;
+ status = "okay";
+ phandle = <0x10f>;
+
+ port {
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+ phandle = <0x10>;
+
+ endpoint@0 {
+ reg = <0x00>;
+ remote-endpoint = <0xa2>;
+ phandle = <0x12>;
+ };
+
+ endpoint@1 {
+ reg = <0x01>;
+ remote-endpoint = <0xa3>;
+ phandle = <0x13>;
+ };
+
+ endpoint@2 {
+ reg = <0x02>;
+ remote-endpoint = <0xa4>;
+ phandle = <0x14>;
+ };
+ };
+ };
+
+ iommu@ff460f00 {
+ compatible = "rockchip,iommu";
+ reg = <0x00 0xff460f00 0x00 0x100>;
+ interrupts = <0x00 0x4d 0x04>;
+ interrupt-names = "vopb_mmu";
+ clocks = <0x02 0xb5 0x02 0xfb>;
+ clock-names = "aclk\0hclk";
+ power-domains = <0x8a 0x0c>;
+ #iommu-cells = <0x00>;
+ status = "okay";
+ phandle = <0xa1>;
+ };
+
+ rk_rga@ff480000 {
+ compatible = "rockchip,rga2";
+ reg = <0x00 0xff480000 0x00 0x1000>;
+ interrupts = <0x00 0x4c 0x04>;
+ clocks = <0x02 0xb7 0x02 0xfd 0x02 0x35>;
+ clock-names = "aclk_rga\0hclk_rga\0clk_rga";
+ power-domains = <0x8a 0x0c>;
+ dma-coherent;
+ status = "okay";
+ phandle = <0x110>;
+ };
+
+ cif@ff490000 {
+ compatible = "rockchip,cif";
+ reg = <0x00 0xff490000 0x00 0x200>;
+ interrupts = <0x00 0x45 0x04>;
+ clocks = <0x02 0xb3 0x02 0xf9 0x02 0x160 0x02 0x34>;
+ clock-names = "aclk_cif0\0hclk_cif0\0pclk_cif\0cif0_out";
+ resets = <0x02 0x2c 0x02 0x2d 0x02 0x2e>;
+ reset-names = "rst_cif_a\0rst_cif_h\0rst_cif_pclkin";
+ power-domains = <0x8a 0x0d>;
+ pinctrl-names = "cif_pin_all";
+ pinctrl-0 = <0xa5>;
+ iommus = <0xa6>;
+ status = "disabled";
+ phandle = <0x111>;
+ };
+
+ cif-new@ff490000 {
+ compatible = "rockchip,px30-cif";
+ reg = <0x00 0xff490000 0x00 0x200>;
+ interrupts = <0x00 0x45 0x04>;
+ clocks = <0x02 0xb3 0x02 0xf9 0x02 0x160 0x02 0x34>;
+ clock-names = "aclk_cif\0hclk_cif\0pclk_cif\0cif_out";
+ resets = <0x02 0x2c 0x02 0x2d 0x02 0x2e>;
+ reset-names = "rst_cif_a\0rst_cif_h\0rst_cif_pclkin";
+ power-domains = <0x8a 0x0d>;
+ iommus = <0xa6>;
+ status = "disabled";
+ phandle = <0x112>;
+ };
+
+ iommu@ff490800 {
+ compatible = "rockchip,iommu";
+ reg = <0x00 0xff490800 0x00 0x100>;
+ interrupts = <0x00 0x45 0x04>;
+ interrupt-names = "vip_mmu";
+ clocks = <0x02 0xb3 0x02 0xf9>;
+ clock-names = "aclk\0hclk";
+ power-domains = <0x8a 0x0d>;
+ rk_iommu,disable_reset_quirk;
+ #iommu-cells = <0x00>;
+ status = "okay";
+ phandle = <0xa6>;
+ };
+
+ rk_isp@ff4a0000 {
+ compatible = "rockchip,px30-isp\0rockchip,isp";
+ reg = <0x00 0xff4a0000 0x00 0x8000>;
+ interrupts = <0x00 0x46 0x04>;
+ clocks = <0x02 0xb4 0x02 0xfa 0x02 0x33 0x02 0x33 0x02 0x15f 0x02 0x34 0x02 0x34 0x02 0x146>;
+ clock-names = "aclk_isp\0hclk_isp\0clk_isp\0clk_isp_jpe\0pclkin_isp\0clk_cif_pll\0clk_cif_out\0pclk_dphyrx";
+ resets = <0x02 0x2b 0x02 0x2f>;
+ reset-names = "rst_isp\0rst_mipicsiphy";
+ power-domains = <0x8a 0x0d>;
+ pinctrl-names = "default\0isp_dvp8bit2\0isp_dvp10bit\0isp_dvp12bit";
+ pinctrl-0 = <0xa7>;
+ pinctrl-1 = <0xa5>;
+ pinctrl-2 = <0xa5 0xa8>;
+ pinctrl-3 = <0xa9 0xa5 0xa8>;
+ rockchip,isp,mipiphy = <0x01>;
+ rockchip,isp,csiphy,reg = <0xff2f0000 0x4000>;
+ rockchip,grf = <0x2f>;
+ rockchip,cru = <0x02>;
+ rockchip,isp,iommu-enable = <0x01>;
+ iommus = <0xaa>;
+ status = "disabled";
+ phandle = <0x113>;
+ };
+
+ rkisp1@ff4a0000 {
+ compatible = "rockchip,rk3326-rkisp1";
+ reg = <0x00 0xff4a0000 0x00 0x8000>;
+ interrupts = <0x00 0x46 0x04 0x00 0x49 0x04 0x00 0x4a 0x04>;
+ interrupt-names = "isp_irq\0mi_irq\0mipi_irq";
+ clocks = <0x02 0xb4 0x02 0xfa 0x02 0x33 0x02 0x15f>;
+ clock-names = "aclk_isp\0hclk_isp\0clk_isp\0pclk_isp";
+ devfreq = <0xab>;
+ power-domains = <0x8a 0x0d>;
+ iommus = <0xaa>;
+ rockchip,grf = <0x2f>;
+ status = "okay";
+ phandle = <0x114>;
+ };
+
+ iommu@ff4a8000 {
+ compatible = "rockchip,iommu";
+ reg = <0x00 0xff4a8000 0x00 0x100>;
+ interrupts = <0x00 0x46 0x04>;
+ interrupt-names = "isp_mmu";
+ clocks = <0x02 0xb4 0x02 0xfa>;
+ clock-names = "aclk\0hclk";
+ power-domains = <0x8a 0x0d>;
+ rk_iommu,disable_reset_quirk;
+ #iommu-cells = <0x00>;
+ status = "okay";
+ phandle = <0xaa>;
+ };
+
+ qos@ff518000 {
+ compatible = "syscon";
+ reg = <0x00 0xff518000 0x00 0x20>;
+ phandle = <0x18>;
+ };
+
+ qos@ff520000 {
+ compatible = "syscon";
+ reg = <0x00 0xff520000 0x00 0x20>;
+ phandle = <0x28>;
+ };
+
+ qos@ff52c000 {
+ compatible = "syscon";
+ reg = <0x00 0xff52c000 0x00 0x20>;
+ phandle = <0x17>;
+ };
+
+ qos@ff538000 {
+ compatible = "syscon";
+ reg = <0x00 0xff538000 0x00 0x20>;
+ phandle = <0x19>;
+ };
+
+ qos@ff538080 {
+ compatible = "syscon";
+ reg = <0x00 0xff538080 0x00 0x20>;
+ phandle = <0x1a>;
+ };
+
+ qos@ff538100 {
+ compatible = "syscon";
+ reg = <0x00 0xff538100 0x00 0x20>;
+ phandle = <0x1b>;
+ };
+
+ qos@ff538180 {
+ compatible = "syscon";
+ reg = <0x00 0xff538180 0x00 0x20>;
+ phandle = <0x1c>;
+ };
+
+ qos@ff540000 {
+ compatible = "syscon";
+ reg = <0x00 0xff540000 0x00 0x20>;
+ phandle = <0x15>;
+ };
+
+ qos@ff540080 {
+ compatible = "syscon";
+ reg = <0x00 0xff540080 0x00 0x20>;
+ phandle = <0x16>;
+ };
+
+ qos@ff548000 {
+ compatible = "syscon";
+ reg = <0x00 0xff548000 0x00 0x20>;
+ phandle = <0x23>;
+ };
+
+ qos@ff548080 {
+ compatible = "syscon";
+ reg = <0x00 0xff548080 0x00 0x20>;
+ phandle = <0x24>;
+ };
+
+ qos@ff548100 {
+ compatible = "syscon";
+ reg = <0x00 0xff548100 0x00 0x20>;
+ phandle = <0x25>;
+ };
+
+ qos@ff548180 {
+ compatible = "syscon";
+ reg = <0x00 0xff548180 0x00 0x20>;
+ phandle = <0x26>;
+ };
+
+ qos@ff548200 {
+ compatible = "syscon";
+ reg = <0x00 0xff548200 0x00 0x20>;
+ phandle = <0x27>;
+ };
+
+ qos@ff550000 {
+ compatible = "syscon";
+ reg = <0x00 0xff550000 0x00 0x20>;
+ phandle = <0x1f>;
+ };
+
+ qos@ff550080 {
+ compatible = "syscon";
+ reg = <0x00 0xff550080 0x00 0x20>;
+ phandle = <0x20>;
+ };
+
+ qos@ff550100 {
+ compatible = "syscon";
+ reg = <0x00 0xff550100 0x00 0x20>;
+ phandle = <0x21>;
+ };
+
+ qos@ff550180 {
+ compatible = "syscon";
+ reg = <0x00 0xff550180 0x00 0x20>;
+ phandle = <0x22>;
+ };
+
+ qos@ff558000 {
+ compatible = "syscon";
+ reg = <0x00 0xff558000 0x00 0x20>;
+ phandle = <0x1d>;
+ };
+
+ qos@ff558080 {
+ compatible = "syscon";
+ reg = <0x00 0xff558080 0x00 0x20>;
+ phandle = <0x1e>;
+ };
+
+ dfi@ff610000 {
+ reg = <0x00 0xff610000 0x00 0x400>;
+ compatible = "rockchip,px30-dfi";
+ rockchip,pmugrf = <0xac>;
+ status = "okay";
+ phandle = <0xad>;
+ };
+
+ dmc {
+ compatible = "rockchip,px30-dmc";
+ interrupts = <0x00 0x69 0x04>;
+ interrupt-names = "complete_irq";
+ devfreq-events = <0xad>;
+ clocks = <0x02 0x54>;
+ clock-names = "dmc_clk";
+ operating-points-v2 = <0xae>;
+ ddr_timing = <0xaf>;
+ upthreshold = <0x28>;
+ downdifferential = <0x14>;
+ system-status-freq = <0x01 0x80e80 0x08 0x6ddd0 0x02 0x2f5d0 0x20 0x6ddd0 0x1000 0x80e80 0x4000 0xa2990 0x2000 0xa2990>;
+ auto-min-freq = <0x50140>;
+ auto-freq-en = <0x01>;
+ #cooling-cells = <0x02>;
+ status = "okay";
+ center-supply = <0x0e>;
+ phandle = <0xab>;
+
+ ddr_power_model {
+ compatible = "ddr_power_model";
+ dynamic-power-coefficient = <0x78>;
+ static-power-coefficient = <0xc8>;
+ ts = <0x7d00 0x125c 0xffffffb0 0x02>;
+ thermal-zone = "soc-thermal";
+ phandle = <0x115>;
+ };
+ };
+
+ dmc-opp-table {
+ compatible = "operating-points-v2";
+ rockchip,max-volt = <0x118c30>;
+ rockchip,evb-irdrop = <0x61a8>;
+ rockchip,pvtm-voltage-sel = <0x00 0xc350 0x00 0xc351 0xd2f0 0x01 0xd2f1 0xea60 0x02 0xea61 0x1869f 0x03>;
+ rockchip,pvtm-ch = <0x00 0x00>;
+ phandle = <0xae>;
+
+ opp-528000000 {
+ opp-hz = <0x00 0x1f78a400>;
+ opp-microvolt = <0xee098>;
+ opp-microvolt-L0 = <0xee098>;
+ opp-microvolt-L1 = <0xee098>;
+ opp-microvolt-L2 = <0xe7ef0>;
+ opp-microvolt-L3 = <0xe7ef0>;
+ };
+
+ opp-666000000 {
+ opp-hz = <0x00 0x27b25a80>;
+ opp-microvolt = <0x100590>;
+ opp-microvolt-L0 = <0x100590>;
+ opp-microvolt-L1 = <0xf4240>;
+ opp-microvolt-L2 = <0xee098>;
+ opp-microvolt-L3 = <0xe7ef0>;
+ };
+
+ opp-786000000 {
+ opp-hz = <0x00 0x2ed96880>;
+ opp-microvolt = <0x10c8e0>;
+ opp-microvolt-L0 = <0x10c8e0>;
+ opp-microvolt-L1 = <0x100590>;
+ opp-microvolt-L2 = <0xfa3e8>;
+ opp-microvolt-L3 = <0xf4240>;
+ status = "okay";
+ };
+ };
+
+ rockchip-system-monitor {
+ compatible = "rockchip,system-monitor";
+ rockchip,thermal-zone = "soc-thermal";
+ rockchip,polling-delay = <0xc8>;
+ phandle = <0x116>;
+ };
+
+ pinctrl {
+ compatible = "rockchip,px30-pinctrl";
+ rockchip,grf = <0x2f>;
+ rockchip,pmu = <0xac>;
+ #address-cells = <0x02>;
+ #size-cells = <0x02>;
+ ranges;
+ phandle = <0x117>;
+
+ gpio0@ff040000 {
+ compatible = "rockchip,gpio-bank";
+ reg = <0x00 0xff040000 0x00 0x100>;
+ interrupts = <0x00 0x03 0x04>;
+ clocks = <0x2a 0x14>;
+ gpio-controller;
+ #gpio-cells = <0x02>;
+ interrupt-controller;
+ #interrupt-cells = <0x02>;
+ phandle = <0x5c>;
+ };
+
+ gpio1@ff250000 {
+ compatible = "rockchip,gpio-bank";
+ reg = <0x00 0xff250000 0x00 0x100>;
+ interrupts = <0x00 0x04 0x04>;
+ clocks = <0x02 0x15c>;
+ gpio-controller;
+ #gpio-cells = <0x02>;
+ interrupt-controller;
+ #interrupt-cells = <0x02>;
+ phandle = <0xbf>;
+ };
+
+ gpio2@ff260000 {
+ compatible = "rockchip,gpio-bank";
+ reg = <0x00 0xff260000 0x00 0x100>;
+ interrupts = <0x00 0x05 0x04>;
+ clocks = <0x02 0x15d>;
+ gpio-controller;
+ #gpio-cells = <0x02>;
+ interrupt-controller;
+ #interrupt-cells = <0x02>;
+ phandle = <0x66>;
+ };
+
+ gpio3@ff270000 {
+ compatible = "rockchip,gpio-bank";
+ reg = <0x00 0xff270000 0x00 0x100>;
+ interrupts = <0x00 0x06 0x04>;
+ clocks = <0x02 0x15e>;
+ gpio-controller;
+ #gpio-cells = <0x02>;
+ interrupt-controller;
+ #interrupt-cells = <0x02>;
+ phandle = <0x97>;
+ };
+
+ pcfg-pull-up {
+ bias-pull-up;
+ phandle = <0xb2>;
+ };
+
+ pcfg-pull-down {
+ bias-pull-down;
+ phandle = <0x118>;
+ };
+
+ pcfg-pull-none {
+ bias-disable;
+ phandle = <0xb1>;
+ };
+
+ pcfg-pull-none-2ma {
+ bias-disable;
+ drive-strength = <0x02>;
+ phandle = <0x119>;
+ };
+
+ pcfg-pull-up-2ma {
+ bias-pull-up;
+ drive-strength = <0x02>;
+ phandle = <0x11a>;
+ };
+
+ pcfg-pull-up-4ma {
+ bias-pull-up;
+ drive-strength = <0x04>;
+ phandle = <0xb3>;
+ };
+
+ pcfg-pull-none-4ma {
+ bias-disable;
+ drive-strength = <0x04>;
+ phandle = <0x11b>;
+ };
+
+ pcfg-pull-down-4ma {
+ bias-pull-down;
+ drive-strength = <0x04>;
+ phandle = <0x11c>;
+ };
+
+ pcfg-pull-none-8ma {
+ bias-disable;
+ drive-strength = <0x08>;
+ phandle = <0xb6>;
+ };
+
+ pcfg-pull-up-8ma {
+ bias-pull-up;
+ drive-strength = <0x08>;
+ phandle = <0xb4>;
+ };
+
+ pcfg-pull-none-12ma {
+ bias-disable;
+ drive-strength = <0x0c>;
+ phandle = <0xb8>;
+ };
+
+ pcfg-pull-up-12ma {
+ bias-pull-up;
+ drive-strength = <0x0c>;
+ phandle = <0xb7>;
+ };
+
+ pcfg-pull-none-smt {
+ bias-disable;
+ input-schmitt-enable;
+ phandle = <0xb0>;
+ };
+
+ pcfg-output-high {
+ output-high;
+ phandle = <0x11d>;
+ };
+
+ pcfg-output-low {
+ output-low;
+ phandle = <0xb9>;
+ };
+
+ pcfg-input-high {
+ bias-pull-up;
+ input-enable;
+ phandle = <0xb5>;
+ };
+
+ pcfg-input {
+ input-enable;
+ phandle = <0x11e>;
+ };
+
+ i2c0 {
+
+ i2c0-xfer {
+ rockchip,pins = <0x00 0x08 0x01 0xb0 0x00 0x09 0x01 0xb0>;
+ phandle = <0x5b>;
+ };
+ };
+
+ i2c1 {
+
+ i2c1-xfer {
+ rockchip,pins = <0x00 0x12 0x01 0xb0 0x00 0x13 0x01 0xb0>;
+ phandle = <0x69>;
+ };
+ };
+
+ i2c2 {
+
+ i2c2-xfer {
+ rockchip,pins = <0x02 0x0f 0x02 0xb0 0x02 0x10 0x02 0xb0>;
+ phandle = <0x6a>;
+ };
+ };
+
+ i2c3 {
+
+ i2c3-xfer {
+ rockchip,pins = <0x01 0x0c 0x04 0xb0 0x01 0x0d 0x04 0xb0>;
+ phandle = <0x6b>;
+ };
+ };
+
+ tsadc {
+
+ tsadc-otp-gpio {
+ rockchip,pins = <0x00 0x06 0x00 0xb1>;
+ phandle = <0x86>;
+ };
+
+ tsadc-otp-out {
+ rockchip,pins = <0x00 0x06 0x01 0xb1>;
+ phandle = <0x87>;
+ };
+ };
+
+ uart0 {
+
+ uart0-xfer {
+ rockchip,pins = <0x00 0x0a 0x01 0xb2 0x00 0x0b 0x01 0xb2>;
+ phandle = <0x2c>;
+ };
+
+ uart0-cts {
+ rockchip,pins = <0x00 0x0c 0x01 0xb1>;
+ phandle = <0x2d>;
+ };
+
+ uart0-rts {
+ rockchip,pins = <0x00 0x0d 0x01 0xb1>;
+ phandle = <0x2e>;
+ };
+
+ uart0-rts-gpio {
+ rockchip,pins = <0x00 0x0d 0x00 0xb1>;
+ phandle = <0x11f>;
+ };
+ };
+
+ uart1 {
+
+ uart1-xfer {
+ rockchip,pins = <0x01 0x11 0x01 0xb2 0x01 0x10 0x01 0xb2>;
+ phandle = <0x4f>;
+ };
+
+ uart1-cts {
+ rockchip,pins = <0x01 0x12 0x01 0xb1>;
+ phandle = <0x50>;
+ };
+
+ uart1-rts {
+ rockchip,pins = <0x01 0x13 0x01 0xb1>;
+ phandle = <0x120>;
+ };
+
+ uart1-rts-gpio {
+ rockchip,pins = <0x01 0x13 0x00 0xb1>;
+ phandle = <0x121>;
+ };
+ };
+
+ uart2-m0 {
+
+ uart2m0-xfer {
+ rockchip,pins = <0x01 0x1a 0x02 0xb2 0x01 0x1b 0x02 0xb2>;
+ phandle = <0x51>;
+ };
+ };
+
+ uart2-m1 {
+
+ uart2m1-xfer {
+ rockchip,pins = <0x02 0x0c 0x02 0xb2 0x02 0x0e 0x02 0xb2>;
+ phandle = <0xba>;
+ };
+ };
+
+ uart3-m0 {
+
+ uart3m0-xfer {
+ rockchip,pins = <0x00 0x10 0x02 0xb2 0x00 0x11 0x02 0xb2>;
+ phandle = <0x122>;
+ };
+
+ uart3m0-cts {
+ rockchip,pins = <0x00 0x12 0x02 0xb1>;
+ phandle = <0x123>;
+ };
+
+ uart3m0-rts {
+ rockchip,pins = <0x00 0x13 0x02 0xb1>;
+ phandle = <0x124>;
+ };
+
+ uart3m0-rts-gpio {
+ rockchip,pins = <0x00 0x13 0x00 0xb1>;
+ phandle = <0x125>;
+ };
+ };
+
+ uart3-m1 {
+
+ uart3m1-xfer {
+ rockchip,pins = <0x01 0x0e 0x02 0xb2 0x01 0x0f 0x02 0xb2>;
+ phandle = <0x52>;
+ };
+
+ uart3m1-cts {
+ rockchip,pins = <0x01 0x0c 0x02 0xb1>;
+ phandle = <0x53>;
+ };
+
+ uart3m1-rts {
+ rockchip,pins = <0x01 0x0d 0x02 0xb1>;
+ phandle = <0x54>;
+ };
+
+ uart3m1-rts-gpio {
+ rockchip,pins = <0x01 0x0d 0x00 0xb1>;
+ phandle = <0x126>;
+ };
+ };
+
+ uart4 {
+
+ uart4-xfer {
+ rockchip,pins = <0x01 0x1c 0x02 0xb2 0x01 0x1d 0x02 0xb2>;
+ phandle = <0x55>;
+ };
+
+ uart4-cts {
+ rockchip,pins = <0x01 0x1e 0x02 0xb1>;
+ phandle = <0x56>;
+ };
+
+ uart4-rts {
+ rockchip,pins = <0x01 0x1f 0x02 0xb1>;
+ phandle = <0x57>;
+ };
+ };
+
+ uart5 {
+
+ uart5-xfer {
+ rockchip,pins = <0x03 0x02 0x04 0xb2 0x03 0x01 0x04 0xb2>;
+ phandle = <0x58>;
+ };
+
+ uart5-cts {
+ rockchip,pins = <0x03 0x03 0x04 0xb1>;
+ phandle = <0x59>;
+ };
+
+ uart5-rts {
+ rockchip,pins = <0x03 0x05 0x04 0xb1>;
+ phandle = <0x5a>;
+ };
+ };
+
+ spi0 {
+
+ spi0-clk {
+ rockchip,pins = <0x01 0x0f 0x03 0xb3>;
+ phandle = <0x6c>;
+ };
+
+ spi0-csn {
+ rockchip,pins = <0x01 0x0e 0x03 0xb3>;
+ phandle = <0x6d>;
+ };
+
+ spi0-miso {
+ rockchip,pins = <0x01 0x0d 0x03 0xb3>;
+ phandle = <0x6e>;
+ };
+
+ spi0-mosi {
+ rockchip,pins = <0x01 0x0c 0x03 0xb3>;
+ phandle = <0x6f>;
+ };
+
+ spi0-clk-hs {
+ rockchip,pins = <0x01 0x0f 0x03 0xb4>;
+ phandle = <0x70>;
+ };
+
+ spi0-miso-hs {
+ rockchip,pins = <0x01 0x0d 0x03 0xb4>;
+ phandle = <0x71>;
+ };
+
+ spi0-mosi-hs {
+ rockchip,pins = <0x01 0x0c 0x03 0xb4>;
+ phandle = <0x72>;
+ };
+ };
+
+ spi1 {
+
+ spi1-clk {
+ rockchip,pins = <0x03 0x0f 0x04 0xb3>;
+ phandle = <0x73>;
+ };
+
+ spi1-csn0 {
+ rockchip,pins = <0x03 0x09 0x04 0xb3>;
+ phandle = <0x74>;
+ };
+
+ spi1-csn1 {
+ rockchip,pins = <0x03 0x0a 0x02 0xb3>;
+ phandle = <0x75>;
+ };
+
+ spi1-miso {
+ rockchip,pins = <0x03 0x0e 0x04 0xb3>;
+ phandle = <0x76>;
+ };
+
+ spi1-mosi {
+ rockchip,pins = <0x03 0x0c 0x04 0xb3>;
+ phandle = <0x77>;
+ };
+
+ spi1-clk-hs {
+ rockchip,pins = <0x03 0x0f 0x04 0xb4>;
+ phandle = <0x78>;
+ };
+
+ spi1-miso-hs {
+ rockchip,pins = <0x03 0x0e 0x04 0xb4>;
+ phandle = <0x79>;
+ };
+
+ spi1-mosi-hs {
+ rockchip,pins = <0x03 0x0c 0x04 0xb4>;
+ phandle = <0x7a>;
+ };
+ };
+
+ pdm {
+
+ pdm-clk0m0 {
+ rockchip,pins = <0x03 0x16 0x02 0xb1>;
+ phandle = <0x44>;
+ };
+
+ pdm-clk0m1 {
+ rockchip,pins = <0x02 0x16 0x01 0xb1>;
+ phandle = <0x127>;
+ };
+
+ pdm-clk1 {
+ rockchip,pins = <0x03 0x17 0x02 0xb1>;
+ phandle = <0x45>;
+ };
+
+ pdm-sdi0m0 {
+ rockchip,pins = <0x03 0x1b 0x02 0xb1>;
+ phandle = <0x46>;
+ };
+
+ pdm-sdi0m1 {
+ rockchip,pins = <0x02 0x15 0x02 0xb1>;
+ phandle = <0x128>;
+ };
+
+ pdm-sdi1 {
+ rockchip,pins = <0x03 0x18 0x02 0xb1>;
+ phandle = <0x47>;
+ };
+
+ pdm-sdi2 {
+ rockchip,pins = <0x03 0x19 0x02 0xb1>;
+ phandle = <0x48>;
+ };
+
+ pdm-sdi3 {
+ rockchip,pins = <0x03 0x1a 0x02 0xb1>;
+ phandle = <0x49>;
+ };
+
+ pdm-clk0m0-sleep {
+ rockchip,pins = <0x03 0x16 0x00 0xb5>;
+ phandle = <0x129>;
+ };
+
+ pdm-clk0m1-sleep {
+ rockchip,pins = <0x02 0x16 0x00 0xb5>;
+ phandle = <0x12a>;
+ };
+
+ pdm-clk1-sleep {
+ rockchip,pins = <0x03 0x17 0x00 0xb5>;
+ phandle = <0x12b>;
+ };
+
+ pdm-sdi0m0-sleep {
+ rockchip,pins = <0x03 0x1b 0x00 0xb5>;
+ phandle = <0x12c>;
+ };
+
+ pdm-sdi0m1-sleep {
+ rockchip,pins = <0x02 0x15 0x00 0xb5>;
+ phandle = <0x12d>;
+ };
+
+ pdm-sdi1-sleep {
+ rockchip,pins = <0x03 0x18 0x00 0xb5>;
+ phandle = <0x12e>;
+ };
+
+ pdm-sdi2-sleep {
+ rockchip,pins = <0x03 0x19 0x00 0xb5>;
+ phandle = <0x12f>;
+ };
+
+ pdm-sdi3-sleep {
+ rockchip,pins = <0x03 0x1a 0x00 0xb5>;
+ phandle = <0x130>;
+ };
+ };
+
+ i2s0 {
+
+ i2s0-8ch-mclk {
+ rockchip,pins = <0x03 0x11 0x02 0xb1>;
+ phandle = <0x131>;
+ };
+
+ i2s0-8ch-sclktx {
+ rockchip,pins = <0x03 0x13 0x02 0xb1>;
+ phandle = <0x30>;
+ };
+
+ i2s0-8ch-sclkrx {
+ rockchip,pins = <0x03 0x0c 0x02 0xb1>;
+ phandle = <0x31>;
+ };
+
+ i2s0-8ch-lrcktx {
+ rockchip,pins = <0x03 0x12 0x02 0xb1>;
+ phandle = <0x32>;
+ };
+
+ i2s0-8ch-lrckrx {
+ rockchip,pins = <0x03 0x0d 0x02 0xb1>;
+ phandle = <0x33>;
+ };
+
+ i2s0-8ch-sdo0 {
+ rockchip,pins = <0x03 0x14 0x02 0xb1>;
+ phandle = <0x38>;
+ };
+
+ i2s0-8ch-sdo1 {
+ rockchip,pins = <0x03 0x10 0x02 0xb1>;
+ phandle = <0x39>;
+ };
+
+ i2s0-8ch-sdo2 {
+ rockchip,pins = <0x03 0x0f 0x02 0xb1>;
+ phandle = <0x3a>;
+ };
+
+ i2s0-8ch-sdo3 {
+ rockchip,pins = <0x03 0x0e 0x02 0xb1>;
+ phandle = <0x3b>;
+ };
+
+ i2s0-8ch-sdi0 {
+ rockchip,pins = <0x03 0x15 0x02 0xb1>;
+ phandle = <0x34>;
+ };
+
+ i2s0-8ch-sdi1 {
+ rockchip,pins = <0x03 0x0b 0x02 0xb1>;
+ phandle = <0x35>;
+ };
+
+ i2s0-8ch-sdi2 {
+ rockchip,pins = <0x03 0x09 0x02 0xb1>;
+ phandle = <0x36>;
+ };
+
+ i2s0-8ch-sdi3 {
+ rockchip,pins = <0x03 0x08 0x02 0xb1>;
+ phandle = <0x37>;
+ };
+ };
+
+ i2s1 {
+
+ i2s1-2ch-mclk {
+ rockchip,pins = <0x02 0x13 0x01 0xb1>;
+ phandle = <0x68>;
+ };
+
+ i2s1-2ch-sclk {
+ rockchip,pins = <0x02 0x12 0x01 0xb1>;
+ phandle = <0x3c>;
+ };
+
+ i2s1-2ch-lrck {
+ rockchip,pins = <0x02 0x11 0x01 0xb1>;
+ phandle = <0x3d>;
+ };
+
+ i2s1-2ch-sdi {
+ rockchip,pins = <0x02 0x15 0x01 0xb1>;
+ phandle = <0x3e>;
+ };
+
+ i2s1-2ch-sdo {
+ rockchip,pins = <0x02 0x14 0x01 0xb1>;
+ phandle = <0x3f>;
+ };
+ };
+
+ i2s2 {
+
+ i2s2-2ch-mclk {
+ rockchip,pins = <0x03 0x01 0x02 0xb1>;
+ phandle = <0x132>;
+ };
+
+ i2s2-2ch-sclk {
+ rockchip,pins = <0x03 0x02 0x02 0xb1>;
+ phandle = <0x40>;
+ };
+
+ i2s2-2ch-lrck {
+ rockchip,pins = <0x03 0x03 0x02 0xb1>;
+ phandle = <0x41>;
+ };
+
+ i2s2-2ch-sdi {
+ rockchip,pins = <0x03 0x05 0x02 0xb1>;
+ phandle = <0x42>;
+ };
+
+ i2s2-2ch-sdo {
+ rockchip,pins = <0x03 0x07 0x02 0xb1>;
+ phandle = <0x43>;
+ };
+ };
+
+ sdmmc {
+
+ sdmmc-clk {
+ rockchip,pins = <0x01 0x1e 0x01 0xb6>;
+ phandle = <0x8f>;
+ };
+
+ sdmmc-cmd {
+ rockchip,pins = <0x01 0x1f 0x01 0xb4>;
+ phandle = <0x90>;
+ };
+
+ sdmmc-det {
+ rockchip,pins = <0x00 0x03 0x01 0xb4>;
+ phandle = <0x91>;
+ };
+
+ sdmmc-bus1 {
+ rockchip,pins = <0x01 0x1a 0x01 0xb4>;
+ phandle = <0x133>;
+ };
+
+ sdmmc-bus4 {
+ rockchip,pins = <0x01 0x1a 0x01 0xb4 0x01 0x1b 0x01 0xb4 0x01 0x1c 0x01 0xb4 0x01 0x1d 0x01 0xb4>;
+ phandle = <0x92>;
+ };
+
+ sdmmc-gpio {
+ rockchip,pins = <0x01 0x1a 0x00 0xb3 0x01 0x1b 0x00 0xb3 0x01 0x1c 0x00 0xb3 0x01 0x1d 0x00 0xb3 0x01 0x1e 0x00 0xb3 0x01 0x1f 0x00 0xb3>;
+ phandle = <0x134>;
+ };
+ };
+
+ sdio {
+
+ sdio-clk {
+ rockchip,pins = <0x01 0x15 0x01 0xb1>;
+ phandle = <0x96>;
+ };
+
+ sdio-cmd {
+ rockchip,pins = <0x01 0x14 0x01 0xb2>;
+ phandle = <0x95>;
+ };
+
+ sdio-bus4 {
+ rockchip,pins = <0x01 0x16 0x01 0xb2 0x01 0x17 0x01 0xb2 0x01 0x18 0x01 0xb2 0x01 0x19 0x01 0xb2>;
+ phandle = <0x94>;
+ };
+
+ sdio-gpio {
+ rockchip,pins = <0x01 0x16 0x00 0xb2 0x01 0x17 0x00 0xb2 0x01 0x18 0x00 0xb2 0x01 0x19 0x00 0xb2 0x01 0x14 0x00 0xb2 0x01 0x15 0x00 0xb2>;
+ phandle = <0x135>;
+ };
+ };
+
+ emmc {
+
+ emmc-clk {
+ rockchip,pins = <0x01 0x09 0x02 0xb6>;
+ phandle = <0x136>;
+ };
+
+ emmc-cmd {
+ rockchip,pins = <0x01 0x0a 0x02 0xb4>;
+ phandle = <0x137>;
+ };
+
+ emmc-pwren {
+ rockchip,pins = <0x01 0x08 0x02 0xb1>;
+ phandle = <0x138>;
+ };
+
+ emmc-rstnout {
+ rockchip,pins = <0x01 0x0b 0x02 0xb1>;
+ phandle = <0x139>;
+ };
+
+ emmc-bus1 {
+ rockchip,pins = <0x01 0x00 0x02 0xb4>;
+ phandle = <0x13a>;
+ };
+
+ emmc-bus4 {
+ rockchip,pins = <0x01 0x00 0x02 0xb4 0x01 0x01 0x02 0xb4 0x01 0x02 0x02 0xb4 0x01 0x03 0x02 0xb4>;
+ phandle = <0x13b>;
+ };
+
+ emmc-bus8 {
+ rockchip,pins = <0x01 0x00 0x02 0xb4 0x01 0x01 0x02 0xb4 0x01 0x02 0x02 0xb4 0x01 0x03 0x02 0xb4 0x01 0x04 0x02 0xb4 0x01 0x05 0x02 0xb4 0x01 0x06 0x02 0xb4 0x01 0x07 0x02 0xb4>;
+ phandle = <0x13c>;
+ };
+ };
+
+ flash {
+
+ flash-cs0 {
+ rockchip,pins = <0x01 0x08 0x01 0xb1>;
+ phandle = <0x13d>;
+ };
+
+ flash-rdy {
+ rockchip,pins = <0x01 0x09 0x01 0xb1>;
+ phandle = <0x13e>;
+ };
+
+ flash-dqs {
+ rockchip,pins = <0x01 0x0a 0x01 0xb1>;
+ phandle = <0x13f>;
+ };
+
+ flash-ale {
+ rockchip,pins = <0x01 0x0b 0x01 0xb1>;
+ phandle = <0x140>;
+ };
+
+ flash-cle {
+ rockchip,pins = <0x01 0x0c 0x01 0xb1>;
+ phandle = <0x141>;
+ };
+
+ flash-wrn {
+ rockchip,pins = <0x01 0x0d 0x01 0xb1>;
+ phandle = <0x142>;
+ };
+
+ flash-csl {
+ rockchip,pins = <0x01 0x0e 0x01 0xb1>;
+ phandle = <0x143>;
+ };
+
+ flash-rdn {
+ rockchip,pins = <0x01 0x0f 0x01 0xb1>;
+ phandle = <0x144>;
+ };
+
+ flash-bus8 {
+ rockchip,pins = <0x01 0x00 0x01 0xb7 0x01 0x01 0x01 0xb7 0x01 0x02 0x01 0xb7 0x01 0x03 0x01 0xb7 0x01 0x04 0x01 0xb7 0x01 0x05 0x01 0xb7 0x01 0x06 0x01 0xb7 0x01 0x07 0x01 0xb7>;
+ phandle = <0x145>;
+ };
+ };
+
+ lcdc {
+
+ lcdc-m0-rgb-pins {
+ rockchip,pins = <0x03 0x00 0x01 0xb6 0x03 0x01 0x01 0xb6 0x03 0x02 0x01 0xb6 0x03 0x03 0x01 0xb6 0x03 0x04 0x01 0xb6 0x03 0x05 0x01 0xb6 0x03 0x06 0x01 0xb6 0x03 0x07 0x01 0xb6 0x03 0x08 0x01 0xb6 0x03 0x09 0x01 0xb6 0x03 0x0a 0x01 0xb6 0x03 0x0b 0x01 0xb6 0x03 0x0c 0x01 0xb6 0x03 0x0d 0x01 0xb6 0x03 0x0e 0x01 0xb6 0x03 0x0f 0x01 0xb6 0x03 0x10 0x01 0xb6 0x03 0x11 0x01 0xb6 0x03 0x12 0x01 0xb6 0x03 0x13 0x01 0xb6 0x03 0x14 0x01 0xb6 0x03 0x15 0x01 0xb6 0x03 0x16 0x01 0xb6 0x03 0x17 0x01 0xb6 0x03 0x18 0x01 0xb6 0x03 0x19 0x01 0xb6 0x03 0x1a 0x01 0xb6 0x03 0x1b 0x01 0xb6>;
+ phandle = <0x146>;
+ };
+
+ lcdc-m0-sleep-pins {
+ rockchip,pins = <0x03 0x00 0x00 0xb1 0x03 0x01 0x00 0xb1 0x03 0x02 0x00 0xb1 0x03 0x03 0x00 0xb1 0x03 0x04 0x00 0xb1 0x03 0x05 0x00 0xb1 0x03 0x06 0x00 0xb1 0x03 0x07 0x00 0xb1 0x03 0x08 0x00 0xb1 0x03 0x09 0x00 0xb1 0x03 0x0a 0x00 0xb1 0x03 0x0b 0x00 0xb1 0x03 0x0c 0x00 0xb1 0x03 0x0d 0x00 0xb1 0x03 0x0e 0x00 0xb1 0x03 0x0f 0x00 0xb1 0x03 0x10 0x00 0xb1 0x03 0x11 0x00 0xb1 0x03 0x12 0x00 0xb1 0x03 0x13 0x00 0xb1 0x03 0x14 0x00 0xb1 0x03 0x15 0x00 0xb1 0x03 0x16 0x00 0xb1 0x03 0x17 0x00 0xb1 0x03 0x18 0x00 0xb1 0x03 0x19 0x00 0xb1 0x03 0x1a 0x00 0xb1 0x03 0x1b 0x00 0xb1>;
+ phandle = <0x147>;
+ };
+
+ lcdc-m1-rgb-pins {
+ rockchip,pins = <0x03 0x00 0x01 0xb6 0x03 0x04 0x01 0xb6 0x03 0x06 0x01 0xb6 0x03 0x0a 0x01 0xb6 0x03 0x0b 0x01 0xb6 0x03 0x0d 0x01 0xb6 0x03 0x10 0x01 0xb6 0x03 0x11 0x01 0xb6 0x03 0x12 0x01 0xb6 0x03 0x13 0x01 0xb6 0x03 0x14 0x01 0xb6 0x03 0x15 0x01 0xb6 0x03 0x16 0x01 0xb6 0x03 0x17 0x01 0xb6 0x03 0x18 0x01 0xb6 0x03 0x19 0x01 0xb6 0x03 0x1a 0x01 0xb6 0x03 0x1b 0x01 0xb6>;
+ phandle = <0x4d>;
+ };
+
+ lcdc-m1-sleep-pins {
+ rockchip,pins = <0x03 0x00 0x00 0xb1 0x03 0x04 0x00 0xb1 0x03 0x06 0x00 0xb1 0x03 0x0a 0x00 0xb1 0x03 0x0b 0x00 0xb1 0x03 0x0d 0x00 0xb1 0x03 0x10 0x00 0xb1 0x03 0x11 0x00 0xb1 0x03 0x12 0x00 0xb1 0x03 0x13 0x00 0xb1 0x03 0x14 0x00 0xb1 0x03 0x15 0x00 0xb1 0x03 0x16 0x00 0xb1 0x03 0x17 0x00 0xb1 0x03 0x18 0x00 0xb1 0x03 0x19 0x00 0xb1 0x03 0x1a 0x00 0xb1 0x03 0x1b 0x00 0xb1>;
+ phandle = <0x4e>;
+ };
+ };
+
+ pwm0 {
+
+ pwm0-pin {
+ rockchip,pins = <0x00 0x0f 0x01 0xb1>;
+ phandle = <0x7b>;
+ };
+ };
+
+ pwm1 {
+
+ pwm1-pin {
+ rockchip,pins = <0x00 0x10 0x01 0xb1>;
+ phandle = <0x7c>;
+ };
+ };
+
+ pwm2 {
+
+ pwm2-pin {
+ rockchip,pins = <0x02 0x0d 0x01 0xb1>;
+ phandle = <0x7d>;
+ };
+ };
+
+ pwm3 {
+
+ pwm3-pin {
+ rockchip,pins = <0x00 0x11 0x01 0xb1>;
+ phandle = <0x7e>;
+ };
+ };
+
+ pwm4 {
+
+ pwm4-pin {
+ rockchip,pins = <0x03 0x12 0x03 0xb1>;
+ phandle = <0x7f>;
+ };
+ };
+
+ pwm5 {
+
+ pwm5-pin {
+ rockchip,pins = <0x03 0x13 0x03 0xb1>;
+ phandle = <0x80>;
+ };
+ };
+
+ pwm6 {
+
+ pwm6-pin {
+ rockchip,pins = <0x03 0x14 0x03 0xb1>;
+ phandle = <0x81>;
+ };
+ };
+
+ pwm7 {
+
+ pwm7-pin {
+ rockchip,pins = <0x03 0x15 0x03 0xb1>;
+ phandle = <0x82>;
+ };
+ };
+
+ gmac {
+
+ rmii-pins {
+ rockchip,pins = <0x02 0x00 0x02 0xb8 0x02 0x01 0x02 0xb8 0x02 0x02 0x02 0xb8 0x02 0x03 0x02 0xb1 0x02 0x04 0x02 0xb1 0x02 0x05 0x02 0xb1 0x02 0x06 0x02 0xb1 0x02 0x07 0x02 0xb1 0x02 0x09 0x02 0xb1>;
+ phandle = <0x8d>;
+ };
+
+ mac-refclk-12ma {
+ rockchip,pins = <0x02 0x0a 0x02 0xb8>;
+ phandle = <0x8e>;
+ };
+
+ mac-refclk {
+ rockchip,pins = <0x02 0x0a 0x02 0xb1>;
+ phandle = <0x148>;
+ };
+ };
+
+ cif-m0 {
+
+ cif-clkout-m0 {
+ rockchip,pins = <0x02 0x0b 0x01 0xb8>;
+ phandle = <0xa7>;
+ };
+
+ dvp-d2d9-m0 {
+ rockchip,pins = <0x02 0x00 0x01 0xb1 0x02 0x01 0x01 0xb1 0x02 0x02 0x01 0xb1 0x02 0x03 0x01 0xb1 0x02 0x04 0x01 0xb1 0x02 0x05 0x01 0xb1 0x02 0x06 0x01 0xb1 0x02 0x07 0x01 0xb1 0x02 0x08 0x01 0xb1 0x02 0x09 0x01 0xb1 0x02 0x0a 0x01 0xb1 0x02 0x0b 0x01 0xb1>;
+ phandle = <0xa5>;
+ };
+
+ dvp-d0d1-m0 {
+ rockchip,pins = <0x02 0x0c 0x01 0xb1 0x02 0x0e 0x01 0xb1>;
+ phandle = <0xa9>;
+ };
+
+ d10-d11-m0 {
+ rockchip,pins = <0x02 0x0f 0x01 0xb1 0x02 0x10 0x01 0xb1>;
+ phandle = <0xa8>;
+ };
+ };
+
+ cif-m1 {
+
+ cif-clkout-m1 {
+ rockchip,pins = <0x03 0x18 0x03 0xb1>;
+ phandle = <0x149>;
+ };
+
+ dvp-d2d9-m1 {
+ rockchip,pins = <0x03 0x03 0x03 0xb1 0x03 0x05 0x03 0xb1 0x03 0x07 0x03 0xb1 0x03 0x08 0x03 0xb1 0x03 0x09 0x03 0xb1 0x03 0x0c 0x03 0xb1 0x03 0x0e 0x03 0xb1 0x03 0x0f 0x03 0xb1 0x03 0x19 0x03 0xb1 0x03 0x1a 0x03 0xb1 0x03 0x1b 0x03 0xb1 0x03 0x18 0x03 0xb1>;
+ phandle = <0x14a>;
+ };
+
+ dvp-d0d1-m1 {
+ rockchip,pins = <0x03 0x01 0x03 0xb1 0x03 0x02 0x03 0xb1>;
+ phandle = <0x14b>;
+ };
+
+ d10-d11-m1 {
+ rockchip,pins = <0x03 0x16 0x03 0xb1 0x03 0x17 0x03 0xb1>;
+ phandle = <0x14c>;
+ };
+ };
+
+ isp {
+
+ isp-prelight {
+ rockchip,pins = <0x03 0x19 0x04 0xb1>;
+ phandle = <0x14d>;
+ };
+ };
+
+ pmic {
+
+ pmic_int {
+ rockchip,pins = <0x00 0x0a 0x00 0xb2 0x00 0x0b 0x00 0xb1>;
+ phandle = <0x5d>;
+ };
+
+ soc_slppin_gpio {
+ rockchip,pins = <0x00 0x04 0x00 0xb9>;
+ phandle = <0x60>;
+ };
+
+ soc_slppin_slp {
+ rockchip,pins = <0x00 0x04 0x01 0xb1>;
+ phandle = <0x5e>;
+ };
+
+ soc_slppin_rst {
+ rockchip,pins = <0x00 0x04 0x02 0xb1>;
+ phandle = <0x62>;
+ };
+ };
+
+ leds {
+
+ led-pins {
+ rockchip,pins = <0x00 0x11 0x00 0xb1>;
+ phandle = <0xc0>;
+ };
+ };
+
+ btns {
+
+ btn-pins {
+ rockchip,pins = <0x01 0x0c 0x00 0xb2 0x01 0x0d 0x00 0xb2 0x01 0x0e 0x00 0xb2 0x01 0x0f 0x00 0xb2 0x01 0x02 0x00 0xb2 0x01 0x05 0x00 0xb2 0x01 0x06 0x00 0xb2 0x01 0x07 0x00 0xb2 0x02 0x00 0x00 0xb2 0x02 0x01 0x00 0xb2 0x02 0x02 0x00 0xb2 0x02 0x03 0x00 0xb2 0x02 0x04 0x00 0xb2 0x02 0x05 0x00 0xb2 0x02 0x06 0x00 0xb2 0x02 0x07 0x00 0xb2 0x03 0x09 0x00 0xb2 0x03 0x0a 0x00 0xb2 0x03 0x0c 0x00 0xb2 0x03 0x0f 0x00 0xb2>;
+ phandle = <0xbd>;
+ };
+ };
+ };
+
+ chosen {
+ bootargs = [00];
+ };
+
+ fiq-debugger {
+ compatible = "rockchip,fiq-debugger";
+ rockchip,serial-id = <0x02>;
+ rockchip,wake-irq = <0x00>;
+ rockchip,irq-mode-enable = <0x00>;
+ rockchip,baudrate = <0x1c200>;
+ interrupts = <0x00 0x7f 0x08>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0xba>;
+ status = "okay";
+ };
+
+ ramoops {
+ compatible = "ramoops";
+ record-size = <0x00 0x20000>;
+ console-size = <0x00 0x80000>;
+ ftrace-size = <0x00 0x00>;
+ pmsg-size = <0x00 0x00>;
+ memory-region = <0xbb>;
+ };
+
+ reserved-memory {
+ #address-cells = <0x02>;
+ #size-cells = <0x02>;
+ ranges;
+
+ drm-logo@00000000 {
+ compatible = "rockchip,drm-logo";
+ reg = <0x00 0x00 0x00 0x00>;
+ phandle = <0x11>;
+ };
+
+ region@110000 {
+ reg = <0x00 0x110000 0x00 0xf0000>;
+ reg-names = "ramoops_mem";
+ phandle = <0xbb>;
+ };
+ };
+
+ odroidgo3-keys {
+ compatible = "gpio-keys";
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+ autorepeat;
+ phandle = <0x14e>;
+
+ button@0 {
+ label = "GPIO BTN-VOLUP";
+ linux,code = <0x73>;
+ gpios = <0x66 0x00 0x01>;
+ };
+
+ button@1 {
+ label = "GPIO BTN-VOLDN";
+ linux,code = <0x72>;
+ gpios = <0x66 0x01 0x01>;
+ };
+ };
+
+ odroidgo3-joypad {
+ compatible = "odroidgo3-joypad";
+ pwms = <0xbc 0x00 0xbebc200 0x00>;
+ pwm-names = "enable";
+ rumble-boost-weak = <0x00>;
+ rumble-boost-strong = <0x00>;
+ joypad-name = "GO-Super Gamepad";
+ joypad-product = <0x1100>;
+ joypad-revision = <0x100>;
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <0xbd>;
+ pinctrl-1 = <0x7b>;
+ io-channel-names = "amux_adc";
+ io-channels = <0xbe 0x01>;
+ amux-count = <0x04>;
+ amux-a-gpios = <0x97 0x0b 0x01>;
+ amux-b-gpios = <0x97 0x08 0x01>;
+ amux-en-gpios = <0x97 0x0d 0x01>;
+ button-adc-scale = <0x02>;
+ button-adc-deadzone = <0x40>;
+ button-adc-fuzz = <0x20>;
+ button-adc-flat = <0x20>;
+ abs_x-p-tuning = <0xc8>;
+ abs_x-n-tuning = <0xc8>;
+ abs_y-p-tuning = <0xc8>;
+ abs_y-n-tuning = <0xc8>;
+ abs_rx-p-tuning = <0xc8>;
+ abs_rx-n-tuning = <0xc8>;
+ abs_ry-p-tuning = <0xc8>;
+ abs_ry-n-tuning = <0xc8>;
+ poll-interval = <0x0a>;
+ invert-absx;
+ invert-absy;
+ phandle = <0x14f>;
+
+ sw1 {
+ gpios = <0xbf 0x0c 0x01>;
+ label = "GPIO DPAD-UP";
+ linux,code = <0x220>;
+ };
+
+ sw2 {
+ gpios = <0xbf 0x0d 0x01>;
+ label = "GPIO DPAD-DOWN";
+ linux,code = <0x221>;
+ };
+
+ sw3 {
+ gpios = <0xbf 0x0e 0x01>;
+ label = "GPIO DPAD-LEFT";
+ linux,code = <0x222>;
+ };
+
+ sw4 {
+ gpios = <0xbf 0x0f 0x01>;
+ label = "GPIO DPAD-RIGHT";
+ linux,code = <0x223>;
+ };
+
+ sw5 {
+ gpios = <0xbf 0x02 0x01>;
+ label = "GPIO KEY BTN-A";
+ linux,code = <0x131>;
+ };
+
+ sw6 {
+ gpios = <0xbf 0x05 0x01>;
+ label = "GPIO BTN-B";
+ linux,code = <0x130>;
+ };
+
+ sw7 {
+ gpios = <0xbf 0x06 0x01>;
+ label = "GPIO BTN-Y";
+ linux,code = <0x134>;
+ };
+
+ sw8 {
+ gpios = <0xbf 0x07 0x01>;
+ label = "GPIO BTN-X";
+ linux,code = <0x133>;
+ };
+
+ sw11 {
+ gpios = <0x66 0x02 0x01>;
+ label = "GPIO F3";
+ linux,code = <0x2c2>;
+ };
+
+ sw12 {
+ gpios = <0x66 0x03 0x01>;
+ label = "GPIO F4";
+ linux,code = <0x2c3>;
+ };
+
+ sw15 {
+ gpios = <0x66 0x06 0x01>;
+ label = "GPIO TOP-LEFT";
+ linux,code = <0x136>;
+ };
+
+ sw16 {
+ gpios = <0x66 0x07 0x01>;
+ label = "GPIO TOP-RIGHT";
+ linux,code = <0x137>;
+ };
+
+ sw19 {
+ gpios = <0x97 0x09 0x01>;
+ label = "GPIO F1";
+ linux,code = <0x2c0>;
+ };
+
+ sw20 {
+ gpios = <0x97 0x0f 0x01>;
+ label = "GPIO TOP-RIGHT2";
+ linux,code = <0x139>;
+ };
+
+ sw21 {
+ gpios = <0x97 0x0a 0x01>;
+ label = "GPIO TOP-LEFT2";
+ linux,code = <0x138>;
+ };
+
+ sw22 {
+ gpios = <0x97 0x0c 0x01>;
+ label = "GPIO F2";
+ linux,code = <0x2c1>;
+ };
+
+ sw13 {
+ gpios = <0x66 0x04 0x01>;
+ label = "GPIO F5";
+ linux,code = <0x2c4>;
+ };
+ };
+
+ gpio_leds {
+ compatible = "gpio-leds";
+ pinctrl-names = "led_pins";
+ pinctrl-0 = <0xc0>;
+ phandle = <0x150>;
+
+ heartbeat {
+ label = "blue:heartbeat";
+ gpios = <0x5c 0x11 0x00>;
+ linux,default-trigger = "heartbeat";
+ };
+ };
+
+ backlight {
+ compatible = "pwm-backlight";
+ pwms = <0xc1 0x00 0xf519 0x00>;
+ brightness-levels = <0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f 0x20 0x21 0x22 0x23 0x24 0x25 0x26 0x27 0x28 0x29 0x2a 0x2b 0x2c 0x2d 0x2e 0x2f 0x30 0x31 0x32 0x33 0x34 0x35 0x36 0x37 0x38 0x39 0x3a 0x3b 0x3c 0x3d 0x3e 0x3f 0x40 0x41 0x42 0x43 0x44 0x45 0x46 0x47 0x48 0x49 0x4a 0x4b 0x4c 0x4d 0x4e 0x4f 0x50 0x51 0x52 0x53 0x54 0x55 0x56 0x57 0x58 0x59 0x5a 0x5b 0x5c 0x5d 0x5e 0x5f 0x60 0x61 0x62 0x63 0x64 0x65 0x66 0x67 0x68 0x69 0x6a 0x6b 0x6c 0x6d 0x6e 0x6f 0x70 0x71 0x72 0x73 0x74 0x75 0x76 0x77 0x78 0x79 0x7a 0x7b 0x7c 0x7d 0x7e 0x7f 0x80 0x81 0x82 0x83 0x84 0x85 0x86 0x87 0x88 0x89 0x8a 0x8b 0x8c 0x8d 0x8e 0x8f 0x90 0x91 0x92 0x93 0x94 0x95 0x96 0x97 0x98 0x99 0x9a 0x9b 0x9c 0x9d 0x9e 0x9f 0xa0>;
+ default-brightness-level = <0x33>;
+ phandle = <0x9d>;
+ };
+
+ rk817-sound {
+ compatible = "simple-audio-card";
+ simple-audio-card,format = "i2s";
+ simple-audio-card,name = "rockchip,rk817-codec";
+ simple-audio-card,mclk-fs = <0x100>;
+ simple-audio-card,widgets = "Microphone\0Mic Jack\0Headphone\0Headphone Jack";
+ simple-audio-card,routing = "MIC_IN\0Mic Jack\0Headphone Jack\0HPOL\0Headphone Jack\0HPOR";
+ simple-audio-card,hp-det-gpio = <0x66 0x16 0x01>;
+ simple-audio-card,codec-hp-det = <0x01>;
+
+ simple-audio-card,cpu {
+ sound-dai = <0xc2>;
+ };
+
+ simple-audio-card,codec {
+ sound-dai = <0xc3>;
+ };
+ };
+
+ vccsys {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v8_sys";
+ regulator-always-on;
+ regulator-min-microvolt = <0x39fbc0>;
+ regulator-max-microvolt = <0x39fbc0>;
+ phandle = <0x64>;
+ };
+
+ __symbols__ {
+ ddr_timing = "/ddr_timing";
+ cpu0 = "/cpus/cpu@0";
+ cpu1 = "/cpus/cpu@1";
+ cpu2 = "/cpus/cpu@2";
+ cpu3 = "/cpus/cpu@3";
+ CPU_SLEEP = "/cpus/idle-states/cpu-sleep";
+ CLUSTER_SLEEP = "/cpus/idle-states/cluster-sleep";
+ cpu0_opp_table = "/cpu0-opp-table";
+ bus_soc = "/bus-soc";
+ bus_apll = "/bus-apll";
+ bus_apll_opp_table = "/bus-apll-opp-table";
+ display_subsystem = "/display-subsystem";
+ route_lvds = "/display-subsystem/route/route-lvds";
+ route_dsi = "/display-subsystem/route/route-dsi";
+ route_rgb = "/display-subsystem/route/route-rgb";
+ gmac_clkin = "/external-gmac-clock";
+ rockchip_suspend = "/rockchip-suspend";
+ xin24m = "/xin24m";
+ xin32k = "/xin32k";
+ pmu = "/power-management@ff000000";
+ power = "/power-management@ff000000/power-controller";
+ pmugrf = "/syscon@ff010000";
+ pmu_io_domains = "/syscon@ff010000/io-domains";
+ pmu_pvtm = "/syscon@ff010000/pmu-pvtm";
+ uart0 = "/serial@ff030000";
+ i2s0_8ch = "/i2s@ff060000";
+ i2s1_2ch = "/i2s@ff070000";
+ i2s2_2ch = "/i2s@ff080000";
+ pdm = "/pdm@ff0a0000";
+ crypto = "/crypto@ff0b0000";
+ rng = "/rng@ff0b0000";
+ gic = "/interrupt-controller@ff131000";
+ grf = "/syscon@ff140000";
+ io_domains = "/syscon@ff140000/io-domains";
+ lvds = "/syscon@ff140000/lvds";
+ lvds_in_vopb = "/syscon@ff140000/lvds/ports/port@0/endpoint@0";
+ rgb = "/syscon@ff140000/rgb";
+ rgb_in_vopb = "/syscon@ff140000/rgb/ports/port@0/endpoint@0";
+ core_grf = "/syscon@ff148000";
+ pvtm = "/syscon@ff148000/pvtm";
+ uart1 = "/serial@ff158000";
+ uart2 = "/serial@ff160000";
+ uart3 = "/serial@ff168000";
+ uart4 = "/serial@ff170000";
+ uart5 = "/serial@ff178000";
+ i2c0 = "/i2c@ff180000";
+ rk817 = "/i2c@ff180000/pmic@20";
+ pinctrl_rk8xx = "/i2c@ff180000/pmic@20/pinctrl_rk8xx";
+ rk817_ts_gpio1 = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_ts_gpio1";
+ rk817_gt_gpio2 = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_gt_gpio2";
+ rk817_pin_ts = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_pin_ts";
+ rk817_pin_gt = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_pin_gt";
+ rk817_slppin_null = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_slppin_null";
+ rk817_slppin_slp = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_slppin_slp";
+ rk817_slppin_pwrdn = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_slppin_pwrdn";
+ rk817_slppin_rst = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_slppin_rst";
+ vdd_logic = "/i2c@ff180000/pmic@20/regulators/DCDC_REG1";
+ vdd_arm = "/i2c@ff180000/pmic@20/regulators/DCDC_REG2";
+ vcc_ddr = "/i2c@ff180000/pmic@20/regulators/DCDC_REG3";
+ vcc_3v3 = "/i2c@ff180000/pmic@20/regulators/DCDC_REG4";
+ vcc_1v0 = "/i2c@ff180000/pmic@20/regulators/LDO_REG1";
+ vcc1v8_soc = "/i2c@ff180000/pmic@20/regulators/LDO_REG2";
+ vdd1v0_soc = "/i2c@ff180000/pmic@20/regulators/LDO_REG3";
+ vcc3v3_pmu = "/i2c@ff180000/pmic@20/regulators/LDO_REG4";
+ vccio_sd = "/i2c@ff180000/pmic@20/regulators/LDO_REG5";
+ vcc_sd = "/i2c@ff180000/pmic@20/regulators/LDO_REG6";
+ vcc_backlight = "/i2c@ff180000/pmic@20/regulators/LDO_REG7";
+ vcc_lcd = "/i2c@ff180000/pmic@20/regulators/LDO_REG8";
+ dcdc_boost = "/i2c@ff180000/pmic@20/regulators/BOOST";
+ otg_switch = "/i2c@ff180000/pmic@20/regulators/OTG_SWITCH";
+ rk817_codec = "/i2c@ff180000/pmic@20/codec";
+ i2c1 = "/i2c@ff190000";
+ i2c2 = "/i2c@ff1a0000";
+ i2c3 = "/i2c@ff1b0000";
+ spi0 = "/spi@ff1d0000";
+ spi1 = "/spi@ff1d8000";
+ wdt = "/watchdog@ff1e0000";
+ pwm0 = "/pwm@ff200000";
+ pwm1 = "/pwm@ff200010";
+ pwm2 = "/pwm@ff200020";
+ pwm3 = "/pwm@ff200030";
+ pwm4 = "/pwm@ff208000";
+ pwm5 = "/pwm@ff208010";
+ pwm6 = "/pwm@ff208020";
+ pwm7 = "/pwm@ff208030";
+ rktimer = "/rktimer@ff210000";
+ dmac = "/amba/dmac@ff240000";
+ thermal_zones = "/thermal-zones";
+ soc_thermal = "/thermal-zones/soc-thermal";
+ threshold = "/thermal-zones/soc-thermal/trips/trip-point-0";
+ target = "/thermal-zones/soc-thermal/trips/trip-point-1";
+ soc_crit = "/thermal-zones/soc-thermal/trips/soc-crit";
+ gpu_thermal = "/thermal-zones/gpu-thermal";
+ tsadc = "/tsadc@ff280000";
+ saradc = "/saradc@ff288000";
+ otp = "/otp@ff290000";
+ otp_id = "/otp@ff290000/id@7";
+ cpu_leakage = "/otp@ff290000/cpu-leakage@17";
+ performance = "/otp@ff290000/performance@1e";
+ cru = "/clock-controller@ff2b0000";
+ cpu_boost = "/cpu-boost@ff2b8000";
+ pmucru = "/pmu-clock-controller@ff2bc000";
+ usb2phy_grf = "/syscon@ff2c0000";
+ u2phy = "/syscon@ff2c0000/usb2-phy@100";
+ u2phy_host = "/syscon@ff2c0000/usb2-phy@100/host-port";
+ u2phy_otg = "/syscon@ff2c0000/usb2-phy@100/otg-port";
+ video_phy = "/video-phy@ff2e0000";
+ mipi_dphy_rx0 = "/mipi-dphy-rx0@ff2f0000";
+ usb20_otg = "/usb@ff300000";
+ usb_host0_ehci = "/usb@ff340000";
+ usb_host0_ohci = "/usb@ff350000";
+ gmac = "/ethernet@ff360000";
+ sdmmc = "/dwmmc@ff370000";
+ sdio = "/dwmmc@ff380000";
+ emmc = "/dwmmc@ff390000";
+ nandc0 = "/nandc@ff3b0000";
+ sfc = "/sfc@ff3a0000";
+ gpu = "/gpu@ff400000";
+ gpu_opp_table = "/gpu-opp-table";
+ hevc = "/hevc_service@ff440000";
+ vpu = "/vpu_service@ff442000";
+ vpu_combo = "/vpu_combo";
+ hevc_mmu = "/iommu@ff440440";
+ vpu_mmu = "/iommu@ff442800";
+ dsi = "/dsi@ff450000";
+ dsi_in_vopb = "/dsi@ff450000/ports/port@0/endpoint@0";
+ timing0 = "/dsi@ff450000/panel@0/display-timings/60Hz";
+ timing1 = "/dsi@ff450000/panel@0/display-timings/50Hz";
+ timing2 = "/dsi@ff450000/panel@0/display-timings/75Hz";
+ vopb = "/vop@ff460000";
+ vopb_out = "/vop@ff460000/port";
+ vopb_out_lvds = "/vop@ff460000/port/endpoint@0";
+ vopb_out_dsi = "/vop@ff460000/port/endpoint@1";
+ vopb_out_rgb = "/vop@ff460000/port/endpoint@2";
+ vopb_mmu = "/iommu@ff460f00";
+ rk_rga = "/rk_rga@ff480000";
+ cif = "/cif@ff490000";
+ cif_new = "/cif-new@ff490000";
+ vip_mmu = "/iommu@ff490800";
+ rk_isp = "/rk_isp@ff4a0000";
+ rkisp1 = "/rkisp1@ff4a0000";
+ isp_mmu = "/iommu@ff4a8000";
+ qos_gmac = "/qos@ff518000";
+ qos_gpu = "/qos@ff520000";
+ qos_sdmmc = "/qos@ff52c000";
+ qos_emmc = "/qos@ff538000";
+ qos_nand = "/qos@ff538080";
+ qos_sdio = "/qos@ff538100";
+ qos_sfc = "/qos@ff538180";
+ qos_usb_host = "/qos@ff540000";
+ qos_usb_otg = "/qos@ff540080";
+ qos_isp_128 = "/qos@ff548000";
+ qos_isp_rd = "/qos@ff548080";
+ qos_isp_wr = "/qos@ff548100";
+ qos_isp_m1 = "/qos@ff548180";
+ qos_vip = "/qos@ff548200";
+ qos_rga_rd = "/qos@ff550000";
+ qos_rga_wr = "/qos@ff550080";
+ qos_vop_m0 = "/qos@ff550100";
+ qos_vop_m1 = "/qos@ff550180";
+ qos_vpu = "/qos@ff558000";
+ qos_vpu_r128 = "/qos@ff558080";
+ dfi = "/dfi@ff610000";
+ dmc = "/dmc";
+ ddr_power_model = "/dmc/ddr_power_model";
+ dmc_opp_table = "/dmc-opp-table";
+ rockchip_system_monitor = "/rockchip-system-monitor";
+ pinctrl = "/pinctrl";
+ gpio0 = "/pinctrl/gpio0@ff040000";
+ gpio1 = "/pinctrl/gpio1@ff250000";
+ gpio2 = "/pinctrl/gpio2@ff260000";
+ gpio3 = "/pinctrl/gpio3@ff270000";
+ pcfg_pull_up = "/pinctrl/pcfg-pull-up";
+ pcfg_pull_down = "/pinctrl/pcfg-pull-down";
+ pcfg_pull_none = "/pinctrl/pcfg-pull-none";
+ pcfg_pull_none_2ma = "/pinctrl/pcfg-pull-none-2ma";
+ pcfg_pull_up_2ma = "/pinctrl/pcfg-pull-up-2ma";
+ pcfg_pull_up_4ma = "/pinctrl/pcfg-pull-up-4ma";
+ pcfg_pull_none_4ma = "/pinctrl/pcfg-pull-none-4ma";
+ pcfg_pull_down_4ma = "/pinctrl/pcfg-pull-down-4ma";
+ pcfg_pull_none_8ma = "/pinctrl/pcfg-pull-none-8ma";
+ pcfg_pull_up_8ma = "/pinctrl/pcfg-pull-up-8ma";
+ pcfg_pull_none_12ma = "/pinctrl/pcfg-pull-none-12ma";
+ pcfg_pull_up_12ma = "/pinctrl/pcfg-pull-up-12ma";
+ pcfg_pull_none_smt = "/pinctrl/pcfg-pull-none-smt";
+ pcfg_output_high = "/pinctrl/pcfg-output-high";
+ pcfg_output_low = "/pinctrl/pcfg-output-low";
+ pcfg_input_high = "/pinctrl/pcfg-input-high";
+ pcfg_input = "/pinctrl/pcfg-input";
+ i2c0_xfer = "/pinctrl/i2c0/i2c0-xfer";
+ i2c1_xfer = "/pinctrl/i2c1/i2c1-xfer";
+ i2c2_xfer = "/pinctrl/i2c2/i2c2-xfer";
+ i2c3_xfer = "/pinctrl/i2c3/i2c3-xfer";
+ tsadc_otp_gpio = "/pinctrl/tsadc/tsadc-otp-gpio";
+ tsadc_otp_out = "/pinctrl/tsadc/tsadc-otp-out";
+ uart0_xfer = "/pinctrl/uart0/uart0-xfer";
+ uart0_cts = "/pinctrl/uart0/uart0-cts";
+ uart0_rts = "/pinctrl/uart0/uart0-rts";
+ uart0_rts_gpio = "/pinctrl/uart0/uart0-rts-gpio";
+ uart1_xfer = "/pinctrl/uart1/uart1-xfer";
+ uart1_cts = "/pinctrl/uart1/uart1-cts";
+ uart1_rts = "/pinctrl/uart1/uart1-rts";
+ uart1_rts_gpio = "/pinctrl/uart1/uart1-rts-gpio";
+ uart2m0_xfer = "/pinctrl/uart2-m0/uart2m0-xfer";
+ uart2m1_xfer = "/pinctrl/uart2-m1/uart2m1-xfer";
+ uart3m0_xfer = "/pinctrl/uart3-m0/uart3m0-xfer";
+ uart3m0_cts = "/pinctrl/uart3-m0/uart3m0-cts";
+ uart3m0_rts = "/pinctrl/uart3-m0/uart3m0-rts";
+ uart3m0_rts_gpio = "/pinctrl/uart3-m0/uart3m0-rts-gpio";
+ uart3m1_xfer = "/pinctrl/uart3-m1/uart3m1-xfer";
+ uart3m1_cts = "/pinctrl/uart3-m1/uart3m1-cts";
+ uart3m1_rts = "/pinctrl/uart3-m1/uart3m1-rts";
+ uart3m1_rts_gpio = "/pinctrl/uart3-m1/uart3m1-rts-gpio";
+ uart4_xfer = "/pinctrl/uart4/uart4-xfer";
+ uart4_cts = "/pinctrl/uart4/uart4-cts";
+ uart4_rts = "/pinctrl/uart4/uart4-rts";
+ uart5_xfer = "/pinctrl/uart5/uart5-xfer";
+ uart5_cts = "/pinctrl/uart5/uart5-cts";
+ uart5_rts = "/pinctrl/uart5/uart5-rts";
+ spi0_clk = "/pinctrl/spi0/spi0-clk";
+ spi0_csn = "/pinctrl/spi0/spi0-csn";
+ spi0_miso = "/pinctrl/spi0/spi0-miso";
+ spi0_mosi = "/pinctrl/spi0/spi0-mosi";
+ spi0_clk_hs = "/pinctrl/spi0/spi0-clk-hs";
+ spi0_miso_hs = "/pinctrl/spi0/spi0-miso-hs";
+ spi0_mosi_hs = "/pinctrl/spi0/spi0-mosi-hs";
+ spi1_clk = "/pinctrl/spi1/spi1-clk";
+ spi1_csn0 = "/pinctrl/spi1/spi1-csn0";
+ spi1_csn1 = "/pinctrl/spi1/spi1-csn1";
+ spi1_miso = "/pinctrl/spi1/spi1-miso";
+ spi1_mosi = "/pinctrl/spi1/spi1-mosi";
+ spi1_clk_hs = "/pinctrl/spi1/spi1-clk-hs";
+ spi1_miso_hs = "/pinctrl/spi1/spi1-miso-hs";
+ spi1_mosi_hs = "/pinctrl/spi1/spi1-mosi-hs";
+ pdm_clk0m0 = "/pinctrl/pdm/pdm-clk0m0";
+ pdm_clk0m1 = "/pinctrl/pdm/pdm-clk0m1";
+ pdm_clk1 = "/pinctrl/pdm/pdm-clk1";
+ pdm_sdi0m0 = "/pinctrl/pdm/pdm-sdi0m0";
+ pdm_sdi0m1 = "/pinctrl/pdm/pdm-sdi0m1";
+ pdm_sdi1 = "/pinctrl/pdm/pdm-sdi1";
+ pdm_sdi2 = "/pinctrl/pdm/pdm-sdi2";
+ pdm_sdi3 = "/pinctrl/pdm/pdm-sdi3";
+ pdm_clk0m0_sleep = "/pinctrl/pdm/pdm-clk0m0-sleep";
+ pdm_clk0m_sleep1 = "/pinctrl/pdm/pdm-clk0m1-sleep";
+ pdm_clk1_sleep = "/pinctrl/pdm/pdm-clk1-sleep";
+ pdm_sdi0m0_sleep = "/pinctrl/pdm/pdm-sdi0m0-sleep";
+ pdm_sdi0m1_sleep = "/pinctrl/pdm/pdm-sdi0m1-sleep";
+ pdm_sdi1_sleep = "/pinctrl/pdm/pdm-sdi1-sleep";
+ pdm_sdi2_sleep = "/pinctrl/pdm/pdm-sdi2-sleep";
+ pdm_sdi3_sleep = "/pinctrl/pdm/pdm-sdi3-sleep";
+ i2s0_8ch_mclk = "/pinctrl/i2s0/i2s0-8ch-mclk";
+ i2s0_8ch_sclktx = "/pinctrl/i2s0/i2s0-8ch-sclktx";
+ i2s0_8ch_sclkrx = "/pinctrl/i2s0/i2s0-8ch-sclkrx";
+ i2s0_8ch_lrcktx = "/pinctrl/i2s0/i2s0-8ch-lrcktx";
+ i2s0_8ch_lrckrx = "/pinctrl/i2s0/i2s0-8ch-lrckrx";
+ i2s0_8ch_sdo0 = "/pinctrl/i2s0/i2s0-8ch-sdo0";
+ i2s0_8ch_sdo1 = "/pinctrl/i2s0/i2s0-8ch-sdo1";
+ i2s0_8ch_sdo2 = "/pinctrl/i2s0/i2s0-8ch-sdo2";
+ i2s0_8ch_sdo3 = "/pinctrl/i2s0/i2s0-8ch-sdo3";
+ i2s0_8ch_sdi0 = "/pinctrl/i2s0/i2s0-8ch-sdi0";
+ i2s0_8ch_sdi1 = "/pinctrl/i2s0/i2s0-8ch-sdi1";
+ i2s0_8ch_sdi2 = "/pinctrl/i2s0/i2s0-8ch-sdi2";
+ i2s0_8ch_sdi3 = "/pinctrl/i2s0/i2s0-8ch-sdi3";
+ i2s1_2ch_mclk = "/pinctrl/i2s1/i2s1-2ch-mclk";
+ i2s1_2ch_sclk = "/pinctrl/i2s1/i2s1-2ch-sclk";
+ i2s1_2ch_lrck = "/pinctrl/i2s1/i2s1-2ch-lrck";
+ i2s1_2ch_sdi = "/pinctrl/i2s1/i2s1-2ch-sdi";
+ i2s1_2ch_sdo = "/pinctrl/i2s1/i2s1-2ch-sdo";
+ i2s2_2ch_mclk = "/pinctrl/i2s2/i2s2-2ch-mclk";
+ i2s2_2ch_sclk = "/pinctrl/i2s2/i2s2-2ch-sclk";
+ i2s2_2ch_lrck = "/pinctrl/i2s2/i2s2-2ch-lrck";
+ i2s2_2ch_sdi = "/pinctrl/i2s2/i2s2-2ch-sdi";
+ i2s2_2ch_sdo = "/pinctrl/i2s2/i2s2-2ch-sdo";
+ sdmmc_clk = "/pinctrl/sdmmc/sdmmc-clk";
+ sdmmc_cmd = "/pinctrl/sdmmc/sdmmc-cmd";
+ sdmmc_det = "/pinctrl/sdmmc/sdmmc-det";
+ sdmmc_bus1 = "/pinctrl/sdmmc/sdmmc-bus1";
+ sdmmc_bus4 = "/pinctrl/sdmmc/sdmmc-bus4";
+ sdmmc_gpio = "/pinctrl/sdmmc/sdmmc-gpio";
+ sdio_clk = "/pinctrl/sdio/sdio-clk";
+ sdio_cmd = "/pinctrl/sdio/sdio-cmd";
+ sdio_bus4 = "/pinctrl/sdio/sdio-bus4";
+ sdio_gpio = "/pinctrl/sdio/sdio-gpio";
+ emmc_clk = "/pinctrl/emmc/emmc-clk";
+ emmc_cmd = "/pinctrl/emmc/emmc-cmd";
+ emmc_pwren = "/pinctrl/emmc/emmc-pwren";
+ emmc_rstnout = "/pinctrl/emmc/emmc-rstnout";
+ emmc_bus1 = "/pinctrl/emmc/emmc-bus1";
+ emmc_bus4 = "/pinctrl/emmc/emmc-bus4";
+ emmc_bus8 = "/pinctrl/emmc/emmc-bus8";
+ flash_cs0 = "/pinctrl/flash/flash-cs0";
+ flash_rdy = "/pinctrl/flash/flash-rdy";
+ flash_dqs = "/pinctrl/flash/flash-dqs";
+ flash_ale = "/pinctrl/flash/flash-ale";
+ flash_cle = "/pinctrl/flash/flash-cle";
+ flash_wrn = "/pinctrl/flash/flash-wrn";
+ flash_csl = "/pinctrl/flash/flash-csl";
+ flash_rdn = "/pinctrl/flash/flash-rdn";
+ flash_bus8 = "/pinctrl/flash/flash-bus8";
+ lcdc_m0_rgb_pins = "/pinctrl/lcdc/lcdc-m0-rgb-pins";
+ lcdc_m0_sleep_pins = "/pinctrl/lcdc/lcdc-m0-sleep-pins";
+ lcdc_m1_rgb_pins = "/pinctrl/lcdc/lcdc-m1-rgb-pins";
+ lcdc_m1_sleep_pins = "/pinctrl/lcdc/lcdc-m1-sleep-pins";
+ pwm0_pin = "/pinctrl/pwm0/pwm0-pin";
+ pwm1_pin = "/pinctrl/pwm1/pwm1-pin";
+ pwm2_pin = "/pinctrl/pwm2/pwm2-pin";
+ pwm3_pin = "/pinctrl/pwm3/pwm3-pin";
+ pwm4_pin = "/pinctrl/pwm4/pwm4-pin";
+ pwm5_pin = "/pinctrl/pwm5/pwm5-pin";
+ pwm6_pin = "/pinctrl/pwm6/pwm6-pin";
+ pwm7_pin = "/pinctrl/pwm7/pwm7-pin";
+ rmii_pins = "/pinctrl/gmac/rmii-pins";
+ mac_refclk_12ma = "/pinctrl/gmac/mac-refclk-12ma";
+ mac_refclk = "/pinctrl/gmac/mac-refclk";
+ cif_clkout_m0 = "/pinctrl/cif-m0/cif-clkout-m0";
+ dvp_d2d9_m0 = "/pinctrl/cif-m0/dvp-d2d9-m0";
+ dvp_d0d1_m0 = "/pinctrl/cif-m0/dvp-d0d1-m0";
+ dvp_d10d11_m0 = "/pinctrl/cif-m0/d10-d11-m0";
+ cif_clkout_m1 = "/pinctrl/cif-m1/cif-clkout-m1";
+ dvp_d2d9_m1 = "/pinctrl/cif-m1/dvp-d2d9-m1";
+ dvp_d0d1_m1 = "/pinctrl/cif-m1/dvp-d0d1-m1";
+ dvp_d10d11_m1 = "/pinctrl/cif-m1/d10-d11-m1";
+ isp_prelight = "/pinctrl/isp/isp-prelight";
+ pmic_int = "/pinctrl/pmic/pmic_int";
+ soc_slppin_gpio = "/pinctrl/pmic/soc_slppin_gpio";
+ soc_slppin_slp = "/pinctrl/pmic/soc_slppin_slp";
+ soc_slppin_rst = "/pinctrl/pmic/soc_slppin_rst";
+ led_pins = "/pinctrl/leds/led-pins";
+ btn_pins = "/pinctrl/btns/btn-pins";
+ drm_logo = "/reserved-memory/drm-logo@00000000";
+ ramoops_mem = "/reserved-memory/region@110000";
+ gpio_keys = "/odroidgo3-keys";
+ joypad = "/odroidgo3-joypad";
+ leds = "/gpio_leds";
+ backlight = "/backlight";
+ vccsys = "/vccsys";
+ };
+};
diff --git a/config/archr-dts/R36S-DTB/DTS/Panel3.dts b/config/archr-dts/R36S-DTB/DTS/Panel3.dts
new file mode 100644
index 0000000000..6fd4f4e74a
--- /dev/null
+++ b/config/archr-dts/R36S-DTB/DTS/Panel3.dts
@@ -0,0 +1,4063 @@
+/dts-v1/;
+
+/ {
+ compatible = "rockchip,rk3326-odroidgo3-linux\0rockchip,rk3326";
+ interrupt-parent = <0x01>;
+ #address-cells = <0x02>;
+ #size-cells = <0x02>;
+ model = "Game Console R35S/R36S fix by AeolusUX";
+
+ ddr_timing {
+ compatible = "rockchip,ddr-timing";
+ ddr2_speed_bin = <0x00>;
+ ddr3_speed_bin = <0x15>;
+ ddr4_speed_bin = <0x0c>;
+ pd_idle = <0x0d>;
+ sr_idle = <0x5d>;
+ sr_mc_gate_idle = <0x00>;
+ srpd_lite_idle = <0x00>;
+ standby_idle = <0x00>;
+ auto_pd_dis_freq = <0x42a>;
+ auto_sr_dis_freq = <0x320>;
+ ddr2_dll_dis_freq = <0x12c>;
+ ddr3_dll_dis_freq = <0x12c>;
+ ddr4_dll_dis_freq = <0x271>;
+ phy_dll_dis_freq = <0x190>;
+ ddr2_odt_dis_freq = <0x64>;
+ phy_ddr2_odt_dis_freq = <0x64>;
+ ddr2_drv = <0x01>;
+ ddr2_odt = <0x96>;
+ phy_ddr2_ca_drv = <0x15>;
+ phy_ddr2_ck_drv = <0x12>;
+ phy_ddr2_dq_drv = <0x15>;
+ phy_ddr2_odt = <0x02>;
+ ddr3_odt_dis_freq = <0x190>;
+ phy_ddr3_odt_dis_freq = <0x190>;
+ ddr3_drv = <0x28>;
+ ddr3_odt = <0x78>;
+ phy_ddr3_ca_drv = <0x15>;
+ phy_ddr3_ck_drv = <0x12>;
+ phy_ddr3_dq_drv = <0x15>;
+ phy_ddr3_odt = <0x02>;
+ phy_lpddr2_odt_dis_freq = <0x29a>;
+ lpddr2_drv = <0x28>;
+ phy_lpddr2_ca_drv = <0x16>;
+ phy_lpddr2_ck_drv = <0x13>;
+ phy_lpddr2_dq_drv = <0x16>;
+ phy_lpddr2_odt = <0x00>;
+ lpddr3_odt_dis_freq = <0x190>;
+ phy_lpddr3_odt_dis_freq = <0x190>;
+ lpddr3_drv = <0x28>;
+ lpddr3_odt = <0xf0>;
+ phy_lpddr3_ca_drv = <0x16>;
+ phy_lpddr3_ck_drv = <0x13>;
+ phy_lpddr3_dq_drv = <0x16>;
+ phy_lpddr3_odt = <0x02>;
+ lpddr4_odt_dis_freq = <0x320>;
+ phy_lpddr4_odt_dis_freq = <0x320>;
+ lpddr4_drv = <0x3c>;
+ lpddr4_dq_odt = <0x28>;
+ lpddr4_ca_odt = <0x28>;
+ phy_lpddr4_ca_drv = <0x14>;
+ phy_lpddr4_ck_cs_drv = <0x06>;
+ phy_lpddr4_dq_drv = <0x06>;
+ phy_lpddr4_odt = <0x10>;
+ ddr4_odt_dis_freq = <0x29a>;
+ phy_ddr4_odt_dis_freq = <0x29a>;
+ ddr4_drv = <0x22>;
+ ddr4_odt = <0xf0>;
+ phy_ddr4_ca_drv = <0x16>;
+ phy_ddr4_ck_drv = <0x13>;
+ phy_ddr4_dq_drv = <0x16>;
+ phy_ddr4_odt = <0x02>;
+ ddr3a1_ddr4a9_de-skew = <0x06>;
+ ddr3a0_ddr4a10_de-skew = <0x07>;
+ ddr3a3_ddr4a6_de-skew = <0x07>;
+ ddr3a2_ddr4a4_de-skew = <0x07>;
+ ddr3a5_ddr4a8_de-skew = <0x07>;
+ ddr3a4_ddr4a5_de-skew = <0x07>;
+ ddr3a7_ddr4a11_de-skew = <0x07>;
+ ddr3a6_ddr4a7_de-skew = <0x06>;
+ ddr3a9_ddr4a0_de-skew = <0x07>;
+ ddr3a8_ddr4a13_de-skew = <0x07>;
+ ddr3a11_ddr4a3_de-skew = <0x07>;
+ ddr3a10_ddr4cs0_de-skew = <0x07>;
+ ddr3a13_ddr4a2_de-skew = <0x07>;
+ ddr3a12_ddr4ba1_de-skew = <0x07>;
+ ddr3a15_ddr4odt0_de-skew = <0x07>;
+ ddr3a14_ddr4a1_de-skew = <0x07>;
+ ddr3ba1_ddr4a15_de-skew = <0x07>;
+ ddr3ba0_ddr4bg0_de-skew = <0x07>;
+ ddr3ras_ddr4cke_de-skew = <0x07>;
+ ddr3ba2_ddr4ba0_de-skew = <0x07>;
+ ddr3we_ddr4bg1_de-skew = <0x07>;
+ ddr3cas_ddr4a12_de-skew = <0x07>;
+ ddr3ckn_ddr4ckn_de-skew = <0x07>;
+ ddr3ckp_ddr4ckp_de-skew = <0x07>;
+ ddr3cke_ddr4a16_de-skew = <0x07>;
+ ddr3odt0_ddr4a14_de-skew = <0x07>;
+ ddr3cs0_ddr4act_de-skew = <0x06>;
+ ddr3reset_ddr4reset_de-skew = <0x07>;
+ ddr3cs1_ddr4cs1_de-skew = <0x06>;
+ ddr3odt1_ddr4odt1_de-skew = <0x07>;
+ cs0_dm0_rx_de-skew = <0x07>;
+ cs0_dm0_tx_de-skew = <0x07>;
+ cs0_dq0_rx_de-skew = <0x08>;
+ cs0_dq0_tx_de-skew = <0x08>;
+ cs0_dq1_rx_de-skew = <0x09>;
+ cs0_dq1_tx_de-skew = <0x08>;
+ cs0_dq2_rx_de-skew = <0x08>;
+ cs0_dq2_tx_de-skew = <0x08>;
+ cs0_dq3_rx_de-skew = <0x08>;
+ cs0_dq3_tx_de-skew = <0x08>;
+ cs0_dq4_rx_de-skew = <0x09>;
+ cs0_dq4_tx_de-skew = <0x08>;
+ cs0_dq5_rx_de-skew = <0x09>;
+ cs0_dq5_tx_de-skew = <0x08>;
+ cs0_dq6_rx_de-skew = <0x09>;
+ cs0_dq6_tx_de-skew = <0x08>;
+ cs0_dq7_rx_de-skew = <0x08>;
+ cs0_dq7_tx_de-skew = <0x08>;
+ cs0_dqs0_rx_de-skew = <0x06>;
+ cs0_dqs0p_tx_de-skew = <0x09>;
+ cs0_dqs0n_tx_de-skew = <0x09>;
+ cs0_dm1_rx_de-skew = <0x07>;
+ cs0_dm1_tx_de-skew = <0x06>;
+ cs0_dq8_rx_de-skew = <0x08>;
+ cs0_dq8_tx_de-skew = <0x07>;
+ cs0_dq9_rx_de-skew = <0x09>;
+ cs0_dq9_tx_de-skew = <0x07>;
+ cs0_dq10_rx_de-skew = <0x08>;
+ cs0_dq10_tx_de-skew = <0x08>;
+ cs0_dq11_rx_de-skew = <0x08>;
+ cs0_dq11_tx_de-skew = <0x07>;
+ cs0_dq12_rx_de-skew = <0x08>;
+ cs0_dq12_tx_de-skew = <0x08>;
+ cs0_dq13_rx_de-skew = <0x09>;
+ cs0_dq13_tx_de-skew = <0x07>;
+ cs0_dq14_rx_de-skew = <0x09>;
+ cs0_dq14_tx_de-skew = <0x08>;
+ cs0_dq15_rx_de-skew = <0x09>;
+ cs0_dq15_tx_de-skew = <0x07>;
+ cs0_dqs1_rx_de-skew = <0x07>;
+ cs0_dqs1p_tx_de-skew = <0x09>;
+ cs0_dqs1n_tx_de-skew = <0x09>;
+ cs0_dm2_rx_de-skew = <0x07>;
+ cs0_dm2_tx_de-skew = <0x07>;
+ cs0_dq16_rx_de-skew = <0x09>;
+ cs0_dq16_tx_de-skew = <0x09>;
+ cs0_dq17_rx_de-skew = <0x07>;
+ cs0_dq17_tx_de-skew = <0x09>;
+ cs0_dq18_rx_de-skew = <0x07>;
+ cs0_dq18_tx_de-skew = <0x08>;
+ cs0_dq19_rx_de-skew = <0x07>;
+ cs0_dq19_tx_de-skew = <0x09>;
+ cs0_dq20_rx_de-skew = <0x09>;
+ cs0_dq20_tx_de-skew = <0x09>;
+ cs0_dq21_rx_de-skew = <0x09>;
+ cs0_dq21_tx_de-skew = <0x09>;
+ cs0_dq22_rx_de-skew = <0x08>;
+ cs0_dq22_tx_de-skew = <0x09>;
+ cs0_dq23_rx_de-skew = <0x08>;
+ cs0_dq23_tx_de-skew = <0x09>;
+ cs0_dqs2_rx_de-skew = <0x06>;
+ cs0_dqs2p_tx_de-skew = <0x09>;
+ cs0_dqs2n_tx_de-skew = <0x09>;
+ cs0_dm3_rx_de-skew = <0x07>;
+ cs0_dm3_tx_de-skew = <0x07>;
+ cs0_dq24_rx_de-skew = <0x08>;
+ cs0_dq24_tx_de-skew = <0x08>;
+ cs0_dq25_rx_de-skew = <0x09>;
+ cs0_dq25_tx_de-skew = <0x09>;
+ cs0_dq26_rx_de-skew = <0x09>;
+ cs0_dq26_tx_de-skew = <0x08>;
+ cs0_dq27_rx_de-skew = <0x09>;
+ cs0_dq27_tx_de-skew = <0x08>;
+ cs0_dq28_rx_de-skew = <0x09>;
+ cs0_dq28_tx_de-skew = <0x09>;
+ cs0_dq29_rx_de-skew = <0x09>;
+ cs0_dq29_tx_de-skew = <0x09>;
+ cs0_dq30_rx_de-skew = <0x08>;
+ cs0_dq30_tx_de-skew = <0x08>;
+ cs0_dq31_rx_de-skew = <0x08>;
+ cs0_dq31_tx_de-skew = <0x08>;
+ cs0_dqs3_rx_de-skew = <0x07>;
+ cs0_dqs3p_tx_de-skew = <0x09>;
+ cs0_dqs3n_tx_de-skew = <0x09>;
+ cs1_dm0_rx_de-skew = <0x07>;
+ cs1_dm0_tx_de-skew = <0x07>;
+ cs1_dq0_rx_de-skew = <0x08>;
+ cs1_dq0_tx_de-skew = <0x08>;
+ cs1_dq1_rx_de-skew = <0x09>;
+ cs1_dq1_tx_de-skew = <0x08>;
+ cs1_dq2_rx_de-skew = <0x08>;
+ cs1_dq2_tx_de-skew = <0x08>;
+ cs1_dq3_rx_de-skew = <0x08>;
+ cs1_dq3_tx_de-skew = <0x08>;
+ cs1_dq4_rx_de-skew = <0x08>;
+ cs1_dq4_tx_de-skew = <0x08>;
+ cs1_dq5_rx_de-skew = <0x09>;
+ cs1_dq5_tx_de-skew = <0x08>;
+ cs1_dq6_rx_de-skew = <0x09>;
+ cs1_dq6_tx_de-skew = <0x08>;
+ cs1_dq7_rx_de-skew = <0x08>;
+ cs1_dq7_tx_de-skew = <0x08>;
+ cs1_dqs0_rx_de-skew = <0x06>;
+ cs1_dqs0p_tx_de-skew = <0x09>;
+ cs1_dqs0n_tx_de-skew = <0x09>;
+ cs1_dm1_rx_de-skew = <0x07>;
+ cs1_dm1_tx_de-skew = <0x07>;
+ cs1_dq8_rx_de-skew = <0x08>;
+ cs1_dq8_tx_de-skew = <0x08>;
+ cs1_dq9_rx_de-skew = <0x08>;
+ cs1_dq9_tx_de-skew = <0x07>;
+ cs1_dq10_rx_de-skew = <0x07>;
+ cs1_dq10_tx_de-skew = <0x08>;
+ cs1_dq11_rx_de-skew = <0x08>;
+ cs1_dq11_tx_de-skew = <0x08>;
+ cs1_dq12_rx_de-skew = <0x08>;
+ cs1_dq12_tx_de-skew = <0x07>;
+ cs1_dq13_rx_de-skew = <0x08>;
+ cs1_dq13_tx_de-skew = <0x08>;
+ cs1_dq14_rx_de-skew = <0x08>;
+ cs1_dq14_tx_de-skew = <0x08>;
+ cs1_dq15_rx_de-skew = <0x08>;
+ cs1_dq15_tx_de-skew = <0x07>;
+ cs1_dqs1_rx_de-skew = <0x07>;
+ cs1_dqs1p_tx_de-skew = <0x09>;
+ cs1_dqs1n_tx_de-skew = <0x09>;
+ cs1_dm2_rx_de-skew = <0x07>;
+ cs1_dm2_tx_de-skew = <0x08>;
+ cs1_dq16_rx_de-skew = <0x08>;
+ cs1_dq16_tx_de-skew = <0x09>;
+ cs1_dq17_rx_de-skew = <0x08>;
+ cs1_dq17_tx_de-skew = <0x09>;
+ cs1_dq18_rx_de-skew = <0x07>;
+ cs1_dq18_tx_de-skew = <0x08>;
+ cs1_dq19_rx_de-skew = <0x08>;
+ cs1_dq19_tx_de-skew = <0x09>;
+ cs1_dq20_rx_de-skew = <0x09>;
+ cs1_dq20_tx_de-skew = <0x09>;
+ cs1_dq21_rx_de-skew = <0x09>;
+ cs1_dq21_tx_de-skew = <0x09>;
+ cs1_dq22_rx_de-skew = <0x08>;
+ cs1_dq22_tx_de-skew = <0x09>;
+ cs1_dq23_rx_de-skew = <0x08>;
+ cs1_dq23_tx_de-skew = <0x09>;
+ cs1_dqs2_rx_de-skew = <0x06>;
+ cs1_dqs2p_tx_de-skew = <0x09>;
+ cs1_dqs2n_tx_de-skew = <0x09>;
+ cs1_dm3_rx_de-skew = <0x07>;
+ cs1_dm3_tx_de-skew = <0x07>;
+ cs1_dq24_rx_de-skew = <0x08>;
+ cs1_dq24_tx_de-skew = <0x09>;
+ cs1_dq25_rx_de-skew = <0x09>;
+ cs1_dq25_tx_de-skew = <0x09>;
+ cs1_dq26_rx_de-skew = <0x09>;
+ cs1_dq26_tx_de-skew = <0x08>;
+ cs1_dq27_rx_de-skew = <0x08>;
+ cs1_dq27_tx_de-skew = <0x08>;
+ cs1_dq28_rx_de-skew = <0x09>;
+ cs1_dq28_tx_de-skew = <0x09>;
+ cs1_dq29_rx_de-skew = <0x09>;
+ cs1_dq29_tx_de-skew = <0x09>;
+ cs1_dq30_rx_de-skew = <0x09>;
+ cs1_dq30_tx_de-skew = <0x08>;
+ cs1_dq31_rx_de-skew = <0x08>;
+ cs1_dq31_tx_de-skew = <0x08>;
+ cs1_dqs3_rx_de-skew = <0x07>;
+ cs1_dqs3p_tx_de-skew = <0x09>;
+ cs1_dqs3n_tx_de-skew = <0x09>;
+ phandle = <0xaf>;
+ };
+
+ aliases {
+ ethernet0 = "/ethernet@ff360000";
+ i2c0 = "/i2c@ff180000";
+ i2c1 = "/i2c@ff190000";
+ i2c2 = "/i2c@ff1a0000";
+ i2c3 = "/i2c@ff1b0000";
+ serial0 = "/serial@ff030000";
+ serial1 = "/serial@ff158000";
+ serial2 = "/serial@ff160000";
+ serial3 = "/serial@ff168000";
+ serial4 = "/serial@ff170000";
+ serial5 = "/serial@ff178000";
+ spi0 = "/spi@ff1d0000";
+ spi1 = "/spi@ff1d8000";
+ };
+
+ cpus {
+ #address-cells = <0x02>;
+ #size-cells = <0x00>;
+
+ cpu@0 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a35\0arm,armv8";
+ reg = <0x00 0x00>;
+ enable-method = "psci";
+ clocks = <0x02 0x07>;
+ #cooling-cells = <0x02>;
+ dynamic-power-coefficient = <0x5a>;
+ operating-points-v2 = <0x03>;
+ cpu-idle-states = <0x04 0x05>;
+ cpu-supply = <0x06>;
+ phandle = <0x09>;
+ };
+
+ cpu@1 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a35\0arm,armv8";
+ reg = <0x00 0x01>;
+ enable-method = "psci";
+ operating-points-v2 = <0x03>;
+ cpu-idle-states = <0x04 0x05>;
+ phandle = <0x0a>;
+ };
+
+ cpu@2 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a35\0arm,armv8";
+ reg = <0x00 0x02>;
+ enable-method = "psci";
+ operating-points-v2 = <0x03>;
+ cpu-idle-states = <0x04 0x05>;
+ phandle = <0x0b>;
+ };
+
+ cpu@3 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a35\0arm,armv8";
+ reg = <0x00 0x03>;
+ enable-method = "psci";
+ operating-points-v2 = <0x03>;
+ cpu-idle-states = <0x04 0x05>;
+ phandle = <0x0c>;
+ };
+
+ idle-states {
+ entry-method = "psci";
+
+ cpu-sleep {
+ compatible = "arm,idle-state";
+ local-timer-stop;
+ arm,psci-suspend-param = <0x10000>;
+ entry-latency-us = <0x78>;
+ exit-latency-us = <0xfa>;
+ min-residency-us = <0x384>;
+ phandle = <0x04>;
+ };
+
+ cluster-sleep {
+ compatible = "arm,idle-state";
+ local-timer-stop;
+ arm,psci-suspend-param = <0x1010000>;
+ entry-latency-us = <0x190>;
+ exit-latency-us = <0x1f4>;
+ min-residency-us = <0x7d0>;
+ phandle = <0x05>;
+ };
+ };
+ };
+
+ cpu0-opp-table {
+ compatible = "operating-points-v2";
+ opp-shared;
+ rockchip,temp-hysteresis = <0x1388>;
+ rockchip,low-temp = <0x00>;
+ rockchip,low-temp-min-volt = <0xf4240>;
+ rockchip,low-temp-adjust-volt = <0x00 0x5e8 0xc350>;
+ clocks = <0x02 0x01>;
+ rockchip,avs-scale = <0x04>;
+ rockchip,max-volt = <0x149970>;
+ rockchip,evb-irdrop = <0x61a8>;
+ nvmem-cells = <0x07 0x08>;
+ nvmem-cell-names = "cpu_leakage\0performance";
+ rockchip,bin-scaling-sel = <0x00 0x0d 0x01 0x0d>;
+ rockchip,pvtm-voltage-sel = <0x00 0xc350 0x00 0xc351 0xd2f0 0x01 0xd2f1 0xea60 0x02 0xea61 0x1869f 0x03>;
+ rockchip,pvtm-freq = <0x639c0>;
+ rockchip,pvtm-volt = <0xf4240>;
+ rockchip,pvtm-ch = <0x00 0x00>;
+ rockchip,pvtm-sample-time = <0x3e8>;
+ rockchip,pvtm-number = <0x0a>;
+ rockchip,pvtm-error = <0x3e8>;
+ rockchip,pvtm-ref-temp = <0x28>;
+ rockchip,pvtm-temp-prop = <0xffffffc8 0xffffffc8>;
+ rockchip,thermal-zone = "soc-thermal";
+ rockchip,avs = <0x01>;
+ phandle = <0x03>;
+
+ opp-1008000000 {
+ opp-hz = <0x00 0x3c14dc00>;
+ opp-microvolt = <0x11edd8 0x11edd8 0x149970>;
+ opp-microvolt-L0 = <0x11edd8 0x11edd8 0x149970>;
+ opp-microvolt-L1 = <0x112a88 0x112a88 0x149970>;
+ opp-microvolt-L2 = <0x112a88 0x112a88 0x149970>;
+ opp-microvolt-L3 = <0x100590 0x100590 0x149970>;
+ clock-latency-ns = <0x9c40>;
+ };
+
+ opp-1200000000 {
+ opp-hz = <0x00 0x47868c00>;
+ opp-microvolt = <0x13d620 0x13d620 0x149970>;
+ opp-microvolt-L0 = <0x13d620 0x13d620 0x149970>;
+ opp-microvolt-L1 = <0x137478 0x137478 0x149970>;
+ opp-microvolt-L2 = <0x1312d0 0x1312d0 0x149970>;
+ opp-microvolt-L3 = <0x124f80 0x124f80 0x149970>;
+ clock-latency-ns = <0x9c40>;
+ };
+
+ opp-1248000000 {
+ opp-hz = <0x00 0x4a62f800>;
+ opp-microvolt = <0x149970 0x149970 0x149970>;
+ opp-microvolt-L0 = <0x149970 0x149970 0x149970>;
+ opp-microvolt-L1 = <0x13d620 0x13d620 0x149970>;
+ opp-microvolt-L2 = <0x137478 0x137478 0x149970>;
+ opp-microvolt-L3 = <0x12b128 0x12b128 0x149970>;
+ clock-latency-ns = <0x9c40>;
+ };
+
+ opp-1296000000 {
+ opp-hz = <0x00 0x4d3f6400>;
+ opp-microvolt = <0x149970 0x149970 0x149970>;
+ opp-microvolt-L0 = <0x149970 0x149970 0x149970>;
+ opp-microvolt-L1 = <0x149970 0x149970 0x149970>;
+ opp-microvolt-L2 = <0x13d620 0x13d620 0x149970>;
+ opp-microvolt-L3 = <0x1312d0 0x1312d0 0x149970>;
+ clock-latency-ns = <0x9c40>;
+ };
+
+ opp-1512000000 {
+ opp-hz = <0x00 0x5a1f4a00>;
+ opp-microvolt = <0x149970 0x149970 0x149970>;
+ opp-microvolt-L0 = <0x149970 0x149970 0x149970>;
+ opp-microvolt-L1 = <0x149970 0x149970 0x149970>;
+ opp-microvolt-L2 = <0x13d620 0x13d620 0x149970>;
+ opp-microvolt-L3 = <0x1312d0 0x1312d0 0x149970>;
+ clock-latency-ns = <0x9c40>;
+ };
+ };
+
+ arm-pmu {
+ compatible = "arm,cortex-a53-pmu";
+ interrupts = <0x00 0x64 0x04 0x00 0x65 0x04 0x00 0x66 0x04 0x00 0x67 0x04>;
+ interrupt-affinity = <0x09 0x0a 0x0b 0x0c>;
+ };
+
+ bus-soc {
+ compatible = "rockchip,px30-bus";
+ rockchip,busfreq-policy = "autocs";
+ phandle = <0xc4>;
+
+ soc-bus0 {
+ bus-id = <0x00>;
+ timer-us = <0x14>;
+ enable-msk = <0x40f7>;
+ status = "disabled";
+ };
+
+ soc-bus1 {
+ bus-id = <0x01>;
+ timer-us = <0xc8>;
+ enable-msk = <0x40bf>;
+ status = "disabled";
+ };
+
+ soc-bus2 {
+ bus-id = <0x02>;
+ timer-us = <0xc8>;
+ enable-msk = <0x4007>;
+ status = "disabled";
+ };
+ };
+
+ bus-apll {
+ compatible = "rockchip,px30-bus";
+ rockchip,busfreq-policy = "clkfreq";
+ clocks = <0x02 0x01>;
+ clock-names = "bus";
+ operating-points-v2 = <0x0d>;
+ status = "okay";
+ bus-supply = <0x0e>;
+ phandle = <0xc5>;
+ };
+
+ bus-apll-opp-table {
+ compatible = "operating-points-v2";
+ opp-shared;
+ phandle = <0x0d>;
+
+ opp-1512000000 {
+ opp-hz = <0x00 0x5a1f4a00>;
+ opp-microvolt = <0xf4240>;
+ };
+
+ opp-1008000000 {
+ opp-hz = <0x00 0x3c14dc00>;
+ opp-microvolt = <0xe7ef0>;
+ };
+ };
+
+ cpuinfo {
+ compatible = "rockchip,cpuinfo";
+ nvmem-cells = <0x0f>;
+ nvmem-cell-names = "id";
+ };
+
+ display-subsystem {
+ compatible = "rockchip,display-subsystem";
+ ports = <0x10>;
+ status = "okay";
+ logo-memory-region = <0x11>;
+ phandle = <0xc6>;
+
+ route {
+
+ route-lvds {
+ status = "disabled";
+ logo,uboot = "logo.gif";
+ logo,kernel = "logo_kernel.gif";
+ logo,mode = "center";
+ charge_logo,mode = "center";
+ connect = <0x12>;
+ phandle = <0xc7>;
+ };
+
+ route-dsi {
+ status = "okay";
+ logo,uboot = "logo.gif";
+ logo,kernel = "logo_kernel.gif";
+ logo,mode = "center";
+ charge_logo,mode = "center";
+ connect = <0x13>;
+ phandle = <0xc8>;
+ };
+
+ route-rgb {
+ status = "disabled";
+ logo,uboot = "logo.gif";
+ logo,kernel = "logo_kernel.gif";
+ logo,mode = "center";
+ charge_logo,mode = "center";
+ connect = <0x14>;
+ phandle = <0xc9>;
+ };
+ };
+ };
+
+ firmware {
+
+ optee {
+ compatible = "linaro,optee-tz";
+ method = "smc";
+ };
+ };
+
+ external-gmac-clock {
+ compatible = "fixed-clock";
+ clock-frequency = <0x2faf080>;
+ clock-output-names = "gmac_clkin";
+ #clock-cells = <0x00>;
+ phandle = <0xca>;
+ };
+
+ psci {
+ compatible = "arm,psci-1.0";
+ method = "smc";
+ };
+
+ rockchip-suspend {
+ compatible = "rockchip,pm-px30";
+ status = "okay";
+ rockchip,sleep-debug-en = <0x01>;
+ rockchip,sleep-mode-config = <0x20702>;
+ rockchip,wakeup-config = <0x85>;
+ phandle = <0xcb>;
+ };
+
+ timer {
+ compatible = "arm,armv8-timer";
+ interrupts = <0x01 0x0d 0xf04 0x01 0x0e 0xf04 0x01 0x0b 0xf04 0x01 0x0a 0xf04>;
+ };
+
+ xin24m {
+ compatible = "fixed-clock";
+ #clock-cells = <0x00>;
+ clock-frequency = <0x16e3600>;
+ clock-output-names = "xin24m";
+ phandle = <0xcc>;
+ };
+
+ xin32k {
+ compatible = "fixed-clock";
+ #clock-cells = <0x00>;
+ clock-frequency = <0x8000>;
+ clock-output-names = "xin32k";
+ phandle = <0xcd>;
+ };
+
+ power-management@ff000000 {
+ compatible = "rockchip,px30-pmu\0syscon\0simple-mfd";
+ reg = <0x00 0xff000000 0x00 0x1000>;
+ phandle = <0xce>;
+
+ power-controller {
+ compatible = "rockchip,px30-power-controller";
+ #power-domain-cells = <0x01>;
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+ phandle = <0x8a>;
+
+ pd_usb@5 {
+ reg = <0x05>;
+ clocks = <0x02 0x103 0x02 0x102 0x02 0x3c>;
+ pm_qos = <0x15 0x16>;
+ };
+
+ pd_sdcard@7 {
+ reg = <0x07>;
+ clocks = <0x02 0xf7 0x02 0x3b>;
+ pm_qos = <0x17>;
+ };
+
+ pd_gmac@9 {
+ reg = <0x09>;
+ clocks = <0x02 0xb2 0x02 0x143 0x02 0x40 0x02 0x3f>;
+ pm_qos = <0x18>;
+ };
+
+ pd_mmc_nand@10 {
+ reg = <0x0a>;
+ clocks = <0x02 0xfe 0x02 0x100 0x02 0xff 0x02 0x101 0x02 0x39 0x02 0x37 0x02 0x38 0x02 0x3a>;
+ pm_qos = <0x19 0x1a 0x1b 0x1c>;
+ };
+
+ pd_vpu@11 {
+ reg = <0x0b>;
+ clocks = <0x02 0xaf 0x02 0xf4 0x02 0x4b>;
+ pm_qos = <0x1d 0x1e>;
+ };
+
+ pd_vo@12 {
+ reg = <0x0c>;
+ clocks = <0x02 0xb7 0x02 0xb5 0x02 0xb6 0x02 0x96 0x02 0x97 0x02 0xfd 0x02 0xfb 0x02 0xfc 0x02 0x144 0x02 0x35 0x02 0x36>;
+ pm_qos = <0x1f 0x20 0x21 0x22>;
+ };
+
+ pd_vi@13 {
+ reg = <0x0d>;
+ clocks = <0x02 0xb3 0x02 0xb4 0x02 0xf9 0x02 0xfa 0x02 0x33>;
+ pm_qos = <0x23 0x24 0x25 0x26 0x27>;
+ };
+
+ pd_gpu@14 {
+ reg = <0x0e>;
+ clocks = <0x02 0x49>;
+ pm_qos = <0x28>;
+ };
+ };
+ };
+
+ syscon@ff010000 {
+ compatible = "rockchip,px30-pmugrf\0syscon\0simple-mfd";
+ reg = <0x00 0xff010000 0x00 0x1000>;
+ #address-cells = <0x01>;
+ #size-cells = <0x01>;
+ phandle = <0xac>;
+
+ io-domains {
+ compatible = "rockchip,px30-pmu-io-voltage-domain";
+ status = "okay";
+ pmuio1-supply = <0x29>;
+ pmuio2-supply = <0x29>;
+ phandle = <0xcf>;
+ };
+
+ reboot-mode {
+ compatible = "syscon-reboot-mode";
+ offset = <0x200>;
+ mode-bootloader = <0x5242c301>;
+ mode-charge = <0x5242c30b>;
+ mode-fastboot = <0x5242c309>;
+ mode-loader = <0x5242c301>;
+ mode-normal = <0x5242c300>;
+ mode-recovery = <0x5242c303>;
+ mode-ums = <0x5242c30c>;
+ };
+
+ pmu-pvtm {
+ compatible = "rockchip,px30-pmu-pvtm";
+ clocks = <0x2a 0x07>;
+ clock-names = "pmu";
+ status = "okay";
+ phandle = <0xd0>;
+ };
+ };
+
+ serial@ff030000 {
+ compatible = "rockchip,px30-uart\0snps,dw-apb-uart";
+ reg = <0x00 0xff030000 0x00 0x100>;
+ interrupts = <0x00 0x0f 0x04>;
+ clocks = <0x2a 0x06 0x2a 0x15>;
+ clock-names = "baudclk\0apb_pclk";
+ reg-shift = <0x02>;
+ reg-io-width = <0x04>;
+ dmas = <0x2b 0x00 0x2b 0x01>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x2c 0x2d 0x2e>;
+ status = "disabled";
+ phandle = <0xd1>;
+ };
+
+ i2s@ff060000 {
+ compatible = "rockchip,px30-i2s-tdm";
+ reg = <0x00 0xff060000 0x00 0x1000>;
+ interrupts = <0x00 0x0c 0x04>;
+ clocks = <0x02 0x10 0x02 0x12 0x02 0x106>;
+ clock-names = "mclk_tx\0mclk_rx\0hclk";
+ dmas = <0x2b 0x10 0x2b 0x11>;
+ dma-names = "tx\0rx";
+ resets = <0x02 0x84 0x02 0xbf>;
+ reset-names = "tx-m\0rx-m";
+ rockchip,cru = <0x02>;
+ rockchip,grf = <0x2f>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x30 0x31 0x32 0x33 0x34 0x35 0x36 0x37 0x38 0x39 0x3a 0x3b>;
+ status = "disabled";
+ phandle = <0xd2>;
+ };
+
+ i2s@ff070000 {
+ compatible = "rockchip,px30-i2s\0rockchip,rk3066-i2s";
+ reg = <0x00 0xff070000 0x00 0x1000>;
+ interrupts = <0x00 0x0d 0x04>;
+ clocks = <0x02 0x14 0x02 0x107>;
+ clock-names = "i2s_clk\0i2s_hclk";
+ dmas = <0x2b 0x12 0x2b 0x13>;
+ dma-names = "tx\0rx";
+ resets = <0x02 0x86 0x02 0x85>;
+ reset-names = "reset-m\0reset-h";
+ pinctrl-names = "default";
+ pinctrl-0 = <0x3c 0x3d 0x3e 0x3f>;
+ status = "okay";
+ #sound-dai-cells = <0x00>;
+ phandle = <0xc2>;
+ };
+
+ i2s@ff080000 {
+ compatible = "rockchip,px30-i2s\0rockchip,rk3066-i2s";
+ reg = <0x00 0xff080000 0x00 0x1000>;
+ interrupts = <0x00 0x0e 0x04>;
+ clocks = <0x02 0x16 0x02 0x108>;
+ clock-names = "i2s_clk\0i2s_hclk";
+ dmas = <0x2b 0x14 0x2b 0x15>;
+ dma-names = "tx\0rx";
+ resets = <0x02 0x88 0x02 0x87>;
+ reset-names = "reset-m\0reset-h";
+ pinctrl-names = "default";
+ pinctrl-0 = <0x40 0x41 0x42 0x43>;
+ status = "disabled";
+ phandle = <0xd3>;
+ };
+
+ pdm@ff0a0000 {
+ compatible = "rockchip,px30-pdm\0rockchip,pdm";
+ reg = <0x00 0xff0a0000 0x00 0x1000>;
+ clocks = <0x02 0x0f 0x02 0x105>;
+ clock-names = "pdm_clk\0pdm_hclk";
+ dmas = <0x2b 0x18>;
+ dma-names = "rx";
+ resets = <0x02 0x82>;
+ reset-names = "pdm-m";
+ pinctrl-names = "default";
+ pinctrl-0 = <0x44 0x45 0x46 0x47 0x48 0x49>;
+ status = "disabled";
+ phandle = <0xd4>;
+ };
+
+ crypto@ff0b0000 {
+ compatible = "rockchip,px30-crypto";
+ reg = <0x00 0xff0b0000 0x00 0x4000>;
+ interrupts = <0x00 0x52 0x04>;
+ clocks = <0x02 0xac 0x02 0xf1 0x02 0x30 0x02 0x31>;
+ clock-names = "aclk\0hclk\0sclk\0apb_pclk";
+ resets = <0x02 0x74>;
+ reset-names = "crypto-rst";
+ status = "disabled";
+ phandle = <0xd5>;
+ };
+
+ rng@ff0b0000 {
+ compatible = "rockchip,cryptov2-rng";
+ reg = <0x00 0xff0b0000 0x00 0x4000>;
+ clocks = <0x02 0x30 0x02 0x31 0x02 0xac 0x02 0xf1>;
+ clock-names = "clk_crypto\0clk_crypto_apk\0aclk_crypto\0hclk_crypto";
+ assigned-clocks = <0x02 0x30 0x02 0x31 0x02 0xac 0x02 0xf1>;
+ assigned-clock-rates = <0x8f0d180 0x8f0d180 0xbebc200 0x5f5e100>;
+ resets = <0x02 0x74>;
+ reset-names = "reset";
+ status = "okay";
+ phandle = <0xd6>;
+ };
+
+ interrupt-controller@ff131000 {
+ compatible = "arm,gic-400";
+ #interrupt-cells = <0x03>;
+ #address-cells = <0x00>;
+ interrupt-controller;
+ reg = <0x00 0xff131000 0x00 0x1000 0x00 0xff132000 0x00 0x2000 0x00 0xff134000 0x00 0x2000 0x00 0xff136000 0x00 0x2000>;
+ interrupts = <0x01 0x09 0xf04>;
+ phandle = <0x01>;
+ };
+
+ syscon@ff140000 {
+ compatible = "rockchip,px30-grf\0syscon\0simple-mfd";
+ reg = <0x00 0xff140000 0x00 0x1000>;
+ #address-cells = <0x01>;
+ #size-cells = <0x01>;
+ phandle = <0x2f>;
+
+ io-domains {
+ compatible = "rockchip,px30-io-voltage-domain";
+ status = "okay";
+ vccio1-supply = <0x4a>;
+ vccio2-supply = <0x4a>;
+ vccio3-supply = <0x4b>;
+ vccio4-supply = <0x4b>;
+ vccio5-supply = <0x4b>;
+ vccio6-supply = <0x4b>;
+ phandle = <0xd7>;
+ };
+
+ lvds {
+ compatible = "rockchip,px30-lvds";
+ phys = <0x4c>;
+ phy-names = "phy";
+ status = "disabled";
+ phandle = <0xd8>;
+
+ ports {
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+
+ port@0 {
+ reg = <0x00>;
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+
+ endpoint@0 {
+ reg = <0x00>;
+ remote-endpoint = <0x12>;
+ phandle = <0xa2>;
+ };
+ };
+ };
+ };
+
+ rgb {
+ compatible = "rockchip,px30-rgb";
+ pinctrl-names = "default\0sleep";
+ pinctrl-0 = <0x4d>;
+ pinctrl-1 = <0x4e>;
+ status = "disabled";
+ phys = <0x4c>;
+ phy-names = "phy";
+ phandle = <0xd9>;
+
+ ports {
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+
+ port@0 {
+ reg = <0x00>;
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+
+ endpoint@0 {
+ reg = <0x00>;
+ remote-endpoint = <0x14>;
+ phandle = <0xa4>;
+ };
+ };
+ };
+ };
+ };
+
+ syscon@ff148000 {
+ compatible = "syscon\0simple-mfd";
+ reg = <0x00 0xff148000 0x00 0x1000>;
+ #address-cells = <0x01>;
+ #size-cells = <0x01>;
+ phandle = <0xda>;
+
+ pvtm {
+ compatible = "rockchip,px30-pvtm";
+ clocks = <0x02 0x4a>;
+ clock-names = "core";
+ status = "okay";
+ phandle = <0xdb>;
+ };
+ };
+
+ serial@ff158000 {
+ compatible = "rockchip,px30-uart\0snps,dw-apb-uart";
+ reg = <0x00 0xff158000 0x00 0x100>;
+ interrupts = <0x00 0x10 0x04>;
+ clocks = <0x02 0x18 0x02 0x149>;
+ clock-names = "baudclk\0apb_pclk";
+ reg-shift = <0x02>;
+ reg-io-width = <0x04>;
+ dmas = <0x2b 0x02 0x2b 0x03>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x4f 0x50>;
+ status = "okay";
+ phandle = <0xdc>;
+ };
+
+ serial@ff160000 {
+ compatible = "rockchip,px30-uart\0snps,dw-apb-uart";
+ reg = <0x00 0xff160000 0x00 0x100>;
+ interrupts = <0x00 0x11 0x04>;
+ clocks = <0x02 0x19 0x02 0x14a>;
+ clock-names = "baudclk\0apb_pclk";
+ reg-shift = <0x02>;
+ reg-io-width = <0x04>;
+ dmas = <0x2b 0x04 0x2b 0x05>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x51>;
+ status = "disabled";
+ phandle = <0xdd>;
+ };
+
+ serial@ff168000 {
+ compatible = "rockchip,px30-uart\0snps,dw-apb-uart";
+ reg = <0x00 0xff168000 0x00 0x100>;
+ interrupts = <0x00 0x12 0x04>;
+ clocks = <0x02 0x1a 0x02 0x14b>;
+ clock-names = "baudclk\0apb_pclk";
+ reg-shift = <0x02>;
+ reg-io-width = <0x04>;
+ dmas = <0x2b 0x06 0x2b 0x07>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x52 0x53 0x54>;
+ status = "disabled";
+ phandle = <0xde>;
+ };
+
+ serial@ff170000 {
+ compatible = "rockchip,px30-uart\0snps,dw-apb-uart";
+ reg = <0x00 0xff170000 0x00 0x100>;
+ interrupts = <0x00 0x13 0x04>;
+ clocks = <0x02 0x1b 0x02 0x14c>;
+ clock-names = "baudclk\0apb_pclk";
+ reg-shift = <0x02>;
+ reg-io-width = <0x04>;
+ dmas = <0x2b 0x08 0x2b 0x09>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x55 0x56 0x57>;
+ status = "disabled";
+ phandle = <0xdf>;
+ };
+
+ serial@ff178000 {
+ compatible = "rockchip,px30-uart\0snps,dw-apb-uart";
+ reg = <0x00 0xff178000 0x00 0x100>;
+ interrupts = <0x00 0x14 0x04>;
+ clocks = <0x02 0x1c 0x02 0x14d>;
+ clock-names = "baudclk\0apb_pclk";
+ reg-shift = <0x02>;
+ reg-io-width = <0x04>;
+ dmas = <0x2b 0x0a 0x2b 0x0b>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x58 0x59 0x5a>;
+ status = "disabled";
+ phandle = <0xe0>;
+ };
+
+ i2c@ff180000 {
+ compatible = "rockchip,rk3399-i2c";
+ reg = <0x00 0xff180000 0x00 0x1000>;
+ clocks = <0x02 0x1d 0x02 0x14e>;
+ clock-names = "i2c\0pclk";
+ interrupts = <0x00 0x07 0x04>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x5b>;
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+ status = "okay";
+ clock-frequency = <0x61a80>;
+ i2c-scl-rising-time-ns = <0x118>;
+ i2c-scl-falling-time-ns = <0x10>;
+ phandle = <0xe1>;
+
+ pmic@20 {
+ compatible = "rockchip,rk817";
+ reg = <0x20>;
+ interrupt-parent = <0x5c>;
+ interrupts = <0x0a 0x08>;
+ pinctrl-names = "default\0pmic-sleep\0pmic-power-off\0pmic-reset";
+ pinctrl-0 = <0x5d>;
+ pinctrl-1 = <0x5e 0x5f>;
+ pinctrl-2 = <0x60 0x61>;
+ pinctrl-3 = <0x62 0x63>;
+ rockchip,system-power-controller;
+ wakeup-source;
+ #clock-cells = <0x01>;
+ clock-output-names = "rk808-clkout1\0rk808-clkout2";
+ pmic-reset-func = <0x01>;
+ vcc1-supply = <0x64>;
+ vcc2-supply = <0x64>;
+ vcc3-supply = <0x64>;
+ vcc4-supply = <0x64>;
+ vcc5-supply = <0x64>;
+ vcc6-supply = <0x64>;
+ vcc7-supply = <0x64>;
+ vcc8-supply = <0x64>;
+ vcc9-supply = <0x65>;
+ phandle = <0xe2>;
+
+ pwrkey {
+ status = "okay";
+ };
+
+ pinctrl_rk8xx {
+ gpio-controller;
+ #gpio-cells = <0x02>;
+ phandle = <0xe3>;
+
+ rk817_ts_gpio1 {
+ pins = "gpio_ts";
+ function = "pin_fun1";
+ phandle = <0xe4>;
+ };
+
+ rk817_gt_gpio2 {
+ pins = "gpio_gt";
+ function = "pin_fun1";
+ phandle = <0xe5>;
+ };
+
+ rk817_pin_ts {
+ pins = "gpio_ts";
+ function = "pin_fun0";
+ phandle = <0xe6>;
+ };
+
+ rk817_pin_gt {
+ pins = "gpio_gt";
+ function = "pin_fun0";
+ phandle = <0xe7>;
+ };
+
+ rk817_slppin_null {
+ pins = "gpio_slp";
+ function = "pin_fun0";
+ phandle = <0xe8>;
+ };
+
+ rk817_slppin_slp {
+ pins = "gpio_slp";
+ function = "pin_fun1";
+ phandle = <0x5f>;
+ };
+
+ rk817_slppin_pwrdn {
+ pins = "gpio_slp";
+ function = "pin_fun2";
+ phandle = <0x61>;
+ };
+
+ rk817_slppin_rst {
+ pins = "gpio_slp";
+ function = "pin_fun3";
+ phandle = <0x63>;
+ };
+ };
+
+ regulators {
+
+ DCDC_REG1 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <0xe7ef0>;
+ regulator-max-microvolt = <0x118c30>;
+ regulator-ramp-delay = <0x1771>;
+ regulator-initial-mode = <0x02>;
+ regulator-name = "vdd_logic";
+ phandle = <0x0e>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <0xe7ef0>;
+ };
+ };
+
+ DCDC_REG2 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <0xe7ef0>;
+ regulator-max-microvolt = <0x149970>;
+ regulator-ramp-delay = <0x1771>;
+ regulator-initial-mode = <0x02>;
+ regulator-name = "vdd_arm";
+ phandle = <0x06>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <0xe7ef0>;
+ };
+ };
+
+ DCDC_REG3 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-initial-mode = <0x02>;
+ regulator-name = "vcc_ddr";
+ phandle = <0xe9>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ };
+ };
+
+ DCDC_REG4 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <0x325aa0>;
+ regulator-max-microvolt = <0x325aa0>;
+ regulator-initial-mode = <0x02>;
+ regulator-name = "vcc_3v3";
+ phandle = <0x4b>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <0x325aa0>;
+ };
+ };
+
+ LDO_REG1 {
+ regulator-min-microvolt = <0xf4240>;
+ regulator-max-microvolt = <0xf4240>;
+ regulator-name = "vcc_1v0";
+ phandle = <0xea>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <0xf4240>;
+ };
+ };
+
+ LDO_REG2 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <0x1b7740>;
+ regulator-max-microvolt = <0x1b7740>;
+ regulator-name = "vcc1v8_soc";
+ phandle = <0x88>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <0x1b7740>;
+ };
+ };
+
+ LDO_REG3 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <0xf4240>;
+ regulator-max-microvolt = <0xf4240>;
+ regulator-name = "vcc1v0_soc";
+ phandle = <0xeb>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <0xf4240>;
+ };
+ };
+
+ LDO_REG4 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <0x325aa0>;
+ regulator-max-microvolt = <0x325aa0>;
+ regulator-name = "vcc3v3_pmu";
+ phandle = <0x29>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <0x325aa0>;
+ };
+ };
+
+ LDO_REG5 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <0x1b7740>;
+ regulator-max-microvolt = <0x1b7740>;
+ regulator-name = "vccio_sd";
+ phandle = <0x4a>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <0x1b7740>;
+ };
+ };
+
+ LDO_REG6 {
+ regulator-min-microvolt = <0x1b7740>;
+ regulator-max-microvolt = <0x2dc6c0>;
+ regulator-boot-on;
+ regulator-name = "vcc_sd";
+ phandle = <0x93>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <0x2dc6c0>;
+ };
+ };
+
+ LDO_REG7 {
+ regulator-min-microvolt = <0x325aa0>;
+ regulator-max-microvolt = <0x325aa0>;
+ regulator-name = "vcc_backlight";
+ phandle = <0x9e>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <0x325aa0>;
+ };
+ };
+
+ LDO_REG8 {
+ regulator-min-microvolt = <0x2ab980>;
+ regulator-max-microvolt = <0x2ab980>;
+ regulator-name = "vcc_lcd";
+ phandle = <0x9f>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <0x2ab980>;
+ };
+ };
+
+ BOOST {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <0x4c4b40>;
+ regulator-max-microvolt = <0x5265c0>;
+ regulator-name = "boost";
+ phandle = <0x65>;
+ };
+
+ OTG_SWITCH {
+ regulator-boot-on;
+ regulator-name = "otg_switch";
+ phandle = <0xec>;
+ };
+ };
+
+ battery {
+ compatible = "rk817,battery";
+ ocv_table = <0xc5d 0xc94 0xcd0 0xd02 0xd34 0xd66 0xd98 0xdca 0xdfc 0xe2e 0xe56 0xe7e 0xea6 0xece 0xef6 0xf1e 0xf46 0xf6e 0xf96 0xf9b 0xfa0>;
+ design_capacity = <0xd34>;
+ design_qmax = <0xe86>;
+ bat_res = <0x64>;
+ sleep_enter_current = <0x12c>;
+ sleep_exit_current = <0x12c>;
+ sleep_filter_current = <0x64>;
+ power_off_thresd = <0xbb8>;
+ zero_algorithm_vol = <0xf0a>;
+ max_soc_offset = <0x3c>;
+ monitor_sec = <0x05>;
+ virtual_power = <0x00>;
+ sample_res = <0x0a>;
+ };
+
+ charger {
+ compatible = "rk817,charger";
+ min_input_voltage = <0x1194>;
+ max_input_current = <0x5dc>;
+ max_chrg_current = <0x7d0>;
+ max_chrg_voltage = <0x1068>;
+ chrg_term_mode = <0x00>;
+ chrg_finish_cur = <0x34>;
+ virtual_power = <0x00>;
+ sample_res = <0x0a>;
+ dc_det_gpio = <0x5c 0x0b 0x00>;
+ bat_low_gpio = <0x66 0x0d 0x00>;
+ extcon = <0x67>;
+ };
+
+ codec {
+ #sound-dai-cells = <0x00>;
+ compatible = "rockchip,rk817-codec";
+ clocks = <0x02 0x15>;
+ clock-names = "mclk";
+ pinctrl-names = "default";
+ pinctrl-0 = <0x68>;
+ hp-volume = <0x14>;
+ spk-volume = <0x03>;
+ status = "okay";
+ phandle = <0xc3>;
+ };
+ };
+ };
+
+ i2c@ff190000 {
+ compatible = "rockchip,rk3399-i2c";
+ reg = <0x00 0xff190000 0x00 0x1000>;
+ clocks = <0x02 0x1e 0x02 0x14f>;
+ clock-names = "i2c\0pclk";
+ interrupts = <0x00 0x08 0x04>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x69>;
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+ status = "okay";
+ clock-frequency = <0x61a80>;
+ phandle = <0xed>;
+ };
+
+ i2c@ff1a0000 {
+ compatible = "rockchip,rk3399-i2c";
+ reg = <0x00 0xff1a0000 0x00 0x1000>;
+ clocks = <0x02 0x1f 0x02 0x150>;
+ clock-names = "i2c\0pclk";
+ interrupts = <0x00 0x09 0x04>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x6a>;
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+ status = "disabled";
+ phandle = <0xee>;
+ };
+
+ i2c@ff1b0000 {
+ compatible = "rockchip,rk3399-i2c";
+ reg = <0x00 0xff1b0000 0x00 0x1000>;
+ clocks = <0x02 0x20 0x02 0x151>;
+ clock-names = "i2c\0pclk";
+ interrupts = <0x00 0x0a 0x04>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x6b>;
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+ status = "disabled";
+ phandle = <0xef>;
+ };
+
+ spi@ff1d0000 {
+ compatible = "rockchip,px30-spi\0rockchip,rk3066-spi";
+ reg = <0x00 0xff1d0000 0x00 0x1000>;
+ interrupts = <0x00 0x1a 0x04>;
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+ clocks = <0x02 0x24 0x02 0x155>;
+ clock-names = "spiclk\0apb_pclk";
+ dmas = <0x2b 0x0c 0x2b 0x0d>;
+ dma-names = "tx\0rx";
+ pinctrl-names = "default\0high_speed";
+ pinctrl-0 = <0x6c 0x6d 0x6e 0x6f>;
+ pinctrl-1 = <0x70 0x6d 0x71 0x72>;
+ status = "disabled";
+ phandle = <0xf0>;
+ };
+
+ spi@ff1d8000 {
+ compatible = "rockchip,px30-spi\0rockchip,rk3066-spi";
+ reg = <0x00 0xff1d8000 0x00 0x1000>;
+ interrupts = <0x00 0x1b 0x04>;
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+ clocks = <0x02 0x25 0x02 0x156>;
+ clock-names = "spiclk\0apb_pclk";
+ dmas = <0x2b 0x0e 0x2b 0x0f>;
+ dma-names = "tx\0rx";
+ pinctrl-names = "default\0high_speed";
+ pinctrl-0 = <0x73 0x74 0x75 0x76 0x77>;
+ pinctrl-1 = <0x78 0x74 0x75 0x79 0x7a>;
+ status = "disabled";
+ phandle = <0xf1>;
+ };
+
+ watchdog@ff1e0000 {
+ compatible = "snps,dw-wdt";
+ reg = <0x00 0xff1e0000 0x00 0x100>;
+ clocks = <0x02 0x15b>;
+ interrupts = <0x00 0x25 0x04>;
+ resets = <0x02 0xb5>;
+ reset-names = "reset";
+ status = "disabled";
+ phandle = <0xf2>;
+ };
+
+ pwm@ff200000 {
+ compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm";
+ reg = <0x00 0xff200000 0x00 0x10>;
+ #pwm-cells = <0x03>;
+ pinctrl-names = "active";
+ pinctrl-0 = <0x7b>;
+ clocks = <0x02 0x22 0x02 0x153>;
+ clock-names = "pwm\0pclk";
+ status = "okay";
+ phandle = <0xbc>;
+ };
+
+ pwm@ff200010 {
+ compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm";
+ reg = <0x00 0xff200010 0x00 0x10>;
+ #pwm-cells = <0x03>;
+ pinctrl-names = "active";
+ pinctrl-0 = <0x7c>;
+ clocks = <0x02 0x22 0x02 0x153>;
+ clock-names = "pwm\0pclk";
+ status = "okay";
+ phandle = <0xc1>;
+ };
+
+ pwm@ff200020 {
+ compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm";
+ reg = <0x00 0xff200020 0x00 0x10>;
+ #pwm-cells = <0x03>;
+ pinctrl-names = "active";
+ pinctrl-0 = <0x7d>;
+ clocks = <0x02 0x22 0x02 0x153>;
+ clock-names = "pwm\0pclk";
+ status = "disabled";
+ phandle = <0xf3>;
+ };
+
+ pwm@ff200030 {
+ compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm";
+ reg = <0x00 0xff200030 0x00 0x10>;
+ #pwm-cells = <0x03>;
+ pinctrl-names = "active";
+ pinctrl-0 = <0x7e>;
+ clocks = <0x02 0x22 0x02 0x153>;
+ clock-names = "pwm\0pclk";
+ status = "disabled";
+ phandle = <0xf4>;
+ };
+
+ pwm@ff208000 {
+ compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm";
+ reg = <0x00 0xff208000 0x00 0x10>;
+ #pwm-cells = <0x03>;
+ pinctrl-names = "active";
+ pinctrl-0 = <0x7f>;
+ clocks = <0x02 0x23 0x02 0x154>;
+ clock-names = "pwm\0pclk";
+ status = "disabled";
+ phandle = <0xf5>;
+ };
+
+ pwm@ff208010 {
+ compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm";
+ reg = <0x00 0xff208010 0x00 0x10>;
+ #pwm-cells = <0x03>;
+ pinctrl-names = "active";
+ pinctrl-0 = <0x80>;
+ clocks = <0x02 0x23 0x02 0x154>;
+ clock-names = "pwm\0pclk";
+ status = "disabled";
+ phandle = <0xf6>;
+ };
+
+ pwm@ff208020 {
+ compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm";
+ reg = <0x00 0xff208020 0x00 0x10>;
+ #pwm-cells = <0x03>;
+ pinctrl-names = "active";
+ pinctrl-0 = <0x81>;
+ clocks = <0x02 0x23 0x02 0x154>;
+ clock-names = "pwm\0pclk";
+ status = "disabled";
+ phandle = <0xf7>;
+ };
+
+ pwm@ff208030 {
+ compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm";
+ reg = <0x00 0xff208030 0x00 0x10>;
+ #pwm-cells = <0x03>;
+ pinctrl-names = "active";
+ pinctrl-0 = <0x82>;
+ clocks = <0x02 0x23 0x02 0x154>;
+ clock-names = "pwm\0pclk";
+ status = "disabled";
+ phandle = <0xf8>;
+ };
+
+ rktimer@ff210000 {
+ compatible = "rockchip,rk3288-timer";
+ reg = <0x00 0xff210000 0x00 0x1000>;
+ interrupts = <0x00 0x1e 0x04>;
+ clocks = <0x02 0x159 0x02 0x26>;
+ clock-names = "pclk\0timer";
+ phandle = <0xf9>;
+ };
+
+ amba {
+ compatible = "simple-bus";
+ #address-cells = <0x02>;
+ #size-cells = <0x02>;
+ ranges;
+
+ dmac@ff240000 {
+ compatible = "arm,pl330\0arm,primecell";
+ reg = <0x00 0xff240000 0x00 0x4000>;
+ interrupts = <0x00 0x01 0x04 0x00 0x02 0x04>;
+ clocks = <0x02 0xbb>;
+ clock-names = "apb_pclk";
+ #dma-cells = <0x01>;
+ peripherals-req-type-burst;
+ phandle = <0x2b>;
+ };
+ };
+
+ thermal-zones {
+ phandle = <0xfa>;
+
+ soc-thermal {
+ polling-delay-passive = <0x14>;
+ polling-delay = <0x3e8>;
+ sustainable-power = <0x2ee>;
+ thermal-sensors = <0x83 0x00>;
+ phandle = <0xfb>;
+
+ trips {
+
+ trip-point-0 {
+ temperature = <0x11170>;
+ hysteresis = <0x7d0>;
+ type = "passive";
+ phandle = <0xfc>;
+ };
+
+ trip-point-1 {
+ temperature = <0x14c08>;
+ hysteresis = <0x7d0>;
+ type = "passive";
+ phandle = <0x84>;
+ };
+
+ soc-crit {
+ temperature = <0x1c138>;
+ hysteresis = <0x7d0>;
+ type = "critical";
+ phandle = <0xfd>;
+ };
+ };
+
+ cooling-maps {
+
+ map0 {
+ trip = <0x84>;
+ cooling-device = <0x09 0xffffffff 0xffffffff>;
+ contribution = <0x1000>;
+ };
+
+ map1 {
+ trip = <0x84>;
+ cooling-device = <0x85 0xffffffff 0xffffffff>;
+ contribution = <0x1000>;
+ };
+ };
+ };
+
+ gpu-thermal {
+ polling-delay-passive = <0x64>;
+ polling-delay = <0x3e8>;
+ thermal-sensors = <0x83 0x01>;
+ phandle = <0xfe>;
+ };
+ };
+
+ tsadc@ff280000 {
+ compatible = "rockchip,px30-tsadc";
+ reg = <0x00 0xff280000 0x00 0x100>;
+ interrupts = <0x00 0x24 0x04>;
+ rockchip,grf = <0x2f>;
+ clocks = <0x02 0x2c 0x02 0x158>;
+ clock-names = "tsadc\0apb_pclk";
+ assigned-clocks = <0x02 0x2c>;
+ assigned-clock-rates = <0xc350>;
+ resets = <0x02 0xa8>;
+ reset-names = "tsadc-apb";
+ #thermal-sensor-cells = <0x01>;
+ rockchip,hw-tshut-temp = <0x1d4c0>;
+ status = "okay";
+ pinctrl-names = "gpio\0otpout";
+ pinctrl-0 = <0x86>;
+ pinctrl-1 = <0x87>;
+ phandle = <0x83>;
+ };
+
+ saradc@ff288000 {
+ compatible = "rockchip,px30-saradc\0rockchip,rk3399-saradc";
+ reg = <0x00 0xff288000 0x00 0x100>;
+ interrupts = <0x00 0x54 0x04>;
+ #io-channel-cells = <0x01>;
+ clocks = <0x02 0x2d 0x02 0x157>;
+ clock-names = "saradc\0apb_pclk";
+ resets = <0x02 0xa5>;
+ reset-names = "saradc-apb";
+ status = "okay";
+ vref-supply = <0x88>;
+ phandle = <0xbe>;
+ };
+
+ otp@ff290000 {
+ compatible = "rockchip,px30-otp";
+ reg = <0x00 0xff290000 0x00 0x4000>;
+ #address-cells = <0x01>;
+ #size-cells = <0x01>;
+ clocks = <0x02 0x2f 0x02 0x15a 0x02 0x161>;
+ clock-names = "clk_otp\0pclk_otp\0pclk_otp_phy";
+ resets = <0x02 0xb4>;
+ reset-names = "otp_phy";
+ phandle = <0xff>;
+
+ id@7 {
+ reg = <0x07 0x10>;
+ phandle = <0x0f>;
+ };
+
+ cpu-leakage@17 {
+ reg = <0x17 0x01>;
+ phandle = <0x07>;
+ };
+
+ performance@1e {
+ reg = <0x1e 0x01>;
+ bits = <0x04 0x03>;
+ phandle = <0x08>;
+ };
+ };
+
+ clock-controller@ff2b0000 {
+ compatible = "rockchip,px30-cru";
+ reg = <0x00 0xff2b0000 0x00 0x1000>;
+ rockchip,grf = <0x2f>;
+ rockchip,boost = <0x89>;
+ #clock-cells = <0x01>;
+ #reset-cells = <0x01>;
+ assigned-clocks = <0x02 0x04>;
+ assigned-clock-rates = <0x3dfd2400>;
+ phandle = <0x02>;
+ };
+
+ cpu-boost@ff2b8000 {
+ compatible = "syscon";
+ reg = <0x00 0xff2b8000 0x00 0x1000>;
+ rockchip,boost-low-con0 = <0x1032>;
+ rockchip,boost-low-con1 = <0x1441>;
+ rockchip,boost-high-con0 = <0x1036>;
+ rockchip,boost-high-con1 = <0x1441>;
+ rockchip,boost-backup-pll = <0x01>;
+ rockchip,boost-backup-pll-usage = <0x00>;
+ rockchip,boost-switch-threshold = <0x249f00>;
+ rockchip,boost-statis-threshold = <0x100>;
+ rockchip,boost-statis-enable = <0x00>;
+ rockchip,boost-enable = <0x00>;
+ phandle = <0x89>;
+ };
+
+ pmu-clock-controller@ff2bc000 {
+ compatible = "rockchip,px30-pmucru";
+ reg = <0x00 0xff2bc000 0x00 0x1000>;
+ rockchip,grf = <0x2f>;
+ #clock-cells = <0x01>;
+ #reset-cells = <0x01>;
+ assigned-clocks = <0x2a 0x01 0x2a 0x08 0x2a 0x05 0x02 0x07 0x02 0xab 0x02 0xb0 0x02 0xf0 0x02 0xf5 0x02 0x140 0x02 0x49>;
+ assigned-clock-rates = <0x47868c00 0x5f5e100 0x18cba80 0x23c34600 0xbebc200 0xbebc200 0x8f0d180 0x8f0d180 0x5f5e100 0xbebc200>;
+ phandle = <0x2a>;
+ };
+
+ syscon@ff2c0000 {
+ compatible = "rockchip,px30-usb2phy-grf\0syscon\0simple-mfd";
+ reg = <0x00 0xff2c0000 0x00 0x10000>;
+ #address-cells = <0x01>;
+ #size-cells = <0x01>;
+ phandle = <0x100>;
+
+ usb2-phy@100 {
+ compatible = "rockchip,px30-usb2phy\0rockchip,rk3328-usb2phy";
+ reg = <0x100 0x10>;
+ clocks = <0x2a 0x0a>;
+ clock-names = "phyclk";
+ #clock-cells = <0x00>;
+ assigned-clocks = <0x02 0x0e 0x02 0x55>;
+ assigned-clock-parents = <0x67 0x02 0x0e>;
+ clock-output-names = "usb480m_phy";
+ status = "okay";
+ phandle = <0x67>;
+
+ host-port {
+ #phy-cells = <0x00>;
+ interrupts = <0x00 0x44 0x04>;
+ interrupt-names = "linestate";
+ status = "okay";
+ phandle = <0x8c>;
+ };
+
+ otg-port {
+ #phy-cells = <0x00>;
+ interrupts = <0x00 0x42 0x04 0x00 0x41 0x04 0x00 0x40 0x04>;
+ interrupt-names = "otg-bvalid\0otg-id\0linestate";
+ status = "disabled";
+ phandle = <0x8b>;
+ };
+ };
+ };
+
+ video-phy@ff2e0000 {
+ compatible = "rockchip,px30-video-phy";
+ reg = <0x00 0xff2e0000 0x00 0x10000 0x00 0xff450000 0x00 0x10000>;
+ clocks = <0x2a 0x0b 0x02 0x145 0x02 0x144>;
+ clock-names = "ref\0pclk_phy\0pclk_host";
+ #clock-cells = <0x00>;
+ resets = <0x02 0x3e>;
+ reset-names = "rst";
+ power-domains = <0x8a 0x0c>;
+ #phy-cells = <0x00>;
+ status = "okay";
+ phandle = <0x4c>;
+ };
+
+ mipi-dphy-rx0@ff2f0000 {
+ compatible = "rockchip,rk3326-mipi-dphy";
+ reg = <0x00 0xff2f0000 0x00 0x4000>;
+ clocks = <0x02 0x146>;
+ clock-names = "dphy-ref";
+ power-domains = <0x8a 0x0d>;
+ rockchip,grf = <0x2f>;
+ status = "okay";
+ phandle = <0x101>;
+ };
+
+ usb@ff300000 {
+ compatible = "rockchip,px30-usb\0rockchip,rk3066-usb\0snps,dwc2";
+ reg = <0x00 0xff300000 0x00 0x40000>;
+ interrupts = <0x00 0x3e 0x04>;
+ clocks = <0x02 0x102>;
+ clock-names = "otg";
+ power-domains = <0x8a 0x05>;
+ dr_mode = "otg";
+ g-np-tx-fifo-size = <0x10>;
+ g-rx-fifo-size = <0x118>;
+ g-tx-fifo-size = <0x100 0x80 0x80 0x40 0x20 0x10>;
+ g-use-dma;
+ phys = <0x8b>;
+ phy-names = "usb2-phy";
+ status = "okay";
+ phandle = <0x102>;
+ };
+
+ usb@ff340000 {
+ compatible = "generic-ehci";
+ reg = <0x00 0xff340000 0x00 0x10000>;
+ interrupts = <0x00 0x3c 0x04>;
+ clocks = <0x02 0x103 0x67>;
+ clock-names = "usbhost\0utmi";
+ power-domains = <0x8a 0x05>;
+ phys = <0x8c>;
+ phy-names = "usb";
+ status = "disabled";
+ phandle = <0x103>;
+ };
+
+ usb@ff350000 {
+ compatible = "generic-ohci";
+ reg = <0x00 0xff350000 0x00 0x10000>;
+ interrupts = <0x00 0x3d 0x04>;
+ clocks = <0x02 0x103 0x67>;
+ clock-names = "usbhost\0utmi";
+ power-domains = <0x8a 0x05>;
+ phys = <0x8c>;
+ phy-names = "usb";
+ status = "disabled";
+ phandle = <0x104>;
+ };
+
+ ethernet@ff360000 {
+ compatible = "rockchip,px30-gmac";
+ reg = <0x00 0xff360000 0x00 0x10000>;
+ rockchip,grf = <0x2f>;
+ interrupts = <0x00 0x2b 0x04>;
+ interrupt-names = "macirq";
+ clocks = <0x02 0x3e 0x02 0x3f 0x02 0x3f 0x02 0x40 0x02 0x41 0x02 0xb2 0x02 0x143 0x02 0x4c>;
+ clock-names = "stmmaceth\0mac_clk_rx\0mac_clk_tx\0clk_mac_ref\0clk_mac_refout\0aclk_mac\0pclk_mac\0clk_mac_speed";
+ phy-mode = "rmii";
+ pinctrl-names = "default";
+ pinctrl-0 = <0x8d 0x8e>;
+ resets = <0x02 0x5e>;
+ reset-names = "stmmaceth";
+ power-domains = <0x8a 0x09>;
+ status = "disabled";
+ phandle = <0x105>;
+ };
+
+ dwmmc@ff370000 {
+ compatible = "rockchip,px30-dw-mshc\0rockchip,rk3288-dw-mshc";
+ reg = <0x00 0xff370000 0x00 0x4000>;
+ max-frequency = <0x8f0d180>;
+ clocks = <0x02 0xf7 0x02 0x3b 0x02 0x43 0x02 0x44>;
+ clock-names = "biu\0ciu\0ciu-drv\0ciu-sample";
+ assigned-clocks = <0x02 0x3b>;
+ assigned-clock-parents = <0x02 0x57>;
+ power-domains = <0x8a 0x07>;
+ fifo-depth = <0x100>;
+ interrupts = <0x00 0x36 0x04>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x8f 0x90 0x91 0x92>;
+ status = "okay";
+ bus-width = <0x04>;
+ cap-mmc-highspeed;
+ cap-sd-highspeed;
+ supports-sd;
+ card-detect-delay = <0x320>;
+ ignore-pm-notify;
+ cd-gpios = <0x5c 0x03 0x01>;
+ sd-uhs-sdr12;
+ sd-uhs-sdr25;
+ sd-uhs-sdr50;
+ sd-uhs-sdr104;
+ vqmmc-supply = <0x4a>;
+ vmmc-supply = <0x93>;
+ phandle = <0x106>;
+ };
+
+ dwmmc@ff380000 {
+ compatible = "rockchip,px30-dw-mshc\0rockchip,rk3288-dw-mshc";
+ reg = <0x00 0xff380000 0x00 0x4000>;
+ max-frequency = <0x8f0d180>;
+ clocks = <0x02 0xff 0x02 0x38 0x02 0x45 0x02 0x46>;
+ clock-names = "biu\0ciu\0ciu-drv\0ciu-sample";
+ assigned-clocks = <0x02 0x38>;
+ assigned-clock-parents = <0x02 0x51>;
+ power-domains = <0x8a 0x0a>;
+ fifo-depth = <0x100>;
+ interrupts = <0x00 0x37 0x04>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x94 0x95 0x96>;
+ status = "okay";
+ bus-width = <0x04>;
+ cap-mmc-highspeed;
+ cap-sd-highspeed;
+ supports-sd;
+ card-detect-delay = <0x320>;
+ ignore-pm-notify;
+ cd-gpios = <0x97 0x0e 0x01>;
+ sd-uhs-sdr12;
+ sd-uhs-sdr25;
+ sd-uhs-sdr50;
+ sd-uhs-sdr104;
+ vqmmc-supply = <0x4a>;
+ vmmc-supply = <0x93>;
+ phandle = <0x107>;
+ };
+
+ dwmmc@ff390000 {
+ compatible = "rockchip,px30-dw-mshc\0rockchip,rk3288-dw-mshc";
+ reg = <0x00 0xff390000 0x00 0x4000>;
+ max-frequency = <0x8f0d180>;
+ clocks = <0x02 0x100 0x02 0x39 0x02 0x47 0x02 0x48>;
+ clock-names = "biu\0ciu\0ciu-drv\0ciu-sample";
+ assigned-clocks = <0x02 0x39>;
+ assigned-clock-parents = <0x02 0x53>;
+ power-domains = <0x8a 0x0a>;
+ fifo-depth = <0x100>;
+ interrupts = <0x00 0x35 0x04>;
+ status = "disabled";
+ phandle = <0x108>;
+ };
+
+ nandc@ff3b0000 {
+ compatible = "rockchip,rk-nandc";
+ reg = <0x00 0xff3b0000 0x00 0x4000>;
+ interrupts = <0x00 0x39 0x04>;
+ nandc_id = <0x00>;
+ clocks = <0x02 0x37 0x02 0xfe>;
+ clock-names = "clk_nandc\0hclk_nandc";
+ assigned-clocks = <0x02 0x37>;
+ assigned-clock-parents = <0x02 0x4f>;
+ power-domains = <0x8a 0x0a>;
+ status = "disabled";
+ phandle = <0x109>;
+ };
+
+ sfc@ff3a0000 {
+ compatible = "rockchip,sfc";
+ reg = <0x00 0xff3a0000 0x00 0x4000>;
+ interrupts = <0x00 0x38 0x04>;
+ clocks = <0x02 0x3a 0x02 0x101>;
+ clock-names = "clk_sfc\0hclk_sfc";
+ assigned-clocks = <0x02 0x3a>;
+ assigned-clock-rates = <0x989680>;
+ status = "disabled";
+ phandle = <0x10a>;
+ };
+
+ gpu@ff400000 {
+ compatible = "arm,malit602\0arm,malit60x\0arm,malit6xx\0arm,mali-midgard";
+ reg = <0x00 0xff400000 0x00 0x4000>;
+ interrupts = <0x00 0x2d 0x04 0x00 0x2e 0x04 0x00 0x2f 0x04>;
+ interrupt-names = "GPU\0MMU\0JOB";
+ clocks = <0x02 0x49>;
+ clock-names = "clk_mali";
+ power-domains = <0x8a 0x0e>;
+ #cooling-cells = <0x02>;
+ operating-points-v2 = <0x98>;
+ status = "okay";
+ mali-supply = <0x0e>;
+ phandle = <0x85>;
+
+ power_model {
+ compatible = "arm,mali-simple-power-model";
+ static-coefficient = <0x64578>;
+ dynamic-coefficient = <0x2dd>;
+ ts = <0x7d00 0x125c 0xffffffb0 0x02>;
+ thermal-zone = "gpu-thermal";
+ };
+ };
+
+ gpu-opp-table {
+ compatible = "operating-points-v2";
+ rockchip,thermal-zone = "soc-thermal";
+ rockchip,temp-hysteresis = <0x1388>;
+ rockchip,low-temp = <0x00>;
+ rockchip,low-temp-min-volt = <0xf4240>;
+ rockchip,low-temp-adjust-volt = <0x00 0x1e0 0xc350>;
+ rockchip,max-volt = <0x11edd8>;
+ rockchip,evb-irdrop = <0x61a8>;
+ rockchip,pvtm-voltage-sel = <0x00 0xc350 0x00 0xc351 0xd2f0 0x01 0xd2f1 0xea60 0x02 0xea61 0x1869f 0x03>;
+ rockchip,pvtm-ch = <0x00 0x00>;
+ phandle = <0x98>;
+
+ opp-400000000 {
+ opp-hz = <0x00 0x17d78400>;
+ opp-microvolt = <0x100590>;
+ opp-microvolt-L0 = <0x100590>;
+ opp-microvolt-L1 = <0xfa3e8>;
+ opp-microvolt-L2 = <0xee098>;
+ opp-microvolt-L3 = <0xe7ef0>;
+ };
+
+ opp-480000000 {
+ opp-hz = <0x00 0x1c9c3800>;
+ opp-microvolt = <0x112a88>;
+ opp-microvolt-L0 = <0x112a88>;
+ opp-microvolt-L1 = <0x10c8e0>;
+ opp-microvolt-L2 = <0x100590>;
+ opp-microvolt-L3 = <0xf4240>;
+ };
+
+ opp-520000000 {
+ opp-hz = <0x00 0x1efe9200>;
+ opp-microvolt = <0x118c30>;
+ opp-microvolt-L0 = <0x118c30>;
+ opp-microvolt-L1 = <0x118c30>;
+ opp-microvolt-L2 = <0x10c8e0>;
+ opp-microvolt-L3 = <0x100590>;
+ };
+ };
+
+ hevc_service@ff440000 {
+ compatible = "rockchip,hevc_sub";
+ iommu_enabled = <0x01>;
+ reg = <0x00 0xff440000 0x00 0x400>;
+ interrupts = <0x00 0x31 0x04>;
+ interrupt-names = "irq_dec";
+ dev_mode = <0x01>;
+ iommus = <0x99>;
+ allocator = <0x01>;
+ phandle = <0x9c>;
+ };
+
+ vpu_service@ff442000 {
+ compatible = "rockchip,vpu_sub";
+ iommu_enabled = <0x01>;
+ reg = <0x00 0xff442000 0x00 0x800>;
+ interrupts = <0x00 0x50 0x04 0x00 0x4f 0x04>;
+ interrupt-names = "irq_enc\0irq_dec";
+ dev_mode = <0x00>;
+ iommus = <0x9a>;
+ allocator = <0x01>;
+ phandle = <0x9b>;
+ };
+
+ vpu_combo {
+ compatible = "rockchip,vpu_combo";
+ subcnt = <0x02>;
+ rockchip,grf = <0x2f>;
+ rockchip,sub = <0x9b 0x9c>;
+ clocks = <0x02 0xaf 0x02 0xf4 0x02 0x4b>;
+ clock-names = "aclk_vcodec\0hclk_vcodec\0clk_core";
+ resets = <0x02 0x24 0x02 0x26 0x02 0x25 0x02 0x27 0x02 0x3f>;
+ reset-names = "video_a\0video_h\0niu_a\0niu_h\0video_core";
+ power-domains = <0x8a 0x0b>;
+ mode_bit = <0x0f>;
+ mode_ctrl = <0x410>;
+ status = "okay";
+ phandle = <0x10b>;
+ };
+
+ iommu@ff440440 {
+ compatible = "rockchip,iommu";
+ reg = <0x00 0xff440440 0x00 0x40 0x00 0xff440480 0x00 0x40>;
+ interrupts = <0x00 0x32 0x04>;
+ interrupt-names = "hevc_mmu";
+ clocks = <0x02 0xaf 0x02 0xf4>;
+ clock-names = "aclk\0hclk";
+ power-domains = <0x8a 0x0b>;
+ #iommu-cells = <0x00>;
+ phandle = <0x99>;
+ };
+
+ iommu@ff442800 {
+ compatible = "rockchip,iommu";
+ reg = <0x00 0xff442800 0x00 0x100>;
+ interrupts = <0x00 0x51 0x04>;
+ interrupt-names = "vpu_mmu";
+ clocks = <0x02 0xaf 0x02 0xf4>;
+ clock-names = "aclk\0hclk";
+ power-domains = <0x8a 0x0b>;
+ #iommu-cells = <0x00>;
+ phandle = <0x9a>;
+ };
+
+ dsi@ff450000 {
+ compatible = "rockchip,px30-mipi-dsi";
+ reg = <0x00 0xff450000 0x00 0x10000>;
+ interrupts = <0x00 0x4b 0x04>;
+ clocks = <0x02 0x144 0x4c>;
+ clock-names = "pclk\0hs_clk";
+ resets = <0x02 0x3d>;
+ reset-names = "apb";
+ phys = <0x4c>;
+ phy-names = "mipi_dphy";
+ power-domains = <0x8a 0x0c>;
+ rockchip,grf = <0x2f>;
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+ status = "okay";
+ phandle = <0x10c>;
+
+ ports {
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+
+ port@0 {
+ reg = <0x00>;
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+
+ endpoint@0 {
+ reg = <0x00>;
+ remote-endpoint = <0x13>;
+ status = "okay";
+ phandle = <0xa3>;
+ };
+ };
+ };
+
+ panel@0 {
+ compatible = "elida,kd35t133\0simple-panel-dsi";
+ reg = <0x00>;
+ backlight = <0x9d>;
+ backlight-supply = <0x9e>;
+ power-supply = <0x9f>;
+ reset-gpios = <0x97 0x10 0x01>;
+ reset-delay-ms = <0x96>;
+ init-delay-ms = <0x14>;
+ enable-delay-ms = <0x78>;
+ prepare-delay-ms = <0x14>;
+ unprepare-delay-ms = <0x14>;
+ disable-delay-ms = <0x32>;
+ width-mm = <0x34>;
+ height-mm = <0x46>;
+ dsi,flags = <0xa03>;
+ dsi,format = <0x00>;
+ dsi,lanes = <0x04>;
+ panel-init-sequence = [15 00 02 ff 30 15 00 02 ff 52 15 00 02 ff 01 15 00 02 e3 00 15 00 02 04 00 15 00 02 05 03 15 00 02 24 12 15 00 02 25 1e 15 00 02 26 6f 15 00 02 27 52 15 00 02 28 67 15 00 02 29 01 15 00 02 2a df 15 00 02 37 9c 15 00 02 38 a7 15 00 02 39 53 15 00 02 44 00 15 00 02 49 3c 15 00 02 59 fe 15 00 02 5c 00 15 00 02 80 20 15 00 02 91 77 15 00 02 92 77 15 00 02 a0 55 15 00 02 a1 50 15 00 02 a4 9c 15 00 02 a7 02 15 00 02 a8 01 15 00 02 a9 21 15 00 02 aa fc 15 00 02 ab 28 15 00 02 ac 06 15 00 02 ad 06 15 00 02 ae 06 15 00 02 af 03 15 00 02 b0 08 15 00 02 b1 26 15 00 02 b2 28 15 00 02 b3 28 15 00 02 b4 33 15 00 02 b5 08 15 00 02 b6 26 15 00 02 b7 08 15 00 02 b8 26 15 00 02 c0 00 15 00 02 c1 00 15 00 02 c2 00 15 00 02 ff 30 15 00 02 ff 52 15 00 02 ff 02 15 00 02 b0 0b 15 00 02 b1 16 15 00 02 b2 17 15 00 02 b3 2c 15 00 02 b4 32 15 00 02 b5 3b 15 00 02 b6 29 15 00 02 b7 40 15 00 02 b8 0d 15 00 02 b9 05 15 00 02 ba 12 15 00 02 bb 10 15 00 02 bc 12 15 00 02 bd 15 15 00 02 be 19 15 00 02 bf 0e 15 00 02 c0 16 15 00 02 c1 0a 15 00 02 d0 0c 15 00 02 d1 17 15 00 02 d2 14 15 00 02 d3 2e 15 00 02 d4 32 15 00 02 d5 3c 15 00 02 d6 22 15 00 02 d7 3d 15 00 02 d8 0d 15 00 02 d9 07 15 00 02 da 13 15 00 02 db 13 15 00 02 dc 11 15 00 02 dd 15 15 00 02 de 19 15 00 02 df 10 15 00 02 e0 17 15 00 02 e1 0a 15 00 02 ff 30 15 00 02 ff 52 15 00 02 ff 03 15 00 02 00 2a 15 00 02 01 2a 15 00 02 02 2a 15 00 02 03 2a 15 00 02 04 61 15 00 02 05 80 15 00 02 06 c7 15 00 02 07 01 15 00 02 08 82 15 00 02 09 83 15 00 02 30 2a 15 00 02 31 2a 15 00 02 32 2a 15 00 02 33 2a 15 00 02 34 a1 15 00 02 35 c5 15 00 02 36 80 15 00 02 37 23 15 00 02 40 82 15 00 02 41 83 15 00 02 42 80 15 00 02 43 81 15 00 02 44 55 15 00 02 45 e6 15 00 02 46 e5 15 00 02 47 55 15 00 02 48 e8 15 00 02 49 e7 15 00 02 50 02 15 00 02 51 01 15 00 02 52 04 15 00 02 53 03 15 00 02 54 55 15 00 02 55 ea 15 00 02 56 e9 15 00 02 57 55 15 00 02 58 ec 15 00 02 59 eb 15 00 02 7e 02 15 00 02 7f 80 15 00 02 e0 5a 15 00 02 b1 00 15 00 02 b4 0e 15 00 02 b5 0f 15 00 02 b6 04 15 00 02 b7 07 15 00 02 b8 06 15 00 02 b9 05 15 00 02 ba 0f 15 00 02 c7 00 15 00 02 ca 0e 15 00 02 cb 0f 15 00 02 cc 04 15 00 02 cd 07 15 00 02 ce 06 15 00 02 cf 05 15 00 02 d0 0f 15 00 02 81 0f 15 00 02 84 0e 15 00 02 85 0f 15 00 02 86 07 15 00 02 87 04 15 00 02 88 05 15 00 02 89 06 15 00 02 8a 00 15 00 02 97 0f 15 00 02 9a 0e 15 00 02 9b 0f 15 00 02 9c 07 15 00 02 9d 04 15 00 02 9e 05 15 00 02 9f 06 15 00 02 a0 00 15 00 02 ff 30 15 00 02 ff 52 15 00 02 ff 02 15 00 02 01 01 15 00 02 02 da 15 00 02 03 ba 15 00 02 04 a8 15 00 02 05 9a 15 00 02 06 70 15 00 02 07 ff 15 00 02 08 91 15 00 02 09 90 15 00 02 0a ff 15 00 02 0b 8f 15 00 02 0c 60 15 00 02 0d 58 15 00 02 0e 48 15 00 02 0f 38 15 00 02 10 2b 15 00 02 ff 30 15 00 02 ff 52 15 00 02 ff 00 15 00 02 36 02 15 00 02 3a 70 05 c8 01 11 05 14 01 29];
+ panel-exit-sequence = <0x5140128 0x50a0110>;
+
+ display-timings {
+ native-mode = <0xa0>;
+
+ 60Hz {
+ clock-frequency = <0x1ba8140>;
+ hactive = <0x280>;
+ vactive = <0x1e0>;
+ hfront-porch = <0x2e>;
+ hsync-len = <0x02>;
+ hback-porch = <0x2c>;
+ vfront-porch = <0x10>;
+ vsync-len = <0x02>;
+ vback-porch = <0x0e>;
+ hsync-active = <0x00>;
+ vsync-active = <0x00>;
+ de-active = <0x00>;
+ pixelclk-active = <0x01>;
+ phandle = <0xa0>;
+ };
+
+ 50Hz {
+ clock-frequency = <0x1ba8140>;
+ hactive = <0x280>;
+ vactive = <0x1e0>;
+ hfront-porch = <0x2e>;
+ hsync-len = <0x02>;
+ hback-porch = <0x2c>;
+ vfront-porch = <0x10>;
+ vsync-len = <0x02>;
+ vback-porch = <0x0e>;
+ hsync-active = <0x00>;
+ vsync-active = <0x00>;
+ de-active = <0x00>;
+ pixelclk-active = <0x01>;
+ phandle = <0xa00>;
+ };
+
+ 75Hz {
+ clock-frequency = <0x1ba8140>;
+ hactive = <0x280>;
+ vactive = <0x1e0>;
+ hfront-porch = <0x2e>;
+ hsync-len = <0x02>;
+ hback-porch = <0x2c>;
+ vfront-porch = <0x10>;
+ vsync-len = <0x02>;
+ vback-porch = <0x0e>;
+ hsync-active = <0x00>;
+ vsync-active = <0x00>;
+ de-active = <0x00>;
+ pixelclk-active = <0x01>;
+ phandle = <0xa01>;
+ };
+ };
+ };
+ };
+
+ vop@ff460000 {
+ compatible = "rockchip,px30-vop-big";
+ reg = <0x00 0xff460000 0x00 0x1fc 0x00 0xff460a00 0x00 0x400>;
+ rockchip,grf = <0x2f>;
+ reg-names = "regs\0gamma_lut";
+ interrupts = <0x00 0x4d 0x04>;
+ clocks = <0x02 0xb5 0x02 0x96 0x02 0xfb>;
+ clock-names = "aclk_vop\0dclk_vop\0hclk_vop";
+ power-domains = <0x8a 0x0c>;
+ iommus = <0xa1>;
+ status = "okay";
+ phandle = <0x10f>;
+
+ port {
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+ phandle = <0x10>;
+
+ endpoint@0 {
+ reg = <0x00>;
+ remote-endpoint = <0xa2>;
+ phandle = <0x12>;
+ };
+
+ endpoint@1 {
+ reg = <0x01>;
+ remote-endpoint = <0xa3>;
+ phandle = <0x13>;
+ };
+
+ endpoint@2 {
+ reg = <0x02>;
+ remote-endpoint = <0xa4>;
+ phandle = <0x14>;
+ };
+ };
+ };
+
+ iommu@ff460f00 {
+ compatible = "rockchip,iommu";
+ reg = <0x00 0xff460f00 0x00 0x100>;
+ interrupts = <0x00 0x4d 0x04>;
+ interrupt-names = "vopb_mmu";
+ clocks = <0x02 0xb5 0x02 0xfb>;
+ clock-names = "aclk\0hclk";
+ power-domains = <0x8a 0x0c>;
+ #iommu-cells = <0x00>;
+ status = "okay";
+ phandle = <0xa1>;
+ };
+
+ rk_rga@ff480000 {
+ compatible = "rockchip,rga2";
+ reg = <0x00 0xff480000 0x00 0x1000>;
+ interrupts = <0x00 0x4c 0x04>;
+ clocks = <0x02 0xb7 0x02 0xfd 0x02 0x35>;
+ clock-names = "aclk_rga\0hclk_rga\0clk_rga";
+ power-domains = <0x8a 0x0c>;
+ dma-coherent;
+ status = "okay";
+ phandle = <0x110>;
+ };
+
+ cif@ff490000 {
+ compatible = "rockchip,cif";
+ reg = <0x00 0xff490000 0x00 0x200>;
+ interrupts = <0x00 0x45 0x04>;
+ clocks = <0x02 0xb3 0x02 0xf9 0x02 0x160 0x02 0x34>;
+ clock-names = "aclk_cif0\0hclk_cif0\0pclk_cif\0cif0_out";
+ resets = <0x02 0x2c 0x02 0x2d 0x02 0x2e>;
+ reset-names = "rst_cif_a\0rst_cif_h\0rst_cif_pclkin";
+ power-domains = <0x8a 0x0d>;
+ pinctrl-names = "cif_pin_all";
+ pinctrl-0 = <0xa5>;
+ iommus = <0xa6>;
+ status = "disabled";
+ phandle = <0x111>;
+ };
+
+ cif-new@ff490000 {
+ compatible = "rockchip,px30-cif";
+ reg = <0x00 0xff490000 0x00 0x200>;
+ interrupts = <0x00 0x45 0x04>;
+ clocks = <0x02 0xb3 0x02 0xf9 0x02 0x160 0x02 0x34>;
+ clock-names = "aclk_cif\0hclk_cif\0pclk_cif\0cif_out";
+ resets = <0x02 0x2c 0x02 0x2d 0x02 0x2e>;
+ reset-names = "rst_cif_a\0rst_cif_h\0rst_cif_pclkin";
+ power-domains = <0x8a 0x0d>;
+ iommus = <0xa6>;
+ status = "disabled";
+ phandle = <0x112>;
+ };
+
+ iommu@ff490800 {
+ compatible = "rockchip,iommu";
+ reg = <0x00 0xff490800 0x00 0x100>;
+ interrupts = <0x00 0x45 0x04>;
+ interrupt-names = "vip_mmu";
+ clocks = <0x02 0xb3 0x02 0xf9>;
+ clock-names = "aclk\0hclk";
+ power-domains = <0x8a 0x0d>;
+ rk_iommu,disable_reset_quirk;
+ #iommu-cells = <0x00>;
+ status = "okay";
+ phandle = <0xa6>;
+ };
+
+ rk_isp@ff4a0000 {
+ compatible = "rockchip,px30-isp\0rockchip,isp";
+ reg = <0x00 0xff4a0000 0x00 0x8000>;
+ interrupts = <0x00 0x46 0x04>;
+ clocks = <0x02 0xb4 0x02 0xfa 0x02 0x33 0x02 0x33 0x02 0x15f 0x02 0x34 0x02 0x34 0x02 0x146>;
+ clock-names = "aclk_isp\0hclk_isp\0clk_isp\0clk_isp_jpe\0pclkin_isp\0clk_cif_pll\0clk_cif_out\0pclk_dphyrx";
+ resets = <0x02 0x2b 0x02 0x2f>;
+ reset-names = "rst_isp\0rst_mipicsiphy";
+ power-domains = <0x8a 0x0d>;
+ pinctrl-names = "default\0isp_dvp8bit2\0isp_dvp10bit\0isp_dvp12bit";
+ pinctrl-0 = <0xa7>;
+ pinctrl-1 = <0xa5>;
+ pinctrl-2 = <0xa5 0xa8>;
+ pinctrl-3 = <0xa9 0xa5 0xa8>;
+ rockchip,isp,mipiphy = <0x01>;
+ rockchip,isp,csiphy,reg = <0xff2f0000 0x4000>;
+ rockchip,grf = <0x2f>;
+ rockchip,cru = <0x02>;
+ rockchip,isp,iommu-enable = <0x01>;
+ iommus = <0xaa>;
+ status = "disabled";
+ phandle = <0x113>;
+ };
+
+ rkisp1@ff4a0000 {
+ compatible = "rockchip,rk3326-rkisp1";
+ reg = <0x00 0xff4a0000 0x00 0x8000>;
+ interrupts = <0x00 0x46 0x04 0x00 0x49 0x04 0x00 0x4a 0x04>;
+ interrupt-names = "isp_irq\0mi_irq\0mipi_irq";
+ clocks = <0x02 0xb4 0x02 0xfa 0x02 0x33 0x02 0x15f>;
+ clock-names = "aclk_isp\0hclk_isp\0clk_isp\0pclk_isp";
+ devfreq = <0xab>;
+ power-domains = <0x8a 0x0d>;
+ iommus = <0xaa>;
+ rockchip,grf = <0x2f>;
+ status = "okay";
+ phandle = <0x114>;
+ };
+
+ iommu@ff4a8000 {
+ compatible = "rockchip,iommu";
+ reg = <0x00 0xff4a8000 0x00 0x100>;
+ interrupts = <0x00 0x46 0x04>;
+ interrupt-names = "isp_mmu";
+ clocks = <0x02 0xb4 0x02 0xfa>;
+ clock-names = "aclk\0hclk";
+ power-domains = <0x8a 0x0d>;
+ rk_iommu,disable_reset_quirk;
+ #iommu-cells = <0x00>;
+ status = "okay";
+ phandle = <0xaa>;
+ };
+
+ qos@ff518000 {
+ compatible = "syscon";
+ reg = <0x00 0xff518000 0x00 0x20>;
+ phandle = <0x18>;
+ };
+
+ qos@ff520000 {
+ compatible = "syscon";
+ reg = <0x00 0xff520000 0x00 0x20>;
+ phandle = <0x28>;
+ };
+
+ qos@ff52c000 {
+ compatible = "syscon";
+ reg = <0x00 0xff52c000 0x00 0x20>;
+ phandle = <0x17>;
+ };
+
+ qos@ff538000 {
+ compatible = "syscon";
+ reg = <0x00 0xff538000 0x00 0x20>;
+ phandle = <0x19>;
+ };
+
+ qos@ff538080 {
+ compatible = "syscon";
+ reg = <0x00 0xff538080 0x00 0x20>;
+ phandle = <0x1a>;
+ };
+
+ qos@ff538100 {
+ compatible = "syscon";
+ reg = <0x00 0xff538100 0x00 0x20>;
+ phandle = <0x1b>;
+ };
+
+ qos@ff538180 {
+ compatible = "syscon";
+ reg = <0x00 0xff538180 0x00 0x20>;
+ phandle = <0x1c>;
+ };
+
+ qos@ff540000 {
+ compatible = "syscon";
+ reg = <0x00 0xff540000 0x00 0x20>;
+ phandle = <0x15>;
+ };
+
+ qos@ff540080 {
+ compatible = "syscon";
+ reg = <0x00 0xff540080 0x00 0x20>;
+ phandle = <0x16>;
+ };
+
+ qos@ff548000 {
+ compatible = "syscon";
+ reg = <0x00 0xff548000 0x00 0x20>;
+ phandle = <0x23>;
+ };
+
+ qos@ff548080 {
+ compatible = "syscon";
+ reg = <0x00 0xff548080 0x00 0x20>;
+ phandle = <0x24>;
+ };
+
+ qos@ff548100 {
+ compatible = "syscon";
+ reg = <0x00 0xff548100 0x00 0x20>;
+ phandle = <0x25>;
+ };
+
+ qos@ff548180 {
+ compatible = "syscon";
+ reg = <0x00 0xff548180 0x00 0x20>;
+ phandle = <0x26>;
+ };
+
+ qos@ff548200 {
+ compatible = "syscon";
+ reg = <0x00 0xff548200 0x00 0x20>;
+ phandle = <0x27>;
+ };
+
+ qos@ff550000 {
+ compatible = "syscon";
+ reg = <0x00 0xff550000 0x00 0x20>;
+ phandle = <0x1f>;
+ };
+
+ qos@ff550080 {
+ compatible = "syscon";
+ reg = <0x00 0xff550080 0x00 0x20>;
+ phandle = <0x20>;
+ };
+
+ qos@ff550100 {
+ compatible = "syscon";
+ reg = <0x00 0xff550100 0x00 0x20>;
+ phandle = <0x21>;
+ };
+
+ qos@ff550180 {
+ compatible = "syscon";
+ reg = <0x00 0xff550180 0x00 0x20>;
+ phandle = <0x22>;
+ };
+
+ qos@ff558000 {
+ compatible = "syscon";
+ reg = <0x00 0xff558000 0x00 0x20>;
+ phandle = <0x1d>;
+ };
+
+ qos@ff558080 {
+ compatible = "syscon";
+ reg = <0x00 0xff558080 0x00 0x20>;
+ phandle = <0x1e>;
+ };
+
+ dfi@ff610000 {
+ reg = <0x00 0xff610000 0x00 0x400>;
+ compatible = "rockchip,px30-dfi";
+ rockchip,pmugrf = <0xac>;
+ status = "okay";
+ phandle = <0xad>;
+ };
+
+ dmc {
+ compatible = "rockchip,px30-dmc";
+ interrupts = <0x00 0x69 0x04>;
+ interrupt-names = "complete_irq";
+ devfreq-events = <0xad>;
+ clocks = <0x02 0x54>;
+ clock-names = "dmc_clk";
+ operating-points-v2 = <0xae>;
+ ddr_timing = <0xaf>;
+ upthreshold = <0x28>;
+ downdifferential = <0x14>;
+ system-status-freq = <0x01 0x80e80 0x08 0x6ddd0 0x02 0x2f5d0 0x20 0x6ddd0 0x1000 0x80e80 0x4000 0xa2990 0x2000 0xa2990>;
+ auto-min-freq = <0x50140>;
+ auto-freq-en = <0x01>;
+ #cooling-cells = <0x02>;
+ status = "okay";
+ center-supply = <0x0e>;
+ phandle = <0xab>;
+
+ ddr_power_model {
+ compatible = "ddr_power_model";
+ dynamic-power-coefficient = <0x78>;
+ static-power-coefficient = <0xc8>;
+ ts = <0x7d00 0x125c 0xffffffb0 0x02>;
+ thermal-zone = "soc-thermal";
+ phandle = <0x115>;
+ };
+ };
+
+ dmc-opp-table {
+ compatible = "operating-points-v2";
+ rockchip,max-volt = <0x118c30>;
+ rockchip,evb-irdrop = <0x61a8>;
+ rockchip,pvtm-voltage-sel = <0x00 0xc350 0x00 0xc351 0xd2f0 0x01 0xd2f1 0xea60 0x02 0xea61 0x1869f 0x03>;
+ rockchip,pvtm-ch = <0x00 0x00>;
+ phandle = <0xae>;
+
+ opp-528000000 {
+ opp-hz = <0x00 0x1f78a400>;
+ opp-microvolt = <0xee098>;
+ opp-microvolt-L0 = <0xee098>;
+ opp-microvolt-L1 = <0xee098>;
+ opp-microvolt-L2 = <0xe7ef0>;
+ opp-microvolt-L3 = <0xe7ef0>;
+ };
+
+ opp-666000000 {
+ opp-hz = <0x00 0x27b25a80>;
+ opp-microvolt = <0x100590>;
+ opp-microvolt-L0 = <0x100590>;
+ opp-microvolt-L1 = <0xf4240>;
+ opp-microvolt-L2 = <0xee098>;
+ opp-microvolt-L3 = <0xe7ef0>;
+ };
+
+ opp-786000000 {
+ opp-hz = <0x00 0x2ed96880>;
+ opp-microvolt = <0x10c8e0>;
+ opp-microvolt-L0 = <0x10c8e0>;
+ opp-microvolt-L1 = <0x100590>;
+ opp-microvolt-L2 = <0xfa3e8>;
+ opp-microvolt-L3 = <0xf4240>;
+ status = "okay";
+ };
+ };
+
+ rockchip-system-monitor {
+ compatible = "rockchip,system-monitor";
+ rockchip,thermal-zone = "soc-thermal";
+ rockchip,polling-delay = <0xc8>;
+ phandle = <0x116>;
+ };
+
+ pinctrl {
+ compatible = "rockchip,px30-pinctrl";
+ rockchip,grf = <0x2f>;
+ rockchip,pmu = <0xac>;
+ #address-cells = <0x02>;
+ #size-cells = <0x02>;
+ ranges;
+ phandle = <0x117>;
+
+ gpio0@ff040000 {
+ compatible = "rockchip,gpio-bank";
+ reg = <0x00 0xff040000 0x00 0x100>;
+ interrupts = <0x00 0x03 0x04>;
+ clocks = <0x2a 0x14>;
+ gpio-controller;
+ #gpio-cells = <0x02>;
+ interrupt-controller;
+ #interrupt-cells = <0x02>;
+ phandle = <0x5c>;
+ };
+
+ gpio1@ff250000 {
+ compatible = "rockchip,gpio-bank";
+ reg = <0x00 0xff250000 0x00 0x100>;
+ interrupts = <0x00 0x04 0x04>;
+ clocks = <0x02 0x15c>;
+ gpio-controller;
+ #gpio-cells = <0x02>;
+ interrupt-controller;
+ #interrupt-cells = <0x02>;
+ phandle = <0xbf>;
+ };
+
+ gpio2@ff260000 {
+ compatible = "rockchip,gpio-bank";
+ reg = <0x00 0xff260000 0x00 0x100>;
+ interrupts = <0x00 0x05 0x04>;
+ clocks = <0x02 0x15d>;
+ gpio-controller;
+ #gpio-cells = <0x02>;
+ interrupt-controller;
+ #interrupt-cells = <0x02>;
+ phandle = <0x66>;
+ };
+
+ gpio3@ff270000 {
+ compatible = "rockchip,gpio-bank";
+ reg = <0x00 0xff270000 0x00 0x100>;
+ interrupts = <0x00 0x06 0x04>;
+ clocks = <0x02 0x15e>;
+ gpio-controller;
+ #gpio-cells = <0x02>;
+ interrupt-controller;
+ #interrupt-cells = <0x02>;
+ phandle = <0x97>;
+ };
+
+ pcfg-pull-up {
+ bias-pull-up;
+ phandle = <0xb2>;
+ };
+
+ pcfg-pull-down {
+ bias-pull-down;
+ phandle = <0x118>;
+ };
+
+ pcfg-pull-none {
+ bias-disable;
+ phandle = <0xb1>;
+ };
+
+ pcfg-pull-none-2ma {
+ bias-disable;
+ drive-strength = <0x02>;
+ phandle = <0x119>;
+ };
+
+ pcfg-pull-up-2ma {
+ bias-pull-up;
+ drive-strength = <0x02>;
+ phandle = <0x11a>;
+ };
+
+ pcfg-pull-up-4ma {
+ bias-pull-up;
+ drive-strength = <0x04>;
+ phandle = <0xb3>;
+ };
+
+ pcfg-pull-none-4ma {
+ bias-disable;
+ drive-strength = <0x04>;
+ phandle = <0x11b>;
+ };
+
+ pcfg-pull-down-4ma {
+ bias-pull-down;
+ drive-strength = <0x04>;
+ phandle = <0x11c>;
+ };
+
+ pcfg-pull-none-8ma {
+ bias-disable;
+ drive-strength = <0x08>;
+ phandle = <0xb6>;
+ };
+
+ pcfg-pull-up-8ma {
+ bias-pull-up;
+ drive-strength = <0x08>;
+ phandle = <0xb4>;
+ };
+
+ pcfg-pull-none-12ma {
+ bias-disable;
+ drive-strength = <0x0c>;
+ phandle = <0xb8>;
+ };
+
+ pcfg-pull-up-12ma {
+ bias-pull-up;
+ drive-strength = <0x0c>;
+ phandle = <0xb7>;
+ };
+
+ pcfg-pull-none-smt {
+ bias-disable;
+ input-schmitt-enable;
+ phandle = <0xb0>;
+ };
+
+ pcfg-output-high {
+ output-high;
+ phandle = <0x11d>;
+ };
+
+ pcfg-output-low {
+ output-low;
+ phandle = <0xb9>;
+ };
+
+ pcfg-input-high {
+ bias-pull-up;
+ input-enable;
+ phandle = <0xb5>;
+ };
+
+ pcfg-input {
+ input-enable;
+ phandle = <0x11e>;
+ };
+
+ i2c0 {
+
+ i2c0-xfer {
+ rockchip,pins = <0x00 0x08 0x01 0xb0 0x00 0x09 0x01 0xb0>;
+ phandle = <0x5b>;
+ };
+ };
+
+ i2c1 {
+
+ i2c1-xfer {
+ rockchip,pins = <0x00 0x12 0x01 0xb0 0x00 0x13 0x01 0xb0>;
+ phandle = <0x69>;
+ };
+ };
+
+ i2c2 {
+
+ i2c2-xfer {
+ rockchip,pins = <0x02 0x0f 0x02 0xb0 0x02 0x10 0x02 0xb0>;
+ phandle = <0x6a>;
+ };
+ };
+
+ i2c3 {
+
+ i2c3-xfer {
+ rockchip,pins = <0x01 0x0c 0x04 0xb0 0x01 0x0d 0x04 0xb0>;
+ phandle = <0x6b>;
+ };
+ };
+
+ tsadc {
+
+ tsadc-otp-gpio {
+ rockchip,pins = <0x00 0x06 0x00 0xb1>;
+ phandle = <0x86>;
+ };
+
+ tsadc-otp-out {
+ rockchip,pins = <0x00 0x06 0x01 0xb1>;
+ phandle = <0x87>;
+ };
+ };
+
+ uart0 {
+
+ uart0-xfer {
+ rockchip,pins = <0x00 0x0a 0x01 0xb2 0x00 0x0b 0x01 0xb2>;
+ phandle = <0x2c>;
+ };
+
+ uart0-cts {
+ rockchip,pins = <0x00 0x0c 0x01 0xb1>;
+ phandle = <0x2d>;
+ };
+
+ uart0-rts {
+ rockchip,pins = <0x00 0x0d 0x01 0xb1>;
+ phandle = <0x2e>;
+ };
+
+ uart0-rts-gpio {
+ rockchip,pins = <0x00 0x0d 0x00 0xb1>;
+ phandle = <0x11f>;
+ };
+ };
+
+ uart1 {
+
+ uart1-xfer {
+ rockchip,pins = <0x01 0x11 0x01 0xb2 0x01 0x10 0x01 0xb2>;
+ phandle = <0x4f>;
+ };
+
+ uart1-cts {
+ rockchip,pins = <0x01 0x12 0x01 0xb1>;
+ phandle = <0x50>;
+ };
+
+ uart1-rts {
+ rockchip,pins = <0x01 0x13 0x01 0xb1>;
+ phandle = <0x120>;
+ };
+
+ uart1-rts-gpio {
+ rockchip,pins = <0x01 0x13 0x00 0xb1>;
+ phandle = <0x121>;
+ };
+ };
+
+ uart2-m0 {
+
+ uart2m0-xfer {
+ rockchip,pins = <0x01 0x1a 0x02 0xb2 0x01 0x1b 0x02 0xb2>;
+ phandle = <0x51>;
+ };
+ };
+
+ uart2-m1 {
+
+ uart2m1-xfer {
+ rockchip,pins = <0x02 0x0c 0x02 0xb2 0x02 0x0e 0x02 0xb2>;
+ phandle = <0xba>;
+ };
+ };
+
+ uart3-m0 {
+
+ uart3m0-xfer {
+ rockchip,pins = <0x00 0x10 0x02 0xb2 0x00 0x11 0x02 0xb2>;
+ phandle = <0x122>;
+ };
+
+ uart3m0-cts {
+ rockchip,pins = <0x00 0x12 0x02 0xb1>;
+ phandle = <0x123>;
+ };
+
+ uart3m0-rts {
+ rockchip,pins = <0x00 0x13 0x02 0xb1>;
+ phandle = <0x124>;
+ };
+
+ uart3m0-rts-gpio {
+ rockchip,pins = <0x00 0x13 0x00 0xb1>;
+ phandle = <0x125>;
+ };
+ };
+
+ uart3-m1 {
+
+ uart3m1-xfer {
+ rockchip,pins = <0x01 0x0e 0x02 0xb2 0x01 0x0f 0x02 0xb2>;
+ phandle = <0x52>;
+ };
+
+ uart3m1-cts {
+ rockchip,pins = <0x01 0x0c 0x02 0xb1>;
+ phandle = <0x53>;
+ };
+
+ uart3m1-rts {
+ rockchip,pins = <0x01 0x0d 0x02 0xb1>;
+ phandle = <0x54>;
+ };
+
+ uart3m1-rts-gpio {
+ rockchip,pins = <0x01 0x0d 0x00 0xb1>;
+ phandle = <0x126>;
+ };
+ };
+
+ uart4 {
+
+ uart4-xfer {
+ rockchip,pins = <0x01 0x1c 0x02 0xb2 0x01 0x1d 0x02 0xb2>;
+ phandle = <0x55>;
+ };
+
+ uart4-cts {
+ rockchip,pins = <0x01 0x1e 0x02 0xb1>;
+ phandle = <0x56>;
+ };
+
+ uart4-rts {
+ rockchip,pins = <0x01 0x1f 0x02 0xb1>;
+ phandle = <0x57>;
+ };
+ };
+
+ uart5 {
+
+ uart5-xfer {
+ rockchip,pins = <0x03 0x02 0x04 0xb2 0x03 0x01 0x04 0xb2>;
+ phandle = <0x58>;
+ };
+
+ uart5-cts {
+ rockchip,pins = <0x03 0x03 0x04 0xb1>;
+ phandle = <0x59>;
+ };
+
+ uart5-rts {
+ rockchip,pins = <0x03 0x05 0x04 0xb1>;
+ phandle = <0x5a>;
+ };
+ };
+
+ spi0 {
+
+ spi0-clk {
+ rockchip,pins = <0x01 0x0f 0x03 0xb3>;
+ phandle = <0x6c>;
+ };
+
+ spi0-csn {
+ rockchip,pins = <0x01 0x0e 0x03 0xb3>;
+ phandle = <0x6d>;
+ };
+
+ spi0-miso {
+ rockchip,pins = <0x01 0x0d 0x03 0xb3>;
+ phandle = <0x6e>;
+ };
+
+ spi0-mosi {
+ rockchip,pins = <0x01 0x0c 0x03 0xb3>;
+ phandle = <0x6f>;
+ };
+
+ spi0-clk-hs {
+ rockchip,pins = <0x01 0x0f 0x03 0xb4>;
+ phandle = <0x70>;
+ };
+
+ spi0-miso-hs {
+ rockchip,pins = <0x01 0x0d 0x03 0xb4>;
+ phandle = <0x71>;
+ };
+
+ spi0-mosi-hs {
+ rockchip,pins = <0x01 0x0c 0x03 0xb4>;
+ phandle = <0x72>;
+ };
+ };
+
+ spi1 {
+
+ spi1-clk {
+ rockchip,pins = <0x03 0x0f 0x04 0xb3>;
+ phandle = <0x73>;
+ };
+
+ spi1-csn0 {
+ rockchip,pins = <0x03 0x09 0x04 0xb3>;
+ phandle = <0x74>;
+ };
+
+ spi1-csn1 {
+ rockchip,pins = <0x03 0x0a 0x02 0xb3>;
+ phandle = <0x75>;
+ };
+
+ spi1-miso {
+ rockchip,pins = <0x03 0x0e 0x04 0xb3>;
+ phandle = <0x76>;
+ };
+
+ spi1-mosi {
+ rockchip,pins = <0x03 0x0c 0x04 0xb3>;
+ phandle = <0x77>;
+ };
+
+ spi1-clk-hs {
+ rockchip,pins = <0x03 0x0f 0x04 0xb4>;
+ phandle = <0x78>;
+ };
+
+ spi1-miso-hs {
+ rockchip,pins = <0x03 0x0e 0x04 0xb4>;
+ phandle = <0x79>;
+ };
+
+ spi1-mosi-hs {
+ rockchip,pins = <0x03 0x0c 0x04 0xb4>;
+ phandle = <0x7a>;
+ };
+ };
+
+ pdm {
+
+ pdm-clk0m0 {
+ rockchip,pins = <0x03 0x16 0x02 0xb1>;
+ phandle = <0x44>;
+ };
+
+ pdm-clk0m1 {
+ rockchip,pins = <0x02 0x16 0x01 0xb1>;
+ phandle = <0x127>;
+ };
+
+ pdm-clk1 {
+ rockchip,pins = <0x03 0x17 0x02 0xb1>;
+ phandle = <0x45>;
+ };
+
+ pdm-sdi0m0 {
+ rockchip,pins = <0x03 0x1b 0x02 0xb1>;
+ phandle = <0x46>;
+ };
+
+ pdm-sdi0m1 {
+ rockchip,pins = <0x02 0x15 0x02 0xb1>;
+ phandle = <0x128>;
+ };
+
+ pdm-sdi1 {
+ rockchip,pins = <0x03 0x18 0x02 0xb1>;
+ phandle = <0x47>;
+ };
+
+ pdm-sdi2 {
+ rockchip,pins = <0x03 0x19 0x02 0xb1>;
+ phandle = <0x48>;
+ };
+
+ pdm-sdi3 {
+ rockchip,pins = <0x03 0x1a 0x02 0xb1>;
+ phandle = <0x49>;
+ };
+
+ pdm-clk0m0-sleep {
+ rockchip,pins = <0x03 0x16 0x00 0xb5>;
+ phandle = <0x129>;
+ };
+
+ pdm-clk0m1-sleep {
+ rockchip,pins = <0x02 0x16 0x00 0xb5>;
+ phandle = <0x12a>;
+ };
+
+ pdm-clk1-sleep {
+ rockchip,pins = <0x03 0x17 0x00 0xb5>;
+ phandle = <0x12b>;
+ };
+
+ pdm-sdi0m0-sleep {
+ rockchip,pins = <0x03 0x1b 0x00 0xb5>;
+ phandle = <0x12c>;
+ };
+
+ pdm-sdi0m1-sleep {
+ rockchip,pins = <0x02 0x15 0x00 0xb5>;
+ phandle = <0x12d>;
+ };
+
+ pdm-sdi1-sleep {
+ rockchip,pins = <0x03 0x18 0x00 0xb5>;
+ phandle = <0x12e>;
+ };
+
+ pdm-sdi2-sleep {
+ rockchip,pins = <0x03 0x19 0x00 0xb5>;
+ phandle = <0x12f>;
+ };
+
+ pdm-sdi3-sleep {
+ rockchip,pins = <0x03 0x1a 0x00 0xb5>;
+ phandle = <0x130>;
+ };
+ };
+
+ i2s0 {
+
+ i2s0-8ch-mclk {
+ rockchip,pins = <0x03 0x11 0x02 0xb1>;
+ phandle = <0x131>;
+ };
+
+ i2s0-8ch-sclktx {
+ rockchip,pins = <0x03 0x13 0x02 0xb1>;
+ phandle = <0x30>;
+ };
+
+ i2s0-8ch-sclkrx {
+ rockchip,pins = <0x03 0x0c 0x02 0xb1>;
+ phandle = <0x31>;
+ };
+
+ i2s0-8ch-lrcktx {
+ rockchip,pins = <0x03 0x12 0x02 0xb1>;
+ phandle = <0x32>;
+ };
+
+ i2s0-8ch-lrckrx {
+ rockchip,pins = <0x03 0x0d 0x02 0xb1>;
+ phandle = <0x33>;
+ };
+
+ i2s0-8ch-sdo0 {
+ rockchip,pins = <0x03 0x14 0x02 0xb1>;
+ phandle = <0x38>;
+ };
+
+ i2s0-8ch-sdo1 {
+ rockchip,pins = <0x03 0x10 0x02 0xb1>;
+ phandle = <0x39>;
+ };
+
+ i2s0-8ch-sdo2 {
+ rockchip,pins = <0x03 0x0f 0x02 0xb1>;
+ phandle = <0x3a>;
+ };
+
+ i2s0-8ch-sdo3 {
+ rockchip,pins = <0x03 0x0e 0x02 0xb1>;
+ phandle = <0x3b>;
+ };
+
+ i2s0-8ch-sdi0 {
+ rockchip,pins = <0x03 0x15 0x02 0xb1>;
+ phandle = <0x34>;
+ };
+
+ i2s0-8ch-sdi1 {
+ rockchip,pins = <0x03 0x0b 0x02 0xb1>;
+ phandle = <0x35>;
+ };
+
+ i2s0-8ch-sdi2 {
+ rockchip,pins = <0x03 0x09 0x02 0xb1>;
+ phandle = <0x36>;
+ };
+
+ i2s0-8ch-sdi3 {
+ rockchip,pins = <0x03 0x08 0x02 0xb1>;
+ phandle = <0x37>;
+ };
+ };
+
+ i2s1 {
+
+ i2s1-2ch-mclk {
+ rockchip,pins = <0x02 0x13 0x01 0xb1>;
+ phandle = <0x68>;
+ };
+
+ i2s1-2ch-sclk {
+ rockchip,pins = <0x02 0x12 0x01 0xb1>;
+ phandle = <0x3c>;
+ };
+
+ i2s1-2ch-lrck {
+ rockchip,pins = <0x02 0x11 0x01 0xb1>;
+ phandle = <0x3d>;
+ };
+
+ i2s1-2ch-sdi {
+ rockchip,pins = <0x02 0x15 0x01 0xb1>;
+ phandle = <0x3e>;
+ };
+
+ i2s1-2ch-sdo {
+ rockchip,pins = <0x02 0x14 0x01 0xb1>;
+ phandle = <0x3f>;
+ };
+ };
+
+ i2s2 {
+
+ i2s2-2ch-mclk {
+ rockchip,pins = <0x03 0x01 0x02 0xb1>;
+ phandle = <0x132>;
+ };
+
+ i2s2-2ch-sclk {
+ rockchip,pins = <0x03 0x02 0x02 0xb1>;
+ phandle = <0x40>;
+ };
+
+ i2s2-2ch-lrck {
+ rockchip,pins = <0x03 0x03 0x02 0xb1>;
+ phandle = <0x41>;
+ };
+
+ i2s2-2ch-sdi {
+ rockchip,pins = <0x03 0x05 0x02 0xb1>;
+ phandle = <0x42>;
+ };
+
+ i2s2-2ch-sdo {
+ rockchip,pins = <0x03 0x07 0x02 0xb1>;
+ phandle = <0x43>;
+ };
+ };
+
+ sdmmc {
+
+ sdmmc-clk {
+ rockchip,pins = <0x01 0x1e 0x01 0xb6>;
+ phandle = <0x8f>;
+ };
+
+ sdmmc-cmd {
+ rockchip,pins = <0x01 0x1f 0x01 0xb4>;
+ phandle = <0x90>;
+ };
+
+ sdmmc-det {
+ rockchip,pins = <0x00 0x03 0x01 0xb4>;
+ phandle = <0x91>;
+ };
+
+ sdmmc-bus1 {
+ rockchip,pins = <0x01 0x1a 0x01 0xb4>;
+ phandle = <0x133>;
+ };
+
+ sdmmc-bus4 {
+ rockchip,pins = <0x01 0x1a 0x01 0xb4 0x01 0x1b 0x01 0xb4 0x01 0x1c 0x01 0xb4 0x01 0x1d 0x01 0xb4>;
+ phandle = <0x92>;
+ };
+
+ sdmmc-gpio {
+ rockchip,pins = <0x01 0x1a 0x00 0xb3 0x01 0x1b 0x00 0xb3 0x01 0x1c 0x00 0xb3 0x01 0x1d 0x00 0xb3 0x01 0x1e 0x00 0xb3 0x01 0x1f 0x00 0xb3>;
+ phandle = <0x134>;
+ };
+ };
+
+ sdio {
+
+ sdio-clk {
+ rockchip,pins = <0x01 0x15 0x01 0xb1>;
+ phandle = <0x96>;
+ };
+
+ sdio-cmd {
+ rockchip,pins = <0x01 0x14 0x01 0xb2>;
+ phandle = <0x95>;
+ };
+
+ sdio-bus4 {
+ rockchip,pins = <0x01 0x16 0x01 0xb2 0x01 0x17 0x01 0xb2 0x01 0x18 0x01 0xb2 0x01 0x19 0x01 0xb2>;
+ phandle = <0x94>;
+ };
+
+ sdio-gpio {
+ rockchip,pins = <0x01 0x16 0x00 0xb2 0x01 0x17 0x00 0xb2 0x01 0x18 0x00 0xb2 0x01 0x19 0x00 0xb2 0x01 0x14 0x00 0xb2 0x01 0x15 0x00 0xb2>;
+ phandle = <0x135>;
+ };
+ };
+
+ emmc {
+
+ emmc-clk {
+ rockchip,pins = <0x01 0x09 0x02 0xb6>;
+ phandle = <0x136>;
+ };
+
+ emmc-cmd {
+ rockchip,pins = <0x01 0x0a 0x02 0xb4>;
+ phandle = <0x137>;
+ };
+
+ emmc-pwren {
+ rockchip,pins = <0x01 0x08 0x02 0xb1>;
+ phandle = <0x138>;
+ };
+
+ emmc-rstnout {
+ rockchip,pins = <0x01 0x0b 0x02 0xb1>;
+ phandle = <0x139>;
+ };
+
+ emmc-bus1 {
+ rockchip,pins = <0x01 0x00 0x02 0xb4>;
+ phandle = <0x13a>;
+ };
+
+ emmc-bus4 {
+ rockchip,pins = <0x01 0x00 0x02 0xb4 0x01 0x01 0x02 0xb4 0x01 0x02 0x02 0xb4 0x01 0x03 0x02 0xb4>;
+ phandle = <0x13b>;
+ };
+
+ emmc-bus8 {
+ rockchip,pins = <0x01 0x00 0x02 0xb4 0x01 0x01 0x02 0xb4 0x01 0x02 0x02 0xb4 0x01 0x03 0x02 0xb4 0x01 0x04 0x02 0xb4 0x01 0x05 0x02 0xb4 0x01 0x06 0x02 0xb4 0x01 0x07 0x02 0xb4>;
+ phandle = <0x13c>;
+ };
+ };
+
+ flash {
+
+ flash-cs0 {
+ rockchip,pins = <0x01 0x08 0x01 0xb1>;
+ phandle = <0x13d>;
+ };
+
+ flash-rdy {
+ rockchip,pins = <0x01 0x09 0x01 0xb1>;
+ phandle = <0x13e>;
+ };
+
+ flash-dqs {
+ rockchip,pins = <0x01 0x0a 0x01 0xb1>;
+ phandle = <0x13f>;
+ };
+
+ flash-ale {
+ rockchip,pins = <0x01 0x0b 0x01 0xb1>;
+ phandle = <0x140>;
+ };
+
+ flash-cle {
+ rockchip,pins = <0x01 0x0c 0x01 0xb1>;
+ phandle = <0x141>;
+ };
+
+ flash-wrn {
+ rockchip,pins = <0x01 0x0d 0x01 0xb1>;
+ phandle = <0x142>;
+ };
+
+ flash-csl {
+ rockchip,pins = <0x01 0x0e 0x01 0xb1>;
+ phandle = <0x143>;
+ };
+
+ flash-rdn {
+ rockchip,pins = <0x01 0x0f 0x01 0xb1>;
+ phandle = <0x144>;
+ };
+
+ flash-bus8 {
+ rockchip,pins = <0x01 0x00 0x01 0xb7 0x01 0x01 0x01 0xb7 0x01 0x02 0x01 0xb7 0x01 0x03 0x01 0xb7 0x01 0x04 0x01 0xb7 0x01 0x05 0x01 0xb7 0x01 0x06 0x01 0xb7 0x01 0x07 0x01 0xb7>;
+ phandle = <0x145>;
+ };
+ };
+
+ lcdc {
+
+ lcdc-m0-rgb-pins {
+ rockchip,pins = <0x03 0x00 0x01 0xb6 0x03 0x01 0x01 0xb6 0x03 0x02 0x01 0xb6 0x03 0x03 0x01 0xb6 0x03 0x04 0x01 0xb6 0x03 0x05 0x01 0xb6 0x03 0x06 0x01 0xb6 0x03 0x07 0x01 0xb6 0x03 0x08 0x01 0xb6 0x03 0x09 0x01 0xb6 0x03 0x0a 0x01 0xb6 0x03 0x0b 0x01 0xb6 0x03 0x0c 0x01 0xb6 0x03 0x0d 0x01 0xb6 0x03 0x0e 0x01 0xb6 0x03 0x0f 0x01 0xb6 0x03 0x10 0x01 0xb6 0x03 0x11 0x01 0xb6 0x03 0x12 0x01 0xb6 0x03 0x13 0x01 0xb6 0x03 0x14 0x01 0xb6 0x03 0x15 0x01 0xb6 0x03 0x16 0x01 0xb6 0x03 0x17 0x01 0xb6 0x03 0x18 0x01 0xb6 0x03 0x19 0x01 0xb6 0x03 0x1a 0x01 0xb6 0x03 0x1b 0x01 0xb6>;
+ phandle = <0x146>;
+ };
+
+ lcdc-m0-sleep-pins {
+ rockchip,pins = <0x03 0x00 0x00 0xb1 0x03 0x01 0x00 0xb1 0x03 0x02 0x00 0xb1 0x03 0x03 0x00 0xb1 0x03 0x04 0x00 0xb1 0x03 0x05 0x00 0xb1 0x03 0x06 0x00 0xb1 0x03 0x07 0x00 0xb1 0x03 0x08 0x00 0xb1 0x03 0x09 0x00 0xb1 0x03 0x0a 0x00 0xb1 0x03 0x0b 0x00 0xb1 0x03 0x0c 0x00 0xb1 0x03 0x0d 0x00 0xb1 0x03 0x0e 0x00 0xb1 0x03 0x0f 0x00 0xb1 0x03 0x10 0x00 0xb1 0x03 0x11 0x00 0xb1 0x03 0x12 0x00 0xb1 0x03 0x13 0x00 0xb1 0x03 0x14 0x00 0xb1 0x03 0x15 0x00 0xb1 0x03 0x16 0x00 0xb1 0x03 0x17 0x00 0xb1 0x03 0x18 0x00 0xb1 0x03 0x19 0x00 0xb1 0x03 0x1a 0x00 0xb1 0x03 0x1b 0x00 0xb1>;
+ phandle = <0x147>;
+ };
+
+ lcdc-m1-rgb-pins {
+ rockchip,pins = <0x03 0x00 0x01 0xb6 0x03 0x04 0x01 0xb6 0x03 0x06 0x01 0xb6 0x03 0x0a 0x01 0xb6 0x03 0x0b 0x01 0xb6 0x03 0x0d 0x01 0xb6 0x03 0x10 0x01 0xb6 0x03 0x11 0x01 0xb6 0x03 0x12 0x01 0xb6 0x03 0x13 0x01 0xb6 0x03 0x14 0x01 0xb6 0x03 0x15 0x01 0xb6 0x03 0x16 0x01 0xb6 0x03 0x17 0x01 0xb6 0x03 0x18 0x01 0xb6 0x03 0x19 0x01 0xb6 0x03 0x1a 0x01 0xb6 0x03 0x1b 0x01 0xb6>;
+ phandle = <0x4d>;
+ };
+
+ lcdc-m1-sleep-pins {
+ rockchip,pins = <0x03 0x00 0x00 0xb1 0x03 0x04 0x00 0xb1 0x03 0x06 0x00 0xb1 0x03 0x0a 0x00 0xb1 0x03 0x0b 0x00 0xb1 0x03 0x0d 0x00 0xb1 0x03 0x10 0x00 0xb1 0x03 0x11 0x00 0xb1 0x03 0x12 0x00 0xb1 0x03 0x13 0x00 0xb1 0x03 0x14 0x00 0xb1 0x03 0x15 0x00 0xb1 0x03 0x16 0x00 0xb1 0x03 0x17 0x00 0xb1 0x03 0x18 0x00 0xb1 0x03 0x19 0x00 0xb1 0x03 0x1a 0x00 0xb1 0x03 0x1b 0x00 0xb1>;
+ phandle = <0x4e>;
+ };
+ };
+
+ pwm0 {
+
+ pwm0-pin {
+ rockchip,pins = <0x00 0x0f 0x01 0xb1>;
+ phandle = <0x7b>;
+ };
+ };
+
+ pwm1 {
+
+ pwm1-pin {
+ rockchip,pins = <0x00 0x10 0x01 0xb1>;
+ phandle = <0x7c>;
+ };
+ };
+
+ pwm2 {
+
+ pwm2-pin {
+ rockchip,pins = <0x02 0x0d 0x01 0xb1>;
+ phandle = <0x7d>;
+ };
+ };
+
+ pwm3 {
+
+ pwm3-pin {
+ rockchip,pins = <0x00 0x11 0x01 0xb1>;
+ phandle = <0x7e>;
+ };
+ };
+
+ pwm4 {
+
+ pwm4-pin {
+ rockchip,pins = <0x03 0x12 0x03 0xb1>;
+ phandle = <0x7f>;
+ };
+ };
+
+ pwm5 {
+
+ pwm5-pin {
+ rockchip,pins = <0x03 0x13 0x03 0xb1>;
+ phandle = <0x80>;
+ };
+ };
+
+ pwm6 {
+
+ pwm6-pin {
+ rockchip,pins = <0x03 0x14 0x03 0xb1>;
+ phandle = <0x81>;
+ };
+ };
+
+ pwm7 {
+
+ pwm7-pin {
+ rockchip,pins = <0x03 0x15 0x03 0xb1>;
+ phandle = <0x82>;
+ };
+ };
+
+ gmac {
+
+ rmii-pins {
+ rockchip,pins = <0x02 0x00 0x02 0xb8 0x02 0x01 0x02 0xb8 0x02 0x02 0x02 0xb8 0x02 0x03 0x02 0xb1 0x02 0x04 0x02 0xb1 0x02 0x05 0x02 0xb1 0x02 0x06 0x02 0xb1 0x02 0x07 0x02 0xb1 0x02 0x09 0x02 0xb1>;
+ phandle = <0x8d>;
+ };
+
+ mac-refclk-12ma {
+ rockchip,pins = <0x02 0x0a 0x02 0xb8>;
+ phandle = <0x8e>;
+ };
+
+ mac-refclk {
+ rockchip,pins = <0x02 0x0a 0x02 0xb1>;
+ phandle = <0x148>;
+ };
+ };
+
+ cif-m0 {
+
+ cif-clkout-m0 {
+ rockchip,pins = <0x02 0x0b 0x01 0xb8>;
+ phandle = <0xa7>;
+ };
+
+ dvp-d2d9-m0 {
+ rockchip,pins = <0x02 0x00 0x01 0xb1 0x02 0x01 0x01 0xb1 0x02 0x02 0x01 0xb1 0x02 0x03 0x01 0xb1 0x02 0x04 0x01 0xb1 0x02 0x05 0x01 0xb1 0x02 0x06 0x01 0xb1 0x02 0x07 0x01 0xb1 0x02 0x08 0x01 0xb1 0x02 0x09 0x01 0xb1 0x02 0x0a 0x01 0xb1 0x02 0x0b 0x01 0xb1>;
+ phandle = <0xa5>;
+ };
+
+ dvp-d0d1-m0 {
+ rockchip,pins = <0x02 0x0c 0x01 0xb1 0x02 0x0e 0x01 0xb1>;
+ phandle = <0xa9>;
+ };
+
+ d10-d11-m0 {
+ rockchip,pins = <0x02 0x0f 0x01 0xb1 0x02 0x10 0x01 0xb1>;
+ phandle = <0xa8>;
+ };
+ };
+
+ cif-m1 {
+
+ cif-clkout-m1 {
+ rockchip,pins = <0x03 0x18 0x03 0xb1>;
+ phandle = <0x149>;
+ };
+
+ dvp-d2d9-m1 {
+ rockchip,pins = <0x03 0x03 0x03 0xb1 0x03 0x05 0x03 0xb1 0x03 0x07 0x03 0xb1 0x03 0x08 0x03 0xb1 0x03 0x09 0x03 0xb1 0x03 0x0c 0x03 0xb1 0x03 0x0e 0x03 0xb1 0x03 0x0f 0x03 0xb1 0x03 0x19 0x03 0xb1 0x03 0x1a 0x03 0xb1 0x03 0x1b 0x03 0xb1 0x03 0x18 0x03 0xb1>;
+ phandle = <0x14a>;
+ };
+
+ dvp-d0d1-m1 {
+ rockchip,pins = <0x03 0x01 0x03 0xb1 0x03 0x02 0x03 0xb1>;
+ phandle = <0x14b>;
+ };
+
+ d10-d11-m1 {
+ rockchip,pins = <0x03 0x16 0x03 0xb1 0x03 0x17 0x03 0xb1>;
+ phandle = <0x14c>;
+ };
+ };
+
+ isp {
+
+ isp-prelight {
+ rockchip,pins = <0x03 0x19 0x04 0xb1>;
+ phandle = <0x14d>;
+ };
+ };
+
+ pmic {
+
+ pmic_int {
+ rockchip,pins = <0x00 0x0a 0x00 0xb2 0x00 0x0b 0x00 0xb1>;
+ phandle = <0x5d>;
+ };
+
+ soc_slppin_gpio {
+ rockchip,pins = <0x00 0x04 0x00 0xb9>;
+ phandle = <0x60>;
+ };
+
+ soc_slppin_slp {
+ rockchip,pins = <0x00 0x04 0x01 0xb1>;
+ phandle = <0x5e>;
+ };
+
+ soc_slppin_rst {
+ rockchip,pins = <0x00 0x04 0x02 0xb1>;
+ phandle = <0x62>;
+ };
+ };
+
+ leds {
+
+ led-pins {
+ rockchip,pins = <0x00 0x11 0x00 0xb1>;
+ phandle = <0xc0>;
+ };
+ };
+
+ btns {
+
+ btn-pins {
+ rockchip,pins = <0x01 0x0c 0x00 0xb2 0x01 0x0d 0x00 0xb2 0x01 0x0e 0x00 0xb2 0x01 0x0f 0x00 0xb2 0x01 0x02 0x00 0xb2 0x01 0x05 0x00 0xb2 0x01 0x06 0x00 0xb2 0x01 0x07 0x00 0xb2 0x02 0x00 0x00 0xb2 0x02 0x01 0x00 0xb2 0x02 0x02 0x00 0xb2 0x02 0x03 0x00 0xb2 0x02 0x04 0x00 0xb2 0x02 0x05 0x00 0xb2 0x02 0x06 0x00 0xb2 0x02 0x07 0x00 0xb2 0x03 0x09 0x00 0xb2 0x03 0x0a 0x00 0xb2 0x03 0x0c 0x00 0xb2 0x03 0x0f 0x00 0xb2>;
+ phandle = <0xbd>;
+ };
+ };
+ };
+
+ chosen {
+ bootargs = [00];
+ };
+
+ fiq-debugger {
+ compatible = "rockchip,fiq-debugger";
+ rockchip,serial-id = <0x02>;
+ rockchip,wake-irq = <0x00>;
+ rockchip,irq-mode-enable = <0x00>;
+ rockchip,baudrate = <0x1c200>;
+ interrupts = <0x00 0x7f 0x08>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0xba>;
+ status = "okay";
+ };
+
+ ramoops {
+ compatible = "ramoops";
+ record-size = <0x00 0x20000>;
+ console-size = <0x00 0x80000>;
+ ftrace-size = <0x00 0x00>;
+ pmsg-size = <0x00 0x00>;
+ memory-region = <0xbb>;
+ };
+
+ reserved-memory {
+ #address-cells = <0x02>;
+ #size-cells = <0x02>;
+ ranges;
+
+ drm-logo@00000000 {
+ compatible = "rockchip,drm-logo";
+ reg = <0x00 0x00 0x00 0x00>;
+ phandle = <0x11>;
+ };
+
+ region@110000 {
+ reg = <0x00 0x110000 0x00 0xf0000>;
+ reg-names = "ramoops_mem";
+ phandle = <0xbb>;
+ };
+ };
+
+ odroidgo3-keys {
+ compatible = "gpio-keys";
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+ autorepeat;
+ phandle = <0x14e>;
+
+ button@0 {
+ label = "GPIO BTN-VOLUP";
+ linux,code = <0x73>;
+ gpios = <0x66 0x00 0x01>;
+ };
+
+ button@1 {
+ label = "GPIO BTN-VOLDN";
+ linux,code = <0x72>;
+ gpios = <0x66 0x01 0x01>;
+ };
+ };
+
+ odroidgo3-joypad {
+ compatible = "odroidgo3-joypad";
+ pwms = <0xbc 0x00 0xbebc200 0x00>;
+ pwm-names = "enable";
+ rumble-boost-weak = <0x00>;
+ rumble-boost-strong = <0x00>;
+ joypad-name = "GO-Super Gamepad";
+ joypad-product = <0x1100>;
+ joypad-revision = <0x100>;
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <0xbd>;
+ pinctrl-1 = <0x7b>;
+ io-channel-names = "amux_adc";
+ io-channels = <0xbe 0x01>;
+ amux-count = <0x04>;
+ amux-a-gpios = <0x97 0x0b 0x01>;
+ amux-b-gpios = <0x97 0x08 0x01>;
+ amux-en-gpios = <0x97 0x0d 0x01>;
+ button-adc-scale = <0x02>;
+ button-adc-deadzone = <0x40>;
+ button-adc-fuzz = <0x20>;
+ button-adc-flat = <0x20>;
+ abs_x-p-tuning = <0xc8>;
+ abs_x-n-tuning = <0xc8>;
+ abs_y-p-tuning = <0xc8>;
+ abs_y-n-tuning = <0xc8>;
+ abs_rx-p-tuning = <0xc8>;
+ abs_rx-n-tuning = <0xc8>;
+ abs_ry-p-tuning = <0xc8>;
+ abs_ry-n-tuning = <0xc8>;
+ poll-interval = <0x0a>;
+ invert-absx;
+ invert-absy;
+ phandle = <0x14f>;
+
+ sw1 {
+ gpios = <0xbf 0x0c 0x01>;
+ label = "GPIO DPAD-UP";
+ linux,code = <0x220>;
+ };
+
+ sw2 {
+ gpios = <0xbf 0x0d 0x01>;
+ label = "GPIO DPAD-DOWN";
+ linux,code = <0x221>;
+ };
+
+ sw3 {
+ gpios = <0xbf 0x0e 0x01>;
+ label = "GPIO DPAD-LEFT";
+ linux,code = <0x222>;
+ };
+
+ sw4 {
+ gpios = <0xbf 0x0f 0x01>;
+ label = "GPIO DPAD-RIGHT";
+ linux,code = <0x223>;
+ };
+
+ sw5 {
+ gpios = <0xbf 0x02 0x01>;
+ label = "GPIO KEY BTN-A";
+ linux,code = <0x131>;
+ };
+
+ sw6 {
+ gpios = <0xbf 0x05 0x01>;
+ label = "GPIO BTN-B";
+ linux,code = <0x130>;
+ };
+
+ sw7 {
+ gpios = <0xbf 0x06 0x01>;
+ label = "GPIO BTN-Y";
+ linux,code = <0x134>;
+ };
+
+ sw8 {
+ gpios = <0xbf 0x07 0x01>;
+ label = "GPIO BTN-X";
+ linux,code = <0x133>;
+ };
+
+ sw11 {
+ gpios = <0x66 0x02 0x01>;
+ label = "GPIO F3";
+ linux,code = <0x2c2>;
+ };
+
+ sw12 {
+ gpios = <0x66 0x03 0x01>;
+ label = "GPIO F4";
+ linux,code = <0x2c3>;
+ };
+
+ sw15 {
+ gpios = <0x66 0x06 0x01>;
+ label = "GPIO TOP-LEFT";
+ linux,code = <0x136>;
+ };
+
+ sw16 {
+ gpios = <0x66 0x07 0x01>;
+ label = "GPIO TOP-RIGHT";
+ linux,code = <0x137>;
+ };
+
+ sw19 {
+ gpios = <0x97 0x09 0x01>;
+ label = "GPIO F1";
+ linux,code = <0x2c0>;
+ };
+
+ sw20 {
+ gpios = <0x97 0x0f 0x01>;
+ label = "GPIO TOP-RIGHT2";
+ linux,code = <0x139>;
+ };
+
+ sw21 {
+ gpios = <0x97 0x0a 0x01>;
+ label = "GPIO TOP-LEFT2";
+ linux,code = <0x138>;
+ };
+
+ sw22 {
+ gpios = <0x97 0x0c 0x01>;
+ label = "GPIO F2";
+ linux,code = <0x2c1>;
+ };
+
+ sw13 {
+ gpios = <0x66 0x04 0x01>;
+ label = "GPIO F5";
+ linux,code = <0x2c4>;
+ };
+ };
+
+ gpio_leds {
+ compatible = "gpio-leds";
+ pinctrl-names = "led_pins";
+ pinctrl-0 = <0xc0>;
+ phandle = <0x150>;
+
+ heartbeat {
+ label = "blue:heartbeat";
+ gpios = <0x5c 0x11 0x00>;
+ linux,default-trigger = "heartbeat";
+ };
+ };
+
+ backlight {
+ compatible = "pwm-backlight";
+ pwms = <0xc1 0x00 0xf519 0x00>;
+ brightness-levels = <0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f 0x20 0x21 0x22 0x23 0x24 0x25 0x26 0x27 0x28 0x29 0x2a 0x2b 0x2c 0x2d 0x2e 0x2f 0x30 0x31 0x32 0x33 0x34 0x35 0x36 0x37 0x38 0x39 0x3a 0x3b 0x3c 0x3d 0x3e 0x3f 0x40 0x41 0x42 0x43 0x44 0x45 0x46 0x47 0x48 0x49 0x4a 0x4b 0x4c 0x4d 0x4e 0x4f 0x50 0x51 0x52 0x53 0x54 0x55 0x56 0x57 0x58 0x59 0x5a 0x5b 0x5c 0x5d 0x5e 0x5f 0x60 0x61 0x62 0x63 0x64 0x65 0x66 0x67 0x68 0x69 0x6a 0x6b 0x6c 0x6d 0x6e 0x6f 0x70 0x71 0x72 0x73 0x74 0x75 0x76 0x77 0x78 0x79 0x7a 0x7b 0x7c 0x7d 0x7e 0x7f 0x80 0x81 0x82 0x83 0x84 0x85 0x86 0x87 0x88 0x89 0x8a 0x8b 0x8c 0x8d 0x8e 0x8f 0x90 0x91 0x92 0x93 0x94 0x95 0x96 0x97 0x98 0x99 0x9a 0x9b 0x9c 0x9d 0x9e 0x9f 0xa0>;
+ default-brightness-level = <0x33>;
+ phandle = <0x9d>;
+ };
+
+ rk817-sound {
+ compatible = "simple-audio-card";
+ simple-audio-card,format = "i2s";
+ simple-audio-card,name = "rockchip,rk817-codec";
+ simple-audio-card,mclk-fs = <0x100>;
+ simple-audio-card,widgets = "Microphone\0Mic Jack\0Headphone\0Headphone Jack";
+ simple-audio-card,routing = "MIC_IN\0Mic Jack\0Headphone Jack\0HPOL\0Headphone Jack\0HPOR";
+ simple-audio-card,hp-det-gpio = <0x66 0x16 0x01>;
+ simple-audio-card,codec-hp-det = <0x01>;
+
+ simple-audio-card,cpu {
+ sound-dai = <0xc2>;
+ };
+
+ simple-audio-card,codec {
+ sound-dai = <0xc3>;
+ };
+ };
+
+ vccsys {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v8_sys";
+ regulator-always-on;
+ regulator-min-microvolt = <0x39fbc0>;
+ regulator-max-microvolt = <0x39fbc0>;
+ phandle = <0x64>;
+ };
+
+ __symbols__ {
+ ddr_timing = "/ddr_timing";
+ cpu0 = "/cpus/cpu@0";
+ cpu1 = "/cpus/cpu@1";
+ cpu2 = "/cpus/cpu@2";
+ cpu3 = "/cpus/cpu@3";
+ CPU_SLEEP = "/cpus/idle-states/cpu-sleep";
+ CLUSTER_SLEEP = "/cpus/idle-states/cluster-sleep";
+ cpu0_opp_table = "/cpu0-opp-table";
+ bus_soc = "/bus-soc";
+ bus_apll = "/bus-apll";
+ bus_apll_opp_table = "/bus-apll-opp-table";
+ display_subsystem = "/display-subsystem";
+ route_lvds = "/display-subsystem/route/route-lvds";
+ route_dsi = "/display-subsystem/route/route-dsi";
+ route_rgb = "/display-subsystem/route/route-rgb";
+ gmac_clkin = "/external-gmac-clock";
+ rockchip_suspend = "/rockchip-suspend";
+ xin24m = "/xin24m";
+ xin32k = "/xin32k";
+ pmu = "/power-management@ff000000";
+ power = "/power-management@ff000000/power-controller";
+ pmugrf = "/syscon@ff010000";
+ pmu_io_domains = "/syscon@ff010000/io-domains";
+ pmu_pvtm = "/syscon@ff010000/pmu-pvtm";
+ uart0 = "/serial@ff030000";
+ i2s0_8ch = "/i2s@ff060000";
+ i2s1_2ch = "/i2s@ff070000";
+ i2s2_2ch = "/i2s@ff080000";
+ pdm = "/pdm@ff0a0000";
+ crypto = "/crypto@ff0b0000";
+ rng = "/rng@ff0b0000";
+ gic = "/interrupt-controller@ff131000";
+ grf = "/syscon@ff140000";
+ io_domains = "/syscon@ff140000/io-domains";
+ lvds = "/syscon@ff140000/lvds";
+ lvds_in_vopb = "/syscon@ff140000/lvds/ports/port@0/endpoint@0";
+ rgb = "/syscon@ff140000/rgb";
+ rgb_in_vopb = "/syscon@ff140000/rgb/ports/port@0/endpoint@0";
+ core_grf = "/syscon@ff148000";
+ pvtm = "/syscon@ff148000/pvtm";
+ uart1 = "/serial@ff158000";
+ uart2 = "/serial@ff160000";
+ uart3 = "/serial@ff168000";
+ uart4 = "/serial@ff170000";
+ uart5 = "/serial@ff178000";
+ i2c0 = "/i2c@ff180000";
+ rk817 = "/i2c@ff180000/pmic@20";
+ pinctrl_rk8xx = "/i2c@ff180000/pmic@20/pinctrl_rk8xx";
+ rk817_ts_gpio1 = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_ts_gpio1";
+ rk817_gt_gpio2 = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_gt_gpio2";
+ rk817_pin_ts = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_pin_ts";
+ rk817_pin_gt = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_pin_gt";
+ rk817_slppin_null = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_slppin_null";
+ rk817_slppin_slp = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_slppin_slp";
+ rk817_slppin_pwrdn = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_slppin_pwrdn";
+ rk817_slppin_rst = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_slppin_rst";
+ vdd_logic = "/i2c@ff180000/pmic@20/regulators/DCDC_REG1";
+ vdd_arm = "/i2c@ff180000/pmic@20/regulators/DCDC_REG2";
+ vcc_ddr = "/i2c@ff180000/pmic@20/regulators/DCDC_REG3";
+ vcc_3v3 = "/i2c@ff180000/pmic@20/regulators/DCDC_REG4";
+ vcc_1v0 = "/i2c@ff180000/pmic@20/regulators/LDO_REG1";
+ vcc1v8_soc = "/i2c@ff180000/pmic@20/regulators/LDO_REG2";
+ vdd1v0_soc = "/i2c@ff180000/pmic@20/regulators/LDO_REG3";
+ vcc3v3_pmu = "/i2c@ff180000/pmic@20/regulators/LDO_REG4";
+ vccio_sd = "/i2c@ff180000/pmic@20/regulators/LDO_REG5";
+ vcc_sd = "/i2c@ff180000/pmic@20/regulators/LDO_REG6";
+ vcc_backlight = "/i2c@ff180000/pmic@20/regulators/LDO_REG7";
+ vcc_lcd = "/i2c@ff180000/pmic@20/regulators/LDO_REG8";
+ dcdc_boost = "/i2c@ff180000/pmic@20/regulators/BOOST";
+ otg_switch = "/i2c@ff180000/pmic@20/regulators/OTG_SWITCH";
+ rk817_codec = "/i2c@ff180000/pmic@20/codec";
+ i2c1 = "/i2c@ff190000";
+ i2c2 = "/i2c@ff1a0000";
+ i2c3 = "/i2c@ff1b0000";
+ spi0 = "/spi@ff1d0000";
+ spi1 = "/spi@ff1d8000";
+ wdt = "/watchdog@ff1e0000";
+ pwm0 = "/pwm@ff200000";
+ pwm1 = "/pwm@ff200010";
+ pwm2 = "/pwm@ff200020";
+ pwm3 = "/pwm@ff200030";
+ pwm4 = "/pwm@ff208000";
+ pwm5 = "/pwm@ff208010";
+ pwm6 = "/pwm@ff208020";
+ pwm7 = "/pwm@ff208030";
+ rktimer = "/rktimer@ff210000";
+ dmac = "/amba/dmac@ff240000";
+ thermal_zones = "/thermal-zones";
+ soc_thermal = "/thermal-zones/soc-thermal";
+ threshold = "/thermal-zones/soc-thermal/trips/trip-point-0";
+ target = "/thermal-zones/soc-thermal/trips/trip-point-1";
+ soc_crit = "/thermal-zones/soc-thermal/trips/soc-crit";
+ gpu_thermal = "/thermal-zones/gpu-thermal";
+ tsadc = "/tsadc@ff280000";
+ saradc = "/saradc@ff288000";
+ otp = "/otp@ff290000";
+ otp_id = "/otp@ff290000/id@7";
+ cpu_leakage = "/otp@ff290000/cpu-leakage@17";
+ performance = "/otp@ff290000/performance@1e";
+ cru = "/clock-controller@ff2b0000";
+ cpu_boost = "/cpu-boost@ff2b8000";
+ pmucru = "/pmu-clock-controller@ff2bc000";
+ usb2phy_grf = "/syscon@ff2c0000";
+ u2phy = "/syscon@ff2c0000/usb2-phy@100";
+ u2phy_host = "/syscon@ff2c0000/usb2-phy@100/host-port";
+ u2phy_otg = "/syscon@ff2c0000/usb2-phy@100/otg-port";
+ video_phy = "/video-phy@ff2e0000";
+ mipi_dphy_rx0 = "/mipi-dphy-rx0@ff2f0000";
+ usb20_otg = "/usb@ff300000";
+ usb_host0_ehci = "/usb@ff340000";
+ usb_host0_ohci = "/usb@ff350000";
+ gmac = "/ethernet@ff360000";
+ sdmmc = "/dwmmc@ff370000";
+ sdio = "/dwmmc@ff380000";
+ emmc = "/dwmmc@ff390000";
+ nandc0 = "/nandc@ff3b0000";
+ sfc = "/sfc@ff3a0000";
+ gpu = "/gpu@ff400000";
+ gpu_opp_table = "/gpu-opp-table";
+ hevc = "/hevc_service@ff440000";
+ vpu = "/vpu_service@ff442000";
+ vpu_combo = "/vpu_combo";
+ hevc_mmu = "/iommu@ff440440";
+ vpu_mmu = "/iommu@ff442800";
+ dsi = "/dsi@ff450000";
+ dsi_in_vopb = "/dsi@ff450000/ports/port@0/endpoint@0";
+ timing0 = "/dsi@ff450000/panel@0/display-timings/60Hz";
+ timing1 = "/dsi@ff450000/panel@0/display-timings/50Hz";
+ timing2 = "/dsi@ff450000/panel@0/display-timings/75Hz";
+ vopb = "/vop@ff460000";
+ vopb_out = "/vop@ff460000/port";
+ vopb_out_lvds = "/vop@ff460000/port/endpoint@0";
+ vopb_out_dsi = "/vop@ff460000/port/endpoint@1";
+ vopb_out_rgb = "/vop@ff460000/port/endpoint@2";
+ vopb_mmu = "/iommu@ff460f00";
+ rk_rga = "/rk_rga@ff480000";
+ cif = "/cif@ff490000";
+ cif_new = "/cif-new@ff490000";
+ vip_mmu = "/iommu@ff490800";
+ rk_isp = "/rk_isp@ff4a0000";
+ rkisp1 = "/rkisp1@ff4a0000";
+ isp_mmu = "/iommu@ff4a8000";
+ qos_gmac = "/qos@ff518000";
+ qos_gpu = "/qos@ff520000";
+ qos_sdmmc = "/qos@ff52c000";
+ qos_emmc = "/qos@ff538000";
+ qos_nand = "/qos@ff538080";
+ qos_sdio = "/qos@ff538100";
+ qos_sfc = "/qos@ff538180";
+ qos_usb_host = "/qos@ff540000";
+ qos_usb_otg = "/qos@ff540080";
+ qos_isp_128 = "/qos@ff548000";
+ qos_isp_rd = "/qos@ff548080";
+ qos_isp_wr = "/qos@ff548100";
+ qos_isp_m1 = "/qos@ff548180";
+ qos_vip = "/qos@ff548200";
+ qos_rga_rd = "/qos@ff550000";
+ qos_rga_wr = "/qos@ff550080";
+ qos_vop_m0 = "/qos@ff550100";
+ qos_vop_m1 = "/qos@ff550180";
+ qos_vpu = "/qos@ff558000";
+ qos_vpu_r128 = "/qos@ff558080";
+ dfi = "/dfi@ff610000";
+ dmc = "/dmc";
+ ddr_power_model = "/dmc/ddr_power_model";
+ dmc_opp_table = "/dmc-opp-table";
+ rockchip_system_monitor = "/rockchip-system-monitor";
+ pinctrl = "/pinctrl";
+ gpio0 = "/pinctrl/gpio0@ff040000";
+ gpio1 = "/pinctrl/gpio1@ff250000";
+ gpio2 = "/pinctrl/gpio2@ff260000";
+ gpio3 = "/pinctrl/gpio3@ff270000";
+ pcfg_pull_up = "/pinctrl/pcfg-pull-up";
+ pcfg_pull_down = "/pinctrl/pcfg-pull-down";
+ pcfg_pull_none = "/pinctrl/pcfg-pull-none";
+ pcfg_pull_none_2ma = "/pinctrl/pcfg-pull-none-2ma";
+ pcfg_pull_up_2ma = "/pinctrl/pcfg-pull-up-2ma";
+ pcfg_pull_up_4ma = "/pinctrl/pcfg-pull-up-4ma";
+ pcfg_pull_none_4ma = "/pinctrl/pcfg-pull-none-4ma";
+ pcfg_pull_down_4ma = "/pinctrl/pcfg-pull-down-4ma";
+ pcfg_pull_none_8ma = "/pinctrl/pcfg-pull-none-8ma";
+ pcfg_pull_up_8ma = "/pinctrl/pcfg-pull-up-8ma";
+ pcfg_pull_none_12ma = "/pinctrl/pcfg-pull-none-12ma";
+ pcfg_pull_up_12ma = "/pinctrl/pcfg-pull-up-12ma";
+ pcfg_pull_none_smt = "/pinctrl/pcfg-pull-none-smt";
+ pcfg_output_high = "/pinctrl/pcfg-output-high";
+ pcfg_output_low = "/pinctrl/pcfg-output-low";
+ pcfg_input_high = "/pinctrl/pcfg-input-high";
+ pcfg_input = "/pinctrl/pcfg-input";
+ i2c0_xfer = "/pinctrl/i2c0/i2c0-xfer";
+ i2c1_xfer = "/pinctrl/i2c1/i2c1-xfer";
+ i2c2_xfer = "/pinctrl/i2c2/i2c2-xfer";
+ i2c3_xfer = "/pinctrl/i2c3/i2c3-xfer";
+ tsadc_otp_gpio = "/pinctrl/tsadc/tsadc-otp-gpio";
+ tsadc_otp_out = "/pinctrl/tsadc/tsadc-otp-out";
+ uart0_xfer = "/pinctrl/uart0/uart0-xfer";
+ uart0_cts = "/pinctrl/uart0/uart0-cts";
+ uart0_rts = "/pinctrl/uart0/uart0-rts";
+ uart0_rts_gpio = "/pinctrl/uart0/uart0-rts-gpio";
+ uart1_xfer = "/pinctrl/uart1/uart1-xfer";
+ uart1_cts = "/pinctrl/uart1/uart1-cts";
+ uart1_rts = "/pinctrl/uart1/uart1-rts";
+ uart1_rts_gpio = "/pinctrl/uart1/uart1-rts-gpio";
+ uart2m0_xfer = "/pinctrl/uart2-m0/uart2m0-xfer";
+ uart2m1_xfer = "/pinctrl/uart2-m1/uart2m1-xfer";
+ uart3m0_xfer = "/pinctrl/uart3-m0/uart3m0-xfer";
+ uart3m0_cts = "/pinctrl/uart3-m0/uart3m0-cts";
+ uart3m0_rts = "/pinctrl/uart3-m0/uart3m0-rts";
+ uart3m0_rts_gpio = "/pinctrl/uart3-m0/uart3m0-rts-gpio";
+ uart3m1_xfer = "/pinctrl/uart3-m1/uart3m1-xfer";
+ uart3m1_cts = "/pinctrl/uart3-m1/uart3m1-cts";
+ uart3m1_rts = "/pinctrl/uart3-m1/uart3m1-rts";
+ uart3m1_rts_gpio = "/pinctrl/uart3-m1/uart3m1-rts-gpio";
+ uart4_xfer = "/pinctrl/uart4/uart4-xfer";
+ uart4_cts = "/pinctrl/uart4/uart4-cts";
+ uart4_rts = "/pinctrl/uart4/uart4-rts";
+ uart5_xfer = "/pinctrl/uart5/uart5-xfer";
+ uart5_cts = "/pinctrl/uart5/uart5-cts";
+ uart5_rts = "/pinctrl/uart5/uart5-rts";
+ spi0_clk = "/pinctrl/spi0/spi0-clk";
+ spi0_csn = "/pinctrl/spi0/spi0-csn";
+ spi0_miso = "/pinctrl/spi0/spi0-miso";
+ spi0_mosi = "/pinctrl/spi0/spi0-mosi";
+ spi0_clk_hs = "/pinctrl/spi0/spi0-clk-hs";
+ spi0_miso_hs = "/pinctrl/spi0/spi0-miso-hs";
+ spi0_mosi_hs = "/pinctrl/spi0/spi0-mosi-hs";
+ spi1_clk = "/pinctrl/spi1/spi1-clk";
+ spi1_csn0 = "/pinctrl/spi1/spi1-csn0";
+ spi1_csn1 = "/pinctrl/spi1/spi1-csn1";
+ spi1_miso = "/pinctrl/spi1/spi1-miso";
+ spi1_mosi = "/pinctrl/spi1/spi1-mosi";
+ spi1_clk_hs = "/pinctrl/spi1/spi1-clk-hs";
+ spi1_miso_hs = "/pinctrl/spi1/spi1-miso-hs";
+ spi1_mosi_hs = "/pinctrl/spi1/spi1-mosi-hs";
+ pdm_clk0m0 = "/pinctrl/pdm/pdm-clk0m0";
+ pdm_clk0m1 = "/pinctrl/pdm/pdm-clk0m1";
+ pdm_clk1 = "/pinctrl/pdm/pdm-clk1";
+ pdm_sdi0m0 = "/pinctrl/pdm/pdm-sdi0m0";
+ pdm_sdi0m1 = "/pinctrl/pdm/pdm-sdi0m1";
+ pdm_sdi1 = "/pinctrl/pdm/pdm-sdi1";
+ pdm_sdi2 = "/pinctrl/pdm/pdm-sdi2";
+ pdm_sdi3 = "/pinctrl/pdm/pdm-sdi3";
+ pdm_clk0m0_sleep = "/pinctrl/pdm/pdm-clk0m0-sleep";
+ pdm_clk0m_sleep1 = "/pinctrl/pdm/pdm-clk0m1-sleep";
+ pdm_clk1_sleep = "/pinctrl/pdm/pdm-clk1-sleep";
+ pdm_sdi0m0_sleep = "/pinctrl/pdm/pdm-sdi0m0-sleep";
+ pdm_sdi0m1_sleep = "/pinctrl/pdm/pdm-sdi0m1-sleep";
+ pdm_sdi1_sleep = "/pinctrl/pdm/pdm-sdi1-sleep";
+ pdm_sdi2_sleep = "/pinctrl/pdm/pdm-sdi2-sleep";
+ pdm_sdi3_sleep = "/pinctrl/pdm/pdm-sdi3-sleep";
+ i2s0_8ch_mclk = "/pinctrl/i2s0/i2s0-8ch-mclk";
+ i2s0_8ch_sclktx = "/pinctrl/i2s0/i2s0-8ch-sclktx";
+ i2s0_8ch_sclkrx = "/pinctrl/i2s0/i2s0-8ch-sclkrx";
+ i2s0_8ch_lrcktx = "/pinctrl/i2s0/i2s0-8ch-lrcktx";
+ i2s0_8ch_lrckrx = "/pinctrl/i2s0/i2s0-8ch-lrckrx";
+ i2s0_8ch_sdo0 = "/pinctrl/i2s0/i2s0-8ch-sdo0";
+ i2s0_8ch_sdo1 = "/pinctrl/i2s0/i2s0-8ch-sdo1";
+ i2s0_8ch_sdo2 = "/pinctrl/i2s0/i2s0-8ch-sdo2";
+ i2s0_8ch_sdo3 = "/pinctrl/i2s0/i2s0-8ch-sdo3";
+ i2s0_8ch_sdi0 = "/pinctrl/i2s0/i2s0-8ch-sdi0";
+ i2s0_8ch_sdi1 = "/pinctrl/i2s0/i2s0-8ch-sdi1";
+ i2s0_8ch_sdi2 = "/pinctrl/i2s0/i2s0-8ch-sdi2";
+ i2s0_8ch_sdi3 = "/pinctrl/i2s0/i2s0-8ch-sdi3";
+ i2s1_2ch_mclk = "/pinctrl/i2s1/i2s1-2ch-mclk";
+ i2s1_2ch_sclk = "/pinctrl/i2s1/i2s1-2ch-sclk";
+ i2s1_2ch_lrck = "/pinctrl/i2s1/i2s1-2ch-lrck";
+ i2s1_2ch_sdi = "/pinctrl/i2s1/i2s1-2ch-sdi";
+ i2s1_2ch_sdo = "/pinctrl/i2s1/i2s1-2ch-sdo";
+ i2s2_2ch_mclk = "/pinctrl/i2s2/i2s2-2ch-mclk";
+ i2s2_2ch_sclk = "/pinctrl/i2s2/i2s2-2ch-sclk";
+ i2s2_2ch_lrck = "/pinctrl/i2s2/i2s2-2ch-lrck";
+ i2s2_2ch_sdi = "/pinctrl/i2s2/i2s2-2ch-sdi";
+ i2s2_2ch_sdo = "/pinctrl/i2s2/i2s2-2ch-sdo";
+ sdmmc_clk = "/pinctrl/sdmmc/sdmmc-clk";
+ sdmmc_cmd = "/pinctrl/sdmmc/sdmmc-cmd";
+ sdmmc_det = "/pinctrl/sdmmc/sdmmc-det";
+ sdmmc_bus1 = "/pinctrl/sdmmc/sdmmc-bus1";
+ sdmmc_bus4 = "/pinctrl/sdmmc/sdmmc-bus4";
+ sdmmc_gpio = "/pinctrl/sdmmc/sdmmc-gpio";
+ sdio_clk = "/pinctrl/sdio/sdio-clk";
+ sdio_cmd = "/pinctrl/sdio/sdio-cmd";
+ sdio_bus4 = "/pinctrl/sdio/sdio-bus4";
+ sdio_gpio = "/pinctrl/sdio/sdio-gpio";
+ emmc_clk = "/pinctrl/emmc/emmc-clk";
+ emmc_cmd = "/pinctrl/emmc/emmc-cmd";
+ emmc_pwren = "/pinctrl/emmc/emmc-pwren";
+ emmc_rstnout = "/pinctrl/emmc/emmc-rstnout";
+ emmc_bus1 = "/pinctrl/emmc/emmc-bus1";
+ emmc_bus4 = "/pinctrl/emmc/emmc-bus4";
+ emmc_bus8 = "/pinctrl/emmc/emmc-bus8";
+ flash_cs0 = "/pinctrl/flash/flash-cs0";
+ flash_rdy = "/pinctrl/flash/flash-rdy";
+ flash_dqs = "/pinctrl/flash/flash-dqs";
+ flash_ale = "/pinctrl/flash/flash-ale";
+ flash_cle = "/pinctrl/flash/flash-cle";
+ flash_wrn = "/pinctrl/flash/flash-wrn";
+ flash_csl = "/pinctrl/flash/flash-csl";
+ flash_rdn = "/pinctrl/flash/flash-rdn";
+ flash_bus8 = "/pinctrl/flash/flash-bus8";
+ lcdc_m0_rgb_pins = "/pinctrl/lcdc/lcdc-m0-rgb-pins";
+ lcdc_m0_sleep_pins = "/pinctrl/lcdc/lcdc-m0-sleep-pins";
+ lcdc_m1_rgb_pins = "/pinctrl/lcdc/lcdc-m1-rgb-pins";
+ lcdc_m1_sleep_pins = "/pinctrl/lcdc/lcdc-m1-sleep-pins";
+ pwm0_pin = "/pinctrl/pwm0/pwm0-pin";
+ pwm1_pin = "/pinctrl/pwm1/pwm1-pin";
+ pwm2_pin = "/pinctrl/pwm2/pwm2-pin";
+ pwm3_pin = "/pinctrl/pwm3/pwm3-pin";
+ pwm4_pin = "/pinctrl/pwm4/pwm4-pin";
+ pwm5_pin = "/pinctrl/pwm5/pwm5-pin";
+ pwm6_pin = "/pinctrl/pwm6/pwm6-pin";
+ pwm7_pin = "/pinctrl/pwm7/pwm7-pin";
+ rmii_pins = "/pinctrl/gmac/rmii-pins";
+ mac_refclk_12ma = "/pinctrl/gmac/mac-refclk-12ma";
+ mac_refclk = "/pinctrl/gmac/mac-refclk";
+ cif_clkout_m0 = "/pinctrl/cif-m0/cif-clkout-m0";
+ dvp_d2d9_m0 = "/pinctrl/cif-m0/dvp-d2d9-m0";
+ dvp_d0d1_m0 = "/pinctrl/cif-m0/dvp-d0d1-m0";
+ dvp_d10d11_m0 = "/pinctrl/cif-m0/d10-d11-m0";
+ cif_clkout_m1 = "/pinctrl/cif-m1/cif-clkout-m1";
+ dvp_d2d9_m1 = "/pinctrl/cif-m1/dvp-d2d9-m1";
+ dvp_d0d1_m1 = "/pinctrl/cif-m1/dvp-d0d1-m1";
+ dvp_d10d11_m1 = "/pinctrl/cif-m1/d10-d11-m1";
+ isp_prelight = "/pinctrl/isp/isp-prelight";
+ pmic_int = "/pinctrl/pmic/pmic_int";
+ soc_slppin_gpio = "/pinctrl/pmic/soc_slppin_gpio";
+ soc_slppin_slp = "/pinctrl/pmic/soc_slppin_slp";
+ soc_slppin_rst = "/pinctrl/pmic/soc_slppin_rst";
+ led_pins = "/pinctrl/leds/led-pins";
+ btn_pins = "/pinctrl/btns/btn-pins";
+ drm_logo = "/reserved-memory/drm-logo@00000000";
+ ramoops_mem = "/reserved-memory/region@110000";
+ gpio_keys = "/odroidgo3-keys";
+ joypad = "/odroidgo3-joypad";
+ leds = "/gpio_leds";
+ backlight = "/backlight";
+ vccsys = "/vccsys";
+ };
+};
diff --git a/config/archr-dts/R36S-DTB/DTS/Panel4-V22.dts b/config/archr-dts/R36S-DTB/DTS/Panel4-V22.dts
new file mode 100644
index 0000000000..dd9948e821
--- /dev/null
+++ b/config/archr-dts/R36S-DTB/DTS/Panel4-V22.dts
@@ -0,0 +1,4075 @@
+
+/dts-v1/;
+
+/ {
+ compatible = "rockchip,rk3326-odroidgo3-linux\0rockchip,rk3326";
+ interrupt-parent = <0x01>;
+ #address-cells = <0x02>;
+ #size-cells = <0x02>;
+ model = "Game Console R36S V22";
+
+
+ ddr_timing {
+ compatible = "rockchip,ddr-timing";
+ ddr2_speed_bin = <0x00>;
+ ddr3_speed_bin = <0x15>;
+ ddr4_speed_bin = <0x0c>;
+ pd_idle = <0x0d>;
+ sr_idle = <0x5d>;
+ sr_mc_gate_idle = <0x00>;
+ srpd_lite_idle = <0x00>;
+ standby_idle = <0x00>;
+ auto_pd_dis_freq = <0x42a>;
+ auto_sr_dis_freq = <0x320>;
+ ddr2_dll_dis_freq = <0x12c>;
+ ddr3_dll_dis_freq = <0x12c>;
+ ddr4_dll_dis_freq = <0x271>;
+ phy_dll_dis_freq = <0x190>;
+ ddr2_odt_dis_freq = <0x64>;
+ phy_ddr2_odt_dis_freq = <0x64>;
+ ddr2_drv = <0x01>;
+ ddr2_odt = <0x96>;
+ phy_ddr2_ca_drv = <0x15>;
+ phy_ddr2_ck_drv = <0x12>;
+ phy_ddr2_dq_drv = <0x15>;
+ phy_ddr2_odt = <0x02>;
+ ddr3_odt_dis_freq = <0x190>;
+ phy_ddr3_odt_dis_freq = <0x190>;
+ ddr3_drv = <0x28>;
+ ddr3_odt = <0x78>;
+ phy_ddr3_ca_drv = <0x15>;
+ phy_ddr3_ck_drv = <0x12>;
+ phy_ddr3_dq_drv = <0x15>;
+ phy_ddr3_odt = <0x02>;
+ phy_lpddr2_odt_dis_freq = <0x29a>;
+ lpddr2_drv = <0x28>;
+ phy_lpddr2_ca_drv = <0x16>;
+ phy_lpddr2_ck_drv = <0x13>;
+ phy_lpddr2_dq_drv = <0x16>;
+ phy_lpddr2_odt = <0x00>;
+ lpddr3_odt_dis_freq = <0x190>;
+ phy_lpddr3_odt_dis_freq = <0x190>;
+ lpddr3_drv = <0x28>;
+ lpddr3_odt = <0xf0>;
+ phy_lpddr3_ca_drv = <0x16>;
+ phy_lpddr3_ck_drv = <0x13>;
+ phy_lpddr3_dq_drv = <0x16>;
+ phy_lpddr3_odt = <0x02>;
+ lpddr4_odt_dis_freq = <0x320>;
+ phy_lpddr4_odt_dis_freq = <0x320>;
+ lpddr4_drv = <0x3c>;
+ lpddr4_dq_odt = <0x28>;
+ lpddr4_ca_odt = <0x28>;
+ phy_lpddr4_ca_drv = <0x14>;
+ phy_lpddr4_ck_cs_drv = <0x06>;
+ phy_lpddr4_dq_drv = <0x06>;
+ phy_lpddr4_odt = <0x10>;
+ ddr4_odt_dis_freq = <0x29a>;
+ phy_ddr4_odt_dis_freq = <0x29a>;
+ ddr4_drv = <0x22>;
+ ddr4_odt = <0xf0>;
+ phy_ddr4_ca_drv = <0x16>;
+ phy_ddr4_ck_drv = <0x13>;
+ phy_ddr4_dq_drv = <0x16>;
+ phy_ddr4_odt = <0x02>;
+ ddr3a1_ddr4a9_de-skew = <0x06>;
+ ddr3a0_ddr4a10_de-skew = <0x07>;
+ ddr3a3_ddr4a6_de-skew = <0x07>;
+ ddr3a2_ddr4a4_de-skew = <0x07>;
+ ddr3a5_ddr4a8_de-skew = <0x07>;
+ ddr3a4_ddr4a5_de-skew = <0x07>;
+ ddr3a7_ddr4a11_de-skew = <0x07>;
+ ddr3a6_ddr4a7_de-skew = <0x06>;
+ ddr3a9_ddr4a0_de-skew = <0x07>;
+ ddr3a8_ddr4a13_de-skew = <0x07>;
+ ddr3a11_ddr4a3_de-skew = <0x07>;
+ ddr3a10_ddr4cs0_de-skew = <0x07>;
+ ddr3a13_ddr4a2_de-skew = <0x07>;
+ ddr3a12_ddr4ba1_de-skew = <0x07>;
+ ddr3a15_ddr4odt0_de-skew = <0x07>;
+ ddr3a14_ddr4a1_de-skew = <0x07>;
+ ddr3ba1_ddr4a15_de-skew = <0x07>;
+ ddr3ba0_ddr4bg0_de-skew = <0x07>;
+ ddr3ras_ddr4cke_de-skew = <0x07>;
+ ddr3ba2_ddr4ba0_de-skew = <0x07>;
+ ddr3we_ddr4bg1_de-skew = <0x07>;
+ ddr3cas_ddr4a12_de-skew = <0x07>;
+ ddr3ckn_ddr4ckn_de-skew = <0x07>;
+ ddr3ckp_ddr4ckp_de-skew = <0x07>;
+ ddr3cke_ddr4a16_de-skew = <0x07>;
+ ddr3odt0_ddr4a14_de-skew = <0x07>;
+ ddr3cs0_ddr4act_de-skew = <0x06>;
+ ddr3reset_ddr4reset_de-skew = <0x07>;
+ ddr3cs1_ddr4cs1_de-skew = <0x06>;
+ ddr3odt1_ddr4odt1_de-skew = <0x07>;
+ cs0_dm0_rx_de-skew = <0x07>;
+ cs0_dm0_tx_de-skew = <0x07>;
+ cs0_dq0_rx_de-skew = <0x08>;
+ cs0_dq0_tx_de-skew = <0x08>;
+ cs0_dq1_rx_de-skew = <0x09>;
+ cs0_dq1_tx_de-skew = <0x08>;
+ cs0_dq2_rx_de-skew = <0x08>;
+ cs0_dq2_tx_de-skew = <0x08>;
+ cs0_dq3_rx_de-skew = <0x08>;
+ cs0_dq3_tx_de-skew = <0x08>;
+ cs0_dq4_rx_de-skew = <0x09>;
+ cs0_dq4_tx_de-skew = <0x08>;
+ cs0_dq5_rx_de-skew = <0x09>;
+ cs0_dq5_tx_de-skew = <0x08>;
+ cs0_dq6_rx_de-skew = <0x09>;
+ cs0_dq6_tx_de-skew = <0x08>;
+ cs0_dq7_rx_de-skew = <0x08>;
+ cs0_dq7_tx_de-skew = <0x08>;
+ cs0_dqs0_rx_de-skew = <0x06>;
+ cs0_dqs0p_tx_de-skew = <0x09>;
+ cs0_dqs0n_tx_de-skew = <0x09>;
+ cs0_dm1_rx_de-skew = <0x07>;
+ cs0_dm1_tx_de-skew = <0x06>;
+ cs0_dq8_rx_de-skew = <0x08>;
+ cs0_dq8_tx_de-skew = <0x07>;
+ cs0_dq9_rx_de-skew = <0x09>;
+ cs0_dq9_tx_de-skew = <0x07>;
+ cs0_dq10_rx_de-skew = <0x08>;
+ cs0_dq10_tx_de-skew = <0x08>;
+ cs0_dq11_rx_de-skew = <0x08>;
+ cs0_dq11_tx_de-skew = <0x07>;
+ cs0_dq12_rx_de-skew = <0x08>;
+ cs0_dq12_tx_de-skew = <0x08>;
+ cs0_dq13_rx_de-skew = <0x09>;
+ cs0_dq13_tx_de-skew = <0x07>;
+ cs0_dq14_rx_de-skew = <0x09>;
+ cs0_dq14_tx_de-skew = <0x08>;
+ cs0_dq15_rx_de-skew = <0x09>;
+ cs0_dq15_tx_de-skew = <0x07>;
+ cs0_dqs1_rx_de-skew = <0x07>;
+ cs0_dqs1p_tx_de-skew = <0x09>;
+ cs0_dqs1n_tx_de-skew = <0x09>;
+ cs0_dm2_rx_de-skew = <0x07>;
+ cs0_dm2_tx_de-skew = <0x07>;
+ cs0_dq16_rx_de-skew = <0x09>;
+ cs0_dq16_tx_de-skew = <0x09>;
+ cs0_dq17_rx_de-skew = <0x07>;
+ cs0_dq17_tx_de-skew = <0x09>;
+ cs0_dq18_rx_de-skew = <0x07>;
+ cs0_dq18_tx_de-skew = <0x08>;
+ cs0_dq19_rx_de-skew = <0x07>;
+ cs0_dq19_tx_de-skew = <0x09>;
+ cs0_dq20_rx_de-skew = <0x09>;
+ cs0_dq20_tx_de-skew = <0x09>;
+ cs0_dq21_rx_de-skew = <0x09>;
+ cs0_dq21_tx_de-skew = <0x09>;
+ cs0_dq22_rx_de-skew = <0x08>;
+ cs0_dq22_tx_de-skew = <0x09>;
+ cs0_dq23_rx_de-skew = <0x08>;
+ cs0_dq23_tx_de-skew = <0x09>;
+ cs0_dqs2_rx_de-skew = <0x06>;
+ cs0_dqs2p_tx_de-skew = <0x09>;
+ cs0_dqs2n_tx_de-skew = <0x09>;
+ cs0_dm3_rx_de-skew = <0x07>;
+ cs0_dm3_tx_de-skew = <0x07>;
+ cs0_dq24_rx_de-skew = <0x08>;
+ cs0_dq24_tx_de-skew = <0x08>;
+ cs0_dq25_rx_de-skew = <0x09>;
+ cs0_dq25_tx_de-skew = <0x09>;
+ cs0_dq26_rx_de-skew = <0x09>;
+ cs0_dq26_tx_de-skew = <0x08>;
+ cs0_dq27_rx_de-skew = <0x09>;
+ cs0_dq27_tx_de-skew = <0x08>;
+ cs0_dq28_rx_de-skew = <0x09>;
+ cs0_dq28_tx_de-skew = <0x09>;
+ cs0_dq29_rx_de-skew = <0x09>;
+ cs0_dq29_tx_de-skew = <0x09>;
+ cs0_dq30_rx_de-skew = <0x08>;
+ cs0_dq30_tx_de-skew = <0x08>;
+ cs0_dq31_rx_de-skew = <0x08>;
+ cs0_dq31_tx_de-skew = <0x08>;
+ cs0_dqs3_rx_de-skew = <0x07>;
+ cs0_dqs3p_tx_de-skew = <0x09>;
+ cs0_dqs3n_tx_de-skew = <0x09>;
+ cs1_dm0_rx_de-skew = <0x07>;
+ cs1_dm0_tx_de-skew = <0x07>;
+ cs1_dq0_rx_de-skew = <0x08>;
+ cs1_dq0_tx_de-skew = <0x08>;
+ cs1_dq1_rx_de-skew = <0x09>;
+ cs1_dq1_tx_de-skew = <0x08>;
+ cs1_dq2_rx_de-skew = <0x08>;
+ cs1_dq2_tx_de-skew = <0x08>;
+ cs1_dq3_rx_de-skew = <0x08>;
+ cs1_dq3_tx_de-skew = <0x08>;
+ cs1_dq4_rx_de-skew = <0x08>;
+ cs1_dq4_tx_de-skew = <0x08>;
+ cs1_dq5_rx_de-skew = <0x09>;
+ cs1_dq5_tx_de-skew = <0x08>;
+ cs1_dq6_rx_de-skew = <0x09>;
+ cs1_dq6_tx_de-skew = <0x08>;
+ cs1_dq7_rx_de-skew = <0x08>;
+ cs1_dq7_tx_de-skew = <0x08>;
+ cs1_dqs0_rx_de-skew = <0x06>;
+ cs1_dqs0p_tx_de-skew = <0x09>;
+ cs1_dqs0n_tx_de-skew = <0x09>;
+ cs1_dm1_rx_de-skew = <0x07>;
+ cs1_dm1_tx_de-skew = <0x07>;
+ cs1_dq8_rx_de-skew = <0x08>;
+ cs1_dq8_tx_de-skew = <0x08>;
+ cs1_dq9_rx_de-skew = <0x08>;
+ cs1_dq9_tx_de-skew = <0x07>;
+ cs1_dq10_rx_de-skew = <0x07>;
+ cs1_dq10_tx_de-skew = <0x08>;
+ cs1_dq11_rx_de-skew = <0x08>;
+ cs1_dq11_tx_de-skew = <0x08>;
+ cs1_dq12_rx_de-skew = <0x08>;
+ cs1_dq12_tx_de-skew = <0x07>;
+ cs1_dq13_rx_de-skew = <0x08>;
+ cs1_dq13_tx_de-skew = <0x08>;
+ cs1_dq14_rx_de-skew = <0x08>;
+ cs1_dq14_tx_de-skew = <0x08>;
+ cs1_dq15_rx_de-skew = <0x08>;
+ cs1_dq15_tx_de-skew = <0x07>;
+ cs1_dqs1_rx_de-skew = <0x07>;
+ cs1_dqs1p_tx_de-skew = <0x09>;
+ cs1_dqs1n_tx_de-skew = <0x09>;
+ cs1_dm2_rx_de-skew = <0x07>;
+ cs1_dm2_tx_de-skew = <0x08>;
+ cs1_dq16_rx_de-skew = <0x08>;
+ cs1_dq16_tx_de-skew = <0x09>;
+ cs1_dq17_rx_de-skew = <0x08>;
+ cs1_dq17_tx_de-skew = <0x09>;
+ cs1_dq18_rx_de-skew = <0x07>;
+ cs1_dq18_tx_de-skew = <0x08>;
+ cs1_dq19_rx_de-skew = <0x08>;
+ cs1_dq19_tx_de-skew = <0x09>;
+ cs1_dq20_rx_de-skew = <0x09>;
+ cs1_dq20_tx_de-skew = <0x09>;
+ cs1_dq21_rx_de-skew = <0x09>;
+ cs1_dq21_tx_de-skew = <0x09>;
+ cs1_dq22_rx_de-skew = <0x08>;
+ cs1_dq22_tx_de-skew = <0x09>;
+ cs1_dq23_rx_de-skew = <0x08>;
+ cs1_dq23_tx_de-skew = <0x09>;
+ cs1_dqs2_rx_de-skew = <0x06>;
+ cs1_dqs2p_tx_de-skew = <0x09>;
+ cs1_dqs2n_tx_de-skew = <0x09>;
+ cs1_dm3_rx_de-skew = <0x07>;
+ cs1_dm3_tx_de-skew = <0x07>;
+ cs1_dq24_rx_de-skew = <0x08>;
+ cs1_dq24_tx_de-skew = <0x09>;
+ cs1_dq25_rx_de-skew = <0x09>;
+ cs1_dq25_tx_de-skew = <0x09>;
+ cs1_dq26_rx_de-skew = <0x09>;
+ cs1_dq26_tx_de-skew = <0x08>;
+ cs1_dq27_rx_de-skew = <0x08>;
+ cs1_dq27_tx_de-skew = <0x08>;
+ cs1_dq28_rx_de-skew = <0x09>;
+ cs1_dq28_tx_de-skew = <0x09>;
+ cs1_dq29_rx_de-skew = <0x09>;
+ cs1_dq29_tx_de-skew = <0x09>;
+ cs1_dq30_rx_de-skew = <0x09>;
+ cs1_dq30_tx_de-skew = <0x08>;
+ cs1_dq31_rx_de-skew = <0x08>;
+ cs1_dq31_tx_de-skew = <0x08>;
+ cs1_dqs3_rx_de-skew = <0x07>;
+ cs1_dqs3p_tx_de-skew = <0x09>;
+ cs1_dqs3n_tx_de-skew = <0x09>;
+ phandle = <0xaf>;
+ };
+
+ aliases {
+ ethernet0 = "/ethernet@ff360000";
+ i2c0 = "/i2c@ff180000";
+ i2c1 = "/i2c@ff190000";
+ i2c2 = "/i2c@ff1a0000";
+ i2c3 = "/i2c@ff1b0000";
+ serial0 = "/serial@ff030000";
+ serial1 = "/serial@ff158000";
+ serial2 = "/serial@ff160000";
+ serial3 = "/serial@ff168000";
+ serial4 = "/serial@ff170000";
+ serial5 = "/serial@ff178000";
+ spi0 = "/spi@ff1d0000";
+ spi1 = "/spi@ff1d8000";
+ };
+
+ cpus {
+ #address-cells = <0x02>;
+ #size-cells = <0x00>;
+
+ cpu@0 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a35\0arm,armv8";
+ reg = <0x00 0x00>;
+ enable-method = "psci";
+ clocks = <0x02 0x07>;
+ #cooling-cells = <0x02>;
+ dynamic-power-coefficient = <0x5a>;
+ operating-points-v2 = <0x03>;
+ cpu-idle-states = <0x04 0x05>;
+ cpu-supply = <0x06>;
+ phandle = <0x09>;
+ };
+
+ cpu@1 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a35\0arm,armv8";
+ reg = <0x00 0x01>;
+ enable-method = "psci";
+ operating-points-v2 = <0x03>;
+ cpu-idle-states = <0x04 0x05>;
+ phandle = <0x0a>;
+ };
+
+ cpu@2 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a35\0arm,armv8";
+ reg = <0x00 0x02>;
+ enable-method = "psci";
+ operating-points-v2 = <0x03>;
+ cpu-idle-states = <0x04 0x05>;
+ phandle = <0x0b>;
+ };
+
+ cpu@3 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a35\0arm,armv8";
+ reg = <0x00 0x03>;
+ enable-method = "psci";
+ operating-points-v2 = <0x03>;
+ cpu-idle-states = <0x04 0x05>;
+ phandle = <0x0c>;
+ };
+
+ idle-states {
+ entry-method = "psci";
+
+ cpu-sleep {
+ compatible = "arm,idle-state";
+ local-timer-stop;
+ arm,psci-suspend-param = <0x10000>;
+ entry-latency-us = <0x78>;
+ exit-latency-us = <0xfa>;
+ min-residency-us = <0x384>;
+ phandle = <0x04>;
+ };
+
+ cluster-sleep {
+ compatible = "arm,idle-state";
+ local-timer-stop;
+ arm,psci-suspend-param = <0x1010000>;
+ entry-latency-us = <0x190>;
+ exit-latency-us = <0x1f4>;
+ min-residency-us = <0x7d0>;
+ phandle = <0x05>;
+ };
+ };
+ };
+
+ cpu0-opp-table {
+ compatible = "operating-points-v2";
+ opp-shared;
+ rockchip,temp-hysteresis = <0x1388>;
+ rockchip,low-temp = <0x00>;
+ rockchip,low-temp-min-volt = <0xf4240>;
+ rockchip,low-temp-adjust-volt = <0x00 0x5e8 0xc350>;
+ clocks = <0x02 0x01>;
+ rockchip,avs-scale = <0x04>;
+ rockchip,max-volt = <0x149970>;
+ rockchip,evb-irdrop = <0x61a8>;
+ nvmem-cells = <0x07 0x08>;
+ nvmem-cell-names = "cpu_leakage\0performance";
+ rockchip,bin-scaling-sel = <0x00 0x0d 0x01 0x0d>;
+ rockchip,pvtm-voltage-sel = <0x00 0xc350 0x00 0xc351 0xd2f0 0x01 0xd2f1 0xea60 0x02 0xea61 0x1869f 0x03>;
+ rockchip,pvtm-freq = <0x639c0>;
+ rockchip,pvtm-volt = <0xf4240>;
+ rockchip,pvtm-ch = <0x00 0x00>;
+ rockchip,pvtm-sample-time = <0x3e8>;
+ rockchip,pvtm-number = <0x0a>;
+ rockchip,pvtm-error = <0x3e8>;
+ rockchip,pvtm-ref-temp = <0x28>;
+ rockchip,pvtm-temp-prop = <0xffffffc8 0xffffffc8>;
+ rockchip,thermal-zone = "soc-thermal";
+ rockchip,avs = <0x01>;
+ phandle = <0x03>;
+
+ opp-1008000000 {
+ opp-hz = <0x00 0x3c14dc00>;
+ opp-microvolt = <0x11edd8 0x11edd8 0x149970>;
+ opp-microvolt-L0 = <0x11edd8 0x11edd8 0x149970>;
+ opp-microvolt-L1 = <0x112a88 0x112a88 0x149970>;
+ opp-microvolt-L2 = <0x112a88 0x112a88 0x149970>;
+ opp-microvolt-L3 = <0x100590 0x100590 0x149970>;
+ clock-latency-ns = <0x9c40>;
+ };
+
+ opp-1200000000 {
+ opp-hz = <0x00 0x47868c00>;
+ opp-microvolt = <0x13d620 0x13d620 0x149970>;
+ opp-microvolt-L0 = <0x13d620 0x13d620 0x149970>;
+ opp-microvolt-L1 = <0x137478 0x137478 0x149970>;
+ opp-microvolt-L2 = <0x1312d0 0x1312d0 0x149970>;
+ opp-microvolt-L3 = <0x124f80 0x124f80 0x149970>;
+ clock-latency-ns = <0x9c40>;
+ };
+
+ opp-1248000000 {
+ opp-hz = <0x00 0x4a62f800>;
+ opp-microvolt = <0x149970 0x149970 0x149970>;
+ opp-microvolt-L0 = <0x149970 0x149970 0x149970>;
+ opp-microvolt-L1 = <0x13d620 0x13d620 0x149970>;
+ opp-microvolt-L2 = <0x137478 0x137478 0x149970>;
+ opp-microvolt-L3 = <0x12b128 0x12b128 0x149970>;
+ clock-latency-ns = <0x9c40>;
+ };
+
+ opp-1296000000 {
+ opp-hz = <0x00 0x4d3f6400>;
+ opp-microvolt = <0x149970 0x149970 0x149970>;
+ opp-microvolt-L0 = <0x149970 0x149970 0x149970>;
+ opp-microvolt-L1 = <0x149970 0x149970 0x149970>;
+ opp-microvolt-L2 = <0x13d620 0x13d620 0x149970>;
+ opp-microvolt-L3 = <0x1312d0 0x1312d0 0x149970>;
+ clock-latency-ns = <0x9c40>;
+ };
+
+ opp-1512000000 {
+ opp-hz = <0x00 0x5a1f4a00>;
+ opp-microvolt = <0x149970 0x149970 0x149970>;
+ opp-microvolt-L0 = <0x149970 0x149970 0x149970>;
+ opp-microvolt-L1 = <0x149970 0x149970 0x149970>;
+ opp-microvolt-L2 = <0x13d620 0x13d620 0x149970>;
+ opp-microvolt-L3 = <0x1312d0 0x1312d0 0x149970>;
+ clock-latency-ns = <0x9c40>;
+ };
+ };
+
+ arm-pmu {
+ compatible = "arm,cortex-a53-pmu";
+ interrupts = <0x00 0x64 0x04 0x00 0x65 0x04 0x00 0x66 0x04 0x00 0x67 0x04>;
+ interrupt-affinity = <0x09 0x0a 0x0b 0x0c>;
+ };
+
+ bus-soc {
+ compatible = "rockchip,px30-bus";
+ rockchip,busfreq-policy = "autocs";
+ phandle = <0xc4>;
+
+ soc-bus0 {
+ bus-id = <0x00>;
+ timer-us = <0x14>;
+ enable-msk = <0x40f7>;
+ status = "disabled";
+ };
+
+ soc-bus1 {
+ bus-id = <0x01>;
+ timer-us = <0xc8>;
+ enable-msk = <0x40bf>;
+ status = "disabled";
+ };
+
+ soc-bus2 {
+ bus-id = <0x02>;
+ timer-us = <0xc8>;
+ enable-msk = <0x4007>;
+ status = "disabled";
+ };
+ };
+
+ bus-apll {
+ compatible = "rockchip,px30-bus";
+ rockchip,busfreq-policy = "clkfreq";
+ clocks = <0x02 0x01>;
+ clock-names = "bus";
+ operating-points-v2 = <0x0d>;
+ status = "okay";
+ bus-supply = <0x0e>;
+ phandle = <0xc5>;
+ };
+
+ bus-apll-opp-table {
+ compatible = "operating-points-v2";
+ opp-shared;
+ phandle = <0x0d>;
+
+ opp-1512000000 {
+ opp-hz = <0x00 0x5a1f4a00>;
+ opp-microvolt = <0xf4240>;
+ };
+
+ opp-1008000000 {
+ opp-hz = <0x00 0x3c14dc00>;
+ opp-microvolt = <0xe7ef0>;
+ };
+ };
+
+ cpuinfo {
+ compatible = "rockchip,cpuinfo";
+ nvmem-cells = <0x0f>;
+ nvmem-cell-names = "id";
+ };
+
+ display-subsystem {
+ compatible = "rockchip,display-subsystem";
+ ports = <0x10>;
+ status = "okay";
+ logo-memory-region = <0x11>;
+ phandle = <0xc6>;
+
+ route {
+
+ route-lvds {
+ status = "disabled";
+ logo,uboot = "logo.gif";
+ logo,kernel = "logo_kernel.gif";
+ logo,mode = "center";
+ charge_logo,mode = "center";
+ connect = <0x12>;
+ phandle = <0xc7>;
+ };
+
+ route-dsi {
+ status = "okay";
+ logo,uboot = "logo.gif";
+ logo,kernel = "logo_kernel.gif";
+ logo,mode = "center";
+ charge_logo,mode = "center";
+ connect = <0x13>;
+ phandle = <0xc8>;
+ };
+
+ route-rgb {
+ status = "disabled";
+ logo,uboot = "logo.gif";
+ logo,kernel = "logo_kernel.gif";
+ logo,mode = "center";
+ charge_logo,mode = "center";
+ connect = <0x14>;
+ phandle = <0xc9>;
+ };
+ };
+ };
+
+ firmware {
+
+ optee {
+ compatible = "linaro,optee-tz";
+ method = "smc";
+ };
+ };
+
+ external-gmac-clock {
+ compatible = "fixed-clock";
+ clock-frequency = <0x2faf080>;
+ clock-output-names = "gmac_clkin";
+ #clock-cells = <0x00>;
+ phandle = <0xca>;
+ };
+
+ psci {
+ compatible = "arm,psci-1.0";
+ method = "smc";
+ };
+
+ rockchip-suspend {
+ compatible = "rockchip,pm-px30";
+ status = "okay";
+ rockchip,sleep-debug-en = <0x01>;
+ rockchip,sleep-mode-config = <0x20702>;
+ rockchip,wakeup-config = <0x85>;
+ phandle = <0xcb>;
+ };
+
+ timer {
+ compatible = "arm,armv8-timer";
+ interrupts = <0x01 0x0d 0xf04 0x01 0x0e 0xf04 0x01 0x0b 0xf04 0x01 0x0a 0xf04>;
+ };
+
+ xin24m {
+ compatible = "fixed-clock";
+ #clock-cells = <0x00>;
+ clock-frequency = <0x16e3600>;
+ clock-output-names = "xin24m";
+ phandle = <0xcc>;
+ };
+
+ xin32k {
+ compatible = "fixed-clock";
+ #clock-cells = <0x00>;
+ clock-frequency = <0x8000>;
+ clock-output-names = "xin32k";
+ phandle = <0xcd>;
+ };
+
+ power-management@ff000000 {
+ compatible = "rockchip,px30-pmu\0syscon\0simple-mfd";
+ reg = <0x00 0xff000000 0x00 0x1000>;
+ phandle = <0xce>;
+
+ power-controller {
+ compatible = "rockchip,px30-power-controller";
+ #power-domain-cells = <0x01>;
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+ phandle = <0x8a>;
+
+ pd_usb@5 {
+ reg = <0x05>;
+ clocks = <0x02 0x103 0x02 0x102 0x02 0x3c>;
+ pm_qos = <0x15 0x16>;
+ };
+
+ pd_sdcard@7 {
+ reg = <0x07>;
+ clocks = <0x02 0xf7 0x02 0x3b>;
+ pm_qos = <0x17>;
+ };
+
+ pd_gmac@9 {
+ reg = <0x09>;
+ clocks = <0x02 0xb2 0x02 0x143 0x02 0x40 0x02 0x3f>;
+ pm_qos = <0x18>;
+ };
+
+ pd_mmc_nand@10 {
+ reg = <0x0a>;
+ clocks = <0x02 0xfe 0x02 0x100 0x02 0xff 0x02 0x101 0x02 0x39 0x02 0x37 0x02 0x38 0x02 0x3a>;
+ pm_qos = <0x19 0x1a 0x1b 0x1c>;
+ };
+
+ pd_vpu@11 {
+ reg = <0x0b>;
+ clocks = <0x02 0xaf 0x02 0xf4 0x02 0x4b>;
+ pm_qos = <0x1d 0x1e>;
+ };
+
+ pd_vo@12 {
+ reg = <0x0c>;
+ clocks = <0x02 0xb7 0x02 0xb5 0x02 0xb6 0x02 0x96 0x02 0x97 0x02 0xfd 0x02 0xfb 0x02 0xfc 0x02 0x144 0x02 0x35 0x02 0x36>;
+ pm_qos = <0x1f 0x20 0x21 0x22>;
+ };
+
+ pd_vi@13 {
+ reg = <0x0d>;
+ clocks = <0x02 0xb3 0x02 0xb4 0x02 0xf9 0x02 0xfa 0x02 0x33>;
+ pm_qos = <0x23 0x24 0x25 0x26 0x27>;
+ };
+
+ pd_gpu@14 {
+ reg = <0x0e>;
+ clocks = <0x02 0x49>;
+ pm_qos = <0x28>;
+ };
+ };
+ };
+
+ syscon@ff010000 {
+ compatible = "rockchip,px30-pmugrf\0syscon\0simple-mfd";
+ reg = <0x00 0xff010000 0x00 0x1000>;
+ #address-cells = <0x01>;
+ #size-cells = <0x01>;
+ phandle = <0xac>;
+
+ io-domains {
+ compatible = "rockchip,px30-pmu-io-voltage-domain";
+ status = "okay";
+ pmuio1-supply = <0x29>;
+ pmuio2-supply = <0x29>;
+ phandle = <0xcf>;
+ };
+
+ reboot-mode {
+ compatible = "syscon-reboot-mode";
+ offset = <0x200>;
+ mode-bootloader = <0x5242c301>;
+ mode-charge = <0x5242c30b>;
+ mode-fastboot = <0x5242c309>;
+ mode-loader = <0x5242c301>;
+ mode-normal = <0x5242c300>;
+ mode-recovery = <0x5242c303>;
+ mode-ums = <0x5242c30c>;
+ };
+
+ pmu-pvtm {
+ compatible = "rockchip,px30-pmu-pvtm";
+ clocks = <0x2a 0x07>;
+ clock-names = "pmu";
+ status = "okay";
+ phandle = <0xd0>;
+ };
+ };
+
+ serial@ff030000 {
+ compatible = "rockchip,px30-uart\0snps,dw-apb-uart";
+ reg = <0x00 0xff030000 0x00 0x100>;
+ interrupts = <0x00 0x0f 0x04>;
+ clocks = <0x2a 0x06 0x2a 0x15>;
+ clock-names = "baudclk\0apb_pclk";
+ reg-shift = <0x02>;
+ reg-io-width = <0x04>;
+ dmas = <0x2b 0x00 0x2b 0x01>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x2c 0x2d 0x2e>;
+ status = "disabled";
+ phandle = <0xd1>;
+ };
+
+ i2s@ff060000 {
+ compatible = "rockchip,px30-i2s-tdm";
+ reg = <0x00 0xff060000 0x00 0x1000>;
+ interrupts = <0x00 0x0c 0x04>;
+ clocks = <0x02 0x10 0x02 0x12 0x02 0x106>;
+ clock-names = "mclk_tx\0mclk_rx\0hclk";
+ dmas = <0x2b 0x10 0x2b 0x11>;
+ dma-names = "tx\0rx";
+ resets = <0x02 0x84 0x02 0xbf>;
+ reset-names = "tx-m\0rx-m";
+ rockchip,cru = <0x02>;
+ rockchip,grf = <0x2f>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x30 0x31 0x32 0x33 0x34 0x35 0x36 0x37 0x38 0x39 0x3a 0x3b>;
+ status = "disabled";
+ phandle = <0xd2>;
+ };
+
+ i2s@ff070000 {
+ compatible = "rockchip,px30-i2s\0rockchip,rk3066-i2s";
+ reg = <0x00 0xff070000 0x00 0x1000>;
+ interrupts = <0x00 0x0d 0x04>;
+ clocks = <0x02 0x14 0x02 0x107>;
+ clock-names = "i2s_clk\0i2s_hclk";
+ dmas = <0x2b 0x12 0x2b 0x13>;
+ dma-names = "tx\0rx";
+ resets = <0x02 0x86 0x02 0x85>;
+ reset-names = "reset-m\0reset-h";
+ pinctrl-names = "default";
+ pinctrl-0 = <0x3c 0x3d 0x3e 0x3f>;
+ status = "okay";
+ #sound-dai-cells = <0x00>;
+ phandle = <0xc2>;
+ };
+
+ i2s@ff080000 {
+ compatible = "rockchip,px30-i2s\0rockchip,rk3066-i2s";
+ reg = <0x00 0xff080000 0x00 0x1000>;
+ interrupts = <0x00 0x0e 0x04>;
+ clocks = <0x02 0x16 0x02 0x108>;
+ clock-names = "i2s_clk\0i2s_hclk";
+ dmas = <0x2b 0x14 0x2b 0x15>;
+ dma-names = "tx\0rx";
+ resets = <0x02 0x88 0x02 0x87>;
+ reset-names = "reset-m\0reset-h";
+ pinctrl-names = "default";
+ pinctrl-0 = <0x40 0x41 0x42 0x43>;
+ status = "disabled";
+ phandle = <0xd3>;
+ };
+
+ pdm@ff0a0000 {
+ compatible = "rockchip,px30-pdm\0rockchip,pdm";
+ reg = <0x00 0xff0a0000 0x00 0x1000>;
+ clocks = <0x02 0x0f 0x02 0x105>;
+ clock-names = "pdm_clk\0pdm_hclk";
+ dmas = <0x2b 0x18>;
+ dma-names = "rx";
+ resets = <0x02 0x82>;
+ reset-names = "pdm-m";
+ pinctrl-names = "default";
+ pinctrl-0 = <0x44 0x45 0x46 0x47 0x48 0x49>;
+ status = "disabled";
+ phandle = <0xd4>;
+ };
+
+ crypto@ff0b0000 {
+ compatible = "rockchip,px30-crypto";
+ reg = <0x00 0xff0b0000 0x00 0x4000>;
+ interrupts = <0x00 0x52 0x04>;
+ clocks = <0x02 0xac 0x02 0xf1 0x02 0x30 0x02 0x31>;
+ clock-names = "aclk\0hclk\0sclk\0apb_pclk";
+ resets = <0x02 0x74>;
+ reset-names = "crypto-rst";
+ status = "disabled";
+ phandle = <0xd5>;
+ };
+
+ rng@ff0b0000 {
+ compatible = "rockchip,cryptov2-rng";
+ reg = <0x00 0xff0b0000 0x00 0x4000>;
+ clocks = <0x02 0x30 0x02 0x31 0x02 0xac 0x02 0xf1>;
+ clock-names = "clk_crypto\0clk_crypto_apk\0aclk_crypto\0hclk_crypto";
+ assigned-clocks = <0x02 0x30 0x02 0x31 0x02 0xac 0x02 0xf1>;
+ assigned-clock-rates = <0x8f0d180 0x8f0d180 0xbebc200 0x5f5e100>;
+ resets = <0x02 0x74>;
+ reset-names = "reset";
+ status = "okay";
+ phandle = <0xd6>;
+ };
+
+ interrupt-controller@ff131000 {
+ compatible = "arm,gic-400";
+ #interrupt-cells = <0x03>;
+ #address-cells = <0x00>;
+ interrupt-controller;
+ reg = <0x00 0xff131000 0x00 0x1000 0x00 0xff132000 0x00 0x2000 0x00 0xff134000 0x00 0x2000 0x00 0xff136000 0x00 0x2000>;
+ interrupts = <0x01 0x09 0xf04>;
+ phandle = <0x01>;
+ };
+
+ syscon@ff140000 {
+ compatible = "rockchip,px30-grf\0syscon\0simple-mfd";
+ reg = <0x00 0xff140000 0x00 0x1000>;
+ #address-cells = <0x01>;
+ #size-cells = <0x01>;
+ phandle = <0x2f>;
+
+ io-domains {
+ compatible = "rockchip,px30-io-voltage-domain";
+ status = "okay";
+ vccio1-supply = <0x4a>;
+ vccio2-supply = <0x4a>;
+ vccio3-supply = <0x4b>;
+ vccio4-supply = <0x4b>;
+ vccio5-supply = <0x4b>;
+ vccio6-supply = <0x4b>;
+ phandle = <0xd7>;
+ };
+
+ lvds {
+ compatible = "rockchip,px30-lvds";
+ phys = <0x4c>;
+ phy-names = "phy";
+ status = "disabled";
+ phandle = <0xd8>;
+
+ ports {
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+
+ port@0 {
+ reg = <0x00>;
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+
+ endpoint@0 {
+ reg = <0x00>;
+ remote-endpoint = <0x12>;
+ phandle = <0xa2>;
+ };
+ };
+ };
+ };
+
+ rgb {
+ compatible = "rockchip,px30-rgb";
+ pinctrl-names = "default\0sleep";
+ pinctrl-0 = <0x4d>;
+ pinctrl-1 = <0x4e>;
+ status = "disabled";
+ phys = <0x4c>;
+ phy-names = "phy";
+ phandle = <0xd9>;
+
+ ports {
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+
+ port@0 {
+ reg = <0x00>;
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+
+ endpoint@0 {
+ reg = <0x00>;
+ remote-endpoint = <0x14>;
+ phandle = <0xa4>;
+ };
+ };
+ };
+ };
+ };
+
+ syscon@ff148000 {
+ compatible = "syscon\0simple-mfd";
+ reg = <0x00 0xff148000 0x00 0x1000>;
+ #address-cells = <0x01>;
+ #size-cells = <0x01>;
+ phandle = <0xda>;
+
+ pvtm {
+ compatible = "rockchip,px30-pvtm";
+ clocks = <0x02 0x4a>;
+ clock-names = "core";
+ status = "okay";
+ phandle = <0xdb>;
+ };
+ };
+
+ serial@ff158000 {
+ compatible = "rockchip,px30-uart\0snps,dw-apb-uart";
+ reg = <0x00 0xff158000 0x00 0x100>;
+ interrupts = <0x00 0x10 0x04>;
+ clocks = <0x02 0x18 0x02 0x149>;
+ clock-names = "baudclk\0apb_pclk";
+ reg-shift = <0x02>;
+ reg-io-width = <0x04>;
+ dmas = <0x2b 0x02 0x2b 0x03>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x4f 0x50>;
+ status = "okay";
+ phandle = <0xdc>;
+ };
+
+ serial@ff160000 {
+ compatible = "rockchip,px30-uart\0snps,dw-apb-uart";
+ reg = <0x00 0xff160000 0x00 0x100>;
+ interrupts = <0x00 0x11 0x04>;
+ clocks = <0x02 0x19 0x02 0x14a>;
+ clock-names = "baudclk\0apb_pclk";
+ reg-shift = <0x02>;
+ reg-io-width = <0x04>;
+ dmas = <0x2b 0x04 0x2b 0x05>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x51>;
+ status = "disabled";
+ phandle = <0xdd>;
+ };
+
+ serial@ff168000 {
+ compatible = "rockchip,px30-uart\0snps,dw-apb-uart";
+ reg = <0x00 0xff168000 0x00 0x100>;
+ interrupts = <0x00 0x12 0x04>;
+ clocks = <0x02 0x1a 0x02 0x14b>;
+ clock-names = "baudclk\0apb_pclk";
+ reg-shift = <0x02>;
+ reg-io-width = <0x04>;
+ dmas = <0x2b 0x06 0x2b 0x07>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x52 0x53 0x54>;
+ status = "disabled";
+ phandle = <0xde>;
+ };
+
+ serial@ff170000 {
+ compatible = "rockchip,px30-uart\0snps,dw-apb-uart";
+ reg = <0x00 0xff170000 0x00 0x100>;
+ interrupts = <0x00 0x13 0x04>;
+ clocks = <0x02 0x1b 0x02 0x14c>;
+ clock-names = "baudclk\0apb_pclk";
+ reg-shift = <0x02>;
+ reg-io-width = <0x04>;
+ dmas = <0x2b 0x08 0x2b 0x09>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x55 0x56 0x57>;
+ status = "disabled";
+ phandle = <0xdf>;
+ };
+
+ serial@ff178000 {
+ compatible = "rockchip,px30-uart\0snps,dw-apb-uart";
+ reg = <0x00 0xff178000 0x00 0x100>;
+ interrupts = <0x00 0x14 0x04>;
+ clocks = <0x02 0x1c 0x02 0x14d>;
+ clock-names = "baudclk\0apb_pclk";
+ reg-shift = <0x02>;
+ reg-io-width = <0x04>;
+ dmas = <0x2b 0x0a 0x2b 0x0b>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x58 0x59 0x5a>;
+ status = "disabled";
+ phandle = <0xe0>;
+ };
+
+ i2c@ff180000 {
+ compatible = "rockchip,rk3399-i2c";
+ reg = <0x00 0xff180000 0x00 0x1000>;
+ clocks = <0x02 0x1d 0x02 0x14e>;
+ clock-names = "i2c\0pclk";
+ interrupts = <0x00 0x07 0x04>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x5b>;
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+ status = "okay";
+ clock-frequency = <0x61a80>;
+ i2c-scl-rising-time-ns = <0x118>;
+ i2c-scl-falling-time-ns = <0x10>;
+ phandle = <0xe1>;
+
+ pmic@20 {
+ compatible = "rockchip,rk817";
+ reg = <0x20>;
+ interrupt-parent = <0x5c>;
+ interrupts = <0x0a 0x08>;
+ pinctrl-names = "default\0pmic-sleep\0pmic-power-off\0pmic-reset";
+ pinctrl-0 = <0x5d>;
+ pinctrl-1 = <0x5e 0x5f>;
+ pinctrl-2 = <0x60 0x61>;
+ pinctrl-3 = <0x62 0x63>;
+ rockchip,system-power-controller;
+ wakeup-source;
+ #clock-cells = <0x01>;
+ clock-output-names = "rk808-clkout1\0rk808-clkout2";
+ pmic-reset-func = <0x01>;
+ vcc1-supply = <0x64>;
+ vcc2-supply = <0x64>;
+ vcc3-supply = <0x64>;
+ vcc4-supply = <0x64>;
+ vcc5-supply = <0x64>;
+ vcc6-supply = <0x64>;
+ vcc7-supply = <0x64>;
+ vcc8-supply = <0x64>;
+ vcc9-supply = <0x65>;
+ phandle = <0xe2>;
+
+ pwrkey {
+ status = "okay";
+ };
+
+ pinctrl_rk8xx {
+ gpio-controller;
+ #gpio-cells = <0x02>;
+ phandle = <0xe3>;
+
+ rk817_ts_gpio1 {
+ pins = "gpio_ts";
+ function = "pin_fun1";
+ phandle = <0xe4>;
+ };
+
+ rk817_gt_gpio2 {
+ pins = "gpio_gt";
+ function = "pin_fun1";
+ phandle = <0xe5>;
+ };
+
+ rk817_pin_ts {
+ pins = "gpio_ts";
+ function = "pin_fun0";
+ phandle = <0xe6>;
+ };
+
+ rk817_pin_gt {
+ pins = "gpio_gt";
+ function = "pin_fun0";
+ phandle = <0xe7>;
+ };
+
+ rk817_slppin_null {
+ pins = "gpio_slp";
+ function = "pin_fun0";
+ phandle = <0xe8>;
+ };
+
+ rk817_slppin_slp {
+ pins = "gpio_slp";
+ function = "pin_fun1";
+ phandle = <0x5f>;
+ };
+
+ rk817_slppin_pwrdn {
+ pins = "gpio_slp";
+ function = "pin_fun2";
+ phandle = <0x61>;
+ };
+
+ rk817_slppin_rst {
+ pins = "gpio_slp";
+ function = "pin_fun3";
+ phandle = <0x63>;
+ };
+ };
+
+ regulators {
+
+ DCDC_REG1 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <0xe7ef0>;
+ regulator-max-microvolt = <0x118c30>;
+ regulator-ramp-delay = <0x1771>;
+ regulator-initial-mode = <0x02>;
+ regulator-name = "vdd_logic";
+ phandle = <0x0e>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <0xe7ef0>;
+ };
+ };
+
+ DCDC_REG2 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <0xe7ef0>;
+ regulator-max-microvolt = <0x149970>;
+ regulator-ramp-delay = <0x1771>;
+ regulator-initial-mode = <0x02>;
+ regulator-name = "vdd_arm";
+ phandle = <0x06>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <0xe7ef0>;
+ };
+ };
+
+ DCDC_REG3 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-initial-mode = <0x02>;
+ regulator-name = "vcc_ddr";
+ phandle = <0xe9>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ };
+ };
+
+ DCDC_REG4 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <0x325aa0>;
+ regulator-max-microvolt = <0x325aa0>;
+ regulator-initial-mode = <0x02>;
+ regulator-name = "vcc_3v3";
+ phandle = <0x4b>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <0x325aa0>;
+ };
+ };
+
+ LDO_REG1 {
+ regulator-min-microvolt = <0xf4240>;
+ regulator-max-microvolt = <0xf4240>;
+ regulator-name = "vcc_1v0";
+ phandle = <0xea>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <0xf4240>;
+ };
+ };
+
+ LDO_REG2 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <0x1b7740>;
+ regulator-max-microvolt = <0x1b7740>;
+ regulator-name = "vcc1v8_soc";
+ phandle = <0x88>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <0x1b7740>;
+ };
+ };
+
+ LDO_REG3 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <0xf4240>;
+ regulator-max-microvolt = <0xf4240>;
+ regulator-name = "vcc1v0_soc";
+ phandle = <0xeb>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <0xf4240>;
+ };
+ };
+
+ LDO_REG4 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <0x325aa0>;
+ regulator-max-microvolt = <0x325aa0>;
+ regulator-name = "vcc3v3_pmu";
+ phandle = <0x29>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <0x325aa0>;
+ };
+ };
+
+ LDO_REG5 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <0x1b7740>;
+ regulator-max-microvolt = <0x1b7740>;
+ regulator-name = "vccio_sd";
+ phandle = <0x4a>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <0x1b7740>;
+ };
+ };
+
+ LDO_REG6 {
+ regulator-min-microvolt = <0x1b7740>;
+ regulator-max-microvolt = <0x2dc6c0>;
+ regulator-boot-on;
+ regulator-name = "vcc_sd";
+ phandle = <0x93>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <0x2dc6c0>;
+ };
+ };
+
+ LDO_REG7 {
+ regulator-min-microvolt = <0x325aa0>;
+ regulator-max-microvolt = <0x325aa0>;
+ regulator-name = "vcc_backlight";
+ phandle = <0x9e>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <0x325aa0>;
+ };
+ };
+
+ LDO_REG8 {
+ regulator-min-microvolt = <0x2ab980>;
+ regulator-max-microvolt = <0x2ab980>;
+ regulator-name = "vcc_lcd";
+ phandle = <0x9f>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <0x2ab980>;
+ };
+ };
+
+ BOOST {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <0x4c4b40>;
+ regulator-max-microvolt = <0x5265c0>;
+ regulator-name = "boost";
+ phandle = <0x65>;
+ };
+
+ OTG_SWITCH {
+ regulator-boot-on;
+ regulator-name = "otg_switch";
+ phandle = <0xec>;
+ };
+ };
+
+ battery {
+ compatible = "rk817,battery";
+ ocv_table = <0xc5d 0xc94 0xcd0 0xd02 0xd34 0xd66 0xd98 0xdca 0xdfc 0xe2e 0xe56 0xe7e 0xea6 0xece 0xef6 0xf1e 0xf46 0xf6e 0xf96 0xf9b 0xfa0>;
+ design_capacity = <0xd34>;
+ design_qmax = <0xe86>;
+ bat_res = <0x64>;
+ sleep_enter_current = <0x12c>;
+ sleep_exit_current = <0x12c>;
+ sleep_filter_current = <0x64>;
+ power_off_thresd = <0xbb8>;
+ zero_algorithm_vol = <0xf0a>;
+ max_soc_offset = <0x3c>;
+ monitor_sec = <0x05>;
+ virtual_power = <0x00>;
+ sample_res = <0x0a>;
+ };
+
+ charger {
+ compatible = "rk817,charger";
+ min_input_voltage = <0x1194>;
+ max_input_current = <0x5dc>;
+ max_chrg_current = <0x7d0>;
+ max_chrg_voltage = <0x1068>;
+ chrg_term_mode = <0x00>;
+ chrg_finish_cur = <0x34>;
+ virtual_power = <0x00>;
+ sample_res = <0x0a>;
+ dc_det_gpio = <0x5c 0x0b 0x00>;
+ bat_low_gpio = <0x66 0x0d 0x00>;
+ extcon = <0x67>;
+ };
+
+ codec {
+ #sound-dai-cells = <0x00>;
+ compatible = "rockchip,rk817-codec";
+ clocks = <0x02 0x15>;
+ clock-names = "mclk";
+ pinctrl-names = "default";
+ pinctrl-0 = <0x68>;
+ hp-volume = <0x14>;
+ spk-volume = <0x03>;
+ status = "okay";
+ phandle = <0xc3>;
+ };
+ };
+ };
+
+ i2c@ff190000 {
+ compatible = "rockchip,rk3399-i2c";
+ reg = <0x00 0xff190000 0x00 0x1000>;
+ clocks = <0x02 0x1e 0x02 0x14f>;
+ clock-names = "i2c\0pclk";
+ interrupts = <0x00 0x08 0x04>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x69>;
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+ status = "okay";
+ clock-frequency = <0x61a80>;
+ phandle = <0xed>;
+ };
+
+ i2c@ff1a0000 {
+ compatible = "rockchip,rk3399-i2c";
+ reg = <0x00 0xff1a0000 0x00 0x1000>;
+ clocks = <0x02 0x1f 0x02 0x150>;
+ clock-names = "i2c\0pclk";
+ interrupts = <0x00 0x09 0x04>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x6a>;
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+ status = "disabled";
+ phandle = <0xee>;
+ };
+
+ i2c@ff1b0000 {
+ compatible = "rockchip,rk3399-i2c";
+ reg = <0x00 0xff1b0000 0x00 0x1000>;
+ clocks = <0x02 0x20 0x02 0x151>;
+ clock-names = "i2c\0pclk";
+ interrupts = <0x00 0x0a 0x04>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x6b>;
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+ status = "disabled";
+ phandle = <0xef>;
+ };
+
+ spi@ff1d0000 {
+ compatible = "rockchip,px30-spi\0rockchip,rk3066-spi";
+ reg = <0x00 0xff1d0000 0x00 0x1000>;
+ interrupts = <0x00 0x1a 0x04>;
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+ clocks = <0x02 0x24 0x02 0x155>;
+ clock-names = "spiclk\0apb_pclk";
+ dmas = <0x2b 0x0c 0x2b 0x0d>;
+ dma-names = "tx\0rx";
+ pinctrl-names = "default\0high_speed";
+ pinctrl-0 = <0x6c 0x6d 0x6e 0x6f>;
+ pinctrl-1 = <0x70 0x6d 0x71 0x72>;
+ status = "disabled";
+ phandle = <0xf0>;
+ };
+
+ spi@ff1d8000 {
+ compatible = "rockchip,px30-spi\0rockchip,rk3066-spi";
+ reg = <0x00 0xff1d8000 0x00 0x1000>;
+ interrupts = <0x00 0x1b 0x04>;
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+ clocks = <0x02 0x25 0x02 0x156>;
+ clock-names = "spiclk\0apb_pclk";
+ dmas = <0x2b 0x0e 0x2b 0x0f>;
+ dma-names = "tx\0rx";
+ pinctrl-names = "default\0high_speed";
+ pinctrl-0 = <0x73 0x74 0x75 0x76 0x77>;
+ pinctrl-1 = <0x78 0x74 0x75 0x79 0x7a>;
+ status = "disabled";
+ phandle = <0xf1>;
+ };
+
+ watchdog@ff1e0000 {
+ compatible = "snps,dw-wdt";
+ reg = <0x00 0xff1e0000 0x00 0x100>;
+ clocks = <0x02 0x15b>;
+ interrupts = <0x00 0x25 0x04>;
+ resets = <0x02 0xb5>;
+ reset-names = "reset";
+ status = "disabled";
+ phandle = <0xf2>;
+ };
+
+ pwm@ff200000 {
+ compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm";
+ reg = <0x00 0xff200000 0x00 0x10>;
+ #pwm-cells = <0x03>;
+ pinctrl-names = "active";
+ pinctrl-0 = <0x7b>;
+ clocks = <0x02 0x22 0x02 0x153>;
+ clock-names = "pwm\0pclk";
+ status = "okay";
+ phandle = <0xbc>;
+ };
+
+ pwm@ff200010 {
+ compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm";
+ reg = <0x00 0xff200010 0x00 0x10>;
+ #pwm-cells = <0x03>;
+ pinctrl-names = "active";
+ pinctrl-0 = <0x7c>;
+ clocks = <0x02 0x22 0x02 0x153>;
+ clock-names = "pwm\0pclk";
+ status = "okay";
+ phandle = <0xc1>;
+ };
+
+ pwm@ff200020 {
+ compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm";
+ reg = <0x00 0xff200020 0x00 0x10>;
+ #pwm-cells = <0x03>;
+ pinctrl-names = "active";
+ pinctrl-0 = <0x7d>;
+ clocks = <0x02 0x22 0x02 0x153>;
+ clock-names = "pwm\0pclk";
+ status = "disabled";
+ phandle = <0xf3>;
+ };
+
+ pwm@ff200030 {
+ compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm";
+ reg = <0x00 0xff200030 0x00 0x10>;
+ #pwm-cells = <0x03>;
+ pinctrl-names = "active";
+ pinctrl-0 = <0x7e>;
+ clocks = <0x02 0x22 0x02 0x153>;
+ clock-names = "pwm\0pclk";
+ status = "disabled";
+ phandle = <0xf4>;
+ };
+
+ pwm@ff208000 {
+ compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm";
+ reg = <0x00 0xff208000 0x00 0x10>;
+ #pwm-cells = <0x03>;
+ pinctrl-names = "active";
+ pinctrl-0 = <0x7f>;
+ clocks = <0x02 0x23 0x02 0x154>;
+ clock-names = "pwm\0pclk";
+ status = "disabled";
+ phandle = <0xf5>;
+ };
+
+ pwm@ff208010 {
+ compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm";
+ reg = <0x00 0xff208010 0x00 0x10>;
+ #pwm-cells = <0x03>;
+ pinctrl-names = "active";
+ pinctrl-0 = <0x80>;
+ clocks = <0x02 0x23 0x02 0x154>;
+ clock-names = "pwm\0pclk";
+ status = "disabled";
+ phandle = <0xf6>;
+ };
+
+ pwm@ff208020 {
+ compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm";
+ reg = <0x00 0xff208020 0x00 0x10>;
+ #pwm-cells = <0x03>;
+ pinctrl-names = "active";
+ pinctrl-0 = <0x81>;
+ clocks = <0x02 0x23 0x02 0x154>;
+ clock-names = "pwm\0pclk";
+ status = "disabled";
+ phandle = <0xf7>;
+ };
+
+ pwm@ff208030 {
+ compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm";
+ reg = <0x00 0xff208030 0x00 0x10>;
+ #pwm-cells = <0x03>;
+ pinctrl-names = "active";
+ pinctrl-0 = <0x82>;
+ clocks = <0x02 0x23 0x02 0x154>;
+ clock-names = "pwm\0pclk";
+ status = "disabled";
+ phandle = <0xf8>;
+ };
+
+ rktimer@ff210000 {
+ compatible = "rockchip,rk3288-timer";
+ reg = <0x00 0xff210000 0x00 0x1000>;
+ interrupts = <0x00 0x1e 0x04>;
+ clocks = <0x02 0x159 0x02 0x26>;
+ clock-names = "pclk\0timer";
+ phandle = <0xf9>;
+ };
+
+ amba {
+ compatible = "simple-bus";
+ #address-cells = <0x02>;
+ #size-cells = <0x02>;
+ ranges;
+
+ dmac@ff240000 {
+ compatible = "arm,pl330\0arm,primecell";
+ reg = <0x00 0xff240000 0x00 0x4000>;
+ interrupts = <0x00 0x01 0x04 0x00 0x02 0x04>;
+ clocks = <0x02 0xbb>;
+ clock-names = "apb_pclk";
+ #dma-cells = <0x01>;
+ peripherals-req-type-burst;
+ phandle = <0x2b>;
+ };
+ };
+
+ thermal-zones {
+ phandle = <0xfa>;
+
+ soc-thermal {
+ polling-delay-passive = <0x14>;
+ polling-delay = <0x3e8>;
+ sustainable-power = <0x2ee>;
+ thermal-sensors = <0x83 0x00>;
+ phandle = <0xfb>;
+
+ trips {
+
+ trip-point-0 {
+ temperature = <0x11170>;
+ hysteresis = <0x7d0>;
+ type = "passive";
+ phandle = <0xfc>;
+ };
+
+ trip-point-1 {
+ temperature = <0x14c08>;
+ hysteresis = <0x7d0>;
+ type = "passive";
+ phandle = <0x84>;
+ };
+
+ soc-crit {
+ temperature = <0x1c138>;
+ hysteresis = <0x7d0>;
+ type = "critical";
+ phandle = <0xfd>;
+ };
+ };
+
+ cooling-maps {
+
+ map0 {
+ trip = <0x84>;
+ cooling-device = <0x09 0xffffffff 0xffffffff>;
+ contribution = <0x1000>;
+ };
+
+ map1 {
+ trip = <0x84>;
+ cooling-device = <0x85 0xffffffff 0xffffffff>;
+ contribution = <0x1000>;
+ };
+ };
+ };
+
+ gpu-thermal {
+ polling-delay-passive = <0x64>;
+ polling-delay = <0x3e8>;
+ thermal-sensors = <0x83 0x01>;
+ phandle = <0xfe>;
+ };
+ };
+
+ tsadc@ff280000 {
+ compatible = "rockchip,px30-tsadc";
+ reg = <0x00 0xff280000 0x00 0x100>;
+ interrupts = <0x00 0x24 0x04>;
+ rockchip,grf = <0x2f>;
+ clocks = <0x02 0x2c 0x02 0x158>;
+ clock-names = "tsadc\0apb_pclk";
+ assigned-clocks = <0x02 0x2c>;
+ assigned-clock-rates = <0xc350>;
+ resets = <0x02 0xa8>;
+ reset-names = "tsadc-apb";
+ #thermal-sensor-cells = <0x01>;
+ rockchip,hw-tshut-temp = <0x1d4c0>;
+ status = "okay";
+ pinctrl-names = "gpio\0otpout";
+ pinctrl-0 = <0x86>;
+ pinctrl-1 = <0x87>;
+ phandle = <0x83>;
+ };
+
+ saradc@ff288000 {
+ compatible = "rockchip,px30-saradc\0rockchip,rk3399-saradc";
+ reg = <0x00 0xff288000 0x00 0x100>;
+ interrupts = <0x00 0x54 0x04>;
+ #io-channel-cells = <0x01>;
+ clocks = <0x02 0x2d 0x02 0x157>;
+ clock-names = "saradc\0apb_pclk";
+ resets = <0x02 0xa5>;
+ reset-names = "saradc-apb";
+ status = "okay";
+ vref-supply = <0x88>;
+ phandle = <0xbe>;
+ };
+
+ otp@ff290000 {
+ compatible = "rockchip,px30-otp";
+ reg = <0x00 0xff290000 0x00 0x4000>;
+ #address-cells = <0x01>;
+ #size-cells = <0x01>;
+ clocks = <0x02 0x2f 0x02 0x15a 0x02 0x161>;
+ clock-names = "clk_otp\0pclk_otp\0pclk_otp_phy";
+ resets = <0x02 0xb4>;
+ reset-names = "otp_phy";
+ phandle = <0xff>;
+
+ id@7 {
+ reg = <0x07 0x10>;
+ phandle = <0x0f>;
+ };
+
+ cpu-leakage@17 {
+ reg = <0x17 0x01>;
+ phandle = <0x07>;
+ };
+
+ performance@1e {
+ reg = <0x1e 0x01>;
+ bits = <0x04 0x03>;
+ phandle = <0x08>;
+ };
+ };
+
+ clock-controller@ff2b0000 {
+ compatible = "rockchip,px30-cru";
+ reg = <0x00 0xff2b0000 0x00 0x1000>;
+ rockchip,grf = <0x2f>;
+ rockchip,boost = <0x89>;
+ #clock-cells = <0x01>;
+ #reset-cells = <0x01>;
+ assigned-clocks = <0x02 0x04>;
+ assigned-clock-rates = <0x3dfd2400>;
+ phandle = <0x02>;
+ };
+
+ cpu-boost@ff2b8000 {
+ compatible = "syscon";
+ reg = <0x00 0xff2b8000 0x00 0x1000>;
+ rockchip,boost-low-con0 = <0x1032>;
+ rockchip,boost-low-con1 = <0x1441>;
+ rockchip,boost-high-con0 = <0x1036>;
+ rockchip,boost-high-con1 = <0x1441>;
+ rockchip,boost-backup-pll = <0x01>;
+ rockchip,boost-backup-pll-usage = <0x00>;
+ rockchip,boost-switch-threshold = <0x249f00>;
+ rockchip,boost-statis-threshold = <0x100>;
+ rockchip,boost-statis-enable = <0x00>;
+ rockchip,boost-enable = <0x00>;
+ phandle = <0x89>;
+ };
+
+ pmu-clock-controller@ff2bc000 {
+ compatible = "rockchip,px30-pmucru";
+ reg = <0x00 0xff2bc000 0x00 0x1000>;
+ rockchip,grf = <0x2f>;
+ #clock-cells = <0x01>;
+ #reset-cells = <0x01>;
+ assigned-clocks = <0x2a 0x01 0x2a 0x08 0x2a 0x05 0x02 0x07 0x02 0xab 0x02 0xb0 0x02 0xf0 0x02 0xf5 0x02 0x140 0x02 0x49>;
+ assigned-clock-rates = <0x47868c00 0x5f5e100 0x18cba80 0x23c34600 0xbebc200 0xbebc200 0x8f0d180 0x8f0d180 0x5f5e100 0xbebc200>;
+ phandle = <0x2a>;
+ };
+
+ syscon@ff2c0000 {
+ compatible = "rockchip,px30-usb2phy-grf\0syscon\0simple-mfd";
+ reg = <0x00 0xff2c0000 0x00 0x10000>;
+ #address-cells = <0x01>;
+ #size-cells = <0x01>;
+ phandle = <0x100>;
+
+ usb2-phy@100 {
+ compatible = "rockchip,px30-usb2phy\0rockchip,rk3328-usb2phy";
+ reg = <0x100 0x10>;
+ clocks = <0x2a 0x0a>;
+ clock-names = "phyclk";
+ #clock-cells = <0x00>;
+ assigned-clocks = <0x02 0x0e 0x02 0x55>;
+ assigned-clock-parents = <0x67 0x02 0x0e>;
+ clock-output-names = "usb480m_phy";
+ status = "okay";
+ phandle = <0x67>;
+
+ host-port {
+ #phy-cells = <0x00>;
+ interrupts = <0x00 0x44 0x04>;
+ interrupt-names = "linestate";
+ status = "okay";
+ phandle = <0x8c>;
+ };
+
+ otg-port {
+ #phy-cells = <0x00>;
+ interrupts = <0x00 0x42 0x04 0x00 0x41 0x04 0x00 0x40 0x04>;
+ interrupt-names = "otg-bvalid\0otg-id\0linestate";
+ status = "disabled";
+ phandle = <0x8b>;
+ };
+ };
+ };
+
+ video-phy@ff2e0000 {
+ compatible = "rockchip,px30-video-phy";
+ reg = <0x00 0xff2e0000 0x00 0x10000 0x00 0xff450000 0x00 0x10000>;
+ clocks = <0x2a 0x0b 0x02 0x145 0x02 0x144>;
+ clock-names = "ref\0pclk_phy\0pclk_host";
+ #clock-cells = <0x00>;
+ resets = <0x02 0x3e>;
+ reset-names = "rst";
+ power-domains = <0x8a 0x0c>;
+ #phy-cells = <0x00>;
+ status = "okay";
+ phandle = <0x4c>;
+ };
+
+ mipi-dphy-rx0@ff2f0000 {
+ compatible = "rockchip,rk3326-mipi-dphy";
+ reg = <0x00 0xff2f0000 0x00 0x4000>;
+ clocks = <0x02 0x146>;
+ clock-names = "dphy-ref";
+ power-domains = <0x8a 0x0d>;
+ rockchip,grf = <0x2f>;
+ status = "okay";
+ phandle = <0x101>;
+ };
+
+ usb@ff300000 {
+ compatible = "rockchip,px30-usb\0rockchip,rk3066-usb\0snps,dwc2";
+ reg = <0x00 0xff300000 0x00 0x40000>;
+ interrupts = <0x00 0x3e 0x04>;
+ clocks = <0x02 0x102>;
+ clock-names = "otg";
+ power-domains = <0x8a 0x05>;
+ dr_mode = "otg";
+ g-np-tx-fifo-size = <0x10>;
+ g-rx-fifo-size = <0x118>;
+ g-tx-fifo-size = <0x100 0x80 0x80 0x40 0x20 0x10>;
+ g-use-dma;
+ phys = <0x8b>;
+ phy-names = "usb2-phy";
+ status = "okay";
+ phandle = <0x102>;
+ vbus-supply = <&vcc_host>;
+ };
+
+ usb@ff340000 {
+ compatible = "generic-ehci";
+ reg = <0x00 0xff340000 0x00 0x10000>;
+ interrupts = <0x00 0x3c 0x04>;
+ clocks = <0x02 0x103 0x67>;
+ clock-names = "usbhost\0utmi";
+ power-domains = <0x8a 0x05>;
+ phys = <0x8c>;
+ phy-names = "usb";
+ status = "disabled";
+ phandle = <0x103>;
+ };
+
+ usb@ff350000 {
+ compatible = "generic-ohci";
+ reg = <0x00 0xff350000 0x00 0x10000>;
+ interrupts = <0x00 0x3d 0x04>;
+ clocks = <0x02 0x103 0x67>;
+ clock-names = "usbhost\0utmi";
+ power-domains = <0x8a 0x05>;
+ phys = <0x8c>;
+ phy-names = "usb";
+ status = "disabled";
+ phandle = <0x104>;
+ };
+
+ ethernet@ff360000 {
+ compatible = "rockchip,px30-gmac";
+ reg = <0x00 0xff360000 0x00 0x10000>;
+ rockchip,grf = <0x2f>;
+ interrupts = <0x00 0x2b 0x04>;
+ interrupt-names = "macirq";
+ clocks = <0x02 0x3e 0x02 0x3f 0x02 0x3f 0x02 0x40 0x02 0x41 0x02 0xb2 0x02 0x143 0x02 0x4c>;
+ clock-names = "stmmaceth\0mac_clk_rx\0mac_clk_tx\0clk_mac_ref\0clk_mac_refout\0aclk_mac\0pclk_mac\0clk_mac_speed";
+ phy-mode = "rmii";
+ pinctrl-names = "default";
+ pinctrl-0 = <0x8d 0x8e>;
+ resets = <0x02 0x5e>;
+ reset-names = "stmmaceth";
+ power-domains = <0x8a 0x09>;
+ status = "disabled";
+ phandle = <0x105>;
+ };
+
+ dwmmc@ff370000 {
+ compatible = "rockchip,px30-dw-mshc\0rockchip,rk3288-dw-mshc";
+ reg = <0x00 0xff370000 0x00 0x4000>;
+ max-frequency = <0x8f0d180>;
+ clocks = <0x02 0xf7 0x02 0x3b 0x02 0x43 0x02 0x44>;
+ clock-names = "biu\0ciu\0ciu-drv\0ciu-sample";
+ assigned-clocks = <0x02 0x3b>;
+ assigned-clock-parents = <0x02 0x57>;
+ power-domains = <0x8a 0x07>;
+ fifo-depth = <0x100>;
+ interrupts = <0x00 0x36 0x04>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x8f 0x90 0x91 0x92>;
+ status = "okay";
+ bus-width = <0x04>;
+ cap-mmc-highspeed;
+ cap-sd-highspeed;
+ supports-sd;
+ card-detect-delay = <0x320>;
+ ignore-pm-notify;
+ cd-gpios = <0x5c 0x03 0x01>;
+ sd-uhs-sdr12;
+ sd-uhs-sdr25;
+ sd-uhs-sdr50;
+ sd-uhs-sdr104;
+ vqmmc-supply = <0x4a>;
+ vmmc-supply = <0x93>;
+ phandle = <0x106>;
+ };
+
+ dwmmc@ff380000 {
+ compatible = "rockchip,px30-dw-mshc\0rockchip,rk3288-dw-mshc";
+ reg = <0x00 0xff380000 0x00 0x4000>;
+ max-frequency = <0x8f0d180>;
+ clocks = <0x02 0xff 0x02 0x38 0x02 0x45 0x02 0x46>;
+ clock-names = "biu\0ciu\0ciu-drv\0ciu-sample";
+ assigned-clocks = <0x02 0x38>;
+ assigned-clock-parents = <0x02 0x51>;
+ power-domains = <0x8a 0x0a>;
+ fifo-depth = <0x100>;
+ interrupts = <0x00 0x37 0x04>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x94 0x95 0x96>;
+ status = "okay";
+ bus-width = <0x04>;
+ cap-mmc-highspeed;
+ cap-sd-highspeed;
+ supports-sd;
+ card-detect-delay = <0x320>;
+ ignore-pm-notify;
+ cd-gpios = <0x97 0x0e 0x01>;
+ sd-uhs-sdr12;
+ sd-uhs-sdr25;
+ sd-uhs-sdr50;
+ sd-uhs-sdr104;
+ vqmmc-supply = <0x4a>;
+ vmmc-supply = <0x93>;
+ phandle = <0x107>;
+ };
+
+ dwmmc@ff390000 {
+ compatible = "rockchip,px30-dw-mshc\0rockchip,rk3288-dw-mshc";
+ reg = <0x00 0xff390000 0x00 0x4000>;
+ max-frequency = <0x8f0d180>;
+ clocks = <0x02 0x100 0x02 0x39 0x02 0x47 0x02 0x48>;
+ clock-names = "biu\0ciu\0ciu-drv\0ciu-sample";
+ assigned-clocks = <0x02 0x39>;
+ assigned-clock-parents = <0x02 0x53>;
+ power-domains = <0x8a 0x0a>;
+ fifo-depth = <0x100>;
+ interrupts = <0x00 0x35 0x04>;
+ status = "disabled";
+ phandle = <0x108>;
+ };
+
+ nandc@ff3b0000 {
+ compatible = "rockchip,rk-nandc";
+ reg = <0x00 0xff3b0000 0x00 0x4000>;
+ interrupts = <0x00 0x39 0x04>;
+ nandc_id = <0x00>;
+ clocks = <0x02 0x37 0x02 0xfe>;
+ clock-names = "clk_nandc\0hclk_nandc";
+ assigned-clocks = <0x02 0x37>;
+ assigned-clock-parents = <0x02 0x4f>;
+ power-domains = <0x8a 0x0a>;
+ status = "disabled";
+ phandle = <0x109>;
+ };
+
+ sfc@ff3a0000 {
+ compatible = "rockchip,sfc";
+ reg = <0x00 0xff3a0000 0x00 0x4000>;
+ interrupts = <0x00 0x38 0x04>;
+ clocks = <0x02 0x3a 0x02 0x101>;
+ clock-names = "clk_sfc\0hclk_sfc";
+ assigned-clocks = <0x02 0x3a>;
+ assigned-clock-rates = <0x989680>;
+ status = "disabled";
+ phandle = <0x10a>;
+ };
+
+ gpu@ff400000 {
+ compatible = "arm,malit602\0arm,malit60x\0arm,malit6xx\0arm,mali-midgard";
+ reg = <0x00 0xff400000 0x00 0x4000>;
+ interrupts = <0x00 0x2d 0x04 0x00 0x2e 0x04 0x00 0x2f 0x04>;
+ interrupt-names = "GPU\0MMU\0JOB";
+ clocks = <0x02 0x49>;
+ clock-names = "clk_mali";
+ power-domains = <0x8a 0x0e>;
+ #cooling-cells = <0x02>;
+ operating-points-v2 = <0x98>;
+ status = "okay";
+ mali-supply = <0x0e>;
+ phandle = <0x85>;
+
+ power_model {
+ compatible = "arm,mali-simple-power-model";
+ static-coefficient = <0x64578>;
+ dynamic-coefficient = <0x2dd>;
+ ts = <0x7d00 0x125c 0xffffffb0 0x02>;
+ thermal-zone = "gpu-thermal";
+ };
+ };
+
+ gpu-opp-table {
+ compatible = "operating-points-v2";
+ rockchip,thermal-zone = "soc-thermal";
+ rockchip,temp-hysteresis = <0x1388>;
+ rockchip,low-temp = <0x00>;
+ rockchip,low-temp-min-volt = <0xf4240>;
+ rockchip,low-temp-adjust-volt = <0x00 0x1e0 0xc350>;
+ rockchip,max-volt = <0x11edd8>;
+ rockchip,evb-irdrop = <0x61a8>;
+ rockchip,pvtm-voltage-sel = <0x00 0xc350 0x00 0xc351 0xd2f0 0x01 0xd2f1 0xea60 0x02 0xea61 0x1869f 0x03>;
+ rockchip,pvtm-ch = <0x00 0x00>;
+ phandle = <0x98>;
+
+ opp-400000000 {
+ opp-hz = <0x00 0x17d78400>;
+ opp-microvolt = <0x100590>;
+ opp-microvolt-L0 = <0x100590>;
+ opp-microvolt-L1 = <0xfa3e8>;
+ opp-microvolt-L2 = <0xee098>;
+ opp-microvolt-L3 = <0xe7ef0>;
+ };
+
+ opp-480000000 {
+ opp-hz = <0x00 0x1c9c3800>;
+ opp-microvolt = <0x112a88>;
+ opp-microvolt-L0 = <0x112a88>;
+ opp-microvolt-L1 = <0x10c8e0>;
+ opp-microvolt-L2 = <0x100590>;
+ opp-microvolt-L3 = <0xf4240>;
+ };
+
+ opp-520000000 {
+ opp-hz = <0x00 0x1efe9200>;
+ opp-microvolt = <0x118c30>;
+ opp-microvolt-L0 = <0x118c30>;
+ opp-microvolt-L1 = <0x118c30>;
+ opp-microvolt-L2 = <0x10c8e0>;
+ opp-microvolt-L3 = <0x100590>;
+ };
+ };
+
+ hevc_service@ff440000 {
+ compatible = "rockchip,hevc_sub";
+ iommu_enabled = <0x01>;
+ reg = <0x00 0xff440000 0x00 0x400>;
+ interrupts = <0x00 0x31 0x04>;
+ interrupt-names = "irq_dec";
+ dev_mode = <0x01>;
+ iommus = <0x99>;
+ allocator = <0x01>;
+ phandle = <0x9c>;
+ };
+
+ vpu_service@ff442000 {
+ compatible = "rockchip,vpu_sub";
+ iommu_enabled = <0x01>;
+ reg = <0x00 0xff442000 0x00 0x800>;
+ interrupts = <0x00 0x50 0x04 0x00 0x4f 0x04>;
+ interrupt-names = "irq_enc\0irq_dec";
+ dev_mode = <0x00>;
+ iommus = <0x9a>;
+ allocator = <0x01>;
+ phandle = <0x9b>;
+ };
+
+ vpu_combo {
+ compatible = "rockchip,vpu_combo";
+ subcnt = <0x02>;
+ rockchip,grf = <0x2f>;
+ rockchip,sub = <0x9b 0x9c>;
+ clocks = <0x02 0xaf 0x02 0xf4 0x02 0x4b>;
+ clock-names = "aclk_vcodec\0hclk_vcodec\0clk_core";
+ resets = <0x02 0x24 0x02 0x26 0x02 0x25 0x02 0x27 0x02 0x3f>;
+ reset-names = "video_a\0video_h\0niu_a\0niu_h\0video_core";
+ power-domains = <0x8a 0x0b>;
+ mode_bit = <0x0f>;
+ mode_ctrl = <0x410>;
+ status = "okay";
+ phandle = <0x10b>;
+ };
+
+ iommu@ff440440 {
+ compatible = "rockchip,iommu";
+ reg = <0x00 0xff440440 0x00 0x40 0x00 0xff440480 0x00 0x40>;
+ interrupts = <0x00 0x32 0x04>;
+ interrupt-names = "hevc_mmu";
+ clocks = <0x02 0xaf 0x02 0xf4>;
+ clock-names = "aclk\0hclk";
+ power-domains = <0x8a 0x0b>;
+ #iommu-cells = <0x00>;
+ phandle = <0x99>;
+ };
+
+ iommu@ff442800 {
+ compatible = "rockchip,iommu";
+ reg = <0x00 0xff442800 0x00 0x100>;
+ interrupts = <0x00 0x51 0x04>;
+ interrupt-names = "vpu_mmu";
+ clocks = <0x02 0xaf 0x02 0xf4>;
+ clock-names = "aclk\0hclk";
+ power-domains = <0x8a 0x0b>;
+ #iommu-cells = <0x00>;
+ phandle = <0x9a>;
+ };
+
+ dsi@ff450000 {
+ compatible = "rockchip,px30-mipi-dsi";
+ reg = <0x00 0xff450000 0x00 0x10000>;
+ interrupts = <0x00 0x4b 0x04>;
+ clocks = <0x02 0x144 0x4c>;
+ clock-names = "pclk\0hs_clk";
+ resets = <0x02 0x3d>;
+ reset-names = "apb";
+ phys = <0x4c>;
+ phy-names = "mipi_dphy";
+ power-domains = <0x8a 0x0c>;
+ rockchip,grf = <0x2f>;
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+ status = "okay";
+ phandle = <0x10c>;
+
+ ports {
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+
+ port@0 {
+ reg = <0x00>;
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+
+ endpoint@0 {
+ reg = <0x00>;
+ remote-endpoint = <0x13>;
+ status = "okay";
+ phandle = <0xa3>;
+ };
+ };
+ };
+
+ panel@0 {
+ compatible = "elida,kd35t133\0simple-panel-dsi";
+ reg = <0x00>;
+ backlight = <0x9d>;
+ backlight-supply = <0x9e>;
+ power-supply = <0x9f>;
+ reset-gpios = <0x97 0x10 0x01>;
+ reset-delay-ms = <0x96>;
+ init-delay-ms = <0x14>;
+ enable-delay-ms = <0x78>;
+ prepare-delay-ms = <0x14>;
+ unprepare-delay-ms = <0x14>;
+ disable-delay-ms = <0x32>;
+ width-mm = <0x34>;
+ height-mm = <0x46>;
+ dsi,flags = <0xa03>;
+ dsi,format = <0x00>;
+ dsi,lanes = <0x04>;
+ panel-init-sequence = [15 00 02 ff 30 15 00 02 ff 52 15 00 02 ff 01 15 00 02 e3 00 15 00 02 25 10 15 00 02 28 6f 15 00 02 29 01 15 00 02 2a df 15 00 02 2c 22 15 00 02 c3 0f 15 00 02 37 9c 15 00 02 38 a7 15 00 02 39 41 15 00 02 80 20 15 00 02 91 67 15 00 02 92 67 15 00 02 a0 55 15 00 02 a1 50 15 00 02 a3 58 15 00 02 a4 9c 15 00 02 a7 02 15 00 02 a8 01 15 00 02 a9 21 15 00 02 aa fc 15 00 02 ab 28 15 00 02 ac 06 15 00 02 ad 06 15 00 02 ae 06 15 00 02 af 03 15 00 02 b0 08 15 00 02 b1 26 15 00 02 b2 28 15 00 02 b3 28 15 00 02 b4 03 15 00 02 b5 08 15 00 02 b6 26 15 00 02 b7 08 15 00 02 b8 26 15 00 02 2c 22 15 00 02 5c 40 15 00 02 c0 00 15 00 02 c1 00 15 00 02 c2 00 15 00 02 ff 30 15 00 02 ff 52 15 00 02 ff 02 15 00 02 b0 02 15 00 02 d0 02 15 00 02 b1 0f 15 00 02 d1 10 15 00 02 b2 11 15 00 02 d2 12 15 00 02 b3 32 15 00 02 d3 33 15 00 02 b4 36 15 00 02 d4 36 15 00 02 b5 3c 15 00 02 d5 3c 15 00 02 b6 20 15 00 02 d6 20 15 00 02 b7 3e 15 00 02 d7 3e 15 00 02 b8 0e 15 00 02 d8 0d 15 00 02 b9 05 15 00 02 d9 05 15 00 02 ba 11 15 00 02 da 12 15 00 02 bb 11 15 00 02 db 11 15 00 02 bc 13 15 00 02 dc 14 15 00 02 bd 14 15 00 02 dd 14 15 00 02 be 16 15 00 02 de 18 15 00 02 bf 0e 15 00 02 df 0f 15 00 02 c0 17 15 00 02 e0 17 15 00 02 c1 07 15 00 02 e1 08 15 00 02 ff 30 15 00 02 ff 52 15 00 02 ff 03 15 00 02 08 8a 15 00 02 09 8b 15 00 02 30 00 15 00 02 31 00 15 00 02 32 00 15 00 02 33 00 15 00 02 34 61 15 00 02 35 d4 15 00 02 36 24 15 00 02 37 03 15 00 02 40 86 15 00 02 41 87 15 00 02 42 84 15 00 02 43 85 15 00 02 44 11 15 00 02 45 de 15 00 02 46 dd 15 00 02 47 11 15 00 02 48 e0 15 00 02 49 df 15 00 02 50 82 15 00 02 51 83 15 00 02 52 80 15 00 02 53 81 15 00 02 54 11 15 00 02 55 e2 15 00 02 56 e1 15 00 02 57 11 15 00 02 58 e4 15 00 02 59 e3 15 00 02 82 0f 15 00 02 83 0f 15 00 02 84 00 15 00 02 85 0f 15 00 02 86 0f 15 00 02 87 0e 15 00 02 88 0e 15 00 02 89 06 15 00 02 8a 06 15 00 02 8b 07 15 00 02 8c 07 15 00 02 8d 04 15 00 02 8e 04 15 00 02 8f 05 15 00 02 90 05 15 00 02 98 0f 15 00 02 99 0f 15 00 02 9a 00 15 00 02 9b 0f 15 00 02 9c 0f 15 00 02 9d 0e 15 00 02 9e 0e 15 00 02 9f 06 15 00 02 a0 06 15 00 02 a1 07 15 00 02 a2 07 15 00 02 a3 04 15 00 02 a4 04 15 00 02 a5 05 15 00 02 a6 05 15 00 02 e0 02 15 00 02 e1 52 15 00 02 ff 30 15 00 02 ff 52 15 00 02 ff 00 15 00 02 36 02 05 c8 01 11 05 14 01 29];
+ panel-exit-sequence = <0x5140128 0x50a0110>;
+
+ display-timings {
+ native-mode = <0xa0>;
+
+ 60Hz {
+ clock-frequency = <0x3750280>;
+ hactive = <0x280>;
+ vactive = <0x1e0>;
+ hfront-porch = <0x12c>;
+ hsync-len = <0xc8>;
+ hback-porch = <0x12c>;
+ vfront-porch = <0x11>;
+ vsync-len = <0x05>;
+ vback-porch = <0x0d>;
+ hsync-active = <0x00>;
+ vsync-active = <0x00>;
+ de-active = <0x00>;
+ pixelclk-active = <0x01>;
+ phandle = <0xa0>;
+ };
+
+ 50Hz {
+ clock-frequency = <0x3750280>;
+ hactive = <0x280>;
+ vactive = <0x1e0>;
+ hfront-porch = <0x12c>;
+ hsync-len = <0xc8>;
+ hback-porch = <0x12c>;
+ vfront-porch = <0x11>;
+ vsync-len = <0x05>;
+ vback-porch = <0x0d>;
+ hsync-active = <0x00>;
+ vsync-active = <0x00>;
+ de-active = <0x00>;
+ pixelclk-active = <0x01>;
+ phandle = <0xa00>;
+ };
+
+ 75Hz {
+ clock-frequency = <0x3750280>;
+ hactive = <0x280>;
+ vactive = <0x1e0>;
+ hfront-porch = <0x12c>;
+ hsync-len = <0xc8>;
+ hback-porch = <0x12c>;
+ vfront-porch = <0x11>;
+ vsync-len = <0x05>;
+ vback-porch = <0x0d>;
+ hsync-active = <0x00>;
+ vsync-active = <0x00>;
+ de-active = <0x00>;
+ pixelclk-active = <0x01>;
+ phandle = <0xa01>;
+ };
+ };
+ };
+ };
+
+ vop@ff460000 {
+ compatible = "rockchip,px30-vop-big";
+ reg = <0x00 0xff460000 0x00 0x1fc 0x00 0xff460a00 0x00 0x400>;
+ rockchip,grf = <0x2f>;
+ reg-names = "regs\0gamma_lut";
+ interrupts = <0x00 0x4d 0x04>;
+ clocks = <0x02 0xb5 0x02 0x96 0x02 0xfb>;
+ clock-names = "aclk_vop\0dclk_vop\0hclk_vop";
+ power-domains = <0x8a 0x0c>;
+ iommus = <0xa1>;
+ status = "okay";
+ phandle = <0x10f>;
+
+ port {
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+ phandle = <0x10>;
+
+ endpoint@0 {
+ reg = <0x00>;
+ remote-endpoint = <0xa2>;
+ phandle = <0x12>;
+ };
+
+ endpoint@1 {
+ reg = <0x01>;
+ remote-endpoint = <0xa3>;
+ phandle = <0x13>;
+ };
+
+ endpoint@2 {
+ reg = <0x02>;
+ remote-endpoint = <0xa4>;
+ phandle = <0x14>;
+ };
+ };
+ };
+
+ iommu@ff460f00 {
+ compatible = "rockchip,iommu";
+ reg = <0x00 0xff460f00 0x00 0x100>;
+ interrupts = <0x00 0x4d 0x04>;
+ interrupt-names = "vopb_mmu";
+ clocks = <0x02 0xb5 0x02 0xfb>;
+ clock-names = "aclk\0hclk";
+ power-domains = <0x8a 0x0c>;
+ #iommu-cells = <0x00>;
+ status = "okay";
+ phandle = <0xa1>;
+ };
+
+ rk_rga@ff480000 {
+ compatible = "rockchip,rga2";
+ reg = <0x00 0xff480000 0x00 0x1000>;
+ interrupts = <0x00 0x4c 0x04>;
+ clocks = <0x02 0xb7 0x02 0xfd 0x02 0x35>;
+ clock-names = "aclk_rga\0hclk_rga\0clk_rga";
+ power-domains = <0x8a 0x0c>;
+ dma-coherent;
+ status = "okay";
+ phandle = <0x110>;
+ };
+
+ cif@ff490000 {
+ compatible = "rockchip,cif";
+ reg = <0x00 0xff490000 0x00 0x200>;
+ interrupts = <0x00 0x45 0x04>;
+ clocks = <0x02 0xb3 0x02 0xf9 0x02 0x160 0x02 0x34>;
+ clock-names = "aclk_cif0\0hclk_cif0\0pclk_cif\0cif0_out";
+ resets = <0x02 0x2c 0x02 0x2d 0x02 0x2e>;
+ reset-names = "rst_cif_a\0rst_cif_h\0rst_cif_pclkin";
+ power-domains = <0x8a 0x0d>;
+ pinctrl-names = "cif_pin_all";
+ pinctrl-0 = <0xa5>;
+ iommus = <0xa6>;
+ status = "disabled";
+ phandle = <0x111>;
+ };
+
+ cif-new@ff490000 {
+ compatible = "rockchip,px30-cif";
+ reg = <0x00 0xff490000 0x00 0x200>;
+ interrupts = <0x00 0x45 0x04>;
+ clocks = <0x02 0xb3 0x02 0xf9 0x02 0x160 0x02 0x34>;
+ clock-names = "aclk_cif\0hclk_cif\0pclk_cif\0cif_out";
+ resets = <0x02 0x2c 0x02 0x2d 0x02 0x2e>;
+ reset-names = "rst_cif_a\0rst_cif_h\0rst_cif_pclkin";
+ power-domains = <0x8a 0x0d>;
+ iommus = <0xa6>;
+ status = "disabled";
+ phandle = <0x112>;
+ };
+
+ iommu@ff490800 {
+ compatible = "rockchip,iommu";
+ reg = <0x00 0xff490800 0x00 0x100>;
+ interrupts = <0x00 0x45 0x04>;
+ interrupt-names = "vip_mmu";
+ clocks = <0x02 0xb3 0x02 0xf9>;
+ clock-names = "aclk\0hclk";
+ power-domains = <0x8a 0x0d>;
+ rk_iommu,disable_reset_quirk;
+ #iommu-cells = <0x00>;
+ status = "okay";
+ phandle = <0xa6>;
+ };
+
+ rk_isp@ff4a0000 {
+ compatible = "rockchip,px30-isp\0rockchip,isp";
+ reg = <0x00 0xff4a0000 0x00 0x8000>;
+ interrupts = <0x00 0x46 0x04>;
+ clocks = <0x02 0xb4 0x02 0xfa 0x02 0x33 0x02 0x33 0x02 0x15f 0x02 0x34 0x02 0x34 0x02 0x146>;
+ clock-names = "aclk_isp\0hclk_isp\0clk_isp\0clk_isp_jpe\0pclkin_isp\0clk_cif_pll\0clk_cif_out\0pclk_dphyrx";
+ resets = <0x02 0x2b 0x02 0x2f>;
+ reset-names = "rst_isp\0rst_mipicsiphy";
+ power-domains = <0x8a 0x0d>;
+ pinctrl-names = "default\0isp_dvp8bit2\0isp_dvp10bit\0isp_dvp12bit";
+ pinctrl-0 = <0xa7>;
+ pinctrl-1 = <0xa5>;
+ pinctrl-2 = <0xa5 0xa8>;
+ pinctrl-3 = <0xa9 0xa5 0xa8>;
+ rockchip,isp,mipiphy = <0x01>;
+ rockchip,isp,csiphy,reg = <0xff2f0000 0x4000>;
+ rockchip,grf = <0x2f>;
+ rockchip,cru = <0x02>;
+ rockchip,isp,iommu-enable = <0x01>;
+ iommus = <0xaa>;
+ status = "disabled";
+ phandle = <0x113>;
+ };
+
+ rkisp1@ff4a0000 {
+ compatible = "rockchip,rk3326-rkisp1";
+ reg = <0x00 0xff4a0000 0x00 0x8000>;
+ interrupts = <0x00 0x46 0x04 0x00 0x49 0x04 0x00 0x4a 0x04>;
+ interrupt-names = "isp_irq\0mi_irq\0mipi_irq";
+ clocks = <0x02 0xb4 0x02 0xfa 0x02 0x33 0x02 0x15f>;
+ clock-names = "aclk_isp\0hclk_isp\0clk_isp\0pclk_isp";
+ devfreq = <0xab>;
+ power-domains = <0x8a 0x0d>;
+ iommus = <0xaa>;
+ rockchip,grf = <0x2f>;
+ status = "okay";
+ phandle = <0x114>;
+ };
+
+ iommu@ff4a8000 {
+ compatible = "rockchip,iommu";
+ reg = <0x00 0xff4a8000 0x00 0x100>;
+ interrupts = <0x00 0x46 0x04>;
+ interrupt-names = "isp_mmu";
+ clocks = <0x02 0xb4 0x02 0xfa>;
+ clock-names = "aclk\0hclk";
+ power-domains = <0x8a 0x0d>;
+ rk_iommu,disable_reset_quirk;
+ #iommu-cells = <0x00>;
+ status = "okay";
+ phandle = <0xaa>;
+ };
+
+ qos@ff518000 {
+ compatible = "syscon";
+ reg = <0x00 0xff518000 0x00 0x20>;
+ phandle = <0x18>;
+ };
+
+ qos@ff520000 {
+ compatible = "syscon";
+ reg = <0x00 0xff520000 0x00 0x20>;
+ phandle = <0x28>;
+ };
+
+ qos@ff52c000 {
+ compatible = "syscon";
+ reg = <0x00 0xff52c000 0x00 0x20>;
+ phandle = <0x17>;
+ };
+
+ qos@ff538000 {
+ compatible = "syscon";
+ reg = <0x00 0xff538000 0x00 0x20>;
+ phandle = <0x19>;
+ };
+
+ qos@ff538080 {
+ compatible = "syscon";
+ reg = <0x00 0xff538080 0x00 0x20>;
+ phandle = <0x1a>;
+ };
+
+ qos@ff538100 {
+ compatible = "syscon";
+ reg = <0x00 0xff538100 0x00 0x20>;
+ phandle = <0x1b>;
+ };
+
+ qos@ff538180 {
+ compatible = "syscon";
+ reg = <0x00 0xff538180 0x00 0x20>;
+ phandle = <0x1c>;
+ };
+
+ qos@ff540000 {
+ compatible = "syscon";
+ reg = <0x00 0xff540000 0x00 0x20>;
+ phandle = <0x15>;
+ };
+
+ qos@ff540080 {
+ compatible = "syscon";
+ reg = <0x00 0xff540080 0x00 0x20>;
+ phandle = <0x16>;
+ };
+
+ qos@ff548000 {
+ compatible = "syscon";
+ reg = <0x00 0xff548000 0x00 0x20>;
+ phandle = <0x23>;
+ };
+
+ qos@ff548080 {
+ compatible = "syscon";
+ reg = <0x00 0xff548080 0x00 0x20>;
+ phandle = <0x24>;
+ };
+
+ qos@ff548100 {
+ compatible = "syscon";
+ reg = <0x00 0xff548100 0x00 0x20>;
+ phandle = <0x25>;
+ };
+
+ qos@ff548180 {
+ compatible = "syscon";
+ reg = <0x00 0xff548180 0x00 0x20>;
+ phandle = <0x26>;
+ };
+
+ qos@ff548200 {
+ compatible = "syscon";
+ reg = <0x00 0xff548200 0x00 0x20>;
+ phandle = <0x27>;
+ };
+
+ qos@ff550000 {
+ compatible = "syscon";
+ reg = <0x00 0xff550000 0x00 0x20>;
+ phandle = <0x1f>;
+ };
+
+ qos@ff550080 {
+ compatible = "syscon";
+ reg = <0x00 0xff550080 0x00 0x20>;
+ phandle = <0x20>;
+ };
+
+ qos@ff550100 {
+ compatible = "syscon";
+ reg = <0x00 0xff550100 0x00 0x20>;
+ phandle = <0x21>;
+ };
+
+ qos@ff550180 {
+ compatible = "syscon";
+ reg = <0x00 0xff550180 0x00 0x20>;
+ phandle = <0x22>;
+ };
+
+ qos@ff558000 {
+ compatible = "syscon";
+ reg = <0x00 0xff558000 0x00 0x20>;
+ phandle = <0x1d>;
+ };
+
+ qos@ff558080 {
+ compatible = "syscon";
+ reg = <0x00 0xff558080 0x00 0x20>;
+ phandle = <0x1e>;
+ };
+
+ dfi@ff610000 {
+ reg = <0x00 0xff610000 0x00 0x400>;
+ compatible = "rockchip,px30-dfi";
+ rockchip,pmugrf = <0xac>;
+ status = "okay";
+ phandle = <0xad>;
+ };
+
+ dmc {
+ compatible = "rockchip,px30-dmc";
+ interrupts = <0x00 0x69 0x04>;
+ interrupt-names = "complete_irq";
+ devfreq-events = <0xad>;
+ clocks = <0x02 0x54>;
+ clock-names = "dmc_clk";
+ operating-points-v2 = <0xae>;
+ ddr_timing = <0xaf>;
+ upthreshold = <0x28>;
+ downdifferential = <0x14>;
+ system-status-freq = <0x01 0x80e80 0x08 0x6ddd0 0x02 0x2f5d0 0x20 0x6ddd0 0x1000 0x80e80 0x4000 0xa2990 0x2000 0xa2990>;
+ auto-min-freq = <0x50140>;
+ auto-freq-en = <0x01>;
+ #cooling-cells = <0x02>;
+ status = "okay";
+ center-supply = <0x0e>;
+ phandle = <0xab>;
+
+ ddr_power_model {
+ compatible = "ddr_power_model";
+ dynamic-power-coefficient = <0x78>;
+ static-power-coefficient = <0xc8>;
+ ts = <0x7d00 0x125c 0xffffffb0 0x02>;
+ thermal-zone = "soc-thermal";
+ phandle = <0x115>;
+ };
+ };
+
+ dmc-opp-table {
+ compatible = "operating-points-v2";
+ rockchip,max-volt = <0x118c30>;
+ rockchip,evb-irdrop = <0x61a8>;
+ rockchip,pvtm-voltage-sel = <0x00 0xc350 0x00 0xc351 0xd2f0 0x01 0xd2f1 0xea60 0x02 0xea61 0x1869f 0x03>;
+ rockchip,pvtm-ch = <0x00 0x00>;
+ phandle = <0xae>;
+
+ opp-528000000 {
+ opp-hz = <0x00 0x1f78a400>;
+ opp-microvolt = <0xee098>;
+ opp-microvolt-L0 = <0xee098>;
+ opp-microvolt-L1 = <0xee098>;
+ opp-microvolt-L2 = <0xe7ef0>;
+ opp-microvolt-L3 = <0xe7ef0>;
+ };
+
+ opp-666000000 {
+ opp-hz = <0x00 0x27b25a80>;
+ opp-microvolt = <0x100590>;
+ opp-microvolt-L0 = <0x100590>;
+ opp-microvolt-L1 = <0xf4240>;
+ opp-microvolt-L2 = <0xee098>;
+ opp-microvolt-L3 = <0xe7ef0>;
+ };
+
+ opp-786000000 {
+ opp-hz = <0x00 0x2ed96880>;
+ opp-microvolt = <0x10c8e0>;
+ opp-microvolt-L0 = <0x10c8e0>;
+ opp-microvolt-L1 = <0x100590>;
+ opp-microvolt-L2 = <0xfa3e8>;
+ opp-microvolt-L3 = <0xf4240>;
+ status = "okay";
+ };
+ };
+
+ rockchip-system-monitor {
+ compatible = "rockchip,system-monitor";
+ rockchip,thermal-zone = "soc-thermal";
+ rockchip,polling-delay = <0xc8>;
+ phandle = <0x116>;
+ };
+
+ pinctrl {
+ compatible = "rockchip,px30-pinctrl";
+ rockchip,grf = <0x2f>;
+ rockchip,pmu = <0xac>;
+ #address-cells = <0x02>;
+ #size-cells = <0x02>;
+ ranges;
+ phandle = <0x117>;
+
+ gpio0@ff040000 {
+ compatible = "rockchip,gpio-bank";
+ reg = <0x00 0xff040000 0x00 0x100>;
+ interrupts = <0x00 0x03 0x04>;
+ clocks = <0x2a 0x14>;
+ gpio-controller;
+ #gpio-cells = <0x02>;
+ interrupt-controller;
+ #interrupt-cells = <0x02>;
+ phandle = <0x5c>;
+ };
+
+ gpio1@ff250000 {
+ compatible = "rockchip,gpio-bank";
+ reg = <0x00 0xff250000 0x00 0x100>;
+ interrupts = <0x00 0x04 0x04>;
+ clocks = <0x02 0x15c>;
+ gpio-controller;
+ #gpio-cells = <0x02>;
+ interrupt-controller;
+ #interrupt-cells = <0x02>;
+ phandle = <0xbf>;
+ };
+
+ gpio2@ff260000 {
+ compatible = "rockchip,gpio-bank";
+ reg = <0x00 0xff260000 0x00 0x100>;
+ interrupts = <0x00 0x05 0x04>;
+ clocks = <0x02 0x15d>;
+ gpio-controller;
+ #gpio-cells = <0x02>;
+ interrupt-controller;
+ #interrupt-cells = <0x02>;
+ phandle = <0x66>;
+ };
+
+ gpio3@ff270000 {
+ compatible = "rockchip,gpio-bank";
+ reg = <0x00 0xff270000 0x00 0x100>;
+ interrupts = <0x00 0x06 0x04>;
+ clocks = <0x02 0x15e>;
+ gpio-controller;
+ #gpio-cells = <0x02>;
+ interrupt-controller;
+ #interrupt-cells = <0x02>;
+ phandle = <0x97>;
+ };
+
+ pcfg-pull-up {
+ bias-pull-up;
+ phandle = <0xb2>;
+ };
+
+ pcfg-pull-down {
+ bias-pull-down;
+ phandle = <0x118>;
+ };
+
+ pcfg-pull-none {
+ bias-disable;
+ phandle = <0xb1>;
+ };
+
+ pcfg-pull-none-2ma {
+ bias-disable;
+ drive-strength = <0x02>;
+ phandle = <0x119>;
+ };
+
+ pcfg-pull-up-2ma {
+ bias-pull-up;
+ drive-strength = <0x02>;
+ phandle = <0x11a>;
+ };
+
+ pcfg-pull-up-4ma {
+ bias-pull-up;
+ drive-strength = <0x04>;
+ phandle = <0xb3>;
+ };
+
+ pcfg-pull-none-4ma {
+ bias-disable;
+ drive-strength = <0x04>;
+ phandle = <0x11b>;
+ };
+
+ pcfg-pull-down-4ma {
+ bias-pull-down;
+ drive-strength = <0x04>;
+ phandle = <0x11c>;
+ };
+
+ pcfg-pull-none-8ma {
+ bias-disable;
+ drive-strength = <0x08>;
+ phandle = <0xb6>;
+ };
+
+ pcfg-pull-up-8ma {
+ bias-pull-up;
+ drive-strength = <0x08>;
+ phandle = <0xb4>;
+ };
+
+ pcfg-pull-none-12ma {
+ bias-disable;
+ drive-strength = <0x0c>;
+ phandle = <0xb8>;
+ };
+
+ pcfg-pull-up-12ma {
+ bias-pull-up;
+ drive-strength = <0x0c>;
+ phandle = <0xb7>;
+ };
+
+ pcfg-pull-none-smt {
+ bias-disable;
+ input-schmitt-enable;
+ phandle = <0xb0>;
+ };
+
+ pcfg-output-high {
+ output-high;
+ phandle = <0x11d>;
+ };
+
+ pcfg-output-low {
+ output-low;
+ phandle = <0xb9>;
+ };
+
+ pcfg-input-high {
+ bias-pull-up;
+ input-enable;
+ phandle = <0xb5>;
+ };
+
+ pcfg-input {
+ input-enable;
+ phandle = <0x11e>;
+ };
+
+ i2c0 {
+
+ i2c0-xfer {
+ rockchip,pins = <0x00 0x08 0x01 0xb0 0x00 0x09 0x01 0xb0>;
+ phandle = <0x5b>;
+ };
+ };
+
+ i2c1 {
+
+ i2c1-xfer {
+ rockchip,pins = <0x00 0x12 0x01 0xb0 0x00 0x13 0x01 0xb0>;
+ phandle = <0x69>;
+ };
+ };
+
+ i2c2 {
+
+ i2c2-xfer {
+ rockchip,pins = <0x02 0x0f 0x02 0xb0 0x02 0x10 0x02 0xb0>;
+ phandle = <0x6a>;
+ };
+ };
+
+ i2c3 {
+
+ i2c3-xfer {
+ rockchip,pins = <0x01 0x0c 0x04 0xb0 0x01 0x0d 0x04 0xb0>;
+ phandle = <0x6b>;
+ };
+ };
+
+ tsadc {
+
+ tsadc-otp-gpio {
+ rockchip,pins = <0x00 0x06 0x00 0xb1>;
+ phandle = <0x86>;
+ };
+
+ tsadc-otp-out {
+ rockchip,pins = <0x00 0x06 0x01 0xb1>;
+ phandle = <0x87>;
+ };
+ };
+
+ uart0 {
+
+ uart0-xfer {
+ rockchip,pins = <0x00 0x0a 0x01 0xb2 0x00 0x0b 0x01 0xb2>;
+ phandle = <0x2c>;
+ };
+
+ uart0-cts {
+ rockchip,pins = <0x00 0x0c 0x01 0xb1>;
+ phandle = <0x2d>;
+ };
+
+ uart0-rts {
+ rockchip,pins = <0x00 0x0d 0x01 0xb1>;
+ phandle = <0x2e>;
+ };
+
+ uart0-rts-gpio {
+ rockchip,pins = <0x00 0x0d 0x00 0xb1>;
+ phandle = <0x11f>;
+ };
+ };
+
+ uart1 {
+
+ uart1-xfer {
+ rockchip,pins = <0x01 0x11 0x01 0xb2 0x01 0x10 0x01 0xb2>;
+ phandle = <0x4f>;
+ };
+
+ uart1-cts {
+ rockchip,pins = <0x01 0x12 0x01 0xb1>;
+ phandle = <0x50>;
+ };
+
+ uart1-rts {
+ rockchip,pins = <0x01 0x13 0x01 0xb1>;
+ phandle = <0x120>;
+ };
+
+ uart1-rts-gpio {
+ rockchip,pins = <0x01 0x13 0x00 0xb1>;
+ phandle = <0x121>;
+ };
+ };
+
+ uart2-m0 {
+
+ uart2m0-xfer {
+ rockchip,pins = <0x01 0x1a 0x02 0xb2 0x01 0x1b 0x02 0xb2>;
+ phandle = <0x51>;
+ };
+ };
+
+ uart2-m1 {
+
+ uart2m1-xfer {
+ rockchip,pins = <0x02 0x0c 0x02 0xb2 0x02 0x0e 0x02 0xb2>;
+ phandle = <0xba>;
+ };
+ };
+
+ uart3-m0 {
+
+ uart3m0-xfer {
+ rockchip,pins = <0x00 0x10 0x02 0xb2 0x00 0x11 0x02 0xb2>;
+ phandle = <0x122>;
+ };
+
+ uart3m0-cts {
+ rockchip,pins = <0x00 0x12 0x02 0xb1>;
+ phandle = <0x123>;
+ };
+
+ uart3m0-rts {
+ rockchip,pins = <0x00 0x13 0x02 0xb1>;
+ phandle = <0x124>;
+ };
+
+ uart3m0-rts-gpio {
+ rockchip,pins = <0x00 0x13 0x00 0xb1>;
+ phandle = <0x125>;
+ };
+ };
+
+ uart3-m1 {
+
+ uart3m1-xfer {
+ rockchip,pins = <0x01 0x0e 0x02 0xb2 0x01 0x0f 0x02 0xb2>;
+ phandle = <0x52>;
+ };
+
+ uart3m1-cts {
+ rockchip,pins = <0x01 0x0c 0x02 0xb1>;
+ phandle = <0x53>;
+ };
+
+ uart3m1-rts {
+ rockchip,pins = <0x01 0x0d 0x02 0xb1>;
+ phandle = <0x54>;
+ };
+
+ uart3m1-rts-gpio {
+ rockchip,pins = <0x01 0x0d 0x00 0xb1>;
+ phandle = <0x126>;
+ };
+ };
+
+ uart4 {
+
+ uart4-xfer {
+ rockchip,pins = <0x01 0x1c 0x02 0xb2 0x01 0x1d 0x02 0xb2>;
+ phandle = <0x55>;
+ };
+
+ uart4-cts {
+ rockchip,pins = <0x01 0x1e 0x02 0xb1>;
+ phandle = <0x56>;
+ };
+
+ uart4-rts {
+ rockchip,pins = <0x01 0x1f 0x02 0xb1>;
+ phandle = <0x57>;
+ };
+ };
+
+ uart5 {
+
+ uart5-xfer {
+ rockchip,pins = <0x03 0x02 0x04 0xb2 0x03 0x01 0x04 0xb2>;
+ phandle = <0x58>;
+ };
+
+ uart5-cts {
+ rockchip,pins = <0x03 0x03 0x04 0xb1>;
+ phandle = <0x59>;
+ };
+
+ uart5-rts {
+ rockchip,pins = <0x03 0x05 0x04 0xb1>;
+ phandle = <0x5a>;
+ };
+ };
+
+ spi0 {
+
+ spi0-clk {
+ rockchip,pins = <0x01 0x0f 0x03 0xb3>;
+ phandle = <0x6c>;
+ };
+
+ spi0-csn {
+ rockchip,pins = <0x01 0x0e 0x03 0xb3>;
+ phandle = <0x6d>;
+ };
+
+ spi0-miso {
+ rockchip,pins = <0x01 0x0d 0x03 0xb3>;
+ phandle = <0x6e>;
+ };
+
+ spi0-mosi {
+ rockchip,pins = <0x01 0x0c 0x03 0xb3>;
+ phandle = <0x6f>;
+ };
+
+ spi0-clk-hs {
+ rockchip,pins = <0x01 0x0f 0x03 0xb4>;
+ phandle = <0x70>;
+ };
+
+ spi0-miso-hs {
+ rockchip,pins = <0x01 0x0d 0x03 0xb4>;
+ phandle = <0x71>;
+ };
+
+ spi0-mosi-hs {
+ rockchip,pins = <0x01 0x0c 0x03 0xb4>;
+ phandle = <0x72>;
+ };
+ };
+
+ spi1 {
+
+ spi1-clk {
+ rockchip,pins = <0x03 0x0f 0x04 0xb3>;
+ phandle = <0x73>;
+ };
+
+ spi1-csn0 {
+ rockchip,pins = <0x03 0x09 0x04 0xb3>;
+ phandle = <0x74>;
+ };
+
+ spi1-csn1 {
+ rockchip,pins = <0x03 0x0a 0x02 0xb3>;
+ phandle = <0x75>;
+ };
+
+ spi1-miso {
+ rockchip,pins = <0x03 0x0e 0x04 0xb3>;
+ phandle = <0x76>;
+ };
+
+ spi1-mosi {
+ rockchip,pins = <0x03 0x0c 0x04 0xb3>;
+ phandle = <0x77>;
+ };
+
+ spi1-clk-hs {
+ rockchip,pins = <0x03 0x0f 0x04 0xb4>;
+ phandle = <0x78>;
+ };
+
+ spi1-miso-hs {
+ rockchip,pins = <0x03 0x0e 0x04 0xb4>;
+ phandle = <0x79>;
+ };
+
+ spi1-mosi-hs {
+ rockchip,pins = <0x03 0x0c 0x04 0xb4>;
+ phandle = <0x7a>;
+ };
+ };
+
+ pdm {
+
+ pdm-clk0m0 {
+ rockchip,pins = <0x03 0x16 0x02 0xb1>;
+ phandle = <0x44>;
+ };
+
+ pdm-clk0m1 {
+ rockchip,pins = <0x02 0x16 0x01 0xb1>;
+ phandle = <0x127>;
+ };
+
+ pdm-clk1 {
+ rockchip,pins = <0x03 0x17 0x02 0xb1>;
+ phandle = <0x45>;
+ };
+
+ pdm-sdi0m0 {
+ rockchip,pins = <0x03 0x1b 0x02 0xb1>;
+ phandle = <0x46>;
+ };
+
+ pdm-sdi0m1 {
+ rockchip,pins = <0x02 0x15 0x02 0xb1>;
+ phandle = <0x128>;
+ };
+
+ pdm-sdi1 {
+ rockchip,pins = <0x03 0x18 0x02 0xb1>;
+ phandle = <0x47>;
+ };
+
+ pdm-sdi2 {
+ rockchip,pins = <0x03 0x19 0x02 0xb1>;
+ phandle = <0x48>;
+ };
+
+ pdm-sdi3 {
+ rockchip,pins = <0x03 0x1a 0x02 0xb1>;
+ phandle = <0x49>;
+ };
+
+ pdm-clk0m0-sleep {
+ rockchip,pins = <0x03 0x16 0x00 0xb5>;
+ phandle = <0x129>;
+ };
+
+ pdm-clk0m1-sleep {
+ rockchip,pins = <0x02 0x16 0x00 0xb5>;
+ phandle = <0x12a>;
+ };
+
+ pdm-clk1-sleep {
+ rockchip,pins = <0x03 0x17 0x00 0xb5>;
+ phandle = <0x12b>;
+ };
+
+ pdm-sdi0m0-sleep {
+ rockchip,pins = <0x03 0x1b 0x00 0xb5>;
+ phandle = <0x12c>;
+ };
+
+ pdm-sdi0m1-sleep {
+ rockchip,pins = <0x02 0x15 0x00 0xb5>;
+ phandle = <0x12d>;
+ };
+
+ pdm-sdi1-sleep {
+ rockchip,pins = <0x03 0x18 0x00 0xb5>;
+ phandle = <0x12e>;
+ };
+
+ pdm-sdi2-sleep {
+ rockchip,pins = <0x03 0x19 0x00 0xb5>;
+ phandle = <0x12f>;
+ };
+
+ pdm-sdi3-sleep {
+ rockchip,pins = <0x03 0x1a 0x00 0xb5>;
+ phandle = <0x130>;
+ };
+ };
+
+ i2s0 {
+
+ i2s0-8ch-mclk {
+ rockchip,pins = <0x03 0x11 0x02 0xb1>;
+ phandle = <0x131>;
+ };
+
+ i2s0-8ch-sclktx {
+ rockchip,pins = <0x03 0x13 0x02 0xb1>;
+ phandle = <0x30>;
+ };
+
+ i2s0-8ch-sclkrx {
+ rockchip,pins = <0x03 0x0c 0x02 0xb1>;
+ phandle = <0x31>;
+ };
+
+ i2s0-8ch-lrcktx {
+ rockchip,pins = <0x03 0x12 0x02 0xb1>;
+ phandle = <0x32>;
+ };
+
+ i2s0-8ch-lrckrx {
+ rockchip,pins = <0x03 0x0d 0x02 0xb1>;
+ phandle = <0x33>;
+ };
+
+ i2s0-8ch-sdo0 {
+ rockchip,pins = <0x03 0x14 0x02 0xb1>;
+ phandle = <0x38>;
+ };
+
+ i2s0-8ch-sdo1 {
+ rockchip,pins = <0x03 0x10 0x02 0xb1>;
+ phandle = <0x39>;
+ };
+
+ i2s0-8ch-sdo2 {
+ rockchip,pins = <0x03 0x0f 0x02 0xb1>;
+ phandle = <0x3a>;
+ };
+
+ i2s0-8ch-sdo3 {
+ rockchip,pins = <0x03 0x0e 0x02 0xb1>;
+ phandle = <0x3b>;
+ };
+
+ i2s0-8ch-sdi0 {
+ rockchip,pins = <0x03 0x15 0x02 0xb1>;
+ phandle = <0x34>;
+ };
+
+ i2s0-8ch-sdi1 {
+ rockchip,pins = <0x03 0x0b 0x02 0xb1>;
+ phandle = <0x35>;
+ };
+
+ i2s0-8ch-sdi2 {
+ rockchip,pins = <0x03 0x09 0x02 0xb1>;
+ phandle = <0x36>;
+ };
+
+ i2s0-8ch-sdi3 {
+ rockchip,pins = <0x03 0x08 0x02 0xb1>;
+ phandle = <0x37>;
+ };
+ };
+
+ i2s1 {
+
+ i2s1-2ch-mclk {
+ rockchip,pins = <0x02 0x13 0x01 0xb1>;
+ phandle = <0x68>;
+ };
+
+ i2s1-2ch-sclk {
+ rockchip,pins = <0x02 0x12 0x01 0xb1>;
+ phandle = <0x3c>;
+ };
+
+ i2s1-2ch-lrck {
+ rockchip,pins = <0x02 0x11 0x01 0xb1>;
+ phandle = <0x3d>;
+ };
+
+ i2s1-2ch-sdi {
+ rockchip,pins = <0x02 0x15 0x01 0xb1>;
+ phandle = <0x3e>;
+ };
+
+ i2s1-2ch-sdo {
+ rockchip,pins = <0x02 0x14 0x01 0xb1>;
+ phandle = <0x3f>;
+ };
+ };
+
+ i2s2 {
+
+ i2s2-2ch-mclk {
+ rockchip,pins = <0x03 0x01 0x02 0xb1>;
+ phandle = <0x132>;
+ };
+
+ i2s2-2ch-sclk {
+ rockchip,pins = <0x03 0x02 0x02 0xb1>;
+ phandle = <0x40>;
+ };
+
+ i2s2-2ch-lrck {
+ rockchip,pins = <0x03 0x03 0x02 0xb1>;
+ phandle = <0x41>;
+ };
+
+ i2s2-2ch-sdi {
+ rockchip,pins = <0x03 0x05 0x02 0xb1>;
+ phandle = <0x42>;
+ };
+
+ i2s2-2ch-sdo {
+ rockchip,pins = <0x03 0x07 0x02 0xb1>;
+ phandle = <0x43>;
+ };
+ };
+
+ sdmmc {
+
+ sdmmc-clk {
+ rockchip,pins = <0x01 0x1e 0x01 0xb6>;
+ phandle = <0x8f>;
+ };
+
+ sdmmc-cmd {
+ rockchip,pins = <0x01 0x1f 0x01 0xb4>;
+ phandle = <0x90>;
+ };
+
+ sdmmc-det {
+ rockchip,pins = <0x00 0x03 0x01 0xb4>;
+ phandle = <0x91>;
+ };
+
+ sdmmc-bus1 {
+ rockchip,pins = <0x01 0x1a 0x01 0xb4>;
+ phandle = <0x133>;
+ };
+
+ sdmmc-bus4 {
+ rockchip,pins = <0x01 0x1a 0x01 0xb4 0x01 0x1b 0x01 0xb4 0x01 0x1c 0x01 0xb4 0x01 0x1d 0x01 0xb4>;
+ phandle = <0x92>;
+ };
+
+ sdmmc-gpio {
+ rockchip,pins = <0x01 0x1a 0x00 0xb3 0x01 0x1b 0x00 0xb3 0x01 0x1c 0x00 0xb3 0x01 0x1d 0x00 0xb3 0x01 0x1e 0x00 0xb3 0x01 0x1f 0x00 0xb3>;
+ phandle = <0x134>;
+ };
+ };
+
+ sdio {
+
+ sdio-clk {
+ rockchip,pins = <0x01 0x15 0x01 0xb1>;
+ phandle = <0x96>;
+ };
+
+ sdio-cmd {
+ rockchip,pins = <0x01 0x14 0x01 0xb2>;
+ phandle = <0x95>;
+ };
+
+ sdio-bus4 {
+ rockchip,pins = <0x01 0x16 0x01 0xb2 0x01 0x17 0x01 0xb2 0x01 0x18 0x01 0xb2 0x01 0x19 0x01 0xb2>;
+ phandle = <0x94>;
+ };
+
+ sdio-gpio {
+ rockchip,pins = <0x01 0x16 0x00 0xb2 0x01 0x17 0x00 0xb2 0x01 0x18 0x00 0xb2 0x01 0x19 0x00 0xb2 0x01 0x14 0x00 0xb2 0x01 0x15 0x00 0xb2>;
+ phandle = <0x135>;
+ };
+ };
+
+ emmc {
+
+ emmc-clk {
+ rockchip,pins = <0x01 0x09 0x02 0xb6>;
+ phandle = <0x136>;
+ };
+
+ emmc-cmd {
+ rockchip,pins = <0x01 0x0a 0x02 0xb4>;
+ phandle = <0x137>;
+ };
+
+ emmc-pwren {
+ rockchip,pins = <0x01 0x08 0x02 0xb1>;
+ phandle = <0x138>;
+ };
+
+ emmc-rstnout {
+ rockchip,pins = <0x01 0x0b 0x02 0xb1>;
+ phandle = <0x139>;
+ };
+
+ emmc-bus1 {
+ rockchip,pins = <0x01 0x00 0x02 0xb4>;
+ phandle = <0x13a>;
+ };
+
+ emmc-bus4 {
+ rockchip,pins = <0x01 0x00 0x02 0xb4 0x01 0x01 0x02 0xb4 0x01 0x02 0x02 0xb4 0x01 0x03 0x02 0xb4>;
+ phandle = <0x13b>;
+ };
+
+ emmc-bus8 {
+ rockchip,pins = <0x01 0x00 0x02 0xb4 0x01 0x01 0x02 0xb4 0x01 0x02 0x02 0xb4 0x01 0x03 0x02 0xb4 0x01 0x04 0x02 0xb4 0x01 0x05 0x02 0xb4 0x01 0x06 0x02 0xb4 0x01 0x07 0x02 0xb4>;
+ phandle = <0x13c>;
+ };
+ };
+
+ flash {
+
+ flash-cs0 {
+ rockchip,pins = <0x01 0x08 0x01 0xb1>;
+ phandle = <0x13d>;
+ };
+
+ flash-rdy {
+ rockchip,pins = <0x01 0x09 0x01 0xb1>;
+ phandle = <0x13e>;
+ };
+
+ flash-dqs {
+ rockchip,pins = <0x01 0x0a 0x01 0xb1>;
+ phandle = <0x13f>;
+ };
+
+ flash-ale {
+ rockchip,pins = <0x01 0x0b 0x01 0xb1>;
+ phandle = <0x140>;
+ };
+
+ flash-cle {
+ rockchip,pins = <0x01 0x0c 0x01 0xb1>;
+ phandle = <0x141>;
+ };
+
+ flash-wrn {
+ rockchip,pins = <0x01 0x0d 0x01 0xb1>;
+ phandle = <0x142>;
+ };
+
+ flash-csl {
+ rockchip,pins = <0x01 0x0e 0x01 0xb1>;
+ phandle = <0x143>;
+ };
+
+ flash-rdn {
+ rockchip,pins = <0x01 0x0f 0x01 0xb1>;
+ phandle = <0x144>;
+ };
+
+ flash-bus8 {
+ rockchip,pins = <0x01 0x00 0x01 0xb7 0x01 0x01 0x01 0xb7 0x01 0x02 0x01 0xb7 0x01 0x03 0x01 0xb7 0x01 0x04 0x01 0xb7 0x01 0x05 0x01 0xb7 0x01 0x06 0x01 0xb7 0x01 0x07 0x01 0xb7>;
+ phandle = <0x145>;
+ };
+ };
+
+ lcdc {
+
+ lcdc-m0-rgb-pins {
+ rockchip,pins = <0x03 0x00 0x01 0xb6 0x03 0x01 0x01 0xb6 0x03 0x02 0x01 0xb6 0x03 0x03 0x01 0xb6 0x03 0x04 0x01 0xb6 0x03 0x05 0x01 0xb6 0x03 0x06 0x01 0xb6 0x03 0x07 0x01 0xb6 0x03 0x08 0x01 0xb6 0x03 0x09 0x01 0xb6 0x03 0x0a 0x01 0xb6 0x03 0x0b 0x01 0xb6 0x03 0x0c 0x01 0xb6 0x03 0x0d 0x01 0xb6 0x03 0x0e 0x01 0xb6 0x03 0x0f 0x01 0xb6 0x03 0x10 0x01 0xb6 0x03 0x11 0x01 0xb6 0x03 0x12 0x01 0xb6 0x03 0x13 0x01 0xb6 0x03 0x14 0x01 0xb6 0x03 0x15 0x01 0xb6 0x03 0x16 0x01 0xb6 0x03 0x17 0x01 0xb6 0x03 0x18 0x01 0xb6 0x03 0x19 0x01 0xb6 0x03 0x1a 0x01 0xb6 0x03 0x1b 0x01 0xb6>;
+ phandle = <0x146>;
+ };
+
+ lcdc-m0-sleep-pins {
+ rockchip,pins = <0x03 0x00 0x00 0xb1 0x03 0x01 0x00 0xb1 0x03 0x02 0x00 0xb1 0x03 0x03 0x00 0xb1 0x03 0x04 0x00 0xb1 0x03 0x05 0x00 0xb1 0x03 0x06 0x00 0xb1 0x03 0x07 0x00 0xb1 0x03 0x08 0x00 0xb1 0x03 0x09 0x00 0xb1 0x03 0x0a 0x00 0xb1 0x03 0x0b 0x00 0xb1 0x03 0x0c 0x00 0xb1 0x03 0x0d 0x00 0xb1 0x03 0x0e 0x00 0xb1 0x03 0x0f 0x00 0xb1 0x03 0x10 0x00 0xb1 0x03 0x11 0x00 0xb1 0x03 0x12 0x00 0xb1 0x03 0x13 0x00 0xb1 0x03 0x14 0x00 0xb1 0x03 0x15 0x00 0xb1 0x03 0x16 0x00 0xb1 0x03 0x17 0x00 0xb1 0x03 0x18 0x00 0xb1 0x03 0x19 0x00 0xb1 0x03 0x1a 0x00 0xb1 0x03 0x1b 0x00 0xb1>;
+ phandle = <0x147>;
+ };
+
+ lcdc-m1-rgb-pins {
+ rockchip,pins = <0x03 0x00 0x01 0xb6 0x03 0x04 0x01 0xb6 0x03 0x06 0x01 0xb6 0x03 0x0a 0x01 0xb6 0x03 0x0b 0x01 0xb6 0x03 0x0d 0x01 0xb6 0x03 0x10 0x01 0xb6 0x03 0x11 0x01 0xb6 0x03 0x12 0x01 0xb6 0x03 0x13 0x01 0xb6 0x03 0x14 0x01 0xb6 0x03 0x15 0x01 0xb6 0x03 0x16 0x01 0xb6 0x03 0x17 0x01 0xb6 0x03 0x18 0x01 0xb6 0x03 0x19 0x01 0xb6 0x03 0x1a 0x01 0xb6 0x03 0x1b 0x01 0xb6>;
+ phandle = <0x4d>;
+ };
+
+ lcdc-m1-sleep-pins {
+ rockchip,pins = <0x03 0x00 0x00 0xb1 0x03 0x04 0x00 0xb1 0x03 0x06 0x00 0xb1 0x03 0x0a 0x00 0xb1 0x03 0x0b 0x00 0xb1 0x03 0x0d 0x00 0xb1 0x03 0x10 0x00 0xb1 0x03 0x11 0x00 0xb1 0x03 0x12 0x00 0xb1 0x03 0x13 0x00 0xb1 0x03 0x14 0x00 0xb1 0x03 0x15 0x00 0xb1 0x03 0x16 0x00 0xb1 0x03 0x17 0x00 0xb1 0x03 0x18 0x00 0xb1 0x03 0x19 0x00 0xb1 0x03 0x1a 0x00 0xb1 0x03 0x1b 0x00 0xb1>;
+ phandle = <0x4e>;
+ };
+ };
+
+ pwm0 {
+
+ pwm0-pin {
+ rockchip,pins = <0x00 0x0f 0x01 0xb1>;
+ phandle = <0x7b>;
+ };
+ };
+
+ pwm1 {
+
+ pwm1-pin {
+ rockchip,pins = <0x00 0x10 0x01 0xb1>;
+ phandle = <0x7c>;
+ };
+ };
+
+ pwm2 {
+
+ pwm2-pin {
+ rockchip,pins = <0x02 0x0d 0x01 0xb1>;
+ phandle = <0x7d>;
+ };
+ };
+
+ pwm3 {
+
+ pwm3-pin {
+ rockchip,pins = <0x00 0x11 0x01 0xb1>;
+ phandle = <0x7e>;
+ };
+ };
+
+ pwm4 {
+
+ pwm4-pin {
+ rockchip,pins = <0x03 0x12 0x03 0xb1>;
+ phandle = <0x7f>;
+ };
+ };
+
+ pwm5 {
+
+ pwm5-pin {
+ rockchip,pins = <0x03 0x13 0x03 0xb1>;
+ phandle = <0x80>;
+ };
+ };
+
+ pwm6 {
+
+ pwm6-pin {
+ rockchip,pins = <0x03 0x14 0x03 0xb1>;
+ phandle = <0x81>;
+ };
+ };
+
+ pwm7 {
+
+ pwm7-pin {
+ rockchip,pins = <0x03 0x15 0x03 0xb1>;
+ phandle = <0x82>;
+ };
+ };
+
+ gmac {
+
+ rmii-pins {
+ rockchip,pins = <0x02 0x00 0x02 0xb8 0x02 0x01 0x02 0xb8 0x02 0x02 0x02 0xb8 0x02 0x03 0x02 0xb1 0x02 0x04 0x02 0xb1 0x02 0x05 0x02 0xb1 0x02 0x06 0x02 0xb1 0x02 0x07 0x02 0xb1 0x02 0x09 0x02 0xb1>;
+ phandle = <0x8d>;
+ };
+
+ mac-refclk-12ma {
+ rockchip,pins = <0x02 0x0a 0x02 0xb8>;
+ phandle = <0x8e>;
+ };
+
+ mac-refclk {
+ rockchip,pins = <0x02 0x0a 0x02 0xb1>;
+ phandle = <0x148>;
+ };
+ };
+
+ cif-m0 {
+
+ cif-clkout-m0 {
+ rockchip,pins = <0x02 0x0b 0x01 0xb8>;
+ phandle = <0xa7>;
+ };
+
+ dvp-d2d9-m0 {
+ rockchip,pins = <0x02 0x00 0x01 0xb1 0x02 0x01 0x01 0xb1 0x02 0x02 0x01 0xb1 0x02 0x03 0x01 0xb1 0x02 0x04 0x01 0xb1 0x02 0x05 0x01 0xb1 0x02 0x06 0x01 0xb1 0x02 0x07 0x01 0xb1 0x02 0x08 0x01 0xb1 0x02 0x09 0x01 0xb1 0x02 0x0a 0x01 0xb1 0x02 0x0b 0x01 0xb1>;
+ phandle = <0xa5>;
+ };
+
+ dvp-d0d1-m0 {
+ rockchip,pins = <0x02 0x0c 0x01 0xb1 0x02 0x0e 0x01 0xb1>;
+ phandle = <0xa9>;
+ };
+
+ d10-d11-m0 {
+ rockchip,pins = <0x02 0x0f 0x01 0xb1 0x02 0x10 0x01 0xb1>;
+ phandle = <0xa8>;
+ };
+ };
+
+ cif-m1 {
+
+ cif-clkout-m1 {
+ rockchip,pins = <0x03 0x18 0x03 0xb1>;
+ phandle = <0x149>;
+ };
+
+ dvp-d2d9-m1 {
+ rockchip,pins = <0x03 0x03 0x03 0xb1 0x03 0x05 0x03 0xb1 0x03 0x07 0x03 0xb1 0x03 0x08 0x03 0xb1 0x03 0x09 0x03 0xb1 0x03 0x0c 0x03 0xb1 0x03 0x0e 0x03 0xb1 0x03 0x0f 0x03 0xb1 0x03 0x19 0x03 0xb1 0x03 0x1a 0x03 0xb1 0x03 0x1b 0x03 0xb1 0x03 0x18 0x03 0xb1>;
+ phandle = <0x14a>;
+ };
+
+ dvp-d0d1-m1 {
+ rockchip,pins = <0x03 0x01 0x03 0xb1 0x03 0x02 0x03 0xb1>;
+ phandle = <0x14b>;
+ };
+
+ d10-d11-m1 {
+ rockchip,pins = <0x03 0x16 0x03 0xb1 0x03 0x17 0x03 0xb1>;
+ phandle = <0x14c>;
+ };
+ };
+
+ isp {
+
+ isp-prelight {
+ rockchip,pins = <0x03 0x19 0x04 0xb1>;
+ phandle = <0x14d>;
+ };
+ };
+
+ pmic {
+
+ pmic_int {
+ rockchip,pins = <0x00 0x0a 0x00 0xb2 0x00 0x0b 0x00 0xb1>;
+ phandle = <0x5d>;
+ };
+
+ soc_slppin_gpio {
+ rockchip,pins = <0x00 0x04 0x00 0xb9>;
+ phandle = <0x60>;
+ };
+
+ soc_slppin_slp {
+ rockchip,pins = <0x00 0x04 0x01 0xb1>;
+ phandle = <0x5e>;
+ };
+
+ soc_slppin_rst {
+ rockchip,pins = <0x00 0x04 0x02 0xb1>;
+ phandle = <0x62>;
+ };
+ };
+
+ leds {
+
+ led-pins {
+ rockchip,pins = <0x00 0x11 0x00 0xb1>;
+ phandle = <0xc0>;
+ };
+ };
+
+ btns {
+
+ btn-pins {
+ rockchip,pins = <0x01 0x0c 0x00 0xb2 0x01 0x0d 0x00 0xb2 0x01 0x0e 0x00 0xb2 0x01 0x0f 0x00 0xb2 0x01 0x02 0x00 0xb2 0x01 0x05 0x00 0xb2 0x01 0x06 0x00 0xb2 0x01 0x07 0x00 0xb2 0x02 0x00 0x00 0xb2 0x02 0x01 0x00 0xb2 0x02 0x02 0x00 0xb2 0x02 0x03 0x00 0xb2 0x02 0x04 0x00 0xb2 0x02 0x05 0x00 0xb2 0x02 0x06 0x00 0xb2 0x02 0x07 0x00 0xb2 0x03 0x09 0x00 0xb2 0x03 0x0a 0x00 0xb2 0x03 0x0c 0x00 0xb2 0x03 0x0f 0x00 0xb2>;
+ phandle = <0xbd>;
+ };
+ };
+ };
+
+ chosen {
+ bootargs = [00];
+ };
+
+ fiq-debugger {
+ compatible = "rockchip,fiq-debugger";
+ rockchip,serial-id = <0x02>;
+ rockchip,wake-irq = <0x00>;
+ rockchip,irq-mode-enable = <0x00>;
+ rockchip,baudrate = <0x1c200>;
+ interrupts = <0x00 0x7f 0x08>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0xba>;
+ status = "okay";
+ };
+
+ ramoops {
+ compatible = "ramoops";
+ record-size = <0x00 0x20000>;
+ console-size = <0x00 0x80000>;
+ ftrace-size = <0x00 0x00>;
+ pmsg-size = <0x00 0x00>;
+ memory-region = <0xbb>;
+ };
+
+ reserved-memory {
+ #address-cells = <0x02>;
+ #size-cells = <0x02>;
+ ranges;
+
+ drm-logo@00000000 {
+ compatible = "rockchip,drm-logo";
+ reg = <0x00 0x00 0x00 0x00>;
+ phandle = <0x11>;
+ };
+
+ region@110000 {
+ reg = <0x00 0x110000 0x00 0xf0000>;
+ reg-names = "ramoops_mem";
+ phandle = <0xbb>;
+ };
+ };
+
+ odroidgo3-keys {
+ compatible = "gpio-keys";
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+ autorepeat;
+ phandle = <0x14e>;
+
+ button@0 {
+ label = "GPIO BTN-VOLUP";
+ linux,code = <0x73>;
+ gpios = <0x66 0x00 0x01>;
+ };
+
+ button@1 {
+ label = "GPIO BTN-VOLDN";
+ linux,code = <0x72>;
+ gpios = <0x66 0x01 0x01>;
+ };
+ };
+
+ odroidgo3-joypad {
+ compatible = "odroidgo3-joypad";
+ pwms = <0xbc 0x00 0xbebc200 0x00>;
+ pwm-names = "enable";
+ rumble-boost-weak = <0x00>;
+ rumble-boost-strong = <0x00>;
+ joypad-name = "GO-Super Gamepad";
+ joypad-product = <0x1100>;
+ joypad-revision = <0x100>;
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <0xbd>;
+ pinctrl-1 = <0x7b>;
+ io-channel-names = "amux_adc";
+ io-channels = <0xbe 0x01>;
+ amux-count = <0x04>;
+ amux-a-gpios = <0x97 0x0b 0x01>;
+ amux-b-gpios = <0x97 0x08 0x01>;
+ amux-en-gpios = <0x97 0x0d 0x01>;
+ button-adc-scale = <0x02>;
+ button-adc-deadzone = <0x40>;
+ button-adc-fuzz = <0x20>;
+ button-adc-flat = <0x20>;
+ abs_x-p-tuning = <0xc8>;
+ abs_x-n-tuning = <0xc8>;
+ abs_y-p-tuning = <0xc8>;
+ abs_y-n-tuning = <0xc8>;
+ abs_rx-p-tuning = <0xc8>;
+ abs_rx-n-tuning = <0xc8>;
+ abs_ry-p-tuning = <0xc8>;
+ abs_ry-n-tuning = <0xc8>;
+ poll-interval = <0x0a>;
+ invert-absx;
+ invert-absy;
+ phandle = <0x14f>;
+
+ sw1 {
+ gpios = <0xbf 0x0c 0x01>;
+ label = "GPIO DPAD-UP";
+ linux,code = <0x220>;
+ };
+
+ sw2 {
+ gpios = <0xbf 0x0d 0x01>;
+ label = "GPIO DPAD-DOWN";
+ linux,code = <0x221>;
+ };
+
+ sw3 {
+ gpios = <0xbf 0x0e 0x01>;
+ label = "GPIO DPAD-LEFT";
+ linux,code = <0x222>;
+ };
+
+ sw4 {
+ gpios = <0xbf 0x0f 0x01>;
+ label = "GPIO DPAD-RIGHT";
+ linux,code = <0x223>;
+ };
+
+ sw5 {
+ gpios = <0xbf 0x02 0x01>;
+ label = "GPIO KEY BTN-A";
+ linux,code = <0x131>;
+ };
+
+ sw6 {
+ gpios = <0xbf 0x05 0x01>;
+ label = "GPIO BTN-B";
+ linux,code = <0x130>;
+ };
+
+ sw7 {
+ gpios = <0xbf 0x06 0x01>;
+ label = "GPIO BTN-Y";
+ linux,code = <0x134>;
+ };
+
+ sw8 {
+ gpios = <0xbf 0x07 0x01>;
+ label = "GPIO BTN-X";
+ linux,code = <0x133>;
+ };
+
+ sw11 {
+ gpios = <0x66 0x02 0x01>;
+ label = "GPIO F3";
+ linux,code = <0x2c2>;
+ };
+
+ sw12 {
+ gpios = <0x66 0x03 0x01>;
+ label = "GPIO F4";
+ linux,code = <0x2c3>;
+ };
+
+ sw15 {
+ gpios = <0x66 0x06 0x01>;
+ label = "GPIO TOP-LEFT";
+ linux,code = <0x136>;
+ };
+
+ sw16 {
+ gpios = <0x66 0x07 0x01>;
+ label = "GPIO TOP-RIGHT";
+ linux,code = <0x137>;
+ };
+
+ sw19 {
+ gpios = <0x97 0x09 0x01>;
+ label = "GPIO F1";
+ linux,code = <0x2c0>;
+ };
+
+ sw20 {
+ gpios = <0x97 0x0f 0x01>;
+ label = "GPIO TOP-RIGHT2";
+ linux,code = <0x139>;
+ };
+
+ sw21 {
+ gpios = <0x97 0x0a 0x01>;
+ label = "GPIO TOP-LEFT2";
+ linux,code = <0x138>;
+ };
+
+ sw22 {
+ gpios = <0x97 0x0c 0x01>;
+ label = "GPIO F2";
+ linux,code = <0x2c1>;
+ };
+
+ sw13 {
+ gpios = <0x66 0x04 0x01>;
+ label = "GPIO F5";
+ linux,code = <0x2c4>;
+ };
+ };
+
+ gpio_leds {
+ compatible = "gpio-leds";
+ pinctrl-names = "led_pins";
+ pinctrl-0 = <0xc0>;
+ phandle = <0x150>;
+
+ heartbeat {
+ label = "blue:heartbeat";
+ gpios = <0x5c 0x11 0x00>;
+ linux,default-trigger = "heartbeat";
+ };
+ };
+
+ backlight {
+ compatible = "pwm-backlight";
+ pwms = <0xc1 0x00 0xf519 0x00>;
+ brightness-levels = <0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f 0x20 0x21 0x22 0x23 0x24 0x25 0x26 0x27 0x28 0x29 0x2a 0x2b 0x2c 0x2d 0x2e 0x2f 0x30 0x31 0x32 0x33 0x34 0x35 0x36 0x37 0x38 0x39 0x3a 0x3b 0x3c 0x3d 0x3e 0x3f 0x40 0x41 0x42 0x43 0x44 0x45 0x46 0x47 0x48 0x49 0x4a 0x4b 0x4c 0x4d 0x4e 0x4f 0x50 0x51 0x52 0x53 0x54 0x55 0x56 0x57 0x58 0x59 0x5a 0x5b 0x5c 0x5d 0x5e 0x5f 0x60 0x61 0x62 0x63 0x64 0x65 0x66 0x67 0x68 0x69 0x6a 0x6b 0x6c 0x6d 0x6e 0x6f 0x70 0x71 0x72 0x73 0x74 0x75 0x76 0x77 0x78 0x79 0x7a 0x7b 0x7c 0x7d 0x7e 0x7f 0x80 0x81 0x82 0x83 0x84 0x85 0x86 0x87 0x88 0x89 0x8a 0x8b 0x8c 0x8d 0x8e 0x8f 0x90 0x91 0x92 0x93 0x94 0x95 0x96 0x97 0x98 0x99 0x9a 0x9b 0x9c 0x9d 0x9e 0x9f 0xa0>;
+ default-brightness-level = <0x33>;
+ phandle = <0x9d>;
+ };
+
+ rk817-sound {
+ compatible = "simple-audio-card";
+ simple-audio-card,format = "i2s";
+ simple-audio-card,name = "rockchip,rk817-codec";
+ simple-audio-card,mclk-fs = <0x100>;
+ simple-audio-card,widgets = "Microphone\0Mic Jack\0Headphone\0Headphone Jack";
+ simple-audio-card,routing = "MIC_IN\0Mic Jack\0Headphone Jack\0HPOL\0Headphone Jack\0HPOR";
+ simple-audio-card,hp-det-gpio = <0x66 0x16 0x01>;
+ simple-audio-card,codec-hp-det = <0x01>;
+
+ simple-audio-card,cpu {
+ sound-dai = <0xc2>;
+ };
+
+ simple-audio-card,codec {
+ sound-dai = <0xc3>;
+ };
+ };
+
+ vccsys {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v8_sys";
+ regulator-always-on;
+ regulator-min-microvolt = <0x39fbc0>;
+ regulator-max-microvolt = <0x39fbc0>;
+ phandle = <0x64>;
+ };
+
+ vcc_host: vcc_host {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc-host";
+ gpio = <0x5c 0x0f 0x00>;
+ enable-active-high;
+ regulator-always-on;
+ vin-supply = <0x64>;
+ };
+
+ __symbols__ {
+ ddr_timing = "/ddr_timing";
+ cpu0 = "/cpus/cpu@0";
+ cpu1 = "/cpus/cpu@1";
+ cpu2 = "/cpus/cpu@2";
+ cpu3 = "/cpus/cpu@3";
+ CPU_SLEEP = "/cpus/idle-states/cpu-sleep";
+ CLUSTER_SLEEP = "/cpus/idle-states/cluster-sleep";
+ cpu0_opp_table = "/cpu0-opp-table";
+ bus_soc = "/bus-soc";
+ bus_apll = "/bus-apll";
+ bus_apll_opp_table = "/bus-apll-opp-table";
+ display_subsystem = "/display-subsystem";
+ route_lvds = "/display-subsystem/route/route-lvds";
+ route_dsi = "/display-subsystem/route/route-dsi";
+ route_rgb = "/display-subsystem/route/route-rgb";
+ gmac_clkin = "/external-gmac-clock";
+ rockchip_suspend = "/rockchip-suspend";
+ xin24m = "/xin24m";
+ xin32k = "/xin32k";
+ pmu = "/power-management@ff000000";
+ power = "/power-management@ff000000/power-controller";
+ pmugrf = "/syscon@ff010000";
+ pmu_io_domains = "/syscon@ff010000/io-domains";
+ pmu_pvtm = "/syscon@ff010000/pmu-pvtm";
+ uart0 = "/serial@ff030000";
+ i2s0_8ch = "/i2s@ff060000";
+ i2s1_2ch = "/i2s@ff070000";
+ i2s2_2ch = "/i2s@ff080000";
+ pdm = "/pdm@ff0a0000";
+ crypto = "/crypto@ff0b0000";
+ rng = "/rng@ff0b0000";
+ gic = "/interrupt-controller@ff131000";
+ grf = "/syscon@ff140000";
+ io_domains = "/syscon@ff140000/io-domains";
+ lvds = "/syscon@ff140000/lvds";
+ lvds_in_vopb = "/syscon@ff140000/lvds/ports/port@0/endpoint@0";
+ rgb = "/syscon@ff140000/rgb";
+ rgb_in_vopb = "/syscon@ff140000/rgb/ports/port@0/endpoint@0";
+ core_grf = "/syscon@ff148000";
+ pvtm = "/syscon@ff148000/pvtm";
+ uart1 = "/serial@ff158000";
+ uart2 = "/serial@ff160000";
+ uart3 = "/serial@ff168000";
+ uart4 = "/serial@ff170000";
+ uart5 = "/serial@ff178000";
+ i2c0 = "/i2c@ff180000";
+ rk817 = "/i2c@ff180000/pmic@20";
+ pinctrl_rk8xx = "/i2c@ff180000/pmic@20/pinctrl_rk8xx";
+ rk817_ts_gpio1 = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_ts_gpio1";
+ rk817_gt_gpio2 = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_gt_gpio2";
+ rk817_pin_ts = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_pin_ts";
+ rk817_pin_gt = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_pin_gt";
+ rk817_slppin_null = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_slppin_null";
+ rk817_slppin_slp = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_slppin_slp";
+ rk817_slppin_pwrdn = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_slppin_pwrdn";
+ rk817_slppin_rst = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_slppin_rst";
+ vdd_logic = "/i2c@ff180000/pmic@20/regulators/DCDC_REG1";
+ vdd_arm = "/i2c@ff180000/pmic@20/regulators/DCDC_REG2";
+ vcc_ddr = "/i2c@ff180000/pmic@20/regulators/DCDC_REG3";
+ vcc_3v3 = "/i2c@ff180000/pmic@20/regulators/DCDC_REG4";
+ vcc_1v0 = "/i2c@ff180000/pmic@20/regulators/LDO_REG1";
+ vcc1v8_soc = "/i2c@ff180000/pmic@20/regulators/LDO_REG2";
+ vdd1v0_soc = "/i2c@ff180000/pmic@20/regulators/LDO_REG3";
+ vcc3v3_pmu = "/i2c@ff180000/pmic@20/regulators/LDO_REG4";
+ vccio_sd = "/i2c@ff180000/pmic@20/regulators/LDO_REG5";
+ vcc_sd = "/i2c@ff180000/pmic@20/regulators/LDO_REG6";
+ vcc_backlight = "/i2c@ff180000/pmic@20/regulators/LDO_REG7";
+ vcc_lcd = "/i2c@ff180000/pmic@20/regulators/LDO_REG8";
+ dcdc_boost = "/i2c@ff180000/pmic@20/regulators/BOOST";
+ otg_switch = "/i2c@ff180000/pmic@20/regulators/OTG_SWITCH";
+ rk817_codec = "/i2c@ff180000/pmic@20/codec";
+ i2c1 = "/i2c@ff190000";
+ i2c2 = "/i2c@ff1a0000";
+ i2c3 = "/i2c@ff1b0000";
+ spi0 = "/spi@ff1d0000";
+ spi1 = "/spi@ff1d8000";
+ wdt = "/watchdog@ff1e0000";
+ pwm0 = "/pwm@ff200000";
+ pwm1 = "/pwm@ff200010";
+ pwm2 = "/pwm@ff200020";
+ pwm3 = "/pwm@ff200030";
+ pwm4 = "/pwm@ff208000";
+ pwm5 = "/pwm@ff208010";
+ pwm6 = "/pwm@ff208020";
+ pwm7 = "/pwm@ff208030";
+ rktimer = "/rktimer@ff210000";
+ dmac = "/amba/dmac@ff240000";
+ thermal_zones = "/thermal-zones";
+ soc_thermal = "/thermal-zones/soc-thermal";
+ threshold = "/thermal-zones/soc-thermal/trips/trip-point-0";
+ target = "/thermal-zones/soc-thermal/trips/trip-point-1";
+ soc_crit = "/thermal-zones/soc-thermal/trips/soc-crit";
+ gpu_thermal = "/thermal-zones/gpu-thermal";
+ tsadc = "/tsadc@ff280000";
+ saradc = "/saradc@ff288000";
+ otp = "/otp@ff290000";
+ otp_id = "/otp@ff290000/id@7";
+ cpu_leakage = "/otp@ff290000/cpu-leakage@17";
+ performance = "/otp@ff290000/performance@1e";
+ cru = "/clock-controller@ff2b0000";
+ cpu_boost = "/cpu-boost@ff2b8000";
+ pmucru = "/pmu-clock-controller@ff2bc000";
+ usb2phy_grf = "/syscon@ff2c0000";
+ u2phy = "/syscon@ff2c0000/usb2-phy@100";
+ u2phy_host = "/syscon@ff2c0000/usb2-phy@100/host-port";
+ u2phy_otg = "/syscon@ff2c0000/usb2-phy@100/otg-port";
+ video_phy = "/video-phy@ff2e0000";
+ mipi_dphy_rx0 = "/mipi-dphy-rx0@ff2f0000";
+ usb20_otg = "/usb@ff300000";
+ usb_host0_ehci = "/usb@ff340000";
+ usb_host0_ohci = "/usb@ff350000";
+ gmac = "/ethernet@ff360000";
+ sdmmc = "/dwmmc@ff370000";
+ sdio = "/dwmmc@ff380000";
+ emmc = "/dwmmc@ff390000";
+ nandc0 = "/nandc@ff3b0000";
+ sfc = "/sfc@ff3a0000";
+ gpu = "/gpu@ff400000";
+ gpu_opp_table = "/gpu-opp-table";
+ hevc = "/hevc_service@ff440000";
+ vpu = "/vpu_service@ff442000";
+ vpu_combo = "/vpu_combo";
+ hevc_mmu = "/iommu@ff440440";
+ vpu_mmu = "/iommu@ff442800";
+ dsi = "/dsi@ff450000";
+ dsi_in_vopb = "/dsi@ff450000/ports/port@0/endpoint@0";
+ timing0 = "/dsi@ff450000/panel@0/display-timings/60Hz";
+ timing1 = "/dsi@ff450000/panel@0/display-timings/50Hz";
+ timing2 = "/dsi@ff450000/panel@0/display-timings/75Hz";
+ vopb = "/vop@ff460000";
+ vopb_out = "/vop@ff460000/port";
+ vopb_out_lvds = "/vop@ff460000/port/endpoint@0";
+ vopb_out_dsi = "/vop@ff460000/port/endpoint@1";
+ vopb_out_rgb = "/vop@ff460000/port/endpoint@2";
+ vopb_mmu = "/iommu@ff460f00";
+ rk_rga = "/rk_rga@ff480000";
+ cif = "/cif@ff490000";
+ cif_new = "/cif-new@ff490000";
+ vip_mmu = "/iommu@ff490800";
+ rk_isp = "/rk_isp@ff4a0000";
+ rkisp1 = "/rkisp1@ff4a0000";
+ isp_mmu = "/iommu@ff4a8000";
+ qos_gmac = "/qos@ff518000";
+ qos_gpu = "/qos@ff520000";
+ qos_sdmmc = "/qos@ff52c000";
+ qos_emmc = "/qos@ff538000";
+ qos_nand = "/qos@ff538080";
+ qos_sdio = "/qos@ff538100";
+ qos_sfc = "/qos@ff538180";
+ qos_usb_host = "/qos@ff540000";
+ qos_usb_otg = "/qos@ff540080";
+ qos_isp_128 = "/qos@ff548000";
+ qos_isp_rd = "/qos@ff548080";
+ qos_isp_wr = "/qos@ff548100";
+ qos_isp_m1 = "/qos@ff548180";
+ qos_vip = "/qos@ff548200";
+ qos_rga_rd = "/qos@ff550000";
+ qos_rga_wr = "/qos@ff550080";
+ qos_vop_m0 = "/qos@ff550100";
+ qos_vop_m1 = "/qos@ff550180";
+ qos_vpu = "/qos@ff558000";
+ qos_vpu_r128 = "/qos@ff558080";
+ dfi = "/dfi@ff610000";
+ dmc = "/dmc";
+ ddr_power_model = "/dmc/ddr_power_model";
+ dmc_opp_table = "/dmc-opp-table";
+ rockchip_system_monitor = "/rockchip-system-monitor";
+ pinctrl = "/pinctrl";
+ gpio0 = "/pinctrl/gpio0@ff040000";
+ gpio1 = "/pinctrl/gpio1@ff250000";
+ gpio2 = "/pinctrl/gpio2@ff260000";
+ gpio3 = "/pinctrl/gpio3@ff270000";
+ pcfg_pull_up = "/pinctrl/pcfg-pull-up";
+ pcfg_pull_down = "/pinctrl/pcfg-pull-down";
+ pcfg_pull_none = "/pinctrl/pcfg-pull-none";
+ pcfg_pull_none_2ma = "/pinctrl/pcfg-pull-none-2ma";
+ pcfg_pull_up_2ma = "/pinctrl/pcfg-pull-up-2ma";
+ pcfg_pull_up_4ma = "/pinctrl/pcfg-pull-up-4ma";
+ pcfg_pull_none_4ma = "/pinctrl/pcfg-pull-none-4ma";
+ pcfg_pull_down_4ma = "/pinctrl/pcfg-pull-down-4ma";
+ pcfg_pull_none_8ma = "/pinctrl/pcfg-pull-none-8ma";
+ pcfg_pull_up_8ma = "/pinctrl/pcfg-pull-up-8ma";
+ pcfg_pull_none_12ma = "/pinctrl/pcfg-pull-none-12ma";
+ pcfg_pull_up_12ma = "/pinctrl/pcfg-pull-up-12ma";
+ pcfg_pull_none_smt = "/pinctrl/pcfg-pull-none-smt";
+ pcfg_output_high = "/pinctrl/pcfg-output-high";
+ pcfg_output_low = "/pinctrl/pcfg-output-low";
+ pcfg_input_high = "/pinctrl/pcfg-input-high";
+ pcfg_input = "/pinctrl/pcfg-input";
+ i2c0_xfer = "/pinctrl/i2c0/i2c0-xfer";
+ i2c1_xfer = "/pinctrl/i2c1/i2c1-xfer";
+ i2c2_xfer = "/pinctrl/i2c2/i2c2-xfer";
+ i2c3_xfer = "/pinctrl/i2c3/i2c3-xfer";
+ tsadc_otp_gpio = "/pinctrl/tsadc/tsadc-otp-gpio";
+ tsadc_otp_out = "/pinctrl/tsadc/tsadc-otp-out";
+ uart0_xfer = "/pinctrl/uart0/uart0-xfer";
+ uart0_cts = "/pinctrl/uart0/uart0-cts";
+ uart0_rts = "/pinctrl/uart0/uart0-rts";
+ uart0_rts_gpio = "/pinctrl/uart0/uart0-rts-gpio";
+ uart1_xfer = "/pinctrl/uart1/uart1-xfer";
+ uart1_cts = "/pinctrl/uart1/uart1-cts";
+ uart1_rts = "/pinctrl/uart1/uart1-rts";
+ uart1_rts_gpio = "/pinctrl/uart1/uart1-rts-gpio";
+ uart2m0_xfer = "/pinctrl/uart2-m0/uart2m0-xfer";
+ uart2m1_xfer = "/pinctrl/uart2-m1/uart2m1-xfer";
+ uart3m0_xfer = "/pinctrl/uart3-m0/uart3m0-xfer";
+ uart3m0_cts = "/pinctrl/uart3-m0/uart3m0-cts";
+ uart3m0_rts = "/pinctrl/uart3-m0/uart3m0-rts";
+ uart3m0_rts_gpio = "/pinctrl/uart3-m0/uart3m0-rts-gpio";
+ uart3m1_xfer = "/pinctrl/uart3-m1/uart3m1-xfer";
+ uart3m1_cts = "/pinctrl/uart3-m1/uart3m1-cts";
+ uart3m1_rts = "/pinctrl/uart3-m1/uart3m1-rts";
+ uart3m1_rts_gpio = "/pinctrl/uart3-m1/uart3m1-rts-gpio";
+ uart4_xfer = "/pinctrl/uart4/uart4-xfer";
+ uart4_cts = "/pinctrl/uart4/uart4-cts";
+ uart4_rts = "/pinctrl/uart4/uart4-rts";
+ uart5_xfer = "/pinctrl/uart5/uart5-xfer";
+ uart5_cts = "/pinctrl/uart5/uart5-cts";
+ uart5_rts = "/pinctrl/uart5/uart5-rts";
+ spi0_clk = "/pinctrl/spi0/spi0-clk";
+ spi0_csn = "/pinctrl/spi0/spi0-csn";
+ spi0_miso = "/pinctrl/spi0/spi0-miso";
+ spi0_mosi = "/pinctrl/spi0/spi0-mosi";
+ spi0_clk_hs = "/pinctrl/spi0/spi0-clk-hs";
+ spi0_miso_hs = "/pinctrl/spi0/spi0-miso-hs";
+ spi0_mosi_hs = "/pinctrl/spi0/spi0-mosi-hs";
+ spi1_clk = "/pinctrl/spi1/spi1-clk";
+ spi1_csn0 = "/pinctrl/spi1/spi1-csn0";
+ spi1_csn1 = "/pinctrl/spi1/spi1-csn1";
+ spi1_miso = "/pinctrl/spi1/spi1-miso";
+ spi1_mosi = "/pinctrl/spi1/spi1-mosi";
+ spi1_clk_hs = "/pinctrl/spi1/spi1-clk-hs";
+ spi1_miso_hs = "/pinctrl/spi1/spi1-miso-hs";
+ spi1_mosi_hs = "/pinctrl/spi1/spi1-mosi-hs";
+ pdm_clk0m0 = "/pinctrl/pdm/pdm-clk0m0";
+ pdm_clk0m1 = "/pinctrl/pdm/pdm-clk0m1";
+ pdm_clk1 = "/pinctrl/pdm/pdm-clk1";
+ pdm_sdi0m0 = "/pinctrl/pdm/pdm-sdi0m0";
+ pdm_sdi0m1 = "/pinctrl/pdm/pdm-sdi0m1";
+ pdm_sdi1 = "/pinctrl/pdm/pdm-sdi1";
+ pdm_sdi2 = "/pinctrl/pdm/pdm-sdi2";
+ pdm_sdi3 = "/pinctrl/pdm/pdm-sdi3";
+ pdm_clk0m0_sleep = "/pinctrl/pdm/pdm-clk0m0-sleep";
+ pdm_clk0m_sleep1 = "/pinctrl/pdm/pdm-clk0m1-sleep";
+ pdm_clk1_sleep = "/pinctrl/pdm/pdm-clk1-sleep";
+ pdm_sdi0m0_sleep = "/pinctrl/pdm/pdm-sdi0m0-sleep";
+ pdm_sdi0m1_sleep = "/pinctrl/pdm/pdm-sdi0m1-sleep";
+ pdm_sdi1_sleep = "/pinctrl/pdm/pdm-sdi1-sleep";
+ pdm_sdi2_sleep = "/pinctrl/pdm/pdm-sdi2-sleep";
+ pdm_sdi3_sleep = "/pinctrl/pdm/pdm-sdi3-sleep";
+ i2s0_8ch_mclk = "/pinctrl/i2s0/i2s0-8ch-mclk";
+ i2s0_8ch_sclktx = "/pinctrl/i2s0/i2s0-8ch-sclktx";
+ i2s0_8ch_sclkrx = "/pinctrl/i2s0/i2s0-8ch-sclkrx";
+ i2s0_8ch_lrcktx = "/pinctrl/i2s0/i2s0-8ch-lrcktx";
+ i2s0_8ch_lrckrx = "/pinctrl/i2s0/i2s0-8ch-lrckrx";
+ i2s0_8ch_sdo0 = "/pinctrl/i2s0/i2s0-8ch-sdo0";
+ i2s0_8ch_sdo1 = "/pinctrl/i2s0/i2s0-8ch-sdo1";
+ i2s0_8ch_sdo2 = "/pinctrl/i2s0/i2s0-8ch-sdo2";
+ i2s0_8ch_sdo3 = "/pinctrl/i2s0/i2s0-8ch-sdo3";
+ i2s0_8ch_sdi0 = "/pinctrl/i2s0/i2s0-8ch-sdi0";
+ i2s0_8ch_sdi1 = "/pinctrl/i2s0/i2s0-8ch-sdi1";
+ i2s0_8ch_sdi2 = "/pinctrl/i2s0/i2s0-8ch-sdi2";
+ i2s0_8ch_sdi3 = "/pinctrl/i2s0/i2s0-8ch-sdi3";
+ i2s1_2ch_mclk = "/pinctrl/i2s1/i2s1-2ch-mclk";
+ i2s1_2ch_sclk = "/pinctrl/i2s1/i2s1-2ch-sclk";
+ i2s1_2ch_lrck = "/pinctrl/i2s1/i2s1-2ch-lrck";
+ i2s1_2ch_sdi = "/pinctrl/i2s1/i2s1-2ch-sdi";
+ i2s1_2ch_sdo = "/pinctrl/i2s1/i2s1-2ch-sdo";
+ i2s2_2ch_mclk = "/pinctrl/i2s2/i2s2-2ch-mclk";
+ i2s2_2ch_sclk = "/pinctrl/i2s2/i2s2-2ch-sclk";
+ i2s2_2ch_lrck = "/pinctrl/i2s2/i2s2-2ch-lrck";
+ i2s2_2ch_sdi = "/pinctrl/i2s2/i2s2-2ch-sdi";
+ i2s2_2ch_sdo = "/pinctrl/i2s2/i2s2-2ch-sdo";
+ sdmmc_clk = "/pinctrl/sdmmc/sdmmc-clk";
+ sdmmc_cmd = "/pinctrl/sdmmc/sdmmc-cmd";
+ sdmmc_det = "/pinctrl/sdmmc/sdmmc-det";
+ sdmmc_bus1 = "/pinctrl/sdmmc/sdmmc-bus1";
+ sdmmc_bus4 = "/pinctrl/sdmmc/sdmmc-bus4";
+ sdmmc_gpio = "/pinctrl/sdmmc/sdmmc-gpio";
+ sdio_clk = "/pinctrl/sdio/sdio-clk";
+ sdio_cmd = "/pinctrl/sdio/sdio-cmd";
+ sdio_bus4 = "/pinctrl/sdio/sdio-bus4";
+ sdio_gpio = "/pinctrl/sdio/sdio-gpio";
+ emmc_clk = "/pinctrl/emmc/emmc-clk";
+ emmc_cmd = "/pinctrl/emmc/emmc-cmd";
+ emmc_pwren = "/pinctrl/emmc/emmc-pwren";
+ emmc_rstnout = "/pinctrl/emmc/emmc-rstnout";
+ emmc_bus1 = "/pinctrl/emmc/emmc-bus1";
+ emmc_bus4 = "/pinctrl/emmc/emmc-bus4";
+ emmc_bus8 = "/pinctrl/emmc/emmc-bus8";
+ flash_cs0 = "/pinctrl/flash/flash-cs0";
+ flash_rdy = "/pinctrl/flash/flash-rdy";
+ flash_dqs = "/pinctrl/flash/flash-dqs";
+ flash_ale = "/pinctrl/flash/flash-ale";
+ flash_cle = "/pinctrl/flash/flash-cle";
+ flash_wrn = "/pinctrl/flash/flash-wrn";
+ flash_csl = "/pinctrl/flash/flash-csl";
+ flash_rdn = "/pinctrl/flash/flash-rdn";
+ flash_bus8 = "/pinctrl/flash/flash-bus8";
+ lcdc_m0_rgb_pins = "/pinctrl/lcdc/lcdc-m0-rgb-pins";
+ lcdc_m0_sleep_pins = "/pinctrl/lcdc/lcdc-m0-sleep-pins";
+ lcdc_m1_rgb_pins = "/pinctrl/lcdc/lcdc-m1-rgb-pins";
+ lcdc_m1_sleep_pins = "/pinctrl/lcdc/lcdc-m1-sleep-pins";
+ pwm0_pin = "/pinctrl/pwm0/pwm0-pin";
+ pwm1_pin = "/pinctrl/pwm1/pwm1-pin";
+ pwm2_pin = "/pinctrl/pwm2/pwm2-pin";
+ pwm3_pin = "/pinctrl/pwm3/pwm3-pin";
+ pwm4_pin = "/pinctrl/pwm4/pwm4-pin";
+ pwm5_pin = "/pinctrl/pwm5/pwm5-pin";
+ pwm6_pin = "/pinctrl/pwm6/pwm6-pin";
+ pwm7_pin = "/pinctrl/pwm7/pwm7-pin";
+ rmii_pins = "/pinctrl/gmac/rmii-pins";
+ mac_refclk_12ma = "/pinctrl/gmac/mac-refclk-12ma";
+ mac_refclk = "/pinctrl/gmac/mac-refclk";
+ cif_clkout_m0 = "/pinctrl/cif-m0/cif-clkout-m0";
+ dvp_d2d9_m0 = "/pinctrl/cif-m0/dvp-d2d9-m0";
+ dvp_d0d1_m0 = "/pinctrl/cif-m0/dvp-d0d1-m0";
+ dvp_d10d11_m0 = "/pinctrl/cif-m0/d10-d11-m0";
+ cif_clkout_m1 = "/pinctrl/cif-m1/cif-clkout-m1";
+ dvp_d2d9_m1 = "/pinctrl/cif-m1/dvp-d2d9-m1";
+ dvp_d0d1_m1 = "/pinctrl/cif-m1/dvp-d0d1-m1";
+ dvp_d10d11_m1 = "/pinctrl/cif-m1/d10-d11-m1";
+ isp_prelight = "/pinctrl/isp/isp-prelight";
+ pmic_int = "/pinctrl/pmic/pmic_int";
+ soc_slppin_gpio = "/pinctrl/pmic/soc_slppin_gpio";
+ soc_slppin_slp = "/pinctrl/pmic/soc_slppin_slp";
+ soc_slppin_rst = "/pinctrl/pmic/soc_slppin_rst";
+ led_pins = "/pinctrl/leds/led-pins";
+ btn_pins = "/pinctrl/btns/btn-pins";
+ drm_logo = "/reserved-memory/drm-logo@00000000";
+ ramoops_mem = "/reserved-memory/region@110000";
+ gpio_keys = "/odroidgo3-keys";
+ joypad = "/odroidgo3-joypad";
+ leds = "/gpio_leds";
+ backlight = "/backlight";
+ vccsys = "/vccsys";
+ };
+};
diff --git a/config/archr-dts/R36S-DTB/DTS/Panel4.dts b/config/archr-dts/R36S-DTB/DTS/Panel4.dts
new file mode 100644
index 0000000000..c45f3e1efe
--- /dev/null
+++ b/config/archr-dts/R36S-DTB/DTS/Panel4.dts
@@ -0,0 +1,4063 @@
+/dts-v1/;
+
+/ {
+ compatible = "rockchip,rk3326-odroidgo3-linux\0rockchip,rk3326";
+ interrupt-parent = <0x01>;
+ #address-cells = <0x02>;
+ #size-cells = <0x02>;
+ model = "Game Console R35S/R36S fix by lxc";
+
+ ddr_timing {
+ compatible = "rockchip,ddr-timing";
+ ddr2_speed_bin = <0x00>;
+ ddr3_speed_bin = <0x15>;
+ ddr4_speed_bin = <0x0c>;
+ pd_idle = <0x0d>;
+ sr_idle = <0x5d>;
+ sr_mc_gate_idle = <0x00>;
+ srpd_lite_idle = <0x00>;
+ standby_idle = <0x00>;
+ auto_pd_dis_freq = <0x42a>;
+ auto_sr_dis_freq = <0x320>;
+ ddr2_dll_dis_freq = <0x12c>;
+ ddr3_dll_dis_freq = <0x12c>;
+ ddr4_dll_dis_freq = <0x271>;
+ phy_dll_dis_freq = <0x190>;
+ ddr2_odt_dis_freq = <0x64>;
+ phy_ddr2_odt_dis_freq = <0x64>;
+ ddr2_drv = <0x01>;
+ ddr2_odt = <0x96>;
+ phy_ddr2_ca_drv = <0x15>;
+ phy_ddr2_ck_drv = <0x12>;
+ phy_ddr2_dq_drv = <0x15>;
+ phy_ddr2_odt = <0x02>;
+ ddr3_odt_dis_freq = <0x190>;
+ phy_ddr3_odt_dis_freq = <0x190>;
+ ddr3_drv = <0x28>;
+ ddr3_odt = <0x78>;
+ phy_ddr3_ca_drv = <0x15>;
+ phy_ddr3_ck_drv = <0x12>;
+ phy_ddr3_dq_drv = <0x15>;
+ phy_ddr3_odt = <0x02>;
+ phy_lpddr2_odt_dis_freq = <0x29a>;
+ lpddr2_drv = <0x28>;
+ phy_lpddr2_ca_drv = <0x16>;
+ phy_lpddr2_ck_drv = <0x13>;
+ phy_lpddr2_dq_drv = <0x16>;
+ phy_lpddr2_odt = <0x00>;
+ lpddr3_odt_dis_freq = <0x190>;
+ phy_lpddr3_odt_dis_freq = <0x190>;
+ lpddr3_drv = <0x28>;
+ lpddr3_odt = <0xf0>;
+ phy_lpddr3_ca_drv = <0x16>;
+ phy_lpddr3_ck_drv = <0x13>;
+ phy_lpddr3_dq_drv = <0x16>;
+ phy_lpddr3_odt = <0x02>;
+ lpddr4_odt_dis_freq = <0x320>;
+ phy_lpddr4_odt_dis_freq = <0x320>;
+ lpddr4_drv = <0x3c>;
+ lpddr4_dq_odt = <0x28>;
+ lpddr4_ca_odt = <0x28>;
+ phy_lpddr4_ca_drv = <0x14>;
+ phy_lpddr4_ck_cs_drv = <0x06>;
+ phy_lpddr4_dq_drv = <0x06>;
+ phy_lpddr4_odt = <0x10>;
+ ddr4_odt_dis_freq = <0x29a>;
+ phy_ddr4_odt_dis_freq = <0x29a>;
+ ddr4_drv = <0x22>;
+ ddr4_odt = <0xf0>;
+ phy_ddr4_ca_drv = <0x16>;
+ phy_ddr4_ck_drv = <0x13>;
+ phy_ddr4_dq_drv = <0x16>;
+ phy_ddr4_odt = <0x02>;
+ ddr3a1_ddr4a9_de-skew = <0x06>;
+ ddr3a0_ddr4a10_de-skew = <0x07>;
+ ddr3a3_ddr4a6_de-skew = <0x07>;
+ ddr3a2_ddr4a4_de-skew = <0x07>;
+ ddr3a5_ddr4a8_de-skew = <0x07>;
+ ddr3a4_ddr4a5_de-skew = <0x07>;
+ ddr3a7_ddr4a11_de-skew = <0x07>;
+ ddr3a6_ddr4a7_de-skew = <0x06>;
+ ddr3a9_ddr4a0_de-skew = <0x07>;
+ ddr3a8_ddr4a13_de-skew = <0x07>;
+ ddr3a11_ddr4a3_de-skew = <0x07>;
+ ddr3a10_ddr4cs0_de-skew = <0x07>;
+ ddr3a13_ddr4a2_de-skew = <0x07>;
+ ddr3a12_ddr4ba1_de-skew = <0x07>;
+ ddr3a15_ddr4odt0_de-skew = <0x07>;
+ ddr3a14_ddr4a1_de-skew = <0x07>;
+ ddr3ba1_ddr4a15_de-skew = <0x07>;
+ ddr3ba0_ddr4bg0_de-skew = <0x07>;
+ ddr3ras_ddr4cke_de-skew = <0x07>;
+ ddr3ba2_ddr4ba0_de-skew = <0x07>;
+ ddr3we_ddr4bg1_de-skew = <0x07>;
+ ddr3cas_ddr4a12_de-skew = <0x07>;
+ ddr3ckn_ddr4ckn_de-skew = <0x07>;
+ ddr3ckp_ddr4ckp_de-skew = <0x07>;
+ ddr3cke_ddr4a16_de-skew = <0x07>;
+ ddr3odt0_ddr4a14_de-skew = <0x07>;
+ ddr3cs0_ddr4act_de-skew = <0x06>;
+ ddr3reset_ddr4reset_de-skew = <0x07>;
+ ddr3cs1_ddr4cs1_de-skew = <0x06>;
+ ddr3odt1_ddr4odt1_de-skew = <0x07>;
+ cs0_dm0_rx_de-skew = <0x07>;
+ cs0_dm0_tx_de-skew = <0x07>;
+ cs0_dq0_rx_de-skew = <0x08>;
+ cs0_dq0_tx_de-skew = <0x08>;
+ cs0_dq1_rx_de-skew = <0x09>;
+ cs0_dq1_tx_de-skew = <0x08>;
+ cs0_dq2_rx_de-skew = <0x08>;
+ cs0_dq2_tx_de-skew = <0x08>;
+ cs0_dq3_rx_de-skew = <0x08>;
+ cs0_dq3_tx_de-skew = <0x08>;
+ cs0_dq4_rx_de-skew = <0x09>;
+ cs0_dq4_tx_de-skew = <0x08>;
+ cs0_dq5_rx_de-skew = <0x09>;
+ cs0_dq5_tx_de-skew = <0x08>;
+ cs0_dq6_rx_de-skew = <0x09>;
+ cs0_dq6_tx_de-skew = <0x08>;
+ cs0_dq7_rx_de-skew = <0x08>;
+ cs0_dq7_tx_de-skew = <0x08>;
+ cs0_dqs0_rx_de-skew = <0x06>;
+ cs0_dqs0p_tx_de-skew = <0x09>;
+ cs0_dqs0n_tx_de-skew = <0x09>;
+ cs0_dm1_rx_de-skew = <0x07>;
+ cs0_dm1_tx_de-skew = <0x06>;
+ cs0_dq8_rx_de-skew = <0x08>;
+ cs0_dq8_tx_de-skew = <0x07>;
+ cs0_dq9_rx_de-skew = <0x09>;
+ cs0_dq9_tx_de-skew = <0x07>;
+ cs0_dq10_rx_de-skew = <0x08>;
+ cs0_dq10_tx_de-skew = <0x08>;
+ cs0_dq11_rx_de-skew = <0x08>;
+ cs0_dq11_tx_de-skew = <0x07>;
+ cs0_dq12_rx_de-skew = <0x08>;
+ cs0_dq12_tx_de-skew = <0x08>;
+ cs0_dq13_rx_de-skew = <0x09>;
+ cs0_dq13_tx_de-skew = <0x07>;
+ cs0_dq14_rx_de-skew = <0x09>;
+ cs0_dq14_tx_de-skew = <0x08>;
+ cs0_dq15_rx_de-skew = <0x09>;
+ cs0_dq15_tx_de-skew = <0x07>;
+ cs0_dqs1_rx_de-skew = <0x07>;
+ cs0_dqs1p_tx_de-skew = <0x09>;
+ cs0_dqs1n_tx_de-skew = <0x09>;
+ cs0_dm2_rx_de-skew = <0x07>;
+ cs0_dm2_tx_de-skew = <0x07>;
+ cs0_dq16_rx_de-skew = <0x09>;
+ cs0_dq16_tx_de-skew = <0x09>;
+ cs0_dq17_rx_de-skew = <0x07>;
+ cs0_dq17_tx_de-skew = <0x09>;
+ cs0_dq18_rx_de-skew = <0x07>;
+ cs0_dq18_tx_de-skew = <0x08>;
+ cs0_dq19_rx_de-skew = <0x07>;
+ cs0_dq19_tx_de-skew = <0x09>;
+ cs0_dq20_rx_de-skew = <0x09>;
+ cs0_dq20_tx_de-skew = <0x09>;
+ cs0_dq21_rx_de-skew = <0x09>;
+ cs0_dq21_tx_de-skew = <0x09>;
+ cs0_dq22_rx_de-skew = <0x08>;
+ cs0_dq22_tx_de-skew = <0x09>;
+ cs0_dq23_rx_de-skew = <0x08>;
+ cs0_dq23_tx_de-skew = <0x09>;
+ cs0_dqs2_rx_de-skew = <0x06>;
+ cs0_dqs2p_tx_de-skew = <0x09>;
+ cs0_dqs2n_tx_de-skew = <0x09>;
+ cs0_dm3_rx_de-skew = <0x07>;
+ cs0_dm3_tx_de-skew = <0x07>;
+ cs0_dq24_rx_de-skew = <0x08>;
+ cs0_dq24_tx_de-skew = <0x08>;
+ cs0_dq25_rx_de-skew = <0x09>;
+ cs0_dq25_tx_de-skew = <0x09>;
+ cs0_dq26_rx_de-skew = <0x09>;
+ cs0_dq26_tx_de-skew = <0x08>;
+ cs0_dq27_rx_de-skew = <0x09>;
+ cs0_dq27_tx_de-skew = <0x08>;
+ cs0_dq28_rx_de-skew = <0x09>;
+ cs0_dq28_tx_de-skew = <0x09>;
+ cs0_dq29_rx_de-skew = <0x09>;
+ cs0_dq29_tx_de-skew = <0x09>;
+ cs0_dq30_rx_de-skew = <0x08>;
+ cs0_dq30_tx_de-skew = <0x08>;
+ cs0_dq31_rx_de-skew = <0x08>;
+ cs0_dq31_tx_de-skew = <0x08>;
+ cs0_dqs3_rx_de-skew = <0x07>;
+ cs0_dqs3p_tx_de-skew = <0x09>;
+ cs0_dqs3n_tx_de-skew = <0x09>;
+ cs1_dm0_rx_de-skew = <0x07>;
+ cs1_dm0_tx_de-skew = <0x07>;
+ cs1_dq0_rx_de-skew = <0x08>;
+ cs1_dq0_tx_de-skew = <0x08>;
+ cs1_dq1_rx_de-skew = <0x09>;
+ cs1_dq1_tx_de-skew = <0x08>;
+ cs1_dq2_rx_de-skew = <0x08>;
+ cs1_dq2_tx_de-skew = <0x08>;
+ cs1_dq3_rx_de-skew = <0x08>;
+ cs1_dq3_tx_de-skew = <0x08>;
+ cs1_dq4_rx_de-skew = <0x08>;
+ cs1_dq4_tx_de-skew = <0x08>;
+ cs1_dq5_rx_de-skew = <0x09>;
+ cs1_dq5_tx_de-skew = <0x08>;
+ cs1_dq6_rx_de-skew = <0x09>;
+ cs1_dq6_tx_de-skew = <0x08>;
+ cs1_dq7_rx_de-skew = <0x08>;
+ cs1_dq7_tx_de-skew = <0x08>;
+ cs1_dqs0_rx_de-skew = <0x06>;
+ cs1_dqs0p_tx_de-skew = <0x09>;
+ cs1_dqs0n_tx_de-skew = <0x09>;
+ cs1_dm1_rx_de-skew = <0x07>;
+ cs1_dm1_tx_de-skew = <0x07>;
+ cs1_dq8_rx_de-skew = <0x08>;
+ cs1_dq8_tx_de-skew = <0x08>;
+ cs1_dq9_rx_de-skew = <0x08>;
+ cs1_dq9_tx_de-skew = <0x07>;
+ cs1_dq10_rx_de-skew = <0x07>;
+ cs1_dq10_tx_de-skew = <0x08>;
+ cs1_dq11_rx_de-skew = <0x08>;
+ cs1_dq11_tx_de-skew = <0x08>;
+ cs1_dq12_rx_de-skew = <0x08>;
+ cs1_dq12_tx_de-skew = <0x07>;
+ cs1_dq13_rx_de-skew = <0x08>;
+ cs1_dq13_tx_de-skew = <0x08>;
+ cs1_dq14_rx_de-skew = <0x08>;
+ cs1_dq14_tx_de-skew = <0x08>;
+ cs1_dq15_rx_de-skew = <0x08>;
+ cs1_dq15_tx_de-skew = <0x07>;
+ cs1_dqs1_rx_de-skew = <0x07>;
+ cs1_dqs1p_tx_de-skew = <0x09>;
+ cs1_dqs1n_tx_de-skew = <0x09>;
+ cs1_dm2_rx_de-skew = <0x07>;
+ cs1_dm2_tx_de-skew = <0x08>;
+ cs1_dq16_rx_de-skew = <0x08>;
+ cs1_dq16_tx_de-skew = <0x09>;
+ cs1_dq17_rx_de-skew = <0x08>;
+ cs1_dq17_tx_de-skew = <0x09>;
+ cs1_dq18_rx_de-skew = <0x07>;
+ cs1_dq18_tx_de-skew = <0x08>;
+ cs1_dq19_rx_de-skew = <0x08>;
+ cs1_dq19_tx_de-skew = <0x09>;
+ cs1_dq20_rx_de-skew = <0x09>;
+ cs1_dq20_tx_de-skew = <0x09>;
+ cs1_dq21_rx_de-skew = <0x09>;
+ cs1_dq21_tx_de-skew = <0x09>;
+ cs1_dq22_rx_de-skew = <0x08>;
+ cs1_dq22_tx_de-skew = <0x09>;
+ cs1_dq23_rx_de-skew = <0x08>;
+ cs1_dq23_tx_de-skew = <0x09>;
+ cs1_dqs2_rx_de-skew = <0x06>;
+ cs1_dqs2p_tx_de-skew = <0x09>;
+ cs1_dqs2n_tx_de-skew = <0x09>;
+ cs1_dm3_rx_de-skew = <0x07>;
+ cs1_dm3_tx_de-skew = <0x07>;
+ cs1_dq24_rx_de-skew = <0x08>;
+ cs1_dq24_tx_de-skew = <0x09>;
+ cs1_dq25_rx_de-skew = <0x09>;
+ cs1_dq25_tx_de-skew = <0x09>;
+ cs1_dq26_rx_de-skew = <0x09>;
+ cs1_dq26_tx_de-skew = <0x08>;
+ cs1_dq27_rx_de-skew = <0x08>;
+ cs1_dq27_tx_de-skew = <0x08>;
+ cs1_dq28_rx_de-skew = <0x09>;
+ cs1_dq28_tx_de-skew = <0x09>;
+ cs1_dq29_rx_de-skew = <0x09>;
+ cs1_dq29_tx_de-skew = <0x09>;
+ cs1_dq30_rx_de-skew = <0x09>;
+ cs1_dq30_tx_de-skew = <0x08>;
+ cs1_dq31_rx_de-skew = <0x08>;
+ cs1_dq31_tx_de-skew = <0x08>;
+ cs1_dqs3_rx_de-skew = <0x07>;
+ cs1_dqs3p_tx_de-skew = <0x09>;
+ cs1_dqs3n_tx_de-skew = <0x09>;
+ phandle = <0xaf>;
+ };
+
+ aliases {
+ ethernet0 = "/ethernet@ff360000";
+ i2c0 = "/i2c@ff180000";
+ i2c1 = "/i2c@ff190000";
+ i2c2 = "/i2c@ff1a0000";
+ i2c3 = "/i2c@ff1b0000";
+ serial0 = "/serial@ff030000";
+ serial1 = "/serial@ff158000";
+ serial2 = "/serial@ff160000";
+ serial3 = "/serial@ff168000";
+ serial4 = "/serial@ff170000";
+ serial5 = "/serial@ff178000";
+ spi0 = "/spi@ff1d0000";
+ spi1 = "/spi@ff1d8000";
+ };
+
+ cpus {
+ #address-cells = <0x02>;
+ #size-cells = <0x00>;
+
+ cpu@0 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a35\0arm,armv8";
+ reg = <0x00 0x00>;
+ enable-method = "psci";
+ clocks = <0x02 0x07>;
+ #cooling-cells = <0x02>;
+ dynamic-power-coefficient = <0x5a>;
+ operating-points-v2 = <0x03>;
+ cpu-idle-states = <0x04 0x05>;
+ cpu-supply = <0x06>;
+ phandle = <0x09>;
+ };
+
+ cpu@1 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a35\0arm,armv8";
+ reg = <0x00 0x01>;
+ enable-method = "psci";
+ operating-points-v2 = <0x03>;
+ cpu-idle-states = <0x04 0x05>;
+ phandle = <0x0a>;
+ };
+
+ cpu@2 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a35\0arm,armv8";
+ reg = <0x00 0x02>;
+ enable-method = "psci";
+ operating-points-v2 = <0x03>;
+ cpu-idle-states = <0x04 0x05>;
+ phandle = <0x0b>;
+ };
+
+ cpu@3 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a35\0arm,armv8";
+ reg = <0x00 0x03>;
+ enable-method = "psci";
+ operating-points-v2 = <0x03>;
+ cpu-idle-states = <0x04 0x05>;
+ phandle = <0x0c>;
+ };
+
+ idle-states {
+ entry-method = "psci";
+
+ cpu-sleep {
+ compatible = "arm,idle-state";
+ local-timer-stop;
+ arm,psci-suspend-param = <0x10000>;
+ entry-latency-us = <0x78>;
+ exit-latency-us = <0xfa>;
+ min-residency-us = <0x384>;
+ phandle = <0x04>;
+ };
+
+ cluster-sleep {
+ compatible = "arm,idle-state";
+ local-timer-stop;
+ arm,psci-suspend-param = <0x1010000>;
+ entry-latency-us = <0x190>;
+ exit-latency-us = <0x1f4>;
+ min-residency-us = <0x7d0>;
+ phandle = <0x05>;
+ };
+ };
+ };
+
+ cpu0-opp-table {
+ compatible = "operating-points-v2";
+ opp-shared;
+ rockchip,temp-hysteresis = <0x1388>;
+ rockchip,low-temp = <0x00>;
+ rockchip,low-temp-min-volt = <0xf4240>;
+ rockchip,low-temp-adjust-volt = <0x00 0x5e8 0xc350>;
+ clocks = <0x02 0x01>;
+ rockchip,avs-scale = <0x04>;
+ rockchip,max-volt = <0x149970>;
+ rockchip,evb-irdrop = <0x61a8>;
+ nvmem-cells = <0x07 0x08>;
+ nvmem-cell-names = "cpu_leakage\0performance";
+ rockchip,bin-scaling-sel = <0x00 0x0d 0x01 0x0d>;
+ rockchip,pvtm-voltage-sel = <0x00 0xc350 0x00 0xc351 0xd2f0 0x01 0xd2f1 0xea60 0x02 0xea61 0x1869f 0x03>;
+ rockchip,pvtm-freq = <0x639c0>;
+ rockchip,pvtm-volt = <0xf4240>;
+ rockchip,pvtm-ch = <0x00 0x00>;
+ rockchip,pvtm-sample-time = <0x3e8>;
+ rockchip,pvtm-number = <0x0a>;
+ rockchip,pvtm-error = <0x3e8>;
+ rockchip,pvtm-ref-temp = <0x28>;
+ rockchip,pvtm-temp-prop = <0xffffffc8 0xffffffc8>;
+ rockchip,thermal-zone = "soc-thermal";
+ rockchip,avs = <0x01>;
+ phandle = <0x03>;
+
+ opp-1008000000 {
+ opp-hz = <0x00 0x3c14dc00>;
+ opp-microvolt = <0x11edd8 0x11edd8 0x149970>;
+ opp-microvolt-L0 = <0x11edd8 0x11edd8 0x149970>;
+ opp-microvolt-L1 = <0x112a88 0x112a88 0x149970>;
+ opp-microvolt-L2 = <0x112a88 0x112a88 0x149970>;
+ opp-microvolt-L3 = <0x100590 0x100590 0x149970>;
+ clock-latency-ns = <0x9c40>;
+ };
+
+ opp-1200000000 {
+ opp-hz = <0x00 0x47868c00>;
+ opp-microvolt = <0x13d620 0x13d620 0x149970>;
+ opp-microvolt-L0 = <0x13d620 0x13d620 0x149970>;
+ opp-microvolt-L1 = <0x137478 0x137478 0x149970>;
+ opp-microvolt-L2 = <0x1312d0 0x1312d0 0x149970>;
+ opp-microvolt-L3 = <0x124f80 0x124f80 0x149970>;
+ clock-latency-ns = <0x9c40>;
+ };
+
+ opp-1248000000 {
+ opp-hz = <0x00 0x4a62f800>;
+ opp-microvolt = <0x149970 0x149970 0x149970>;
+ opp-microvolt-L0 = <0x149970 0x149970 0x149970>;
+ opp-microvolt-L1 = <0x13d620 0x13d620 0x149970>;
+ opp-microvolt-L2 = <0x137478 0x137478 0x149970>;
+ opp-microvolt-L3 = <0x12b128 0x12b128 0x149970>;
+ clock-latency-ns = <0x9c40>;
+ };
+
+ opp-1296000000 {
+ opp-hz = <0x00 0x4d3f6400>;
+ opp-microvolt = <0x149970 0x149970 0x149970>;
+ opp-microvolt-L0 = <0x149970 0x149970 0x149970>;
+ opp-microvolt-L1 = <0x149970 0x149970 0x149970>;
+ opp-microvolt-L2 = <0x13d620 0x13d620 0x149970>;
+ opp-microvolt-L3 = <0x1312d0 0x1312d0 0x149970>;
+ clock-latency-ns = <0x9c40>;
+ };
+
+ opp-1512000000 {
+ opp-hz = <0x00 0x5a1f4a00>;
+ opp-microvolt = <0x149970 0x149970 0x149970>;
+ opp-microvolt-L0 = <0x149970 0x149970 0x149970>;
+ opp-microvolt-L1 = <0x149970 0x149970 0x149970>;
+ opp-microvolt-L2 = <0x13d620 0x13d620 0x149970>;
+ opp-microvolt-L3 = <0x1312d0 0x1312d0 0x149970>;
+ clock-latency-ns = <0x9c40>;
+ };
+ };
+
+ arm-pmu {
+ compatible = "arm,cortex-a53-pmu";
+ interrupts = <0x00 0x64 0x04 0x00 0x65 0x04 0x00 0x66 0x04 0x00 0x67 0x04>;
+ interrupt-affinity = <0x09 0x0a 0x0b 0x0c>;
+ };
+
+ bus-soc {
+ compatible = "rockchip,px30-bus";
+ rockchip,busfreq-policy = "autocs";
+ phandle = <0xc4>;
+
+ soc-bus0 {
+ bus-id = <0x00>;
+ timer-us = <0x14>;
+ enable-msk = <0x40f7>;
+ status = "disabled";
+ };
+
+ soc-bus1 {
+ bus-id = <0x01>;
+ timer-us = <0xc8>;
+ enable-msk = <0x40bf>;
+ status = "disabled";
+ };
+
+ soc-bus2 {
+ bus-id = <0x02>;
+ timer-us = <0xc8>;
+ enable-msk = <0x4007>;
+ status = "disabled";
+ };
+ };
+
+ bus-apll {
+ compatible = "rockchip,px30-bus";
+ rockchip,busfreq-policy = "clkfreq";
+ clocks = <0x02 0x01>;
+ clock-names = "bus";
+ operating-points-v2 = <0x0d>;
+ status = "okay";
+ bus-supply = <0x0e>;
+ phandle = <0xc5>;
+ };
+
+ bus-apll-opp-table {
+ compatible = "operating-points-v2";
+ opp-shared;
+ phandle = <0x0d>;
+
+ opp-1512000000 {
+ opp-hz = <0x00 0x5a1f4a00>;
+ opp-microvolt = <0xf4240>;
+ };
+
+ opp-1008000000 {
+ opp-hz = <0x00 0x3c14dc00>;
+ opp-microvolt = <0xe7ef0>;
+ };
+ };
+
+ cpuinfo {
+ compatible = "rockchip,cpuinfo";
+ nvmem-cells = <0x0f>;
+ nvmem-cell-names = "id";
+ };
+
+ display-subsystem {
+ compatible = "rockchip,display-subsystem";
+ ports = <0x10>;
+ status = "okay";
+ logo-memory-region = <0x11>;
+ phandle = <0xc6>;
+
+ route {
+
+ route-lvds {
+ status = "disabled";
+ logo,uboot = "logo.gif";
+ logo,kernel = "logo_kernel.gif";
+ logo,mode = "center";
+ charge_logo,mode = "center";
+ connect = <0x12>;
+ phandle = <0xc7>;
+ };
+
+ route-dsi {
+ status = "okay";
+ logo,uboot = "logo.gif";
+ logo,kernel = "logo_kernel.gif";
+ logo,mode = "center";
+ charge_logo,mode = "center";
+ connect = <0x13>;
+ phandle = <0xc8>;
+ };
+
+ route-rgb {
+ status = "disabled";
+ logo,uboot = "logo.gif";
+ logo,kernel = "logo_kernel.gif";
+ logo,mode = "center";
+ charge_logo,mode = "center";
+ connect = <0x14>;
+ phandle = <0xc9>;
+ };
+ };
+ };
+
+ firmware {
+
+ optee {
+ compatible = "linaro,optee-tz";
+ method = "smc";
+ };
+ };
+
+ external-gmac-clock {
+ compatible = "fixed-clock";
+ clock-frequency = <0x2faf080>;
+ clock-output-names = "gmac_clkin";
+ #clock-cells = <0x00>;
+ phandle = <0xca>;
+ };
+
+ psci {
+ compatible = "arm,psci-1.0";
+ method = "smc";
+ };
+
+ rockchip-suspend {
+ compatible = "rockchip,pm-px30";
+ status = "okay";
+ rockchip,sleep-debug-en = <0x01>;
+ rockchip,sleep-mode-config = <0x20702>;
+ rockchip,wakeup-config = <0x85>;
+ phandle = <0xcb>;
+ };
+
+ timer {
+ compatible = "arm,armv8-timer";
+ interrupts = <0x01 0x0d 0xf04 0x01 0x0e 0xf04 0x01 0x0b 0xf04 0x01 0x0a 0xf04>;
+ };
+
+ xin24m {
+ compatible = "fixed-clock";
+ #clock-cells = <0x00>;
+ clock-frequency = <0x16e3600>;
+ clock-output-names = "xin24m";
+ phandle = <0xcc>;
+ };
+
+ xin32k {
+ compatible = "fixed-clock";
+ #clock-cells = <0x00>;
+ clock-frequency = <0x8000>;
+ clock-output-names = "xin32k";
+ phandle = <0xcd>;
+ };
+
+ power-management@ff000000 {
+ compatible = "rockchip,px30-pmu\0syscon\0simple-mfd";
+ reg = <0x00 0xff000000 0x00 0x1000>;
+ phandle = <0xce>;
+
+ power-controller {
+ compatible = "rockchip,px30-power-controller";
+ #power-domain-cells = <0x01>;
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+ phandle = <0x8a>;
+
+ pd_usb@5 {
+ reg = <0x05>;
+ clocks = <0x02 0x103 0x02 0x102 0x02 0x3c>;
+ pm_qos = <0x15 0x16>;
+ };
+
+ pd_sdcard@7 {
+ reg = <0x07>;
+ clocks = <0x02 0xf7 0x02 0x3b>;
+ pm_qos = <0x17>;
+ };
+
+ pd_gmac@9 {
+ reg = <0x09>;
+ clocks = <0x02 0xb2 0x02 0x143 0x02 0x40 0x02 0x3f>;
+ pm_qos = <0x18>;
+ };
+
+ pd_mmc_nand@10 {
+ reg = <0x0a>;
+ clocks = <0x02 0xfe 0x02 0x100 0x02 0xff 0x02 0x101 0x02 0x39 0x02 0x37 0x02 0x38 0x02 0x3a>;
+ pm_qos = <0x19 0x1a 0x1b 0x1c>;
+ };
+
+ pd_vpu@11 {
+ reg = <0x0b>;
+ clocks = <0x02 0xaf 0x02 0xf4 0x02 0x4b>;
+ pm_qos = <0x1d 0x1e>;
+ };
+
+ pd_vo@12 {
+ reg = <0x0c>;
+ clocks = <0x02 0xb7 0x02 0xb5 0x02 0xb6 0x02 0x96 0x02 0x97 0x02 0xfd 0x02 0xfb 0x02 0xfc 0x02 0x144 0x02 0x35 0x02 0x36>;
+ pm_qos = <0x1f 0x20 0x21 0x22>;
+ };
+
+ pd_vi@13 {
+ reg = <0x0d>;
+ clocks = <0x02 0xb3 0x02 0xb4 0x02 0xf9 0x02 0xfa 0x02 0x33>;
+ pm_qos = <0x23 0x24 0x25 0x26 0x27>;
+ };
+
+ pd_gpu@14 {
+ reg = <0x0e>;
+ clocks = <0x02 0x49>;
+ pm_qos = <0x28>;
+ };
+ };
+ };
+
+ syscon@ff010000 {
+ compatible = "rockchip,px30-pmugrf\0syscon\0simple-mfd";
+ reg = <0x00 0xff010000 0x00 0x1000>;
+ #address-cells = <0x01>;
+ #size-cells = <0x01>;
+ phandle = <0xac>;
+
+ io-domains {
+ compatible = "rockchip,px30-pmu-io-voltage-domain";
+ status = "okay";
+ pmuio1-supply = <0x29>;
+ pmuio2-supply = <0x29>;
+ phandle = <0xcf>;
+ };
+
+ reboot-mode {
+ compatible = "syscon-reboot-mode";
+ offset = <0x200>;
+ mode-bootloader = <0x5242c301>;
+ mode-charge = <0x5242c30b>;
+ mode-fastboot = <0x5242c309>;
+ mode-loader = <0x5242c301>;
+ mode-normal = <0x5242c300>;
+ mode-recovery = <0x5242c303>;
+ mode-ums = <0x5242c30c>;
+ };
+
+ pmu-pvtm {
+ compatible = "rockchip,px30-pmu-pvtm";
+ clocks = <0x2a 0x07>;
+ clock-names = "pmu";
+ status = "okay";
+ phandle = <0xd0>;
+ };
+ };
+
+ serial@ff030000 {
+ compatible = "rockchip,px30-uart\0snps,dw-apb-uart";
+ reg = <0x00 0xff030000 0x00 0x100>;
+ interrupts = <0x00 0x0f 0x04>;
+ clocks = <0x2a 0x06 0x2a 0x15>;
+ clock-names = "baudclk\0apb_pclk";
+ reg-shift = <0x02>;
+ reg-io-width = <0x04>;
+ dmas = <0x2b 0x00 0x2b 0x01>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x2c 0x2d 0x2e>;
+ status = "disabled";
+ phandle = <0xd1>;
+ };
+
+ i2s@ff060000 {
+ compatible = "rockchip,px30-i2s-tdm";
+ reg = <0x00 0xff060000 0x00 0x1000>;
+ interrupts = <0x00 0x0c 0x04>;
+ clocks = <0x02 0x10 0x02 0x12 0x02 0x106>;
+ clock-names = "mclk_tx\0mclk_rx\0hclk";
+ dmas = <0x2b 0x10 0x2b 0x11>;
+ dma-names = "tx\0rx";
+ resets = <0x02 0x84 0x02 0xbf>;
+ reset-names = "tx-m\0rx-m";
+ rockchip,cru = <0x02>;
+ rockchip,grf = <0x2f>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x30 0x31 0x32 0x33 0x34 0x35 0x36 0x37 0x38 0x39 0x3a 0x3b>;
+ status = "disabled";
+ phandle = <0xd2>;
+ };
+
+ i2s@ff070000 {
+ compatible = "rockchip,px30-i2s\0rockchip,rk3066-i2s";
+ reg = <0x00 0xff070000 0x00 0x1000>;
+ interrupts = <0x00 0x0d 0x04>;
+ clocks = <0x02 0x14 0x02 0x107>;
+ clock-names = "i2s_clk\0i2s_hclk";
+ dmas = <0x2b 0x12 0x2b 0x13>;
+ dma-names = "tx\0rx";
+ resets = <0x02 0x86 0x02 0x85>;
+ reset-names = "reset-m\0reset-h";
+ pinctrl-names = "default";
+ pinctrl-0 = <0x3c 0x3d 0x3e 0x3f>;
+ status = "okay";
+ #sound-dai-cells = <0x00>;
+ phandle = <0xc2>;
+ };
+
+ i2s@ff080000 {
+ compatible = "rockchip,px30-i2s\0rockchip,rk3066-i2s";
+ reg = <0x00 0xff080000 0x00 0x1000>;
+ interrupts = <0x00 0x0e 0x04>;
+ clocks = <0x02 0x16 0x02 0x108>;
+ clock-names = "i2s_clk\0i2s_hclk";
+ dmas = <0x2b 0x14 0x2b 0x15>;
+ dma-names = "tx\0rx";
+ resets = <0x02 0x88 0x02 0x87>;
+ reset-names = "reset-m\0reset-h";
+ pinctrl-names = "default";
+ pinctrl-0 = <0x40 0x41 0x42 0x43>;
+ status = "disabled";
+ phandle = <0xd3>;
+ };
+
+ pdm@ff0a0000 {
+ compatible = "rockchip,px30-pdm\0rockchip,pdm";
+ reg = <0x00 0xff0a0000 0x00 0x1000>;
+ clocks = <0x02 0x0f 0x02 0x105>;
+ clock-names = "pdm_clk\0pdm_hclk";
+ dmas = <0x2b 0x18>;
+ dma-names = "rx";
+ resets = <0x02 0x82>;
+ reset-names = "pdm-m";
+ pinctrl-names = "default";
+ pinctrl-0 = <0x44 0x45 0x46 0x47 0x48 0x49>;
+ status = "disabled";
+ phandle = <0xd4>;
+ };
+
+ crypto@ff0b0000 {
+ compatible = "rockchip,px30-crypto";
+ reg = <0x00 0xff0b0000 0x00 0x4000>;
+ interrupts = <0x00 0x52 0x04>;
+ clocks = <0x02 0xac 0x02 0xf1 0x02 0x30 0x02 0x31>;
+ clock-names = "aclk\0hclk\0sclk\0apb_pclk";
+ resets = <0x02 0x74>;
+ reset-names = "crypto-rst";
+ status = "disabled";
+ phandle = <0xd5>;
+ };
+
+ rng@ff0b0000 {
+ compatible = "rockchip,cryptov2-rng";
+ reg = <0x00 0xff0b0000 0x00 0x4000>;
+ clocks = <0x02 0x30 0x02 0x31 0x02 0xac 0x02 0xf1>;
+ clock-names = "clk_crypto\0clk_crypto_apk\0aclk_crypto\0hclk_crypto";
+ assigned-clocks = <0x02 0x30 0x02 0x31 0x02 0xac 0x02 0xf1>;
+ assigned-clock-rates = <0x8f0d180 0x8f0d180 0xbebc200 0x5f5e100>;
+ resets = <0x02 0x74>;
+ reset-names = "reset";
+ status = "okay";
+ phandle = <0xd6>;
+ };
+
+ interrupt-controller@ff131000 {
+ compatible = "arm,gic-400";
+ #interrupt-cells = <0x03>;
+ #address-cells = <0x00>;
+ interrupt-controller;
+ reg = <0x00 0xff131000 0x00 0x1000 0x00 0xff132000 0x00 0x2000 0x00 0xff134000 0x00 0x2000 0x00 0xff136000 0x00 0x2000>;
+ interrupts = <0x01 0x09 0xf04>;
+ phandle = <0x01>;
+ };
+
+ syscon@ff140000 {
+ compatible = "rockchip,px30-grf\0syscon\0simple-mfd";
+ reg = <0x00 0xff140000 0x00 0x1000>;
+ #address-cells = <0x01>;
+ #size-cells = <0x01>;
+ phandle = <0x2f>;
+
+ io-domains {
+ compatible = "rockchip,px30-io-voltage-domain";
+ status = "okay";
+ vccio1-supply = <0x4a>;
+ vccio2-supply = <0x4a>;
+ vccio3-supply = <0x4b>;
+ vccio4-supply = <0x4b>;
+ vccio5-supply = <0x4b>;
+ vccio6-supply = <0x4b>;
+ phandle = <0xd7>;
+ };
+
+ lvds {
+ compatible = "rockchip,px30-lvds";
+ phys = <0x4c>;
+ phy-names = "phy";
+ status = "disabled";
+ phandle = <0xd8>;
+
+ ports {
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+
+ port@0 {
+ reg = <0x00>;
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+
+ endpoint@0 {
+ reg = <0x00>;
+ remote-endpoint = <0x12>;
+ phandle = <0xa2>;
+ };
+ };
+ };
+ };
+
+ rgb {
+ compatible = "rockchip,px30-rgb";
+ pinctrl-names = "default\0sleep";
+ pinctrl-0 = <0x4d>;
+ pinctrl-1 = <0x4e>;
+ status = "disabled";
+ phys = <0x4c>;
+ phy-names = "phy";
+ phandle = <0xd9>;
+
+ ports {
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+
+ port@0 {
+ reg = <0x00>;
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+
+ endpoint@0 {
+ reg = <0x00>;
+ remote-endpoint = <0x14>;
+ phandle = <0xa4>;
+ };
+ };
+ };
+ };
+ };
+
+ syscon@ff148000 {
+ compatible = "syscon\0simple-mfd";
+ reg = <0x00 0xff148000 0x00 0x1000>;
+ #address-cells = <0x01>;
+ #size-cells = <0x01>;
+ phandle = <0xda>;
+
+ pvtm {
+ compatible = "rockchip,px30-pvtm";
+ clocks = <0x02 0x4a>;
+ clock-names = "core";
+ status = "okay";
+ phandle = <0xdb>;
+ };
+ };
+
+ serial@ff158000 {
+ compatible = "rockchip,px30-uart\0snps,dw-apb-uart";
+ reg = <0x00 0xff158000 0x00 0x100>;
+ interrupts = <0x00 0x10 0x04>;
+ clocks = <0x02 0x18 0x02 0x149>;
+ clock-names = "baudclk\0apb_pclk";
+ reg-shift = <0x02>;
+ reg-io-width = <0x04>;
+ dmas = <0x2b 0x02 0x2b 0x03>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x4f 0x50>;
+ status = "okay";
+ phandle = <0xdc>;
+ };
+
+ serial@ff160000 {
+ compatible = "rockchip,px30-uart\0snps,dw-apb-uart";
+ reg = <0x00 0xff160000 0x00 0x100>;
+ interrupts = <0x00 0x11 0x04>;
+ clocks = <0x02 0x19 0x02 0x14a>;
+ clock-names = "baudclk\0apb_pclk";
+ reg-shift = <0x02>;
+ reg-io-width = <0x04>;
+ dmas = <0x2b 0x04 0x2b 0x05>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x51>;
+ status = "disabled";
+ phandle = <0xdd>;
+ };
+
+ serial@ff168000 {
+ compatible = "rockchip,px30-uart\0snps,dw-apb-uart";
+ reg = <0x00 0xff168000 0x00 0x100>;
+ interrupts = <0x00 0x12 0x04>;
+ clocks = <0x02 0x1a 0x02 0x14b>;
+ clock-names = "baudclk\0apb_pclk";
+ reg-shift = <0x02>;
+ reg-io-width = <0x04>;
+ dmas = <0x2b 0x06 0x2b 0x07>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x52 0x53 0x54>;
+ status = "disabled";
+ phandle = <0xde>;
+ };
+
+ serial@ff170000 {
+ compatible = "rockchip,px30-uart\0snps,dw-apb-uart";
+ reg = <0x00 0xff170000 0x00 0x100>;
+ interrupts = <0x00 0x13 0x04>;
+ clocks = <0x02 0x1b 0x02 0x14c>;
+ clock-names = "baudclk\0apb_pclk";
+ reg-shift = <0x02>;
+ reg-io-width = <0x04>;
+ dmas = <0x2b 0x08 0x2b 0x09>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x55 0x56 0x57>;
+ status = "disabled";
+ phandle = <0xdf>;
+ };
+
+ serial@ff178000 {
+ compatible = "rockchip,px30-uart\0snps,dw-apb-uart";
+ reg = <0x00 0xff178000 0x00 0x100>;
+ interrupts = <0x00 0x14 0x04>;
+ clocks = <0x02 0x1c 0x02 0x14d>;
+ clock-names = "baudclk\0apb_pclk";
+ reg-shift = <0x02>;
+ reg-io-width = <0x04>;
+ dmas = <0x2b 0x0a 0x2b 0x0b>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x58 0x59 0x5a>;
+ status = "disabled";
+ phandle = <0xe0>;
+ };
+
+ i2c@ff180000 {
+ compatible = "rockchip,rk3399-i2c";
+ reg = <0x00 0xff180000 0x00 0x1000>;
+ clocks = <0x02 0x1d 0x02 0x14e>;
+ clock-names = "i2c\0pclk";
+ interrupts = <0x00 0x07 0x04>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x5b>;
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+ status = "okay";
+ clock-frequency = <0x61a80>;
+ i2c-scl-rising-time-ns = <0x118>;
+ i2c-scl-falling-time-ns = <0x10>;
+ phandle = <0xe1>;
+
+ pmic@20 {
+ compatible = "rockchip,rk817";
+ reg = <0x20>;
+ interrupt-parent = <0x5c>;
+ interrupts = <0x0a 0x08>;
+ pinctrl-names = "default\0pmic-sleep\0pmic-power-off\0pmic-reset";
+ pinctrl-0 = <0x5d>;
+ pinctrl-1 = <0x5e 0x5f>;
+ pinctrl-2 = <0x60 0x61>;
+ pinctrl-3 = <0x62 0x63>;
+ rockchip,system-power-controller;
+ wakeup-source;
+ #clock-cells = <0x01>;
+ clock-output-names = "rk808-clkout1\0rk808-clkout2";
+ pmic-reset-func = <0x01>;
+ vcc1-supply = <0x64>;
+ vcc2-supply = <0x64>;
+ vcc3-supply = <0x64>;
+ vcc4-supply = <0x64>;
+ vcc5-supply = <0x64>;
+ vcc6-supply = <0x64>;
+ vcc7-supply = <0x64>;
+ vcc8-supply = <0x64>;
+ vcc9-supply = <0x65>;
+ phandle = <0xe2>;
+
+ pwrkey {
+ status = "okay";
+ };
+
+ pinctrl_rk8xx {
+ gpio-controller;
+ #gpio-cells = <0x02>;
+ phandle = <0xe3>;
+
+ rk817_ts_gpio1 {
+ pins = "gpio_ts";
+ function = "pin_fun1";
+ phandle = <0xe4>;
+ };
+
+ rk817_gt_gpio2 {
+ pins = "gpio_gt";
+ function = "pin_fun1";
+ phandle = <0xe5>;
+ };
+
+ rk817_pin_ts {
+ pins = "gpio_ts";
+ function = "pin_fun0";
+ phandle = <0xe6>;
+ };
+
+ rk817_pin_gt {
+ pins = "gpio_gt";
+ function = "pin_fun0";
+ phandle = <0xe7>;
+ };
+
+ rk817_slppin_null {
+ pins = "gpio_slp";
+ function = "pin_fun0";
+ phandle = <0xe8>;
+ };
+
+ rk817_slppin_slp {
+ pins = "gpio_slp";
+ function = "pin_fun1";
+ phandle = <0x5f>;
+ };
+
+ rk817_slppin_pwrdn {
+ pins = "gpio_slp";
+ function = "pin_fun2";
+ phandle = <0x61>;
+ };
+
+ rk817_slppin_rst {
+ pins = "gpio_slp";
+ function = "pin_fun3";
+ phandle = <0x63>;
+ };
+ };
+
+ regulators {
+
+ DCDC_REG1 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <0xe7ef0>;
+ regulator-max-microvolt = <0x118c30>;
+ regulator-ramp-delay = <0x1771>;
+ regulator-initial-mode = <0x02>;
+ regulator-name = "vdd_logic";
+ phandle = <0x0e>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <0xe7ef0>;
+ };
+ };
+
+ DCDC_REG2 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <0xe7ef0>;
+ regulator-max-microvolt = <0x149970>;
+ regulator-ramp-delay = <0x1771>;
+ regulator-initial-mode = <0x02>;
+ regulator-name = "vdd_arm";
+ phandle = <0x06>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <0xe7ef0>;
+ };
+ };
+
+ DCDC_REG3 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-initial-mode = <0x02>;
+ regulator-name = "vcc_ddr";
+ phandle = <0xe9>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ };
+ };
+
+ DCDC_REG4 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <0x325aa0>;
+ regulator-max-microvolt = <0x325aa0>;
+ regulator-initial-mode = <0x02>;
+ regulator-name = "vcc_3v3";
+ phandle = <0x4b>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <0x325aa0>;
+ };
+ };
+
+ LDO_REG1 {
+ regulator-min-microvolt = <0xf4240>;
+ regulator-max-microvolt = <0xf4240>;
+ regulator-name = "vcc_1v0";
+ phandle = <0xea>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <0xf4240>;
+ };
+ };
+
+ LDO_REG2 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <0x1b7740>;
+ regulator-max-microvolt = <0x1b7740>;
+ regulator-name = "vcc1v8_soc";
+ phandle = <0x88>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <0x1b7740>;
+ };
+ };
+
+ LDO_REG3 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <0xf4240>;
+ regulator-max-microvolt = <0xf4240>;
+ regulator-name = "vcc1v0_soc";
+ phandle = <0xeb>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <0xf4240>;
+ };
+ };
+
+ LDO_REG4 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <0x325aa0>;
+ regulator-max-microvolt = <0x325aa0>;
+ regulator-name = "vcc3v3_pmu";
+ phandle = <0x29>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <0x325aa0>;
+ };
+ };
+
+ LDO_REG5 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <0x1b7740>;
+ regulator-max-microvolt = <0x1b7740>;
+ regulator-name = "vccio_sd";
+ phandle = <0x4a>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <0x1b7740>;
+ };
+ };
+
+ LDO_REG6 {
+ regulator-min-microvolt = <0x1b7740>;
+ regulator-max-microvolt = <0x2dc6c0>;
+ regulator-boot-on;
+ regulator-name = "vcc_sd";
+ phandle = <0x93>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <0x2dc6c0>;
+ };
+ };
+
+ LDO_REG7 {
+ regulator-min-microvolt = <0x325aa0>;
+ regulator-max-microvolt = <0x325aa0>;
+ regulator-name = "vcc_backlight";
+ phandle = <0x9e>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <0x325aa0>;
+ };
+ };
+
+ LDO_REG8 {
+ regulator-min-microvolt = <0x2ab980>;
+ regulator-max-microvolt = <0x2ab980>;
+ regulator-name = "vcc_lcd";
+ phandle = <0x9f>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <0x2ab980>;
+ };
+ };
+
+ BOOST {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <0x4c4b40>;
+ regulator-max-microvolt = <0x5265c0>;
+ regulator-name = "boost";
+ phandle = <0x65>;
+ };
+
+ OTG_SWITCH {
+ regulator-boot-on;
+ regulator-name = "otg_switch";
+ phandle = <0xec>;
+ };
+ };
+
+ battery {
+ compatible = "rk817,battery";
+ ocv_table = <0xc5d 0xc94 0xcd0 0xd02 0xd34 0xd66 0xd98 0xdca 0xdfc 0xe2e 0xe56 0xe7e 0xea6 0xece 0xef6 0xf1e 0xf46 0xf6e 0xf96 0xf9b 0xfa0>;
+ design_capacity = <0xd34>;
+ design_qmax = <0xe86>;
+ bat_res = <0x64>;
+ sleep_enter_current = <0x12c>;
+ sleep_exit_current = <0x12c>;
+ sleep_filter_current = <0x64>;
+ power_off_thresd = <0xbb8>;
+ zero_algorithm_vol = <0xf0a>;
+ max_soc_offset = <0x3c>;
+ monitor_sec = <0x05>;
+ virtual_power = <0x00>;
+ sample_res = <0x0a>;
+ };
+
+ charger {
+ compatible = "rk817,charger";
+ min_input_voltage = <0x1194>;
+ max_input_current = <0x5dc>;
+ max_chrg_current = <0x7d0>;
+ max_chrg_voltage = <0x1068>;
+ chrg_term_mode = <0x00>;
+ chrg_finish_cur = <0x34>;
+ virtual_power = <0x00>;
+ sample_res = <0x0a>;
+ dc_det_gpio = <0x5c 0x0b 0x00>;
+ bat_low_gpio = <0x66 0x0d 0x00>;
+ extcon = <0x67>;
+ };
+
+ codec {
+ #sound-dai-cells = <0x00>;
+ compatible = "rockchip,rk817-codec";
+ clocks = <0x02 0x15>;
+ clock-names = "mclk";
+ pinctrl-names = "default";
+ pinctrl-0 = <0x68>;
+ hp-volume = <0x14>;
+ spk-volume = <0x03>;
+ status = "okay";
+ phandle = <0xc3>;
+ };
+ };
+ };
+
+ i2c@ff190000 {
+ compatible = "rockchip,rk3399-i2c";
+ reg = <0x00 0xff190000 0x00 0x1000>;
+ clocks = <0x02 0x1e 0x02 0x14f>;
+ clock-names = "i2c\0pclk";
+ interrupts = <0x00 0x08 0x04>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x69>;
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+ status = "okay";
+ clock-frequency = <0x61a80>;
+ phandle = <0xed>;
+ };
+
+ i2c@ff1a0000 {
+ compatible = "rockchip,rk3399-i2c";
+ reg = <0x00 0xff1a0000 0x00 0x1000>;
+ clocks = <0x02 0x1f 0x02 0x150>;
+ clock-names = "i2c\0pclk";
+ interrupts = <0x00 0x09 0x04>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x6a>;
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+ status = "disabled";
+ phandle = <0xee>;
+ };
+
+ i2c@ff1b0000 {
+ compatible = "rockchip,rk3399-i2c";
+ reg = <0x00 0xff1b0000 0x00 0x1000>;
+ clocks = <0x02 0x20 0x02 0x151>;
+ clock-names = "i2c\0pclk";
+ interrupts = <0x00 0x0a 0x04>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x6b>;
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+ status = "disabled";
+ phandle = <0xef>;
+ };
+
+ spi@ff1d0000 {
+ compatible = "rockchip,px30-spi\0rockchip,rk3066-spi";
+ reg = <0x00 0xff1d0000 0x00 0x1000>;
+ interrupts = <0x00 0x1a 0x04>;
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+ clocks = <0x02 0x24 0x02 0x155>;
+ clock-names = "spiclk\0apb_pclk";
+ dmas = <0x2b 0x0c 0x2b 0x0d>;
+ dma-names = "tx\0rx";
+ pinctrl-names = "default\0high_speed";
+ pinctrl-0 = <0x6c 0x6d 0x6e 0x6f>;
+ pinctrl-1 = <0x70 0x6d 0x71 0x72>;
+ status = "disabled";
+ phandle = <0xf0>;
+ };
+
+ spi@ff1d8000 {
+ compatible = "rockchip,px30-spi\0rockchip,rk3066-spi";
+ reg = <0x00 0xff1d8000 0x00 0x1000>;
+ interrupts = <0x00 0x1b 0x04>;
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+ clocks = <0x02 0x25 0x02 0x156>;
+ clock-names = "spiclk\0apb_pclk";
+ dmas = <0x2b 0x0e 0x2b 0x0f>;
+ dma-names = "tx\0rx";
+ pinctrl-names = "default\0high_speed";
+ pinctrl-0 = <0x73 0x74 0x75 0x76 0x77>;
+ pinctrl-1 = <0x78 0x74 0x75 0x79 0x7a>;
+ status = "disabled";
+ phandle = <0xf1>;
+ };
+
+ watchdog@ff1e0000 {
+ compatible = "snps,dw-wdt";
+ reg = <0x00 0xff1e0000 0x00 0x100>;
+ clocks = <0x02 0x15b>;
+ interrupts = <0x00 0x25 0x04>;
+ resets = <0x02 0xb5>;
+ reset-names = "reset";
+ status = "disabled";
+ phandle = <0xf2>;
+ };
+
+ pwm@ff200000 {
+ compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm";
+ reg = <0x00 0xff200000 0x00 0x10>;
+ #pwm-cells = <0x03>;
+ pinctrl-names = "active";
+ pinctrl-0 = <0x7b>;
+ clocks = <0x02 0x22 0x02 0x153>;
+ clock-names = "pwm\0pclk";
+ status = "okay";
+ phandle = <0xbc>;
+ };
+
+ pwm@ff200010 {
+ compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm";
+ reg = <0x00 0xff200010 0x00 0x10>;
+ #pwm-cells = <0x03>;
+ pinctrl-names = "active";
+ pinctrl-0 = <0x7c>;
+ clocks = <0x02 0x22 0x02 0x153>;
+ clock-names = "pwm\0pclk";
+ status = "okay";
+ phandle = <0xc1>;
+ };
+
+ pwm@ff200020 {
+ compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm";
+ reg = <0x00 0xff200020 0x00 0x10>;
+ #pwm-cells = <0x03>;
+ pinctrl-names = "active";
+ pinctrl-0 = <0x7d>;
+ clocks = <0x02 0x22 0x02 0x153>;
+ clock-names = "pwm\0pclk";
+ status = "disabled";
+ phandle = <0xf3>;
+ };
+
+ pwm@ff200030 {
+ compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm";
+ reg = <0x00 0xff200030 0x00 0x10>;
+ #pwm-cells = <0x03>;
+ pinctrl-names = "active";
+ pinctrl-0 = <0x7e>;
+ clocks = <0x02 0x22 0x02 0x153>;
+ clock-names = "pwm\0pclk";
+ status = "disabled";
+ phandle = <0xf4>;
+ };
+
+ pwm@ff208000 {
+ compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm";
+ reg = <0x00 0xff208000 0x00 0x10>;
+ #pwm-cells = <0x03>;
+ pinctrl-names = "active";
+ pinctrl-0 = <0x7f>;
+ clocks = <0x02 0x23 0x02 0x154>;
+ clock-names = "pwm\0pclk";
+ status = "disabled";
+ phandle = <0xf5>;
+ };
+
+ pwm@ff208010 {
+ compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm";
+ reg = <0x00 0xff208010 0x00 0x10>;
+ #pwm-cells = <0x03>;
+ pinctrl-names = "active";
+ pinctrl-0 = <0x80>;
+ clocks = <0x02 0x23 0x02 0x154>;
+ clock-names = "pwm\0pclk";
+ status = "disabled";
+ phandle = <0xf6>;
+ };
+
+ pwm@ff208020 {
+ compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm";
+ reg = <0x00 0xff208020 0x00 0x10>;
+ #pwm-cells = <0x03>;
+ pinctrl-names = "active";
+ pinctrl-0 = <0x81>;
+ clocks = <0x02 0x23 0x02 0x154>;
+ clock-names = "pwm\0pclk";
+ status = "disabled";
+ phandle = <0xf7>;
+ };
+
+ pwm@ff208030 {
+ compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm";
+ reg = <0x00 0xff208030 0x00 0x10>;
+ #pwm-cells = <0x03>;
+ pinctrl-names = "active";
+ pinctrl-0 = <0x82>;
+ clocks = <0x02 0x23 0x02 0x154>;
+ clock-names = "pwm\0pclk";
+ status = "disabled";
+ phandle = <0xf8>;
+ };
+
+ rktimer@ff210000 {
+ compatible = "rockchip,rk3288-timer";
+ reg = <0x00 0xff210000 0x00 0x1000>;
+ interrupts = <0x00 0x1e 0x04>;
+ clocks = <0x02 0x159 0x02 0x26>;
+ clock-names = "pclk\0timer";
+ phandle = <0xf9>;
+ };
+
+ amba {
+ compatible = "simple-bus";
+ #address-cells = <0x02>;
+ #size-cells = <0x02>;
+ ranges;
+
+ dmac@ff240000 {
+ compatible = "arm,pl330\0arm,primecell";
+ reg = <0x00 0xff240000 0x00 0x4000>;
+ interrupts = <0x00 0x01 0x04 0x00 0x02 0x04>;
+ clocks = <0x02 0xbb>;
+ clock-names = "apb_pclk";
+ #dma-cells = <0x01>;
+ peripherals-req-type-burst;
+ phandle = <0x2b>;
+ };
+ };
+
+ thermal-zones {
+ phandle = <0xfa>;
+
+ soc-thermal {
+ polling-delay-passive = <0x14>;
+ polling-delay = <0x3e8>;
+ sustainable-power = <0x2ee>;
+ thermal-sensors = <0x83 0x00>;
+ phandle = <0xfb>;
+
+ trips {
+
+ trip-point-0 {
+ temperature = <0x11170>;
+ hysteresis = <0x7d0>;
+ type = "passive";
+ phandle = <0xfc>;
+ };
+
+ trip-point-1 {
+ temperature = <0x14c08>;
+ hysteresis = <0x7d0>;
+ type = "passive";
+ phandle = <0x84>;
+ };
+
+ soc-crit {
+ temperature = <0x1c138>;
+ hysteresis = <0x7d0>;
+ type = "critical";
+ phandle = <0xfd>;
+ };
+ };
+
+ cooling-maps {
+
+ map0 {
+ trip = <0x84>;
+ cooling-device = <0x09 0xffffffff 0xffffffff>;
+ contribution = <0x1000>;
+ };
+
+ map1 {
+ trip = <0x84>;
+ cooling-device = <0x85 0xffffffff 0xffffffff>;
+ contribution = <0x1000>;
+ };
+ };
+ };
+
+ gpu-thermal {
+ polling-delay-passive = <0x64>;
+ polling-delay = <0x3e8>;
+ thermal-sensors = <0x83 0x01>;
+ phandle = <0xfe>;
+ };
+ };
+
+ tsadc@ff280000 {
+ compatible = "rockchip,px30-tsadc";
+ reg = <0x00 0xff280000 0x00 0x100>;
+ interrupts = <0x00 0x24 0x04>;
+ rockchip,grf = <0x2f>;
+ clocks = <0x02 0x2c 0x02 0x158>;
+ clock-names = "tsadc\0apb_pclk";
+ assigned-clocks = <0x02 0x2c>;
+ assigned-clock-rates = <0xc350>;
+ resets = <0x02 0xa8>;
+ reset-names = "tsadc-apb";
+ #thermal-sensor-cells = <0x01>;
+ rockchip,hw-tshut-temp = <0x1d4c0>;
+ status = "okay";
+ pinctrl-names = "gpio\0otpout";
+ pinctrl-0 = <0x86>;
+ pinctrl-1 = <0x87>;
+ phandle = <0x83>;
+ };
+
+ saradc@ff288000 {
+ compatible = "rockchip,px30-saradc\0rockchip,rk3399-saradc";
+ reg = <0x00 0xff288000 0x00 0x100>;
+ interrupts = <0x00 0x54 0x04>;
+ #io-channel-cells = <0x01>;
+ clocks = <0x02 0x2d 0x02 0x157>;
+ clock-names = "saradc\0apb_pclk";
+ resets = <0x02 0xa5>;
+ reset-names = "saradc-apb";
+ status = "okay";
+ vref-supply = <0x88>;
+ phandle = <0xbe>;
+ };
+
+ otp@ff290000 {
+ compatible = "rockchip,px30-otp";
+ reg = <0x00 0xff290000 0x00 0x4000>;
+ #address-cells = <0x01>;
+ #size-cells = <0x01>;
+ clocks = <0x02 0x2f 0x02 0x15a 0x02 0x161>;
+ clock-names = "clk_otp\0pclk_otp\0pclk_otp_phy";
+ resets = <0x02 0xb4>;
+ reset-names = "otp_phy";
+ phandle = <0xff>;
+
+ id@7 {
+ reg = <0x07 0x10>;
+ phandle = <0x0f>;
+ };
+
+ cpu-leakage@17 {
+ reg = <0x17 0x01>;
+ phandle = <0x07>;
+ };
+
+ performance@1e {
+ reg = <0x1e 0x01>;
+ bits = <0x04 0x03>;
+ phandle = <0x08>;
+ };
+ };
+
+ clock-controller@ff2b0000 {
+ compatible = "rockchip,px30-cru";
+ reg = <0x00 0xff2b0000 0x00 0x1000>;
+ rockchip,grf = <0x2f>;
+ rockchip,boost = <0x89>;
+ #clock-cells = <0x01>;
+ #reset-cells = <0x01>;
+ assigned-clocks = <0x02 0x04>;
+ assigned-clock-rates = <0x3dfd2400>;
+ phandle = <0x02>;
+ };
+
+ cpu-boost@ff2b8000 {
+ compatible = "syscon";
+ reg = <0x00 0xff2b8000 0x00 0x1000>;
+ rockchip,boost-low-con0 = <0x1032>;
+ rockchip,boost-low-con1 = <0x1441>;
+ rockchip,boost-high-con0 = <0x1036>;
+ rockchip,boost-high-con1 = <0x1441>;
+ rockchip,boost-backup-pll = <0x01>;
+ rockchip,boost-backup-pll-usage = <0x00>;
+ rockchip,boost-switch-threshold = <0x249f00>;
+ rockchip,boost-statis-threshold = <0x100>;
+ rockchip,boost-statis-enable = <0x00>;
+ rockchip,boost-enable = <0x00>;
+ phandle = <0x89>;
+ };
+
+ pmu-clock-controller@ff2bc000 {
+ compatible = "rockchip,px30-pmucru";
+ reg = <0x00 0xff2bc000 0x00 0x1000>;
+ rockchip,grf = <0x2f>;
+ #clock-cells = <0x01>;
+ #reset-cells = <0x01>;
+ assigned-clocks = <0x2a 0x01 0x2a 0x08 0x2a 0x05 0x02 0x07 0x02 0xab 0x02 0xb0 0x02 0xf0 0x02 0xf5 0x02 0x140 0x02 0x49>;
+ assigned-clock-rates = <0x47868c00 0x5f5e100 0x18cba80 0x23c34600 0xbebc200 0xbebc200 0x8f0d180 0x8f0d180 0x5f5e100 0xbebc200>;
+ phandle = <0x2a>;
+ };
+
+ syscon@ff2c0000 {
+ compatible = "rockchip,px30-usb2phy-grf\0syscon\0simple-mfd";
+ reg = <0x00 0xff2c0000 0x00 0x10000>;
+ #address-cells = <0x01>;
+ #size-cells = <0x01>;
+ phandle = <0x100>;
+
+ usb2-phy@100 {
+ compatible = "rockchip,px30-usb2phy\0rockchip,rk3328-usb2phy";
+ reg = <0x100 0x10>;
+ clocks = <0x2a 0x0a>;
+ clock-names = "phyclk";
+ #clock-cells = <0x00>;
+ assigned-clocks = <0x02 0x0e 0x02 0x55>;
+ assigned-clock-parents = <0x67 0x02 0x0e>;
+ clock-output-names = "usb480m_phy";
+ status = "okay";
+ phandle = <0x67>;
+
+ host-port {
+ #phy-cells = <0x00>;
+ interrupts = <0x00 0x44 0x04>;
+ interrupt-names = "linestate";
+ status = "okay";
+ phandle = <0x8c>;
+ };
+
+ otg-port {
+ #phy-cells = <0x00>;
+ interrupts = <0x00 0x42 0x04 0x00 0x41 0x04 0x00 0x40 0x04>;
+ interrupt-names = "otg-bvalid\0otg-id\0linestate";
+ status = "disabled";
+ phandle = <0x8b>;
+ };
+ };
+ };
+
+ video-phy@ff2e0000 {
+ compatible = "rockchip,px30-video-phy";
+ reg = <0x00 0xff2e0000 0x00 0x10000 0x00 0xff450000 0x00 0x10000>;
+ clocks = <0x2a 0x0b 0x02 0x145 0x02 0x144>;
+ clock-names = "ref\0pclk_phy\0pclk_host";
+ #clock-cells = <0x00>;
+ resets = <0x02 0x3e>;
+ reset-names = "rst";
+ power-domains = <0x8a 0x0c>;
+ #phy-cells = <0x00>;
+ status = "okay";
+ phandle = <0x4c>;
+ };
+
+ mipi-dphy-rx0@ff2f0000 {
+ compatible = "rockchip,rk3326-mipi-dphy";
+ reg = <0x00 0xff2f0000 0x00 0x4000>;
+ clocks = <0x02 0x146>;
+ clock-names = "dphy-ref";
+ power-domains = <0x8a 0x0d>;
+ rockchip,grf = <0x2f>;
+ status = "okay";
+ phandle = <0x101>;
+ };
+
+ usb@ff300000 {
+ compatible = "rockchip,px30-usb\0rockchip,rk3066-usb\0snps,dwc2";
+ reg = <0x00 0xff300000 0x00 0x40000>;
+ interrupts = <0x00 0x3e 0x04>;
+ clocks = <0x02 0x102>;
+ clock-names = "otg";
+ power-domains = <0x8a 0x05>;
+ dr_mode = "otg";
+ g-np-tx-fifo-size = <0x10>;
+ g-rx-fifo-size = <0x118>;
+ g-tx-fifo-size = <0x100 0x80 0x80 0x40 0x20 0x10>;
+ g-use-dma;
+ phys = <0x8b>;
+ phy-names = "usb2-phy";
+ status = "okay";
+ phandle = <0x102>;
+ };
+
+ usb@ff340000 {
+ compatible = "generic-ehci";
+ reg = <0x00 0xff340000 0x00 0x10000>;
+ interrupts = <0x00 0x3c 0x04>;
+ clocks = <0x02 0x103 0x67>;
+ clock-names = "usbhost\0utmi";
+ power-domains = <0x8a 0x05>;
+ phys = <0x8c>;
+ phy-names = "usb";
+ status = "disabled";
+ phandle = <0x103>;
+ };
+
+ usb@ff350000 {
+ compatible = "generic-ohci";
+ reg = <0x00 0xff350000 0x00 0x10000>;
+ interrupts = <0x00 0x3d 0x04>;
+ clocks = <0x02 0x103 0x67>;
+ clock-names = "usbhost\0utmi";
+ power-domains = <0x8a 0x05>;
+ phys = <0x8c>;
+ phy-names = "usb";
+ status = "disabled";
+ phandle = <0x104>;
+ };
+
+ ethernet@ff360000 {
+ compatible = "rockchip,px30-gmac";
+ reg = <0x00 0xff360000 0x00 0x10000>;
+ rockchip,grf = <0x2f>;
+ interrupts = <0x00 0x2b 0x04>;
+ interrupt-names = "macirq";
+ clocks = <0x02 0x3e 0x02 0x3f 0x02 0x3f 0x02 0x40 0x02 0x41 0x02 0xb2 0x02 0x143 0x02 0x4c>;
+ clock-names = "stmmaceth\0mac_clk_rx\0mac_clk_tx\0clk_mac_ref\0clk_mac_refout\0aclk_mac\0pclk_mac\0clk_mac_speed";
+ phy-mode = "rmii";
+ pinctrl-names = "default";
+ pinctrl-0 = <0x8d 0x8e>;
+ resets = <0x02 0x5e>;
+ reset-names = "stmmaceth";
+ power-domains = <0x8a 0x09>;
+ status = "disabled";
+ phandle = <0x105>;
+ };
+
+ dwmmc@ff370000 {
+ compatible = "rockchip,px30-dw-mshc\0rockchip,rk3288-dw-mshc";
+ reg = <0x00 0xff370000 0x00 0x4000>;
+ max-frequency = <0x8f0d180>;
+ clocks = <0x02 0xf7 0x02 0x3b 0x02 0x43 0x02 0x44>;
+ clock-names = "biu\0ciu\0ciu-drv\0ciu-sample";
+ assigned-clocks = <0x02 0x3b>;
+ assigned-clock-parents = <0x02 0x57>;
+ power-domains = <0x8a 0x07>;
+ fifo-depth = <0x100>;
+ interrupts = <0x00 0x36 0x04>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x8f 0x90 0x91 0x92>;
+ status = "okay";
+ bus-width = <0x04>;
+ cap-mmc-highspeed;
+ cap-sd-highspeed;
+ supports-sd;
+ card-detect-delay = <0x320>;
+ ignore-pm-notify;
+ cd-gpios = <0x5c 0x03 0x01>;
+ sd-uhs-sdr12;
+ sd-uhs-sdr25;
+ sd-uhs-sdr50;
+ sd-uhs-sdr104;
+ vqmmc-supply = <0x4a>;
+ vmmc-supply = <0x93>;
+ phandle = <0x106>;
+ };
+
+ dwmmc@ff380000 {
+ compatible = "rockchip,px30-dw-mshc\0rockchip,rk3288-dw-mshc";
+ reg = <0x00 0xff380000 0x00 0x4000>;
+ max-frequency = <0x8f0d180>;
+ clocks = <0x02 0xff 0x02 0x38 0x02 0x45 0x02 0x46>;
+ clock-names = "biu\0ciu\0ciu-drv\0ciu-sample";
+ assigned-clocks = <0x02 0x38>;
+ assigned-clock-parents = <0x02 0x51>;
+ power-domains = <0x8a 0x0a>;
+ fifo-depth = <0x100>;
+ interrupts = <0x00 0x37 0x04>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x94 0x95 0x96>;
+ status = "okay";
+ bus-width = <0x04>;
+ cap-mmc-highspeed;
+ cap-sd-highspeed;
+ supports-sd;
+ card-detect-delay = <0x320>;
+ ignore-pm-notify;
+ cd-gpios = <0x97 0x0e 0x01>;
+ sd-uhs-sdr12;
+ sd-uhs-sdr25;
+ sd-uhs-sdr50;
+ sd-uhs-sdr104;
+ vqmmc-supply = <0x4a>;
+ vmmc-supply = <0x93>;
+ phandle = <0x107>;
+ };
+
+ dwmmc@ff390000 {
+ compatible = "rockchip,px30-dw-mshc\0rockchip,rk3288-dw-mshc";
+ reg = <0x00 0xff390000 0x00 0x4000>;
+ max-frequency = <0x8f0d180>;
+ clocks = <0x02 0x100 0x02 0x39 0x02 0x47 0x02 0x48>;
+ clock-names = "biu\0ciu\0ciu-drv\0ciu-sample";
+ assigned-clocks = <0x02 0x39>;
+ assigned-clock-parents = <0x02 0x53>;
+ power-domains = <0x8a 0x0a>;
+ fifo-depth = <0x100>;
+ interrupts = <0x00 0x35 0x04>;
+ status = "disabled";
+ phandle = <0x108>;
+ };
+
+ nandc@ff3b0000 {
+ compatible = "rockchip,rk-nandc";
+ reg = <0x00 0xff3b0000 0x00 0x4000>;
+ interrupts = <0x00 0x39 0x04>;
+ nandc_id = <0x00>;
+ clocks = <0x02 0x37 0x02 0xfe>;
+ clock-names = "clk_nandc\0hclk_nandc";
+ assigned-clocks = <0x02 0x37>;
+ assigned-clock-parents = <0x02 0x4f>;
+ power-domains = <0x8a 0x0a>;
+ status = "disabled";
+ phandle = <0x109>;
+ };
+
+ sfc@ff3a0000 {
+ compatible = "rockchip,sfc";
+ reg = <0x00 0xff3a0000 0x00 0x4000>;
+ interrupts = <0x00 0x38 0x04>;
+ clocks = <0x02 0x3a 0x02 0x101>;
+ clock-names = "clk_sfc\0hclk_sfc";
+ assigned-clocks = <0x02 0x3a>;
+ assigned-clock-rates = <0x989680>;
+ status = "disabled";
+ phandle = <0x10a>;
+ };
+
+ gpu@ff400000 {
+ compatible = "arm,malit602\0arm,malit60x\0arm,malit6xx\0arm,mali-midgard";
+ reg = <0x00 0xff400000 0x00 0x4000>;
+ interrupts = <0x00 0x2d 0x04 0x00 0x2e 0x04 0x00 0x2f 0x04>;
+ interrupt-names = "GPU\0MMU\0JOB";
+ clocks = <0x02 0x49>;
+ clock-names = "clk_mali";
+ power-domains = <0x8a 0x0e>;
+ #cooling-cells = <0x02>;
+ operating-points-v2 = <0x98>;
+ status = "okay";
+ mali-supply = <0x0e>;
+ phandle = <0x85>;
+
+ power_model {
+ compatible = "arm,mali-simple-power-model";
+ static-coefficient = <0x64578>;
+ dynamic-coefficient = <0x2dd>;
+ ts = <0x7d00 0x125c 0xffffffb0 0x02>;
+ thermal-zone = "gpu-thermal";
+ };
+ };
+
+ gpu-opp-table {
+ compatible = "operating-points-v2";
+ rockchip,thermal-zone = "soc-thermal";
+ rockchip,temp-hysteresis = <0x1388>;
+ rockchip,low-temp = <0x00>;
+ rockchip,low-temp-min-volt = <0xf4240>;
+ rockchip,low-temp-adjust-volt = <0x00 0x1e0 0xc350>;
+ rockchip,max-volt = <0x11edd8>;
+ rockchip,evb-irdrop = <0x61a8>;
+ rockchip,pvtm-voltage-sel = <0x00 0xc350 0x00 0xc351 0xd2f0 0x01 0xd2f1 0xea60 0x02 0xea61 0x1869f 0x03>;
+ rockchip,pvtm-ch = <0x00 0x00>;
+ phandle = <0x98>;
+
+ opp-400000000 {
+ opp-hz = <0x00 0x17d78400>;
+ opp-microvolt = <0x100590>;
+ opp-microvolt-L0 = <0x100590>;
+ opp-microvolt-L1 = <0xfa3e8>;
+ opp-microvolt-L2 = <0xee098>;
+ opp-microvolt-L3 = <0xe7ef0>;
+ };
+
+ opp-480000000 {
+ opp-hz = <0x00 0x1c9c3800>;
+ opp-microvolt = <0x112a88>;
+ opp-microvolt-L0 = <0x112a88>;
+ opp-microvolt-L1 = <0x10c8e0>;
+ opp-microvolt-L2 = <0x100590>;
+ opp-microvolt-L3 = <0xf4240>;
+ };
+
+ opp-520000000 {
+ opp-hz = <0x00 0x1efe9200>;
+ opp-microvolt = <0x118c30>;
+ opp-microvolt-L0 = <0x118c30>;
+ opp-microvolt-L1 = <0x118c30>;
+ opp-microvolt-L2 = <0x10c8e0>;
+ opp-microvolt-L3 = <0x100590>;
+ };
+ };
+
+ hevc_service@ff440000 {
+ compatible = "rockchip,hevc_sub";
+ iommu_enabled = <0x01>;
+ reg = <0x00 0xff440000 0x00 0x400>;
+ interrupts = <0x00 0x31 0x04>;
+ interrupt-names = "irq_dec";
+ dev_mode = <0x01>;
+ iommus = <0x99>;
+ allocator = <0x01>;
+ phandle = <0x9c>;
+ };
+
+ vpu_service@ff442000 {
+ compatible = "rockchip,vpu_sub";
+ iommu_enabled = <0x01>;
+ reg = <0x00 0xff442000 0x00 0x800>;
+ interrupts = <0x00 0x50 0x04 0x00 0x4f 0x04>;
+ interrupt-names = "irq_enc\0irq_dec";
+ dev_mode = <0x00>;
+ iommus = <0x9a>;
+ allocator = <0x01>;
+ phandle = <0x9b>;
+ };
+
+ vpu_combo {
+ compatible = "rockchip,vpu_combo";
+ subcnt = <0x02>;
+ rockchip,grf = <0x2f>;
+ rockchip,sub = <0x9b 0x9c>;
+ clocks = <0x02 0xaf 0x02 0xf4 0x02 0x4b>;
+ clock-names = "aclk_vcodec\0hclk_vcodec\0clk_core";
+ resets = <0x02 0x24 0x02 0x26 0x02 0x25 0x02 0x27 0x02 0x3f>;
+ reset-names = "video_a\0video_h\0niu_a\0niu_h\0video_core";
+ power-domains = <0x8a 0x0b>;
+ mode_bit = <0x0f>;
+ mode_ctrl = <0x410>;
+ status = "okay";
+ phandle = <0x10b>;
+ };
+
+ iommu@ff440440 {
+ compatible = "rockchip,iommu";
+ reg = <0x00 0xff440440 0x00 0x40 0x00 0xff440480 0x00 0x40>;
+ interrupts = <0x00 0x32 0x04>;
+ interrupt-names = "hevc_mmu";
+ clocks = <0x02 0xaf 0x02 0xf4>;
+ clock-names = "aclk\0hclk";
+ power-domains = <0x8a 0x0b>;
+ #iommu-cells = <0x00>;
+ phandle = <0x99>;
+ };
+
+ iommu@ff442800 {
+ compatible = "rockchip,iommu";
+ reg = <0x00 0xff442800 0x00 0x100>;
+ interrupts = <0x00 0x51 0x04>;
+ interrupt-names = "vpu_mmu";
+ clocks = <0x02 0xaf 0x02 0xf4>;
+ clock-names = "aclk\0hclk";
+ power-domains = <0x8a 0x0b>;
+ #iommu-cells = <0x00>;
+ phandle = <0x9a>;
+ };
+
+ dsi@ff450000 {
+ compatible = "rockchip,px30-mipi-dsi";
+ reg = <0x00 0xff450000 0x00 0x10000>;
+ interrupts = <0x00 0x4b 0x04>;
+ clocks = <0x02 0x144 0x4c>;
+ clock-names = "pclk\0hs_clk";
+ resets = <0x02 0x3d>;
+ reset-names = "apb";
+ phys = <0x4c>;
+ phy-names = "mipi_dphy";
+ power-domains = <0x8a 0x0c>;
+ rockchip,grf = <0x2f>;
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+ status = "okay";
+ phandle = <0x10c>;
+
+ ports {
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+
+ port@0 {
+ reg = <0x00>;
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+
+ endpoint@0 {
+ reg = <0x00>;
+ remote-endpoint = <0x13>;
+ status = "okay";
+ phandle = <0xa3>;
+ };
+ };
+ };
+
+ panel@0 {
+ compatible = "elida,kd35t133\0simple-panel-dsi";
+ reg = <0x00>;
+ backlight = <0x9d>;
+ backlight-supply = <0x9e>;
+ power-supply = <0x9f>;
+ reset-gpios = <0x97 0x10 0x01>;
+ reset-delay-ms = <0x96>;
+ init-delay-ms = <0x14>;
+ enable-delay-ms = <0x78>;
+ prepare-delay-ms = <0x14>;
+ unprepare-delay-ms = <0x14>;
+ disable-delay-ms = <0x32>;
+ width-mm = <0x34>;
+ height-mm = <0x46>;
+ dsi,flags = <0xa03>;
+ dsi,format = <0x00>;
+ dsi,lanes = <0x04>;
+ panel-init-sequence = [15 00 02 ff 30 15 00 02 ff 52 15 00 02 ff 01 15 00 02 e3 00 15 00 02 25 10 15 00 02 28 6f 15 00 02 29 01 15 00 02 2a df 15 00 02 2c 22 15 00 02 c3 0f 15 00 02 37 9c 15 00 02 38 a7 15 00 02 39 41 15 00 02 80 20 15 00 02 91 67 15 00 02 92 67 15 00 02 a0 55 15 00 02 a1 50 15 00 02 a3 58 15 00 02 a4 9c 15 00 02 a7 02 15 00 02 a8 01 15 00 02 a9 21 15 00 02 aa fc 15 00 02 ab 28 15 00 02 ac 06 15 00 02 ad 06 15 00 02 ae 06 15 00 02 af 03 15 00 02 b0 08 15 00 02 b1 26 15 00 02 b2 28 15 00 02 b3 28 15 00 02 b4 03 15 00 02 b5 08 15 00 02 b6 26 15 00 02 b7 08 15 00 02 b8 26 15 00 02 2c 22 15 00 02 5c 40 15 00 02 c0 00 15 00 02 c1 00 15 00 02 c2 00 15 00 02 ff 30 15 00 02 ff 52 15 00 02 ff 02 15 00 02 b0 02 15 00 02 d0 02 15 00 02 b1 0f 15 00 02 d1 10 15 00 02 b2 11 15 00 02 d2 12 15 00 02 b3 32 15 00 02 d3 33 15 00 02 b4 36 15 00 02 d4 36 15 00 02 b5 3c 15 00 02 d5 3c 15 00 02 b6 20 15 00 02 d6 20 15 00 02 b7 3e 15 00 02 d7 3e 15 00 02 b8 0e 15 00 02 d8 0d 15 00 02 b9 05 15 00 02 d9 05 15 00 02 ba 11 15 00 02 da 12 15 00 02 bb 11 15 00 02 db 11 15 00 02 bc 13 15 00 02 dc 14 15 00 02 bd 14 15 00 02 dd 14 15 00 02 be 16 15 00 02 de 18 15 00 02 bf 0e 15 00 02 df 0f 15 00 02 c0 17 15 00 02 e0 17 15 00 02 c1 07 15 00 02 e1 08 15 00 02 ff 30 15 00 02 ff 52 15 00 02 ff 03 15 00 02 08 8a 15 00 02 09 8b 15 00 02 30 00 15 00 02 31 00 15 00 02 32 00 15 00 02 33 00 15 00 02 34 61 15 00 02 35 d4 15 00 02 36 24 15 00 02 37 03 15 00 02 40 86 15 00 02 41 87 15 00 02 42 84 15 00 02 43 85 15 00 02 44 11 15 00 02 45 de 15 00 02 46 dd 15 00 02 47 11 15 00 02 48 e0 15 00 02 49 df 15 00 02 50 82 15 00 02 51 83 15 00 02 52 80 15 00 02 53 81 15 00 02 54 11 15 00 02 55 e2 15 00 02 56 e1 15 00 02 57 11 15 00 02 58 e4 15 00 02 59 e3 15 00 02 82 0f 15 00 02 83 0f 15 00 02 84 00 15 00 02 85 0f 15 00 02 86 0f 15 00 02 87 0e 15 00 02 88 0e 15 00 02 89 06 15 00 02 8a 06 15 00 02 8b 07 15 00 02 8c 07 15 00 02 8d 04 15 00 02 8e 04 15 00 02 8f 05 15 00 02 90 05 15 00 02 98 0f 15 00 02 99 0f 15 00 02 9a 00 15 00 02 9b 0f 15 00 02 9c 0f 15 00 02 9d 0e 15 00 02 9e 0e 15 00 02 9f 06 15 00 02 a0 06 15 00 02 a1 07 15 00 02 a2 07 15 00 02 a3 04 15 00 02 a4 04 15 00 02 a5 05 15 00 02 a6 05 15 00 02 e0 02 15 00 02 e1 52 15 00 02 ff 30 15 00 02 ff 52 15 00 02 ff 00 15 00 02 36 02 15 00 02 11 00 15 00 02 29 00 05 c8 01 11 05 14 01 29];
+ panel-exit-sequence = <0x5140128 0x50a0110>;
+
+ display-timings {
+ native-mode = <0xa0>;
+
+ 60Hz {
+ clock-frequency = <0x1ba8140>;
+ hactive = <0x280>;
+ vactive = <0x1e0>;
+ hfront-porch = <0x2e>;
+ hsync-len = <0x02>;
+ hback-porch = <0x2c>;
+ vfront-porch = <0xa5>;
+ vsync-len = <0x02>;
+ vback-porch = <0x0e>;
+ hsync-active = <0x00>;
+ vsync-active = <0x00>;
+ de-active = <0x00>;
+ pixelclk-active = <0x01>;
+ phandle = <0xaa1>;
+ };
+
+ 50Hz {
+ clock-frequency = <0x1ba8140>;
+ hactive = <0x280>;
+ vactive = <0x1e0>;
+ hfront-porch = <0x2e>;
+ hsync-len = <0x02>;
+ hback-porch = <0x2c>;
+ vfront-porch = <0x10>;
+ vsync-len = <0x02>;
+ vback-porch = <0x0e>;
+ hsync-active = <0x00>;
+ vsync-active = <0x00>;
+ de-active = <0x00>;
+ pixelclk-active = <0x01>;
+ phandle = <0xa00>;
+ };
+
+ 75Hz {
+ clock-frequency = <0x1ba8140>;
+ hactive = <0x280>;
+ vactive = <0x1e0>;
+ hfront-porch = <0x2e>;
+ hsync-len = <0x02>;
+ hback-porch = <0x2c>;
+ vfront-porch = <0x10>;
+ vsync-len = <0x02>;
+ vback-porch = <0x0e>;
+ hsync-active = <0x00>;
+ vsync-active = <0x00>;
+ de-active = <0x00>;
+ pixelclk-active = <0x01>;
+ phandle = <0xa01>;
+ };
+ };
+ };
+ };
+
+ vop@ff460000 {
+ compatible = "rockchip,px30-vop-big";
+ reg = <0x00 0xff460000 0x00 0x1fc 0x00 0xff460a00 0x00 0x400>;
+ rockchip,grf = <0x2f>;
+ reg-names = "regs\0gamma_lut";
+ interrupts = <0x00 0x4d 0x04>;
+ clocks = <0x02 0xb5 0x02 0x96 0x02 0xfb>;
+ clock-names = "aclk_vop\0dclk_vop\0hclk_vop";
+ power-domains = <0x8a 0x0c>;
+ iommus = <0xa1>;
+ status = "okay";
+ phandle = <0x10f>;
+
+ port {
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+ phandle = <0x10>;
+
+ endpoint@0 {
+ reg = <0x00>;
+ remote-endpoint = <0xa2>;
+ phandle = <0x12>;
+ };
+
+ endpoint@1 {
+ reg = <0x01>;
+ remote-endpoint = <0xa3>;
+ phandle = <0x13>;
+ };
+
+ endpoint@2 {
+ reg = <0x02>;
+ remote-endpoint = <0xa4>;
+ phandle = <0x14>;
+ };
+ };
+ };
+
+ iommu@ff460f00 {
+ compatible = "rockchip,iommu";
+ reg = <0x00 0xff460f00 0x00 0x100>;
+ interrupts = <0x00 0x4d 0x04>;
+ interrupt-names = "vopb_mmu";
+ clocks = <0x02 0xb5 0x02 0xfb>;
+ clock-names = "aclk\0hclk";
+ power-domains = <0x8a 0x0c>;
+ #iommu-cells = <0x00>;
+ status = "okay";
+ phandle = <0xa1>;
+ };
+
+ rk_rga@ff480000 {
+ compatible = "rockchip,rga2";
+ reg = <0x00 0xff480000 0x00 0x1000>;
+ interrupts = <0x00 0x4c 0x04>;
+ clocks = <0x02 0xb7 0x02 0xfd 0x02 0x35>;
+ clock-names = "aclk_rga\0hclk_rga\0clk_rga";
+ power-domains = <0x8a 0x0c>;
+ dma-coherent;
+ status = "okay";
+ phandle = <0x110>;
+ };
+
+ cif@ff490000 {
+ compatible = "rockchip,cif";
+ reg = <0x00 0xff490000 0x00 0x200>;
+ interrupts = <0x00 0x45 0x04>;
+ clocks = <0x02 0xb3 0x02 0xf9 0x02 0x160 0x02 0x34>;
+ clock-names = "aclk_cif0\0hclk_cif0\0pclk_cif\0cif0_out";
+ resets = <0x02 0x2c 0x02 0x2d 0x02 0x2e>;
+ reset-names = "rst_cif_a\0rst_cif_h\0rst_cif_pclkin";
+ power-domains = <0x8a 0x0d>;
+ pinctrl-names = "cif_pin_all";
+ pinctrl-0 = <0xa5>;
+ iommus = <0xa6>;
+ status = "disabled";
+ phandle = <0x111>;
+ };
+
+ cif-new@ff490000 {
+ compatible = "rockchip,px30-cif";
+ reg = <0x00 0xff490000 0x00 0x200>;
+ interrupts = <0x00 0x45 0x04>;
+ clocks = <0x02 0xb3 0x02 0xf9 0x02 0x160 0x02 0x34>;
+ clock-names = "aclk_cif\0hclk_cif\0pclk_cif\0cif_out";
+ resets = <0x02 0x2c 0x02 0x2d 0x02 0x2e>;
+ reset-names = "rst_cif_a\0rst_cif_h\0rst_cif_pclkin";
+ power-domains = <0x8a 0x0d>;
+ iommus = <0xa6>;
+ status = "disabled";
+ phandle = <0x112>;
+ };
+
+ iommu@ff490800 {
+ compatible = "rockchip,iommu";
+ reg = <0x00 0xff490800 0x00 0x100>;
+ interrupts = <0x00 0x45 0x04>;
+ interrupt-names = "vip_mmu";
+ clocks = <0x02 0xb3 0x02 0xf9>;
+ clock-names = "aclk\0hclk";
+ power-domains = <0x8a 0x0d>;
+ rk_iommu,disable_reset_quirk;
+ #iommu-cells = <0x00>;
+ status = "okay";
+ phandle = <0xa6>;
+ };
+
+ rk_isp@ff4a0000 {
+ compatible = "rockchip,px30-isp\0rockchip,isp";
+ reg = <0x00 0xff4a0000 0x00 0x8000>;
+ interrupts = <0x00 0x46 0x04>;
+ clocks = <0x02 0xb4 0x02 0xfa 0x02 0x33 0x02 0x33 0x02 0x15f 0x02 0x34 0x02 0x34 0x02 0x146>;
+ clock-names = "aclk_isp\0hclk_isp\0clk_isp\0clk_isp_jpe\0pclkin_isp\0clk_cif_pll\0clk_cif_out\0pclk_dphyrx";
+ resets = <0x02 0x2b 0x02 0x2f>;
+ reset-names = "rst_isp\0rst_mipicsiphy";
+ power-domains = <0x8a 0x0d>;
+ pinctrl-names = "default\0isp_dvp8bit2\0isp_dvp10bit\0isp_dvp12bit";
+ pinctrl-0 = <0xa7>;
+ pinctrl-1 = <0xa5>;
+ pinctrl-2 = <0xa5 0xa8>;
+ pinctrl-3 = <0xa9 0xa5 0xa8>;
+ rockchip,isp,mipiphy = <0x01>;
+ rockchip,isp,csiphy,reg = <0xff2f0000 0x4000>;
+ rockchip,grf = <0x2f>;
+ rockchip,cru = <0x02>;
+ rockchip,isp,iommu-enable = <0x01>;
+ iommus = <0xaa>;
+ status = "disabled";
+ phandle = <0x113>;
+ };
+
+ rkisp1@ff4a0000 {
+ compatible = "rockchip,rk3326-rkisp1";
+ reg = <0x00 0xff4a0000 0x00 0x8000>;
+ interrupts = <0x00 0x46 0x04 0x00 0x49 0x04 0x00 0x4a 0x04>;
+ interrupt-names = "isp_irq\0mi_irq\0mipi_irq";
+ clocks = <0x02 0xb4 0x02 0xfa 0x02 0x33 0x02 0x15f>;
+ clock-names = "aclk_isp\0hclk_isp\0clk_isp\0pclk_isp";
+ devfreq = <0xab>;
+ power-domains = <0x8a 0x0d>;
+ iommus = <0xaa>;
+ rockchip,grf = <0x2f>;
+ status = "okay";
+ phandle = <0x114>;
+ };
+
+ iommu@ff4a8000 {
+ compatible = "rockchip,iommu";
+ reg = <0x00 0xff4a8000 0x00 0x100>;
+ interrupts = <0x00 0x46 0x04>;
+ interrupt-names = "isp_mmu";
+ clocks = <0x02 0xb4 0x02 0xfa>;
+ clock-names = "aclk\0hclk";
+ power-domains = <0x8a 0x0d>;
+ rk_iommu,disable_reset_quirk;
+ #iommu-cells = <0x00>;
+ status = "okay";
+ phandle = <0xaa>;
+ };
+
+ qos@ff518000 {
+ compatible = "syscon";
+ reg = <0x00 0xff518000 0x00 0x20>;
+ phandle = <0x18>;
+ };
+
+ qos@ff520000 {
+ compatible = "syscon";
+ reg = <0x00 0xff520000 0x00 0x20>;
+ phandle = <0x28>;
+ };
+
+ qos@ff52c000 {
+ compatible = "syscon";
+ reg = <0x00 0xff52c000 0x00 0x20>;
+ phandle = <0x17>;
+ };
+
+ qos@ff538000 {
+ compatible = "syscon";
+ reg = <0x00 0xff538000 0x00 0x20>;
+ phandle = <0x19>;
+ };
+
+ qos@ff538080 {
+ compatible = "syscon";
+ reg = <0x00 0xff538080 0x00 0x20>;
+ phandle = <0x1a>;
+ };
+
+ qos@ff538100 {
+ compatible = "syscon";
+ reg = <0x00 0xff538100 0x00 0x20>;
+ phandle = <0x1b>;
+ };
+
+ qos@ff538180 {
+ compatible = "syscon";
+ reg = <0x00 0xff538180 0x00 0x20>;
+ phandle = <0x1c>;
+ };
+
+ qos@ff540000 {
+ compatible = "syscon";
+ reg = <0x00 0xff540000 0x00 0x20>;
+ phandle = <0x15>;
+ };
+
+ qos@ff540080 {
+ compatible = "syscon";
+ reg = <0x00 0xff540080 0x00 0x20>;
+ phandle = <0x16>;
+ };
+
+ qos@ff548000 {
+ compatible = "syscon";
+ reg = <0x00 0xff548000 0x00 0x20>;
+ phandle = <0x23>;
+ };
+
+ qos@ff548080 {
+ compatible = "syscon";
+ reg = <0x00 0xff548080 0x00 0x20>;
+ phandle = <0x24>;
+ };
+
+ qos@ff548100 {
+ compatible = "syscon";
+ reg = <0x00 0xff548100 0x00 0x20>;
+ phandle = <0x25>;
+ };
+
+ qos@ff548180 {
+ compatible = "syscon";
+ reg = <0x00 0xff548180 0x00 0x20>;
+ phandle = <0x26>;
+ };
+
+ qos@ff548200 {
+ compatible = "syscon";
+ reg = <0x00 0xff548200 0x00 0x20>;
+ phandle = <0x27>;
+ };
+
+ qos@ff550000 {
+ compatible = "syscon";
+ reg = <0x00 0xff550000 0x00 0x20>;
+ phandle = <0x1f>;
+ };
+
+ qos@ff550080 {
+ compatible = "syscon";
+ reg = <0x00 0xff550080 0x00 0x20>;
+ phandle = <0x20>;
+ };
+
+ qos@ff550100 {
+ compatible = "syscon";
+ reg = <0x00 0xff550100 0x00 0x20>;
+ phandle = <0x21>;
+ };
+
+ qos@ff550180 {
+ compatible = "syscon";
+ reg = <0x00 0xff550180 0x00 0x20>;
+ phandle = <0x22>;
+ };
+
+ qos@ff558000 {
+ compatible = "syscon";
+ reg = <0x00 0xff558000 0x00 0x20>;
+ phandle = <0x1d>;
+ };
+
+ qos@ff558080 {
+ compatible = "syscon";
+ reg = <0x00 0xff558080 0x00 0x20>;
+ phandle = <0x1e>;
+ };
+
+ dfi@ff610000 {
+ reg = <0x00 0xff610000 0x00 0x400>;
+ compatible = "rockchip,px30-dfi";
+ rockchip,pmugrf = <0xac>;
+ status = "okay";
+ phandle = <0xad>;
+ };
+
+ dmc {
+ compatible = "rockchip,px30-dmc";
+ interrupts = <0x00 0x69 0x04>;
+ interrupt-names = "complete_irq";
+ devfreq-events = <0xad>;
+ clocks = <0x02 0x54>;
+ clock-names = "dmc_clk";
+ operating-points-v2 = <0xae>;
+ ddr_timing = <0xaf>;
+ upthreshold = <0x28>;
+ downdifferential = <0x14>;
+ system-status-freq = <0x01 0x80e80 0x08 0x6ddd0 0x02 0x2f5d0 0x20 0x6ddd0 0x1000 0x80e80 0x4000 0xa2990 0x2000 0xa2990>;
+ auto-min-freq = <0x50140>;
+ auto-freq-en = <0x01>;
+ #cooling-cells = <0x02>;
+ status = "okay";
+ center-supply = <0x0e>;
+ phandle = <0xab>;
+
+ ddr_power_model {
+ compatible = "ddr_power_model";
+ dynamic-power-coefficient = <0x78>;
+ static-power-coefficient = <0xc8>;
+ ts = <0x7d00 0x125c 0xffffffb0 0x02>;
+ thermal-zone = "soc-thermal";
+ phandle = <0x115>;
+ };
+ };
+
+ dmc-opp-table {
+ compatible = "operating-points-v2";
+ rockchip,max-volt = <0x118c30>;
+ rockchip,evb-irdrop = <0x61a8>;
+ rockchip,pvtm-voltage-sel = <0x00 0xc350 0x00 0xc351 0xd2f0 0x01 0xd2f1 0xea60 0x02 0xea61 0x1869f 0x03>;
+ rockchip,pvtm-ch = <0x00 0x00>;
+ phandle = <0xae>;
+
+ opp-528000000 {
+ opp-hz = <0x00 0x1f78a400>;
+ opp-microvolt = <0xee098>;
+ opp-microvolt-L0 = <0xee098>;
+ opp-microvolt-L1 = <0xee098>;
+ opp-microvolt-L2 = <0xe7ef0>;
+ opp-microvolt-L3 = <0xe7ef0>;
+ };
+
+ opp-666000000 {
+ opp-hz = <0x00 0x27b25a80>;
+ opp-microvolt = <0x100590>;
+ opp-microvolt-L0 = <0x100590>;
+ opp-microvolt-L1 = <0xf4240>;
+ opp-microvolt-L2 = <0xee098>;
+ opp-microvolt-L3 = <0xe7ef0>;
+ };
+
+ opp-786000000 {
+ opp-hz = <0x00 0x2ed96880>;
+ opp-microvolt = <0x10c8e0>;
+ opp-microvolt-L0 = <0x10c8e0>;
+ opp-microvolt-L1 = <0x100590>;
+ opp-microvolt-L2 = <0xfa3e8>;
+ opp-microvolt-L3 = <0xf4240>;
+ status = "okay";
+ };
+ };
+
+ rockchip-system-monitor {
+ compatible = "rockchip,system-monitor";
+ rockchip,thermal-zone = "soc-thermal";
+ rockchip,polling-delay = <0xc8>;
+ phandle = <0x116>;
+ };
+
+ pinctrl {
+ compatible = "rockchip,px30-pinctrl";
+ rockchip,grf = <0x2f>;
+ rockchip,pmu = <0xac>;
+ #address-cells = <0x02>;
+ #size-cells = <0x02>;
+ ranges;
+ phandle = <0x117>;
+
+ gpio0@ff040000 {
+ compatible = "rockchip,gpio-bank";
+ reg = <0x00 0xff040000 0x00 0x100>;
+ interrupts = <0x00 0x03 0x04>;
+ clocks = <0x2a 0x14>;
+ gpio-controller;
+ #gpio-cells = <0x02>;
+ interrupt-controller;
+ #interrupt-cells = <0x02>;
+ phandle = <0x5c>;
+ };
+
+ gpio1@ff250000 {
+ compatible = "rockchip,gpio-bank";
+ reg = <0x00 0xff250000 0x00 0x100>;
+ interrupts = <0x00 0x04 0x04>;
+ clocks = <0x02 0x15c>;
+ gpio-controller;
+ #gpio-cells = <0x02>;
+ interrupt-controller;
+ #interrupt-cells = <0x02>;
+ phandle = <0xbf>;
+ };
+
+ gpio2@ff260000 {
+ compatible = "rockchip,gpio-bank";
+ reg = <0x00 0xff260000 0x00 0x100>;
+ interrupts = <0x00 0x05 0x04>;
+ clocks = <0x02 0x15d>;
+ gpio-controller;
+ #gpio-cells = <0x02>;
+ interrupt-controller;
+ #interrupt-cells = <0x02>;
+ phandle = <0x66>;
+ };
+
+ gpio3@ff270000 {
+ compatible = "rockchip,gpio-bank";
+ reg = <0x00 0xff270000 0x00 0x100>;
+ interrupts = <0x00 0x06 0x04>;
+ clocks = <0x02 0x15e>;
+ gpio-controller;
+ #gpio-cells = <0x02>;
+ interrupt-controller;
+ #interrupt-cells = <0x02>;
+ phandle = <0x97>;
+ };
+
+ pcfg-pull-up {
+ bias-pull-up;
+ phandle = <0xb2>;
+ };
+
+ pcfg-pull-down {
+ bias-pull-down;
+ phandle = <0x118>;
+ };
+
+ pcfg-pull-none {
+ bias-disable;
+ phandle = <0xb1>;
+ };
+
+ pcfg-pull-none-2ma {
+ bias-disable;
+ drive-strength = <0x02>;
+ phandle = <0x119>;
+ };
+
+ pcfg-pull-up-2ma {
+ bias-pull-up;
+ drive-strength = <0x02>;
+ phandle = <0x11a>;
+ };
+
+ pcfg-pull-up-4ma {
+ bias-pull-up;
+ drive-strength = <0x04>;
+ phandle = <0xb3>;
+ };
+
+ pcfg-pull-none-4ma {
+ bias-disable;
+ drive-strength = <0x04>;
+ phandle = <0x11b>;
+ };
+
+ pcfg-pull-down-4ma {
+ bias-pull-down;
+ drive-strength = <0x04>;
+ phandle = <0x11c>;
+ };
+
+ pcfg-pull-none-8ma {
+ bias-disable;
+ drive-strength = <0x08>;
+ phandle = <0xb6>;
+ };
+
+ pcfg-pull-up-8ma {
+ bias-pull-up;
+ drive-strength = <0x08>;
+ phandle = <0xb4>;
+ };
+
+ pcfg-pull-none-12ma {
+ bias-disable;
+ drive-strength = <0x0c>;
+ phandle = <0xb8>;
+ };
+
+ pcfg-pull-up-12ma {
+ bias-pull-up;
+ drive-strength = <0x0c>;
+ phandle = <0xb7>;
+ };
+
+ pcfg-pull-none-smt {
+ bias-disable;
+ input-schmitt-enable;
+ phandle = <0xb0>;
+ };
+
+ pcfg-output-high {
+ output-high;
+ phandle = <0x11d>;
+ };
+
+ pcfg-output-low {
+ output-low;
+ phandle = <0xb9>;
+ };
+
+ pcfg-input-high {
+ bias-pull-up;
+ input-enable;
+ phandle = <0xb5>;
+ };
+
+ pcfg-input {
+ input-enable;
+ phandle = <0x11e>;
+ };
+
+ i2c0 {
+
+ i2c0-xfer {
+ rockchip,pins = <0x00 0x08 0x01 0xb0 0x00 0x09 0x01 0xb0>;
+ phandle = <0x5b>;
+ };
+ };
+
+ i2c1 {
+
+ i2c1-xfer {
+ rockchip,pins = <0x00 0x12 0x01 0xb0 0x00 0x13 0x01 0xb0>;
+ phandle = <0x69>;
+ };
+ };
+
+ i2c2 {
+
+ i2c2-xfer {
+ rockchip,pins = <0x02 0x0f 0x02 0xb0 0x02 0x10 0x02 0xb0>;
+ phandle = <0x6a>;
+ };
+ };
+
+ i2c3 {
+
+ i2c3-xfer {
+ rockchip,pins = <0x01 0x0c 0x04 0xb0 0x01 0x0d 0x04 0xb0>;
+ phandle = <0x6b>;
+ };
+ };
+
+ tsadc {
+
+ tsadc-otp-gpio {
+ rockchip,pins = <0x00 0x06 0x00 0xb1>;
+ phandle = <0x86>;
+ };
+
+ tsadc-otp-out {
+ rockchip,pins = <0x00 0x06 0x01 0xb1>;
+ phandle = <0x87>;
+ };
+ };
+
+ uart0 {
+
+ uart0-xfer {
+ rockchip,pins = <0x00 0x0a 0x01 0xb2 0x00 0x0b 0x01 0xb2>;
+ phandle = <0x2c>;
+ };
+
+ uart0-cts {
+ rockchip,pins = <0x00 0x0c 0x01 0xb1>;
+ phandle = <0x2d>;
+ };
+
+ uart0-rts {
+ rockchip,pins = <0x00 0x0d 0x01 0xb1>;
+ phandle = <0x2e>;
+ };
+
+ uart0-rts-gpio {
+ rockchip,pins = <0x00 0x0d 0x00 0xb1>;
+ phandle = <0x11f>;
+ };
+ };
+
+ uart1 {
+
+ uart1-xfer {
+ rockchip,pins = <0x01 0x11 0x01 0xb2 0x01 0x10 0x01 0xb2>;
+ phandle = <0x4f>;
+ };
+
+ uart1-cts {
+ rockchip,pins = <0x01 0x12 0x01 0xb1>;
+ phandle = <0x50>;
+ };
+
+ uart1-rts {
+ rockchip,pins = <0x01 0x13 0x01 0xb1>;
+ phandle = <0x120>;
+ };
+
+ uart1-rts-gpio {
+ rockchip,pins = <0x01 0x13 0x00 0xb1>;
+ phandle = <0x121>;
+ };
+ };
+
+ uart2-m0 {
+
+ uart2m0-xfer {
+ rockchip,pins = <0x01 0x1a 0x02 0xb2 0x01 0x1b 0x02 0xb2>;
+ phandle = <0x51>;
+ };
+ };
+
+ uart2-m1 {
+
+ uart2m1-xfer {
+ rockchip,pins = <0x02 0x0c 0x02 0xb2 0x02 0x0e 0x02 0xb2>;
+ phandle = <0xba>;
+ };
+ };
+
+ uart3-m0 {
+
+ uart3m0-xfer {
+ rockchip,pins = <0x00 0x10 0x02 0xb2 0x00 0x11 0x02 0xb2>;
+ phandle = <0x122>;
+ };
+
+ uart3m0-cts {
+ rockchip,pins = <0x00 0x12 0x02 0xb1>;
+ phandle = <0x123>;
+ };
+
+ uart3m0-rts {
+ rockchip,pins = <0x00 0x13 0x02 0xb1>;
+ phandle = <0x124>;
+ };
+
+ uart3m0-rts-gpio {
+ rockchip,pins = <0x00 0x13 0x00 0xb1>;
+ phandle = <0x125>;
+ };
+ };
+
+ uart3-m1 {
+
+ uart3m1-xfer {
+ rockchip,pins = <0x01 0x0e 0x02 0xb2 0x01 0x0f 0x02 0xb2>;
+ phandle = <0x52>;
+ };
+
+ uart3m1-cts {
+ rockchip,pins = <0x01 0x0c 0x02 0xb1>;
+ phandle = <0x53>;
+ };
+
+ uart3m1-rts {
+ rockchip,pins = <0x01 0x0d 0x02 0xb1>;
+ phandle = <0x54>;
+ };
+
+ uart3m1-rts-gpio {
+ rockchip,pins = <0x01 0x0d 0x00 0xb1>;
+ phandle = <0x126>;
+ };
+ };
+
+ uart4 {
+
+ uart4-xfer {
+ rockchip,pins = <0x01 0x1c 0x02 0xb2 0x01 0x1d 0x02 0xb2>;
+ phandle = <0x55>;
+ };
+
+ uart4-cts {
+ rockchip,pins = <0x01 0x1e 0x02 0xb1>;
+ phandle = <0x56>;
+ };
+
+ uart4-rts {
+ rockchip,pins = <0x01 0x1f 0x02 0xb1>;
+ phandle = <0x57>;
+ };
+ };
+
+ uart5 {
+
+ uart5-xfer {
+ rockchip,pins = <0x03 0x02 0x04 0xb2 0x03 0x01 0x04 0xb2>;
+ phandle = <0x58>;
+ };
+
+ uart5-cts {
+ rockchip,pins = <0x03 0x03 0x04 0xb1>;
+ phandle = <0x59>;
+ };
+
+ uart5-rts {
+ rockchip,pins = <0x03 0x05 0x04 0xb1>;
+ phandle = <0x5a>;
+ };
+ };
+
+ spi0 {
+
+ spi0-clk {
+ rockchip,pins = <0x01 0x0f 0x03 0xb3>;
+ phandle = <0x6c>;
+ };
+
+ spi0-csn {
+ rockchip,pins = <0x01 0x0e 0x03 0xb3>;
+ phandle = <0x6d>;
+ };
+
+ spi0-miso {
+ rockchip,pins = <0x01 0x0d 0x03 0xb3>;
+ phandle = <0x6e>;
+ };
+
+ spi0-mosi {
+ rockchip,pins = <0x01 0x0c 0x03 0xb3>;
+ phandle = <0x6f>;
+ };
+
+ spi0-clk-hs {
+ rockchip,pins = <0x01 0x0f 0x03 0xb4>;
+ phandle = <0x70>;
+ };
+
+ spi0-miso-hs {
+ rockchip,pins = <0x01 0x0d 0x03 0xb4>;
+ phandle = <0x71>;
+ };
+
+ spi0-mosi-hs {
+ rockchip,pins = <0x01 0x0c 0x03 0xb4>;
+ phandle = <0x72>;
+ };
+ };
+
+ spi1 {
+
+ spi1-clk {
+ rockchip,pins = <0x03 0x0f 0x04 0xb3>;
+ phandle = <0x73>;
+ };
+
+ spi1-csn0 {
+ rockchip,pins = <0x03 0x09 0x04 0xb3>;
+ phandle = <0x74>;
+ };
+
+ spi1-csn1 {
+ rockchip,pins = <0x03 0x0a 0x02 0xb3>;
+ phandle = <0x75>;
+ };
+
+ spi1-miso {
+ rockchip,pins = <0x03 0x0e 0x04 0xb3>;
+ phandle = <0x76>;
+ };
+
+ spi1-mosi {
+ rockchip,pins = <0x03 0x0c 0x04 0xb3>;
+ phandle = <0x77>;
+ };
+
+ spi1-clk-hs {
+ rockchip,pins = <0x03 0x0f 0x04 0xb4>;
+ phandle = <0x78>;
+ };
+
+ spi1-miso-hs {
+ rockchip,pins = <0x03 0x0e 0x04 0xb4>;
+ phandle = <0x79>;
+ };
+
+ spi1-mosi-hs {
+ rockchip,pins = <0x03 0x0c 0x04 0xb4>;
+ phandle = <0x7a>;
+ };
+ };
+
+ pdm {
+
+ pdm-clk0m0 {
+ rockchip,pins = <0x03 0x16 0x02 0xb1>;
+ phandle = <0x44>;
+ };
+
+ pdm-clk0m1 {
+ rockchip,pins = <0x02 0x16 0x01 0xb1>;
+ phandle = <0x127>;
+ };
+
+ pdm-clk1 {
+ rockchip,pins = <0x03 0x17 0x02 0xb1>;
+ phandle = <0x45>;
+ };
+
+ pdm-sdi0m0 {
+ rockchip,pins = <0x03 0x1b 0x02 0xb1>;
+ phandle = <0x46>;
+ };
+
+ pdm-sdi0m1 {
+ rockchip,pins = <0x02 0x15 0x02 0xb1>;
+ phandle = <0x128>;
+ };
+
+ pdm-sdi1 {
+ rockchip,pins = <0x03 0x18 0x02 0xb1>;
+ phandle = <0x47>;
+ };
+
+ pdm-sdi2 {
+ rockchip,pins = <0x03 0x19 0x02 0xb1>;
+ phandle = <0x48>;
+ };
+
+ pdm-sdi3 {
+ rockchip,pins = <0x03 0x1a 0x02 0xb1>;
+ phandle = <0x49>;
+ };
+
+ pdm-clk0m0-sleep {
+ rockchip,pins = <0x03 0x16 0x00 0xb5>;
+ phandle = <0x129>;
+ };
+
+ pdm-clk0m1-sleep {
+ rockchip,pins = <0x02 0x16 0x00 0xb5>;
+ phandle = <0x12a>;
+ };
+
+ pdm-clk1-sleep {
+ rockchip,pins = <0x03 0x17 0x00 0xb5>;
+ phandle = <0x12b>;
+ };
+
+ pdm-sdi0m0-sleep {
+ rockchip,pins = <0x03 0x1b 0x00 0xb5>;
+ phandle = <0x12c>;
+ };
+
+ pdm-sdi0m1-sleep {
+ rockchip,pins = <0x02 0x15 0x00 0xb5>;
+ phandle = <0x12d>;
+ };
+
+ pdm-sdi1-sleep {
+ rockchip,pins = <0x03 0x18 0x00 0xb5>;
+ phandle = <0x12e>;
+ };
+
+ pdm-sdi2-sleep {
+ rockchip,pins = <0x03 0x19 0x00 0xb5>;
+ phandle = <0x12f>;
+ };
+
+ pdm-sdi3-sleep {
+ rockchip,pins = <0x03 0x1a 0x00 0xb5>;
+ phandle = <0x130>;
+ };
+ };
+
+ i2s0 {
+
+ i2s0-8ch-mclk {
+ rockchip,pins = <0x03 0x11 0x02 0xb1>;
+ phandle = <0x131>;
+ };
+
+ i2s0-8ch-sclktx {
+ rockchip,pins = <0x03 0x13 0x02 0xb1>;
+ phandle = <0x30>;
+ };
+
+ i2s0-8ch-sclkrx {
+ rockchip,pins = <0x03 0x0c 0x02 0xb1>;
+ phandle = <0x31>;
+ };
+
+ i2s0-8ch-lrcktx {
+ rockchip,pins = <0x03 0x12 0x02 0xb1>;
+ phandle = <0x32>;
+ };
+
+ i2s0-8ch-lrckrx {
+ rockchip,pins = <0x03 0x0d 0x02 0xb1>;
+ phandle = <0x33>;
+ };
+
+ i2s0-8ch-sdo0 {
+ rockchip,pins = <0x03 0x14 0x02 0xb1>;
+ phandle = <0x38>;
+ };
+
+ i2s0-8ch-sdo1 {
+ rockchip,pins = <0x03 0x10 0x02 0xb1>;
+ phandle = <0x39>;
+ };
+
+ i2s0-8ch-sdo2 {
+ rockchip,pins = <0x03 0x0f 0x02 0xb1>;
+ phandle = <0x3a>;
+ };
+
+ i2s0-8ch-sdo3 {
+ rockchip,pins = <0x03 0x0e 0x02 0xb1>;
+ phandle = <0x3b>;
+ };
+
+ i2s0-8ch-sdi0 {
+ rockchip,pins = <0x03 0x15 0x02 0xb1>;
+ phandle = <0x34>;
+ };
+
+ i2s0-8ch-sdi1 {
+ rockchip,pins = <0x03 0x0b 0x02 0xb1>;
+ phandle = <0x35>;
+ };
+
+ i2s0-8ch-sdi2 {
+ rockchip,pins = <0x03 0x09 0x02 0xb1>;
+ phandle = <0x36>;
+ };
+
+ i2s0-8ch-sdi3 {
+ rockchip,pins = <0x03 0x08 0x02 0xb1>;
+ phandle = <0x37>;
+ };
+ };
+
+ i2s1 {
+
+ i2s1-2ch-mclk {
+ rockchip,pins = <0x02 0x13 0x01 0xb1>;
+ phandle = <0x68>;
+ };
+
+ i2s1-2ch-sclk {
+ rockchip,pins = <0x02 0x12 0x01 0xb1>;
+ phandle = <0x3c>;
+ };
+
+ i2s1-2ch-lrck {
+ rockchip,pins = <0x02 0x11 0x01 0xb1>;
+ phandle = <0x3d>;
+ };
+
+ i2s1-2ch-sdi {
+ rockchip,pins = <0x02 0x15 0x01 0xb1>;
+ phandle = <0x3e>;
+ };
+
+ i2s1-2ch-sdo {
+ rockchip,pins = <0x02 0x14 0x01 0xb1>;
+ phandle = <0x3f>;
+ };
+ };
+
+ i2s2 {
+
+ i2s2-2ch-mclk {
+ rockchip,pins = <0x03 0x01 0x02 0xb1>;
+ phandle = <0x132>;
+ };
+
+ i2s2-2ch-sclk {
+ rockchip,pins = <0x03 0x02 0x02 0xb1>;
+ phandle = <0x40>;
+ };
+
+ i2s2-2ch-lrck {
+ rockchip,pins = <0x03 0x03 0x02 0xb1>;
+ phandle = <0x41>;
+ };
+
+ i2s2-2ch-sdi {
+ rockchip,pins = <0x03 0x05 0x02 0xb1>;
+ phandle = <0x42>;
+ };
+
+ i2s2-2ch-sdo {
+ rockchip,pins = <0x03 0x07 0x02 0xb1>;
+ phandle = <0x43>;
+ };
+ };
+
+ sdmmc {
+
+ sdmmc-clk {
+ rockchip,pins = <0x01 0x1e 0x01 0xb6>;
+ phandle = <0x8f>;
+ };
+
+ sdmmc-cmd {
+ rockchip,pins = <0x01 0x1f 0x01 0xb4>;
+ phandle = <0x90>;
+ };
+
+ sdmmc-det {
+ rockchip,pins = <0x00 0x03 0x01 0xb4>;
+ phandle = <0x91>;
+ };
+
+ sdmmc-bus1 {
+ rockchip,pins = <0x01 0x1a 0x01 0xb4>;
+ phandle = <0x133>;
+ };
+
+ sdmmc-bus4 {
+ rockchip,pins = <0x01 0x1a 0x01 0xb4 0x01 0x1b 0x01 0xb4 0x01 0x1c 0x01 0xb4 0x01 0x1d 0x01 0xb4>;
+ phandle = <0x92>;
+ };
+
+ sdmmc-gpio {
+ rockchip,pins = <0x01 0x1a 0x00 0xb3 0x01 0x1b 0x00 0xb3 0x01 0x1c 0x00 0xb3 0x01 0x1d 0x00 0xb3 0x01 0x1e 0x00 0xb3 0x01 0x1f 0x00 0xb3>;
+ phandle = <0x134>;
+ };
+ };
+
+ sdio {
+
+ sdio-clk {
+ rockchip,pins = <0x01 0x15 0x01 0xb1>;
+ phandle = <0x96>;
+ };
+
+ sdio-cmd {
+ rockchip,pins = <0x01 0x14 0x01 0xb2>;
+ phandle = <0x95>;
+ };
+
+ sdio-bus4 {
+ rockchip,pins = <0x01 0x16 0x01 0xb2 0x01 0x17 0x01 0xb2 0x01 0x18 0x01 0xb2 0x01 0x19 0x01 0xb2>;
+ phandle = <0x94>;
+ };
+
+ sdio-gpio {
+ rockchip,pins = <0x01 0x16 0x00 0xb2 0x01 0x17 0x00 0xb2 0x01 0x18 0x00 0xb2 0x01 0x19 0x00 0xb2 0x01 0x14 0x00 0xb2 0x01 0x15 0x00 0xb2>;
+ phandle = <0x135>;
+ };
+ };
+
+ emmc {
+
+ emmc-clk {
+ rockchip,pins = <0x01 0x09 0x02 0xb6>;
+ phandle = <0x136>;
+ };
+
+ emmc-cmd {
+ rockchip,pins = <0x01 0x0a 0x02 0xb4>;
+ phandle = <0x137>;
+ };
+
+ emmc-pwren {
+ rockchip,pins = <0x01 0x08 0x02 0xb1>;
+ phandle = <0x138>;
+ };
+
+ emmc-rstnout {
+ rockchip,pins = <0x01 0x0b 0x02 0xb1>;
+ phandle = <0x139>;
+ };
+
+ emmc-bus1 {
+ rockchip,pins = <0x01 0x00 0x02 0xb4>;
+ phandle = <0x13a>;
+ };
+
+ emmc-bus4 {
+ rockchip,pins = <0x01 0x00 0x02 0xb4 0x01 0x01 0x02 0xb4 0x01 0x02 0x02 0xb4 0x01 0x03 0x02 0xb4>;
+ phandle = <0x13b>;
+ };
+
+ emmc-bus8 {
+ rockchip,pins = <0x01 0x00 0x02 0xb4 0x01 0x01 0x02 0xb4 0x01 0x02 0x02 0xb4 0x01 0x03 0x02 0xb4 0x01 0x04 0x02 0xb4 0x01 0x05 0x02 0xb4 0x01 0x06 0x02 0xb4 0x01 0x07 0x02 0xb4>;
+ phandle = <0x13c>;
+ };
+ };
+
+ flash {
+
+ flash-cs0 {
+ rockchip,pins = <0x01 0x08 0x01 0xb1>;
+ phandle = <0x13d>;
+ };
+
+ flash-rdy {
+ rockchip,pins = <0x01 0x09 0x01 0xb1>;
+ phandle = <0x13e>;
+ };
+
+ flash-dqs {
+ rockchip,pins = <0x01 0x0a 0x01 0xb1>;
+ phandle = <0x13f>;
+ };
+
+ flash-ale {
+ rockchip,pins = <0x01 0x0b 0x01 0xb1>;
+ phandle = <0x140>;
+ };
+
+ flash-cle {
+ rockchip,pins = <0x01 0x0c 0x01 0xb1>;
+ phandle = <0x141>;
+ };
+
+ flash-wrn {
+ rockchip,pins = <0x01 0x0d 0x01 0xb1>;
+ phandle = <0x142>;
+ };
+
+ flash-csl {
+ rockchip,pins = <0x01 0x0e 0x01 0xb1>;
+ phandle = <0x143>;
+ };
+
+ flash-rdn {
+ rockchip,pins = <0x01 0x0f 0x01 0xb1>;
+ phandle = <0x144>;
+ };
+
+ flash-bus8 {
+ rockchip,pins = <0x01 0x00 0x01 0xb7 0x01 0x01 0x01 0xb7 0x01 0x02 0x01 0xb7 0x01 0x03 0x01 0xb7 0x01 0x04 0x01 0xb7 0x01 0x05 0x01 0xb7 0x01 0x06 0x01 0xb7 0x01 0x07 0x01 0xb7>;
+ phandle = <0x145>;
+ };
+ };
+
+ lcdc {
+
+ lcdc-m0-rgb-pins {
+ rockchip,pins = <0x03 0x00 0x01 0xb6 0x03 0x01 0x01 0xb6 0x03 0x02 0x01 0xb6 0x03 0x03 0x01 0xb6 0x03 0x04 0x01 0xb6 0x03 0x05 0x01 0xb6 0x03 0x06 0x01 0xb6 0x03 0x07 0x01 0xb6 0x03 0x08 0x01 0xb6 0x03 0x09 0x01 0xb6 0x03 0x0a 0x01 0xb6 0x03 0x0b 0x01 0xb6 0x03 0x0c 0x01 0xb6 0x03 0x0d 0x01 0xb6 0x03 0x0e 0x01 0xb6 0x03 0x0f 0x01 0xb6 0x03 0x10 0x01 0xb6 0x03 0x11 0x01 0xb6 0x03 0x12 0x01 0xb6 0x03 0x13 0x01 0xb6 0x03 0x14 0x01 0xb6 0x03 0x15 0x01 0xb6 0x03 0x16 0x01 0xb6 0x03 0x17 0x01 0xb6 0x03 0x18 0x01 0xb6 0x03 0x19 0x01 0xb6 0x03 0x1a 0x01 0xb6 0x03 0x1b 0x01 0xb6>;
+ phandle = <0x146>;
+ };
+
+ lcdc-m0-sleep-pins {
+ rockchip,pins = <0x03 0x00 0x00 0xb1 0x03 0x01 0x00 0xb1 0x03 0x02 0x00 0xb1 0x03 0x03 0x00 0xb1 0x03 0x04 0x00 0xb1 0x03 0x05 0x00 0xb1 0x03 0x06 0x00 0xb1 0x03 0x07 0x00 0xb1 0x03 0x08 0x00 0xb1 0x03 0x09 0x00 0xb1 0x03 0x0a 0x00 0xb1 0x03 0x0b 0x00 0xb1 0x03 0x0c 0x00 0xb1 0x03 0x0d 0x00 0xb1 0x03 0x0e 0x00 0xb1 0x03 0x0f 0x00 0xb1 0x03 0x10 0x00 0xb1 0x03 0x11 0x00 0xb1 0x03 0x12 0x00 0xb1 0x03 0x13 0x00 0xb1 0x03 0x14 0x00 0xb1 0x03 0x15 0x00 0xb1 0x03 0x16 0x00 0xb1 0x03 0x17 0x00 0xb1 0x03 0x18 0x00 0xb1 0x03 0x19 0x00 0xb1 0x03 0x1a 0x00 0xb1 0x03 0x1b 0x00 0xb1>;
+ phandle = <0x147>;
+ };
+
+ lcdc-m1-rgb-pins {
+ rockchip,pins = <0x03 0x00 0x01 0xb6 0x03 0x04 0x01 0xb6 0x03 0x06 0x01 0xb6 0x03 0x0a 0x01 0xb6 0x03 0x0b 0x01 0xb6 0x03 0x0d 0x01 0xb6 0x03 0x10 0x01 0xb6 0x03 0x11 0x01 0xb6 0x03 0x12 0x01 0xb6 0x03 0x13 0x01 0xb6 0x03 0x14 0x01 0xb6 0x03 0x15 0x01 0xb6 0x03 0x16 0x01 0xb6 0x03 0x17 0x01 0xb6 0x03 0x18 0x01 0xb6 0x03 0x19 0x01 0xb6 0x03 0x1a 0x01 0xb6 0x03 0x1b 0x01 0xb6>;
+ phandle = <0x4d>;
+ };
+
+ lcdc-m1-sleep-pins {
+ rockchip,pins = <0x03 0x00 0x00 0xb1 0x03 0x04 0x00 0xb1 0x03 0x06 0x00 0xb1 0x03 0x0a 0x00 0xb1 0x03 0x0b 0x00 0xb1 0x03 0x0d 0x00 0xb1 0x03 0x10 0x00 0xb1 0x03 0x11 0x00 0xb1 0x03 0x12 0x00 0xb1 0x03 0x13 0x00 0xb1 0x03 0x14 0x00 0xb1 0x03 0x15 0x00 0xb1 0x03 0x16 0x00 0xb1 0x03 0x17 0x00 0xb1 0x03 0x18 0x00 0xb1 0x03 0x19 0x00 0xb1 0x03 0x1a 0x00 0xb1 0x03 0x1b 0x00 0xb1>;
+ phandle = <0x4e>;
+ };
+ };
+
+ pwm0 {
+
+ pwm0-pin {
+ rockchip,pins = <0x00 0x0f 0x01 0xb1>;
+ phandle = <0x7b>;
+ };
+ };
+
+ pwm1 {
+
+ pwm1-pin {
+ rockchip,pins = <0x00 0x10 0x01 0xb1>;
+ phandle = <0x7c>;
+ };
+ };
+
+ pwm2 {
+
+ pwm2-pin {
+ rockchip,pins = <0x02 0x0d 0x01 0xb1>;
+ phandle = <0x7d>;
+ };
+ };
+
+ pwm3 {
+
+ pwm3-pin {
+ rockchip,pins = <0x00 0x11 0x01 0xb1>;
+ phandle = <0x7e>;
+ };
+ };
+
+ pwm4 {
+
+ pwm4-pin {
+ rockchip,pins = <0x03 0x12 0x03 0xb1>;
+ phandle = <0x7f>;
+ };
+ };
+
+ pwm5 {
+
+ pwm5-pin {
+ rockchip,pins = <0x03 0x13 0x03 0xb1>;
+ phandle = <0x80>;
+ };
+ };
+
+ pwm6 {
+
+ pwm6-pin {
+ rockchip,pins = <0x03 0x14 0x03 0xb1>;
+ phandle = <0x81>;
+ };
+ };
+
+ pwm7 {
+
+ pwm7-pin {
+ rockchip,pins = <0x03 0x15 0x03 0xb1>;
+ phandle = <0x82>;
+ };
+ };
+
+ gmac {
+
+ rmii-pins {
+ rockchip,pins = <0x02 0x00 0x02 0xb8 0x02 0x01 0x02 0xb8 0x02 0x02 0x02 0xb8 0x02 0x03 0x02 0xb1 0x02 0x04 0x02 0xb1 0x02 0x05 0x02 0xb1 0x02 0x06 0x02 0xb1 0x02 0x07 0x02 0xb1 0x02 0x09 0x02 0xb1>;
+ phandle = <0x8d>;
+ };
+
+ mac-refclk-12ma {
+ rockchip,pins = <0x02 0x0a 0x02 0xb8>;
+ phandle = <0x8e>;
+ };
+
+ mac-refclk {
+ rockchip,pins = <0x02 0x0a 0x02 0xb1>;
+ phandle = <0x148>;
+ };
+ };
+
+ cif-m0 {
+
+ cif-clkout-m0 {
+ rockchip,pins = <0x02 0x0b 0x01 0xb8>;
+ phandle = <0xa7>;
+ };
+
+ dvp-d2d9-m0 {
+ rockchip,pins = <0x02 0x00 0x01 0xb1 0x02 0x01 0x01 0xb1 0x02 0x02 0x01 0xb1 0x02 0x03 0x01 0xb1 0x02 0x04 0x01 0xb1 0x02 0x05 0x01 0xb1 0x02 0x06 0x01 0xb1 0x02 0x07 0x01 0xb1 0x02 0x08 0x01 0xb1 0x02 0x09 0x01 0xb1 0x02 0x0a 0x01 0xb1 0x02 0x0b 0x01 0xb1>;
+ phandle = <0xa5>;
+ };
+
+ dvp-d0d1-m0 {
+ rockchip,pins = <0x02 0x0c 0x01 0xb1 0x02 0x0e 0x01 0xb1>;
+ phandle = <0xa9>;
+ };
+
+ d10-d11-m0 {
+ rockchip,pins = <0x02 0x0f 0x01 0xb1 0x02 0x10 0x01 0xb1>;
+ phandle = <0xa8>;
+ };
+ };
+
+ cif-m1 {
+
+ cif-clkout-m1 {
+ rockchip,pins = <0x03 0x18 0x03 0xb1>;
+ phandle = <0x149>;
+ };
+
+ dvp-d2d9-m1 {
+ rockchip,pins = <0x03 0x03 0x03 0xb1 0x03 0x05 0x03 0xb1 0x03 0x07 0x03 0xb1 0x03 0x08 0x03 0xb1 0x03 0x09 0x03 0xb1 0x03 0x0c 0x03 0xb1 0x03 0x0e 0x03 0xb1 0x03 0x0f 0x03 0xb1 0x03 0x19 0x03 0xb1 0x03 0x1a 0x03 0xb1 0x03 0x1b 0x03 0xb1 0x03 0x18 0x03 0xb1>;
+ phandle = <0x14a>;
+ };
+
+ dvp-d0d1-m1 {
+ rockchip,pins = <0x03 0x01 0x03 0xb1 0x03 0x02 0x03 0xb1>;
+ phandle = <0x14b>;
+ };
+
+ d10-d11-m1 {
+ rockchip,pins = <0x03 0x16 0x03 0xb1 0x03 0x17 0x03 0xb1>;
+ phandle = <0x14c>;
+ };
+ };
+
+ isp {
+
+ isp-prelight {
+ rockchip,pins = <0x03 0x19 0x04 0xb1>;
+ phandle = <0x14d>;
+ };
+ };
+
+ pmic {
+
+ pmic_int {
+ rockchip,pins = <0x00 0x0a 0x00 0xb2 0x00 0x0b 0x00 0xb1>;
+ phandle = <0x5d>;
+ };
+
+ soc_slppin_gpio {
+ rockchip,pins = <0x00 0x04 0x00 0xb9>;
+ phandle = <0x60>;
+ };
+
+ soc_slppin_slp {
+ rockchip,pins = <0x00 0x04 0x01 0xb1>;
+ phandle = <0x5e>;
+ };
+
+ soc_slppin_rst {
+ rockchip,pins = <0x00 0x04 0x02 0xb1>;
+ phandle = <0x62>;
+ };
+ };
+
+ leds {
+
+ led-pins {
+ rockchip,pins = <0x00 0x11 0x00 0xb1>;
+ phandle = <0xc0>;
+ };
+ };
+
+ btns {
+
+ btn-pins {
+ rockchip,pins = <0x01 0x0c 0x00 0xb2 0x01 0x0d 0x00 0xb2 0x01 0x0e 0x00 0xb2 0x01 0x0f 0x00 0xb2 0x01 0x02 0x00 0xb2 0x01 0x05 0x00 0xb2 0x01 0x06 0x00 0xb2 0x01 0x07 0x00 0xb2 0x02 0x00 0x00 0xb2 0x02 0x01 0x00 0xb2 0x02 0x02 0x00 0xb2 0x02 0x03 0x00 0xb2 0x02 0x04 0x00 0xb2 0x02 0x05 0x00 0xb2 0x02 0x06 0x00 0xb2 0x02 0x07 0x00 0xb2 0x03 0x09 0x00 0xb2 0x03 0x0a 0x00 0xb2 0x03 0x0c 0x00 0xb2 0x03 0x0f 0x00 0xb2>;
+ phandle = <0xbd>;
+ };
+ };
+ };
+
+ chosen {
+ bootargs = [00];
+ };
+
+ fiq-debugger {
+ compatible = "rockchip,fiq-debugger";
+ rockchip,serial-id = <0x02>;
+ rockchip,wake-irq = <0x00>;
+ rockchip,irq-mode-enable = <0x00>;
+ rockchip,baudrate = <0x1c200>;
+ interrupts = <0x00 0x7f 0x08>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0xba>;
+ status = "okay";
+ };
+
+ ramoops {
+ compatible = "ramoops";
+ record-size = <0x00 0x20000>;
+ console-size = <0x00 0x80000>;
+ ftrace-size = <0x00 0x00>;
+ pmsg-size = <0x00 0x00>;
+ memory-region = <0xbb>;
+ };
+
+ reserved-memory {
+ #address-cells = <0x02>;
+ #size-cells = <0x02>;
+ ranges;
+
+ drm-logo@00000000 {
+ compatible = "rockchip,drm-logo";
+ reg = <0x00 0x00 0x00 0x00>;
+ phandle = <0x11>;
+ };
+
+ region@110000 {
+ reg = <0x00 0x110000 0x00 0xf0000>;
+ reg-names = "ramoops_mem";
+ phandle = <0xbb>;
+ };
+ };
+
+ odroidgo3-keys {
+ compatible = "gpio-keys";
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+ autorepeat;
+ phandle = <0x14e>;
+
+ button@0 {
+ label = "GPIO BTN-VOLUP";
+ linux,code = <0x73>;
+ gpios = <0x66 0x00 0x01>;
+ };
+
+ button@1 {
+ label = "GPIO BTN-VOLDN";
+ linux,code = <0x72>;
+ gpios = <0x66 0x01 0x01>;
+ };
+ };
+
+ odroidgo3-joypad {
+ compatible = "odroidgo3-joypad";
+ pwms = <0xbc 0x00 0xbebc200 0x00>;
+ pwm-names = "enable";
+ rumble-boost-weak = <0x00>;
+ rumble-boost-strong = <0x00>;
+ joypad-name = "GO-Super Gamepad";
+ joypad-product = <0x1100>;
+ joypad-revision = <0x100>;
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <0xbd>;
+ pinctrl-1 = <0x7b>;
+ io-channel-names = "amux_adc";
+ io-channels = <0xbe 0x01>;
+ amux-count = <0x04>;
+ amux-a-gpios = <0x97 0x0b 0x01>;
+ amux-b-gpios = <0x97 0x08 0x01>;
+ amux-en-gpios = <0x97 0x0d 0x01>;
+ button-adc-scale = <0x02>;
+ button-adc-deadzone = <0x40>;
+ button-adc-fuzz = <0x20>;
+ button-adc-flat = <0x20>;
+ abs_x-p-tuning = <0xc8>;
+ abs_x-n-tuning = <0xc8>;
+ abs_y-p-tuning = <0xc8>;
+ abs_y-n-tuning = <0xc8>;
+ abs_rx-p-tuning = <0xc8>;
+ abs_rx-n-tuning = <0xc8>;
+ abs_ry-p-tuning = <0xc8>;
+ abs_ry-n-tuning = <0xc8>;
+ poll-interval = <0x0a>;
+ invert-absx;
+ invert-absy;
+ phandle = <0x14f>;
+
+ sw1 {
+ gpios = <0xbf 0x0c 0x01>;
+ label = "GPIO DPAD-UP";
+ linux,code = <0x220>;
+ };
+
+ sw2 {
+ gpios = <0xbf 0x0d 0x01>;
+ label = "GPIO DPAD-DOWN";
+ linux,code = <0x221>;
+ };
+
+ sw3 {
+ gpios = <0xbf 0x0e 0x01>;
+ label = "GPIO DPAD-LEFT";
+ linux,code = <0x222>;
+ };
+
+ sw4 {
+ gpios = <0xbf 0x0f 0x01>;
+ label = "GPIO DPAD-RIGHT";
+ linux,code = <0x223>;
+ };
+
+ sw5 {
+ gpios = <0xbf 0x02 0x01>;
+ label = "GPIO KEY BTN-A";
+ linux,code = <0x131>;
+ };
+
+ sw6 {
+ gpios = <0xbf 0x05 0x01>;
+ label = "GPIO BTN-B";
+ linux,code = <0x130>;
+ };
+
+ sw7 {
+ gpios = <0xbf 0x06 0x01>;
+ label = "GPIO BTN-Y";
+ linux,code = <0x134>;
+ };
+
+ sw8 {
+ gpios = <0xbf 0x07 0x01>;
+ label = "GPIO BTN-X";
+ linux,code = <0x133>;
+ };
+
+ sw11 {
+ gpios = <0x66 0x02 0x01>;
+ label = "GPIO F3";
+ linux,code = <0x2c2>;
+ };
+
+ sw12 {
+ gpios = <0x66 0x03 0x01>;
+ label = "GPIO F4";
+ linux,code = <0x2c3>;
+ };
+
+ sw15 {
+ gpios = <0x66 0x06 0x01>;
+ label = "GPIO TOP-LEFT";
+ linux,code = <0x136>;
+ };
+
+ sw16 {
+ gpios = <0x66 0x07 0x01>;
+ label = "GPIO TOP-RIGHT";
+ linux,code = <0x137>;
+ };
+
+ sw19 {
+ gpios = <0x97 0x09 0x01>;
+ label = "GPIO F1";
+ linux,code = <0x2c0>;
+ };
+
+ sw20 {
+ gpios = <0x97 0x0f 0x01>;
+ label = "GPIO TOP-RIGHT2";
+ linux,code = <0x139>;
+ };
+
+ sw21 {
+ gpios = <0x97 0x0a 0x01>;
+ label = "GPIO TOP-LEFT2";
+ linux,code = <0x138>;
+ };
+
+ sw22 {
+ gpios = <0x97 0x0c 0x01>;
+ label = "GPIO F2";
+ linux,code = <0x2c1>;
+ };
+
+ sw13 {
+ gpios = <0x66 0x04 0x01>;
+ label = "GPIO F5";
+ linux,code = <0x2c4>;
+ };
+ };
+
+ gpio_leds {
+ compatible = "gpio-leds";
+ pinctrl-names = "led_pins";
+ pinctrl-0 = <0xc0>;
+ phandle = <0x150>;
+
+ heartbeat {
+ label = "blue:heartbeat";
+ gpios = <0x5c 0x11 0x00>;
+ linux,default-trigger = "heartbeat";
+ };
+ };
+
+ backlight {
+ compatible = "pwm-backlight";
+ pwms = <0xc1 0x00 0xf519 0x00>;
+ brightness-levels = <0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f 0x20 0x21 0x22 0x23 0x24 0x25 0x26 0x27 0x28 0x29 0x2a 0x2b 0x2c 0x2d 0x2e 0x2f 0x30 0x31 0x32 0x33 0x34 0x35 0x36 0x37 0x38 0x39 0x3a 0x3b 0x3c 0x3d 0x3e 0x3f 0x40 0x41 0x42 0x43 0x44 0x45 0x46 0x47 0x48 0x49 0x4a 0x4b 0x4c 0x4d 0x4e 0x4f 0x50 0x51 0x52 0x53 0x54 0x55 0x56 0x57 0x58 0x59 0x5a 0x5b 0x5c 0x5d 0x5e 0x5f 0x60 0x61 0x62 0x63 0x64 0x65 0x66 0x67 0x68 0x69 0x6a 0x6b 0x6c 0x6d 0x6e 0x6f 0x70 0x71 0x72 0x73 0x74 0x75 0x76 0x77 0x78 0x79 0x7a 0x7b 0x7c 0x7d 0x7e 0x7f 0x80 0x81 0x82 0x83 0x84 0x85 0x86 0x87 0x88 0x89 0x8a 0x8b 0x8c 0x8d 0x8e 0x8f 0x90 0x91 0x92 0x93 0x94 0x95 0x96 0x97 0x98 0x99 0x9a 0x9b 0x9c 0x9d 0x9e 0x9f 0xa0>;
+ default-brightness-level = <0x33>;
+ phandle = <0x9d>;
+ };
+
+ rk817-sound {
+ compatible = "simple-audio-card";
+ simple-audio-card,format = "i2s";
+ simple-audio-card,name = "rockchip,rk817-codec";
+ simple-audio-card,mclk-fs = <0x100>;
+ simple-audio-card,widgets = "Microphone\0Mic Jack\0Headphone\0Headphone Jack";
+ simple-audio-card,routing = "MIC_IN\0Mic Jack\0Headphone Jack\0HPOL\0Headphone Jack\0HPOR";
+ simple-audio-card,hp-det-gpio = <0x66 0x16 0x01>;
+ simple-audio-card,codec-hp-det = <0x01>;
+
+ simple-audio-card,cpu {
+ sound-dai = <0xc2>;
+ };
+
+ simple-audio-card,codec {
+ sound-dai = <0xc3>;
+ };
+ };
+
+ vccsys {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v8_sys";
+ regulator-always-on;
+ regulator-min-microvolt = <0x39fbc0>;
+ regulator-max-microvolt = <0x39fbc0>;
+ phandle = <0x64>;
+ };
+
+ __symbols__ {
+ ddr_timing = "/ddr_timing";
+ cpu0 = "/cpus/cpu@0";
+ cpu1 = "/cpus/cpu@1";
+ cpu2 = "/cpus/cpu@2";
+ cpu3 = "/cpus/cpu@3";
+ CPU_SLEEP = "/cpus/idle-states/cpu-sleep";
+ CLUSTER_SLEEP = "/cpus/idle-states/cluster-sleep";
+ cpu0_opp_table = "/cpu0-opp-table";
+ bus_soc = "/bus-soc";
+ bus_apll = "/bus-apll";
+ bus_apll_opp_table = "/bus-apll-opp-table";
+ display_subsystem = "/display-subsystem";
+ route_lvds = "/display-subsystem/route/route-lvds";
+ route_dsi = "/display-subsystem/route/route-dsi";
+ route_rgb = "/display-subsystem/route/route-rgb";
+ gmac_clkin = "/external-gmac-clock";
+ rockchip_suspend = "/rockchip-suspend";
+ xin24m = "/xin24m";
+ xin32k = "/xin32k";
+ pmu = "/power-management@ff000000";
+ power = "/power-management@ff000000/power-controller";
+ pmugrf = "/syscon@ff010000";
+ pmu_io_domains = "/syscon@ff010000/io-domains";
+ pmu_pvtm = "/syscon@ff010000/pmu-pvtm";
+ uart0 = "/serial@ff030000";
+ i2s0_8ch = "/i2s@ff060000";
+ i2s1_2ch = "/i2s@ff070000";
+ i2s2_2ch = "/i2s@ff080000";
+ pdm = "/pdm@ff0a0000";
+ crypto = "/crypto@ff0b0000";
+ rng = "/rng@ff0b0000";
+ gic = "/interrupt-controller@ff131000";
+ grf = "/syscon@ff140000";
+ io_domains = "/syscon@ff140000/io-domains";
+ lvds = "/syscon@ff140000/lvds";
+ lvds_in_vopb = "/syscon@ff140000/lvds/ports/port@0/endpoint@0";
+ rgb = "/syscon@ff140000/rgb";
+ rgb_in_vopb = "/syscon@ff140000/rgb/ports/port@0/endpoint@0";
+ core_grf = "/syscon@ff148000";
+ pvtm = "/syscon@ff148000/pvtm";
+ uart1 = "/serial@ff158000";
+ uart2 = "/serial@ff160000";
+ uart3 = "/serial@ff168000";
+ uart4 = "/serial@ff170000";
+ uart5 = "/serial@ff178000";
+ i2c0 = "/i2c@ff180000";
+ rk817 = "/i2c@ff180000/pmic@20";
+ pinctrl_rk8xx = "/i2c@ff180000/pmic@20/pinctrl_rk8xx";
+ rk817_ts_gpio1 = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_ts_gpio1";
+ rk817_gt_gpio2 = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_gt_gpio2";
+ rk817_pin_ts = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_pin_ts";
+ rk817_pin_gt = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_pin_gt";
+ rk817_slppin_null = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_slppin_null";
+ rk817_slppin_slp = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_slppin_slp";
+ rk817_slppin_pwrdn = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_slppin_pwrdn";
+ rk817_slppin_rst = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_slppin_rst";
+ vdd_logic = "/i2c@ff180000/pmic@20/regulators/DCDC_REG1";
+ vdd_arm = "/i2c@ff180000/pmic@20/regulators/DCDC_REG2";
+ vcc_ddr = "/i2c@ff180000/pmic@20/regulators/DCDC_REG3";
+ vcc_3v3 = "/i2c@ff180000/pmic@20/regulators/DCDC_REG4";
+ vcc_1v0 = "/i2c@ff180000/pmic@20/regulators/LDO_REG1";
+ vcc1v8_soc = "/i2c@ff180000/pmic@20/regulators/LDO_REG2";
+ vdd1v0_soc = "/i2c@ff180000/pmic@20/regulators/LDO_REG3";
+ vcc3v3_pmu = "/i2c@ff180000/pmic@20/regulators/LDO_REG4";
+ vccio_sd = "/i2c@ff180000/pmic@20/regulators/LDO_REG5";
+ vcc_sd = "/i2c@ff180000/pmic@20/regulators/LDO_REG6";
+ vcc_backlight = "/i2c@ff180000/pmic@20/regulators/LDO_REG7";
+ vcc_lcd = "/i2c@ff180000/pmic@20/regulators/LDO_REG8";
+ dcdc_boost = "/i2c@ff180000/pmic@20/regulators/BOOST";
+ otg_switch = "/i2c@ff180000/pmic@20/regulators/OTG_SWITCH";
+ rk817_codec = "/i2c@ff180000/pmic@20/codec";
+ i2c1 = "/i2c@ff190000";
+ i2c2 = "/i2c@ff1a0000";
+ i2c3 = "/i2c@ff1b0000";
+ spi0 = "/spi@ff1d0000";
+ spi1 = "/spi@ff1d8000";
+ wdt = "/watchdog@ff1e0000";
+ pwm0 = "/pwm@ff200000";
+ pwm1 = "/pwm@ff200010";
+ pwm2 = "/pwm@ff200020";
+ pwm3 = "/pwm@ff200030";
+ pwm4 = "/pwm@ff208000";
+ pwm5 = "/pwm@ff208010";
+ pwm6 = "/pwm@ff208020";
+ pwm7 = "/pwm@ff208030";
+ rktimer = "/rktimer@ff210000";
+ dmac = "/amba/dmac@ff240000";
+ thermal_zones = "/thermal-zones";
+ soc_thermal = "/thermal-zones/soc-thermal";
+ threshold = "/thermal-zones/soc-thermal/trips/trip-point-0";
+ target = "/thermal-zones/soc-thermal/trips/trip-point-1";
+ soc_crit = "/thermal-zones/soc-thermal/trips/soc-crit";
+ gpu_thermal = "/thermal-zones/gpu-thermal";
+ tsadc = "/tsadc@ff280000";
+ saradc = "/saradc@ff288000";
+ otp = "/otp@ff290000";
+ otp_id = "/otp@ff290000/id@7";
+ cpu_leakage = "/otp@ff290000/cpu-leakage@17";
+ performance = "/otp@ff290000/performance@1e";
+ cru = "/clock-controller@ff2b0000";
+ cpu_boost = "/cpu-boost@ff2b8000";
+ pmucru = "/pmu-clock-controller@ff2bc000";
+ usb2phy_grf = "/syscon@ff2c0000";
+ u2phy = "/syscon@ff2c0000/usb2-phy@100";
+ u2phy_host = "/syscon@ff2c0000/usb2-phy@100/host-port";
+ u2phy_otg = "/syscon@ff2c0000/usb2-phy@100/otg-port";
+ video_phy = "/video-phy@ff2e0000";
+ mipi_dphy_rx0 = "/mipi-dphy-rx0@ff2f0000";
+ usb20_otg = "/usb@ff300000";
+ usb_host0_ehci = "/usb@ff340000";
+ usb_host0_ohci = "/usb@ff350000";
+ gmac = "/ethernet@ff360000";
+ sdmmc = "/dwmmc@ff370000";
+ sdio = "/dwmmc@ff380000";
+ emmc = "/dwmmc@ff390000";
+ nandc0 = "/nandc@ff3b0000";
+ sfc = "/sfc@ff3a0000";
+ gpu = "/gpu@ff400000";
+ gpu_opp_table = "/gpu-opp-table";
+ hevc = "/hevc_service@ff440000";
+ vpu = "/vpu_service@ff442000";
+ vpu_combo = "/vpu_combo";
+ hevc_mmu = "/iommu@ff440440";
+ vpu_mmu = "/iommu@ff442800";
+ dsi = "/dsi@ff450000";
+ dsi_in_vopb = "/dsi@ff450000/ports/port@0/endpoint@0";
+ timing0 = "/dsi@ff450000/panel@0/display-timings/60Hz";
+ timing1 = "/dsi@ff450000/panel@0/display-timings/50Hz";
+ timing2 = "/dsi@ff450000/panel@0/display-timings/75Hz";
+ vopb = "/vop@ff460000";
+ vopb_out = "/vop@ff460000/port";
+ vopb_out_lvds = "/vop@ff460000/port/endpoint@0";
+ vopb_out_dsi = "/vop@ff460000/port/endpoint@1";
+ vopb_out_rgb = "/vop@ff460000/port/endpoint@2";
+ vopb_mmu = "/iommu@ff460f00";
+ rk_rga = "/rk_rga@ff480000";
+ cif = "/cif@ff490000";
+ cif_new = "/cif-new@ff490000";
+ vip_mmu = "/iommu@ff490800";
+ rk_isp = "/rk_isp@ff4a0000";
+ rkisp1 = "/rkisp1@ff4a0000";
+ isp_mmu = "/iommu@ff4a8000";
+ qos_gmac = "/qos@ff518000";
+ qos_gpu = "/qos@ff520000";
+ qos_sdmmc = "/qos@ff52c000";
+ qos_emmc = "/qos@ff538000";
+ qos_nand = "/qos@ff538080";
+ qos_sdio = "/qos@ff538100";
+ qos_sfc = "/qos@ff538180";
+ qos_usb_host = "/qos@ff540000";
+ qos_usb_otg = "/qos@ff540080";
+ qos_isp_128 = "/qos@ff548000";
+ qos_isp_rd = "/qos@ff548080";
+ qos_isp_wr = "/qos@ff548100";
+ qos_isp_m1 = "/qos@ff548180";
+ qos_vip = "/qos@ff548200";
+ qos_rga_rd = "/qos@ff550000";
+ qos_rga_wr = "/qos@ff550080";
+ qos_vop_m0 = "/qos@ff550100";
+ qos_vop_m1 = "/qos@ff550180";
+ qos_vpu = "/qos@ff558000";
+ qos_vpu_r128 = "/qos@ff558080";
+ dfi = "/dfi@ff610000";
+ dmc = "/dmc";
+ ddr_power_model = "/dmc/ddr_power_model";
+ dmc_opp_table = "/dmc-opp-table";
+ rockchip_system_monitor = "/rockchip-system-monitor";
+ pinctrl = "/pinctrl";
+ gpio0 = "/pinctrl/gpio0@ff040000";
+ gpio1 = "/pinctrl/gpio1@ff250000";
+ gpio2 = "/pinctrl/gpio2@ff260000";
+ gpio3 = "/pinctrl/gpio3@ff270000";
+ pcfg_pull_up = "/pinctrl/pcfg-pull-up";
+ pcfg_pull_down = "/pinctrl/pcfg-pull-down";
+ pcfg_pull_none = "/pinctrl/pcfg-pull-none";
+ pcfg_pull_none_2ma = "/pinctrl/pcfg-pull-none-2ma";
+ pcfg_pull_up_2ma = "/pinctrl/pcfg-pull-up-2ma";
+ pcfg_pull_up_4ma = "/pinctrl/pcfg-pull-up-4ma";
+ pcfg_pull_none_4ma = "/pinctrl/pcfg-pull-none-4ma";
+ pcfg_pull_down_4ma = "/pinctrl/pcfg-pull-down-4ma";
+ pcfg_pull_none_8ma = "/pinctrl/pcfg-pull-none-8ma";
+ pcfg_pull_up_8ma = "/pinctrl/pcfg-pull-up-8ma";
+ pcfg_pull_none_12ma = "/pinctrl/pcfg-pull-none-12ma";
+ pcfg_pull_up_12ma = "/pinctrl/pcfg-pull-up-12ma";
+ pcfg_pull_none_smt = "/pinctrl/pcfg-pull-none-smt";
+ pcfg_output_high = "/pinctrl/pcfg-output-high";
+ pcfg_output_low = "/pinctrl/pcfg-output-low";
+ pcfg_input_high = "/pinctrl/pcfg-input-high";
+ pcfg_input = "/pinctrl/pcfg-input";
+ i2c0_xfer = "/pinctrl/i2c0/i2c0-xfer";
+ i2c1_xfer = "/pinctrl/i2c1/i2c1-xfer";
+ i2c2_xfer = "/pinctrl/i2c2/i2c2-xfer";
+ i2c3_xfer = "/pinctrl/i2c3/i2c3-xfer";
+ tsadc_otp_gpio = "/pinctrl/tsadc/tsadc-otp-gpio";
+ tsadc_otp_out = "/pinctrl/tsadc/tsadc-otp-out";
+ uart0_xfer = "/pinctrl/uart0/uart0-xfer";
+ uart0_cts = "/pinctrl/uart0/uart0-cts";
+ uart0_rts = "/pinctrl/uart0/uart0-rts";
+ uart0_rts_gpio = "/pinctrl/uart0/uart0-rts-gpio";
+ uart1_xfer = "/pinctrl/uart1/uart1-xfer";
+ uart1_cts = "/pinctrl/uart1/uart1-cts";
+ uart1_rts = "/pinctrl/uart1/uart1-rts";
+ uart1_rts_gpio = "/pinctrl/uart1/uart1-rts-gpio";
+ uart2m0_xfer = "/pinctrl/uart2-m0/uart2m0-xfer";
+ uart2m1_xfer = "/pinctrl/uart2-m1/uart2m1-xfer";
+ uart3m0_xfer = "/pinctrl/uart3-m0/uart3m0-xfer";
+ uart3m0_cts = "/pinctrl/uart3-m0/uart3m0-cts";
+ uart3m0_rts = "/pinctrl/uart3-m0/uart3m0-rts";
+ uart3m0_rts_gpio = "/pinctrl/uart3-m0/uart3m0-rts-gpio";
+ uart3m1_xfer = "/pinctrl/uart3-m1/uart3m1-xfer";
+ uart3m1_cts = "/pinctrl/uart3-m1/uart3m1-cts";
+ uart3m1_rts = "/pinctrl/uart3-m1/uart3m1-rts";
+ uart3m1_rts_gpio = "/pinctrl/uart3-m1/uart3m1-rts-gpio";
+ uart4_xfer = "/pinctrl/uart4/uart4-xfer";
+ uart4_cts = "/pinctrl/uart4/uart4-cts";
+ uart4_rts = "/pinctrl/uart4/uart4-rts";
+ uart5_xfer = "/pinctrl/uart5/uart5-xfer";
+ uart5_cts = "/pinctrl/uart5/uart5-cts";
+ uart5_rts = "/pinctrl/uart5/uart5-rts";
+ spi0_clk = "/pinctrl/spi0/spi0-clk";
+ spi0_csn = "/pinctrl/spi0/spi0-csn";
+ spi0_miso = "/pinctrl/spi0/spi0-miso";
+ spi0_mosi = "/pinctrl/spi0/spi0-mosi";
+ spi0_clk_hs = "/pinctrl/spi0/spi0-clk-hs";
+ spi0_miso_hs = "/pinctrl/spi0/spi0-miso-hs";
+ spi0_mosi_hs = "/pinctrl/spi0/spi0-mosi-hs";
+ spi1_clk = "/pinctrl/spi1/spi1-clk";
+ spi1_csn0 = "/pinctrl/spi1/spi1-csn0";
+ spi1_csn1 = "/pinctrl/spi1/spi1-csn1";
+ spi1_miso = "/pinctrl/spi1/spi1-miso";
+ spi1_mosi = "/pinctrl/spi1/spi1-mosi";
+ spi1_clk_hs = "/pinctrl/spi1/spi1-clk-hs";
+ spi1_miso_hs = "/pinctrl/spi1/spi1-miso-hs";
+ spi1_mosi_hs = "/pinctrl/spi1/spi1-mosi-hs";
+ pdm_clk0m0 = "/pinctrl/pdm/pdm-clk0m0";
+ pdm_clk0m1 = "/pinctrl/pdm/pdm-clk0m1";
+ pdm_clk1 = "/pinctrl/pdm/pdm-clk1";
+ pdm_sdi0m0 = "/pinctrl/pdm/pdm-sdi0m0";
+ pdm_sdi0m1 = "/pinctrl/pdm/pdm-sdi0m1";
+ pdm_sdi1 = "/pinctrl/pdm/pdm-sdi1";
+ pdm_sdi2 = "/pinctrl/pdm/pdm-sdi2";
+ pdm_sdi3 = "/pinctrl/pdm/pdm-sdi3";
+ pdm_clk0m0_sleep = "/pinctrl/pdm/pdm-clk0m0-sleep";
+ pdm_clk0m_sleep1 = "/pinctrl/pdm/pdm-clk0m1-sleep";
+ pdm_clk1_sleep = "/pinctrl/pdm/pdm-clk1-sleep";
+ pdm_sdi0m0_sleep = "/pinctrl/pdm/pdm-sdi0m0-sleep";
+ pdm_sdi0m1_sleep = "/pinctrl/pdm/pdm-sdi0m1-sleep";
+ pdm_sdi1_sleep = "/pinctrl/pdm/pdm-sdi1-sleep";
+ pdm_sdi2_sleep = "/pinctrl/pdm/pdm-sdi2-sleep";
+ pdm_sdi3_sleep = "/pinctrl/pdm/pdm-sdi3-sleep";
+ i2s0_8ch_mclk = "/pinctrl/i2s0/i2s0-8ch-mclk";
+ i2s0_8ch_sclktx = "/pinctrl/i2s0/i2s0-8ch-sclktx";
+ i2s0_8ch_sclkrx = "/pinctrl/i2s0/i2s0-8ch-sclkrx";
+ i2s0_8ch_lrcktx = "/pinctrl/i2s0/i2s0-8ch-lrcktx";
+ i2s0_8ch_lrckrx = "/pinctrl/i2s0/i2s0-8ch-lrckrx";
+ i2s0_8ch_sdo0 = "/pinctrl/i2s0/i2s0-8ch-sdo0";
+ i2s0_8ch_sdo1 = "/pinctrl/i2s0/i2s0-8ch-sdo1";
+ i2s0_8ch_sdo2 = "/pinctrl/i2s0/i2s0-8ch-sdo2";
+ i2s0_8ch_sdo3 = "/pinctrl/i2s0/i2s0-8ch-sdo3";
+ i2s0_8ch_sdi0 = "/pinctrl/i2s0/i2s0-8ch-sdi0";
+ i2s0_8ch_sdi1 = "/pinctrl/i2s0/i2s0-8ch-sdi1";
+ i2s0_8ch_sdi2 = "/pinctrl/i2s0/i2s0-8ch-sdi2";
+ i2s0_8ch_sdi3 = "/pinctrl/i2s0/i2s0-8ch-sdi3";
+ i2s1_2ch_mclk = "/pinctrl/i2s1/i2s1-2ch-mclk";
+ i2s1_2ch_sclk = "/pinctrl/i2s1/i2s1-2ch-sclk";
+ i2s1_2ch_lrck = "/pinctrl/i2s1/i2s1-2ch-lrck";
+ i2s1_2ch_sdi = "/pinctrl/i2s1/i2s1-2ch-sdi";
+ i2s1_2ch_sdo = "/pinctrl/i2s1/i2s1-2ch-sdo";
+ i2s2_2ch_mclk = "/pinctrl/i2s2/i2s2-2ch-mclk";
+ i2s2_2ch_sclk = "/pinctrl/i2s2/i2s2-2ch-sclk";
+ i2s2_2ch_lrck = "/pinctrl/i2s2/i2s2-2ch-lrck";
+ i2s2_2ch_sdi = "/pinctrl/i2s2/i2s2-2ch-sdi";
+ i2s2_2ch_sdo = "/pinctrl/i2s2/i2s2-2ch-sdo";
+ sdmmc_clk = "/pinctrl/sdmmc/sdmmc-clk";
+ sdmmc_cmd = "/pinctrl/sdmmc/sdmmc-cmd";
+ sdmmc_det = "/pinctrl/sdmmc/sdmmc-det";
+ sdmmc_bus1 = "/pinctrl/sdmmc/sdmmc-bus1";
+ sdmmc_bus4 = "/pinctrl/sdmmc/sdmmc-bus4";
+ sdmmc_gpio = "/pinctrl/sdmmc/sdmmc-gpio";
+ sdio_clk = "/pinctrl/sdio/sdio-clk";
+ sdio_cmd = "/pinctrl/sdio/sdio-cmd";
+ sdio_bus4 = "/pinctrl/sdio/sdio-bus4";
+ sdio_gpio = "/pinctrl/sdio/sdio-gpio";
+ emmc_clk = "/pinctrl/emmc/emmc-clk";
+ emmc_cmd = "/pinctrl/emmc/emmc-cmd";
+ emmc_pwren = "/pinctrl/emmc/emmc-pwren";
+ emmc_rstnout = "/pinctrl/emmc/emmc-rstnout";
+ emmc_bus1 = "/pinctrl/emmc/emmc-bus1";
+ emmc_bus4 = "/pinctrl/emmc/emmc-bus4";
+ emmc_bus8 = "/pinctrl/emmc/emmc-bus8";
+ flash_cs0 = "/pinctrl/flash/flash-cs0";
+ flash_rdy = "/pinctrl/flash/flash-rdy";
+ flash_dqs = "/pinctrl/flash/flash-dqs";
+ flash_ale = "/pinctrl/flash/flash-ale";
+ flash_cle = "/pinctrl/flash/flash-cle";
+ flash_wrn = "/pinctrl/flash/flash-wrn";
+ flash_csl = "/pinctrl/flash/flash-csl";
+ flash_rdn = "/pinctrl/flash/flash-rdn";
+ flash_bus8 = "/pinctrl/flash/flash-bus8";
+ lcdc_m0_rgb_pins = "/pinctrl/lcdc/lcdc-m0-rgb-pins";
+ lcdc_m0_sleep_pins = "/pinctrl/lcdc/lcdc-m0-sleep-pins";
+ lcdc_m1_rgb_pins = "/pinctrl/lcdc/lcdc-m1-rgb-pins";
+ lcdc_m1_sleep_pins = "/pinctrl/lcdc/lcdc-m1-sleep-pins";
+ pwm0_pin = "/pinctrl/pwm0/pwm0-pin";
+ pwm1_pin = "/pinctrl/pwm1/pwm1-pin";
+ pwm2_pin = "/pinctrl/pwm2/pwm2-pin";
+ pwm3_pin = "/pinctrl/pwm3/pwm3-pin";
+ pwm4_pin = "/pinctrl/pwm4/pwm4-pin";
+ pwm5_pin = "/pinctrl/pwm5/pwm5-pin";
+ pwm6_pin = "/pinctrl/pwm6/pwm6-pin";
+ pwm7_pin = "/pinctrl/pwm7/pwm7-pin";
+ rmii_pins = "/pinctrl/gmac/rmii-pins";
+ mac_refclk_12ma = "/pinctrl/gmac/mac-refclk-12ma";
+ mac_refclk = "/pinctrl/gmac/mac-refclk";
+ cif_clkout_m0 = "/pinctrl/cif-m0/cif-clkout-m0";
+ dvp_d2d9_m0 = "/pinctrl/cif-m0/dvp-d2d9-m0";
+ dvp_d0d1_m0 = "/pinctrl/cif-m0/dvp-d0d1-m0";
+ dvp_d10d11_m0 = "/pinctrl/cif-m0/d10-d11-m0";
+ cif_clkout_m1 = "/pinctrl/cif-m1/cif-clkout-m1";
+ dvp_d2d9_m1 = "/pinctrl/cif-m1/dvp-d2d9-m1";
+ dvp_d0d1_m1 = "/pinctrl/cif-m1/dvp-d0d1-m1";
+ dvp_d10d11_m1 = "/pinctrl/cif-m1/d10-d11-m1";
+ isp_prelight = "/pinctrl/isp/isp-prelight";
+ pmic_int = "/pinctrl/pmic/pmic_int";
+ soc_slppin_gpio = "/pinctrl/pmic/soc_slppin_gpio";
+ soc_slppin_slp = "/pinctrl/pmic/soc_slppin_slp";
+ soc_slppin_rst = "/pinctrl/pmic/soc_slppin_rst";
+ led_pins = "/pinctrl/leds/led-pins";
+ btn_pins = "/pinctrl/btns/btn-pins";
+ drm_logo = "/reserved-memory/drm-logo@00000000";
+ ramoops_mem = "/reserved-memory/region@110000";
+ gpio_keys = "/odroidgo3-keys";
+ joypad = "/odroidgo3-joypad";
+ leds = "/gpio_leds";
+ backlight = "/backlight";
+ vccsys = "/vccsys";
+ };
+};
diff --git a/config/archr-dts/R36S-DTB/DTS/Panel5.dts b/config/archr-dts/R36S-DTB/DTS/Panel5.dts
new file mode 100644
index 0000000000..6d5b540b37
--- /dev/null
+++ b/config/archr-dts/R36S-DTB/DTS/Panel5.dts
@@ -0,0 +1,4079 @@
+/dts-v1/;
+
+/ {
+ compatible = "rockchip,rk3326-odroidgo3-linux\0rockchip,rk3326";
+ interrupt-parent = <0x01>;
+ #address-cells = <0x02>;
+ #size-cells = <0x02>;
+ model = "Rockchip RK3326";
+
+ ddr_timing {
+ compatible = "rockchip,ddr-timing";
+ ddr2_speed_bin = <0x00>;
+ ddr3_speed_bin = <0x15>;
+ ddr4_speed_bin = <0x0c>;
+ pd_idle = <0x0d>;
+ sr_idle = <0x5d>;
+ sr_mc_gate_idle = <0x00>;
+ srpd_lite_idle = <0x00>;
+ standby_idle = <0x00>;
+ auto_pd_dis_freq = <0x42a>;
+ auto_sr_dis_freq = <0x320>;
+ ddr2_dll_dis_freq = <0x12c>;
+ ddr3_dll_dis_freq = <0x12c>;
+ ddr4_dll_dis_freq = <0x271>;
+ phy_dll_dis_freq = <0x190>;
+ ddr2_odt_dis_freq = <0x64>;
+ phy_ddr2_odt_dis_freq = <0x64>;
+ ddr2_drv = <0x01>;
+ ddr2_odt = <0x96>;
+ phy_ddr2_ca_drv = <0x15>;
+ phy_ddr2_ck_drv = <0x12>;
+ phy_ddr2_dq_drv = <0x15>;
+ phy_ddr2_odt = <0x02>;
+ ddr3_odt_dis_freq = <0x190>;
+ phy_ddr3_odt_dis_freq = <0x190>;
+ ddr3_drv = <0x28>;
+ ddr3_odt = <0x78>;
+ phy_ddr3_ca_drv = <0x15>;
+ phy_ddr3_ck_drv = <0x12>;
+ phy_ddr3_dq_drv = <0x15>;
+ phy_ddr3_odt = <0x02>;
+ phy_lpddr2_odt_dis_freq = <0x29a>;
+ lpddr2_drv = <0x28>;
+ phy_lpddr2_ca_drv = <0x16>;
+ phy_lpddr2_ck_drv = <0x13>;
+ phy_lpddr2_dq_drv = <0x16>;
+ phy_lpddr2_odt = <0x00>;
+ lpddr3_odt_dis_freq = <0x190>;
+ phy_lpddr3_odt_dis_freq = <0x190>;
+ lpddr3_drv = <0x28>;
+ lpddr3_odt = <0xf0>;
+ phy_lpddr3_ca_drv = <0x16>;
+ phy_lpddr3_ck_drv = <0x13>;
+ phy_lpddr3_dq_drv = <0x16>;
+ phy_lpddr3_odt = <0x02>;
+ lpddr4_odt_dis_freq = <0x320>;
+ phy_lpddr4_odt_dis_freq = <0x320>;
+ lpddr4_drv = <0x3c>;
+ lpddr4_dq_odt = <0x28>;
+ lpddr4_ca_odt = <0x28>;
+ phy_lpddr4_ca_drv = <0x14>;
+ phy_lpddr4_ck_cs_drv = <0x06>;
+ phy_lpddr4_dq_drv = <0x06>;
+ phy_lpddr4_odt = <0x10>;
+ ddr4_odt_dis_freq = <0x29a>;
+ phy_ddr4_odt_dis_freq = <0x29a>;
+ ddr4_drv = <0x22>;
+ ddr4_odt = <0xf0>;
+ phy_ddr4_ca_drv = <0x16>;
+ phy_ddr4_ck_drv = <0x13>;
+ phy_ddr4_dq_drv = <0x16>;
+ phy_ddr4_odt = <0x02>;
+ ddr3a1_ddr4a9_de-skew = <0x06>;
+ ddr3a0_ddr4a10_de-skew = <0x07>;
+ ddr3a3_ddr4a6_de-skew = <0x07>;
+ ddr3a2_ddr4a4_de-skew = <0x07>;
+ ddr3a5_ddr4a8_de-skew = <0x07>;
+ ddr3a4_ddr4a5_de-skew = <0x07>;
+ ddr3a7_ddr4a11_de-skew = <0x07>;
+ ddr3a6_ddr4a7_de-skew = <0x06>;
+ ddr3a9_ddr4a0_de-skew = <0x07>;
+ ddr3a8_ddr4a13_de-skew = <0x07>;
+ ddr3a11_ddr4a3_de-skew = <0x07>;
+ ddr3a10_ddr4cs0_de-skew = <0x07>;
+ ddr3a13_ddr4a2_de-skew = <0x07>;
+ ddr3a12_ddr4ba1_de-skew = <0x07>;
+ ddr3a15_ddr4odt0_de-skew = <0x07>;
+ ddr3a14_ddr4a1_de-skew = <0x07>;
+ ddr3ba1_ddr4a15_de-skew = <0x07>;
+ ddr3ba0_ddr4bg0_de-skew = <0x07>;
+ ddr3ras_ddr4cke_de-skew = <0x07>;
+ ddr3ba2_ddr4ba0_de-skew = <0x07>;
+ ddr3we_ddr4bg1_de-skew = <0x07>;
+ ddr3cas_ddr4a12_de-skew = <0x07>;
+ ddr3ckn_ddr4ckn_de-skew = <0x07>;
+ ddr3ckp_ddr4ckp_de-skew = <0x07>;
+ ddr3cke_ddr4a16_de-skew = <0x07>;
+ ddr3odt0_ddr4a14_de-skew = <0x07>;
+ ddr3cs0_ddr4act_de-skew = <0x06>;
+ ddr3reset_ddr4reset_de-skew = <0x07>;
+ ddr3cs1_ddr4cs1_de-skew = <0x06>;
+ ddr3odt1_ddr4odt1_de-skew = <0x07>;
+ cs0_dm0_rx_de-skew = <0x07>;
+ cs0_dm0_tx_de-skew = <0x07>;
+ cs0_dq0_rx_de-skew = <0x08>;
+ cs0_dq0_tx_de-skew = <0x08>;
+ cs0_dq1_rx_de-skew = <0x09>;
+ cs0_dq1_tx_de-skew = <0x08>;
+ cs0_dq2_rx_de-skew = <0x08>;
+ cs0_dq2_tx_de-skew = <0x08>;
+ cs0_dq3_rx_de-skew = <0x08>;
+ cs0_dq3_tx_de-skew = <0x08>;
+ cs0_dq4_rx_de-skew = <0x09>;
+ cs0_dq4_tx_de-skew = <0x08>;
+ cs0_dq5_rx_de-skew = <0x09>;
+ cs0_dq5_tx_de-skew = <0x08>;
+ cs0_dq6_rx_de-skew = <0x09>;
+ cs0_dq6_tx_de-skew = <0x08>;
+ cs0_dq7_rx_de-skew = <0x08>;
+ cs0_dq7_tx_de-skew = <0x08>;
+ cs0_dqs0_rx_de-skew = <0x06>;
+ cs0_dqs0p_tx_de-skew = <0x09>;
+ cs0_dqs0n_tx_de-skew = <0x09>;
+ cs0_dm1_rx_de-skew = <0x07>;
+ cs0_dm1_tx_de-skew = <0x06>;
+ cs0_dq8_rx_de-skew = <0x08>;
+ cs0_dq8_tx_de-skew = <0x07>;
+ cs0_dq9_rx_de-skew = <0x09>;
+ cs0_dq9_tx_de-skew = <0x07>;
+ cs0_dq10_rx_de-skew = <0x08>;
+ cs0_dq10_tx_de-skew = <0x08>;
+ cs0_dq11_rx_de-skew = <0x08>;
+ cs0_dq11_tx_de-skew = <0x07>;
+ cs0_dq12_rx_de-skew = <0x08>;
+ cs0_dq12_tx_de-skew = <0x08>;
+ cs0_dq13_rx_de-skew = <0x09>;
+ cs0_dq13_tx_de-skew = <0x07>;
+ cs0_dq14_rx_de-skew = <0x09>;
+ cs0_dq14_tx_de-skew = <0x08>;
+ cs0_dq15_rx_de-skew = <0x09>;
+ cs0_dq15_tx_de-skew = <0x07>;
+ cs0_dqs1_rx_de-skew = <0x07>;
+ cs0_dqs1p_tx_de-skew = <0x09>;
+ cs0_dqs1n_tx_de-skew = <0x09>;
+ cs0_dm2_rx_de-skew = <0x07>;
+ cs0_dm2_tx_de-skew = <0x07>;
+ cs0_dq16_rx_de-skew = <0x09>;
+ cs0_dq16_tx_de-skew = <0x09>;
+ cs0_dq17_rx_de-skew = <0x07>;
+ cs0_dq17_tx_de-skew = <0x09>;
+ cs0_dq18_rx_de-skew = <0x07>;
+ cs0_dq18_tx_de-skew = <0x08>;
+ cs0_dq19_rx_de-skew = <0x07>;
+ cs0_dq19_tx_de-skew = <0x09>;
+ cs0_dq20_rx_de-skew = <0x09>;
+ cs0_dq20_tx_de-skew = <0x09>;
+ cs0_dq21_rx_de-skew = <0x09>;
+ cs0_dq21_tx_de-skew = <0x09>;
+ cs0_dq22_rx_de-skew = <0x08>;
+ cs0_dq22_tx_de-skew = <0x09>;
+ cs0_dq23_rx_de-skew = <0x08>;
+ cs0_dq23_tx_de-skew = <0x09>;
+ cs0_dqs2_rx_de-skew = <0x06>;
+ cs0_dqs2p_tx_de-skew = <0x09>;
+ cs0_dqs2n_tx_de-skew = <0x09>;
+ cs0_dm3_rx_de-skew = <0x07>;
+ cs0_dm3_tx_de-skew = <0x07>;
+ cs0_dq24_rx_de-skew = <0x08>;
+ cs0_dq24_tx_de-skew = <0x08>;
+ cs0_dq25_rx_de-skew = <0x09>;
+ cs0_dq25_tx_de-skew = <0x09>;
+ cs0_dq26_rx_de-skew = <0x09>;
+ cs0_dq26_tx_de-skew = <0x08>;
+ cs0_dq27_rx_de-skew = <0x09>;
+ cs0_dq27_tx_de-skew = <0x08>;
+ cs0_dq28_rx_de-skew = <0x09>;
+ cs0_dq28_tx_de-skew = <0x09>;
+ cs0_dq29_rx_de-skew = <0x09>;
+ cs0_dq29_tx_de-skew = <0x09>;
+ cs0_dq30_rx_de-skew = <0x08>;
+ cs0_dq30_tx_de-skew = <0x08>;
+ cs0_dq31_rx_de-skew = <0x08>;
+ cs0_dq31_tx_de-skew = <0x08>;
+ cs0_dqs3_rx_de-skew = <0x07>;
+ cs0_dqs3p_tx_de-skew = <0x09>;
+ cs0_dqs3n_tx_de-skew = <0x09>;
+ cs1_dm0_rx_de-skew = <0x07>;
+ cs1_dm0_tx_de-skew = <0x07>;
+ cs1_dq0_rx_de-skew = <0x08>;
+ cs1_dq0_tx_de-skew = <0x08>;
+ cs1_dq1_rx_de-skew = <0x09>;
+ cs1_dq1_tx_de-skew = <0x08>;
+ cs1_dq2_rx_de-skew = <0x08>;
+ cs1_dq2_tx_de-skew = <0x08>;
+ cs1_dq3_rx_de-skew = <0x08>;
+ cs1_dq3_tx_de-skew = <0x08>;
+ cs1_dq4_rx_de-skew = <0x08>;
+ cs1_dq4_tx_de-skew = <0x08>;
+ cs1_dq5_rx_de-skew = <0x09>;
+ cs1_dq5_tx_de-skew = <0x08>;
+ cs1_dq6_rx_de-skew = <0x09>;
+ cs1_dq6_tx_de-skew = <0x08>;
+ cs1_dq7_rx_de-skew = <0x08>;
+ cs1_dq7_tx_de-skew = <0x08>;
+ cs1_dqs0_rx_de-skew = <0x06>;
+ cs1_dqs0p_tx_de-skew = <0x09>;
+ cs1_dqs0n_tx_de-skew = <0x09>;
+ cs1_dm1_rx_de-skew = <0x07>;
+ cs1_dm1_tx_de-skew = <0x07>;
+ cs1_dq8_rx_de-skew = <0x08>;
+ cs1_dq8_tx_de-skew = <0x08>;
+ cs1_dq9_rx_de-skew = <0x08>;
+ cs1_dq9_tx_de-skew = <0x07>;
+ cs1_dq10_rx_de-skew = <0x07>;
+ cs1_dq10_tx_de-skew = <0x08>;
+ cs1_dq11_rx_de-skew = <0x08>;
+ cs1_dq11_tx_de-skew = <0x08>;
+ cs1_dq12_rx_de-skew = <0x08>;
+ cs1_dq12_tx_de-skew = <0x07>;
+ cs1_dq13_rx_de-skew = <0x08>;
+ cs1_dq13_tx_de-skew = <0x08>;
+ cs1_dq14_rx_de-skew = <0x08>;
+ cs1_dq14_tx_de-skew = <0x08>;
+ cs1_dq15_rx_de-skew = <0x08>;
+ cs1_dq15_tx_de-skew = <0x07>;
+ cs1_dqs1_rx_de-skew = <0x07>;
+ cs1_dqs1p_tx_de-skew = <0x09>;
+ cs1_dqs1n_tx_de-skew = <0x09>;
+ cs1_dm2_rx_de-skew = <0x07>;
+ cs1_dm2_tx_de-skew = <0x08>;
+ cs1_dq16_rx_de-skew = <0x08>;
+ cs1_dq16_tx_de-skew = <0x09>;
+ cs1_dq17_rx_de-skew = <0x08>;
+ cs1_dq17_tx_de-skew = <0x09>;
+ cs1_dq18_rx_de-skew = <0x07>;
+ cs1_dq18_tx_de-skew = <0x08>;
+ cs1_dq19_rx_de-skew = <0x08>;
+ cs1_dq19_tx_de-skew = <0x09>;
+ cs1_dq20_rx_de-skew = <0x09>;
+ cs1_dq20_tx_de-skew = <0x09>;
+ cs1_dq21_rx_de-skew = <0x09>;
+ cs1_dq21_tx_de-skew = <0x09>;
+ cs1_dq22_rx_de-skew = <0x08>;
+ cs1_dq22_tx_de-skew = <0x09>;
+ cs1_dq23_rx_de-skew = <0x08>;
+ cs1_dq23_tx_de-skew = <0x09>;
+ cs1_dqs2_rx_de-skew = <0x06>;
+ cs1_dqs2p_tx_de-skew = <0x09>;
+ cs1_dqs2n_tx_de-skew = <0x09>;
+ cs1_dm3_rx_de-skew = <0x07>;
+ cs1_dm3_tx_de-skew = <0x07>;
+ cs1_dq24_rx_de-skew = <0x08>;
+ cs1_dq24_tx_de-skew = <0x09>;
+ cs1_dq25_rx_de-skew = <0x09>;
+ cs1_dq25_tx_de-skew = <0x09>;
+ cs1_dq26_rx_de-skew = <0x09>;
+ cs1_dq26_tx_de-skew = <0x08>;
+ cs1_dq27_rx_de-skew = <0x08>;
+ cs1_dq27_tx_de-skew = <0x08>;
+ cs1_dq28_rx_de-skew = <0x09>;
+ cs1_dq28_tx_de-skew = <0x09>;
+ cs1_dq29_rx_de-skew = <0x09>;
+ cs1_dq29_tx_de-skew = <0x09>;
+ cs1_dq30_rx_de-skew = <0x09>;
+ cs1_dq30_tx_de-skew = <0x08>;
+ cs1_dq31_rx_de-skew = <0x08>;
+ cs1_dq31_tx_de-skew = <0x08>;
+ cs1_dqs3_rx_de-skew = <0x07>;
+ cs1_dqs3p_tx_de-skew = <0x09>;
+ cs1_dqs3n_tx_de-skew = <0x09>;
+ phandle = <0xab>;
+ };
+
+ aliases {
+ ethernet0 = "/ethernet@ff360000";
+ i2c0 = "/i2c@ff180000";
+ i2c1 = "/i2c@ff190000";
+ i2c2 = "/i2c@ff1a0000";
+ i2c3 = "/i2c@ff1b0000";
+ serial0 = "/serial@ff030000";
+ serial1 = "/serial@ff158000";
+ serial2 = "/serial@ff160000";
+ serial3 = "/serial@ff168000";
+ serial4 = "/serial@ff170000";
+ serial5 = "/serial@ff178000";
+ spi0 = "/spi@ff1d0000";
+ spi1 = "/spi@ff1d8000";
+ };
+
+ cpus {
+ #address-cells = <0x02>;
+ #size-cells = <0x00>;
+
+ cpu@0 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a35\0arm,armv8";
+ reg = <0x00 0x00>;
+ enable-method = "psci";
+ clocks = <0x02 0x07>;
+ #cooling-cells = <0x02>;
+ dynamic-power-coefficient = <0x5a>;
+ operating-points-v2 = <0x03>;
+ cpu-idle-states = <0x04 0x05>;
+ cpu-supply = <0x06>;
+ phandle = <0x09>;
+ };
+
+ cpu@1 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a35\0arm,armv8";
+ reg = <0x00 0x01>;
+ enable-method = "psci";
+ operating-points-v2 = <0x03>;
+ cpu-idle-states = <0x04 0x05>;
+ phandle = <0x0a>;
+ };
+
+ cpu@2 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a35\0arm,armv8";
+ reg = <0x00 0x02>;
+ enable-method = "psci";
+ operating-points-v2 = <0x03>;
+ cpu-idle-states = <0x04 0x05>;
+ phandle = <0x0b>;
+ };
+
+ cpu@3 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a35\0arm,armv8";
+ reg = <0x00 0x03>;
+ enable-method = "psci";
+ operating-points-v2 = <0x03>;
+ cpu-idle-states = <0x04 0x05>;
+ phandle = <0x0c>;
+ };
+
+ idle-states {
+ entry-method = "psci";
+
+ cpu-sleep {
+ compatible = "arm,idle-state";
+ local-timer-stop;
+ arm,psci-suspend-param = <0x10000>;
+ entry-latency-us = <0x78>;
+ exit-latency-us = <0xfa>;
+ min-residency-us = <0x384>;
+ phandle = <0x04>;
+ };
+
+ cluster-sleep {
+ compatible = "arm,idle-state";
+ local-timer-stop;
+ arm,psci-suspend-param = <0x1010000>;
+ entry-latency-us = <0x190>;
+ exit-latency-us = <0x1f4>;
+ min-residency-us = <0x7d0>;
+ phandle = <0x05>;
+ };
+ };
+ };
+
+ cpu0-opp-table {
+ compatible = "operating-points-v2";
+ opp-shared;
+ rockchip,temp-hysteresis = <0x1388>;
+ rockchip,low-temp = <0x00>;
+ rockchip,low-temp-min-volt = <0xf4240>;
+ rockchip,low-temp-adjust-volt = <0x00 0x5e8 0xc350>;
+ clocks = <0x02 0x01>;
+ rockchip,avs-scale = <0x04>;
+ rockchip,max-volt = <0x149970>;
+ rockchip,evb-irdrop = <0x61a8>;
+ nvmem-cells = <0x07 0x08>;
+ nvmem-cell-names = "cpu_leakage\0performance";
+ rockchip,bin-scaling-sel = <0x00 0x0d 0x01 0x0d>;
+ rockchip,pvtm-voltage-sel = <0x00 0xc350 0x00 0xc351 0xd2f0 0x01 0xd2f1 0xea60 0x02 0xea61 0x1869f 0x03>;
+ rockchip,pvtm-freq = <0x639c0>;
+ rockchip,pvtm-volt = <0xf4240>;
+ rockchip,pvtm-ch = <0x00 0x00>;
+ rockchip,pvtm-sample-time = <0x3e8>;
+ rockchip,pvtm-number = <0x0a>;
+ rockchip,pvtm-error = <0x3e8>;
+ rockchip,pvtm-ref-temp = <0x28>;
+ rockchip,pvtm-temp-prop = <0xffffffc8 0xffffffc8>;
+ rockchip,thermal-zone = "soc-thermal";
+ rockchip,avs = <0x01>;
+ phandle = <0x03>;
+
+ opp-1008000000 {
+ opp-hz = <0x00 0x3c14dc00>;
+ opp-microvolt = <0x11edd8 0x11edd8 0x149970>;
+ opp-microvolt-L0 = <0x11edd8 0x11edd8 0x149970>;
+ opp-microvolt-L1 = <0x112a88 0x112a88 0x149970>;
+ opp-microvolt-L2 = <0x112a88 0x112a88 0x149970>;
+ opp-microvolt-L3 = <0x100590 0x100590 0x149970>;
+ clock-latency-ns = <0x9c40>;
+ };
+
+ opp-1200000000 {
+ opp-hz = <0x00 0x47868c00>;
+ opp-microvolt = <0x13d620 0x13d620 0x149970>;
+ opp-microvolt-L0 = <0x13d620 0x13d620 0x149970>;
+ opp-microvolt-L1 = <0x137478 0x137478 0x149970>;
+ opp-microvolt-L2 = <0x1312d0 0x1312d0 0x149970>;
+ opp-microvolt-L3 = <0x124f80 0x124f80 0x149970>;
+ clock-latency-ns = <0x9c40>;
+ };
+
+ opp-1248000000 {
+ opp-hz = <0x00 0x4a62f800>;
+ opp-microvolt = <0x149970 0x149970 0x149970>;
+ opp-microvolt-L0 = <0x149970 0x149970 0x149970>;
+ opp-microvolt-L1 = <0x13d620 0x13d620 0x149970>;
+ opp-microvolt-L2 = <0x137478 0x137478 0x149970>;
+ opp-microvolt-L3 = <0x12b128 0x12b128 0x149970>;
+ clock-latency-ns = <0x9c40>;
+ };
+
+ opp-1296000000 {
+ opp-hz = <0x00 0x4d3f6400>;
+ opp-microvolt = <0x149970 0x149970 0x149970>;
+ opp-microvolt-L0 = <0x149970 0x149970 0x149970>;
+ opp-microvolt-L1 = <0x149970 0x149970 0x149970>;
+ opp-microvolt-L2 = <0x13d620 0x13d620 0x149970>;
+ opp-microvolt-L3 = <0x1312d0 0x1312d0 0x149970>;
+ clock-latency-ns = <0x9c40>;
+ };
+ };
+
+ arm-pmu {
+ compatible = "arm,cortex-a53-pmu";
+ interrupts = <0x00 0x64 0x04 0x00 0x65 0x04 0x00 0x66 0x04 0x00 0x67 0x04>;
+ interrupt-affinity = <0x09 0x0a 0x0b 0x0c>;
+ };
+
+ bus-soc {
+ compatible = "rockchip,px30-bus";
+ rockchip,busfreq-policy = "autocs";
+ phandle = <0xc1>;
+
+ soc-bus0 {
+ bus-id = <0x00>;
+ timer-us = <0x14>;
+ enable-msk = <0x40f7>;
+ status = "disabled";
+ };
+
+ soc-bus1 {
+ bus-id = <0x01>;
+ timer-us = <0xc8>;
+ enable-msk = <0x40bf>;
+ status = "disabled";
+ };
+
+ soc-bus2 {
+ bus-id = <0x02>;
+ timer-us = <0xc8>;
+ enable-msk = <0x4007>;
+ status = "disabled";
+ };
+ };
+
+ bus-apll {
+ compatible = "rockchip,px30-bus";
+ rockchip,busfreq-policy = "clkfreq";
+ clocks = <0x02 0x01>;
+ clock-names = "bus";
+ operating-points-v2 = <0x0d>;
+ status = "okay";
+ bus-supply = <0x0e>;
+ phandle = <0xc2>;
+ };
+
+ bus-apll-opp-table {
+ compatible = "operating-points-v2";
+ opp-shared;
+ phandle = <0x0d>;
+
+ opp-1512000000 {
+ opp-hz = <0x00 0x5a1f4a00>;
+ opp-microvolt = <0xf4240>;
+ };
+
+ opp-1008000000 {
+ opp-hz = <0x00 0x3c14dc00>;
+ opp-microvolt = <0xe7ef0>;
+ };
+ };
+
+ cpuinfo {
+ compatible = "rockchip,cpuinfo";
+ nvmem-cells = <0x0f>;
+ nvmem-cell-names = "id";
+ };
+
+ display-subsystem {
+ compatible = "rockchip,display-subsystem";
+ ports = <0x10>;
+ status = "okay";
+ logo-memory-region = <0x11>;
+ phandle = <0xc3>;
+
+ route {
+
+ route-lvds {
+ status = "disabled";
+ logo,uboot = "logo.bmp";
+ logo,kernel = "logo_kernel.bmp";
+ logo,mode = "center";
+ charge_logo,mode = "center";
+ connect = <0x12>;
+ phandle = <0xc4>;
+ };
+
+ route-dsi {
+ status = "okay";
+ logo,uboot = "logo.bmp";
+ logo,kernel = "logo_kernel.bmp";
+ logo,mode = "center";
+ charge_logo,mode = "center";
+ connect = <0x13>;
+ phandle = <0xc5>;
+ };
+
+ route-rgb {
+ status = "disabled";
+ logo,uboot = "logo.bmp";
+ logo,kernel = "logo_kernel.bmp";
+ logo,mode = "center";
+ charge_logo,mode = "center";
+ connect = <0x14>;
+ phandle = <0xc6>;
+ };
+ };
+ };
+
+ firmware {
+
+ optee {
+ compatible = "linaro,optee-tz";
+ method = "smc";
+ };
+ };
+
+ external-gmac-clock {
+ compatible = "fixed-clock";
+ clock-frequency = <0x2faf080>;
+ clock-output-names = "gmac_clkin";
+ #clock-cells = <0x00>;
+ phandle = <0xc7>;
+ };
+
+ psci {
+ compatible = "arm,psci-1.0";
+ method = "smc";
+ };
+
+ rockchip-suspend {
+ compatible = "rockchip,pm-px30";
+ status = "okay";
+ rockchip,sleep-debug-en = <0x01>;
+ rockchip,sleep-mode-config = <0x20702>;
+ rockchip,wakeup-config = <0x85>;
+ phandle = <0xc8>;
+ };
+
+ timer {
+ compatible = "arm,armv8-timer";
+ interrupts = <0x01 0x0d 0xf04 0x01 0x0e 0xf04 0x01 0x0b 0xf04 0x01 0x0a 0xf04>;
+ };
+
+ xin24m {
+ compatible = "fixed-clock";
+ #clock-cells = <0x00>;
+ clock-frequency = <0x16e3600>;
+ clock-output-names = "xin24m";
+ phandle = <0xc9>;
+ };
+
+ xin32k {
+ compatible = "fixed-clock";
+ #clock-cells = <0x00>;
+ clock-frequency = <0x8000>;
+ clock-output-names = "xin32k";
+ phandle = <0xca>;
+ };
+
+ power-management@ff000000 {
+ compatible = "rockchip,px30-pmu\0syscon\0simple-mfd";
+ reg = <0x00 0xff000000 0x00 0x1000>;
+ phandle = <0xcb>;
+
+ power-controller {
+ compatible = "rockchip,px30-power-controller";
+ #power-domain-cells = <0x01>;
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+ phandle = <0x87>;
+
+ pd_usb@5 {
+ reg = <0x05>;
+ clocks = <0x02 0x103 0x02 0x102 0x02 0x3c>;
+ pm_qos = <0x15 0x16>;
+ };
+
+ pd_sdcard@7 {
+ reg = <0x07>;
+ clocks = <0x02 0xf7 0x02 0x3b>;
+ pm_qos = <0x17>;
+ };
+
+ pd_gmac@9 {
+ reg = <0x09>;
+ clocks = <0x02 0xb2 0x02 0x143 0x02 0x40 0x02 0x3f>;
+ pm_qos = <0x18>;
+ };
+
+ pd_mmc_nand@10 {
+ reg = <0x0a>;
+ clocks = <0x02 0xfe 0x02 0x100 0x02 0xff 0x02 0x101 0x02 0x39 0x02 0x37 0x02 0x38 0x02 0x3a>;
+ pm_qos = <0x19 0x1a 0x1b 0x1c>;
+ };
+
+ pd_vpu@11 {
+ reg = <0x0b>;
+ clocks = <0x02 0xaf 0x02 0xf4 0x02 0x4b>;
+ pm_qos = <0x1d 0x1e>;
+ };
+
+ pd_vo@12 {
+ reg = <0x0c>;
+ clocks = <0x02 0xb7 0x02 0xb5 0x02 0xb6 0x02 0x96 0x02 0x97 0x02 0xfd 0x02 0xfb 0x02 0xfc 0x02 0x144 0x02 0x35 0x02 0x36>;
+ pm_qos = <0x1f 0x20 0x21 0x22>;
+ };
+
+ pd_vi@13 {
+ reg = <0x0d>;
+ clocks = <0x02 0xb3 0x02 0xb4 0x02 0xf9 0x02 0xfa 0x02 0x33>;
+ pm_qos = <0x23 0x24 0x25 0x26 0x27>;
+ };
+
+ pd_gpu@14 {
+ reg = <0x0e>;
+ clocks = <0x02 0x49>;
+ pm_qos = <0x28>;
+ };
+ };
+ };
+
+ syscon@ff010000 {
+ compatible = "rockchip,px30-pmugrf\0syscon\0simple-mfd";
+ reg = <0x00 0xff010000 0x00 0x1000>;
+ #address-cells = <0x01>;
+ #size-cells = <0x01>;
+ phandle = <0xa8>;
+
+ io-domains {
+ compatible = "rockchip,px30-pmu-io-voltage-domain";
+ status = "okay";
+ pmuio1-supply = <0x29>;
+ pmuio2-supply = <0x29>;
+ phandle = <0xcc>;
+ };
+
+ reboot-mode {
+ compatible = "syscon-reboot-mode";
+ offset = <0x200>;
+ mode-bootloader = <0x5242c301>;
+ mode-charge = <0x5242c30b>;
+ mode-fastboot = <0x5242c309>;
+ mode-loader = <0x5242c301>;
+ mode-normal = <0x5242c300>;
+ mode-recovery = <0x5242c303>;
+ mode-ums = <0x5242c30c>;
+ };
+
+ pmu-pvtm {
+ compatible = "rockchip,px30-pmu-pvtm";
+ clocks = <0x2a 0x07>;
+ clock-names = "pmu";
+ status = "okay";
+ phandle = <0xcd>;
+ };
+ };
+
+ serial@ff030000 {
+ compatible = "rockchip,px30-uart\0snps,dw-apb-uart";
+ reg = <0x00 0xff030000 0x00 0x100>;
+ interrupts = <0x00 0x0f 0x04>;
+ clocks = <0x2a 0x06 0x2a 0x15>;
+ clock-names = "baudclk\0apb_pclk";
+ reg-shift = <0x02>;
+ reg-io-width = <0x04>;
+ dmas = <0x2b 0x00 0x2b 0x01>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x2c 0x2d 0x2e>;
+ status = "disabled";
+ phandle = <0xce>;
+ };
+
+ i2s@ff060000 {
+ compatible = "rockchip,px30-i2s-tdm";
+ reg = <0x00 0xff060000 0x00 0x1000>;
+ interrupts = <0x00 0x0c 0x04>;
+ clocks = <0x02 0x10 0x02 0x12 0x02 0x106>;
+ clock-names = "mclk_tx\0mclk_rx\0hclk";
+ dmas = <0x2b 0x10 0x2b 0x11>;
+ dma-names = "tx\0rx";
+ resets = <0x02 0x84 0x02 0xbf>;
+ reset-names = "tx-m\0rx-m";
+ rockchip,cru = <0x02>;
+ rockchip,grf = <0x2f>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x30 0x31 0x32 0x33 0x34 0x35 0x36 0x37 0x38 0x39 0x3a 0x3b>;
+ status = "disabled";
+ phandle = <0xcf>;
+ };
+
+ i2s@ff070000 {
+ compatible = "rockchip,px30-i2s\0rockchip,rk3066-i2s";
+ reg = <0x00 0xff070000 0x00 0x1000>;
+ interrupts = <0x00 0x0d 0x04>;
+ clocks = <0x02 0x14 0x02 0x107>;
+ clock-names = "i2s_clk\0i2s_hclk";
+ dmas = <0x2b 0x12 0x2b 0x13>;
+ dma-names = "tx\0rx";
+ resets = <0x02 0x86 0x02 0x85>;
+ reset-names = "reset-m\0reset-h";
+ pinctrl-names = "default";
+ pinctrl-0 = <0x3c 0x3d 0x3e 0x3f>;
+ status = "okay";
+ #sound-dai-cells = <0x00>;
+ phandle = <0xbd>;
+ };
+
+ i2s@ff080000 {
+ compatible = "rockchip,px30-i2s\0rockchip,rk3066-i2s";
+ reg = <0x00 0xff080000 0x00 0x1000>;
+ interrupts = <0x00 0x0e 0x04>;
+ clocks = <0x02 0x16 0x02 0x108>;
+ clock-names = "i2s_clk\0i2s_hclk";
+ dmas = <0x2b 0x14 0x2b 0x15>;
+ dma-names = "tx\0rx";
+ resets = <0x02 0x88 0x02 0x87>;
+ reset-names = "reset-m\0reset-h";
+ pinctrl-names = "default";
+ pinctrl-0 = <0x40 0x41 0x42 0x43>;
+ status = "disabled";
+ phandle = <0xd0>;
+ };
+
+ pdm@ff0a0000 {
+ compatible = "rockchip,px30-pdm\0rockchip,pdm";
+ reg = <0x00 0xff0a0000 0x00 0x1000>;
+ clocks = <0x02 0x0f 0x02 0x105>;
+ clock-names = "pdm_clk\0pdm_hclk";
+ dmas = <0x2b 0x18>;
+ dma-names = "rx";
+ resets = <0x02 0x82>;
+ reset-names = "pdm-m";
+ pinctrl-names = "default";
+ pinctrl-0 = <0x44 0x45 0x46 0x47 0x48>;
+ status = "disabled";
+ phandle = <0xd1>;
+ };
+
+ crypto@ff0b0000 {
+ compatible = "rockchip,px30-crypto";
+ reg = <0x00 0xff0b0000 0x00 0x4000>;
+ interrupts = <0x00 0x52 0x04>;
+ clocks = <0x02 0xac 0x02 0xf1 0x02 0x30 0x02 0x31>;
+ clock-names = "aclk\0hclk\0sclk\0apb_pclk";
+ resets = <0x02 0x74>;
+ reset-names = "crypto-rst";
+ status = "disabled";
+ phandle = <0xd2>;
+ };
+
+ rng@ff0b0000 {
+ compatible = "rockchip,cryptov2-rng";
+ reg = <0x00 0xff0b0000 0x00 0x4000>;
+ clocks = <0x02 0x30 0x02 0x31 0x02 0xac 0x02 0xf1>;
+ clock-names = "clk_crypto\0clk_crypto_apk\0aclk_crypto\0hclk_crypto";
+ assigned-clocks = <0x02 0x30 0x02 0x31 0x02 0xac 0x02 0xf1>;
+ assigned-clock-rates = <0x8f0d180 0x8f0d180 0xbebc200 0x5f5e100>;
+ resets = <0x02 0x74>;
+ reset-names = "reset";
+ status = "okay";
+ phandle = <0xd3>;
+ };
+
+ interrupt-controller@ff131000 {
+ compatible = "arm,gic-400";
+ #interrupt-cells = <0x03>;
+ #address-cells = <0x00>;
+ interrupt-controller;
+ reg = <0x00 0xff131000 0x00 0x1000 0x00 0xff132000 0x00 0x2000 0x00 0xff134000 0x00 0x2000 0x00 0xff136000 0x00 0x2000>;
+ interrupts = <0x01 0x09 0xf04>;
+ phandle = <0x01>;
+ };
+
+ syscon@ff140000 {
+ compatible = "rockchip,px30-grf\0syscon\0simple-mfd";
+ reg = <0x00 0xff140000 0x00 0x1000>;
+ #address-cells = <0x01>;
+ #size-cells = <0x01>;
+ phandle = <0x2f>;
+
+ io-domains {
+ compatible = "rockchip,px30-io-voltage-domain";
+ status = "okay";
+ vccio1-supply = <0x49>;
+ vccio2-supply = <0x49>;
+ vccio3-supply = <0x4a>;
+ vccio4-supply = <0x4a>;
+ vccio5-supply = <0x4a>;
+ vccio6-supply = <0x4a>;
+ phandle = <0xd4>;
+ };
+
+ lvds {
+ compatible = "rockchip,px30-lvds";
+ phys = <0x4b>;
+ phy-names = "phy";
+ status = "disabled";
+ phandle = <0xd5>;
+
+ ports {
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+
+ port@0 {
+ reg = <0x00>;
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+
+ endpoint@0 {
+ reg = <0x00>;
+ remote-endpoint = <0x12>;
+ phandle = <0x9e>;
+ };
+ };
+ };
+ };
+
+ rgb {
+ compatible = "rockchip,px30-rgb";
+ pinctrl-names = "default\0sleep";
+ pinctrl-0 = <0x4c>;
+ pinctrl-1 = <0x4d>;
+ status = "disabled";
+ phys = <0x4b>;
+ phy-names = "phy";
+ phandle = <0xd6>;
+
+ ports {
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+
+ port@0 {
+ reg = <0x00>;
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+
+ endpoint@0 {
+ reg = <0x00>;
+ remote-endpoint = <0x14>;
+ phandle = <0xa0>;
+ };
+ };
+ };
+ };
+ };
+
+ syscon@ff148000 {
+ compatible = "syscon\0simple-mfd";
+ reg = <0x00 0xff148000 0x00 0x1000>;
+ #address-cells = <0x01>;
+ #size-cells = <0x01>;
+ phandle = <0xd7>;
+
+ pvtm {
+ compatible = "rockchip,px30-pvtm";
+ clocks = <0x02 0x4a>;
+ clock-names = "core";
+ status = "okay";
+ phandle = <0xd8>;
+ };
+ };
+
+ serial@ff158000 {
+ compatible = "rockchip,px30-uart\0snps,dw-apb-uart";
+ reg = <0x00 0xff158000 0x00 0x100>;
+ interrupts = <0x00 0x10 0x04>;
+ clocks = <0x02 0x18 0x02 0x149>;
+ clock-names = "baudclk\0apb_pclk";
+ reg-shift = <0x02>;
+ reg-io-width = <0x04>;
+ dmas = <0x2b 0x02 0x2b 0x03>;
+ pinctrl-names = "default";
+ status = "disabled";
+ phandle = <0xd9>;
+ };
+
+ serial@ff160000 {
+ compatible = "rockchip,px30-uart\0snps,dw-apb-uart";
+ reg = <0x00 0xff160000 0x00 0x100>;
+ interrupts = <0x00 0x11 0x04>;
+ clocks = <0x02 0x19 0x02 0x14a>;
+ clock-names = "baudclk\0apb_pclk";
+ reg-shift = <0x02>;
+ reg-io-width = <0x04>;
+ dmas = <0x2b 0x04 0x2b 0x05>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x4e>;
+ status = "disabled";
+ phandle = <0xda>;
+ };
+
+ serial@ff168000 {
+ compatible = "rockchip,px30-uart\0snps,dw-apb-uart";
+ reg = <0x00 0xff168000 0x00 0x100>;
+ interrupts = <0x00 0x12 0x04>;
+ clocks = <0x02 0x1a 0x02 0x14b>;
+ clock-names = "baudclk\0apb_pclk";
+ reg-shift = <0x02>;
+ reg-io-width = <0x04>;
+ dmas = <0x2b 0x06 0x2b 0x07>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x4f 0x50 0x51>;
+ status = "disabled";
+ phandle = <0xdb>;
+ };
+
+ serial@ff170000 {
+ compatible = "rockchip,px30-uart\0snps,dw-apb-uart";
+ reg = <0x00 0xff170000 0x00 0x100>;
+ interrupts = <0x00 0x13 0x04>;
+ clocks = <0x02 0x1b 0x02 0x14c>;
+ clock-names = "baudclk\0apb_pclk";
+ reg-shift = <0x02>;
+ reg-io-width = <0x04>;
+ dmas = <0x2b 0x08 0x2b 0x09>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x52 0x53 0x54>;
+ status = "disabled";
+ phandle = <0xdc>;
+ };
+
+ serial@ff178000 {
+ compatible = "rockchip,px30-uart\0snps,dw-apb-uart";
+ reg = <0x00 0xff178000 0x00 0x100>;
+ interrupts = <0x00 0x14 0x04>;
+ clocks = <0x02 0x1c 0x02 0x14d>;
+ clock-names = "baudclk\0apb_pclk";
+ reg-shift = <0x02>;
+ reg-io-width = <0x04>;
+ dmas = <0x2b 0x0a 0x2b 0x0b>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x55 0x56 0x57>;
+ status = "disabled";
+ phandle = <0xdd>;
+ };
+
+ i2c@ff180000 {
+ compatible = "rockchip,rk3399-i2c";
+ reg = <0x00 0xff180000 0x00 0x1000>;
+ clocks = <0x02 0x1d 0x02 0x14e>;
+ clock-names = "i2c\0pclk";
+ interrupts = <0x00 0x07 0x04>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x58>;
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+ status = "okay";
+ clock-frequency = <0x61a80>;
+ i2c-scl-rising-time-ns = <0x118>;
+ i2c-scl-falling-time-ns = <0x10>;
+ phandle = <0xde>;
+
+ pmic@20 {
+ compatible = "rockchip,rk817";
+ reg = <0x20>;
+ interrupt-parent = <0x59>;
+ interrupts = <0x07 0x08>;
+ pinctrl-names = "default\0pmic-sleep\0pmic-power-off\0pmic-reset";
+ pinctrl-0 = <0x5a>;
+ pinctrl-1 = <0x5b 0x5c>;
+ pinctrl-2 = <0x5d 0x5e>;
+ pinctrl-3 = <0x5f 0x60>;
+ rockchip,system-power-controller;
+ wakeup-source;
+ #clock-cells = <0x01>;
+ clock-output-names = "rk808-clkout1\0rk808-clkout2";
+ pmic-reset-func = <0x01>;
+ vcc1-supply = <0x61>;
+ vcc2-supply = <0x61>;
+ vcc3-supply = <0x61>;
+ vcc4-supply = <0x61>;
+ vcc5-supply = <0x61>;
+ vcc6-supply = <0x61>;
+ vcc7-supply = <0x61>;
+ vcc8-supply = <0x61>;
+ vcc9-supply = <0x62>;
+ phandle = <0xdf>;
+
+ pwrkey {
+ status = "okay";
+ };
+
+ pinctrl_rk8xx {
+ gpio-controller;
+ #gpio-cells = <0x02>;
+ phandle = <0xe0>;
+
+ rk817_ts_gpio1 {
+ pins = "gpio_ts";
+ function = "pin_fun1";
+ phandle = <0xe1>;
+ };
+
+ rk817_gt_gpio2 {
+ pins = "gpio_gt";
+ function = "pin_fun1";
+ phandle = <0xe2>;
+ };
+
+ rk817_pin_ts {
+ pins = "gpio_ts";
+ function = "pin_fun0";
+ phandle = <0xe3>;
+ };
+
+ rk817_pin_gt {
+ pins = "gpio_gt";
+ function = "pin_fun0";
+ phandle = <0xe4>;
+ };
+
+ rk817_slppin_null {
+ pins = "gpio_slp";
+ function = "pin_fun0";
+ phandle = <0xe5>;
+ };
+
+ rk817_slppin_slp {
+ pins = "gpio_slp";
+ function = "pin_fun1";
+ phandle = <0x5c>;
+ };
+
+ rk817_slppin_pwrdn {
+ pins = "gpio_slp";
+ function = "pin_fun2";
+ phandle = <0x5e>;
+ };
+
+ rk817_slppin_rst {
+ pins = "gpio_slp";
+ function = "pin_fun3";
+ phandle = <0x60>;
+ };
+ };
+
+ regulators {
+
+ DCDC_REG1 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <0xe7ef0>;
+ regulator-max-microvolt = <0x149970>;
+ regulator-ramp-delay = <0x1771>;
+ regulator-initial-mode = <0x02>;
+ regulator-name = "vdd_logic";
+ phandle = <0x0e>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <0xe7ef0>;
+ };
+ };
+
+ DCDC_REG2 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <0xe7ef0>;
+ regulator-max-microvolt = <0x149970>;
+ regulator-ramp-delay = <0x1771>;
+ regulator-initial-mode = <0x02>;
+ regulator-name = "vdd_arm";
+ phandle = <0x06>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <0xe7ef0>;
+ };
+ };
+
+ DCDC_REG3 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-initial-mode = <0x02>;
+ regulator-name = "vcc_ddr";
+ phandle = <0xe6>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ };
+ };
+
+ DCDC_REG4 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <0x325aa0>;
+ regulator-max-microvolt = <0x325aa0>;
+ regulator-initial-mode = <0x02>;
+ regulator-name = "vcc_3v3";
+ phandle = <0x4a>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <0x325aa0>;
+ };
+ };
+
+ LDO_REG1 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <0xf4240>;
+ regulator-max-microvolt = <0xf4240>;
+ regulator-name = "vcc_1v0";
+ phandle = <0xe7>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <0xf4240>;
+ };
+ };
+
+ LDO_REG2 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <0x1b7740>;
+ regulator-max-microvolt = <0x1b7740>;
+ regulator-name = "vcc1v8_soc";
+ phandle = <0x85>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <0x1b7740>;
+ };
+ };
+
+ LDO_REG3 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <0xf4240>;
+ regulator-max-microvolt = <0xf4240>;
+ regulator-name = "vcc1v0_soc";
+ phandle = <0xe8>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <0xf4240>;
+ };
+ };
+
+ LDO_REG4 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <0x2dc6c0>;
+ regulator-max-microvolt = <0x2dc6c0>;
+ regulator-name = "vcc3v3_pmu";
+ phandle = <0x29>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <0x2dc6c0>;
+ };
+ };
+
+ LDO_REG5 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <0x1b7740>;
+ regulator-max-microvolt = <0x325aa0>;
+ regulator-name = "vccio_sd";
+ phandle = <0x49>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <0x325aa0>;
+ };
+ };
+
+ LDO_REG6 {
+ regulator-min-microvolt = <0x325aa0>;
+ regulator-max-microvolt = <0x325aa0>;
+ regulator-name = "vcc_sd";
+ phandle = <0x90>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <0x325aa0>;
+ };
+ };
+
+ LDO_REG7 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <0x325aa0>;
+ regulator-max-microvolt = <0x325aa0>;
+ regulator-name = "vcc2v8_dvp";
+ phandle = <0xe9>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <0x325aa0>;
+ };
+ };
+
+ LDO_REG8 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <0x325aa0>;
+ regulator-max-microvolt = <0x325aa0>;
+ regulator-name = "vcc_lcd";
+ phandle = <0x9a>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <0x325aa0>;
+ };
+ };
+
+ LDO_REG9 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <0x10c8e0>;
+ regulator-max-microvolt = <0x10c8e0>;
+ regulator-name = "vdd_11";
+ phandle = <0xea>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <0x10c8e0>;
+ };
+ };
+
+ BOOST {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <0x47b760>;
+ regulator-max-microvolt = <0x5265c0>;
+ regulator-name = "boost";
+ phandle = <0x62>;
+ };
+
+ OTG_SWITCH {
+ regulator-boot-on;
+ regulator-name = "otg_switch";
+ phandle = <0xeb>;
+ };
+ };
+
+ battery {
+ compatible = "rk817,battery";
+ ocv_table = <0xd48 0xd6e 0xd9e 0xdc1 0xdde 0xdf3 0xe02 0xe0f 0xe1c 0xe2c 0xe47 0xe69 0xe87 0xeaa 0xed2 0xefe 0xf2f 0xf66 0xfa5 0xff7 0x1051>;
+ design_capacity = <0xc54>;
+ design_qmax = <0xd8f>;
+ bat_res = <0x84>;
+ sleep_enter_current = <0x12c>;
+ sleep_exit_current = <0x12c>;
+ sleep_filter_current = <0x64>;
+ power_off_thresd = <0xce4>;
+ zero_algorithm_vol = <0xf0a>;
+ max_soc_offset = <0x3c>;
+ monitor_sec = <0x05>;
+ virtual_power = <0x00>;
+ sample_res = <0x0a>;
+ };
+
+ charger {
+ compatible = "rk817,charger";
+ min_input_voltage = <0x1194>;
+ max_input_current = <0x5dc>;
+ max_chrg_current = <0x7d0>;
+ max_chrg_voltage = <0x1068>;
+ chrg_term_mode = <0x00>;
+ chrg_finish_cur = <0x34>;
+ virtual_power = <0x00>;
+ sample_res = <0x0a>;
+ dc_det_gpio = <0x63 0x17 0x00>;
+ chg_led_gpio = <0x59 0x01 0x00>;
+ extcon = <0x64>;
+ };
+
+ codec {
+ #sound-dai-cells = <0x00>;
+ compatible = "rockchip,rk817-codec";
+ clocks = <0x02 0x15>;
+ clock-names = "mclk";
+ pinctrl-names = "default";
+ pinctrl-0 = <0x65>;
+ spk-ctl-gpios = <0x63 0x14 0x00>;
+ hp-volume = <0x14>;
+ spk-volume = <0x01>;
+ status = "okay";
+ phandle = <0xbe>;
+ };
+ };
+ };
+
+ i2c@ff190000 {
+ compatible = "rockchip,rk3399-i2c";
+ reg = <0x00 0xff190000 0x00 0x1000>;
+ clocks = <0x02 0x1e 0x02 0x14f>;
+ clock-names = "i2c\0pclk";
+ interrupts = <0x00 0x08 0x04>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x66>;
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+ status = "okay";
+ clock-frequency = <0x61a80>;
+ phandle = <0xec>;
+ };
+
+ i2c@ff1a0000 {
+ compatible = "rockchip,rk3399-i2c";
+ reg = <0x00 0xff1a0000 0x00 0x1000>;
+ clocks = <0x02 0x1f 0x02 0x150>;
+ clock-names = "i2c\0pclk";
+ interrupts = <0x00 0x09 0x04>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x67>;
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+ status = "disabled";
+ phandle = <0xed>;
+ };
+
+ i2c@ff1b0000 {
+ compatible = "rockchip,rk3399-i2c";
+ reg = <0x00 0xff1b0000 0x00 0x1000>;
+ clocks = <0x02 0x20 0x02 0x151>;
+ clock-names = "i2c\0pclk";
+ interrupts = <0x00 0x0a 0x04>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x68>;
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+ status = "disabled";
+ phandle = <0xee>;
+ };
+
+ spi@ff1d0000 {
+ compatible = "rockchip,px30-spi\0rockchip,rk3066-spi";
+ reg = <0x00 0xff1d0000 0x00 0x1000>;
+ interrupts = <0x00 0x1a 0x04>;
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+ clocks = <0x02 0x24 0x02 0x155>;
+ clock-names = "spiclk\0apb_pclk";
+ dmas = <0x2b 0x0c 0x2b 0x0d>;
+ dma-names = "tx\0rx";
+ pinctrl-names = "default\0high_speed";
+ pinctrl-0 = <0x69 0x6a 0x6b 0x6c>;
+ pinctrl-1 = <0x6d 0x6a 0x6e 0x6f>;
+ status = "disabled";
+ phandle = <0xef>;
+ };
+
+ spi@ff1d8000 {
+ compatible = "rockchip,px30-spi\0rockchip,rk3066-spi";
+ reg = <0x00 0xff1d8000 0x00 0x1000>;
+ interrupts = <0x00 0x1b 0x04>;
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+ clocks = <0x02 0x25 0x02 0x156>;
+ clock-names = "spiclk\0apb_pclk";
+ dmas = <0x2b 0x0e 0x2b 0x0f>;
+ dma-names = "tx\0rx";
+ pinctrl-names = "default\0high_speed";
+ pinctrl-0 = <0x70 0x71 0x72 0x73 0x74>;
+ pinctrl-1 = <0x75 0x71 0x72 0x76 0x77>;
+ status = "disabled";
+ phandle = <0xf0>;
+ };
+
+ watchdog@ff1e0000 {
+ compatible = "snps,dw-wdt";
+ reg = <0x00 0xff1e0000 0x00 0x100>;
+ clocks = <0x02 0x15b>;
+ interrupts = <0x00 0x25 0x04>;
+ resets = <0x02 0xb5>;
+ reset-names = "reset";
+ status = "disabled";
+ phandle = <0xf1>;
+ };
+
+ pwm@ff200000 {
+ compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm";
+ reg = <0x00 0xff200000 0x00 0x10>;
+ #pwm-cells = <0x03>;
+ pinctrl-names = "active";
+ pinctrl-0 = <0x78>;
+ clocks = <0x02 0x22 0x02 0x153>;
+ clock-names = "pwm\0pclk";
+ status = "okay";
+ phandle = <0xb8>;
+ };
+
+ pwm@ff200010 {
+ compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm";
+ reg = <0x00 0xff200010 0x00 0x10>;
+ #pwm-cells = <0x03>;
+ pinctrl-names = "active";
+ pinctrl-0 = <0x79>;
+ clocks = <0x02 0x22 0x02 0x153>;
+ clock-names = "pwm\0pclk";
+ status = "okay";
+ phandle = <0xbc>;
+ };
+
+ pwm@ff200020 {
+ compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm";
+ reg = <0x00 0xff200020 0x00 0x10>;
+ #pwm-cells = <0x03>;
+ pinctrl-names = "active";
+ pinctrl-0 = <0x7a>;
+ clocks = <0x02 0x22 0x02 0x153>;
+ clock-names = "pwm\0pclk";
+ status = "disabled";
+ phandle = <0xf2>;
+ };
+
+ pwm@ff200030 {
+ compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm";
+ reg = <0x00 0xff200030 0x00 0x10>;
+ #pwm-cells = <0x03>;
+ pinctrl-names = "active";
+ pinctrl-0 = <0x7b>;
+ clocks = <0x02 0x22 0x02 0x153>;
+ clock-names = "pwm\0pclk";
+ status = "disabled";
+ phandle = <0xf3>;
+ };
+
+ pwm@ff208000 {
+ compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm";
+ reg = <0x00 0xff208000 0x00 0x10>;
+ #pwm-cells = <0x03>;
+ pinctrl-names = "active";
+ pinctrl-0 = <0x7c>;
+ clocks = <0x02 0x23 0x02 0x154>;
+ clock-names = "pwm\0pclk";
+ status = "disabled";
+ phandle = <0xf4>;
+ };
+
+ pwm@ff208010 {
+ compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm";
+ reg = <0x00 0xff208010 0x00 0x10>;
+ #pwm-cells = <0x03>;
+ pinctrl-names = "active";
+ pinctrl-0 = <0x7d>;
+ clocks = <0x02 0x23 0x02 0x154>;
+ clock-names = "pwm\0pclk";
+ status = "disabled";
+ phandle = <0xf5>;
+ };
+
+ pwm@ff208020 {
+ compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm";
+ reg = <0x00 0xff208020 0x00 0x10>;
+ #pwm-cells = <0x03>;
+ pinctrl-names = "active";
+ pinctrl-0 = <0x7e>;
+ clocks = <0x02 0x23 0x02 0x154>;
+ clock-names = "pwm\0pclk";
+ status = "disabled";
+ phandle = <0xf6>;
+ };
+
+ pwm@ff208030 {
+ compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm";
+ reg = <0x00 0xff208030 0x00 0x10>;
+ #pwm-cells = <0x03>;
+ pinctrl-names = "active";
+ pinctrl-0 = <0x7f>;
+ clocks = <0x02 0x23 0x02 0x154>;
+ clock-names = "pwm\0pclk";
+ status = "disabled";
+ phandle = <0xf7>;
+ };
+
+ rktimer@ff210000 {
+ compatible = "rockchip,rk3288-timer";
+ reg = <0x00 0xff210000 0x00 0x1000>;
+ interrupts = <0x00 0x1e 0x04>;
+ clocks = <0x02 0x159 0x02 0x26>;
+ clock-names = "pclk\0timer";
+ phandle = <0xf8>;
+ };
+
+ amba {
+ compatible = "simple-bus";
+ #address-cells = <0x02>;
+ #size-cells = <0x02>;
+ ranges;
+
+ dmac@ff240000 {
+ compatible = "arm,pl330\0arm,primecell";
+ reg = <0x00 0xff240000 0x00 0x4000>;
+ interrupts = <0x00 0x01 0x04 0x00 0x02 0x04>;
+ clocks = <0x02 0xbb>;
+ clock-names = "apb_pclk";
+ #dma-cells = <0x01>;
+ peripherals-req-type-burst;
+ phandle = <0x2b>;
+ };
+ };
+
+ thermal-zones {
+ phandle = <0xf9>;
+
+ soc-thermal {
+ polling-delay-passive = <0x14>;
+ polling-delay = <0x3e8>;
+ sustainable-power = <0x2ee>;
+ thermal-sensors = <0x80 0x00>;
+ phandle = <0xfa>;
+
+ trips {
+
+ trip-point-0 {
+ temperature = <0x11170>;
+ hysteresis = <0x7d0>;
+ type = "passive";
+ phandle = <0xfb>;
+ };
+
+ trip-point-1 {
+ temperature = <0x14c08>;
+ hysteresis = <0x7d0>;
+ type = "passive";
+ phandle = <0x81>;
+ };
+
+ soc-crit {
+ temperature = <0x1c138>;
+ hysteresis = <0x7d0>;
+ type = "critical";
+ phandle = <0xfc>;
+ };
+ };
+
+ cooling-maps {
+
+ map0 {
+ trip = <0x81>;
+ cooling-device = <0x09 0xffffffff 0xffffffff>;
+ contribution = <0x1000>;
+ };
+
+ map1 {
+ trip = <0x81>;
+ cooling-device = <0x82 0xffffffff 0xffffffff>;
+ contribution = <0x1000>;
+ };
+ };
+ };
+
+ gpu-thermal {
+ polling-delay-passive = <0x64>;
+ polling-delay = <0x3e8>;
+ thermal-sensors = <0x80 0x01>;
+ phandle = <0xfd>;
+ };
+ };
+
+ tsadc@ff280000 {
+ compatible = "rockchip,px30-tsadc";
+ reg = <0x00 0xff280000 0x00 0x100>;
+ interrupts = <0x00 0x24 0x04>;
+ rockchip,grf = <0x2f>;
+ clocks = <0x02 0x2c 0x02 0x158>;
+ clock-names = "tsadc\0apb_pclk";
+ assigned-clocks = <0x02 0x2c>;
+ assigned-clock-rates = <0xc350>;
+ resets = <0x02 0xa8>;
+ reset-names = "tsadc-apb";
+ #thermal-sensor-cells = <0x01>;
+ rockchip,hw-tshut-temp = <0x1d4c0>;
+ status = "okay";
+ pinctrl-names = "gpio\0otpout";
+ pinctrl-0 = <0x83>;
+ pinctrl-1 = <0x84>;
+ phandle = <0x80>;
+ };
+
+ saradc@ff288000 {
+ compatible = "rockchip,px30-saradc\0rockchip,rk3399-saradc";
+ reg = <0x00 0xff288000 0x00 0x100>;
+ interrupts = <0x00 0x54 0x04>;
+ #io-channel-cells = <0x01>;
+ clocks = <0x02 0x2d 0x02 0x157>;
+ clock-names = "saradc\0apb_pclk";
+ resets = <0x02 0xa5>;
+ reset-names = "saradc-apb";
+ status = "okay";
+ vref-supply = <0x85>;
+ phandle = <0xba>;
+ };
+
+ otp@ff290000 {
+ compatible = "rockchip,px30-otp";
+ reg = <0x00 0xff290000 0x00 0x4000>;
+ #address-cells = <0x01>;
+ #size-cells = <0x01>;
+ clocks = <0x02 0x2f 0x02 0x15a 0x02 0x161>;
+ clock-names = "clk_otp\0pclk_otp\0pclk_otp_phy";
+ resets = <0x02 0xb4>;
+ reset-names = "otp_phy";
+ phandle = <0xfe>;
+
+ id@7 {
+ reg = <0x07 0x10>;
+ phandle = <0x0f>;
+ };
+
+ cpu-leakage@17 {
+ reg = <0x17 0x01>;
+ phandle = <0x07>;
+ };
+
+ performance@1e {
+ reg = <0x1e 0x01>;
+ bits = <0x04 0x03>;
+ phandle = <0x08>;
+ };
+ };
+
+ clock-controller@ff2b0000 {
+ compatible = "rockchip,px30-cru";
+ reg = <0x00 0xff2b0000 0x00 0x1000>;
+ rockchip,grf = <0x2f>;
+ rockchip,boost = <0x86>;
+ #clock-cells = <0x01>;
+ #reset-cells = <0x01>;
+ assigned-clocks = <0x02 0x04>;
+ assigned-clock-rates = <0x3dfd2400>;
+ phandle = <0x02>;
+ };
+
+ cpu-boost@ff2b8000 {
+ compatible = "syscon";
+ reg = <0x00 0xff2b8000 0x00 0x1000>;
+ rockchip,boost-low-con0 = <0x1032>;
+ rockchip,boost-low-con1 = <0x1441>;
+ rockchip,boost-high-con0 = <0x1036>;
+ rockchip,boost-high-con1 = <0x1441>;
+ rockchip,boost-backup-pll = <0x01>;
+ rockchip,boost-backup-pll-usage = <0x00>;
+ rockchip,boost-switch-threshold = <0x249f00>;
+ rockchip,boost-statis-threshold = <0x100>;
+ rockchip,boost-statis-enable = <0x00>;
+ rockchip,boost-enable = <0x00>;
+ phandle = <0x86>;
+ };
+
+ pmu-clock-controller@ff2bc000 {
+ compatible = "rockchip,px30-pmucru";
+ reg = <0x00 0xff2bc000 0x00 0x1000>;
+ rockchip,grf = <0x2f>;
+ #clock-cells = <0x01>;
+ #reset-cells = <0x01>;
+ assigned-clocks = <0x2a 0x01 0x2a 0x08 0x2a 0x05 0x02 0x07 0x02 0xab 0x02 0xb0 0x02 0xf0 0x02 0xf5 0x02 0x140 0x02 0x49>;
+ assigned-clock-rates = <0x47868c00 0x5f5e100 0x18cba80 0x23c34600 0xbebc200 0xbebc200 0x8f0d180 0x8f0d180 0x5f5e100 0xbebc200>;
+ phandle = <0x2a>;
+ };
+
+ syscon@ff2c0000 {
+ compatible = "rockchip,px30-usb2phy-grf\0syscon\0simple-mfd";
+ reg = <0x00 0xff2c0000 0x00 0x10000>;
+ #address-cells = <0x01>;
+ #size-cells = <0x01>;
+ phandle = <0xff>;
+
+ usb2-phy@100 {
+ compatible = "rockchip,px30-usb2phy\0rockchip,rk3328-usb2phy";
+ reg = <0x100 0x10>;
+ clocks = <0x2a 0x0a>;
+ clock-names = "phyclk";
+ #clock-cells = <0x00>;
+ assigned-clocks = <0x02 0x0e 0x02 0x55>;
+ assigned-clock-parents = <0x64 0x02 0x0e>;
+ clock-output-names = "usb480m_phy";
+ status = "okay";
+ phandle = <0x64>;
+
+ host-port {
+ #phy-cells = <0x00>;
+ interrupts = <0x00 0x44 0x04>;
+ interrupt-names = "linestate";
+ status = "okay";
+ phandle = <0x89>;
+ };
+
+ otg-port {
+ #phy-cells = <0x00>;
+ interrupts = <0x00 0x42 0x04 0x00 0x41 0x04 0x00 0x40 0x04>;
+ interrupt-names = "otg-bvalid\0otg-id\0linestate";
+ status = "disabled";
+ phandle = <0x88>;
+ };
+ };
+ };
+
+ video-phy@ff2e0000 {
+ compatible = "rockchip,px30-video-phy";
+ reg = <0x00 0xff2e0000 0x00 0x10000 0x00 0xff450000 0x00 0x10000>;
+ clocks = <0x2a 0x0b 0x02 0x145 0x02 0x144>;
+ clock-names = "ref\0pclk_phy\0pclk_host";
+ #clock-cells = <0x00>;
+ resets = <0x02 0x3e>;
+ reset-names = "rst";
+ power-domains = <0x87 0x0c>;
+ #phy-cells = <0x00>;
+ status = "okay";
+ phandle = <0x4b>;
+ };
+
+ mipi-dphy-rx0@ff2f0000 {
+ compatible = "rockchip,rk3326-mipi-dphy";
+ reg = <0x00 0xff2f0000 0x00 0x4000>;
+ clocks = <0x02 0x146>;
+ clock-names = "dphy-ref";
+ power-domains = <0x87 0x0d>;
+ rockchip,grf = <0x2f>;
+ status = "okay";
+ phandle = <0x100>;
+ };
+
+ usb@ff300000 {
+ compatible = "rockchip,px30-usb\0rockchip,rk3066-usb\0snps,dwc2";
+ reg = <0x00 0xff300000 0x00 0x40000>;
+ interrupts = <0x00 0x3e 0x04>;
+ clocks = <0x02 0x102>;
+ clock-names = "otg";
+ power-domains = <0x87 0x05>;
+ dr_mode = "otg";
+ g-np-tx-fifo-size = <0x10>;
+ g-rx-fifo-size = <0x118>;
+ g-tx-fifo-size = <0x100 0x80 0x80 0x40 0x20 0x10>;
+ g-use-dma;
+ phys = <0x88>;
+ phy-names = "usb2-phy";
+ status = "okay";
+ phandle = <0x101>;
+ };
+
+ usb@ff340000 {
+ compatible = "generic-ehci";
+ reg = <0x00 0xff340000 0x00 0x10000>;
+ interrupts = <0x00 0x3c 0x04>;
+ clocks = <0x02 0x103 0x64>;
+ clock-names = "usbhost\0utmi";
+ power-domains = <0x87 0x05>;
+ phys = <0x89>;
+ phy-names = "usb";
+ status = "disabled";
+ phandle = <0x102>;
+ };
+
+ usb@ff350000 {
+ compatible = "generic-ohci";
+ reg = <0x00 0xff350000 0x00 0x10000>;
+ interrupts = <0x00 0x3d 0x04>;
+ clocks = <0x02 0x103 0x64>;
+ clock-names = "usbhost\0utmi";
+ power-domains = <0x87 0x05>;
+ phys = <0x89>;
+ phy-names = "usb";
+ status = "disabled";
+ phandle = <0x103>;
+ };
+
+ ethernet@ff360000 {
+ compatible = "rockchip,px30-gmac";
+ reg = <0x00 0xff360000 0x00 0x10000>;
+ rockchip,grf = <0x2f>;
+ interrupts = <0x00 0x2b 0x04>;
+ interrupt-names = "macirq";
+ clocks = <0x02 0x3e 0x02 0x3f 0x02 0x3f 0x02 0x40 0x02 0x41 0x02 0xb2 0x02 0x143 0x02 0x4c>;
+ clock-names = "stmmaceth\0mac_clk_rx\0mac_clk_tx\0clk_mac_ref\0clk_mac_refout\0aclk_mac\0pclk_mac\0clk_mac_speed";
+ phy-mode = "rmii";
+ pinctrl-names = "default";
+ pinctrl-0 = <0x8a 0x8b>;
+ resets = <0x02 0x5e>;
+ reset-names = "stmmaceth";
+ power-domains = <0x87 0x09>;
+ status = "disabled";
+ phandle = <0x104>;
+ };
+
+ dwmmc@ff370000 {
+ compatible = "rockchip,px30-dw-mshc\0rockchip,rk3288-dw-mshc";
+ reg = <0x00 0xff370000 0x00 0x4000>;
+ max-frequency = <0x8f0d180>;
+ clocks = <0x02 0xf7 0x02 0x3b 0x02 0x43 0x02 0x44>;
+ clock-names = "biu\0ciu\0ciu-drv\0ciu-sample";
+ assigned-clocks = <0x02 0x3b>;
+ assigned-clock-parents = <0x02 0x57>;
+ power-domains = <0x87 0x07>;
+ fifo-depth = <0x100>;
+ interrupts = <0x00 0x36 0x04>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x8c 0x8d 0x8e 0x8f>;
+ status = "okay";
+ bus-width = <0x04>;
+ cap-mmc-highspeed;
+ cap-sd-highspeed;
+ supports-sd;
+ card-detect-delay = <0x320>;
+ ignore-pm-notify;
+ cd-gpios = <0x59 0x03 0x01>;
+ sd-uhs-sdr12;
+ sd-uhs-sdr25;
+ sd-uhs-sdr50;
+ sd-uhs-sdr104;
+ vqmmc-supply = <0x49>;
+ vmmc-supply = <0x90>;
+ phandle = <0x105>;
+ };
+
+ dwmmc@ff380000 {
+ compatible = "rockchip,px30-dw-mshc\0rockchip,rk3288-dw-mshc";
+ reg = <0x00 0xff380000 0x00 0x4000>;
+ max-frequency = <0x8f0d180>;
+ clocks = <0x02 0xff 0x02 0x38 0x02 0x45 0x02 0x46>;
+ clock-names = "biu\0ciu\0ciu-drv\0ciu-sample";
+ assigned-clocks = <0x02 0x38>;
+ assigned-clock-parents = <0x02 0x51>;
+ power-domains = <0x87 0x0a>;
+ fifo-depth = <0x100>;
+ interrupts = <0x00 0x37 0x04>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x91 0x92 0x93>;
+ status = "okay";
+ bus-width = <0x04>;
+ cap-mmc-highspeed;
+ cap-sd-highspeed;
+ supports-sd;
+ card-detect-delay = <0x320>;
+ ignore-pm-notify;
+ cd-gpios = <0x59 0x0a 0x01>;
+ sd-uhs-sdr12;
+ sd-uhs-sdr25;
+ sd-uhs-sdr50;
+ sd-uhs-sdr104;
+ vqmmc-supply = <0x49>;
+ vmmc-supply = <0x90>;
+ phandle = <0x106>;
+ };
+
+ dwmmc@ff390000 {
+ compatible = "rockchip,px30-dw-mshc\0rockchip,rk3288-dw-mshc";
+ reg = <0x00 0xff390000 0x00 0x4000>;
+ max-frequency = <0x8f0d180>;
+ clocks = <0x02 0x100 0x02 0x39 0x02 0x47 0x02 0x48>;
+ clock-names = "biu\0ciu\0ciu-drv\0ciu-sample";
+ assigned-clocks = <0x02 0x39>;
+ assigned-clock-parents = <0x02 0x53>;
+ power-domains = <0x87 0x0a>;
+ fifo-depth = <0x100>;
+ interrupts = <0x00 0x35 0x04>;
+ status = "okay";
+ phandle = <0x107>;
+ };
+
+ nandc@ff3b0000 {
+ compatible = "rockchip,rk-nandc";
+ reg = <0x00 0xff3b0000 0x00 0x4000>;
+ interrupts = <0x00 0x39 0x04>;
+ nandc_id = <0x00>;
+ clocks = <0x02 0x37 0x02 0xfe>;
+ clock-names = "clk_nandc\0hclk_nandc";
+ assigned-clocks = <0x02 0x37>;
+ assigned-clock-parents = <0x02 0x4f>;
+ power-domains = <0x87 0x0a>;
+ status = "disabled";
+ phandle = <0x108>;
+ };
+
+ sfc@ff3a0000 {
+ compatible = "rockchip,sfc";
+ reg = <0x00 0xff3a0000 0x00 0x4000>;
+ interrupts = <0x00 0x38 0x04>;
+ clocks = <0x02 0x3a 0x02 0x101>;
+ clock-names = "clk_sfc\0hclk_sfc";
+ assigned-clocks = <0x02 0x3a>;
+ assigned-clock-rates = <0x989680>;
+ status = "disabled";
+ phandle = <0x109>;
+ };
+
+ gpu@ff400000 {
+ compatible = "arm,malit602\0arm,malit60x\0arm,malit6xx\0arm,mali-midgard";
+ reg = <0x00 0xff400000 0x00 0x4000>;
+ interrupts = <0x00 0x2d 0x04 0x00 0x2e 0x04 0x00 0x2f 0x04>;
+ interrupt-names = "GPU\0MMU\0JOB";
+ clocks = <0x02 0x49>;
+ clock-names = "clk_mali";
+ power-domains = <0x87 0x0e>;
+ #cooling-cells = <0x02>;
+ operating-points-v2 = <0x94>;
+ status = "okay";
+ mali-supply = <0x0e>;
+ phandle = <0x82>;
+
+ power_model {
+ compatible = "arm,mali-simple-power-model";
+ static-coefficient = <0x64578>;
+ dynamic-coefficient = <0x2dd>;
+ ts = <0x7d00 0x125c 0xffffffb0 0x02>;
+ thermal-zone = "gpu-thermal";
+ };
+ };
+
+ gpu-opp-table {
+ compatible = "operating-points-v2";
+ rockchip,thermal-zone = "soc-thermal";
+ rockchip,temp-hysteresis = <0x1388>;
+ rockchip,low-temp = <0x00>;
+ rockchip,low-temp-min-volt = <0xf4240>;
+ rockchip,low-temp-adjust-volt = <0x00 0x1e0 0xc350>;
+ rockchip,max-volt = <0x11edd8>;
+ rockchip,evb-irdrop = <0x61a8>;
+ rockchip,pvtm-voltage-sel = <0x00 0xc350 0x00 0xc351 0xd2f0 0x01 0xd2f1 0xea60 0x02 0xea61 0x1869f 0x03>;
+ rockchip,pvtm-ch = <0x00 0x00>;
+ phandle = <0x94>;
+
+ opp-400000000 {
+ opp-hz = <0x00 0x17d78400>;
+ opp-microvolt = <0x100590>;
+ opp-microvolt-L0 = <0x100590>;
+ opp-microvolt-L1 = <0xfa3e8>;
+ opp-microvolt-L2 = <0xee098>;
+ opp-microvolt-L3 = <0xe7ef0>;
+ };
+
+ opp-480000000 {
+ opp-hz = <0x00 0x1c9c3800>;
+ opp-microvolt = <0x112a88>;
+ opp-microvolt-L0 = <0x112a88>;
+ opp-microvolt-L1 = <0x10c8e0>;
+ opp-microvolt-L2 = <0x100590>;
+ opp-microvolt-L3 = <0xf4240>;
+ };
+
+ opp-520000000 {
+ opp-hz = <0x00 0x1efe9200>;
+ opp-microvolt = <0x118c30>;
+ opp-microvolt-L0 = <0x118c30>;
+ opp-microvolt-L1 = <0x118c30>;
+ opp-microvolt-L2 = <0x10c8e0>;
+ opp-microvolt-L3 = <0x100590>;
+ };
+ };
+
+ hevc_service@ff440000 {
+ compatible = "rockchip,hevc_sub";
+ iommu_enabled = <0x01>;
+ reg = <0x00 0xff440000 0x00 0x400>;
+ interrupts = <0x00 0x31 0x04>;
+ interrupt-names = "irq_dec";
+ dev_mode = <0x01>;
+ iommus = <0x95>;
+ allocator = <0x01>;
+ phandle = <0x98>;
+ };
+
+ vpu_service@ff442000 {
+ compatible = "rockchip,vpu_sub";
+ iommu_enabled = <0x01>;
+ reg = <0x00 0xff442000 0x00 0x800>;
+ interrupts = <0x00 0x50 0x04 0x00 0x4f 0x04>;
+ interrupt-names = "irq_enc\0irq_dec";
+ dev_mode = <0x00>;
+ iommus = <0x96>;
+ allocator = <0x01>;
+ phandle = <0x97>;
+ };
+
+ vpu_combo {
+ compatible = "rockchip,vpu_combo";
+ subcnt = <0x02>;
+ rockchip,grf = <0x2f>;
+ rockchip,sub = <0x97 0x98>;
+ clocks = <0x02 0xaf 0x02 0xf4 0x02 0x4b>;
+ clock-names = "aclk_vcodec\0hclk_vcodec\0clk_core";
+ resets = <0x02 0x24 0x02 0x26 0x02 0x25 0x02 0x27 0x02 0x3f>;
+ reset-names = "video_a\0video_h\0niu_a\0niu_h\0video_core";
+ power-domains = <0x87 0x0b>;
+ mode_bit = <0x0f>;
+ mode_ctrl = <0x410>;
+ status = "okay";
+ phandle = <0x10a>;
+ };
+
+ iommu@ff440440 {
+ compatible = "rockchip,iommu";
+ reg = <0x00 0xff440440 0x00 0x40 0x00 0xff440480 0x00 0x40>;
+ interrupts = <0x00 0x32 0x04>;
+ interrupt-names = "hevc_mmu";
+ clocks = <0x02 0xaf 0x02 0xf4>;
+ clock-names = "aclk\0hclk";
+ power-domains = <0x87 0x0b>;
+ #iommu-cells = <0x00>;
+ phandle = <0x95>;
+ };
+
+ iommu@ff442800 {
+ compatible = "rockchip,iommu";
+ reg = <0x00 0xff442800 0x00 0x100>;
+ interrupts = <0x00 0x51 0x04>;
+ interrupt-names = "vpu_mmu";
+ clocks = <0x02 0xaf 0x02 0xf4>;
+ clock-names = "aclk\0hclk";
+ power-domains = <0x87 0x0b>;
+ #iommu-cells = <0x00>;
+ phandle = <0x96>;
+ };
+
+ dsi@ff450000 {
+ compatible = "rockchip,px30-mipi-dsi";
+ reg = <0x00 0xff450000 0x00 0x10000>;
+ interrupts = <0x00 0x4b 0x04>;
+ clocks = <0x02 0x144 0x4b>;
+ clock-names = "pclk\0hs_clk";
+ resets = <0x02 0x3d>;
+ reset-names = "apb";
+ phys = <0x4b>;
+ phy-names = "mipi_dphy";
+ power-domains = <0x87 0x0c>;
+ rockchip,grf = <0x2f>;
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+ status = "okay";
+ phandle = <0x10b>;
+
+ ports {
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+
+ port@0 {
+ reg = <0x00>;
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+
+ endpoint@0 {
+ reg = <0x00>;
+ remote-endpoint = <0x13>;
+ status = "okay";
+ phandle = <0x9f>;
+ };
+ };
+ };
+
+ panel@0 {
+ compatible = "elida,kd35t133\0simple-panel-dsi";
+ reg = <0x00>;
+ backlight = <0x99>;
+ power-supply = <0x9a>;
+ enable-gpios = <0x9b 0x12 0x01>;
+ reset-gpios = <0x63 0x10 0x01>;
+ led-red-gpios = <0x59 0x05 0x00>;
+ led-blue1-gpios = <0x59 0x00 0x00>;
+ prepare-delay-ms = <0x64>;
+ reset-delay-ms = <0x32>;
+ init-delay-ms = <0x14>;
+ enable-delay-ms = <0xc8>;
+ disable-delay-ms = <0x32>;
+ unprepare-delay-ms = <0x14>;
+ width-mm = <0x47>;
+ height-mm = <0x47>;
+ dsi,flags = <0xa03>;
+ dsi,format = <0x00>;
+ dsi,lanes = <0x04>;
+ panel-init-sequence = [39 00 04 b9 f1 12 83 39 00 1c ba 33 81 05 f9 0e 0e 20 00 00 00 00 00 00 00 44 25 00 91 0a 00 00 02 4f d1 00 00 37 15 00 02 b8 25 39 00 04 bf 02 11 00 39 00 0b b3 0c 10 0a 50 03 ff 00 00 00 00 39 00 0a c0 73 73 50 50 00 00 08 70 00 15 00 02 bc 46 15 00 02 cc 0b 15 00 02 b4 80 39 00 04 b2 00 13 f0 39 00 0f e3 07 07 0b 0b 03 0b 00 00 00 00 ff 00 c0 10 39 00 0d c1 53 00 1e 1e 77 e1 cc dd 67 77 33 33 39 00 03 b5 10 10 39 00 03 b6 6c 7c 39 00 40 e9 08 00 0e 00 00 b0 b1 11 31 23 28 10 b0 b1 27 08 00 04 02 00 00 00 00 04 02 00 00 00 88 88 ba 60 24 08 88 88 88 88 88 88 88 ba 71 35 18 88 88 88 88 88 00 00 00 01 00 00 00 00 00 00 00 00 00 39 00 3e ea 97 0a 82 02 13 07 00 00 00 00 00 00 80 88 ba 17 53 88 88 88 88 88 88 81 88 ba 06 42 88 88 88 88 88 88 23 10 00 02 80 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 39 00 23 e0 00 07 0b 27 2d 3f 3b 37 05 0a 0b 0f 11 0f 12 12 18 00 07 0b 27 2d 3f 3b 37 05 0a 0b 0f 11 0f 12 12 18 05 96 01 11 05 32 01 29];
+ panel-exit-sequence = <0x5140128 0x50a0110>;
+
+ display-timings {
+ native-mode = <0x9c>;
+
+ 60Hz {
+ clock-frequency = <0x2625a00>;
+ hactive = <0x280>;
+ vactive = <0x1e0>;
+ hback-porch = <0x78>;
+ hfront-porch = <0x78>;
+ vback-porch = <0x0d>;
+ vfront-porch = <0x11>;
+ hsync-len = <0x78>;
+ vsync-len = <0x05>;
+ hsync-active = <0x00>;
+ vsync-active = <0x00>;
+ de-active = <0x00>;
+ pixelclk-active = <0x00>;
+ phandle = <0x9c>;
+ };
+
+ 50Hz {
+ clock-frequency = <0x1851960>;
+ hactive = <0x280>;
+ vactive = <0x1e0>;
+ hfront-porch = <0xbc>;
+ hsync-len = <0x02>;
+ hback-porch = <0xbe>;
+ vfront-porch = <0x0d>;
+ vsync-len = <0x02>;
+ vback-porch = <0x05>;
+ hsync-active = <0x00>;
+ vsync-active = <0x00>;
+ de-active = <0x00>;
+ pixelclk-active = <0x00>;
+ phandle = <0x10c>;
+ };
+
+ 75Hz {
+ clock-frequency = <0x1d2eb40>;
+ hactive = <0x280>;
+ vactive = <0x1e0>;
+ hfront-porch = <0x57>;
+ hsync-len = <0x02>;
+ hback-porch = <0x57>;
+ vfront-porch = <0x0d>;
+ vsync-len = <0x02>;
+ vback-porch = <0x05>;
+ hsync-active = <0x00>;
+ vsync-active = <0x00>;
+ de-active = <0x00>;
+ pixelclk-active = <0x00>;
+ phandle = <0x10d>;
+ };
+ };
+ };
+ };
+
+ vop@ff460000 {
+ compatible = "rockchip,px30-vop-big";
+ reg = <0x00 0xff460000 0x00 0x1fc 0x00 0xff460a00 0x00 0x400>;
+ rockchip,grf = <0x2f>;
+ reg-names = "regs\0gamma_lut";
+ interrupts = <0x00 0x4d 0x04>;
+ clocks = <0x02 0xb5 0x02 0x96 0x02 0xfb>;
+ clock-names = "aclk_vop\0dclk_vop\0hclk_vop";
+ power-domains = <0x87 0x0c>;
+ iommus = <0x9d>;
+ status = "okay";
+ phandle = <0x10e>;
+
+ port {
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+ phandle = <0x10>;
+
+ endpoint@0 {
+ reg = <0x00>;
+ remote-endpoint = <0x9e>;
+ phandle = <0x12>;
+ };
+
+ endpoint@1 {
+ reg = <0x01>;
+ remote-endpoint = <0x9f>;
+ phandle = <0x13>;
+ };
+
+ endpoint@2 {
+ reg = <0x02>;
+ remote-endpoint = <0xa0>;
+ phandle = <0x14>;
+ };
+ };
+ };
+
+ iommu@ff460f00 {
+ compatible = "rockchip,iommu";
+ reg = <0x00 0xff460f00 0x00 0x100>;
+ interrupts = <0x00 0x4d 0x04>;
+ interrupt-names = "vopb_mmu";
+ clocks = <0x02 0xb5 0x02 0xfb>;
+ clock-names = "aclk\0hclk";
+ power-domains = <0x87 0x0c>;
+ #iommu-cells = <0x00>;
+ status = "okay";
+ phandle = <0x9d>;
+ };
+
+ rk_rga@ff480000 {
+ compatible = "rockchip,rga2";
+ reg = <0x00 0xff480000 0x00 0x1000>;
+ interrupts = <0x00 0x4c 0x04>;
+ clocks = <0x02 0xb7 0x02 0xfd 0x02 0x35>;
+ clock-names = "aclk_rga\0hclk_rga\0clk_rga";
+ power-domains = <0x87 0x0c>;
+ dma-coherent;
+ status = "okay";
+ phandle = <0x10f>;
+ };
+
+ cif@ff490000 {
+ compatible = "rockchip,cif";
+ reg = <0x00 0xff490000 0x00 0x200>;
+ interrupts = <0x00 0x45 0x04>;
+ clocks = <0x02 0xb3 0x02 0xf9 0x02 0x160 0x02 0x34>;
+ clock-names = "aclk_cif0\0hclk_cif0\0pclk_cif\0cif0_out";
+ resets = <0x02 0x2c 0x02 0x2d 0x02 0x2e>;
+ reset-names = "rst_cif_a\0rst_cif_h\0rst_cif_pclkin";
+ power-domains = <0x87 0x0d>;
+ pinctrl-names = "cif_pin_all";
+ pinctrl-0 = <0xa1>;
+ iommus = <0xa2>;
+ status = "disabled";
+ phandle = <0x110>;
+ };
+
+ cif-new@ff490000 {
+ compatible = "rockchip,px30-cif";
+ reg = <0x00 0xff490000 0x00 0x200>;
+ interrupts = <0x00 0x45 0x04>;
+ clocks = <0x02 0xb3 0x02 0xf9 0x02 0x160 0x02 0x34>;
+ clock-names = "aclk_cif\0hclk_cif\0pclk_cif\0cif_out";
+ resets = <0x02 0x2c 0x02 0x2d 0x02 0x2e>;
+ reset-names = "rst_cif_a\0rst_cif_h\0rst_cif_pclkin";
+ power-domains = <0x87 0x0d>;
+ iommus = <0xa2>;
+ status = "disabled";
+ phandle = <0x111>;
+ };
+
+ iommu@ff490800 {
+ compatible = "rockchip,iommu";
+ reg = <0x00 0xff490800 0x00 0x100>;
+ interrupts = <0x00 0x45 0x04>;
+ interrupt-names = "vip_mmu";
+ clocks = <0x02 0xb3 0x02 0xf9>;
+ clock-names = "aclk\0hclk";
+ power-domains = <0x87 0x0d>;
+ rk_iommu,disable_reset_quirk;
+ #iommu-cells = <0x00>;
+ status = "okay";
+ phandle = <0xa2>;
+ };
+
+ rk_isp@ff4a0000 {
+ compatible = "rockchip,px30-isp\0rockchip,isp";
+ reg = <0x00 0xff4a0000 0x00 0x8000>;
+ interrupts = <0x00 0x46 0x04>;
+ clocks = <0x02 0xb4 0x02 0xfa 0x02 0x33 0x02 0x33 0x02 0x15f 0x02 0x34 0x02 0x34 0x02 0x146>;
+ clock-names = "aclk_isp\0hclk_isp\0clk_isp\0clk_isp_jpe\0pclkin_isp\0clk_cif_pll\0clk_cif_out\0pclk_dphyrx";
+ resets = <0x02 0x2b 0x02 0x2f>;
+ reset-names = "rst_isp\0rst_mipicsiphy";
+ power-domains = <0x87 0x0d>;
+ pinctrl-names = "default\0isp_dvp8bit2\0isp_dvp10bit\0isp_dvp12bit";
+ pinctrl-0 = <0xa3>;
+ pinctrl-1 = <0xa1>;
+ pinctrl-2 = <0xa1 0xa4>;
+ pinctrl-3 = <0xa5 0xa1 0xa4>;
+ rockchip,isp,mipiphy = <0x01>;
+ rockchip,isp,csiphy,reg = <0xff2f0000 0x4000>;
+ rockchip,grf = <0x2f>;
+ rockchip,cru = <0x02>;
+ rockchip,isp,iommu-enable = <0x01>;
+ iommus = <0xa6>;
+ status = "disabled";
+ phandle = <0x112>;
+ };
+
+ rkisp1@ff4a0000 {
+ compatible = "rockchip,rk3326-rkisp1";
+ reg = <0x00 0xff4a0000 0x00 0x8000>;
+ interrupts = <0x00 0x46 0x04 0x00 0x49 0x04 0x00 0x4a 0x04>;
+ interrupt-names = "isp_irq\0mi_irq\0mipi_irq";
+ clocks = <0x02 0xb4 0x02 0xfa 0x02 0x33 0x02 0x15f>;
+ clock-names = "aclk_isp\0hclk_isp\0clk_isp\0pclk_isp";
+ devfreq = <0xa7>;
+ power-domains = <0x87 0x0d>;
+ iommus = <0xa6>;
+ rockchip,grf = <0x2f>;
+ status = "okay";
+ phandle = <0x113>;
+ };
+
+ iommu@ff4a8000 {
+ compatible = "rockchip,iommu";
+ reg = <0x00 0xff4a8000 0x00 0x100>;
+ interrupts = <0x00 0x46 0x04>;
+ interrupt-names = "isp_mmu";
+ clocks = <0x02 0xb4 0x02 0xfa>;
+ clock-names = "aclk\0hclk";
+ power-domains = <0x87 0x0d>;
+ rk_iommu,disable_reset_quirk;
+ #iommu-cells = <0x00>;
+ status = "okay";
+ phandle = <0xa6>;
+ };
+
+ qos@ff518000 {
+ compatible = "syscon";
+ reg = <0x00 0xff518000 0x00 0x20>;
+ phandle = <0x18>;
+ };
+
+ qos@ff520000 {
+ compatible = "syscon";
+ reg = <0x00 0xff520000 0x00 0x20>;
+ phandle = <0x28>;
+ };
+
+ qos@ff52c000 {
+ compatible = "syscon";
+ reg = <0x00 0xff52c000 0x00 0x20>;
+ phandle = <0x17>;
+ };
+
+ qos@ff538000 {
+ compatible = "syscon";
+ reg = <0x00 0xff538000 0x00 0x20>;
+ phandle = <0x19>;
+ };
+
+ qos@ff538080 {
+ compatible = "syscon";
+ reg = <0x00 0xff538080 0x00 0x20>;
+ phandle = <0x1a>;
+ };
+
+ qos@ff538100 {
+ compatible = "syscon";
+ reg = <0x00 0xff538100 0x00 0x20>;
+ phandle = <0x1b>;
+ };
+
+ qos@ff538180 {
+ compatible = "syscon";
+ reg = <0x00 0xff538180 0x00 0x20>;
+ phandle = <0x1c>;
+ };
+
+ qos@ff540000 {
+ compatible = "syscon";
+ reg = <0x00 0xff540000 0x00 0x20>;
+ phandle = <0x15>;
+ };
+
+ qos@ff540080 {
+ compatible = "syscon";
+ reg = <0x00 0xff540080 0x00 0x20>;
+ phandle = <0x16>;
+ };
+
+ qos@ff548000 {
+ compatible = "syscon";
+ reg = <0x00 0xff548000 0x00 0x20>;
+ phandle = <0x23>;
+ };
+
+ qos@ff548080 {
+ compatible = "syscon";
+ reg = <0x00 0xff548080 0x00 0x20>;
+ phandle = <0x24>;
+ };
+
+ qos@ff548100 {
+ compatible = "syscon";
+ reg = <0x00 0xff548100 0x00 0x20>;
+ phandle = <0x25>;
+ };
+
+ qos@ff548180 {
+ compatible = "syscon";
+ reg = <0x00 0xff548180 0x00 0x20>;
+ phandle = <0x26>;
+ };
+
+ qos@ff548200 {
+ compatible = "syscon";
+ reg = <0x00 0xff548200 0x00 0x20>;
+ phandle = <0x27>;
+ };
+
+ qos@ff550000 {
+ compatible = "syscon";
+ reg = <0x00 0xff550000 0x00 0x20>;
+ phandle = <0x1f>;
+ };
+
+ qos@ff550080 {
+ compatible = "syscon";
+ reg = <0x00 0xff550080 0x00 0x20>;
+ phandle = <0x20>;
+ };
+
+ qos@ff550100 {
+ compatible = "syscon";
+ reg = <0x00 0xff550100 0x00 0x20>;
+ phandle = <0x21>;
+ };
+
+ qos@ff550180 {
+ compatible = "syscon";
+ reg = <0x00 0xff550180 0x00 0x20>;
+ phandle = <0x22>;
+ };
+
+ qos@ff558000 {
+ compatible = "syscon";
+ reg = <0x00 0xff558000 0x00 0x20>;
+ phandle = <0x1d>;
+ };
+
+ qos@ff558080 {
+ compatible = "syscon";
+ reg = <0x00 0xff558080 0x00 0x20>;
+ phandle = <0x1e>;
+ };
+
+ dfi@ff610000 {
+ reg = <0x00 0xff610000 0x00 0x400>;
+ compatible = "rockchip,px30-dfi";
+ rockchip,pmugrf = <0xa8>;
+ status = "disabled";
+ phandle = <0xa9>;
+ };
+
+ dmc {
+ compatible = "rockchip,px30-dmc";
+ interrupts = <0x00 0x69 0x04>;
+ interrupt-names = "complete_irq";
+ devfreq-events = <0xa9>;
+ clocks = <0x02 0x54>;
+ clock-names = "dmc_clk";
+ operating-points-v2 = <0xaa>;
+ ddr_timing = <0xab>;
+ upthreshold = <0x28>;
+ downdifferential = <0x14>;
+ system-status-freq = <0x01 0x80e80 0x08 0x6ddd0 0x02 0x2f5d0 0x20 0x6ddd0 0x1000 0x80e80 0x4000 0xa2990 0x2000 0xa2990>;
+ auto-min-freq = <0x50140>;
+ auto-freq-en = <0x01>;
+ #cooling-cells = <0x02>;
+ status = "disabled";
+ center-supply = <0x0e>;
+ phandle = <0xa7>;
+
+ ddr_power_model {
+ compatible = "ddr_power_model";
+ dynamic-power-coefficient = <0x78>;
+ static-power-coefficient = <0xc8>;
+ ts = <0x7d00 0x125c 0xffffffb0 0x02>;
+ thermal-zone = "soc-thermal";
+ phandle = <0x114>;
+ };
+ };
+
+ dmc-opp-table {
+ compatible = "operating-points-v2";
+ rockchip,max-volt = <0x118c30>;
+ rockchip,evb-irdrop = <0x61a8>;
+ rockchip,pvtm-voltage-sel = <0x00 0xc350 0x00 0xc351 0xd2f0 0x01 0xd2f1 0xea60 0x02 0xea61 0x1869f 0x03>;
+ rockchip,pvtm-ch = <0x00 0x00>;
+ phandle = <0xaa>;
+
+ opp-528000000 {
+ opp-hz = <0x00 0x1f78a400>;
+ opp-microvolt = <0xee098>;
+ opp-microvolt-L0 = <0xee098>;
+ opp-microvolt-L1 = <0xee098>;
+ opp-microvolt-L2 = <0xe7ef0>;
+ opp-microvolt-L3 = <0xe7ef0>;
+ };
+
+ opp-666000000 {
+ opp-hz = <0x00 0x27b25a80>;
+ opp-microvolt = <0x100590>;
+ opp-microvolt-L0 = <0x100590>;
+ opp-microvolt-L1 = <0xf4240>;
+ opp-microvolt-L2 = <0xee098>;
+ opp-microvolt-L3 = <0xe7ef0>;
+ };
+
+ opp-786000000 {
+ opp-hz = <0x00 0x2ed96880>;
+ opp-microvolt = <0x10c8e0>;
+ opp-microvolt-L0 = <0x10c8e0>;
+ opp-microvolt-L1 = <0x100590>;
+ opp-microvolt-L2 = <0xfa3e8>;
+ opp-microvolt-L3 = <0xf4240>;
+ status = "okay";
+ };
+ };
+
+ rockchip-system-monitor {
+ compatible = "rockchip,system-monitor";
+ rockchip,thermal-zone = "soc-thermal";
+ rockchip,polling-delay = <0xc8>;
+ phandle = <0x115>;
+ };
+
+ pinctrl {
+ compatible = "rockchip,px30-pinctrl";
+ rockchip,grf = <0x2f>;
+ rockchip,pmu = <0xa8>;
+ #address-cells = <0x02>;
+ #size-cells = <0x02>;
+ ranges;
+ phandle = <0x116>;
+
+ gpio0@ff040000 {
+ compatible = "rockchip,gpio-bank";
+ reg = <0x00 0xff040000 0x00 0x100>;
+ interrupts = <0x00 0x03 0x04>;
+ clocks = <0x2a 0x14>;
+ gpio-controller;
+ #gpio-cells = <0x02>;
+ interrupt-controller;
+ #interrupt-cells = <0x02>;
+ phandle = <0x59>;
+ };
+
+ gpio1@ff250000 {
+ compatible = "rockchip,gpio-bank";
+ reg = <0x00 0xff250000 0x00 0x100>;
+ interrupts = <0x00 0x04 0x04>;
+ clocks = <0x02 0x15c>;
+ gpio-controller;
+ #gpio-cells = <0x02>;
+ interrupt-controller;
+ #interrupt-cells = <0x02>;
+ phandle = <0x9b>;
+ };
+
+ gpio2@ff260000 {
+ compatible = "rockchip,gpio-bank";
+ reg = <0x00 0xff260000 0x00 0x100>;
+ interrupts = <0x00 0x05 0x04>;
+ clocks = <0x02 0x15d>;
+ gpio-controller;
+ #gpio-cells = <0x02>;
+ interrupt-controller;
+ #interrupt-cells = <0x02>;
+ phandle = <0xbf>;
+ };
+
+ gpio3@ff270000 {
+ compatible = "rockchip,gpio-bank";
+ reg = <0x00 0xff270000 0x00 0x100>;
+ interrupts = <0x00 0x06 0x04>;
+ clocks = <0x02 0x15e>;
+ gpio-controller;
+ #gpio-cells = <0x02>;
+ interrupt-controller;
+ #interrupt-cells = <0x02>;
+ phandle = <0x63>;
+ };
+
+ pcfg-pull-up {
+ bias-pull-up;
+ phandle = <0xae>;
+ };
+
+ pcfg-pull-down {
+ bias-pull-down;
+ phandle = <0x117>;
+ };
+
+ pcfg-pull-none {
+ bias-disable;
+ phandle = <0xad>;
+ };
+
+ pcfg-pull-none-2ma {
+ bias-disable;
+ drive-strength = <0x02>;
+ phandle = <0x118>;
+ };
+
+ pcfg-pull-up-2ma {
+ bias-pull-up;
+ drive-strength = <0x02>;
+ phandle = <0x119>;
+ };
+
+ pcfg-pull-up-4ma {
+ bias-pull-up;
+ drive-strength = <0x04>;
+ phandle = <0xaf>;
+ };
+
+ pcfg-pull-none-4ma {
+ bias-disable;
+ drive-strength = <0x04>;
+ phandle = <0x11a>;
+ };
+
+ pcfg-pull-down-4ma {
+ bias-pull-down;
+ drive-strength = <0x04>;
+ phandle = <0x11b>;
+ };
+
+ pcfg-pull-none-8ma {
+ bias-disable;
+ drive-strength = <0x08>;
+ phandle = <0xb2>;
+ };
+
+ pcfg-pull-up-8ma {
+ bias-pull-up;
+ drive-strength = <0x08>;
+ phandle = <0xb0>;
+ };
+
+ pcfg-pull-none-12ma {
+ bias-disable;
+ drive-strength = <0x0c>;
+ phandle = <0xb4>;
+ };
+
+ pcfg-pull-up-12ma {
+ bias-pull-up;
+ drive-strength = <0x0c>;
+ phandle = <0xb3>;
+ };
+
+ pcfg-pull-none-smt {
+ bias-disable;
+ input-schmitt-enable;
+ phandle = <0xac>;
+ };
+
+ pcfg-output-high {
+ output-high;
+ phandle = <0x11c>;
+ };
+
+ pcfg-output-low {
+ output-low;
+ phandle = <0xb5>;
+ };
+
+ pcfg-input-high {
+ bias-pull-up;
+ input-enable;
+ phandle = <0xb1>;
+ };
+
+ pcfg-input {
+ input-enable;
+ phandle = <0x11d>;
+ };
+
+ i2c0 {
+
+ i2c0-xfer {
+ rockchip,pins = <0x00 0x08 0x01 0xac 0x00 0x09 0x01 0xac>;
+ phandle = <0x58>;
+ };
+ };
+
+ i2c1 {
+
+ i2c1-xfer {
+ rockchip,pins = <0x00 0x12 0x01 0xac 0x00 0x13 0x01 0xac>;
+ phandle = <0x66>;
+ };
+ };
+
+ i2c2 {
+
+ i2c2-xfer {
+ rockchip,pins = <0x02 0x0f 0x02 0xac 0x02 0x10 0x02 0xac>;
+ phandle = <0x67>;
+ };
+ };
+
+ i2c3 {
+
+ i2c3-xfer {
+ rockchip,pins = <0x01 0x0c 0x04 0xac 0x01 0x0d 0x04 0xac>;
+ phandle = <0x68>;
+ };
+ };
+
+ tsadc {
+
+ tsadc-otp-gpio {
+ rockchip,pins = <0x00 0x06 0x00 0xad>;
+ phandle = <0x83>;
+ };
+
+ tsadc-otp-out {
+ rockchip,pins = <0x00 0x06 0x01 0xad>;
+ phandle = <0x84>;
+ };
+ };
+
+ uart0 {
+
+ uart0-xfer {
+ rockchip,pins = <0x00 0x0a 0x01 0xae 0x00 0x0b 0x01 0xae>;
+ phandle = <0x2c>;
+ };
+
+ uart0-cts {
+ rockchip,pins = <0x00 0x0c 0x01 0xad>;
+ phandle = <0x2d>;
+ };
+
+ uart0-rts {
+ rockchip,pins = <0x00 0x0d 0x01 0xad>;
+ phandle = <0x2e>;
+ };
+
+ uart0-rts-gpio {
+ rockchip,pins = <0x00 0x0d 0x00 0xad>;
+ phandle = <0x11e>;
+ };
+ };
+
+ uart1 {
+
+ uart1-xfer {
+ rockchip,pins = <0x01 0x11 0x01 0xae 0x01 0x10 0x01 0xae>;
+ phandle = <0x11f>;
+ };
+
+ uart1-cts {
+ rockchip,pins = <0x01 0x12 0x01 0xad>;
+ phandle = <0x120>;
+ };
+
+ uart1-rts {
+ rockchip,pins = <0x01 0x13 0x01 0xad>;
+ phandle = <0x121>;
+ };
+
+ uart1-rts-gpio {
+ rockchip,pins = <0x01 0x13 0x00 0xad>;
+ phandle = <0x122>;
+ };
+ };
+
+ uart2-m0 {
+
+ uart2m0-xfer {
+ rockchip,pins = <0x01 0x1a 0x02 0xae 0x01 0x1b 0x02 0xae>;
+ phandle = <0x4e>;
+ };
+ };
+
+ uart2-m1 {
+
+ uart2m1-xfer {
+ rockchip,pins = <0x02 0x0c 0x02 0xae 0x02 0x0e 0x02 0xae>;
+ phandle = <0xb6>;
+ };
+ };
+
+ uart3-m0 {
+
+ uart3m0-xfer {
+ rockchip,pins = <0x00 0x10 0x02 0xae 0x00 0x11 0x02 0xae>;
+ phandle = <0x123>;
+ };
+
+ uart3m0-cts {
+ rockchip,pins = <0x00 0x12 0x02 0xad>;
+ phandle = <0x124>;
+ };
+
+ uart3m0-rts {
+ rockchip,pins = <0x00 0x13 0x02 0xad>;
+ phandle = <0x125>;
+ };
+
+ uart3m0-rts-gpio {
+ rockchip,pins = <0x00 0x13 0x00 0xad>;
+ phandle = <0x126>;
+ };
+ };
+
+ uart3-m1 {
+
+ uart3m1-xfer {
+ rockchip,pins = <0x01 0x0e 0x02 0xae 0x01 0x0f 0x02 0xae>;
+ phandle = <0x4f>;
+ };
+
+ uart3m1-cts {
+ rockchip,pins = <0x01 0x0c 0x02 0xad>;
+ phandle = <0x50>;
+ };
+
+ uart3m1-rts {
+ rockchip,pins = <0x01 0x0d 0x02 0xad>;
+ phandle = <0x51>;
+ };
+
+ uart3m1-rts-gpio {
+ rockchip,pins = <0x01 0x0d 0x00 0xad>;
+ phandle = <0x127>;
+ };
+ };
+
+ uart4 {
+
+ uart4-xfer {
+ rockchip,pins = <0x01 0x1c 0x02 0xae 0x01 0x1d 0x02 0xae>;
+ phandle = <0x52>;
+ };
+
+ uart4-cts {
+ rockchip,pins = <0x01 0x1e 0x02 0xad>;
+ phandle = <0x53>;
+ };
+
+ uart4-rts {
+ rockchip,pins = <0x01 0x1f 0x02 0xad>;
+ phandle = <0x54>;
+ };
+ };
+
+ uart5 {
+
+ uart5-xfer {
+ rockchip,pins = <0x03 0x02 0x04 0xae 0x03 0x01 0x04 0xae>;
+ phandle = <0x55>;
+ };
+
+ uart5-cts {
+ rockchip,pins = <0x03 0x03 0x04 0xad>;
+ phandle = <0x56>;
+ };
+
+ uart5-rts {
+ rockchip,pins = <0x03 0x05 0x04 0xad>;
+ phandle = <0x57>;
+ };
+ };
+
+ spi0 {
+
+ spi0-clk {
+ rockchip,pins = <0x01 0x0f 0x03 0xaf>;
+ phandle = <0x69>;
+ };
+
+ spi0-csn {
+ rockchip,pins = <0x01 0x0e 0x03 0xaf>;
+ phandle = <0x6a>;
+ };
+
+ spi0-miso {
+ rockchip,pins = <0x01 0x0d 0x03 0xaf>;
+ phandle = <0x6b>;
+ };
+
+ spi0-mosi {
+ rockchip,pins = <0x01 0x0c 0x03 0xaf>;
+ phandle = <0x6c>;
+ };
+
+ spi0-clk-hs {
+ rockchip,pins = <0x01 0x0f 0x03 0xb0>;
+ phandle = <0x6d>;
+ };
+
+ spi0-miso-hs {
+ rockchip,pins = <0x01 0x0d 0x03 0xb0>;
+ phandle = <0x6e>;
+ };
+
+ spi0-mosi-hs {
+ rockchip,pins = <0x01 0x0c 0x03 0xb0>;
+ phandle = <0x6f>;
+ };
+ };
+
+ spi1 {
+
+ spi1-clk {
+ rockchip,pins = <0x03 0x0f 0x04 0xaf>;
+ phandle = <0x70>;
+ };
+
+ spi1-csn0 {
+ rockchip,pins = <0x03 0x09 0x04 0xaf>;
+ phandle = <0x71>;
+ };
+
+ spi1-csn1 {
+ rockchip,pins = <0x03 0x0a 0x02 0xaf>;
+ phandle = <0x72>;
+ };
+
+ spi1-miso {
+ rockchip,pins = <0x03 0x0e 0x04 0xaf>;
+ phandle = <0x73>;
+ };
+
+ spi1-mosi {
+ rockchip,pins = <0x03 0x0c 0x04 0xaf>;
+ phandle = <0x74>;
+ };
+
+ spi1-clk-hs {
+ rockchip,pins = <0x03 0x0f 0x04 0xb0>;
+ phandle = <0x75>;
+ };
+
+ spi1-miso-hs {
+ rockchip,pins = <0x03 0x0e 0x04 0xb0>;
+ phandle = <0x76>;
+ };
+
+ spi1-mosi-hs {
+ rockchip,pins = <0x03 0x0c 0x04 0xb0>;
+ phandle = <0x77>;
+ };
+ };
+
+ pdm {
+
+ pdm-clk0m1 {
+ rockchip,pins = <0x02 0x16 0x01 0xad>;
+ phandle = <0x128>;
+ };
+
+ pdm-clk1 {
+ rockchip,pins = <0x03 0x17 0x02 0xad>;
+ phandle = <0x44>;
+ };
+
+ pdm-sdi0m0 {
+ rockchip,pins = <0x03 0x1b 0x02 0xad>;
+ phandle = <0x45>;
+ };
+
+ pdm-sdi0m1 {
+ rockchip,pins = <0x02 0x15 0x02 0xad>;
+ phandle = <0x129>;
+ };
+
+ pdm-sdi1 {
+ rockchip,pins = <0x03 0x18 0x02 0xad>;
+ phandle = <0x46>;
+ };
+
+ pdm-sdi2 {
+ rockchip,pins = <0x03 0x19 0x02 0xad>;
+ phandle = <0x47>;
+ };
+
+ pdm-sdi3 {
+ rockchip,pins = <0x03 0x1a 0x02 0xad>;
+ phandle = <0x48>;
+ };
+
+ pdm-clk0m1-sleep {
+ rockchip,pins = <0x02 0x16 0x00 0xb1>;
+ phandle = <0x12a>;
+ };
+
+ pdm-clk1-sleep {
+ rockchip,pins = <0x03 0x17 0x00 0xb1>;
+ phandle = <0x12b>;
+ };
+
+ pdm-sdi0m0-sleep {
+ rockchip,pins = <0x03 0x1b 0x00 0xb1>;
+ phandle = <0x12c>;
+ };
+
+ pdm-sdi0m1-sleep {
+ rockchip,pins = <0x02 0x15 0x00 0xb1>;
+ phandle = <0x12d>;
+ };
+
+ pdm-sdi1-sleep {
+ rockchip,pins = <0x03 0x18 0x00 0xb1>;
+ phandle = <0x12e>;
+ };
+
+ pdm-sdi2-sleep {
+ rockchip,pins = <0x03 0x19 0x00 0xb1>;
+ phandle = <0x12f>;
+ };
+
+ pdm-sdi3-sleep {
+ rockchip,pins = <0x03 0x1a 0x00 0xb1>;
+ phandle = <0x130>;
+ };
+ };
+
+ i2s0 {
+
+ i2s0-8ch-mclk {
+ rockchip,pins = <0x03 0x11 0x02 0xad>;
+ phandle = <0x131>;
+ };
+
+ i2s0-8ch-sclktx {
+ rockchip,pins = <0x03 0x13 0x02 0xad>;
+ phandle = <0x30>;
+ };
+
+ i2s0-8ch-sclkrx {
+ rockchip,pins = <0x03 0x0c 0x02 0xad>;
+ phandle = <0x31>;
+ };
+
+ i2s0-8ch-lrcktx {
+ rockchip,pins = <0x03 0x12 0x02 0xad>;
+ phandle = <0x32>;
+ };
+
+ i2s0-8ch-lrckrx {
+ rockchip,pins = <0x03 0x0d 0x02 0xad>;
+ phandle = <0x33>;
+ };
+
+ i2s0-8ch-sdo0 {
+ rockchip,pins = <0x03 0x14 0x02 0xad>;
+ phandle = <0x38>;
+ };
+
+ i2s0-8ch-sdo1 {
+ rockchip,pins = <0x03 0x10 0x02 0xad>;
+ phandle = <0x39>;
+ };
+
+ i2s0-8ch-sdo2 {
+ rockchip,pins = <0x03 0x0f 0x02 0xad>;
+ phandle = <0x3a>;
+ };
+
+ i2s0-8ch-sdo3 {
+ rockchip,pins = <0x03 0x0e 0x02 0xad>;
+ phandle = <0x3b>;
+ };
+
+ i2s0-8ch-sdi0 {
+ rockchip,pins = <0x03 0x15 0x02 0xad>;
+ phandle = <0x34>;
+ };
+
+ i2s0-8ch-sdi1 {
+ rockchip,pins = <0x03 0x0b 0x02 0xad>;
+ phandle = <0x35>;
+ };
+
+ i2s0-8ch-sdi2 {
+ rockchip,pins = <0x03 0x09 0x02 0xad>;
+ phandle = <0x36>;
+ };
+
+ i2s0-8ch-sdi3 {
+ rockchip,pins = <0x03 0x08 0x02 0xad>;
+ phandle = <0x37>;
+ };
+ };
+
+ i2s1 {
+
+ i2s1-2ch-mclk {
+ rockchip,pins = <0x02 0x13 0x01 0xad>;
+ phandle = <0x65>;
+ };
+
+ i2s1-2ch-sclk {
+ rockchip,pins = <0x02 0x12 0x01 0xad>;
+ phandle = <0x3c>;
+ };
+
+ i2s1-2ch-lrck {
+ rockchip,pins = <0x02 0x11 0x01 0xad>;
+ phandle = <0x3d>;
+ };
+
+ i2s1-2ch-sdi {
+ rockchip,pins = <0x02 0x15 0x01 0xad>;
+ phandle = <0x3e>;
+ };
+
+ i2s1-2ch-sdo {
+ rockchip,pins = <0x02 0x14 0x01 0xad>;
+ phandle = <0x3f>;
+ };
+ };
+
+ i2s2 {
+
+ i2s2-2ch-mclk {
+ rockchip,pins = <0x03 0x01 0x02 0xad>;
+ phandle = <0x132>;
+ };
+
+ i2s2-2ch-sclk {
+ rockchip,pins = <0x03 0x02 0x02 0xad>;
+ phandle = <0x40>;
+ };
+
+ i2s2-2ch-lrck {
+ rockchip,pins = <0x03 0x03 0x02 0xad>;
+ phandle = <0x41>;
+ };
+
+ i2s2-2ch-sdi {
+ rockchip,pins = <0x03 0x05 0x02 0xad>;
+ phandle = <0x42>;
+ };
+
+ i2s2-2ch-sdo {
+ rockchip,pins = <0x03 0x07 0x02 0xad>;
+ phandle = <0x43>;
+ };
+ };
+
+ sdmmc {
+
+ sdmmc-clk {
+ rockchip,pins = <0x01 0x1e 0x01 0xb2>;
+ phandle = <0x8c>;
+ };
+
+ sdmmc-cmd {
+ rockchip,pins = <0x01 0x1f 0x01 0xb0>;
+ phandle = <0x8d>;
+ };
+
+ sdmmc-det {
+ rockchip,pins = <0x00 0x03 0x01 0xb0>;
+ phandle = <0x8e>;
+ };
+
+ sdmmc-bus1 {
+ rockchip,pins = <0x01 0x1a 0x01 0xb0>;
+ phandle = <0x133>;
+ };
+
+ sdmmc-bus4 {
+ rockchip,pins = <0x01 0x1a 0x01 0xb0 0x01 0x1b 0x01 0xb0 0x01 0x1c 0x01 0xb0 0x01 0x1d 0x01 0xb0>;
+ phandle = <0x8f>;
+ };
+
+ sdmmc-gpio {
+ rockchip,pins = <0x01 0x1a 0x00 0xaf 0x01 0x1b 0x00 0xaf 0x01 0x1c 0x00 0xaf 0x01 0x1d 0x00 0xaf 0x01 0x1e 0x00 0xaf 0x01 0x1f 0x00 0xaf>;
+ phandle = <0x134>;
+ };
+ };
+
+ sdio {
+
+ sdio-clk {
+ rockchip,pins = <0x01 0x15 0x01 0xad>;
+ phandle = <0x93>;
+ };
+
+ sdio-cmd {
+ rockchip,pins = <0x01 0x14 0x01 0xae>;
+ phandle = <0x92>;
+ };
+
+ sdio-bus4 {
+ rockchip,pins = <0x01 0x16 0x01 0xae 0x01 0x17 0x01 0xae 0x01 0x18 0x01 0xae 0x01 0x19 0x01 0xae>;
+ phandle = <0x91>;
+ };
+
+ sdio-gpio {
+ rockchip,pins = <0x01 0x16 0x00 0xae 0x01 0x17 0x00 0xae 0x01 0x18 0x00 0xae 0x01 0x19 0x00 0xae 0x01 0x14 0x00 0xae 0x01 0x15 0x00 0xae>;
+ phandle = <0x135>;
+ };
+ };
+
+ emmc {
+
+ emmc-clk {
+ rockchip,pins = <0x01 0x09 0x02 0xb2>;
+ phandle = <0x136>;
+ };
+
+ emmc-cmd {
+ rockchip,pins = <0x01 0x0a 0x02 0xb0>;
+ phandle = <0x137>;
+ };
+
+ emmc-pwren {
+ rockchip,pins = <0x01 0x08 0x02 0xad>;
+ phandle = <0x138>;
+ };
+
+ emmc-rstnout {
+ rockchip,pins = <0x01 0x0b 0x02 0xad>;
+ phandle = <0x139>;
+ };
+
+ emmc-bus1 {
+ rockchip,pins = <0x01 0x00 0x02 0xb0>;
+ phandle = <0x13a>;
+ };
+
+ emmc-bus4 {
+ rockchip,pins = <0x01 0x00 0x02 0xb0 0x01 0x01 0x02 0xb0 0x01 0x02 0x02 0xb0 0x01 0x03 0x02 0xb0>;
+ phandle = <0x13b>;
+ };
+
+ emmc-bus8 {
+ rockchip,pins = <0x01 0x00 0x02 0xb0 0x01 0x01 0x02 0xb0 0x01 0x02 0x02 0xb0 0x01 0x03 0x02 0xb0 0x01 0x04 0x02 0xb0 0x01 0x05 0x02 0xb0 0x01 0x06 0x02 0xb0 0x01 0x07 0x02 0xb0>;
+ phandle = <0x13c>;
+ };
+ };
+
+ flash {
+
+ flash-cs0 {
+ rockchip,pins = <0x01 0x08 0x01 0xad>;
+ phandle = <0x13d>;
+ };
+
+ flash-rdy {
+ rockchip,pins = <0x01 0x09 0x01 0xad>;
+ phandle = <0x13e>;
+ };
+
+ flash-dqs {
+ rockchip,pins = <0x01 0x0a 0x01 0xad>;
+ phandle = <0x13f>;
+ };
+
+ flash-ale {
+ rockchip,pins = <0x01 0x0b 0x01 0xad>;
+ phandle = <0x140>;
+ };
+
+ flash-cle {
+ rockchip,pins = <0x01 0x0c 0x01 0xad>;
+ phandle = <0x141>;
+ };
+
+ flash-wrn {
+ rockchip,pins = <0x01 0x0d 0x01 0xad>;
+ phandle = <0x142>;
+ };
+
+ flash-csl {
+ rockchip,pins = <0x01 0x0e 0x01 0xad>;
+ phandle = <0x143>;
+ };
+
+ flash-rdn {
+ rockchip,pins = <0x01 0x0f 0x01 0xad>;
+ phandle = <0x144>;
+ };
+
+ flash-bus8 {
+ rockchip,pins = <0x01 0x00 0x01 0xb3 0x01 0x01 0x01 0xb3 0x01 0x02 0x01 0xb3 0x01 0x03 0x01 0xb3 0x01 0x04 0x01 0xb3 0x01 0x05 0x01 0xb3 0x01 0x06 0x01 0xb3 0x01 0x07 0x01 0xb3>;
+ phandle = <0x145>;
+ };
+ };
+
+ lcdc {
+
+ lcdc-m0-rgb-pins {
+ rockchip,pins = <0x03 0x00 0x01 0xb2 0x03 0x01 0x01 0xb2 0x03 0x02 0x01 0xb2 0x03 0x03 0x01 0xb2 0x03 0x04 0x01 0xb2 0x03 0x05 0x01 0xb2 0x03 0x06 0x01 0xb2 0x03 0x07 0x01 0xb2 0x03 0x08 0x01 0xb2 0x03 0x09 0x01 0xb2 0x03 0x0a 0x01 0xb2 0x03 0x0b 0x01 0xb2 0x03 0x0c 0x01 0xb2 0x03 0x0d 0x01 0xb2 0x03 0x0e 0x01 0xb2 0x03 0x0f 0x01 0xb2 0x03 0x10 0x01 0xb2 0x03 0x11 0x01 0xb2 0x03 0x12 0x01 0xb2 0x03 0x13 0x01 0xb2 0x03 0x14 0x01 0xb2 0x03 0x15 0x01 0xb2 0x03 0x16 0x01 0xb2 0x03 0x17 0x01 0xb2 0x03 0x18 0x01 0xb2 0x03 0x19 0x01 0xb2 0x03 0x1a 0x01 0xb2 0x03 0x1b 0x01 0xb2>;
+ phandle = <0x146>;
+ };
+
+ lcdc-m0-sleep-pins {
+ rockchip,pins = <0x03 0x00 0x00 0xad 0x03 0x01 0x00 0xad 0x03 0x02 0x00 0xad 0x03 0x03 0x00 0xad 0x03 0x04 0x00 0xad 0x03 0x05 0x00 0xad 0x03 0x06 0x00 0xad 0x03 0x07 0x00 0xad 0x03 0x08 0x00 0xad 0x03 0x09 0x00 0xad 0x03 0x0a 0x00 0xad 0x03 0x0b 0x00 0xad 0x03 0x0c 0x00 0xad 0x03 0x0d 0x00 0xad 0x03 0x0e 0x00 0xad 0x03 0x0f 0x00 0xad 0x03 0x10 0x00 0xad 0x03 0x11 0x00 0xad 0x03 0x12 0x00 0xad 0x03 0x13 0x00 0xad 0x03 0x14 0x00 0xad 0x03 0x15 0x00 0xad 0x03 0x16 0x00 0xad 0x03 0x17 0x00 0xad 0x03 0x18 0x00 0xad 0x03 0x19 0x00 0xad 0x03 0x1a 0x00 0xad 0x03 0x1b 0x00 0xad>;
+ phandle = <0x147>;
+ };
+
+ lcdc-m1-rgb-pins {
+ rockchip,pins = <0x03 0x00 0x01 0xb2 0x03 0x04 0x01 0xb2 0x03 0x06 0x01 0xb2 0x03 0x0a 0x01 0xb2 0x03 0x0b 0x01 0xb2 0x03 0x0d 0x01 0xb2 0x03 0x10 0x01 0xb2 0x03 0x11 0x01 0xb2 0x03 0x12 0x01 0xb2 0x03 0x13 0x01 0xb2 0x03 0x14 0x01 0xb2 0x03 0x15 0x01 0xb2 0x03 0x16 0x01 0xb2 0x03 0x17 0x01 0xb2 0x03 0x18 0x01 0xb2 0x03 0x19 0x01 0xb2 0x03 0x1a 0x01 0xb2 0x03 0x1b 0x01 0xb2>;
+ phandle = <0x4c>;
+ };
+
+ lcdc-m1-sleep-pins {
+ rockchip,pins = <0x03 0x00 0x00 0xad 0x03 0x04 0x00 0xad 0x03 0x06 0x00 0xad 0x03 0x0a 0x00 0xad 0x03 0x0b 0x00 0xad 0x03 0x0d 0x00 0xad 0x03 0x10 0x00 0xad 0x03 0x11 0x00 0xad 0x03 0x12 0x00 0xad 0x03 0x13 0x00 0xad 0x03 0x14 0x00 0xad 0x03 0x15 0x00 0xad 0x03 0x16 0x00 0xad 0x03 0x17 0x00 0xad 0x03 0x18 0x00 0xad 0x03 0x19 0x00 0xad 0x03 0x1a 0x00 0xad 0x03 0x1b 0x00 0xad>;
+ phandle = <0x4d>;
+ };
+ };
+
+ pwm0 {
+
+ pwm0-pin {
+ rockchip,pins = <0x00 0x0f 0x01 0xad>;
+ phandle = <0x78>;
+ };
+ };
+
+ pwm1 {
+
+ pwm1-pin {
+ rockchip,pins = <0x00 0x10 0x01 0xad>;
+ phandle = <0x79>;
+ };
+ };
+
+ pwm2 {
+
+ pwm2-pin {
+ rockchip,pins = <0x02 0x0d 0x01 0xad>;
+ phandle = <0x7a>;
+ };
+ };
+
+ pwm3 {
+
+ pwm3-pin {
+ rockchip,pins = <0x00 0x11 0x01 0xad>;
+ phandle = <0x7b>;
+ };
+ };
+
+ pwm4 {
+
+ pwm4-pin {
+ rockchip,pins = <0x03 0x12 0x03 0xad>;
+ phandle = <0x7c>;
+ };
+ };
+
+ pwm5 {
+
+ pwm5-pin {
+ rockchip,pins = <0x03 0x13 0x03 0xad>;
+ phandle = <0x7d>;
+ };
+ };
+
+ pwm6 {
+
+ pwm6-pin {
+ rockchip,pins = <0x03 0x14 0x03 0xad>;
+ phandle = <0x7e>;
+ };
+ };
+
+ pwm7 {
+
+ pwm7-pin {
+ rockchip,pins = <0x03 0x15 0x03 0xad>;
+ phandle = <0x7f>;
+ };
+ };
+
+ gmac {
+
+ rmii-pins {
+ rockchip,pins = <0x02 0x00 0x02 0xb4 0x02 0x01 0x02 0xb4 0x02 0x02 0x02 0xb4 0x02 0x03 0x02 0xad 0x02 0x04 0x02 0xad 0x02 0x05 0x02 0xad 0x02 0x06 0x02 0xad 0x02 0x07 0x02 0xad 0x02 0x09 0x02 0xad>;
+ phandle = <0x8a>;
+ };
+
+ mac-refclk-12ma {
+ rockchip,pins = <0x02 0x0a 0x02 0xb4>;
+ phandle = <0x8b>;
+ };
+
+ mac-refclk {
+ rockchip,pins = <0x02 0x0a 0x02 0xad>;
+ phandle = <0x148>;
+ };
+ };
+
+ cif-m0 {
+
+ cif-clkout-m0 {
+ rockchip,pins = <0x02 0x0b 0x01 0xb4>;
+ phandle = <0xa3>;
+ };
+
+ dvp-d2d9-m0 {
+ rockchip,pins = <0x02 0x00 0x01 0xad 0x02 0x01 0x01 0xad 0x02 0x02 0x01 0xad 0x02 0x03 0x01 0xad 0x02 0x04 0x01 0xad 0x02 0x05 0x01 0xad 0x02 0x06 0x01 0xad 0x02 0x07 0x01 0xad 0x02 0x08 0x01 0xad 0x02 0x09 0x01 0xad 0x02 0x0a 0x01 0xad 0x02 0x0b 0x01 0xad>;
+ phandle = <0xa1>;
+ };
+
+ dvp-d0d1-m0 {
+ rockchip,pins = <0x02 0x0c 0x01 0xad 0x02 0x0e 0x01 0xad>;
+ phandle = <0xa5>;
+ };
+
+ d10-d11-m0 {
+ rockchip,pins = <0x02 0x0f 0x01 0xad 0x02 0x10 0x01 0xad>;
+ phandle = <0xa4>;
+ };
+ };
+
+ cif-m1 {
+
+ cif-clkout-m1 {
+ rockchip,pins = <0x03 0x18 0x03 0xad>;
+ phandle = <0x149>;
+ };
+
+ dvp-d2d9-m1 {
+ rockchip,pins = <0x03 0x03 0x03 0xad 0x03 0x05 0x03 0xad 0x03 0x07 0x03 0xad 0x03 0x08 0x03 0xad 0x03 0x09 0x03 0xad 0x03 0x0c 0x03 0xad 0x03 0x0e 0x03 0xad 0x03 0x0f 0x03 0xad 0x03 0x19 0x03 0xad 0x03 0x1a 0x03 0xad 0x03 0x1b 0x03 0xad 0x03 0x18 0x03 0xad>;
+ phandle = <0x14a>;
+ };
+
+ dvp-d0d1-m1 {
+ rockchip,pins = <0x03 0x01 0x03 0xad 0x03 0x02 0x03 0xad>;
+ phandle = <0x14b>;
+ };
+
+ d10-d11-m1 {
+ rockchip,pins = <0x03 0x17 0x03 0xad>;
+ phandle = <0x14c>;
+ };
+ };
+
+ isp {
+
+ isp-prelight {
+ rockchip,pins = <0x03 0x19 0x04 0xad>;
+ phandle = <0x14d>;
+ };
+ };
+
+ pmic {
+
+ pmic_int {
+ rockchip,pins = <0x00 0x07 0x00 0xae 0x03 0x17 0x00 0xad>;
+ phandle = <0x5a>;
+ };
+
+ soc_slppin_gpio {
+ rockchip,pins = <0x00 0x04 0x00 0xb5>;
+ phandle = <0x5d>;
+ };
+
+ soc_slppin_slp {
+ rockchip,pins = <0x00 0x04 0x01 0xad>;
+ phandle = <0x5b>;
+ };
+
+ soc_slppin_rst {
+ rockchip,pins = <0x00 0x04 0x02 0xad>;
+ phandle = <0x5f>;
+ };
+ };
+
+ headphone {
+
+ hp-det {
+ rockchip,pins = <0x02 0x16 0x00 0xad>;
+ phandle = <0xc0>;
+ };
+ };
+
+ leds {
+
+ led-pins {
+ rockchip,pins = <0x00 0x01 0x00 0xad>;
+ phandle = <0xbb>;
+ };
+ };
+
+ btns {
+
+ btn-pins {
+ rockchip,pins = <0x03 0x0c 0x00 0xae 0x01 0x0d 0x00 0xae 0x03 0x0e 0x00 0xae 0x01 0x0f 0x00 0xae 0x01 0x02 0x00 0xae 0x01 0x05 0x00 0xae 0x01 0x06 0x00 0xae 0x01 0x07 0x00 0xae 0x02 0x00 0x00 0xae 0x02 0x01 0x00 0xae 0x02 0x02 0x00 0xae 0x02 0x03 0x00 0xae 0x02 0x04 0x00 0xae 0x02 0x05 0x00 0xae 0x02 0x06 0x00 0xae 0x02 0x07 0x00 0xae 0x00 0x0f 0x00 0xae 0x03 0x0a 0x00 0xae>;
+ phandle = <0xb9>;
+ };
+ };
+ };
+
+ chosen {
+ bootargs = [00];
+ };
+
+ fiq-debugger {
+ compatible = "rockchip,fiq-debugger";
+ rockchip,serial-id = <0x02>;
+ rockchip,wake-irq = <0x00>;
+ rockchip,irq-mode-enable = <0x00>;
+ rockchip,baudrate = <0x16e360>;
+ interrupts = <0x00 0x7f 0x08>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0xb6>;
+ status = "okay";
+ };
+
+ ramoops {
+ compatible = "ramoops";
+ record-size = <0x00 0x20000>;
+ console-size = <0x00 0x80000>;
+ ftrace-size = <0x00 0x00>;
+ pmsg-size = <0x00 0x00>;
+ memory-region = <0xb7>;
+ };
+
+ reserved-memory {
+ #address-cells = <0x02>;
+ #size-cells = <0x02>;
+ ranges;
+
+ drm-logo@00000000 {
+ compatible = "rockchip,drm-logo";
+ reg = <0x00 0x00 0x00 0x00>;
+ phandle = <0x11>;
+ };
+
+ region@110000 {
+ reg = <0x00 0x110000 0x00 0xf0000>;
+ reg-names = "ramoops_mem";
+ phandle = <0xb7>;
+ };
+ };
+
+ odroidgo3-keys {
+ compatible = "gpio-keys";
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+ autorepeat;
+ phandle = <0x14e>;
+
+ button@0 {
+ label = "GPIO BTN-VOLUP";
+ linux,code = <0x73>;
+ gpios = <0x63 0x16 0x01>;
+ };
+
+ button@1 {
+ label = "GPIO BTN-VOLDN";
+ linux,code = <0x72>;
+ gpios = <0x63 0x15 0x01>;
+ };
+ };
+
+ odroidgo3-joypad {
+ compatible = "odroidgo3-joypad";
+ pwms = <0xb8 0x00 0xbebc200 0x00>;
+ pwm-names = "enable";
+ rumble-boost-weak = <0x00>;
+ rumble-boost-strong = <0x00>;
+ joypad-name = "GO-Super Gamepad";
+ joypad-product = <0x1100>;
+ joypad-revision = <0x100>;
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <0xb9>;
+ pinctrl-1 = <0x78>;
+ io-channel-names = "amux_adc";
+ io-channels = <0xba 0x01>;
+ amux-count = <0x04>;
+ amux-a-gpios = <0x59 0x0d 0x01>;
+ amux-b-gpios = <0x59 0x0c 0x01>;
+ amux-en-gpios = <0x59 0x11 0x01>;
+ button-adc-scale = <0x02>;
+ button-adc-deadzone = <0x40>;
+ button-adc-fuzz = <0x20>;
+ button-adc-flat = <0x20>;
+ abs_x-p-tuning = <0xc8>;
+ abs_x-n-tuning = <0xc8>;
+ abs_y-p-tuning = <0xc8>;
+ abs_y-n-tuning = <0xc8>;
+ abs_rx-p-tuning = <0xc8>;
+ abs_rx-n-tuning = <0xc8>;
+ abs_ry-p-tuning = <0xc8>;
+ abs_ry-n-tuning = <0xc8>;
+ poll-interval = <0x0a>;
+ invert-absx;
+ invert-absy;
+ phandle = <0x14f>;
+
+ sw1 {
+ gpios = <0x63 0x07 0x01>;
+ label = "GPIO DPAD-UP";
+ linux,code = <0x220>;
+ };
+
+ sw2 {
+ gpios = <0x63 0x08 0x01>;
+ label = "GPIO DPAD-DOWN";
+ linux,code = <0x221>;
+ };
+
+ sw3 {
+ gpios = <0x63 0x0a 0x01>;
+ label = "GPIO DPAD-LEFT";
+ linux,code = <0x222>;
+ };
+
+ sw4 {
+ gpios = <0x63 0x09 0x01>;
+ label = "GPIO DPAD-RIGHT";
+ linux,code = <0x223>;
+ };
+
+ sw5 {
+ gpios = <0x63 0x0e 0x01>;
+ label = "GPIO KEY BTN-A";
+ linux,code = <0x131>;
+ };
+
+ sw6 {
+ gpios = <0x63 0x0c 0x01>;
+ label = "GPIO BTN-B";
+ linux,code = <0x130>;
+ };
+
+ sw7 {
+ gpios = <0x63 0x0b 0x01>;
+ label = "GPIO BTN-Y";
+ linux,code = <0x134>;
+ };
+
+ sw8 {
+ gpios = <0x63 0x0d 0x01>;
+ label = "GPIO BTN-X";
+ linux,code = <0x133>;
+ };
+
+ sw11 {
+ gpios = <0x59 0x0b 0x01>;
+ label = "GPIO F3";
+ linux,code = <0x2c2>;
+ };
+
+ sw12 {
+ gpios = <0x63 0x1b 0x01>;
+ label = "GPIO F4";
+ linux,code = <0x2c3>;
+ };
+
+ sw15 {
+ gpios = <0x63 0x03 0x01>;
+ label = "GPIO TOP-LEFT";
+ linux,code = <0x136>;
+ };
+
+ sw16 {
+ gpios = <0x63 0x00 0x01>;
+ label = "GPIO TOP-RIGHT";
+ linux,code = <0x137>;
+ };
+
+ sw19 {
+ gpios = <0x63 0x04 0x01>;
+ label = "GPIO F1";
+ linux,code = <0x2c4>;
+ };
+
+ sw20 {
+ gpios = <0x63 0x02 0x01>;
+ label = "GPIO TOP-LEFT2";
+ linux,code = <0x138>;
+ };
+
+ sw21 {
+ gpios = <0x63 0x01 0x01>;
+ label = "GPIO TOP-RIGHT2";
+ linux,code = <0x139>;
+ };
+
+ sw22 {
+ gpios = <0x63 0x06 0x01>;
+ label = "GPIO F2";
+ linux,code = <0x2c1>;
+ };
+
+ sw13 {
+ gpios = <0x63 0x05 0x01>;
+ label = "GPIO F5";
+ linux,code = <0x2c0>;
+ };
+ };
+
+ gpio_leds {
+ status = "disabled";
+ compatible = "gpio-leds";
+ pinctrl-names = "led_pins";
+ pinctrl-0 = <0xbb>;
+ phandle = <0x150>;
+
+ heartbeat {
+ label = "blue:heartbeat";
+ gpios = <0x59 0x01 0x00>;
+ linux,default-trigger = "heartbeat";
+ };
+ };
+
+ backlight {
+ compatible = "pwm-backlight";
+ pwms = <0xbc 0x00 0x9c40 0x00>;
+ brightness-levels = <0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f 0x20 0x21 0x22 0x23 0x24 0x25 0x26 0x27 0x28 0x29 0x2a 0x2b 0x2c 0x2d 0x2e 0x2f 0x30 0x31 0x32 0x33 0x34 0x35 0x36 0x37 0x38 0x39 0x3a 0x3b 0x3c 0x3d 0x3e 0x3f 0x40 0x41 0x42 0x43 0x44 0x45 0x46 0x47 0x48 0x49 0x4a 0x4b 0x4c 0x4d 0x4e 0x4f 0x50 0x51 0x52 0x53 0x54 0x55 0x56 0x57 0x58 0x59 0x5a 0x5b 0x5c 0x5d 0x5e 0x5f 0x60 0x61 0x62 0x63 0x64 0x65 0x66 0x67 0x68 0x69 0x6a 0x6b 0x6c 0x6d 0x6e 0x6f 0x70 0x71 0x72 0x73 0x74 0x75 0x76 0x77 0x78 0x79 0x7a 0x7b 0x7c 0x7d 0x7e 0x7f 0x80 0x81 0x82 0x83 0x84 0x85 0x86 0x87 0x88 0x89 0x8a 0x8b 0x8c 0x8d 0x8e 0x8f 0x90 0x91 0x92 0x93 0x94 0x95 0x96 0x97 0x98 0x99 0x9a 0x9b 0x9c 0x9d 0x9e 0x9f 0xa0>;
+ default-brightness-level = <0x50>;
+ phandle = <0x99>;
+ };
+
+ rk817-sound {
+ compatible = "simple-audio-card";
+ simple-audio-card,format = "i2s";
+ simple-audio-card,name = "rockchip,rk817-codec";
+ simple-audio-card,mclk-fs = <0x100>;
+ simple-audio-card,widgets = "Microphone\0Mic Jack\0Headphone\0Headphone Jack";
+ simple-audio-card,routing = "MIC_IN\0Mic Jack\0Headphone Jack\0HPOL\0Headphone Jack\0HPOR";
+
+ simple-audio-card,cpu {
+ sound-dai = <0xbd>;
+ };
+
+ simple-audio-card,codec {
+ sound-dai = <0xbe>;
+ };
+ };
+
+ rk_headset {
+ compatible = "rockchip_headset";
+ headset_gpio = <0xbf 0x16 0x00>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0xc0>;
+ };
+
+ vccsys {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v8_sys";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <0x39fbc0>;
+ regulator-max-microvolt = <0x39fbc0>;
+ phandle = <0x61>;
+ };
+
+ __symbols__ {
+ ddr_timing = "/ddr_timing";
+ cpu0 = "/cpus/cpu@0";
+ cpu1 = "/cpus/cpu@1";
+ cpu2 = "/cpus/cpu@2";
+ cpu3 = "/cpus/cpu@3";
+ CPU_SLEEP = "/cpus/idle-states/cpu-sleep";
+ CLUSTER_SLEEP = "/cpus/idle-states/cluster-sleep";
+ cpu0_opp_table = "/cpu0-opp-table";
+ bus_soc = "/bus-soc";
+ bus_apll = "/bus-apll";
+ bus_apll_opp_table = "/bus-apll-opp-table";
+ display_subsystem = "/display-subsystem";
+ route_lvds = "/display-subsystem/route/route-lvds";
+ route_dsi = "/display-subsystem/route/route-dsi";
+ route_rgb = "/display-subsystem/route/route-rgb";
+ gmac_clkin = "/external-gmac-clock";
+ rockchip_suspend = "/rockchip-suspend";
+ xin24m = "/xin24m";
+ xin32k = "/xin32k";
+ pmu = "/power-management@ff000000";
+ power = "/power-management@ff000000/power-controller";
+ pmugrf = "/syscon@ff010000";
+ pmu_io_domains = "/syscon@ff010000/io-domains";
+ pmu_pvtm = "/syscon@ff010000/pmu-pvtm";
+ uart0 = "/serial@ff030000";
+ i2s0_8ch = "/i2s@ff060000";
+ i2s1_2ch = "/i2s@ff070000";
+ i2s2_2ch = "/i2s@ff080000";
+ pdm = "/pdm@ff0a0000";
+ crypto = "/crypto@ff0b0000";
+ rng = "/rng@ff0b0000";
+ gic = "/interrupt-controller@ff131000";
+ grf = "/syscon@ff140000";
+ io_domains = "/syscon@ff140000/io-domains";
+ lvds = "/syscon@ff140000/lvds";
+ lvds_in_vopb = "/syscon@ff140000/lvds/ports/port@0/endpoint@0";
+ rgb = "/syscon@ff140000/rgb";
+ rgb_in_vopb = "/syscon@ff140000/rgb/ports/port@0/endpoint@0";
+ core_grf = "/syscon@ff148000";
+ pvtm = "/syscon@ff148000/pvtm";
+ uart1 = "/serial@ff158000";
+ uart2 = "/serial@ff160000";
+ uart3 = "/serial@ff168000";
+ uart4 = "/serial@ff170000";
+ uart5 = "/serial@ff178000";
+ i2c0 = "/i2c@ff180000";
+ rk817 = "/i2c@ff180000/pmic@20";
+ pinctrl_rk8xx = "/i2c@ff180000/pmic@20/pinctrl_rk8xx";
+ rk817_ts_gpio1 = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_ts_gpio1";
+ rk817_gt_gpio2 = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_gt_gpio2";
+ rk817_pin_ts = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_pin_ts";
+ rk817_pin_gt = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_pin_gt";
+ rk817_slppin_null = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_slppin_null";
+ rk817_slppin_slp = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_slppin_slp";
+ rk817_slppin_pwrdn = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_slppin_pwrdn";
+ rk817_slppin_rst = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_slppin_rst";
+ vdd_logic = "/i2c@ff180000/pmic@20/regulators/DCDC_REG1";
+ vdd_arm = "/i2c@ff180000/pmic@20/regulators/DCDC_REG2";
+ vcc_ddr = "/i2c@ff180000/pmic@20/regulators/DCDC_REG3";
+ vcc_3v3 = "/i2c@ff180000/pmic@20/regulators/DCDC_REG4";
+ vcc_1v0 = "/i2c@ff180000/pmic@20/regulators/LDO_REG1";
+ vcc1v8_soc = "/i2c@ff180000/pmic@20/regulators/LDO_REG2";
+ vdd1v0_soc = "/i2c@ff180000/pmic@20/regulators/LDO_REG3";
+ vcc3v3_pmu = "/i2c@ff180000/pmic@20/regulators/LDO_REG4";
+ vccio_sd = "/i2c@ff180000/pmic@20/regulators/LDO_REG5";
+ vcc_sd = "/i2c@ff180000/pmic@20/regulators/LDO_REG6";
+ vcc2v8_dvp = "/i2c@ff180000/pmic@20/regulators/LDO_REG7";
+ vcc_lcd = "/i2c@ff180000/pmic@20/regulators/LDO_REG8";
+ vdd_11 = "/i2c@ff180000/pmic@20/regulators/LDO_REG9";
+ dcdc_boost = "/i2c@ff180000/pmic@20/regulators/BOOST";
+ otg_switch = "/i2c@ff180000/pmic@20/regulators/OTG_SWITCH";
+ rk817_codec = "/i2c@ff180000/pmic@20/codec";
+ i2c1 = "/i2c@ff190000";
+ i2c2 = "/i2c@ff1a0000";
+ i2c3 = "/i2c@ff1b0000";
+ spi0 = "/spi@ff1d0000";
+ spi1 = "/spi@ff1d8000";
+ wdt = "/watchdog@ff1e0000";
+ pwm0 = "/pwm@ff200000";
+ pwm1 = "/pwm@ff200010";
+ pwm2 = "/pwm@ff200020";
+ pwm3 = "/pwm@ff200030";
+ pwm4 = "/pwm@ff208000";
+ pwm5 = "/pwm@ff208010";
+ pwm6 = "/pwm@ff208020";
+ pwm7 = "/pwm@ff208030";
+ rktimer = "/rktimer@ff210000";
+ dmac = "/amba/dmac@ff240000";
+ thermal_zones = "/thermal-zones";
+ soc_thermal = "/thermal-zones/soc-thermal";
+ threshold = "/thermal-zones/soc-thermal/trips/trip-point-0";
+ target = "/thermal-zones/soc-thermal/trips/trip-point-1";
+ soc_crit = "/thermal-zones/soc-thermal/trips/soc-crit";
+ gpu_thermal = "/thermal-zones/gpu-thermal";
+ tsadc = "/tsadc@ff280000";
+ saradc = "/saradc@ff288000";
+ otp = "/otp@ff290000";
+ otp_id = "/otp@ff290000/id@7";
+ cpu_leakage = "/otp@ff290000/cpu-leakage@17";
+ performance = "/otp@ff290000/performance@1e";
+ cru = "/clock-controller@ff2b0000";
+ cpu_boost = "/cpu-boost@ff2b8000";
+ pmucru = "/pmu-clock-controller@ff2bc000";
+ usb2phy_grf = "/syscon@ff2c0000";
+ u2phy = "/syscon@ff2c0000/usb2-phy@100";
+ u2phy_host = "/syscon@ff2c0000/usb2-phy@100/host-port";
+ u2phy_otg = "/syscon@ff2c0000/usb2-phy@100/otg-port";
+ video_phy = "/video-phy@ff2e0000";
+ mipi_dphy_rx0 = "/mipi-dphy-rx0@ff2f0000";
+ usb20_otg = "/usb@ff300000";
+ usb_host0_ehci = "/usb@ff340000";
+ usb_host0_ohci = "/usb@ff350000";
+ gmac = "/ethernet@ff360000";
+ sdmmc = "/dwmmc@ff370000";
+ sdio = "/dwmmc@ff380000";
+ emmc = "/dwmmc@ff390000";
+ nandc0 = "/nandc@ff3b0000";
+ sfc = "/sfc@ff3a0000";
+ gpu = "/gpu@ff400000";
+ gpu_opp_table = "/gpu-opp-table";
+ hevc = "/hevc_service@ff440000";
+ vpu = "/vpu_service@ff442000";
+ vpu_combo = "/vpu_combo";
+ hevc_mmu = "/iommu@ff440440";
+ vpu_mmu = "/iommu@ff442800";
+ dsi = "/dsi@ff450000";
+ dsi_in_vopb = "/dsi@ff450000/ports/port@0/endpoint@0";
+ timing0 = "/dsi@ff450000/panel@0/display-timings/60Hz";
+ timing1 = "/dsi@ff450000/panel@0/display-timings/50Hz";
+ timing2 = "/dsi@ff450000/panel@0/display-timings/75Hz";
+ vopb = "/vop@ff460000";
+ vopb_out = "/vop@ff460000/port";
+ vopb_out_lvds = "/vop@ff460000/port/endpoint@0";
+ vopb_out_dsi = "/vop@ff460000/port/endpoint@1";
+ vopb_out_rgb = "/vop@ff460000/port/endpoint@2";
+ vopb_mmu = "/iommu@ff460f00";
+ rk_rga = "/rk_rga@ff480000";
+ cif = "/cif@ff490000";
+ cif_new = "/cif-new@ff490000";
+ vip_mmu = "/iommu@ff490800";
+ rk_isp = "/rk_isp@ff4a0000";
+ rkisp1 = "/rkisp1@ff4a0000";
+ isp_mmu = "/iommu@ff4a8000";
+ qos_gmac = "/qos@ff518000";
+ qos_gpu = "/qos@ff520000";
+ qos_sdmmc = "/qos@ff52c000";
+ qos_emmc = "/qos@ff538000";
+ qos_nand = "/qos@ff538080";
+ qos_sdio = "/qos@ff538100";
+ qos_sfc = "/qos@ff538180";
+ qos_usb_host = "/qos@ff540000";
+ qos_usb_otg = "/qos@ff540080";
+ qos_isp_128 = "/qos@ff548000";
+ qos_isp_rd = "/qos@ff548080";
+ qos_isp_wr = "/qos@ff548100";
+ qos_isp_m1 = "/qos@ff548180";
+ qos_vip = "/qos@ff548200";
+ qos_rga_rd = "/qos@ff550000";
+ qos_rga_wr = "/qos@ff550080";
+ qos_vop_m0 = "/qos@ff550100";
+ qos_vop_m1 = "/qos@ff550180";
+ qos_vpu = "/qos@ff558000";
+ qos_vpu_r128 = "/qos@ff558080";
+ dfi = "/dfi@ff610000";
+ dmc = "/dmc";
+ ddr_power_model = "/dmc/ddr_power_model";
+ dmc_opp_table = "/dmc-opp-table";
+ rockchip_system_monitor = "/rockchip-system-monitor";
+ pinctrl = "/pinctrl";
+ gpio0 = "/pinctrl/gpio0@ff040000";
+ gpio1 = "/pinctrl/gpio1@ff250000";
+ gpio2 = "/pinctrl/gpio2@ff260000";
+ gpio3 = "/pinctrl/gpio3@ff270000";
+ pcfg_pull_up = "/pinctrl/pcfg-pull-up";
+ pcfg_pull_down = "/pinctrl/pcfg-pull-down";
+ pcfg_pull_none = "/pinctrl/pcfg-pull-none";
+ pcfg_pull_none_2ma = "/pinctrl/pcfg-pull-none-2ma";
+ pcfg_pull_up_2ma = "/pinctrl/pcfg-pull-up-2ma";
+ pcfg_pull_up_4ma = "/pinctrl/pcfg-pull-up-4ma";
+ pcfg_pull_none_4ma = "/pinctrl/pcfg-pull-none-4ma";
+ pcfg_pull_down_4ma = "/pinctrl/pcfg-pull-down-4ma";
+ pcfg_pull_none_8ma = "/pinctrl/pcfg-pull-none-8ma";
+ pcfg_pull_up_8ma = "/pinctrl/pcfg-pull-up-8ma";
+ pcfg_pull_none_12ma = "/pinctrl/pcfg-pull-none-12ma";
+ pcfg_pull_up_12ma = "/pinctrl/pcfg-pull-up-12ma";
+ pcfg_pull_none_smt = "/pinctrl/pcfg-pull-none-smt";
+ pcfg_output_high = "/pinctrl/pcfg-output-high";
+ pcfg_output_low = "/pinctrl/pcfg-output-low";
+ pcfg_input_high = "/pinctrl/pcfg-input-high";
+ pcfg_input = "/pinctrl/pcfg-input";
+ i2c0_xfer = "/pinctrl/i2c0/i2c0-xfer";
+ i2c1_xfer = "/pinctrl/i2c1/i2c1-xfer";
+ i2c2_xfer = "/pinctrl/i2c2/i2c2-xfer";
+ i2c3_xfer = "/pinctrl/i2c3/i2c3-xfer";
+ tsadc_otp_gpio = "/pinctrl/tsadc/tsadc-otp-gpio";
+ tsadc_otp_out = "/pinctrl/tsadc/tsadc-otp-out";
+ uart0_xfer = "/pinctrl/uart0/uart0-xfer";
+ uart0_cts = "/pinctrl/uart0/uart0-cts";
+ uart0_rts = "/pinctrl/uart0/uart0-rts";
+ uart0_rts_gpio = "/pinctrl/uart0/uart0-rts-gpio";
+ uart1_xfer = "/pinctrl/uart1/uart1-xfer";
+ uart1_cts = "/pinctrl/uart1/uart1-cts";
+ uart1_rts = "/pinctrl/uart1/uart1-rts";
+ uart1_rts_gpio = "/pinctrl/uart1/uart1-rts-gpio";
+ uart2m0_xfer = "/pinctrl/uart2-m0/uart2m0-xfer";
+ uart2m1_xfer = "/pinctrl/uart2-m1/uart2m1-xfer";
+ uart3m0_xfer = "/pinctrl/uart3-m0/uart3m0-xfer";
+ uart3m0_cts = "/pinctrl/uart3-m0/uart3m0-cts";
+ uart3m0_rts = "/pinctrl/uart3-m0/uart3m0-rts";
+ uart3m0_rts_gpio = "/pinctrl/uart3-m0/uart3m0-rts-gpio";
+ uart3m1_xfer = "/pinctrl/uart3-m1/uart3m1-xfer";
+ uart3m1_cts = "/pinctrl/uart3-m1/uart3m1-cts";
+ uart3m1_rts = "/pinctrl/uart3-m1/uart3m1-rts";
+ uart3m1_rts_gpio = "/pinctrl/uart3-m1/uart3m1-rts-gpio";
+ uart4_xfer = "/pinctrl/uart4/uart4-xfer";
+ uart4_cts = "/pinctrl/uart4/uart4-cts";
+ uart4_rts = "/pinctrl/uart4/uart4-rts";
+ uart5_xfer = "/pinctrl/uart5/uart5-xfer";
+ uart5_cts = "/pinctrl/uart5/uart5-cts";
+ uart5_rts = "/pinctrl/uart5/uart5-rts";
+ spi0_clk = "/pinctrl/spi0/spi0-clk";
+ spi0_csn = "/pinctrl/spi0/spi0-csn";
+ spi0_miso = "/pinctrl/spi0/spi0-miso";
+ spi0_mosi = "/pinctrl/spi0/spi0-mosi";
+ spi0_clk_hs = "/pinctrl/spi0/spi0-clk-hs";
+ spi0_miso_hs = "/pinctrl/spi0/spi0-miso-hs";
+ spi0_mosi_hs = "/pinctrl/spi0/spi0-mosi-hs";
+ spi1_clk = "/pinctrl/spi1/spi1-clk";
+ spi1_csn0 = "/pinctrl/spi1/spi1-csn0";
+ spi1_csn1 = "/pinctrl/spi1/spi1-csn1";
+ spi1_miso = "/pinctrl/spi1/spi1-miso";
+ spi1_mosi = "/pinctrl/spi1/spi1-mosi";
+ spi1_clk_hs = "/pinctrl/spi1/spi1-clk-hs";
+ spi1_miso_hs = "/pinctrl/spi1/spi1-miso-hs";
+ spi1_mosi_hs = "/pinctrl/spi1/spi1-mosi-hs";
+ pdm_clk0m1 = "/pinctrl/pdm/pdm-clk0m1";
+ pdm_clk1 = "/pinctrl/pdm/pdm-clk1";
+ pdm_sdi0m0 = "/pinctrl/pdm/pdm-sdi0m0";
+ pdm_sdi0m1 = "/pinctrl/pdm/pdm-sdi0m1";
+ pdm_sdi1 = "/pinctrl/pdm/pdm-sdi1";
+ pdm_sdi2 = "/pinctrl/pdm/pdm-sdi2";
+ pdm_sdi3 = "/pinctrl/pdm/pdm-sdi3";
+ pdm_clk0m_sleep1 = "/pinctrl/pdm/pdm-clk0m1-sleep";
+ pdm_clk1_sleep = "/pinctrl/pdm/pdm-clk1-sleep";
+ pdm_sdi0m0_sleep = "/pinctrl/pdm/pdm-sdi0m0-sleep";
+ pdm_sdi0m1_sleep = "/pinctrl/pdm/pdm-sdi0m1-sleep";
+ pdm_sdi1_sleep = "/pinctrl/pdm/pdm-sdi1-sleep";
+ pdm_sdi2_sleep = "/pinctrl/pdm/pdm-sdi2-sleep";
+ pdm_sdi3_sleep = "/pinctrl/pdm/pdm-sdi3-sleep";
+ i2s0_8ch_mclk = "/pinctrl/i2s0/i2s0-8ch-mclk";
+ i2s0_8ch_sclktx = "/pinctrl/i2s0/i2s0-8ch-sclktx";
+ i2s0_8ch_sclkrx = "/pinctrl/i2s0/i2s0-8ch-sclkrx";
+ i2s0_8ch_lrcktx = "/pinctrl/i2s0/i2s0-8ch-lrcktx";
+ i2s0_8ch_lrckrx = "/pinctrl/i2s0/i2s0-8ch-lrckrx";
+ i2s0_8ch_sdo0 = "/pinctrl/i2s0/i2s0-8ch-sdo0";
+ i2s0_8ch_sdo1 = "/pinctrl/i2s0/i2s0-8ch-sdo1";
+ i2s0_8ch_sdo2 = "/pinctrl/i2s0/i2s0-8ch-sdo2";
+ i2s0_8ch_sdo3 = "/pinctrl/i2s0/i2s0-8ch-sdo3";
+ i2s0_8ch_sdi0 = "/pinctrl/i2s0/i2s0-8ch-sdi0";
+ i2s0_8ch_sdi1 = "/pinctrl/i2s0/i2s0-8ch-sdi1";
+ i2s0_8ch_sdi2 = "/pinctrl/i2s0/i2s0-8ch-sdi2";
+ i2s0_8ch_sdi3 = "/pinctrl/i2s0/i2s0-8ch-sdi3";
+ i2s1_2ch_mclk = "/pinctrl/i2s1/i2s1-2ch-mclk";
+ i2s1_2ch_sclk = "/pinctrl/i2s1/i2s1-2ch-sclk";
+ i2s1_2ch_lrck = "/pinctrl/i2s1/i2s1-2ch-lrck";
+ i2s1_2ch_sdi = "/pinctrl/i2s1/i2s1-2ch-sdi";
+ i2s1_2ch_sdo = "/pinctrl/i2s1/i2s1-2ch-sdo";
+ i2s2_2ch_mclk = "/pinctrl/i2s2/i2s2-2ch-mclk";
+ i2s2_2ch_sclk = "/pinctrl/i2s2/i2s2-2ch-sclk";
+ i2s2_2ch_lrck = "/pinctrl/i2s2/i2s2-2ch-lrck";
+ i2s2_2ch_sdi = "/pinctrl/i2s2/i2s2-2ch-sdi";
+ i2s2_2ch_sdo = "/pinctrl/i2s2/i2s2-2ch-sdo";
+ sdmmc_clk = "/pinctrl/sdmmc/sdmmc-clk";
+ sdmmc_cmd = "/pinctrl/sdmmc/sdmmc-cmd";
+ sdmmc_det = "/pinctrl/sdmmc/sdmmc-det";
+ sdmmc_bus1 = "/pinctrl/sdmmc/sdmmc-bus1";
+ sdmmc_bus4 = "/pinctrl/sdmmc/sdmmc-bus4";
+ sdmmc_gpio = "/pinctrl/sdmmc/sdmmc-gpio";
+ sdio_clk = "/pinctrl/sdio/sdio-clk";
+ sdio_cmd = "/pinctrl/sdio/sdio-cmd";
+ sdio_bus4 = "/pinctrl/sdio/sdio-bus4";
+ sdio_gpio = "/pinctrl/sdio/sdio-gpio";
+ emmc_clk = "/pinctrl/emmc/emmc-clk";
+ emmc_cmd = "/pinctrl/emmc/emmc-cmd";
+ emmc_pwren = "/pinctrl/emmc/emmc-pwren";
+ emmc_rstnout = "/pinctrl/emmc/emmc-rstnout";
+ emmc_bus1 = "/pinctrl/emmc/emmc-bus1";
+ emmc_bus4 = "/pinctrl/emmc/emmc-bus4";
+ emmc_bus8 = "/pinctrl/emmc/emmc-bus8";
+ flash_cs0 = "/pinctrl/flash/flash-cs0";
+ flash_rdy = "/pinctrl/flash/flash-rdy";
+ flash_dqs = "/pinctrl/flash/flash-dqs";
+ flash_ale = "/pinctrl/flash/flash-ale";
+ flash_cle = "/pinctrl/flash/flash-cle";
+ flash_wrn = "/pinctrl/flash/flash-wrn";
+ flash_csl = "/pinctrl/flash/flash-csl";
+ flash_rdn = "/pinctrl/flash/flash-rdn";
+ flash_bus8 = "/pinctrl/flash/flash-bus8";
+ lcdc_m0_rgb_pins = "/pinctrl/lcdc/lcdc-m0-rgb-pins";
+ lcdc_m0_sleep_pins = "/pinctrl/lcdc/lcdc-m0-sleep-pins";
+ lcdc_m1_rgb_pins = "/pinctrl/lcdc/lcdc-m1-rgb-pins";
+ lcdc_m1_sleep_pins = "/pinctrl/lcdc/lcdc-m1-sleep-pins";
+ pwm0_pin = "/pinctrl/pwm0/pwm0-pin";
+ pwm1_pin = "/pinctrl/pwm1/pwm1-pin";
+ pwm2_pin = "/pinctrl/pwm2/pwm2-pin";
+ pwm3_pin = "/pinctrl/pwm3/pwm3-pin";
+ pwm4_pin = "/pinctrl/pwm4/pwm4-pin";
+ pwm5_pin = "/pinctrl/pwm5/pwm5-pin";
+ pwm6_pin = "/pinctrl/pwm6/pwm6-pin";
+ pwm7_pin = "/pinctrl/pwm7/pwm7-pin";
+ rmii_pins = "/pinctrl/gmac/rmii-pins";
+ mac_refclk_12ma = "/pinctrl/gmac/mac-refclk-12ma";
+ mac_refclk = "/pinctrl/gmac/mac-refclk";
+ cif_clkout_m0 = "/pinctrl/cif-m0/cif-clkout-m0";
+ dvp_d2d9_m0 = "/pinctrl/cif-m0/dvp-d2d9-m0";
+ dvp_d0d1_m0 = "/pinctrl/cif-m0/dvp-d0d1-m0";
+ dvp_d10d11_m0 = "/pinctrl/cif-m0/d10-d11-m0";
+ cif_clkout_m1 = "/pinctrl/cif-m1/cif-clkout-m1";
+ dvp_d2d9_m1 = "/pinctrl/cif-m1/dvp-d2d9-m1";
+ dvp_d0d1_m1 = "/pinctrl/cif-m1/dvp-d0d1-m1";
+ dvp_d10d11_m1 = "/pinctrl/cif-m1/d10-d11-m1";
+ isp_prelight = "/pinctrl/isp/isp-prelight";
+ pmic_int = "/pinctrl/pmic/pmic_int";
+ soc_slppin_gpio = "/pinctrl/pmic/soc_slppin_gpio";
+ soc_slppin_slp = "/pinctrl/pmic/soc_slppin_slp";
+ soc_slppin_rst = "/pinctrl/pmic/soc_slppin_rst";
+ hp_det = "/pinctrl/headphone/hp-det";
+ led_pins = "/pinctrl/leds/led-pins";
+ btn_pins = "/pinctrl/btns/btn-pins";
+ drm_logo = "/reserved-memory/drm-logo@00000000";
+ ramoops_mem = "/reserved-memory/region@110000";
+ gpio_keys = "/odroidgo3-keys";
+ joypad = "/odroidgo3-joypad";
+ leds = "/gpio_leds";
+ backlight = "/backlight";
+ vccsys = "/vccsys";
+ };
+};
diff --git a/config/archr-dts/R36S-DTB/DTS/R35S-Rumble.dts b/config/archr-dts/R36S-DTB/DTS/R35S-Rumble.dts
new file mode 100644
index 0000000000..5d5f9b1a61
--- /dev/null
+++ b/config/archr-dts/R36S-DTB/DTS/R35S-Rumble.dts
@@ -0,0 +1,4071 @@
+/dts-v1/;
+
+/ {
+ compatible = "rockchip,rk3326-odroidgo3-linux\0rockchip,rk3326";
+ interrupt-parent = <0x01>;
+ #address-cells = <0x02>;
+ #size-cells = <0x02>;
+ model = "Game Console R35S/R36S fix by lxc";
+
+ ddr_timing {
+ compatible = "rockchip,ddr-timing";
+ ddr2_speed_bin = <0x00>;
+ ddr3_speed_bin = <0x15>;
+ ddr4_speed_bin = <0x0c>;
+ pd_idle = <0x0d>;
+ sr_idle = <0x5d>;
+ sr_mc_gate_idle = <0x00>;
+ srpd_lite_idle = <0x00>;
+ standby_idle = <0x00>;
+ auto_pd_dis_freq = <0x42a>;
+ auto_sr_dis_freq = <0x320>;
+ ddr2_dll_dis_freq = <0x12c>;
+ ddr3_dll_dis_freq = <0x12c>;
+ ddr4_dll_dis_freq = <0x271>;
+ phy_dll_dis_freq = <0x190>;
+ ddr2_odt_dis_freq = <0x64>;
+ phy_ddr2_odt_dis_freq = <0x64>;
+ ddr2_drv = <0x01>;
+ ddr2_odt = <0x96>;
+ phy_ddr2_ca_drv = <0x15>;
+ phy_ddr2_ck_drv = <0x12>;
+ phy_ddr2_dq_drv = <0x15>;
+ phy_ddr2_odt = <0x02>;
+ ddr3_odt_dis_freq = <0x190>;
+ phy_ddr3_odt_dis_freq = <0x190>;
+ ddr3_drv = <0x28>;
+ ddr3_odt = <0x78>;
+ phy_ddr3_ca_drv = <0x15>;
+ phy_ddr3_ck_drv = <0x12>;
+ phy_ddr3_dq_drv = <0x15>;
+ phy_ddr3_odt = <0x02>;
+ phy_lpddr2_odt_dis_freq = <0x29a>;
+ lpddr2_drv = <0x28>;
+ phy_lpddr2_ca_drv = <0x16>;
+ phy_lpddr2_ck_drv = <0x13>;
+ phy_lpddr2_dq_drv = <0x16>;
+ phy_lpddr2_odt = <0x00>;
+ lpddr3_odt_dis_freq = <0x190>;
+ phy_lpddr3_odt_dis_freq = <0x190>;
+ lpddr3_drv = <0x28>;
+ lpddr3_odt = <0xf0>;
+ phy_lpddr3_ca_drv = <0x16>;
+ phy_lpddr3_ck_drv = <0x13>;
+ phy_lpddr3_dq_drv = <0x16>;
+ phy_lpddr3_odt = <0x02>;
+ lpddr4_odt_dis_freq = <0x320>;
+ phy_lpddr4_odt_dis_freq = <0x320>;
+ lpddr4_drv = <0x3c>;
+ lpddr4_dq_odt = <0x28>;
+ lpddr4_ca_odt = <0x28>;
+ phy_lpddr4_ca_drv = <0x14>;
+ phy_lpddr4_ck_cs_drv = <0x06>;
+ phy_lpddr4_dq_drv = <0x06>;
+ phy_lpddr4_odt = <0x10>;
+ ddr4_odt_dis_freq = <0x29a>;
+ phy_ddr4_odt_dis_freq = <0x29a>;
+ ddr4_drv = <0x22>;
+ ddr4_odt = <0xf0>;
+ phy_ddr4_ca_drv = <0x16>;
+ phy_ddr4_ck_drv = <0x13>;
+ phy_ddr4_dq_drv = <0x16>;
+ phy_ddr4_odt = <0x02>;
+ ddr3a1_ddr4a9_de-skew = <0x06>;
+ ddr3a0_ddr4a10_de-skew = <0x07>;
+ ddr3a3_ddr4a6_de-skew = <0x07>;
+ ddr3a2_ddr4a4_de-skew = <0x07>;
+ ddr3a5_ddr4a8_de-skew = <0x07>;
+ ddr3a4_ddr4a5_de-skew = <0x07>;
+ ddr3a7_ddr4a11_de-skew = <0x07>;
+ ddr3a6_ddr4a7_de-skew = <0x06>;
+ ddr3a9_ddr4a0_de-skew = <0x07>;
+ ddr3a8_ddr4a13_de-skew = <0x07>;
+ ddr3a11_ddr4a3_de-skew = <0x07>;
+ ddr3a10_ddr4cs0_de-skew = <0x07>;
+ ddr3a13_ddr4a2_de-skew = <0x07>;
+ ddr3a12_ddr4ba1_de-skew = <0x07>;
+ ddr3a15_ddr4odt0_de-skew = <0x07>;
+ ddr3a14_ddr4a1_de-skew = <0x07>;
+ ddr3ba1_ddr4a15_de-skew = <0x07>;
+ ddr3ba0_ddr4bg0_de-skew = <0x07>;
+ ddr3ras_ddr4cke_de-skew = <0x07>;
+ ddr3ba2_ddr4ba0_de-skew = <0x07>;
+ ddr3we_ddr4bg1_de-skew = <0x07>;
+ ddr3cas_ddr4a12_de-skew = <0x07>;
+ ddr3ckn_ddr4ckn_de-skew = <0x07>;
+ ddr3ckp_ddr4ckp_de-skew = <0x07>;
+ ddr3cke_ddr4a16_de-skew = <0x07>;
+ ddr3odt0_ddr4a14_de-skew = <0x07>;
+ ddr3cs0_ddr4act_de-skew = <0x06>;
+ ddr3reset_ddr4reset_de-skew = <0x07>;
+ ddr3cs1_ddr4cs1_de-skew = <0x06>;
+ ddr3odt1_ddr4odt1_de-skew = <0x07>;
+ cs0_dm0_rx_de-skew = <0x07>;
+ cs0_dm0_tx_de-skew = <0x07>;
+ cs0_dq0_rx_de-skew = <0x08>;
+ cs0_dq0_tx_de-skew = <0x08>;
+ cs0_dq1_rx_de-skew = <0x09>;
+ cs0_dq1_tx_de-skew = <0x08>;
+ cs0_dq2_rx_de-skew = <0x08>;
+ cs0_dq2_tx_de-skew = <0x08>;
+ cs0_dq3_rx_de-skew = <0x08>;
+ cs0_dq3_tx_de-skew = <0x08>;
+ cs0_dq4_rx_de-skew = <0x09>;
+ cs0_dq4_tx_de-skew = <0x08>;
+ cs0_dq5_rx_de-skew = <0x09>;
+ cs0_dq5_tx_de-skew = <0x08>;
+ cs0_dq6_rx_de-skew = <0x09>;
+ cs0_dq6_tx_de-skew = <0x08>;
+ cs0_dq7_rx_de-skew = <0x08>;
+ cs0_dq7_tx_de-skew = <0x08>;
+ cs0_dqs0_rx_de-skew = <0x06>;
+ cs0_dqs0p_tx_de-skew = <0x09>;
+ cs0_dqs0n_tx_de-skew = <0x09>;
+ cs0_dm1_rx_de-skew = <0x07>;
+ cs0_dm1_tx_de-skew = <0x06>;
+ cs0_dq8_rx_de-skew = <0x08>;
+ cs0_dq8_tx_de-skew = <0x07>;
+ cs0_dq9_rx_de-skew = <0x09>;
+ cs0_dq9_tx_de-skew = <0x07>;
+ cs0_dq10_rx_de-skew = <0x08>;
+ cs0_dq10_tx_de-skew = <0x08>;
+ cs0_dq11_rx_de-skew = <0x08>;
+ cs0_dq11_tx_de-skew = <0x07>;
+ cs0_dq12_rx_de-skew = <0x08>;
+ cs0_dq12_tx_de-skew = <0x08>;
+ cs0_dq13_rx_de-skew = <0x09>;
+ cs0_dq13_tx_de-skew = <0x07>;
+ cs0_dq14_rx_de-skew = <0x09>;
+ cs0_dq14_tx_de-skew = <0x08>;
+ cs0_dq15_rx_de-skew = <0x09>;
+ cs0_dq15_tx_de-skew = <0x07>;
+ cs0_dqs1_rx_de-skew = <0x07>;
+ cs0_dqs1p_tx_de-skew = <0x09>;
+ cs0_dqs1n_tx_de-skew = <0x09>;
+ cs0_dm2_rx_de-skew = <0x07>;
+ cs0_dm2_tx_de-skew = <0x07>;
+ cs0_dq16_rx_de-skew = <0x09>;
+ cs0_dq16_tx_de-skew = <0x09>;
+ cs0_dq17_rx_de-skew = <0x07>;
+ cs0_dq17_tx_de-skew = <0x09>;
+ cs0_dq18_rx_de-skew = <0x07>;
+ cs0_dq18_tx_de-skew = <0x08>;
+ cs0_dq19_rx_de-skew = <0x07>;
+ cs0_dq19_tx_de-skew = <0x09>;
+ cs0_dq20_rx_de-skew = <0x09>;
+ cs0_dq20_tx_de-skew = <0x09>;
+ cs0_dq21_rx_de-skew = <0x09>;
+ cs0_dq21_tx_de-skew = <0x09>;
+ cs0_dq22_rx_de-skew = <0x08>;
+ cs0_dq22_tx_de-skew = <0x09>;
+ cs0_dq23_rx_de-skew = <0x08>;
+ cs0_dq23_tx_de-skew = <0x09>;
+ cs0_dqs2_rx_de-skew = <0x06>;
+ cs0_dqs2p_tx_de-skew = <0x09>;
+ cs0_dqs2n_tx_de-skew = <0x09>;
+ cs0_dm3_rx_de-skew = <0x07>;
+ cs0_dm3_tx_de-skew = <0x07>;
+ cs0_dq24_rx_de-skew = <0x08>;
+ cs0_dq24_tx_de-skew = <0x08>;
+ cs0_dq25_rx_de-skew = <0x09>;
+ cs0_dq25_tx_de-skew = <0x09>;
+ cs0_dq26_rx_de-skew = <0x09>;
+ cs0_dq26_tx_de-skew = <0x08>;
+ cs0_dq27_rx_de-skew = <0x09>;
+ cs0_dq27_tx_de-skew = <0x08>;
+ cs0_dq28_rx_de-skew = <0x09>;
+ cs0_dq28_tx_de-skew = <0x09>;
+ cs0_dq29_rx_de-skew = <0x09>;
+ cs0_dq29_tx_de-skew = <0x09>;
+ cs0_dq30_rx_de-skew = <0x08>;
+ cs0_dq30_tx_de-skew = <0x08>;
+ cs0_dq31_rx_de-skew = <0x08>;
+ cs0_dq31_tx_de-skew = <0x08>;
+ cs0_dqs3_rx_de-skew = <0x07>;
+ cs0_dqs3p_tx_de-skew = <0x09>;
+ cs0_dqs3n_tx_de-skew = <0x09>;
+ cs1_dm0_rx_de-skew = <0x07>;
+ cs1_dm0_tx_de-skew = <0x07>;
+ cs1_dq0_rx_de-skew = <0x08>;
+ cs1_dq0_tx_de-skew = <0x08>;
+ cs1_dq1_rx_de-skew = <0x09>;
+ cs1_dq1_tx_de-skew = <0x08>;
+ cs1_dq2_rx_de-skew = <0x08>;
+ cs1_dq2_tx_de-skew = <0x08>;
+ cs1_dq3_rx_de-skew = <0x08>;
+ cs1_dq3_tx_de-skew = <0x08>;
+ cs1_dq4_rx_de-skew = <0x08>;
+ cs1_dq4_tx_de-skew = <0x08>;
+ cs1_dq5_rx_de-skew = <0x09>;
+ cs1_dq5_tx_de-skew = <0x08>;
+ cs1_dq6_rx_de-skew = <0x09>;
+ cs1_dq6_tx_de-skew = <0x08>;
+ cs1_dq7_rx_de-skew = <0x08>;
+ cs1_dq7_tx_de-skew = <0x08>;
+ cs1_dqs0_rx_de-skew = <0x06>;
+ cs1_dqs0p_tx_de-skew = <0x09>;
+ cs1_dqs0n_tx_de-skew = <0x09>;
+ cs1_dm1_rx_de-skew = <0x07>;
+ cs1_dm1_tx_de-skew = <0x07>;
+ cs1_dq8_rx_de-skew = <0x08>;
+ cs1_dq8_tx_de-skew = <0x08>;
+ cs1_dq9_rx_de-skew = <0x08>;
+ cs1_dq9_tx_de-skew = <0x07>;
+ cs1_dq10_rx_de-skew = <0x07>;
+ cs1_dq10_tx_de-skew = <0x08>;
+ cs1_dq11_rx_de-skew = <0x08>;
+ cs1_dq11_tx_de-skew = <0x08>;
+ cs1_dq12_rx_de-skew = <0x08>;
+ cs1_dq12_tx_de-skew = <0x07>;
+ cs1_dq13_rx_de-skew = <0x08>;
+ cs1_dq13_tx_de-skew = <0x08>;
+ cs1_dq14_rx_de-skew = <0x08>;
+ cs1_dq14_tx_de-skew = <0x08>;
+ cs1_dq15_rx_de-skew = <0x08>;
+ cs1_dq15_tx_de-skew = <0x07>;
+ cs1_dqs1_rx_de-skew = <0x07>;
+ cs1_dqs1p_tx_de-skew = <0x09>;
+ cs1_dqs1n_tx_de-skew = <0x09>;
+ cs1_dm2_rx_de-skew = <0x07>;
+ cs1_dm2_tx_de-skew = <0x08>;
+ cs1_dq16_rx_de-skew = <0x08>;
+ cs1_dq16_tx_de-skew = <0x09>;
+ cs1_dq17_rx_de-skew = <0x08>;
+ cs1_dq17_tx_de-skew = <0x09>;
+ cs1_dq18_rx_de-skew = <0x07>;
+ cs1_dq18_tx_de-skew = <0x08>;
+ cs1_dq19_rx_de-skew = <0x08>;
+ cs1_dq19_tx_de-skew = <0x09>;
+ cs1_dq20_rx_de-skew = <0x09>;
+ cs1_dq20_tx_de-skew = <0x09>;
+ cs1_dq21_rx_de-skew = <0x09>;
+ cs1_dq21_tx_de-skew = <0x09>;
+ cs1_dq22_rx_de-skew = <0x08>;
+ cs1_dq22_tx_de-skew = <0x09>;
+ cs1_dq23_rx_de-skew = <0x08>;
+ cs1_dq23_tx_de-skew = <0x09>;
+ cs1_dqs2_rx_de-skew = <0x06>;
+ cs1_dqs2p_tx_de-skew = <0x09>;
+ cs1_dqs2n_tx_de-skew = <0x09>;
+ cs1_dm3_rx_de-skew = <0x07>;
+ cs1_dm3_tx_de-skew = <0x07>;
+ cs1_dq24_rx_de-skew = <0x08>;
+ cs1_dq24_tx_de-skew = <0x09>;
+ cs1_dq25_rx_de-skew = <0x09>;
+ cs1_dq25_tx_de-skew = <0x09>;
+ cs1_dq26_rx_de-skew = <0x09>;
+ cs1_dq26_tx_de-skew = <0x08>;
+ cs1_dq27_rx_de-skew = <0x08>;
+ cs1_dq27_tx_de-skew = <0x08>;
+ cs1_dq28_rx_de-skew = <0x09>;
+ cs1_dq28_tx_de-skew = <0x09>;
+ cs1_dq29_rx_de-skew = <0x09>;
+ cs1_dq29_tx_de-skew = <0x09>;
+ cs1_dq30_rx_de-skew = <0x09>;
+ cs1_dq30_tx_de-skew = <0x08>;
+ cs1_dq31_rx_de-skew = <0x08>;
+ cs1_dq31_tx_de-skew = <0x08>;
+ cs1_dqs3_rx_de-skew = <0x07>;
+ cs1_dqs3p_tx_de-skew = <0x09>;
+ cs1_dqs3n_tx_de-skew = <0x09>;
+ phandle = <0xaf>;
+ };
+
+ aliases {
+ ethernet0 = "/ethernet@ff360000";
+ i2c0 = "/i2c@ff180000";
+ i2c1 = "/i2c@ff190000";
+ i2c2 = "/i2c@ff1a0000";
+ i2c3 = "/i2c@ff1b0000";
+ serial0 = "/serial@ff030000";
+ serial1 = "/serial@ff158000";
+ serial2 = "/serial@ff160000";
+ serial3 = "/serial@ff168000";
+ serial4 = "/serial@ff170000";
+ serial5 = "/serial@ff178000";
+ spi0 = "/spi@ff1d0000";
+ spi1 = "/spi@ff1d8000";
+ };
+
+ cpus {
+ #address-cells = <0x02>;
+ #size-cells = <0x00>;
+
+ cpu@0 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a35\0arm,armv8";
+ reg = <0x00 0x00>;
+ enable-method = "psci";
+ clocks = <0x02 0x07>;
+ #cooling-cells = <0x02>;
+ dynamic-power-coefficient = <0x5a>;
+ operating-points-v2 = <0x03>;
+ cpu-idle-states = <0x04 0x05>;
+ cpu-supply = <0x06>;
+ phandle = <0x09>;
+ };
+
+ cpu@1 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a35\0arm,armv8";
+ reg = <0x00 0x01>;
+ enable-method = "psci";
+ operating-points-v2 = <0x03>;
+ cpu-idle-states = <0x04 0x05>;
+ phandle = <0x0a>;
+ };
+
+ cpu@2 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a35\0arm,armv8";
+ reg = <0x00 0x02>;
+ enable-method = "psci";
+ operating-points-v2 = <0x03>;
+ cpu-idle-states = <0x04 0x05>;
+ phandle = <0x0b>;
+ };
+
+ cpu@3 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a35\0arm,armv8";
+ reg = <0x00 0x03>;
+ enable-method = "psci";
+ operating-points-v2 = <0x03>;
+ cpu-idle-states = <0x04 0x05>;
+ phandle = <0x0c>;
+ };
+
+ idle-states {
+ entry-method = "psci";
+
+ cpu-sleep {
+ compatible = "arm,idle-state";
+ local-timer-stop;
+ arm,psci-suspend-param = <0x10000>;
+ entry-latency-us = <0x78>;
+ exit-latency-us = <0xfa>;
+ min-residency-us = <0x384>;
+ phandle = <0x04>;
+ };
+
+ cluster-sleep {
+ compatible = "arm,idle-state";
+ local-timer-stop;
+ arm,psci-suspend-param = <0x1010000>;
+ entry-latency-us = <0x190>;
+ exit-latency-us = <0x1f4>;
+ min-residency-us = <0x7d0>;
+ phandle = <0x05>;
+ };
+ };
+ };
+
+ cpu0-opp-table {
+ compatible = "operating-points-v2";
+ opp-shared;
+ rockchip,temp-hysteresis = <0x1388>;
+ rockchip,low-temp = <0x00>;
+ rockchip,low-temp-min-volt = <0xf4240>;
+ rockchip,low-temp-adjust-volt = <0x00 0x5e8 0xc350>;
+ clocks = <0x02 0x01>;
+ rockchip,avs-scale = <0x04>;
+ rockchip,max-volt = <0x149970>;
+ rockchip,evb-irdrop = <0x61a8>;
+ nvmem-cells = <0x07 0x08>;
+ nvmem-cell-names = "cpu_leakage\0performance";
+ rockchip,bin-scaling-sel = <0x00 0x0d 0x01 0x0d>;
+ rockchip,pvtm-voltage-sel = <0x00 0xc350 0x00 0xc351 0xd2f0 0x01 0xd2f1 0xea60 0x02 0xea61 0x1869f 0x03>;
+ rockchip,pvtm-freq = <0x639c0>;
+ rockchip,pvtm-volt = <0xf4240>;
+ rockchip,pvtm-ch = <0x00 0x00>;
+ rockchip,pvtm-sample-time = <0x3e8>;
+ rockchip,pvtm-number = <0x0a>;
+ rockchip,pvtm-error = <0x3e8>;
+ rockchip,pvtm-ref-temp = <0x28>;
+ rockchip,pvtm-temp-prop = <0xffffffc8 0xffffffc8>;
+ rockchip,thermal-zone = "soc-thermal";
+ rockchip,avs = <0x01>;
+ phandle = <0x03>;
+
+ opp-1008000000 {
+ opp-hz = <0x00 0x3c14dc00>;
+ opp-microvolt = <0x11edd8 0x11edd8 0x149970>;
+ opp-microvolt-L0 = <0x11edd8 0x11edd8 0x149970>;
+ opp-microvolt-L1 = <0x112a88 0x112a88 0x149970>;
+ opp-microvolt-L2 = <0x112a88 0x112a88 0x149970>;
+ opp-microvolt-L3 = <0x100590 0x100590 0x149970>;
+ clock-latency-ns = <0x9c40>;
+ };
+
+ opp-1200000000 {
+ opp-hz = <0x00 0x47868c00>;
+ opp-microvolt = <0x13d620 0x13d620 0x149970>;
+ opp-microvolt-L0 = <0x13d620 0x13d620 0x149970>;
+ opp-microvolt-L1 = <0x137478 0x137478 0x149970>;
+ opp-microvolt-L2 = <0x1312d0 0x1312d0 0x149970>;
+ opp-microvolt-L3 = <0x124f80 0x124f80 0x149970>;
+ clock-latency-ns = <0x9c40>;
+ };
+
+ opp-1248000000 {
+ opp-hz = <0x00 0x4a62f800>;
+ opp-microvolt = <0x149970 0x149970 0x149970>;
+ opp-microvolt-L0 = <0x149970 0x149970 0x149970>;
+ opp-microvolt-L1 = <0x13d620 0x13d620 0x149970>;
+ opp-microvolt-L2 = <0x137478 0x137478 0x149970>;
+ opp-microvolt-L3 = <0x12b128 0x12b128 0x149970>;
+ clock-latency-ns = <0x9c40>;
+ };
+
+ opp-1296000000 {
+ opp-hz = <0x00 0x4d3f6400>;
+ opp-microvolt = <0x149970 0x149970 0x149970>;
+ opp-microvolt-L0 = <0x149970 0x149970 0x149970>;
+ opp-microvolt-L1 = <0x149970 0x149970 0x149970>;
+ opp-microvolt-L2 = <0x13d620 0x13d620 0x149970>;
+ opp-microvolt-L3 = <0x1312d0 0x1312d0 0x149970>;
+ clock-latency-ns = <0x9c40>;
+ };
+
+ opp-1512000000 {
+ opp-hz = <0x00 0x5a1f4a00>;
+ opp-microvolt = <0x149970 0x149970 0x149970>;
+ opp-microvolt-L0 = <0x149970 0x149970 0x149970>;
+ opp-microvolt-L1 = <0x149970 0x149970 0x149970>;
+ opp-microvolt-L2 = <0x13d620 0x13d620 0x149970>;
+ opp-microvolt-L3 = <0x1312d0 0x1312d0 0x149970>;
+ clock-latency-ns = <0x9c40>;
+ };
+ };
+
+ arm-pmu {
+ compatible = "arm,cortex-a53-pmu";
+ interrupts = <0x00 0x64 0x04 0x00 0x65 0x04 0x00 0x66 0x04 0x00 0x67 0x04>;
+ interrupt-affinity = <0x09 0x0a 0x0b 0x0c>;
+ };
+
+ bus-soc {
+ compatible = "rockchip,px30-bus";
+ rockchip,busfreq-policy = "autocs";
+ phandle = <0xc4>;
+
+ soc-bus0 {
+ bus-id = <0x00>;
+ timer-us = <0x14>;
+ enable-msk = <0x40f7>;
+ status = "disabled";
+ };
+
+ soc-bus1 {
+ bus-id = <0x01>;
+ timer-us = <0xc8>;
+ enable-msk = <0x40bf>;
+ status = "disabled";
+ };
+
+ soc-bus2 {
+ bus-id = <0x02>;
+ timer-us = <0xc8>;
+ enable-msk = <0x4007>;
+ status = "disabled";
+ };
+ };
+
+ bus-apll {
+ compatible = "rockchip,px30-bus";
+ rockchip,busfreq-policy = "clkfreq";
+ clocks = <0x02 0x01>;
+ clock-names = "bus";
+ operating-points-v2 = <0x0d>;
+ status = "okay";
+ bus-supply = <0x0e>;
+ phandle = <0xc5>;
+ };
+
+ bus-apll-opp-table {
+ compatible = "operating-points-v2";
+ opp-shared;
+ phandle = <0x0d>;
+
+ opp-1512000000 {
+ opp-hz = <0x00 0x5a1f4a00>;
+ opp-microvolt = <0xf4240>;
+ };
+
+ opp-1008000000 {
+ opp-hz = <0x00 0x3c14dc00>;
+ opp-microvolt = <0xe7ef0>;
+ };
+ };
+
+ cpuinfo {
+ compatible = "rockchip,cpuinfo";
+ nvmem-cells = <0x0f>;
+ nvmem-cell-names = "id";
+ };
+
+ display-subsystem {
+ compatible = "rockchip,display-subsystem";
+ ports = <0x10>;
+ status = "okay";
+ logo-memory-region = <0x11>;
+ phandle = <0xc6>;
+
+ route {
+
+ route-lvds {
+ status = "disabled";
+ logo,uboot = "logo.gif";
+ logo,kernel = "logo_kernel.gif";
+ logo,mode = "center";
+ charge_logo,mode = "center";
+ connect = <0x12>;
+ phandle = <0xc7>;
+ };
+
+ route-dsi {
+ status = "okay";
+ logo,uboot = "logo.gif";
+ logo,kernel = "logo_kernel.gif";
+ logo,mode = "center";
+ charge_logo,mode = "center";
+ connect = <0x13>;
+ phandle = <0xc8>;
+ };
+
+ route-rgb {
+ status = "disabled";
+ logo,uboot = "logo.gif";
+ logo,kernel = "logo_kernel.gif";
+ logo,mode = "center";
+ charge_logo,mode = "center";
+ connect = <0x14>;
+ phandle = <0xc9>;
+ };
+ };
+ };
+
+ firmware {
+
+ optee {
+ compatible = "linaro,optee-tz";
+ method = "smc";
+ };
+ };
+
+ external-gmac-clock {
+ compatible = "fixed-clock";
+ clock-frequency = <0x2faf080>;
+ clock-output-names = "gmac_clkin";
+ #clock-cells = <0x00>;
+ phandle = <0xca>;
+ };
+
+ psci {
+ compatible = "arm,psci-1.0";
+ method = "smc";
+ };
+
+ rockchip-suspend {
+ compatible = "rockchip,pm-px30";
+ status = "okay";
+ rockchip,sleep-debug-en = <0x01>;
+ rockchip,sleep-mode-config = <0x20702>;
+ rockchip,wakeup-config = <0x85>;
+ phandle = <0xcb>;
+ };
+
+ timer {
+ compatible = "arm,armv8-timer";
+ interrupts = <0x01 0x0d 0xf04 0x01 0x0e 0xf04 0x01 0x0b 0xf04 0x01 0x0a 0xf04>;
+ };
+
+ xin24m {
+ compatible = "fixed-clock";
+ #clock-cells = <0x00>;
+ clock-frequency = <0x16e3600>;
+ clock-output-names = "xin24m";
+ phandle = <0xcc>;
+ };
+
+ xin32k {
+ compatible = "fixed-clock";
+ #clock-cells = <0x00>;
+ clock-frequency = <0x8000>;
+ clock-output-names = "xin32k";
+ phandle = <0xcd>;
+ };
+
+ power-management@ff000000 {
+ compatible = "rockchip,px30-pmu\0syscon\0simple-mfd";
+ reg = <0x00 0xff000000 0x00 0x1000>;
+ phandle = <0xce>;
+
+ power-controller {
+ compatible = "rockchip,px30-power-controller";
+ #power-domain-cells = <0x01>;
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+ phandle = <0x8a>;
+
+ pd_usb@5 {
+ reg = <0x05>;
+ clocks = <0x02 0x103 0x02 0x102 0x02 0x3c>;
+ pm_qos = <0x15 0x16>;
+ };
+
+ pd_sdcard@7 {
+ reg = <0x07>;
+ clocks = <0x02 0xf7 0x02 0x3b>;
+ pm_qos = <0x17>;
+ };
+
+ pd_gmac@9 {
+ reg = <0x09>;
+ clocks = <0x02 0xb2 0x02 0x143 0x02 0x40 0x02 0x3f>;
+ pm_qos = <0x18>;
+ };
+
+ pd_mmc_nand@10 {
+ reg = <0x0a>;
+ clocks = <0x02 0xfe 0x02 0x100 0x02 0xff 0x02 0x101 0x02 0x39 0x02 0x37 0x02 0x38 0x02 0x3a>;
+ pm_qos = <0x19 0x1a 0x1b 0x1c>;
+ };
+
+ pd_vpu@11 {
+ reg = <0x0b>;
+ clocks = <0x02 0xaf 0x02 0xf4 0x02 0x4b>;
+ pm_qos = <0x1d 0x1e>;
+ };
+
+ pd_vo@12 {
+ reg = <0x0c>;
+ clocks = <0x02 0xb7 0x02 0xb5 0x02 0xb6 0x02 0x96 0x02 0x97 0x02 0xfd 0x02 0xfb 0x02 0xfc 0x02 0x144 0x02 0x35 0x02 0x36>;
+ pm_qos = <0x1f 0x20 0x21 0x22>;
+ };
+
+ pd_vi@13 {
+ reg = <0x0d>;
+ clocks = <0x02 0xb3 0x02 0xb4 0x02 0xf9 0x02 0xfa 0x02 0x33>;
+ pm_qos = <0x23 0x24 0x25 0x26 0x27>;
+ };
+
+ pd_gpu@14 {
+ reg = <0x0e>;
+ clocks = <0x02 0x49>;
+ pm_qos = <0x28>;
+ };
+ };
+ };
+
+ syscon@ff010000 {
+ compatible = "rockchip,px30-pmugrf\0syscon\0simple-mfd";
+ reg = <0x00 0xff010000 0x00 0x1000>;
+ #address-cells = <0x01>;
+ #size-cells = <0x01>;
+ phandle = <0xac>;
+
+ io-domains {
+ compatible = "rockchip,px30-pmu-io-voltage-domain";
+ status = "okay";
+ pmuio1-supply = <0x29>;
+ pmuio2-supply = <0x29>;
+ phandle = <0xcf>;
+ };
+
+ reboot-mode {
+ compatible = "syscon-reboot-mode";
+ offset = <0x200>;
+ mode-bootloader = <0x5242c301>;
+ mode-charge = <0x5242c30b>;
+ mode-fastboot = <0x5242c309>;
+ mode-loader = <0x5242c301>;
+ mode-normal = <0x5242c300>;
+ mode-recovery = <0x5242c303>;
+ mode-ums = <0x5242c30c>;
+ };
+
+ pmu-pvtm {
+ compatible = "rockchip,px30-pmu-pvtm";
+ clocks = <0x2a 0x07>;
+ clock-names = "pmu";
+ status = "okay";
+ phandle = <0xd0>;
+ };
+ };
+
+ serial@ff030000 {
+ compatible = "rockchip,px30-uart\0snps,dw-apb-uart";
+ reg = <0x00 0xff030000 0x00 0x100>;
+ interrupts = <0x00 0x0f 0x04>;
+ clocks = <0x2a 0x06 0x2a 0x15>;
+ clock-names = "baudclk\0apb_pclk";
+ reg-shift = <0x02>;
+ reg-io-width = <0x04>;
+ dmas = <0x2b 0x00 0x2b 0x01>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x2c 0x2d 0x2e>;
+ status = "disabled";
+ phandle = <0xd1>;
+ };
+
+ i2s@ff060000 {
+ compatible = "rockchip,px30-i2s-tdm";
+ reg = <0x00 0xff060000 0x00 0x1000>;
+ interrupts = <0x00 0x0c 0x04>;
+ clocks = <0x02 0x10 0x02 0x12 0x02 0x106>;
+ clock-names = "mclk_tx\0mclk_rx\0hclk";
+ dmas = <0x2b 0x10 0x2b 0x11>;
+ dma-names = "tx\0rx";
+ resets = <0x02 0x84 0x02 0xbf>;
+ reset-names = "tx-m\0rx-m";
+ rockchip,cru = <0x02>;
+ rockchip,grf = <0x2f>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x30 0x31 0x32 0x33 0x34 0x35 0x36 0x37 0x38 0x39 0x3a 0x3b>;
+ status = "disabled";
+ phandle = <0xd2>;
+ };
+
+ i2s@ff070000 {
+ compatible = "rockchip,px30-i2s\0rockchip,rk3066-i2s";
+ reg = <0x00 0xff070000 0x00 0x1000>;
+ interrupts = <0x00 0x0d 0x04>;
+ clocks = <0x02 0x14 0x02 0x107>;
+ clock-names = "i2s_clk\0i2s_hclk";
+ dmas = <0x2b 0x12 0x2b 0x13>;
+ dma-names = "tx\0rx";
+ resets = <0x02 0x86 0x02 0x85>;
+ reset-names = "reset-m\0reset-h";
+ pinctrl-names = "default";
+ pinctrl-0 = <0x3c 0x3d 0x3e 0x3f>;
+ status = "okay";
+ #sound-dai-cells = <0x00>;
+ phandle = <0xc2>;
+ };
+
+ i2s@ff080000 {
+ compatible = "rockchip,px30-i2s\0rockchip,rk3066-i2s";
+ reg = <0x00 0xff080000 0x00 0x1000>;
+ interrupts = <0x00 0x0e 0x04>;
+ clocks = <0x02 0x16 0x02 0x108>;
+ clock-names = "i2s_clk\0i2s_hclk";
+ dmas = <0x2b 0x14 0x2b 0x15>;
+ dma-names = "tx\0rx";
+ resets = <0x02 0x88 0x02 0x87>;
+ reset-names = "reset-m\0reset-h";
+ pinctrl-names = "default";
+ pinctrl-0 = <0x40 0x41 0x42 0x43>;
+ status = "disabled";
+ phandle = <0xd3>;
+ };
+
+ pdm@ff0a0000 {
+ compatible = "rockchip,px30-pdm\0rockchip,pdm";
+ reg = <0x00 0xff0a0000 0x00 0x1000>;
+ clocks = <0x02 0x0f 0x02 0x105>;
+ clock-names = "pdm_clk\0pdm_hclk";
+ dmas = <0x2b 0x18>;
+ dma-names = "rx";
+ resets = <0x02 0x82>;
+ reset-names = "pdm-m";
+ pinctrl-names = "default";
+ pinctrl-0 = <0x44 0x45 0x46 0x47 0x48 0x49>;
+ status = "disabled";
+ phandle = <0xd4>;
+ };
+
+ crypto@ff0b0000 {
+ compatible = "rockchip,px30-crypto";
+ reg = <0x00 0xff0b0000 0x00 0x4000>;
+ interrupts = <0x00 0x52 0x04>;
+ clocks = <0x02 0xac 0x02 0xf1 0x02 0x30 0x02 0x31>;
+ clock-names = "aclk\0hclk\0sclk\0apb_pclk";
+ resets = <0x02 0x74>;
+ reset-names = "crypto-rst";
+ status = "disabled";
+ phandle = <0xd5>;
+ };
+
+ rng@ff0b0000 {
+ compatible = "rockchip,cryptov2-rng";
+ reg = <0x00 0xff0b0000 0x00 0x4000>;
+ clocks = <0x02 0x30 0x02 0x31 0x02 0xac 0x02 0xf1>;
+ clock-names = "clk_crypto\0clk_crypto_apk\0aclk_crypto\0hclk_crypto";
+ assigned-clocks = <0x02 0x30 0x02 0x31 0x02 0xac 0x02 0xf1>;
+ assigned-clock-rates = <0x8f0d180 0x8f0d180 0xbebc200 0x5f5e100>;
+ resets = <0x02 0x74>;
+ reset-names = "reset";
+ status = "okay";
+ phandle = <0xd6>;
+ };
+
+ interrupt-controller@ff131000 {
+ compatible = "arm,gic-400";
+ #interrupt-cells = <0x03>;
+ #address-cells = <0x00>;
+ interrupt-controller;
+ reg = <0x00 0xff131000 0x00 0x1000 0x00 0xff132000 0x00 0x2000 0x00 0xff134000 0x00 0x2000 0x00 0xff136000 0x00 0x2000>;
+ interrupts = <0x01 0x09 0xf04>;
+ phandle = <0x01>;
+ };
+
+ syscon@ff140000 {
+ compatible = "rockchip,px30-grf\0syscon\0simple-mfd";
+ reg = <0x00 0xff140000 0x00 0x1000>;
+ #address-cells = <0x01>;
+ #size-cells = <0x01>;
+ phandle = <0x2f>;
+
+ io-domains {
+ compatible = "rockchip,px30-io-voltage-domain";
+ status = "okay";
+ vccio1-supply = <0x4a>;
+ vccio2-supply = <0x4a>;
+ vccio3-supply = <0x4b>;
+ vccio4-supply = <0x4b>;
+ vccio5-supply = <0x4b>;
+ vccio6-supply = <0x4b>;
+ phandle = <0xd7>;
+ };
+
+ lvds {
+ compatible = "rockchip,px30-lvds";
+ phys = <0x4c>;
+ phy-names = "phy";
+ status = "disabled";
+ phandle = <0xd8>;
+
+ ports {
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+
+ port@0 {
+ reg = <0x00>;
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+
+ endpoint@0 {
+ reg = <0x00>;
+ remote-endpoint = <0x12>;
+ phandle = <0xa2>;
+ };
+ };
+ };
+ };
+
+ rgb {
+ compatible = "rockchip,px30-rgb";
+ pinctrl-names = "default\0sleep";
+ pinctrl-0 = <0x4d>;
+ pinctrl-1 = <0x4e>;
+ status = "disabled";
+ phys = <0x4c>;
+ phy-names = "phy";
+ phandle = <0xd9>;
+
+ ports {
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+
+ port@0 {
+ reg = <0x00>;
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+
+ endpoint@0 {
+ reg = <0x00>;
+ remote-endpoint = <0x14>;
+ phandle = <0xa4>;
+ };
+ };
+ };
+ };
+ };
+
+ syscon@ff148000 {
+ compatible = "syscon\0simple-mfd";
+ reg = <0x00 0xff148000 0x00 0x1000>;
+ #address-cells = <0x01>;
+ #size-cells = <0x01>;
+ phandle = <0xda>;
+
+ pvtm {
+ compatible = "rockchip,px30-pvtm";
+ clocks = <0x02 0x4a>;
+ clock-names = "core";
+ status = "okay";
+ phandle = <0xdb>;
+ };
+ };
+
+ serial@ff158000 {
+ compatible = "rockchip,px30-uart\0snps,dw-apb-uart";
+ reg = <0x00 0xff158000 0x00 0x100>;
+ interrupts = <0x00 0x10 0x04>;
+ clocks = <0x02 0x18 0x02 0x149>;
+ clock-names = "baudclk\0apb_pclk";
+ reg-shift = <0x02>;
+ reg-io-width = <0x04>;
+ dmas = <0x2b 0x02 0x2b 0x03>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x4f 0x50>;
+ status = "okay";
+ phandle = <0xdc>;
+ };
+
+ serial@ff160000 {
+ compatible = "rockchip,px30-uart\0snps,dw-apb-uart";
+ reg = <0x00 0xff160000 0x00 0x100>;
+ interrupts = <0x00 0x11 0x04>;
+ clocks = <0x02 0x19 0x02 0x14a>;
+ clock-names = "baudclk\0apb_pclk";
+ reg-shift = <0x02>;
+ reg-io-width = <0x04>;
+ dmas = <0x2b 0x04 0x2b 0x05>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x51>;
+ status = "disabled";
+ phandle = <0xdd>;
+ };
+
+ serial@ff168000 {
+ compatible = "rockchip,px30-uart\0snps,dw-apb-uart";
+ reg = <0x00 0xff168000 0x00 0x100>;
+ interrupts = <0x00 0x12 0x04>;
+ clocks = <0x02 0x1a 0x02 0x14b>;
+ clock-names = "baudclk\0apb_pclk";
+ reg-shift = <0x02>;
+ reg-io-width = <0x04>;
+ dmas = <0x2b 0x06 0x2b 0x07>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x52 0x53 0x54>;
+ status = "disabled";
+ phandle = <0xde>;
+ };
+
+ serial@ff170000 {
+ compatible = "rockchip,px30-uart\0snps,dw-apb-uart";
+ reg = <0x00 0xff170000 0x00 0x100>;
+ interrupts = <0x00 0x13 0x04>;
+ clocks = <0x02 0x1b 0x02 0x14c>;
+ clock-names = "baudclk\0apb_pclk";
+ reg-shift = <0x02>;
+ reg-io-width = <0x04>;
+ dmas = <0x2b 0x08 0x2b 0x09>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x55 0x56 0x57>;
+ status = "disabled";
+ phandle = <0xdf>;
+ };
+
+ serial@ff178000 {
+ compatible = "rockchip,px30-uart\0snps,dw-apb-uart";
+ reg = <0x00 0xff178000 0x00 0x100>;
+ interrupts = <0x00 0x14 0x04>;
+ clocks = <0x02 0x1c 0x02 0x14d>;
+ clock-names = "baudclk\0apb_pclk";
+ reg-shift = <0x02>;
+ reg-io-width = <0x04>;
+ dmas = <0x2b 0x0a 0x2b 0x0b>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x58 0x59 0x5a>;
+ status = "disabled";
+ phandle = <0xe0>;
+ };
+
+ i2c@ff180000 {
+ compatible = "rockchip,rk3399-i2c";
+ reg = <0x00 0xff180000 0x00 0x1000>;
+ clocks = <0x02 0x1d 0x02 0x14e>;
+ clock-names = "i2c\0pclk";
+ interrupts = <0x00 0x07 0x04>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x5b>;
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+ status = "okay";
+ clock-frequency = <0x61a80>;
+ i2c-scl-rising-time-ns = <0x118>;
+ i2c-scl-falling-time-ns = <0x10>;
+ phandle = <0xe1>;
+
+ pmic@20 {
+ compatible = "rockchip,rk817";
+ reg = <0x20>;
+ interrupt-parent = <0x5c>;
+ interrupts = <0x0a 0x08>;
+ pinctrl-names = "default\0pmic-sleep\0pmic-power-off\0pmic-reset";
+ pinctrl-0 = <0x5d>;
+ pinctrl-1 = <0x5e 0x5f>;
+ pinctrl-2 = <0x60 0x61>;
+ pinctrl-3 = <0x62 0x63>;
+ rockchip,system-power-controller;
+ wakeup-source;
+ #clock-cells = <0x01>;
+ clock-output-names = "rk808-clkout1\0rk808-clkout2";
+ pmic-reset-func = <0x01>;
+ vcc1-supply = <0x64>;
+ vcc2-supply = <0x64>;
+ vcc3-supply = <0x64>;
+ vcc4-supply = <0x64>;
+ vcc5-supply = <0x64>;
+ vcc6-supply = <0x64>;
+ vcc7-supply = <0x64>;
+ vcc8-supply = <0x64>;
+ vcc9-supply = <0x65>;
+ phandle = <0xe2>;
+
+ pwrkey {
+ status = "okay";
+ };
+
+ pinctrl_rk8xx {
+ gpio-controller;
+ #gpio-cells = <0x02>;
+ phandle = <0xe3>;
+
+ rk817_ts_gpio1 {
+ pins = "gpio_ts";
+ function = "pin_fun1";
+ phandle = <0xe4>;
+ };
+
+ rk817_gt_gpio2 {
+ pins = "gpio_gt";
+ function = "pin_fun1";
+ phandle = <0xe5>;
+ };
+
+ rk817_pin_ts {
+ pins = "gpio_ts";
+ function = "pin_fun0";
+ phandle = <0xe6>;
+ };
+
+ rk817_pin_gt {
+ pins = "gpio_gt";
+ function = "pin_fun0";
+ phandle = <0xe7>;
+ };
+
+ rk817_slppin_null {
+ pins = "gpio_slp";
+ function = "pin_fun0";
+ phandle = <0xe8>;
+ };
+
+ rk817_slppin_slp {
+ pins = "gpio_slp";
+ function = "pin_fun1";
+ phandle = <0x5f>;
+ };
+
+ rk817_slppin_pwrdn {
+ pins = "gpio_slp";
+ function = "pin_fun2";
+ phandle = <0x61>;
+ };
+
+ rk817_slppin_rst {
+ pins = "gpio_slp";
+ function = "pin_fun3";
+ phandle = <0x63>;
+ };
+ };
+
+ regulators {
+
+ DCDC_REG1 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <0xe7ef0>;
+ regulator-max-microvolt = <0x118c30>;
+ regulator-ramp-delay = <0x1771>;
+ regulator-initial-mode = <0x02>;
+ regulator-name = "vdd_logic";
+ phandle = <0x0e>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <0xe7ef0>;
+ };
+ };
+
+ DCDC_REG2 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <0xe7ef0>;
+ regulator-max-microvolt = <0x149970>;
+ regulator-ramp-delay = <0x1771>;
+ regulator-initial-mode = <0x02>;
+ regulator-name = "vdd_arm";
+ phandle = <0x06>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <0xe7ef0>;
+ };
+ };
+
+ DCDC_REG3 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-initial-mode = <0x02>;
+ regulator-name = "vcc_ddr";
+ phandle = <0xe9>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ };
+ };
+
+ DCDC_REG4 {
+ regulator-always-on;
+ #regulator-boot-on;
+ regulator-init-microvolt = <0x1e8480>;
+ regulator-min-microvolt = <0x1e8480>;
+ regulator-max-microvolt = <0x231860>;
+ regulator-initial-mode = <0x02>;
+ regulator-name = "vcc_3v3";
+ phandle = <0x4b>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <0x1e8480>;
+ };
+ };
+
+ LDO_REG1 {
+ regulator-min-microvolt = <0xf4240>;
+ regulator-max-microvolt = <0xf4240>;
+ regulator-name = "vcc_1v0";
+ phandle = <0xea>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <0xf4240>;
+ };
+ };
+
+ LDO_REG2 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <0x1b7740>;
+ regulator-max-microvolt = <0x1b7740>;
+ regulator-name = "vcc1v8_soc";
+ phandle = <0x88>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <0x1b7740>;
+ };
+ };
+
+ LDO_REG3 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <0xf4240>;
+ regulator-max-microvolt = <0xf4240>;
+ regulator-name = "vcc1v0_soc";
+ phandle = <0xeb>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <0xf4240>;
+ };
+ };
+
+ LDO_REG4 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <0x325aa0>;
+ regulator-max-microvolt = <0x325aa0>;
+ regulator-name = "vcc3v3_pmu";
+ phandle = <0x29>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <0x325aa0>;
+ };
+ };
+
+ LDO_REG5 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <0x1b7740>;
+ regulator-max-microvolt = <0x1b7740>;
+ regulator-name = "vccio_sd";
+ phandle = <0x4a>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <0x1b7740>;
+ };
+ };
+
+ LDO_REG6 {
+ regulator-min-microvolt = <0x1b7740>;
+ regulator-max-microvolt = <0x2dc6c0>;
+ regulator-boot-on;
+ regulator-name = "vcc_sd";
+ phandle = <0x93>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <0x2dc6c0>;
+ };
+ };
+
+ LDO_REG7 {
+ regulator-min-microvolt = <0x325aa0>;
+ regulator-max-microvolt = <0x325aa0>;
+ regulator-name = "vcc_backlight";
+ phandle = <0x9e>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <0x325aa0>;
+ };
+ };
+
+ LDO_REG8 {
+ regulator-min-microvolt = <0x2ab980>;
+ regulator-max-microvolt = <0x2ab980>;
+ regulator-name = "vcc_lcd";
+ phandle = <0x9f>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <0x2ab980>;
+ };
+ };
+
+ BOOST {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <0x4c4b40>;
+ regulator-max-microvolt = <0x5265c0>;
+ regulator-name = "boost";
+ phandle = <0x65>;
+ };
+
+ OTG_SWITCH {
+ regulator-boot-on;
+ regulator-name = "otg_switch";
+ phandle = <0xec>;
+ };
+ };
+
+ battery {
+ compatible = "rk817,battery";
+ ocv_table = <0xc5d 0xc94 0xcd0 0xd02 0xd34 0xd66 0xd98 0xdca 0xdfc 0xe2e 0xe56 0xe7e 0xea6 0xece 0xef6 0xf1e 0xf46 0xf6e 0xf96 0xf9b 0xfa0>;
+ design_capacity = <0xd34>;
+ design_qmax = <0xe86>;
+ bat_res = <0x64>;
+ sleep_enter_current = <0x12c>;
+ sleep_exit_current = <0x12c>;
+ sleep_filter_current = <0x64>;
+ power_off_thresd = <0xbb8>;
+ zero_algorithm_vol = <0xf0a>;
+ max_soc_offset = <0x3c>;
+ monitor_sec = <0x05>;
+ virtual_power = <0x00>;
+ sample_res = <0x0a>;
+ };
+
+ charger {
+ compatible = "rk817,charger";
+ min_input_voltage = <0x1194>;
+ max_input_current = <0x5dc>;
+ max_chrg_current = <0x7d0>;
+ max_chrg_voltage = <0x1068>;
+ chrg_term_mode = <0x00>;
+ chrg_finish_cur = <0x34>;
+ virtual_power = <0x00>;
+ sample_res = <0x0a>;
+ dc_det_gpio = <0x5c 0x0b 0x00>;
+ bat_low_gpio = <0x66 0x0d 0x00>;
+ extcon = <0x67>;
+ };
+
+ codec {
+ #sound-dai-cells = <0x00>;
+ compatible = "rockchip,rk817-codec";
+ clocks = <0x02 0x15>;
+ clock-names = "mclk";
+ pinctrl-names = "default";
+ pinctrl-0 = <0x68>;
+ hp-volume = <0x14>;
+ spk-volume = <0x03>;
+ status = "okay";
+ phandle = <0xc3>;
+ };
+ };
+ };
+
+ i2c@ff190000 {
+ compatible = "rockchip,rk3399-i2c";
+ reg = <0x00 0xff190000 0x00 0x1000>;
+ clocks = <0x02 0x1e 0x02 0x14f>;
+ clock-names = "i2c\0pclk";
+ interrupts = <0x00 0x08 0x04>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x69>;
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+ status = "okay";
+ clock-frequency = <0x61a80>;
+ phandle = <0xed>;
+ };
+
+ i2c@ff1a0000 {
+ compatible = "rockchip,rk3399-i2c";
+ reg = <0x00 0xff1a0000 0x00 0x1000>;
+ clocks = <0x02 0x1f 0x02 0x150>;
+ clock-names = "i2c\0pclk";
+ interrupts = <0x00 0x09 0x04>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x6a>;
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+ status = "disabled";
+ phandle = <0xee>;
+ };
+
+ i2c@ff1b0000 {
+ compatible = "rockchip,rk3399-i2c";
+ reg = <0x00 0xff1b0000 0x00 0x1000>;
+ clocks = <0x02 0x20 0x02 0x151>;
+ clock-names = "i2c\0pclk";
+ interrupts = <0x00 0x0a 0x04>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x6b>;
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+ status = "disabled";
+ phandle = <0xef>;
+ };
+
+ spi@ff1d0000 {
+ compatible = "rockchip,px30-spi\0rockchip,rk3066-spi";
+ reg = <0x00 0xff1d0000 0x00 0x1000>;
+ interrupts = <0x00 0x1a 0x04>;
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+ clocks = <0x02 0x24 0x02 0x155>;
+ clock-names = "spiclk\0apb_pclk";
+ dmas = <0x2b 0x0c 0x2b 0x0d>;
+ dma-names = "tx\0rx";
+ pinctrl-names = "default\0high_speed";
+ pinctrl-0 = <0x6c 0x6d 0x6e 0x6f>;
+ pinctrl-1 = <0x70 0x6d 0x71 0x72>;
+ status = "disabled";
+ phandle = <0xf0>;
+ };
+
+ spi@ff1d8000 {
+ compatible = "rockchip,px30-spi\0rockchip,rk3066-spi";
+ reg = <0x00 0xff1d8000 0x00 0x1000>;
+ interrupts = <0x00 0x1b 0x04>;
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+ clocks = <0x02 0x25 0x02 0x156>;
+ clock-names = "spiclk\0apb_pclk";
+ dmas = <0x2b 0x0e 0x2b 0x0f>;
+ dma-names = "tx\0rx";
+ pinctrl-names = "default\0high_speed";
+ pinctrl-0 = <0x73 0x74 0x75 0x76 0x77>;
+ pinctrl-1 = <0x78 0x74 0x75 0x79 0x7a>;
+ status = "disabled";
+ phandle = <0xf1>;
+ };
+
+ watchdog@ff1e0000 {
+ compatible = "snps,dw-wdt";
+ reg = <0x00 0xff1e0000 0x00 0x100>;
+ clocks = <0x02 0x15b>;
+ interrupts = <0x00 0x25 0x04>;
+ resets = <0x02 0xb5>;
+ reset-names = "reset";
+ status = "disabled";
+ phandle = <0xf2>;
+ };
+
+ pwm@ff200000 {
+ compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm";
+ reg = <0x00 0xff200000 0x00 0x10>;
+ #pwm-cells = <0x03>;
+ pinctrl-names = "active";
+ pinctrl-0 = <0x7b>;
+ clocks = <0x02 0x22 0x02 0x153>;
+ clock-names = "pwm\0pclk";
+ status = "okay";
+ phandle = <0xbc>;
+ };
+
+ pwm@ff200010 {
+ compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm";
+ reg = <0x00 0xff200010 0x00 0x10>;
+ #pwm-cells = <0x03>;
+ pinctrl-names = "active";
+ pinctrl-0 = <0x7c>;
+ clocks = <0x02 0x22 0x02 0x153>;
+ clock-names = "pwm\0pclk";
+ status = "okay";
+ phandle = <0xc1>;
+ };
+
+ pwm@ff200020 {
+ compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm";
+ reg = <0x00 0xff200020 0x00 0x10>;
+ #pwm-cells = <0x03>;
+ pinctrl-names = "active";
+ pinctrl-0 = <0x7d>;
+ clocks = <0x02 0x22 0x02 0x153>;
+ clock-names = "pwm\0pclk";
+ status = "disabled";
+ phandle = <0xf3>;
+ };
+
+ pwm@ff200030 {
+ compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm";
+ reg = <0x00 0xff200030 0x00 0x10>;
+ #pwm-cells = <0x03>;
+ pinctrl-names = "active";
+ pinctrl-0 = <0x7e>;
+ clocks = <0x02 0x22 0x02 0x153>;
+ clock-names = "pwm\0pclk";
+ status = "disabled";
+ phandle = <0xf4>;
+ };
+
+ pwm@ff208000 {
+ compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm";
+ reg = <0x00 0xff208000 0x00 0x10>;
+ #pwm-cells = <0x03>;
+ pinctrl-names = "active";
+ pinctrl-0 = <0x7f>;
+ clocks = <0x02 0x23 0x02 0x154>;
+ clock-names = "pwm\0pclk";
+ status = "disabled";
+ phandle = <0xf5>;
+ };
+
+ pwm@ff208010 {
+ compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm";
+ reg = <0x00 0xff208010 0x00 0x10>;
+ #pwm-cells = <0x03>;
+ pinctrl-names = "active";
+ pinctrl-0 = <0x80>;
+ clocks = <0x02 0x23 0x02 0x154>;
+ clock-names = "pwm\0pclk";
+ status = "disabled";
+ phandle = <0xf6>;
+ };
+
+ pwm@ff208020 {
+ compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm";
+ reg = <0x00 0xff208020 0x00 0x10>;
+ #pwm-cells = <0x03>;
+ pinctrl-names = "active";
+ pinctrl-0 = <0x81>;
+ clocks = <0x02 0x23 0x02 0x154>;
+ clock-names = "pwm\0pclk";
+ status = "disabled";
+ phandle = <0xf7>;
+ };
+
+ pwm@ff208030 {
+ compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm";
+ reg = <0x00 0xff208030 0x00 0x10>;
+ #pwm-cells = <0x03>;
+ pinctrl-names = "active";
+ pinctrl-0 = <0x82>;
+ clocks = <0x02 0x23 0x02 0x154>;
+ clock-names = "pwm\0pclk";
+ status = "disabled";
+ phandle = <0xf8>;
+ };
+
+ rktimer@ff210000 {
+ compatible = "rockchip,rk3288-timer";
+ reg = <0x00 0xff210000 0x00 0x1000>;
+ interrupts = <0x00 0x1e 0x04>;
+ clocks = <0x02 0x159 0x02 0x26>;
+ clock-names = "pclk\0timer";
+ phandle = <0xf9>;
+ };
+
+ amba {
+ compatible = "simple-bus";
+ #address-cells = <0x02>;
+ #size-cells = <0x02>;
+ ranges;
+
+ dmac@ff240000 {
+ compatible = "arm,pl330\0arm,primecell";
+ reg = <0x00 0xff240000 0x00 0x4000>;
+ interrupts = <0x00 0x01 0x04 0x00 0x02 0x04>;
+ clocks = <0x02 0xbb>;
+ clock-names = "apb_pclk";
+ #dma-cells = <0x01>;
+ peripherals-req-type-burst;
+ phandle = <0x2b>;
+ };
+ };
+
+ thermal-zones {
+ phandle = <0xfa>;
+
+ soc-thermal {
+ polling-delay-passive = <0x14>;
+ polling-delay = <0x3e8>;
+ sustainable-power = <0x2ee>;
+ thermal-sensors = <0x83 0x00>;
+ phandle = <0xfb>;
+
+ trips {
+
+ trip-point-0 {
+ temperature = <0x11170>;
+ hysteresis = <0x7d0>;
+ type = "passive";
+ phandle = <0xfc>;
+ };
+
+ trip-point-1 {
+ temperature = <0x14c08>;
+ hysteresis = <0x7d0>;
+ type = "passive";
+ phandle = <0x84>;
+ };
+
+ soc-crit {
+ temperature = <0x1c138>;
+ hysteresis = <0x7d0>;
+ type = "critical";
+ phandle = <0xfd>;
+ };
+ };
+
+ cooling-maps {
+
+ map0 {
+ trip = <0x84>;
+ cooling-device = <0x09 0xffffffff 0xffffffff>;
+ contribution = <0x1000>;
+ };
+
+ map1 {
+ trip = <0x84>;
+ cooling-device = <0x85 0xffffffff 0xffffffff>;
+ contribution = <0x1000>;
+ };
+ };
+ };
+
+ gpu-thermal {
+ polling-delay-passive = <0x64>;
+ polling-delay = <0x3e8>;
+ thermal-sensors = <0x83 0x01>;
+ phandle = <0xfe>;
+ };
+ };
+
+ tsadc@ff280000 {
+ compatible = "rockchip,px30-tsadc";
+ reg = <0x00 0xff280000 0x00 0x100>;
+ interrupts = <0x00 0x24 0x04>;
+ rockchip,grf = <0x2f>;
+ clocks = <0x02 0x2c 0x02 0x158>;
+ clock-names = "tsadc\0apb_pclk";
+ assigned-clocks = <0x02 0x2c>;
+ assigned-clock-rates = <0xc350>;
+ resets = <0x02 0xa8>;
+ reset-names = "tsadc-apb";
+ #thermal-sensor-cells = <0x01>;
+ rockchip,hw-tshut-temp = <0x1d4c0>;
+ status = "okay";
+ pinctrl-names = "gpio\0otpout";
+ pinctrl-0 = <0x86>;
+ pinctrl-1 = <0x87>;
+ phandle = <0x83>;
+ };
+
+ saradc@ff288000 {
+ compatible = "rockchip,px30-saradc\0rockchip,rk3399-saradc";
+ reg = <0x00 0xff288000 0x00 0x100>;
+ interrupts = <0x00 0x54 0x04>;
+ #io-channel-cells = <0x01>;
+ clocks = <0x02 0x2d 0x02 0x157>;
+ clock-names = "saradc\0apb_pclk";
+ resets = <0x02 0xa5>;
+ reset-names = "saradc-apb";
+ status = "okay";
+ vref-supply = <0x88>;
+ phandle = <0xbe>;
+ };
+
+ otp@ff290000 {
+ compatible = "rockchip,px30-otp";
+ reg = <0x00 0xff290000 0x00 0x4000>;
+ #address-cells = <0x01>;
+ #size-cells = <0x01>;
+ clocks = <0x02 0x2f 0x02 0x15a 0x02 0x161>;
+ clock-names = "clk_otp\0pclk_otp\0pclk_otp_phy";
+ resets = <0x02 0xb4>;
+ reset-names = "otp_phy";
+ phandle = <0xff>;
+
+ id@7 {
+ reg = <0x07 0x10>;
+ phandle = <0x0f>;
+ };
+
+ cpu-leakage@17 {
+ reg = <0x17 0x01>;
+ phandle = <0x07>;
+ };
+
+ performance@1e {
+ reg = <0x1e 0x01>;
+ bits = <0x04 0x03>;
+ phandle = <0x08>;
+ };
+ };
+
+ clock-controller@ff2b0000 {
+ compatible = "rockchip,px30-cru";
+ reg = <0x00 0xff2b0000 0x00 0x1000>;
+ rockchip,grf = <0x2f>;
+ rockchip,boost = <0x89>;
+ #clock-cells = <0x01>;
+ #reset-cells = <0x01>;
+ assigned-clocks = <0x02 0x04>;
+ assigned-clock-rates = <0x3dfd2400>;
+ phandle = <0x02>;
+ };
+
+ cpu-boost@ff2b8000 {
+ compatible = "syscon";
+ reg = <0x00 0xff2b8000 0x00 0x1000>;
+ rockchip,boost-low-con0 = <0x1032>;
+ rockchip,boost-low-con1 = <0x1441>;
+ rockchip,boost-high-con0 = <0x1036>;
+ rockchip,boost-high-con1 = <0x1441>;
+ rockchip,boost-backup-pll = <0x01>;
+ rockchip,boost-backup-pll-usage = <0x00>;
+ rockchip,boost-switch-threshold = <0x249f00>;
+ rockchip,boost-statis-threshold = <0x100>;
+ rockchip,boost-statis-enable = <0x00>;
+ rockchip,boost-enable = <0x00>;
+ phandle = <0x89>;
+ };
+
+ pmu-clock-controller@ff2bc000 {
+ compatible = "rockchip,px30-pmucru";
+ reg = <0x00 0xff2bc000 0x00 0x1000>;
+ rockchip,grf = <0x2f>;
+ #clock-cells = <0x01>;
+ #reset-cells = <0x01>;
+ assigned-clocks = <0x2a 0x01 0x2a 0x08 0x2a 0x05 0x02 0x07 0x02 0xab 0x02 0xb0 0x02 0xf0 0x02 0xf5 0x02 0x140 0x02 0x49>;
+ assigned-clock-rates = <0x47868c00 0x5f5e100 0x18cba80 0x23c34600 0xbebc200 0xbebc200 0x8f0d180 0x8f0d180 0x5f5e100 0xbebc200>;
+ phandle = <0x2a>;
+ };
+
+ syscon@ff2c0000 {
+ compatible = "rockchip,px30-usb2phy-grf\0syscon\0simple-mfd";
+ reg = <0x00 0xff2c0000 0x00 0x10000>;
+ #address-cells = <0x01>;
+ #size-cells = <0x01>;
+ phandle = <0x100>;
+
+ usb2-phy@100 {
+ compatible = "rockchip,px30-usb2phy\0rockchip,rk3328-usb2phy";
+ reg = <0x100 0x10>;
+ clocks = <0x2a 0x0a>;
+ clock-names = "phyclk";
+ #clock-cells = <0x00>;
+ assigned-clocks = <0x02 0x0e 0x02 0x55>;
+ assigned-clock-parents = <0x67 0x02 0x0e>;
+ clock-output-names = "usb480m_phy";
+ status = "okay";
+ phandle = <0x67>;
+
+ host-port {
+ #phy-cells = <0x00>;
+ interrupts = <0x00 0x44 0x04>;
+ interrupt-names = "linestate";
+ status = "okay";
+ phandle = <0x8c>;
+ };
+
+ otg-port {
+ #phy-cells = <0x00>;
+ interrupts = <0x00 0x42 0x04 0x00 0x41 0x04 0x00 0x40 0x04>;
+ interrupt-names = "otg-bvalid\0otg-id\0linestate";
+ status = "disabled";
+ phandle = <0x8b>;
+ };
+ };
+ };
+
+ video-phy@ff2e0000 {
+ compatible = "rockchip,px30-video-phy";
+ reg = <0x00 0xff2e0000 0x00 0x10000 0x00 0xff450000 0x00 0x10000>;
+ clocks = <0x2a 0x0b 0x02 0x145 0x02 0x144>;
+ clock-names = "ref\0pclk_phy\0pclk_host";
+ #clock-cells = <0x00>;
+ resets = <0x02 0x3e>;
+ reset-names = "rst";
+ power-domains = <0x8a 0x0c>;
+ #phy-cells = <0x00>;
+ status = "okay";
+ phandle = <0x4c>;
+ };
+
+ mipi-dphy-rx0@ff2f0000 {
+ compatible = "rockchip,rk3326-mipi-dphy";
+ reg = <0x00 0xff2f0000 0x00 0x4000>;
+ clocks = <0x02 0x146>;
+ clock-names = "dphy-ref";
+ power-domains = <0x8a 0x0d>;
+ rockchip,grf = <0x2f>;
+ status = "okay";
+ phandle = <0x101>;
+ };
+
+ usb@ff300000 {
+ compatible = "rockchip,px30-usb\0rockchip,rk3066-usb\0snps,dwc2";
+ reg = <0x00 0xff300000 0x00 0x40000>;
+ interrupts = <0x00 0x3e 0x04>;
+ clocks = <0x02 0x102>;
+ clock-names = "otg";
+ power-domains = <0x8a 0x05>;
+ dr_mode = "otg";
+ g-np-tx-fifo-size = <0x10>;
+ g-rx-fifo-size = <0x118>;
+ g-tx-fifo-size = <0x100 0x80 0x80 0x40 0x20 0x10>;
+ g-use-dma;
+ phys = <0x8b>;
+ phy-names = "usb2-phy";
+ status = "okay";
+ phandle = <0x102>;
+ };
+
+ usb@ff340000 {
+ compatible = "generic-ehci";
+ reg = <0x00 0xff340000 0x00 0x10000>;
+ interrupts = <0x00 0x3c 0x04>;
+ clocks = <0x02 0x103 0x67>;
+ clock-names = "usbhost\0utmi";
+ power-domains = <0x8a 0x05>;
+ phys = <0x8c>;
+ phy-names = "usb";
+ status = "disabled";
+ phandle = <0x103>;
+ };
+
+ usb@ff350000 {
+ compatible = "generic-ohci";
+ reg = <0x00 0xff350000 0x00 0x10000>;
+ interrupts = <0x00 0x3d 0x04>;
+ clocks = <0x02 0x103 0x67>;
+ clock-names = "usbhost\0utmi";
+ power-domains = <0x8a 0x05>;
+ phys = <0x8c>;
+ phy-names = "usb";
+ status = "disabled";
+ phandle = <0x104>;
+ };
+
+ ethernet@ff360000 {
+ compatible = "rockchip,px30-gmac";
+ reg = <0x00 0xff360000 0x00 0x10000>;
+ rockchip,grf = <0x2f>;
+ interrupts = <0x00 0x2b 0x04>;
+ interrupt-names = "macirq";
+ clocks = <0x02 0x3e 0x02 0x3f 0x02 0x3f 0x02 0x40 0x02 0x41 0x02 0xb2 0x02 0x143 0x02 0x4c>;
+ clock-names = "stmmaceth\0mac_clk_rx\0mac_clk_tx\0clk_mac_ref\0clk_mac_refout\0aclk_mac\0pclk_mac\0clk_mac_speed";
+ phy-mode = "rmii";
+ pinctrl-names = "default";
+ pinctrl-0 = <0x8d 0x8e>;
+ resets = <0x02 0x5e>;
+ reset-names = "stmmaceth";
+ power-domains = <0x8a 0x09>;
+ status = "disabled";
+ phandle = <0x105>;
+ };
+
+ dwmmc@ff370000 {
+ compatible = "rockchip,px30-dw-mshc\0rockchip,rk3288-dw-mshc";
+ reg = <0x00 0xff370000 0x00 0x4000>;
+ max-frequency = <0x8f0d180>;
+ clocks = <0x02 0xf7 0x02 0x3b 0x02 0x43 0x02 0x44>;
+ clock-names = "biu\0ciu\0ciu-drv\0ciu-sample";
+ assigned-clocks = <0x02 0x3b>;
+ assigned-clock-parents = <0x02 0x57>;
+ power-domains = <0x8a 0x07>;
+ fifo-depth = <0x100>;
+ interrupts = <0x00 0x36 0x04>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x8f 0x90 0x91 0x92>;
+ status = "okay";
+ bus-width = <0x04>;
+ cap-mmc-highspeed;
+ cap-sd-highspeed;
+ supports-sd;
+ card-detect-delay = <0x320>;
+ ignore-pm-notify;
+ cd-gpios = <0x5c 0x03 0x01>;
+ sd-uhs-sdr12;
+ sd-uhs-sdr25;
+ sd-uhs-sdr50;
+ sd-uhs-sdr104;
+ vqmmc-supply = <0x4a>;
+ vmmc-supply = <0x93>;
+ phandle = <0x106>;
+ };
+
+ dwmmc@ff380000 {
+ compatible = "rockchip,px30-dw-mshc\0rockchip,rk3288-dw-mshc";
+ reg = <0x00 0xff380000 0x00 0x4000>;
+ max-frequency = <0x8f0d180>;
+ clocks = <0x02 0xff 0x02 0x38 0x02 0x45 0x02 0x46>;
+ clock-names = "biu\0ciu\0ciu-drv\0ciu-sample";
+ assigned-clocks = <0x02 0x38>;
+ assigned-clock-parents = <0x02 0x51>;
+ power-domains = <0x8a 0x0a>;
+ fifo-depth = <0x100>;
+ interrupts = <0x00 0x37 0x04>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x94 0x95 0x96>;
+ status = "okay";
+ bus-width = <0x04>;
+ cap-mmc-highspeed;
+ cap-sd-highspeed;
+ supports-sd;
+ card-detect-delay = <0x320>;
+ ignore-pm-notify;
+ cd-gpios = <0x97 0x0e 0x01>;
+ sd-uhs-sdr12;
+ sd-uhs-sdr25;
+ sd-uhs-sdr50;
+ sd-uhs-sdr104;
+ vqmmc-supply = <0x4a>;
+ vmmc-supply = <0x93>;
+ phandle = <0x107>;
+ };
+
+ dwmmc@ff390000 {
+ compatible = "rockchip,px30-dw-mshc\0rockchip,rk3288-dw-mshc";
+ reg = <0x00 0xff390000 0x00 0x4000>;
+ max-frequency = <0x8f0d180>;
+ clocks = <0x02 0x100 0x02 0x39 0x02 0x47 0x02 0x48>;
+ clock-names = "biu\0ciu\0ciu-drv\0ciu-sample";
+ assigned-clocks = <0x02 0x39>;
+ assigned-clock-parents = <0x02 0x53>;
+ power-domains = <0x8a 0x0a>;
+ fifo-depth = <0x100>;
+ interrupts = <0x00 0x35 0x04>;
+ status = "disabled";
+ phandle = <0x108>;
+ };
+
+ nandc@ff3b0000 {
+ compatible = "rockchip,rk-nandc";
+ reg = <0x00 0xff3b0000 0x00 0x4000>;
+ interrupts = <0x00 0x39 0x04>;
+ nandc_id = <0x00>;
+ clocks = <0x02 0x37 0x02 0xfe>;
+ clock-names = "clk_nandc\0hclk_nandc";
+ assigned-clocks = <0x02 0x37>;
+ assigned-clock-parents = <0x02 0x4f>;
+ power-domains = <0x8a 0x0a>;
+ status = "disabled";
+ phandle = <0x109>;
+ };
+
+ sfc@ff3a0000 {
+ compatible = "rockchip,sfc";
+ reg = <0x00 0xff3a0000 0x00 0x4000>;
+ interrupts = <0x00 0x38 0x04>;
+ clocks = <0x02 0x3a 0x02 0x101>;
+ clock-names = "clk_sfc\0hclk_sfc";
+ assigned-clocks = <0x02 0x3a>;
+ assigned-clock-rates = <0x989680>;
+ status = "disabled";
+ phandle = <0x10a>;
+ };
+
+ gpu@ff400000 {
+ compatible = "arm,malit602\0arm,malit60x\0arm,malit6xx\0arm,mali-midgard";
+ reg = <0x00 0xff400000 0x00 0x4000>;
+ interrupts = <0x00 0x2d 0x04 0x00 0x2e 0x04 0x00 0x2f 0x04>;
+ interrupt-names = "GPU\0MMU\0JOB";
+ clocks = <0x02 0x49>;
+ clock-names = "clk_mali";
+ power-domains = <0x8a 0x0e>;
+ #cooling-cells = <0x02>;
+ operating-points-v2 = <0x98>;
+ status = "okay";
+ mali-supply = <0x0e>;
+ phandle = <0x85>;
+
+ power_model {
+ compatible = "arm,mali-simple-power-model";
+ static-coefficient = <0x64578>;
+ dynamic-coefficient = <0x2dd>;
+ ts = <0x7d00 0x125c 0xffffffb0 0x02>;
+ thermal-zone = "gpu-thermal";
+ };
+ };
+
+ gpu-opp-table {
+ compatible = "operating-points-v2";
+ rockchip,thermal-zone = "soc-thermal";
+ rockchip,temp-hysteresis = <0x1388>;
+ rockchip,low-temp = <0x00>;
+ rockchip,low-temp-min-volt = <0xf4240>;
+ rockchip,low-temp-adjust-volt = <0x00 0x1e0 0xc350>;
+ rockchip,max-volt = <0x11edd8>;
+ rockchip,evb-irdrop = <0x61a8>;
+ rockchip,pvtm-voltage-sel = <0x00 0xc350 0x00 0xc351 0xd2f0 0x01 0xd2f1 0xea60 0x02 0xea61 0x1869f 0x03>;
+ rockchip,pvtm-ch = <0x00 0x00>;
+ phandle = <0x98>;
+
+ opp-400000000 {
+ opp-hz = <0x00 0x17d78400>;
+ opp-microvolt = <0x100590>;
+ opp-microvolt-L0 = <0x100590>;
+ opp-microvolt-L1 = <0xfa3e8>;
+ opp-microvolt-L2 = <0xee098>;
+ opp-microvolt-L3 = <0xe7ef0>;
+ };
+
+ opp-480000000 {
+ opp-hz = <0x00 0x1c9c3800>;
+ opp-microvolt = <0x112a88>;
+ opp-microvolt-L0 = <0x112a88>;
+ opp-microvolt-L1 = <0x10c8e0>;
+ opp-microvolt-L2 = <0x100590>;
+ opp-microvolt-L3 = <0xf4240>;
+ };
+
+ opp-520000000 {
+ opp-hz = <0x00 0x1efe9200>;
+ opp-microvolt = <0x118c30>;
+ opp-microvolt-L0 = <0x118c30>;
+ opp-microvolt-L1 = <0x118c30>;
+ opp-microvolt-L2 = <0x10c8e0>;
+ opp-microvolt-L3 = <0x100590>;
+ };
+ };
+
+ hevc_service@ff440000 {
+ compatible = "rockchip,hevc_sub";
+ iommu_enabled = <0x01>;
+ reg = <0x00 0xff440000 0x00 0x400>;
+ interrupts = <0x00 0x31 0x04>;
+ interrupt-names = "irq_dec";
+ dev_mode = <0x01>;
+ iommus = <0x99>;
+ allocator = <0x01>;
+ phandle = <0x9c>;
+ };
+
+ vpu_service@ff442000 {
+ compatible = "rockchip,vpu_sub";
+ iommu_enabled = <0x01>;
+ reg = <0x00 0xff442000 0x00 0x800>;
+ interrupts = <0x00 0x50 0x04 0x00 0x4f 0x04>;
+ interrupt-names = "irq_enc\0irq_dec";
+ dev_mode = <0x00>;
+ iommus = <0x9a>;
+ allocator = <0x01>;
+ phandle = <0x9b>;
+ };
+
+ vpu_combo {
+ compatible = "rockchip,vpu_combo";
+ subcnt = <0x02>;
+ rockchip,grf = <0x2f>;
+ rockchip,sub = <0x9b 0x9c>;
+ clocks = <0x02 0xaf 0x02 0xf4 0x02 0x4b>;
+ clock-names = "aclk_vcodec\0hclk_vcodec\0clk_core";
+ resets = <0x02 0x24 0x02 0x26 0x02 0x25 0x02 0x27 0x02 0x3f>;
+ reset-names = "video_a\0video_h\0niu_a\0niu_h\0video_core";
+ power-domains = <0x8a 0x0b>;
+ mode_bit = <0x0f>;
+ mode_ctrl = <0x410>;
+ status = "okay";
+ phandle = <0x10b>;
+ };
+
+ iommu@ff440440 {
+ compatible = "rockchip,iommu";
+ reg = <0x00 0xff440440 0x00 0x40 0x00 0xff440480 0x00 0x40>;
+ interrupts = <0x00 0x32 0x04>;
+ interrupt-names = "hevc_mmu";
+ clocks = <0x02 0xaf 0x02 0xf4>;
+ clock-names = "aclk\0hclk";
+ power-domains = <0x8a 0x0b>;
+ #iommu-cells = <0x00>;
+ phandle = <0x99>;
+ };
+
+ iommu@ff442800 {
+ compatible = "rockchip,iommu";
+ reg = <0x00 0xff442800 0x00 0x100>;
+ interrupts = <0x00 0x51 0x04>;
+ interrupt-names = "vpu_mmu";
+ clocks = <0x02 0xaf 0x02 0xf4>;
+ clock-names = "aclk\0hclk";
+ power-domains = <0x8a 0x0b>;
+ #iommu-cells = <0x00>;
+ phandle = <0x9a>;
+ };
+
+ dsi@ff450000 {
+ compatible = "rockchip,px30-mipi-dsi";
+ reg = <0x00 0xff450000 0x00 0x10000>;
+ interrupts = <0x00 0x4b 0x04>;
+ clocks = <0x02 0x144 0x4c>;
+ clock-names = "pclk\0hs_clk";
+ resets = <0x02 0x3d>;
+ reset-names = "apb";
+ phys = <0x4c>;
+ phy-names = "mipi_dphy";
+ power-domains = <0x8a 0x0c>;
+ rockchip,grf = <0x2f>;
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+ status = "okay";
+ phandle = <0x10c>;
+
+ ports {
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+
+ port@0 {
+ reg = <0x00>;
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+
+ endpoint@0 {
+ reg = <0x00>;
+ remote-endpoint = <0x13>;
+ status = "okay";
+ phandle = <0xa3>;
+ };
+ };
+ };
+
+ panel@0 {
+ compatible = "elida,kd35t133\0simple-panel-dsi";
+ reg = <0x00>;
+ backlight = <0x9d>;
+ backlight-supply = <0x9e>;
+ power-supply = <0x9f>;
+ reset-gpios = <0x97 0x10 0x01>;
+ reset-delay-ms = <0x96>;
+ init-delay-ms = <0x14>;
+ enable-delay-ms = <0x78>;
+ prepare-delay-ms = <0x14>;
+ unprepare-delay-ms = <0x14>;
+ disable-delay-ms = <0x32>;
+ width-mm = <0x34>;
+ height-mm = <0x46>;
+ dsi,flags = <0xa03>;
+ dsi,format = <0x00>;
+ dsi,lanes = <0x04>;
+ panel-init-sequence = [15 00 02 ff 30 15 00 02 ff 52 15 00 02 ff 01 15 00 02 e3 00 15 00 02 25 10 15 00 02 28 6f 15 00 02 29 01 15 00 02 2a df 15 00 02 2c 22 15 00 02 c3 0f 15 00 02 37 9c 15 00 02 38 a7 15 00 02 39 41 15 00 02 80 20 15 00 02 91 67 15 00 02 92 67 15 00 02 a0 55 15 00 02 a1 50 15 00 02 a3 58 15 00 02 a4 9c 15 00 02 a7 02 15 00 02 a8 01 15 00 02 a9 21 15 00 02 aa fc 15 00 02 ab 28 15 00 02 ac 06 15 00 02 ad 06 15 00 02 ae 06 15 00 02 af 03 15 00 02 b0 08 15 00 02 b1 26 15 00 02 b2 28 15 00 02 b3 28 15 00 02 b4 03 15 00 02 b5 08 15 00 02 b6 26 15 00 02 b7 08 15 00 02 b8 26 15 00 02 2c 22 15 00 02 5c 40 15 00 02 c0 00 15 00 02 c1 00 15 00 02 c2 00 15 00 02 ff 30 15 00 02 ff 52 15 00 02 ff 02 15 00 02 b0 02 15 00 02 d0 02 15 00 02 b1 0f 15 00 02 d1 10 15 00 02 b2 11 15 00 02 d2 12 15 00 02 b3 32 15 00 02 d3 33 15 00 02 b4 36 15 00 02 d4 36 15 00 02 b5 3c 15 00 02 d5 3c 15 00 02 b6 20 15 00 02 d6 20 15 00 02 b7 3e 15 00 02 d7 3e 15 00 02 b8 0e 15 00 02 d8 0d 15 00 02 b9 05 15 00 02 d9 05 15 00 02 ba 11 15 00 02 da 12 15 00 02 bb 11 15 00 02 db 11 15 00 02 bc 13 15 00 02 dc 14 15 00 02 bd 14 15 00 02 dd 14 15 00 02 be 16 15 00 02 de 18 15 00 02 bf 0e 15 00 02 df 0f 15 00 02 c0 17 15 00 02 e0 17 15 00 02 c1 07 15 00 02 e1 08 15 00 02 ff 30 15 00 02 ff 52 15 00 02 ff 03 15 00 02 08 8a 15 00 02 09 8b 15 00 02 30 00 15 00 02 31 00 15 00 02 32 00 15 00 02 33 00 15 00 02 34 61 15 00 02 35 d4 15 00 02 36 24 15 00 02 37 03 15 00 02 40 86 15 00 02 41 87 15 00 02 42 84 15 00 02 43 85 15 00 02 44 11 15 00 02 45 de 15 00 02 46 dd 15 00 02 47 11 15 00 02 48 e0 15 00 02 49 df 15 00 02 50 82 15 00 02 51 83 15 00 02 52 80 15 00 02 53 81 15 00 02 54 11 15 00 02 55 e2 15 00 02 56 e1 15 00 02 57 11 15 00 02 58 e4 15 00 02 59 e3 15 00 02 82 0f 15 00 02 83 0f 15 00 02 84 00 15 00 02 85 0f 15 00 02 86 0f 15 00 02 87 0e 15 00 02 88 0e 15 00 02 89 06 15 00 02 8a 06 15 00 02 8b 07 15 00 02 8c 07 15 00 02 8d 04 15 00 02 8e 04 15 00 02 8f 05 15 00 02 90 05 15 00 02 98 0f 15 00 02 99 0f 15 00 02 9a 00 15 00 02 9b 0f 15 00 02 9c 0f 15 00 02 9d 0e 15 00 02 9e 0e 15 00 02 9f 06 15 00 02 a0 06 15 00 02 a1 07 15 00 02 a2 07 15 00 02 a3 04 15 00 02 a4 04 15 00 02 a5 05 15 00 02 a6 05 15 00 02 e0 02 15 00 02 e1 52 15 00 02 ff 30 15 00 02 ff 52 15 00 02 ff 00 15 00 02 36 02 15 00 02 11 00 15 00 02 29 00 05 c8 01 11 05 14 01 29];
+ panel-exit-sequence = <0x5140128 0x50a0110>;
+
+ display-timings {
+ native-mode = <0xa0>;
+
+ 60Hz {
+ clock-frequency = <0x1ba8140>;
+ hactive = <0x280>;
+ vactive = <0x1e0>;
+ hfront-porch = <0x2e>;
+ hsync-len = <0x02>;
+ hback-porch = <0x2c>;
+ vfront-porch = <0xa5>;
+ vsync-len = <0x02>;
+ vback-porch = <0x0e>;
+ hsync-active = <0x00>;
+ vsync-active = <0x00>;
+ de-active = <0x00>;
+ pixelclk-active = <0x01>;
+ phandle = <0xaa1>;
+ };
+
+ 50Hz {
+ clock-frequency = <0x1ba8140>;
+ hactive = <0x280>;
+ vactive = <0x1e0>;
+ hfront-porch = <0x2e>;
+ hsync-len = <0x02>;
+ hback-porch = <0x2c>;
+ vfront-porch = <0x10>;
+ vsync-len = <0x02>;
+ vback-porch = <0x0e>;
+ hsync-active = <0x00>;
+ vsync-active = <0x00>;
+ de-active = <0x00>;
+ pixelclk-active = <0x01>;
+ phandle = <0xa00>;
+ };
+
+ 75Hz {
+ clock-frequency = <0x1ba8140>;
+ hactive = <0x280>;
+ vactive = <0x1e0>;
+ hfront-porch = <0x2e>;
+ hsync-len = <0x02>;
+ hback-porch = <0x2c>;
+ vfront-porch = <0x10>;
+ vsync-len = <0x02>;
+ vback-porch = <0x0e>;
+ hsync-active = <0x00>;
+ vsync-active = <0x00>;
+ de-active = <0x00>;
+ pixelclk-active = <0x01>;
+ phandle = <0xa01>;
+ };
+ };
+ };
+ };
+
+ vop@ff460000 {
+ compatible = "rockchip,px30-vop-big";
+ reg = <0x00 0xff460000 0x00 0x1fc 0x00 0xff460a00 0x00 0x400>;
+ rockchip,grf = <0x2f>;
+ reg-names = "regs\0gamma_lut";
+ interrupts = <0x00 0x4d 0x04>;
+ clocks = <0x02 0xb5 0x02 0x96 0x02 0xfb>;
+ clock-names = "aclk_vop\0dclk_vop\0hclk_vop";
+ power-domains = <0x8a 0x0c>;
+ iommus = <0xa1>;
+ status = "okay";
+ phandle = <0x10f>;
+
+ port {
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+ phandle = <0x10>;
+
+ endpoint@0 {
+ reg = <0x00>;
+ remote-endpoint = <0xa2>;
+ phandle = <0x12>;
+ };
+
+ endpoint@1 {
+ reg = <0x01>;
+ remote-endpoint = <0xa3>;
+ phandle = <0x13>;
+ };
+
+ endpoint@2 {
+ reg = <0x02>;
+ remote-endpoint = <0xa4>;
+ phandle = <0x14>;
+ };
+ };
+ };
+
+ iommu@ff460f00 {
+ compatible = "rockchip,iommu";
+ reg = <0x00 0xff460f00 0x00 0x100>;
+ interrupts = <0x00 0x4d 0x04>;
+ interrupt-names = "vopb_mmu";
+ clocks = <0x02 0xb5 0x02 0xfb>;
+ clock-names = "aclk\0hclk";
+ power-domains = <0x8a 0x0c>;
+ #iommu-cells = <0x00>;
+ status = "okay";
+ phandle = <0xa1>;
+ };
+
+ rk_rga@ff480000 {
+ compatible = "rockchip,rga2";
+ reg = <0x00 0xff480000 0x00 0x1000>;
+ interrupts = <0x00 0x4c 0x04>;
+ clocks = <0x02 0xb7 0x02 0xfd 0x02 0x35>;
+ clock-names = "aclk_rga\0hclk_rga\0clk_rga";
+ power-domains = <0x8a 0x0c>;
+ dma-coherent;
+ status = "okay";
+ phandle = <0x110>;
+ };
+
+ cif@ff490000 {
+ compatible = "rockchip,cif";
+ reg = <0x00 0xff490000 0x00 0x200>;
+ interrupts = <0x00 0x45 0x04>;
+ clocks = <0x02 0xb3 0x02 0xf9 0x02 0x160 0x02 0x34>;
+ clock-names = "aclk_cif0\0hclk_cif0\0pclk_cif\0cif0_out";
+ resets = <0x02 0x2c 0x02 0x2d 0x02 0x2e>;
+ reset-names = "rst_cif_a\0rst_cif_h\0rst_cif_pclkin";
+ power-domains = <0x8a 0x0d>;
+ pinctrl-names = "cif_pin_all";
+ pinctrl-0 = <0xa5>;
+ iommus = <0xa6>;
+ status = "disabled";
+ phandle = <0x111>;
+ };
+
+ cif-new@ff490000 {
+ compatible = "rockchip,px30-cif";
+ reg = <0x00 0xff490000 0x00 0x200>;
+ interrupts = <0x00 0x45 0x04>;
+ clocks = <0x02 0xb3 0x02 0xf9 0x02 0x160 0x02 0x34>;
+ clock-names = "aclk_cif\0hclk_cif\0pclk_cif\0cif_out";
+ resets = <0x02 0x2c 0x02 0x2d 0x02 0x2e>;
+ reset-names = "rst_cif_a\0rst_cif_h\0rst_cif_pclkin";
+ power-domains = <0x8a 0x0d>;
+ iommus = <0xa6>;
+ status = "disabled";
+ phandle = <0x112>;
+ };
+
+ iommu@ff490800 {
+ compatible = "rockchip,iommu";
+ reg = <0x00 0xff490800 0x00 0x100>;
+ interrupts = <0x00 0x45 0x04>;
+ interrupt-names = "vip_mmu";
+ clocks = <0x02 0xb3 0x02 0xf9>;
+ clock-names = "aclk\0hclk";
+ power-domains = <0x8a 0x0d>;
+ rk_iommu,disable_reset_quirk;
+ #iommu-cells = <0x00>;
+ status = "okay";
+ phandle = <0xa6>;
+ };
+
+ rk_isp@ff4a0000 {
+ compatible = "rockchip,px30-isp\0rockchip,isp";
+ reg = <0x00 0xff4a0000 0x00 0x8000>;
+ interrupts = <0x00 0x46 0x04>;
+ clocks = <0x02 0xb4 0x02 0xfa 0x02 0x33 0x02 0x33 0x02 0x15f 0x02 0x34 0x02 0x34 0x02 0x146>;
+ clock-names = "aclk_isp\0hclk_isp\0clk_isp\0clk_isp_jpe\0pclkin_isp\0clk_cif_pll\0clk_cif_out\0pclk_dphyrx";
+ resets = <0x02 0x2b 0x02 0x2f>;
+ reset-names = "rst_isp\0rst_mipicsiphy";
+ power-domains = <0x8a 0x0d>;
+ pinctrl-names = "default\0isp_dvp8bit2\0isp_dvp10bit\0isp_dvp12bit";
+ pinctrl-0 = <0xa7>;
+ pinctrl-1 = <0xa5>;
+ pinctrl-2 = <0xa5 0xa8>;
+ pinctrl-3 = <0xa9 0xa5 0xa8>;
+ rockchip,isp,mipiphy = <0x01>;
+ rockchip,isp,csiphy,reg = <0xff2f0000 0x4000>;
+ rockchip,grf = <0x2f>;
+ rockchip,cru = <0x02>;
+ rockchip,isp,iommu-enable = <0x01>;
+ iommus = <0xaa>;
+ status = "disabled";
+ phandle = <0x113>;
+ };
+
+ rkisp1@ff4a0000 {
+ compatible = "rockchip,rk3326-rkisp1";
+ reg = <0x00 0xff4a0000 0x00 0x8000>;
+ interrupts = <0x00 0x46 0x04 0x00 0x49 0x04 0x00 0x4a 0x04>;
+ interrupt-names = "isp_irq\0mi_irq\0mipi_irq";
+ clocks = <0x02 0xb4 0x02 0xfa 0x02 0x33 0x02 0x15f>;
+ clock-names = "aclk_isp\0hclk_isp\0clk_isp\0pclk_isp";
+ devfreq = <0xab>;
+ power-domains = <0x8a 0x0d>;
+ iommus = <0xaa>;
+ rockchip,grf = <0x2f>;
+ status = "okay";
+ phandle = <0x114>;
+ };
+
+ iommu@ff4a8000 {
+ compatible = "rockchip,iommu";
+ reg = <0x00 0xff4a8000 0x00 0x100>;
+ interrupts = <0x00 0x46 0x04>;
+ interrupt-names = "isp_mmu";
+ clocks = <0x02 0xb4 0x02 0xfa>;
+ clock-names = "aclk\0hclk";
+ power-domains = <0x8a 0x0d>;
+ rk_iommu,disable_reset_quirk;
+ #iommu-cells = <0x00>;
+ status = "okay";
+ phandle = <0xaa>;
+ };
+
+ qos@ff518000 {
+ compatible = "syscon";
+ reg = <0x00 0xff518000 0x00 0x20>;
+ phandle = <0x18>;
+ };
+
+ qos@ff520000 {
+ compatible = "syscon";
+ reg = <0x00 0xff520000 0x00 0x20>;
+ phandle = <0x28>;
+ };
+
+ qos@ff52c000 {
+ compatible = "syscon";
+ reg = <0x00 0xff52c000 0x00 0x20>;
+ phandle = <0x17>;
+ };
+
+ qos@ff538000 {
+ compatible = "syscon";
+ reg = <0x00 0xff538000 0x00 0x20>;
+ phandle = <0x19>;
+ };
+
+ qos@ff538080 {
+ compatible = "syscon";
+ reg = <0x00 0xff538080 0x00 0x20>;
+ phandle = <0x1a>;
+ };
+
+ qos@ff538100 {
+ compatible = "syscon";
+ reg = <0x00 0xff538100 0x00 0x20>;
+ phandle = <0x1b>;
+ };
+
+ qos@ff538180 {
+ compatible = "syscon";
+ reg = <0x00 0xff538180 0x00 0x20>;
+ phandle = <0x1c>;
+ };
+
+ qos@ff540000 {
+ compatible = "syscon";
+ reg = <0x00 0xff540000 0x00 0x20>;
+ phandle = <0x15>;
+ };
+
+ qos@ff540080 {
+ compatible = "syscon";
+ reg = <0x00 0xff540080 0x00 0x20>;
+ phandle = <0x16>;
+ };
+
+ qos@ff548000 {
+ compatible = "syscon";
+ reg = <0x00 0xff548000 0x00 0x20>;
+ phandle = <0x23>;
+ };
+
+ qos@ff548080 {
+ compatible = "syscon";
+ reg = <0x00 0xff548080 0x00 0x20>;
+ phandle = <0x24>;
+ };
+
+ qos@ff548100 {
+ compatible = "syscon";
+ reg = <0x00 0xff548100 0x00 0x20>;
+ phandle = <0x25>;
+ };
+
+ qos@ff548180 {
+ compatible = "syscon";
+ reg = <0x00 0xff548180 0x00 0x20>;
+ phandle = <0x26>;
+ };
+
+ qos@ff548200 {
+ compatible = "syscon";
+ reg = <0x00 0xff548200 0x00 0x20>;
+ phandle = <0x27>;
+ };
+
+ qos@ff550000 {
+ compatible = "syscon";
+ reg = <0x00 0xff550000 0x00 0x20>;
+ phandle = <0x1f>;
+ };
+
+ qos@ff550080 {
+ compatible = "syscon";
+ reg = <0x00 0xff550080 0x00 0x20>;
+ phandle = <0x20>;
+ };
+
+ qos@ff550100 {
+ compatible = "syscon";
+ reg = <0x00 0xff550100 0x00 0x20>;
+ phandle = <0x21>;
+ };
+
+ qos@ff550180 {
+ compatible = "syscon";
+ reg = <0x00 0xff550180 0x00 0x20>;
+ phandle = <0x22>;
+ };
+
+ qos@ff558000 {
+ compatible = "syscon";
+ reg = <0x00 0xff558000 0x00 0x20>;
+ phandle = <0x1d>;
+ };
+
+ qos@ff558080 {
+ compatible = "syscon";
+ reg = <0x00 0xff558080 0x00 0x20>;
+ phandle = <0x1e>;
+ };
+
+ dfi@ff610000 {
+ reg = <0x00 0xff610000 0x00 0x400>;
+ compatible = "rockchip,px30-dfi";
+ rockchip,pmugrf = <0xac>;
+ status = "okay";
+ phandle = <0xad>;
+ };
+
+ dmc {
+ compatible = "rockchip,px30-dmc";
+ interrupts = <0x00 0x69 0x04>;
+ interrupt-names = "complete_irq";
+ devfreq-events = <0xad>;
+ clocks = <0x02 0x54>;
+ clock-names = "dmc_clk";
+ operating-points-v2 = <0xae>;
+ ddr_timing = <0xaf>;
+ upthreshold = <0x28>;
+ downdifferential = <0x14>;
+ system-status-freq = <0x01 0x80e80 0x08 0x6ddd0 0x02 0x2f5d0 0x20 0x6ddd0 0x1000 0x80e80 0x4000 0xa2990 0x2000 0xa2990>;
+ auto-min-freq = <0x50140>;
+ auto-freq-en = <0x01>;
+ #cooling-cells = <0x02>;
+ status = "okay";
+ center-supply = <0x0e>;
+ phandle = <0xab>;
+
+ ddr_power_model {
+ compatible = "ddr_power_model";
+ dynamic-power-coefficient = <0x78>;
+ static-power-coefficient = <0xc8>;
+ ts = <0x7d00 0x125c 0xffffffb0 0x02>;
+ thermal-zone = "soc-thermal";
+ phandle = <0x115>;
+ };
+ };
+
+ dmc-opp-table {
+ compatible = "operating-points-v2";
+ rockchip,max-volt = <0x118c30>;
+ rockchip,evb-irdrop = <0x61a8>;
+ rockchip,pvtm-voltage-sel = <0x00 0xc350 0x00 0xc351 0xd2f0 0x01 0xd2f1 0xea60 0x02 0xea61 0x1869f 0x03>;
+ rockchip,pvtm-ch = <0x00 0x00>;
+ phandle = <0xae>;
+
+ opp-528000000 {
+ opp-hz = <0x00 0x1f78a400>;
+ opp-microvolt = <0xee098>;
+ opp-microvolt-L0 = <0xee098>;
+ opp-microvolt-L1 = <0xee098>;
+ opp-microvolt-L2 = <0xe7ef0>;
+ opp-microvolt-L3 = <0xe7ef0>;
+ };
+
+ opp-666000000 {
+ opp-hz = <0x00 0x27b25a80>;
+ opp-microvolt = <0x100590>;
+ opp-microvolt-L0 = <0x100590>;
+ opp-microvolt-L1 = <0xf4240>;
+ opp-microvolt-L2 = <0xee098>;
+ opp-microvolt-L3 = <0xe7ef0>;
+ };
+
+ opp-786000000 {
+ opp-hz = <0x00 0x2ed96880>;
+ opp-microvolt = <0x10c8e0>;
+ opp-microvolt-L0 = <0x10c8e0>;
+ opp-microvolt-L1 = <0x100590>;
+ opp-microvolt-L2 = <0xfa3e8>;
+ opp-microvolt-L3 = <0xf4240>;
+ status = "okay";
+ };
+ };
+
+ rockchip-system-monitor {
+ compatible = "rockchip,system-monitor";
+ rockchip,thermal-zone = "soc-thermal";
+ rockchip,polling-delay = <0xc8>;
+ phandle = <0x116>;
+ };
+
+ pinctrl {
+ compatible = "rockchip,px30-pinctrl";
+ rockchip,grf = <0x2f>;
+ rockchip,pmu = <0xac>;
+ #address-cells = <0x02>;
+ #size-cells = <0x02>;
+ ranges;
+ phandle = <0x117>;
+
+ gpio0@ff040000 {
+ compatible = "rockchip,gpio-bank";
+ reg = <0x00 0xff040000 0x00 0x100>;
+ interrupts = <0x00 0x03 0x04>;
+ clocks = <0x2a 0x14>;
+ gpio-controller;
+ #gpio-cells = <0x02>;
+ interrupt-controller;
+ #interrupt-cells = <0x02>;
+ phandle = <0x5c>;
+
+ pwm0_hold_low {
+ gpio-hog;
+ gpios = <0x0f 0x00>;
+ output-low;
+ line-name = "rumble_en_hold_low";
+ };
+ };
+
+ gpio1@ff250000 {
+ compatible = "rockchip,gpio-bank";
+ reg = <0x00 0xff250000 0x00 0x100>;
+ interrupts = <0x00 0x04 0x04>;
+ clocks = <0x02 0x15c>;
+ gpio-controller;
+ #gpio-cells = <0x02>;
+ interrupt-controller;
+ #interrupt-cells = <0x02>;
+ phandle = <0xbf>;
+ };
+
+ gpio2@ff260000 {
+ compatible = "rockchip,gpio-bank";
+ reg = <0x00 0xff260000 0x00 0x100>;
+ interrupts = <0x00 0x05 0x04>;
+ clocks = <0x02 0x15d>;
+ gpio-controller;
+ #gpio-cells = <0x02>;
+ interrupt-controller;
+ #interrupt-cells = <0x02>;
+ phandle = <0x66>;
+ };
+
+ gpio3@ff270000 {
+ compatible = "rockchip,gpio-bank";
+ reg = <0x00 0xff270000 0x00 0x100>;
+ interrupts = <0x00 0x06 0x04>;
+ clocks = <0x02 0x15e>;
+ gpio-controller;
+ #gpio-cells = <0x02>;
+ interrupt-controller;
+ #interrupt-cells = <0x02>;
+ phandle = <0x97>;
+ };
+
+ pcfg-pull-up {
+ bias-pull-up;
+ phandle = <0xb2>;
+ };
+
+ pcfg-pull-down {
+ bias-pull-down;
+ phandle = <0x118>;
+ };
+
+ pcfg-pull-none {
+ bias-disable;
+ phandle = <0xb1>;
+ };
+
+ pcfg-pull-none-2ma {
+ bias-disable;
+ drive-strength = <0x02>;
+ phandle = <0x119>;
+ };
+
+ pcfg-pull-up-2ma {
+ bias-pull-up;
+ drive-strength = <0x02>;
+ phandle = <0x11a>;
+ };
+
+ pcfg-pull-up-4ma {
+ bias-pull-up;
+ drive-strength = <0x04>;
+ phandle = <0xb3>;
+ };
+
+ pcfg-pull-none-4ma {
+ bias-disable;
+ drive-strength = <0x04>;
+ phandle = <0x11b>;
+ };
+
+ pcfg-pull-down-4ma {
+ bias-pull-down;
+ drive-strength = <0x04>;
+ phandle = <0x11c>;
+ };
+
+ pcfg-pull-none-8ma {
+ bias-disable;
+ drive-strength = <0x08>;
+ phandle = <0xb6>;
+ };
+
+ pcfg-pull-up-8ma {
+ bias-pull-up;
+ drive-strength = <0x08>;
+ phandle = <0xb4>;
+ };
+
+ pcfg-pull-none-12ma {
+ bias-disable;
+ drive-strength = <0x0c>;
+ phandle = <0xb8>;
+ };
+
+ pcfg-pull-up-12ma {
+ bias-pull-up;
+ drive-strength = <0x0c>;
+ phandle = <0xb7>;
+ };
+
+ pcfg-pull-none-smt {
+ bias-disable;
+ input-schmitt-enable;
+ phandle = <0xb0>;
+ };
+
+ pcfg-output-high {
+ output-high;
+ phandle = <0x11d>;
+ };
+
+ pcfg-output-low {
+ output-low;
+ phandle = <0xb9>;
+ };
+
+ pcfg-input-high {
+ bias-pull-up;
+ input-enable;
+ phandle = <0xb5>;
+ };
+
+ pcfg-input {
+ input-enable;
+ phandle = <0x11e>;
+ };
+
+ i2c0 {
+
+ i2c0-xfer {
+ rockchip,pins = <0x00 0x08 0x01 0xb0 0x00 0x09 0x01 0xb0>;
+ phandle = <0x5b>;
+ };
+ };
+
+ i2c1 {
+
+ i2c1-xfer {
+ rockchip,pins = <0x00 0x12 0x01 0xb0 0x00 0x13 0x01 0xb0>;
+ phandle = <0x69>;
+ };
+ };
+
+ i2c2 {
+
+ i2c2-xfer {
+ rockchip,pins = <0x02 0x0f 0x02 0xb0 0x02 0x10 0x02 0xb0>;
+ phandle = <0x6a>;
+ };
+ };
+
+ i2c3 {
+
+ i2c3-xfer {
+ rockchip,pins = <0x01 0x0c 0x04 0xb0 0x01 0x0d 0x04 0xb0>;
+ phandle = <0x6b>;
+ };
+ };
+
+ tsadc {
+
+ tsadc-otp-gpio {
+ rockchip,pins = <0x00 0x06 0x00 0xb1>;
+ phandle = <0x86>;
+ };
+
+ tsadc-otp-out {
+ rockchip,pins = <0x00 0x06 0x01 0xb1>;
+ phandle = <0x87>;
+ };
+ };
+
+ uart0 {
+
+ uart0-xfer {
+ rockchip,pins = <0x00 0x0a 0x01 0xb2 0x00 0x0b 0x01 0xb2>;
+ phandle = <0x2c>;
+ };
+
+ uart0-cts {
+ rockchip,pins = <0x00 0x0c 0x01 0xb1>;
+ phandle = <0x2d>;
+ };
+
+ uart0-rts {
+ rockchip,pins = <0x00 0x0d 0x01 0xb1>;
+ phandle = <0x2e>;
+ };
+
+ uart0-rts-gpio {
+ rockchip,pins = <0x00 0x0d 0x00 0xb1>;
+ phandle = <0x11f>;
+ };
+ };
+
+ uart1 {
+
+ uart1-xfer {
+ rockchip,pins = <0x01 0x11 0x01 0xb2 0x01 0x10 0x01 0xb2>;
+ phandle = <0x4f>;
+ };
+
+ uart1-cts {
+ rockchip,pins = <0x01 0x12 0x01 0xb1>;
+ phandle = <0x50>;
+ };
+
+ uart1-rts {
+ rockchip,pins = <0x01 0x13 0x01 0xb1>;
+ phandle = <0x120>;
+ };
+
+ uart1-rts-gpio {
+ rockchip,pins = <0x01 0x13 0x00 0xb1>;
+ phandle = <0x121>;
+ };
+ };
+
+ uart2-m0 {
+
+ uart2m0-xfer {
+ rockchip,pins = <0x01 0x1a 0x02 0xb2 0x01 0x1b 0x02 0xb2>;
+ phandle = <0x51>;
+ };
+ };
+
+ uart2-m1 {
+
+ uart2m1-xfer {
+ rockchip,pins = <0x02 0x0c 0x02 0xb2 0x02 0x0e 0x02 0xb2>;
+ phandle = <0xba>;
+ };
+ };
+
+ uart3-m0 {
+
+ uart3m0-xfer {
+ rockchip,pins = <0x00 0x10 0x02 0xb2 0x00 0x11 0x02 0xb2>;
+ phandle = <0x122>;
+ };
+
+ uart3m0-cts {
+ rockchip,pins = <0x00 0x12 0x02 0xb1>;
+ phandle = <0x123>;
+ };
+
+ uart3m0-rts {
+ rockchip,pins = <0x00 0x13 0x02 0xb1>;
+ phandle = <0x124>;
+ };
+
+ uart3m0-rts-gpio {
+ rockchip,pins = <0x00 0x13 0x00 0xb1>;
+ phandle = <0x125>;
+ };
+ };
+
+ uart3-m1 {
+
+ uart3m1-xfer {
+ rockchip,pins = <0x01 0x0e 0x02 0xb2 0x01 0x0f 0x02 0xb2>;
+ phandle = <0x52>;
+ };
+
+ uart3m1-cts {
+ rockchip,pins = <0x01 0x0c 0x02 0xb1>;
+ phandle = <0x53>;
+ };
+
+ uart3m1-rts {
+ rockchip,pins = <0x01 0x0d 0x02 0xb1>;
+ phandle = <0x54>;
+ };
+
+ uart3m1-rts-gpio {
+ rockchip,pins = <0x01 0x0d 0x00 0xb1>;
+ phandle = <0x126>;
+ };
+ };
+
+ uart4 {
+
+ uart4-xfer {
+ rockchip,pins = <0x01 0x1c 0x02 0xb2 0x01 0x1d 0x02 0xb2>;
+ phandle = <0x55>;
+ };
+
+ uart4-cts {
+ rockchip,pins = <0x01 0x1e 0x02 0xb1>;
+ phandle = <0x56>;
+ };
+
+ uart4-rts {
+ rockchip,pins = <0x01 0x1f 0x02 0xb1>;
+ phandle = <0x57>;
+ };
+ };
+
+ uart5 {
+
+ uart5-xfer {
+ rockchip,pins = <0x03 0x02 0x04 0xb2 0x03 0x01 0x04 0xb2>;
+ phandle = <0x58>;
+ };
+
+ uart5-cts {
+ rockchip,pins = <0x03 0x03 0x04 0xb1>;
+ phandle = <0x59>;
+ };
+
+ uart5-rts {
+ rockchip,pins = <0x03 0x05 0x04 0xb1>;
+ phandle = <0x5a>;
+ };
+ };
+
+ spi0 {
+
+ spi0-clk {
+ rockchip,pins = <0x01 0x0f 0x03 0xb3>;
+ phandle = <0x6c>;
+ };
+
+ spi0-csn {
+ rockchip,pins = <0x01 0x0e 0x03 0xb3>;
+ phandle = <0x6d>;
+ };
+
+ spi0-miso {
+ rockchip,pins = <0x01 0x0d 0x03 0xb3>;
+ phandle = <0x6e>;
+ };
+
+ spi0-mosi {
+ rockchip,pins = <0x01 0x0c 0x03 0xb3>;
+ phandle = <0x6f>;
+ };
+
+ spi0-clk-hs {
+ rockchip,pins = <0x01 0x0f 0x03 0xb4>;
+ phandle = <0x70>;
+ };
+
+ spi0-miso-hs {
+ rockchip,pins = <0x01 0x0d 0x03 0xb4>;
+ phandle = <0x71>;
+ };
+
+ spi0-mosi-hs {
+ rockchip,pins = <0x01 0x0c 0x03 0xb4>;
+ phandle = <0x72>;
+ };
+ };
+
+ spi1 {
+
+ spi1-clk {
+ rockchip,pins = <0x03 0x0f 0x04 0xb3>;
+ phandle = <0x73>;
+ };
+
+ spi1-csn0 {
+ rockchip,pins = <0x03 0x09 0x04 0xb3>;
+ phandle = <0x74>;
+ };
+
+ spi1-csn1 {
+ rockchip,pins = <0x03 0x0a 0x02 0xb3>;
+ phandle = <0x75>;
+ };
+
+ spi1-miso {
+ rockchip,pins = <0x03 0x0e 0x04 0xb3>;
+ phandle = <0x76>;
+ };
+
+ spi1-mosi {
+ rockchip,pins = <0x03 0x0c 0x04 0xb3>;
+ phandle = <0x77>;
+ };
+
+ spi1-clk-hs {
+ rockchip,pins = <0x03 0x0f 0x04 0xb4>;
+ phandle = <0x78>;
+ };
+
+ spi1-miso-hs {
+ rockchip,pins = <0x03 0x0e 0x04 0xb4>;
+ phandle = <0x79>;
+ };
+
+ spi1-mosi-hs {
+ rockchip,pins = <0x03 0x0c 0x04 0xb4>;
+ phandle = <0x7a>;
+ };
+ };
+
+ pdm {
+
+ pdm-clk0m0 {
+ rockchip,pins = <0x03 0x16 0x02 0xb1>;
+ phandle = <0x44>;
+ };
+
+ pdm-clk0m1 {
+ rockchip,pins = <0x02 0x16 0x01 0xb1>;
+ phandle = <0x127>;
+ };
+
+ pdm-clk1 {
+ rockchip,pins = <0x03 0x17 0x02 0xb1>;
+ phandle = <0x45>;
+ };
+
+ pdm-sdi0m0 {
+ rockchip,pins = <0x03 0x1b 0x02 0xb1>;
+ phandle = <0x46>;
+ };
+
+ pdm-sdi0m1 {
+ rockchip,pins = <0x02 0x15 0x02 0xb1>;
+ phandle = <0x128>;
+ };
+
+ pdm-sdi1 {
+ rockchip,pins = <0x03 0x18 0x02 0xb1>;
+ phandle = <0x47>;
+ };
+
+ pdm-sdi2 {
+ rockchip,pins = <0x03 0x19 0x02 0xb1>;
+ phandle = <0x48>;
+ };
+
+ pdm-sdi3 {
+ rockchip,pins = <0x03 0x1a 0x02 0xb1>;
+ phandle = <0x49>;
+ };
+
+ pdm-clk0m0-sleep {
+ rockchip,pins = <0x03 0x16 0x00 0xb5>;
+ phandle = <0x129>;
+ };
+
+ pdm-clk0m1-sleep {
+ rockchip,pins = <0x02 0x16 0x00 0xb5>;
+ phandle = <0x12a>;
+ };
+
+ pdm-clk1-sleep {
+ rockchip,pins = <0x03 0x17 0x00 0xb5>;
+ phandle = <0x12b>;
+ };
+
+ pdm-sdi0m0-sleep {
+ rockchip,pins = <0x03 0x1b 0x00 0xb5>;
+ phandle = <0x12c>;
+ };
+
+ pdm-sdi0m1-sleep {
+ rockchip,pins = <0x02 0x15 0x00 0xb5>;
+ phandle = <0x12d>;
+ };
+
+ pdm-sdi1-sleep {
+ rockchip,pins = <0x03 0x18 0x00 0xb5>;
+ phandle = <0x12e>;
+ };
+
+ pdm-sdi2-sleep {
+ rockchip,pins = <0x03 0x19 0x00 0xb5>;
+ phandle = <0x12f>;
+ };
+
+ pdm-sdi3-sleep {
+ rockchip,pins = <0x03 0x1a 0x00 0xb5>;
+ phandle = <0x130>;
+ };
+ };
+
+ i2s0 {
+
+ i2s0-8ch-mclk {
+ rockchip,pins = <0x03 0x11 0x02 0xb1>;
+ phandle = <0x131>;
+ };
+
+ i2s0-8ch-sclktx {
+ rockchip,pins = <0x03 0x13 0x02 0xb1>;
+ phandle = <0x30>;
+ };
+
+ i2s0-8ch-sclkrx {
+ rockchip,pins = <0x03 0x0c 0x02 0xb1>;
+ phandle = <0x31>;
+ };
+
+ i2s0-8ch-lrcktx {
+ rockchip,pins = <0x03 0x12 0x02 0xb1>;
+ phandle = <0x32>;
+ };
+
+ i2s0-8ch-lrckrx {
+ rockchip,pins = <0x03 0x0d 0x02 0xb1>;
+ phandle = <0x33>;
+ };
+
+ i2s0-8ch-sdo0 {
+ rockchip,pins = <0x03 0x14 0x02 0xb1>;
+ phandle = <0x38>;
+ };
+
+ i2s0-8ch-sdo1 {
+ rockchip,pins = <0x03 0x10 0x02 0xb1>;
+ phandle = <0x39>;
+ };
+
+ i2s0-8ch-sdo2 {
+ rockchip,pins = <0x03 0x0f 0x02 0xb1>;
+ phandle = <0x3a>;
+ };
+
+ i2s0-8ch-sdo3 {
+ rockchip,pins = <0x03 0x0e 0x02 0xb1>;
+ phandle = <0x3b>;
+ };
+
+ i2s0-8ch-sdi0 {
+ rockchip,pins = <0x03 0x15 0x02 0xb1>;
+ phandle = <0x34>;
+ };
+
+ i2s0-8ch-sdi1 {
+ rockchip,pins = <0x03 0x0b 0x02 0xb1>;
+ phandle = <0x35>;
+ };
+
+ i2s0-8ch-sdi2 {
+ rockchip,pins = <0x03 0x09 0x02 0xb1>;
+ phandle = <0x36>;
+ };
+
+ i2s0-8ch-sdi3 {
+ rockchip,pins = <0x03 0x08 0x02 0xb1>;
+ phandle = <0x37>;
+ };
+ };
+
+ i2s1 {
+
+ i2s1-2ch-mclk {
+ rockchip,pins = <0x02 0x13 0x01 0xb1>;
+ phandle = <0x68>;
+ };
+
+ i2s1-2ch-sclk {
+ rockchip,pins = <0x02 0x12 0x01 0xb1>;
+ phandle = <0x3c>;
+ };
+
+ i2s1-2ch-lrck {
+ rockchip,pins = <0x02 0x11 0x01 0xb1>;
+ phandle = <0x3d>;
+ };
+
+ i2s1-2ch-sdi {
+ rockchip,pins = <0x02 0x15 0x01 0xb1>;
+ phandle = <0x3e>;
+ };
+
+ i2s1-2ch-sdo {
+ rockchip,pins = <0x02 0x14 0x01 0xb1>;
+ phandle = <0x3f>;
+ };
+ };
+
+ i2s2 {
+
+ i2s2-2ch-mclk {
+ rockchip,pins = <0x03 0x01 0x02 0xb1>;
+ phandle = <0x132>;
+ };
+
+ i2s2-2ch-sclk {
+ rockchip,pins = <0x03 0x02 0x02 0xb1>;
+ phandle = <0x40>;
+ };
+
+ i2s2-2ch-lrck {
+ rockchip,pins = <0x03 0x03 0x02 0xb1>;
+ phandle = <0x41>;
+ };
+
+ i2s2-2ch-sdi {
+ rockchip,pins = <0x03 0x05 0x02 0xb1>;
+ phandle = <0x42>;
+ };
+
+ i2s2-2ch-sdo {
+ rockchip,pins = <0x03 0x07 0x02 0xb1>;
+ phandle = <0x43>;
+ };
+ };
+
+ sdmmc {
+
+ sdmmc-clk {
+ rockchip,pins = <0x01 0x1e 0x01 0xb6>;
+ phandle = <0x8f>;
+ };
+
+ sdmmc-cmd {
+ rockchip,pins = <0x01 0x1f 0x01 0xb4>;
+ phandle = <0x90>;
+ };
+
+ sdmmc-det {
+ rockchip,pins = <0x00 0x03 0x01 0xb4>;
+ phandle = <0x91>;
+ };
+
+ sdmmc-bus1 {
+ rockchip,pins = <0x01 0x1a 0x01 0xb4>;
+ phandle = <0x133>;
+ };
+
+ sdmmc-bus4 {
+ rockchip,pins = <0x01 0x1a 0x01 0xb4 0x01 0x1b 0x01 0xb4 0x01 0x1c 0x01 0xb4 0x01 0x1d 0x01 0xb4>;
+ phandle = <0x92>;
+ };
+
+ sdmmc-gpio {
+ rockchip,pins = <0x01 0x1a 0x00 0xb3 0x01 0x1b 0x00 0xb3 0x01 0x1c 0x00 0xb3 0x01 0x1d 0x00 0xb3 0x01 0x1e 0x00 0xb3 0x01 0x1f 0x00 0xb3>;
+ phandle = <0x134>;
+ };
+ };
+
+ sdio {
+
+ sdio-clk {
+ rockchip,pins = <0x01 0x15 0x01 0xb1>;
+ phandle = <0x96>;
+ };
+
+ sdio-cmd {
+ rockchip,pins = <0x01 0x14 0x01 0xb2>;
+ phandle = <0x95>;
+ };
+
+ sdio-bus4 {
+ rockchip,pins = <0x01 0x16 0x01 0xb2 0x01 0x17 0x01 0xb2 0x01 0x18 0x01 0xb2 0x01 0x19 0x01 0xb2>;
+ phandle = <0x94>;
+ };
+
+ sdio-gpio {
+ rockchip,pins = <0x01 0x16 0x00 0xb2 0x01 0x17 0x00 0xb2 0x01 0x18 0x00 0xb2 0x01 0x19 0x00 0xb2 0x01 0x14 0x00 0xb2 0x01 0x15 0x00 0xb2>;
+ phandle = <0x135>;
+ };
+ };
+
+ emmc {
+
+ emmc-clk {
+ rockchip,pins = <0x01 0x09 0x02 0xb6>;
+ phandle = <0x136>;
+ };
+
+ emmc-cmd {
+ rockchip,pins = <0x01 0x0a 0x02 0xb4>;
+ phandle = <0x137>;
+ };
+
+ emmc-pwren {
+ rockchip,pins = <0x01 0x08 0x02 0xb1>;
+ phandle = <0x138>;
+ };
+
+ emmc-rstnout {
+ rockchip,pins = <0x01 0x0b 0x02 0xb1>;
+ phandle = <0x139>;
+ };
+
+ emmc-bus1 {
+ rockchip,pins = <0x01 0x00 0x02 0xb4>;
+ phandle = <0x13a>;
+ };
+
+ emmc-bus4 {
+ rockchip,pins = <0x01 0x00 0x02 0xb4 0x01 0x01 0x02 0xb4 0x01 0x02 0x02 0xb4 0x01 0x03 0x02 0xb4>;
+ phandle = <0x13b>;
+ };
+
+ emmc-bus8 {
+ rockchip,pins = <0x01 0x00 0x02 0xb4 0x01 0x01 0x02 0xb4 0x01 0x02 0x02 0xb4 0x01 0x03 0x02 0xb4 0x01 0x04 0x02 0xb4 0x01 0x05 0x02 0xb4 0x01 0x06 0x02 0xb4 0x01 0x07 0x02 0xb4>;
+ phandle = <0x13c>;
+ };
+ };
+
+ flash {
+
+ flash-cs0 {
+ rockchip,pins = <0x01 0x08 0x01 0xb1>;
+ phandle = <0x13d>;
+ };
+
+ flash-rdy {
+ rockchip,pins = <0x01 0x09 0x01 0xb1>;
+ phandle = <0x13e>;
+ };
+
+ flash-dqs {
+ rockchip,pins = <0x01 0x0a 0x01 0xb1>;
+ phandle = <0x13f>;
+ };
+
+ flash-ale {
+ rockchip,pins = <0x01 0x0b 0x01 0xb1>;
+ phandle = <0x140>;
+ };
+
+ flash-cle {
+ rockchip,pins = <0x01 0x0c 0x01 0xb1>;
+ phandle = <0x141>;
+ };
+
+ flash-wrn {
+ rockchip,pins = <0x01 0x0d 0x01 0xb1>;
+ phandle = <0x142>;
+ };
+
+ flash-csl {
+ rockchip,pins = <0x01 0x0e 0x01 0xb1>;
+ phandle = <0x143>;
+ };
+
+ flash-rdn {
+ rockchip,pins = <0x01 0x0f 0x01 0xb1>;
+ phandle = <0x144>;
+ };
+
+ flash-bus8 {
+ rockchip,pins = <0x01 0x00 0x01 0xb7 0x01 0x01 0x01 0xb7 0x01 0x02 0x01 0xb7 0x01 0x03 0x01 0xb7 0x01 0x04 0x01 0xb7 0x01 0x05 0x01 0xb7 0x01 0x06 0x01 0xb7 0x01 0x07 0x01 0xb7>;
+ phandle = <0x145>;
+ };
+ };
+
+ lcdc {
+
+ lcdc-m0-rgb-pins {
+ rockchip,pins = <0x03 0x00 0x01 0xb6 0x03 0x01 0x01 0xb6 0x03 0x02 0x01 0xb6 0x03 0x03 0x01 0xb6 0x03 0x04 0x01 0xb6 0x03 0x05 0x01 0xb6 0x03 0x06 0x01 0xb6 0x03 0x07 0x01 0xb6 0x03 0x08 0x01 0xb6 0x03 0x09 0x01 0xb6 0x03 0x0a 0x01 0xb6 0x03 0x0b 0x01 0xb6 0x03 0x0c 0x01 0xb6 0x03 0x0d 0x01 0xb6 0x03 0x0e 0x01 0xb6 0x03 0x0f 0x01 0xb6 0x03 0x10 0x01 0xb6 0x03 0x11 0x01 0xb6 0x03 0x12 0x01 0xb6 0x03 0x13 0x01 0xb6 0x03 0x14 0x01 0xb6 0x03 0x15 0x01 0xb6 0x03 0x16 0x01 0xb6 0x03 0x17 0x01 0xb6 0x03 0x18 0x01 0xb6 0x03 0x19 0x01 0xb6 0x03 0x1a 0x01 0xb6 0x03 0x1b 0x01 0xb6>;
+ phandle = <0x146>;
+ };
+
+ lcdc-m0-sleep-pins {
+ rockchip,pins = <0x03 0x00 0x00 0xb1 0x03 0x01 0x00 0xb1 0x03 0x02 0x00 0xb1 0x03 0x03 0x00 0xb1 0x03 0x04 0x00 0xb1 0x03 0x05 0x00 0xb1 0x03 0x06 0x00 0xb1 0x03 0x07 0x00 0xb1 0x03 0x08 0x00 0xb1 0x03 0x09 0x00 0xb1 0x03 0x0a 0x00 0xb1 0x03 0x0b 0x00 0xb1 0x03 0x0c 0x00 0xb1 0x03 0x0d 0x00 0xb1 0x03 0x0e 0x00 0xb1 0x03 0x0f 0x00 0xb1 0x03 0x10 0x00 0xb1 0x03 0x11 0x00 0xb1 0x03 0x12 0x00 0xb1 0x03 0x13 0x00 0xb1 0x03 0x14 0x00 0xb1 0x03 0x15 0x00 0xb1 0x03 0x16 0x00 0xb1 0x03 0x17 0x00 0xb1 0x03 0x18 0x00 0xb1 0x03 0x19 0x00 0xb1 0x03 0x1a 0x00 0xb1 0x03 0x1b 0x00 0xb1>;
+ phandle = <0x147>;
+ };
+
+ lcdc-m1-rgb-pins {
+ rockchip,pins = <0x03 0x00 0x01 0xb6 0x03 0x04 0x01 0xb6 0x03 0x06 0x01 0xb6 0x03 0x0a 0x01 0xb6 0x03 0x0b 0x01 0xb6 0x03 0x0d 0x01 0xb6 0x03 0x10 0x01 0xb6 0x03 0x11 0x01 0xb6 0x03 0x12 0x01 0xb6 0x03 0x13 0x01 0xb6 0x03 0x14 0x01 0xb6 0x03 0x15 0x01 0xb6 0x03 0x16 0x01 0xb6 0x03 0x17 0x01 0xb6 0x03 0x18 0x01 0xb6 0x03 0x19 0x01 0xb6 0x03 0x1a 0x01 0xb6 0x03 0x1b 0x01 0xb6>;
+ phandle = <0x4d>;
+ };
+
+ lcdc-m1-sleep-pins {
+ rockchip,pins = <0x03 0x00 0x00 0xb1 0x03 0x04 0x00 0xb1 0x03 0x06 0x00 0xb1 0x03 0x0a 0x00 0xb1 0x03 0x0b 0x00 0xb1 0x03 0x0d 0x00 0xb1 0x03 0x10 0x00 0xb1 0x03 0x11 0x00 0xb1 0x03 0x12 0x00 0xb1 0x03 0x13 0x00 0xb1 0x03 0x14 0x00 0xb1 0x03 0x15 0x00 0xb1 0x03 0x16 0x00 0xb1 0x03 0x17 0x00 0xb1 0x03 0x18 0x00 0xb1 0x03 0x19 0x00 0xb1 0x03 0x1a 0x00 0xb1 0x03 0x1b 0x00 0xb1>;
+ phandle = <0x4e>;
+ };
+ };
+
+ pwm0 {
+
+ pwm0-pin {
+ rockchip,pins = <0x00 0x0f 0x01 0x118>;
+ phandle = <0x7b>;
+ };
+ };
+
+ pwm1 {
+
+ pwm1-pin {
+ rockchip,pins = <0x00 0x10 0x01 0xb1>;
+ phandle = <0x7c>;
+ };
+ };
+
+ pwm2 {
+
+ pwm2-pin {
+ rockchip,pins = <0x02 0x0d 0x01 0xb1>;
+ phandle = <0x7d>;
+ };
+ };
+
+ pwm3 {
+
+ pwm3-pin {
+ rockchip,pins = <0x00 0x11 0x01 0xb1>;
+ phandle = <0x7e>;
+ };
+ };
+
+ pwm4 {
+
+ pwm4-pin {
+ rockchip,pins = <0x03 0x12 0x03 0xb1>;
+ phandle = <0x7f>;
+ };
+ };
+
+ pwm5 {
+
+ pwm5-pin {
+ rockchip,pins = <0x03 0x13 0x03 0xb1>;
+ phandle = <0x80>;
+ };
+ };
+
+ pwm6 {
+
+ pwm6-pin {
+ rockchip,pins = <0x03 0x14 0x03 0xb1>;
+ phandle = <0x81>;
+ };
+ };
+
+ pwm7 {
+
+ pwm7-pin {
+ rockchip,pins = <0x03 0x15 0x03 0xb1>;
+ phandle = <0x82>;
+ };
+ };
+
+ gmac {
+
+ rmii-pins {
+ rockchip,pins = <0x02 0x00 0x02 0xb8 0x02 0x01 0x02 0xb8 0x02 0x02 0x02 0xb8 0x02 0x03 0x02 0xb1 0x02 0x04 0x02 0xb1 0x02 0x05 0x02 0xb1 0x02 0x06 0x02 0xb1 0x02 0x07 0x02 0xb1 0x02 0x09 0x02 0xb1>;
+ phandle = <0x8d>;
+ };
+
+ mac-refclk-12ma {
+ rockchip,pins = <0x02 0x0a 0x02 0xb8>;
+ phandle = <0x8e>;
+ };
+
+ mac-refclk {
+ rockchip,pins = <0x02 0x0a 0x02 0xb1>;
+ phandle = <0x148>;
+ };
+ };
+
+ cif-m0 {
+
+ cif-clkout-m0 {
+ rockchip,pins = <0x02 0x0b 0x01 0xb8>;
+ phandle = <0xa7>;
+ };
+
+ dvp-d2d9-m0 {
+ rockchip,pins = <0x02 0x00 0x01 0xb1 0x02 0x01 0x01 0xb1 0x02 0x02 0x01 0xb1 0x02 0x03 0x01 0xb1 0x02 0x04 0x01 0xb1 0x02 0x05 0x01 0xb1 0x02 0x06 0x01 0xb1 0x02 0x07 0x01 0xb1 0x02 0x08 0x01 0xb1 0x02 0x09 0x01 0xb1 0x02 0x0a 0x01 0xb1 0x02 0x0b 0x01 0xb1>;
+ phandle = <0xa5>;
+ };
+
+ dvp-d0d1-m0 {
+ rockchip,pins = <0x02 0x0c 0x01 0xb1 0x02 0x0e 0x01 0xb1>;
+ phandle = <0xa9>;
+ };
+
+ d10-d11-m0 {
+ rockchip,pins = <0x02 0x0f 0x01 0xb1 0x02 0x10 0x01 0xb1>;
+ phandle = <0xa8>;
+ };
+ };
+
+ cif-m1 {
+
+ cif-clkout-m1 {
+ rockchip,pins = <0x03 0x18 0x03 0xb1>;
+ phandle = <0x149>;
+ };
+
+ dvp-d2d9-m1 {
+ rockchip,pins = <0x03 0x03 0x03 0xb1 0x03 0x05 0x03 0xb1 0x03 0x07 0x03 0xb1 0x03 0x08 0x03 0xb1 0x03 0x09 0x03 0xb1 0x03 0x0c 0x03 0xb1 0x03 0x0e 0x03 0xb1 0x03 0x0f 0x03 0xb1 0x03 0x19 0x03 0xb1 0x03 0x1a 0x03 0xb1 0x03 0x1b 0x03 0xb1 0x03 0x18 0x03 0xb1>;
+ phandle = <0x14a>;
+ };
+
+ dvp-d0d1-m1 {
+ rockchip,pins = <0x03 0x01 0x03 0xb1 0x03 0x02 0x03 0xb1>;
+ phandle = <0x14b>;
+ };
+
+ d10-d11-m1 {
+ rockchip,pins = <0x03 0x16 0x03 0xb1 0x03 0x17 0x03 0xb1>;
+ phandle = <0x14c>;
+ };
+ };
+
+ isp {
+
+ isp-prelight {
+ rockchip,pins = <0x03 0x19 0x04 0xb1>;
+ phandle = <0x14d>;
+ };
+ };
+
+ pmic {
+
+ pmic_int {
+ rockchip,pins = <0x00 0x0a 0x00 0xb2 0x00 0x0b 0x00 0xb1>;
+ phandle = <0x5d>;
+ };
+
+ soc_slppin_gpio {
+ rockchip,pins = <0x00 0x04 0x00 0xb9>;
+ phandle = <0x60>;
+ };
+
+ soc_slppin_slp {
+ rockchip,pins = <0x00 0x04 0x01 0xb1>;
+ phandle = <0x5e>;
+ };
+
+ soc_slppin_rst {
+ rockchip,pins = <0x00 0x04 0x02 0xb1>;
+ phandle = <0x62>;
+ };
+ };
+
+ leds {
+
+ led-pins {
+ rockchip,pins = <0x00 0x11 0x00 0xb1>;
+ phandle = <0xc0>;
+ };
+ };
+
+ btns {
+
+ btn-pins {
+ rockchip,pins = <0x01 0x0c 0x00 0xb2 0x01 0x0d 0x00 0xb2 0x01 0x0e 0x00 0xb2 0x01 0x0f 0x00 0xb2 0x01 0x02 0x00 0xb2 0x01 0x05 0x00 0xb2 0x01 0x06 0x00 0xb2 0x01 0x07 0x00 0xb2 0x02 0x00 0x00 0xb2 0x02 0x01 0x00 0xb2 0x02 0x02 0x00 0xb2 0x02 0x03 0x00 0xb2 0x02 0x04 0x00 0xb2 0x02 0x05 0x00 0xb2 0x02 0x06 0x00 0xb2 0x02 0x07 0x00 0xb2 0x03 0x09 0x00 0xb2 0x03 0x0a 0x00 0xb2 0x03 0x0c 0x00 0xb2 0x03 0x0f 0x00 0xb2>;
+ phandle = <0xbd>;
+ };
+ };
+ };
+
+ chosen {
+ bootargs = [00];
+ };
+
+ fiq-debugger {
+ compatible = "rockchip,fiq-debugger";
+ rockchip,serial-id = <0x02>;
+ rockchip,wake-irq = <0x00>;
+ rockchip,irq-mode-enable = <0x00>;
+ rockchip,baudrate = <0x1c200>;
+ interrupts = <0x00 0x7f 0x08>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0xba>;
+ status = "okay";
+ };
+
+ ramoops {
+ compatible = "ramoops";
+ record-size = <0x00 0x20000>;
+ console-size = <0x00 0x80000>;
+ ftrace-size = <0x00 0x00>;
+ pmsg-size = <0x00 0x00>;
+ memory-region = <0xbb>;
+ };
+
+ reserved-memory {
+ #address-cells = <0x02>;
+ #size-cells = <0x02>;
+ ranges;
+
+ drm-logo@00000000 {
+ compatible = "rockchip,drm-logo";
+ reg = <0x00 0x00 0x00 0x00>;
+ phandle = <0x11>;
+ };
+
+ region@110000 {
+ reg = <0x00 0x110000 0x00 0xf0000>;
+ reg-names = "ramoops_mem";
+ phandle = <0xbb>;
+ };
+ };
+
+ odroidgo3-keys {
+ compatible = "gpio-keys";
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+ autorepeat;
+ phandle = <0x14e>;
+
+ button@0 {
+ label = "GPIO BTN-VOLUP";
+ linux,code = <0x73>;
+ gpios = <0x66 0x00 0x01>;
+ };
+
+ button@1 {
+ label = "GPIO BTN-VOLDN";
+ linux,code = <0x72>;
+ gpios = <0x66 0x01 0x01>;
+ };
+ };
+
+ odroidgo3-joypad {
+ compatible = "odroidgo3-joypad";
+ pwms = <0xbc 0x00 0x1312d00 0x00>;
+ pwm-names = "enable";
+ motor-supply = <0x200>;
+ rumble-boost-weak = <0x00>;
+ rumble-boost-strong = <0x00>;
+ joypad-name = "GO-Super Gamepad";
+ joypad-product = <0x1100>;
+ joypad-revision = <0x100>;
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <0xbd>;
+ io-channel-names = "amux_adc";
+ io-channels = <0xbe 0x01>;
+ amux-count = <0x04>;
+ amux-a-gpios = <0x97 0x0b 0x01>;
+ amux-b-gpios = <0x97 0x08 0x01>;
+ amux-en-gpios = <0x97 0x0d 0x01>;
+ button-adc-scale = <0x02>;
+ button-adc-deadzone = <0x40>;
+ button-adc-fuzz = <0x20>;
+ button-adc-flat = <0x20>;
+ abs_x-p-tuning = <0xc8>;
+ abs_x-n-tuning = <0xc8>;
+ abs_y-p-tuning = <0xc8>;
+ abs_y-n-tuning = <0xc8>;
+ abs_rx-p-tuning = <0xc8>;
+ abs_rx-n-tuning = <0xc8>;
+ abs_ry-p-tuning = <0xc8>;
+ abs_ry-n-tuning = <0xc8>;
+ poll-interval = <0x0a>;
+ invert-absx;
+ invert-absy;
+ phandle = <0x14f>;
+
+ sw1 {
+ gpios = <0xbf 0x0c 0x01>;
+ label = "GPIO DPAD-UP";
+ linux,code = <0x220>;
+ };
+
+ sw2 {
+ gpios = <0xbf 0x0d 0x01>;
+ label = "GPIO DPAD-DOWN";
+ linux,code = <0x221>;
+ };
+
+ sw3 {
+ gpios = <0xbf 0x0e 0x01>;
+ label = "GPIO DPAD-LEFT";
+ linux,code = <0x222>;
+ };
+
+ sw4 {
+ gpios = <0xbf 0x0f 0x01>;
+ label = "GPIO DPAD-RIGHT";
+ linux,code = <0x223>;
+ };
+
+ sw5 {
+ gpios = <0xbf 0x02 0x01>;
+ label = "GPIO KEY BTN-A";
+ linux,code = <0x131>;
+ };
+
+ sw6 {
+ gpios = <0xbf 0x05 0x01>;
+ label = "GPIO BTN-B";
+ linux,code = <0x130>;
+ };
+
+ sw7 {
+ gpios = <0xbf 0x06 0x01>;
+ label = "GPIO BTN-Y";
+ linux,code = <0x134>;
+ };
+
+ sw8 {
+ gpios = <0xbf 0x07 0x01>;
+ label = "GPIO BTN-X";
+ linux,code = <0x133>;
+ };
+
+ sw11 {
+ gpios = <0x66 0x02 0x01>;
+ label = "GPIO F3";
+ linux,code = <0x2c2>;
+ };
+
+ sw12 {
+ gpios = <0x66 0x03 0x01>;
+ label = "GPIO F4";
+ linux,code = <0x2c3>;
+ };
+
+ sw15 {
+ gpios = <0x66 0x06 0x01>;
+ label = "GPIO TOP-LEFT";
+ linux,code = <0x136>;
+ };
+
+ sw16 {
+ gpios = <0x66 0x07 0x01>;
+ label = "GPIO TOP-RIGHT";
+ linux,code = <0x137>;
+ };
+
+ sw19 {
+ gpios = <0x97 0x09 0x01>;
+ label = "GPIO F1";
+ linux,code = <0x2c0>;
+ };
+
+ sw20 {
+ gpios = <0x97 0x0f 0x01>;
+ label = "GPIO TOP-RIGHT2";
+ linux,code = <0x139>;
+ };
+
+ sw21 {
+ gpios = <0x97 0x0a 0x01>;
+ label = "GPIO TOP-LEFT2";
+ linux,code = <0x138>;
+ };
+
+ sw22 {
+ gpios = <0x97 0x0c 0x01>;
+ label = "GPIO F2";
+ linux,code = <0x2c1>;
+ };
+
+ sw13 {
+ gpios = <0x66 0x04 0x01>;
+ label = "GPIO F5";
+ linux,code = <0x2c4>;
+ };
+ };
+
+ gpio_leds {
+ compatible = "gpio-leds";
+ pinctrl-names = "led_pins";
+ pinctrl-0 = <0xc0>;
+ phandle = <0x150>;
+
+ heartbeat {
+ label = "blue:heartbeat";
+ gpios = <0x5c 0x11 0x00>;
+ linux,default-trigger = "heartbeat";
+ };
+ };
+
+ backlight {
+ compatible = "pwm-backlight";
+ pwms = <0xc1 0x00 0xf519 0x00>;
+ brightness-levels = <0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f 0x20 0x21 0x22 0x23 0x24 0x25 0x26 0x27 0x28 0x29 0x2a 0x2b 0x2c 0x2d 0x2e 0x2f 0x30 0x31 0x32 0x33 0x34 0x35 0x36 0x37 0x38 0x39 0x3a 0x3b 0x3c 0x3d 0x3e 0x3f 0x40 0x41 0x42 0x43 0x44 0x45 0x46 0x47 0x48 0x49 0x4a 0x4b 0x4c 0x4d 0x4e 0x4f 0x50 0x51 0x52 0x53 0x54 0x55 0x56 0x57 0x58 0x59 0x5a 0x5b 0x5c 0x5d 0x5e 0x5f 0x60 0x61 0x62 0x63 0x64 0x65 0x66 0x67 0x68 0x69 0x6a 0x6b 0x6c 0x6d 0x6e 0x6f 0x70 0x71 0x72 0x73 0x74 0x75 0x76 0x77 0x78 0x79 0x7a 0x7b 0x7c 0x7d 0x7e 0x7f 0x80 0x81 0x82 0x83 0x84 0x85 0x86 0x87 0x88 0x89 0x8a 0x8b 0x8c 0x8d 0x8e 0x8f 0x90 0x91 0x92 0x93 0x94 0x95 0x96 0x97 0x98 0x99 0x9a 0x9b 0x9c 0x9d 0x9e 0x9f 0xa0>;
+ default-brightness-level = <0x33>;
+ phandle = <0x9d>;
+ };
+
+ rk817-sound {
+ compatible = "simple-audio-card";
+ simple-audio-card,format = "i2s";
+ simple-audio-card,name = "rockchip,rk817-codec";
+ simple-audio-card,mclk-fs = <0x100>;
+ simple-audio-card,widgets = "Microphone\0Mic Jack\0Headphone\0Headphone Jack";
+ simple-audio-card,routing = "MIC_IN\0Mic Jack\0Headphone Jack\0HPOL\0Headphone Jack\0HPOR";
+ simple-audio-card,hp-det-gpio = <0x66 0x16 0x01>;
+ simple-audio-card,codec-hp-det = <0x01>;
+
+ simple-audio-card,cpu {
+ sound-dai = <0xc2>;
+ };
+
+ simple-audio-card,codec {
+ sound-dai = <0xc3>;
+ };
+ };
+
+ vccsys {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v8_sys";
+ regulator-always-on;
+ regulator-min-microvolt = <0x39fbc0>;
+ regulator-max-microvolt = <0x39fbc0>;
+ phandle = <0x64>;
+ };
+
+ __symbols__ {
+ ddr_timing = "/ddr_timing";
+ cpu0 = "/cpus/cpu@0";
+ cpu1 = "/cpus/cpu@1";
+ cpu2 = "/cpus/cpu@2";
+ cpu3 = "/cpus/cpu@3";
+ CPU_SLEEP = "/cpus/idle-states/cpu-sleep";
+ CLUSTER_SLEEP = "/cpus/idle-states/cluster-sleep";
+ cpu0_opp_table = "/cpu0-opp-table";
+ bus_soc = "/bus-soc";
+ bus_apll = "/bus-apll";
+ bus_apll_opp_table = "/bus-apll-opp-table";
+ display_subsystem = "/display-subsystem";
+ route_lvds = "/display-subsystem/route/route-lvds";
+ route_dsi = "/display-subsystem/route/route-dsi";
+ route_rgb = "/display-subsystem/route/route-rgb";
+ gmac_clkin = "/external-gmac-clock";
+ rockchip_suspend = "/rockchip-suspend";
+ xin24m = "/xin24m";
+ xin32k = "/xin32k";
+ pmu = "/power-management@ff000000";
+ power = "/power-management@ff000000/power-controller";
+ pmugrf = "/syscon@ff010000";
+ pmu_io_domains = "/syscon@ff010000/io-domains";
+ pmu_pvtm = "/syscon@ff010000/pmu-pvtm";
+ uart0 = "/serial@ff030000";
+ i2s0_8ch = "/i2s@ff060000";
+ i2s1_2ch = "/i2s@ff070000";
+ i2s2_2ch = "/i2s@ff080000";
+ pdm = "/pdm@ff0a0000";
+ crypto = "/crypto@ff0b0000";
+ rng = "/rng@ff0b0000";
+ gic = "/interrupt-controller@ff131000";
+ grf = "/syscon@ff140000";
+ io_domains = "/syscon@ff140000/io-domains";
+ lvds = "/syscon@ff140000/lvds";
+ lvds_in_vopb = "/syscon@ff140000/lvds/ports/port@0/endpoint@0";
+ rgb = "/syscon@ff140000/rgb";
+ rgb_in_vopb = "/syscon@ff140000/rgb/ports/port@0/endpoint@0";
+ core_grf = "/syscon@ff148000";
+ pvtm = "/syscon@ff148000/pvtm";
+ uart1 = "/serial@ff158000";
+ uart2 = "/serial@ff160000";
+ uart3 = "/serial@ff168000";
+ uart4 = "/serial@ff170000";
+ uart5 = "/serial@ff178000";
+ i2c0 = "/i2c@ff180000";
+ rk817 = "/i2c@ff180000/pmic@20";
+ pinctrl_rk8xx = "/i2c@ff180000/pmic@20/pinctrl_rk8xx";
+ rk817_ts_gpio1 = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_ts_gpio1";
+ rk817_gt_gpio2 = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_gt_gpio2";
+ rk817_pin_ts = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_pin_ts";
+ rk817_pin_gt = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_pin_gt";
+ rk817_slppin_null = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_slppin_null";
+ rk817_slppin_slp = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_slppin_slp";
+ rk817_slppin_pwrdn = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_slppin_pwrdn";
+ rk817_slppin_rst = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_slppin_rst";
+ vdd_logic = "/i2c@ff180000/pmic@20/regulators/DCDC_REG1";
+ vdd_arm = "/i2c@ff180000/pmic@20/regulators/DCDC_REG2";
+ vcc_ddr = "/i2c@ff180000/pmic@20/regulators/DCDC_REG3";
+ vcc_3v3 = "/i2c@ff180000/pmic@20/regulators/DCDC_REG4";
+ vcc_1v0 = "/i2c@ff180000/pmic@20/regulators/LDO_REG1";
+ vcc1v8_soc = "/i2c@ff180000/pmic@20/regulators/LDO_REG2";
+ vdd1v0_soc = "/i2c@ff180000/pmic@20/regulators/LDO_REG3";
+ vcc3v3_pmu = "/i2c@ff180000/pmic@20/regulators/LDO_REG4";
+ vccio_sd = "/i2c@ff180000/pmic@20/regulators/LDO_REG5";
+ vcc_sd = "/i2c@ff180000/pmic@20/regulators/LDO_REG6";
+ vcc_backlight = "/i2c@ff180000/pmic@20/regulators/LDO_REG7";
+ vcc_lcd = "/i2c@ff180000/pmic@20/regulators/LDO_REG8";
+ dcdc_boost = "/i2c@ff180000/pmic@20/regulators/BOOST";
+ otg_switch = "/i2c@ff180000/pmic@20/regulators/OTG_SWITCH";
+ rk817_codec = "/i2c@ff180000/pmic@20/codec";
+ i2c1 = "/i2c@ff190000";
+ i2c2 = "/i2c@ff1a0000";
+ i2c3 = "/i2c@ff1b0000";
+ spi0 = "/spi@ff1d0000";
+ spi1 = "/spi@ff1d8000";
+ wdt = "/watchdog@ff1e0000";
+ pwm0 = "/pwm@ff200000";
+ pwm1 = "/pwm@ff200010";
+ pwm2 = "/pwm@ff200020";
+ pwm3 = "/pwm@ff200030";
+ pwm4 = "/pwm@ff208000";
+ pwm5 = "/pwm@ff208010";
+ pwm6 = "/pwm@ff208020";
+ pwm7 = "/pwm@ff208030";
+ rktimer = "/rktimer@ff210000";
+ dmac = "/amba/dmac@ff240000";
+ thermal_zones = "/thermal-zones";
+ soc_thermal = "/thermal-zones/soc-thermal";
+ threshold = "/thermal-zones/soc-thermal/trips/trip-point-0";
+ target = "/thermal-zones/soc-thermal/trips/trip-point-1";
+ soc_crit = "/thermal-zones/soc-thermal/trips/soc-crit";
+ gpu_thermal = "/thermal-zones/gpu-thermal";
+ tsadc = "/tsadc@ff280000";
+ saradc = "/saradc@ff288000";
+ otp = "/otp@ff290000";
+ otp_id = "/otp@ff290000/id@7";
+ cpu_leakage = "/otp@ff290000/cpu-leakage@17";
+ performance = "/otp@ff290000/performance@1e";
+ cru = "/clock-controller@ff2b0000";
+ cpu_boost = "/cpu-boost@ff2b8000";
+ pmucru = "/pmu-clock-controller@ff2bc000";
+ usb2phy_grf = "/syscon@ff2c0000";
+ u2phy = "/syscon@ff2c0000/usb2-phy@100";
+ u2phy_host = "/syscon@ff2c0000/usb2-phy@100/host-port";
+ u2phy_otg = "/syscon@ff2c0000/usb2-phy@100/otg-port";
+ video_phy = "/video-phy@ff2e0000";
+ mipi_dphy_rx0 = "/mipi-dphy-rx0@ff2f0000";
+ usb20_otg = "/usb@ff300000";
+ usb_host0_ehci = "/usb@ff340000";
+ usb_host0_ohci = "/usb@ff350000";
+ gmac = "/ethernet@ff360000";
+ sdmmc = "/dwmmc@ff370000";
+ sdio = "/dwmmc@ff380000";
+ emmc = "/dwmmc@ff390000";
+ nandc0 = "/nandc@ff3b0000";
+ sfc = "/sfc@ff3a0000";
+ gpu = "/gpu@ff400000";
+ gpu_opp_table = "/gpu-opp-table";
+ hevc = "/hevc_service@ff440000";
+ vpu = "/vpu_service@ff442000";
+ vpu_combo = "/vpu_combo";
+ hevc_mmu = "/iommu@ff440440";
+ vpu_mmu = "/iommu@ff442800";
+ dsi = "/dsi@ff450000";
+ dsi_in_vopb = "/dsi@ff450000/ports/port@0/endpoint@0";
+ timing0 = "/dsi@ff450000/panel@0/display-timings/60Hz";
+ timing1 = "/dsi@ff450000/panel@0/display-timings/50Hz";
+ timing2 = "/dsi@ff450000/panel@0/display-timings/75Hz";
+ vopb = "/vop@ff460000";
+ vopb_out = "/vop@ff460000/port";
+ vopb_out_lvds = "/vop@ff460000/port/endpoint@0";
+ vopb_out_dsi = "/vop@ff460000/port/endpoint@1";
+ vopb_out_rgb = "/vop@ff460000/port/endpoint@2";
+ vopb_mmu = "/iommu@ff460f00";
+ rk_rga = "/rk_rga@ff480000";
+ cif = "/cif@ff490000";
+ cif_new = "/cif-new@ff490000";
+ vip_mmu = "/iommu@ff490800";
+ rk_isp = "/rk_isp@ff4a0000";
+ rkisp1 = "/rkisp1@ff4a0000";
+ isp_mmu = "/iommu@ff4a8000";
+ qos_gmac = "/qos@ff518000";
+ qos_gpu = "/qos@ff520000";
+ qos_sdmmc = "/qos@ff52c000";
+ qos_emmc = "/qos@ff538000";
+ qos_nand = "/qos@ff538080";
+ qos_sdio = "/qos@ff538100";
+ qos_sfc = "/qos@ff538180";
+ qos_usb_host = "/qos@ff540000";
+ qos_usb_otg = "/qos@ff540080";
+ qos_isp_128 = "/qos@ff548000";
+ qos_isp_rd = "/qos@ff548080";
+ qos_isp_wr = "/qos@ff548100";
+ qos_isp_m1 = "/qos@ff548180";
+ qos_vip = "/qos@ff548200";
+ qos_rga_rd = "/qos@ff550000";
+ qos_rga_wr = "/qos@ff550080";
+ qos_vop_m0 = "/qos@ff550100";
+ qos_vop_m1 = "/qos@ff550180";
+ qos_vpu = "/qos@ff558000";
+ qos_vpu_r128 = "/qos@ff558080";
+ dfi = "/dfi@ff610000";
+ dmc = "/dmc";
+ ddr_power_model = "/dmc/ddr_power_model";
+ dmc_opp_table = "/dmc-opp-table";
+ rockchip_system_monitor = "/rockchip-system-monitor";
+ pinctrl = "/pinctrl";
+ gpio0 = "/pinctrl/gpio0@ff040000";
+ gpio1 = "/pinctrl/gpio1@ff250000";
+ gpio2 = "/pinctrl/gpio2@ff260000";
+ gpio3 = "/pinctrl/gpio3@ff270000";
+ pcfg_pull_up = "/pinctrl/pcfg-pull-up";
+ pcfg_pull_down = "/pinctrl/pcfg-pull-down";
+ pcfg_pull_none = "/pinctrl/pcfg-pull-none";
+ pcfg_pull_none_2ma = "/pinctrl/pcfg-pull-none-2ma";
+ pcfg_pull_up_2ma = "/pinctrl/pcfg-pull-up-2ma";
+ pcfg_pull_up_4ma = "/pinctrl/pcfg-pull-up-4ma";
+ pcfg_pull_none_4ma = "/pinctrl/pcfg-pull-none-4ma";
+ pcfg_pull_down_4ma = "/pinctrl/pcfg-pull-down-4ma";
+ pcfg_pull_none_8ma = "/pinctrl/pcfg-pull-none-8ma";
+ pcfg_pull_up_8ma = "/pinctrl/pcfg-pull-up-8ma";
+ pcfg_pull_none_12ma = "/pinctrl/pcfg-pull-none-12ma";
+ pcfg_pull_up_12ma = "/pinctrl/pcfg-pull-up-12ma";
+ pcfg_pull_none_smt = "/pinctrl/pcfg-pull-none-smt";
+ pcfg_output_high = "/pinctrl/pcfg-output-high";
+ pcfg_output_low = "/pinctrl/pcfg-output-low";
+ pcfg_input_high = "/pinctrl/pcfg-input-high";
+ pcfg_input = "/pinctrl/pcfg-input";
+ i2c0_xfer = "/pinctrl/i2c0/i2c0-xfer";
+ i2c1_xfer = "/pinctrl/i2c1/i2c1-xfer";
+ i2c2_xfer = "/pinctrl/i2c2/i2c2-xfer";
+ i2c3_xfer = "/pinctrl/i2c3/i2c3-xfer";
+ tsadc_otp_gpio = "/pinctrl/tsadc/tsadc-otp-gpio";
+ tsadc_otp_out = "/pinctrl/tsadc/tsadc-otp-out";
+ uart0_xfer = "/pinctrl/uart0/uart0-xfer";
+ uart0_cts = "/pinctrl/uart0/uart0-cts";
+ uart0_rts = "/pinctrl/uart0/uart0-rts";
+ uart0_rts_gpio = "/pinctrl/uart0/uart0-rts-gpio";
+ uart1_xfer = "/pinctrl/uart1/uart1-xfer";
+ uart1_cts = "/pinctrl/uart1/uart1-cts";
+ uart1_rts = "/pinctrl/uart1/uart1-rts";
+ uart1_rts_gpio = "/pinctrl/uart1/uart1-rts-gpio";
+ uart2m0_xfer = "/pinctrl/uart2-m0/uart2m0-xfer";
+ uart2m1_xfer = "/pinctrl/uart2-m1/uart2m1-xfer";
+ uart3m0_xfer = "/pinctrl/uart3-m0/uart3m0-xfer";
+ uart3m0_cts = "/pinctrl/uart3-m0/uart3m0-cts";
+ uart3m0_rts = "/pinctrl/uart3-m0/uart3m0-rts";
+ uart3m0_rts_gpio = "/pinctrl/uart3-m0/uart3m0-rts-gpio";
+ uart3m1_xfer = "/pinctrl/uart3-m1/uart3m1-xfer";
+ uart3m1_cts = "/pinctrl/uart3-m1/uart3m1-cts";
+ uart3m1_rts = "/pinctrl/uart3-m1/uart3m1-rts";
+ uart3m1_rts_gpio = "/pinctrl/uart3-m1/uart3m1-rts-gpio";
+ uart4_xfer = "/pinctrl/uart4/uart4-xfer";
+ uart4_cts = "/pinctrl/uart4/uart4-cts";
+ uart4_rts = "/pinctrl/uart4/uart4-rts";
+ uart5_xfer = "/pinctrl/uart5/uart5-xfer";
+ uart5_cts = "/pinctrl/uart5/uart5-cts";
+ uart5_rts = "/pinctrl/uart5/uart5-rts";
+ spi0_clk = "/pinctrl/spi0/spi0-clk";
+ spi0_csn = "/pinctrl/spi0/spi0-csn";
+ spi0_miso = "/pinctrl/spi0/spi0-miso";
+ spi0_mosi = "/pinctrl/spi0/spi0-mosi";
+ spi0_clk_hs = "/pinctrl/spi0/spi0-clk-hs";
+ spi0_miso_hs = "/pinctrl/spi0/spi0-miso-hs";
+ spi0_mosi_hs = "/pinctrl/spi0/spi0-mosi-hs";
+ spi1_clk = "/pinctrl/spi1/spi1-clk";
+ spi1_csn0 = "/pinctrl/spi1/spi1-csn0";
+ spi1_csn1 = "/pinctrl/spi1/spi1-csn1";
+ spi1_miso = "/pinctrl/spi1/spi1-miso";
+ spi1_mosi = "/pinctrl/spi1/spi1-mosi";
+ spi1_clk_hs = "/pinctrl/spi1/spi1-clk-hs";
+ spi1_miso_hs = "/pinctrl/spi1/spi1-miso-hs";
+ spi1_mosi_hs = "/pinctrl/spi1/spi1-mosi-hs";
+ pdm_clk0m0 = "/pinctrl/pdm/pdm-clk0m0";
+ pdm_clk0m1 = "/pinctrl/pdm/pdm-clk0m1";
+ pdm_clk1 = "/pinctrl/pdm/pdm-clk1";
+ pdm_sdi0m0 = "/pinctrl/pdm/pdm-sdi0m0";
+ pdm_sdi0m1 = "/pinctrl/pdm/pdm-sdi0m1";
+ pdm_sdi1 = "/pinctrl/pdm/pdm-sdi1";
+ pdm_sdi2 = "/pinctrl/pdm/pdm-sdi2";
+ pdm_sdi3 = "/pinctrl/pdm/pdm-sdi3";
+ pdm_clk0m0_sleep = "/pinctrl/pdm/pdm-clk0m0-sleep";
+ pdm_clk0m_sleep1 = "/pinctrl/pdm/pdm-clk0m1-sleep";
+ pdm_clk1_sleep = "/pinctrl/pdm/pdm-clk1-sleep";
+ pdm_sdi0m0_sleep = "/pinctrl/pdm/pdm-sdi0m0-sleep";
+ pdm_sdi0m1_sleep = "/pinctrl/pdm/pdm-sdi0m1-sleep";
+ pdm_sdi1_sleep = "/pinctrl/pdm/pdm-sdi1-sleep";
+ pdm_sdi2_sleep = "/pinctrl/pdm/pdm-sdi2-sleep";
+ pdm_sdi3_sleep = "/pinctrl/pdm/pdm-sdi3-sleep";
+ i2s0_8ch_mclk = "/pinctrl/i2s0/i2s0-8ch-mclk";
+ i2s0_8ch_sclktx = "/pinctrl/i2s0/i2s0-8ch-sclktx";
+ i2s0_8ch_sclkrx = "/pinctrl/i2s0/i2s0-8ch-sclkrx";
+ i2s0_8ch_lrcktx = "/pinctrl/i2s0/i2s0-8ch-lrcktx";
+ i2s0_8ch_lrckrx = "/pinctrl/i2s0/i2s0-8ch-lrckrx";
+ i2s0_8ch_sdo0 = "/pinctrl/i2s0/i2s0-8ch-sdo0";
+ i2s0_8ch_sdo1 = "/pinctrl/i2s0/i2s0-8ch-sdo1";
+ i2s0_8ch_sdo2 = "/pinctrl/i2s0/i2s0-8ch-sdo2";
+ i2s0_8ch_sdo3 = "/pinctrl/i2s0/i2s0-8ch-sdo3";
+ i2s0_8ch_sdi0 = "/pinctrl/i2s0/i2s0-8ch-sdi0";
+ i2s0_8ch_sdi1 = "/pinctrl/i2s0/i2s0-8ch-sdi1";
+ i2s0_8ch_sdi2 = "/pinctrl/i2s0/i2s0-8ch-sdi2";
+ i2s0_8ch_sdi3 = "/pinctrl/i2s0/i2s0-8ch-sdi3";
+ i2s1_2ch_mclk = "/pinctrl/i2s1/i2s1-2ch-mclk";
+ i2s1_2ch_sclk = "/pinctrl/i2s1/i2s1-2ch-sclk";
+ i2s1_2ch_lrck = "/pinctrl/i2s1/i2s1-2ch-lrck";
+ i2s1_2ch_sdi = "/pinctrl/i2s1/i2s1-2ch-sdi";
+ i2s1_2ch_sdo = "/pinctrl/i2s1/i2s1-2ch-sdo";
+ i2s2_2ch_mclk = "/pinctrl/i2s2/i2s2-2ch-mclk";
+ i2s2_2ch_sclk = "/pinctrl/i2s2/i2s2-2ch-sclk";
+ i2s2_2ch_lrck = "/pinctrl/i2s2/i2s2-2ch-lrck";
+ i2s2_2ch_sdi = "/pinctrl/i2s2/i2s2-2ch-sdi";
+ i2s2_2ch_sdo = "/pinctrl/i2s2/i2s2-2ch-sdo";
+ sdmmc_clk = "/pinctrl/sdmmc/sdmmc-clk";
+ sdmmc_cmd = "/pinctrl/sdmmc/sdmmc-cmd";
+ sdmmc_det = "/pinctrl/sdmmc/sdmmc-det";
+ sdmmc_bus1 = "/pinctrl/sdmmc/sdmmc-bus1";
+ sdmmc_bus4 = "/pinctrl/sdmmc/sdmmc-bus4";
+ sdmmc_gpio = "/pinctrl/sdmmc/sdmmc-gpio";
+ sdio_clk = "/pinctrl/sdio/sdio-clk";
+ sdio_cmd = "/pinctrl/sdio/sdio-cmd";
+ sdio_bus4 = "/pinctrl/sdio/sdio-bus4";
+ sdio_gpio = "/pinctrl/sdio/sdio-gpio";
+ emmc_clk = "/pinctrl/emmc/emmc-clk";
+ emmc_cmd = "/pinctrl/emmc/emmc-cmd";
+ emmc_pwren = "/pinctrl/emmc/emmc-pwren";
+ emmc_rstnout = "/pinctrl/emmc/emmc-rstnout";
+ emmc_bus1 = "/pinctrl/emmc/emmc-bus1";
+ emmc_bus4 = "/pinctrl/emmc/emmc-bus4";
+ emmc_bus8 = "/pinctrl/emmc/emmc-bus8";
+ flash_cs0 = "/pinctrl/flash/flash-cs0";
+ flash_rdy = "/pinctrl/flash/flash-rdy";
+ flash_dqs = "/pinctrl/flash/flash-dqs";
+ flash_ale = "/pinctrl/flash/flash-ale";
+ flash_cle = "/pinctrl/flash/flash-cle";
+ flash_wrn = "/pinctrl/flash/flash-wrn";
+ flash_csl = "/pinctrl/flash/flash-csl";
+ flash_rdn = "/pinctrl/flash/flash-rdn";
+ flash_bus8 = "/pinctrl/flash/flash-bus8";
+ lcdc_m0_rgb_pins = "/pinctrl/lcdc/lcdc-m0-rgb-pins";
+ lcdc_m0_sleep_pins = "/pinctrl/lcdc/lcdc-m0-sleep-pins";
+ lcdc_m1_rgb_pins = "/pinctrl/lcdc/lcdc-m1-rgb-pins";
+ lcdc_m1_sleep_pins = "/pinctrl/lcdc/lcdc-m1-sleep-pins";
+ pwm0_pin = "/pinctrl/pwm0/pwm0-pin";
+ pwm1_pin = "/pinctrl/pwm1/pwm1-pin";
+ pwm2_pin = "/pinctrl/pwm2/pwm2-pin";
+ pwm3_pin = "/pinctrl/pwm3/pwm3-pin";
+ pwm4_pin = "/pinctrl/pwm4/pwm4-pin";
+ pwm5_pin = "/pinctrl/pwm5/pwm5-pin";
+ pwm6_pin = "/pinctrl/pwm6/pwm6-pin";
+ pwm7_pin = "/pinctrl/pwm7/pwm7-pin";
+ rmii_pins = "/pinctrl/gmac/rmii-pins";
+ mac_refclk_12ma = "/pinctrl/gmac/mac-refclk-12ma";
+ mac_refclk = "/pinctrl/gmac/mac-refclk";
+ cif_clkout_m0 = "/pinctrl/cif-m0/cif-clkout-m0";
+ dvp_d2d9_m0 = "/pinctrl/cif-m0/dvp-d2d9-m0";
+ dvp_d0d1_m0 = "/pinctrl/cif-m0/dvp-d0d1-m0";
+ dvp_d10d11_m0 = "/pinctrl/cif-m0/d10-d11-m0";
+ cif_clkout_m1 = "/pinctrl/cif-m1/cif-clkout-m1";
+ dvp_d2d9_m1 = "/pinctrl/cif-m1/dvp-d2d9-m1";
+ dvp_d0d1_m1 = "/pinctrl/cif-m1/dvp-d0d1-m1";
+ dvp_d10d11_m1 = "/pinctrl/cif-m1/d10-d11-m1";
+ isp_prelight = "/pinctrl/isp/isp-prelight";
+ pmic_int = "/pinctrl/pmic/pmic_int";
+ soc_slppin_gpio = "/pinctrl/pmic/soc_slppin_gpio";
+ soc_slppin_slp = "/pinctrl/pmic/soc_slppin_slp";
+ soc_slppin_rst = "/pinctrl/pmic/soc_slppin_rst";
+ led_pins = "/pinctrl/leds/led-pins";
+ btn_pins = "/pinctrl/btns/btn-pins";
+ drm_logo = "/reserved-memory/drm-logo@00000000";
+ ramoops_mem = "/reserved-memory/region@110000";
+ gpio_keys = "/odroidgo3-keys";
+ joypad = "/odroidgo3-joypad";
+ leds = "/gpio_leds";
+ backlight = "/backlight";
+ vccsys = "/vccsys";
+ };
+};
diff --git a/config/archr-dts/R36S-DTB/DTS/R36S-Plus.dts b/config/archr-dts/R36S-DTB/DTS/R36S-Plus.dts
new file mode 100644
index 0000000000..a6a3d3e9d2
--- /dev/null
+++ b/config/archr-dts/R36S-DTB/DTS/R36S-Plus.dts
@@ -0,0 +1,4018 @@
+/dts-v1/;
+
+/ {
+ compatible = "rockchip,rk3326-odroidgo3-linux\0rockchip,rk3326";
+ interrupt-parent = <0x01>;
+ #address-cells = <0x02>;
+ #size-cells = <0x02>;
+ model = "Hardkernel ODROID-GO3";
+
+ ddr_timing {
+ compatible = "rockchip,ddr-timing";
+ ddr2_speed_bin = <0x00>;
+ ddr3_speed_bin = <0x15>;
+ ddr4_speed_bin = <0x0c>;
+ pd_idle = <0x0d>;
+ sr_idle = <0x5d>;
+ sr_mc_gate_idle = <0x00>;
+ srpd_lite_idle = <0x00>;
+ standby_idle = <0x00>;
+ auto_pd_dis_freq = <0x42a>;
+ auto_sr_dis_freq = <0x320>;
+ ddr2_dll_dis_freq = <0x12c>;
+ ddr3_dll_dis_freq = <0x12c>;
+ ddr4_dll_dis_freq = <0x271>;
+ phy_dll_dis_freq = <0x190>;
+ ddr2_odt_dis_freq = <0x64>;
+ phy_ddr2_odt_dis_freq = <0x64>;
+ ddr2_drv = <0x01>;
+ ddr2_odt = <0x96>;
+ phy_ddr2_ca_drv = <0x15>;
+ phy_ddr2_ck_drv = <0x12>;
+ phy_ddr2_dq_drv = <0x15>;
+ phy_ddr2_odt = <0x02>;
+ ddr3_odt_dis_freq = <0x190>;
+ phy_ddr3_odt_dis_freq = <0x190>;
+ ddr3_drv = <0x28>;
+ ddr3_odt = <0x78>;
+ phy_ddr3_ca_drv = <0x15>;
+ phy_ddr3_ck_drv = <0x12>;
+ phy_ddr3_dq_drv = <0x15>;
+ phy_ddr3_odt = <0x02>;
+ phy_lpddr2_odt_dis_freq = <0x29a>;
+ lpddr2_drv = <0x28>;
+ phy_lpddr2_ca_drv = <0x16>;
+ phy_lpddr2_ck_drv = <0x13>;
+ phy_lpddr2_dq_drv = <0x16>;
+ phy_lpddr2_odt = <0x00>;
+ lpddr3_odt_dis_freq = <0x190>;
+ phy_lpddr3_odt_dis_freq = <0x190>;
+ lpddr3_drv = <0x28>;
+ lpddr3_odt = <0xf0>;
+ phy_lpddr3_ca_drv = <0x16>;
+ phy_lpddr3_ck_drv = <0x13>;
+ phy_lpddr3_dq_drv = <0x16>;
+ phy_lpddr3_odt = <0x02>;
+ lpddr4_odt_dis_freq = <0x320>;
+ phy_lpddr4_odt_dis_freq = <0x320>;
+ lpddr4_drv = <0x3c>;
+ lpddr4_dq_odt = <0x28>;
+ lpddr4_ca_odt = <0x28>;
+ phy_lpddr4_ca_drv = <0x14>;
+ phy_lpddr4_ck_cs_drv = <0x06>;
+ phy_lpddr4_dq_drv = <0x06>;
+ phy_lpddr4_odt = <0x10>;
+ ddr4_odt_dis_freq = <0x29a>;
+ phy_ddr4_odt_dis_freq = <0x29a>;
+ ddr4_drv = <0x22>;
+ ddr4_odt = <0xf0>;
+ phy_ddr4_ca_drv = <0x16>;
+ phy_ddr4_ck_drv = <0x13>;
+ phy_ddr4_dq_drv = <0x16>;
+ phy_ddr4_odt = <0x02>;
+ ddr3a1_ddr4a9_de-skew = <0x06>;
+ ddr3a0_ddr4a10_de-skew = <0x07>;
+ ddr3a3_ddr4a6_de-skew = <0x07>;
+ ddr3a2_ddr4a4_de-skew = <0x07>;
+ ddr3a5_ddr4a8_de-skew = <0x07>;
+ ddr3a4_ddr4a5_de-skew = <0x07>;
+ ddr3a7_ddr4a11_de-skew = <0x07>;
+ ddr3a6_ddr4a7_de-skew = <0x06>;
+ ddr3a9_ddr4a0_de-skew = <0x07>;
+ ddr3a8_ddr4a13_de-skew = <0x07>;
+ ddr3a11_ddr4a3_de-skew = <0x07>;
+ ddr3a10_ddr4cs0_de-skew = <0x07>;
+ ddr3a13_ddr4a2_de-skew = <0x07>;
+ ddr3a12_ddr4ba1_de-skew = <0x07>;
+ ddr3a15_ddr4odt0_de-skew = <0x07>;
+ ddr3a14_ddr4a1_de-skew = <0x07>;
+ ddr3ba1_ddr4a15_de-skew = <0x07>;
+ ddr3ba0_ddr4bg0_de-skew = <0x07>;
+ ddr3ras_ddr4cke_de-skew = <0x07>;
+ ddr3ba2_ddr4ba0_de-skew = <0x07>;
+ ddr3we_ddr4bg1_de-skew = <0x07>;
+ ddr3cas_ddr4a12_de-skew = <0x07>;
+ ddr3ckn_ddr4ckn_de-skew = <0x07>;
+ ddr3ckp_ddr4ckp_de-skew = <0x07>;
+ ddr3cke_ddr4a16_de-skew = <0x07>;
+ ddr3odt0_ddr4a14_de-skew = <0x07>;
+ ddr3cs0_ddr4act_de-skew = <0x06>;
+ ddr3reset_ddr4reset_de-skew = <0x07>;
+ ddr3cs1_ddr4cs1_de-skew = <0x06>;
+ ddr3odt1_ddr4odt1_de-skew = <0x07>;
+ cs0_dm0_rx_de-skew = <0x07>;
+ cs0_dm0_tx_de-skew = <0x07>;
+ cs0_dq0_rx_de-skew = <0x08>;
+ cs0_dq0_tx_de-skew = <0x08>;
+ cs0_dq1_rx_de-skew = <0x09>;
+ cs0_dq1_tx_de-skew = <0x08>;
+ cs0_dq2_rx_de-skew = <0x08>;
+ cs0_dq2_tx_de-skew = <0x08>;
+ cs0_dq3_rx_de-skew = <0x08>;
+ cs0_dq3_tx_de-skew = <0x08>;
+ cs0_dq4_rx_de-skew = <0x09>;
+ cs0_dq4_tx_de-skew = <0x08>;
+ cs0_dq5_rx_de-skew = <0x09>;
+ cs0_dq5_tx_de-skew = <0x08>;
+ cs0_dq6_rx_de-skew = <0x09>;
+ cs0_dq6_tx_de-skew = <0x08>;
+ cs0_dq7_rx_de-skew = <0x08>;
+ cs0_dq7_tx_de-skew = <0x08>;
+ cs0_dqs0_rx_de-skew = <0x06>;
+ cs0_dqs0p_tx_de-skew = <0x09>;
+ cs0_dqs0n_tx_de-skew = <0x09>;
+ cs0_dm1_rx_de-skew = <0x07>;
+ cs0_dm1_tx_de-skew = <0x06>;
+ cs0_dq8_rx_de-skew = <0x08>;
+ cs0_dq8_tx_de-skew = <0x07>;
+ cs0_dq9_rx_de-skew = <0x09>;
+ cs0_dq9_tx_de-skew = <0x07>;
+ cs0_dq10_rx_de-skew = <0x08>;
+ cs0_dq10_tx_de-skew = <0x08>;
+ cs0_dq11_rx_de-skew = <0x08>;
+ cs0_dq11_tx_de-skew = <0x07>;
+ cs0_dq12_rx_de-skew = <0x08>;
+ cs0_dq12_tx_de-skew = <0x08>;
+ cs0_dq13_rx_de-skew = <0x09>;
+ cs0_dq13_tx_de-skew = <0x07>;
+ cs0_dq14_rx_de-skew = <0x09>;
+ cs0_dq14_tx_de-skew = <0x08>;
+ cs0_dq15_rx_de-skew = <0x09>;
+ cs0_dq15_tx_de-skew = <0x07>;
+ cs0_dqs1_rx_de-skew = <0x07>;
+ cs0_dqs1p_tx_de-skew = <0x09>;
+ cs0_dqs1n_tx_de-skew = <0x09>;
+ cs0_dm2_rx_de-skew = <0x07>;
+ cs0_dm2_tx_de-skew = <0x07>;
+ cs0_dq16_rx_de-skew = <0x09>;
+ cs0_dq16_tx_de-skew = <0x09>;
+ cs0_dq17_rx_de-skew = <0x07>;
+ cs0_dq17_tx_de-skew = <0x09>;
+ cs0_dq18_rx_de-skew = <0x07>;
+ cs0_dq18_tx_de-skew = <0x08>;
+ cs0_dq19_rx_de-skew = <0x07>;
+ cs0_dq19_tx_de-skew = <0x09>;
+ cs0_dq20_rx_de-skew = <0x09>;
+ cs0_dq20_tx_de-skew = <0x09>;
+ cs0_dq21_rx_de-skew = <0x09>;
+ cs0_dq21_tx_de-skew = <0x09>;
+ cs0_dq22_rx_de-skew = <0x08>;
+ cs0_dq22_tx_de-skew = <0x09>;
+ cs0_dq23_rx_de-skew = <0x08>;
+ cs0_dq23_tx_de-skew = <0x09>;
+ cs0_dqs2_rx_de-skew = <0x06>;
+ cs0_dqs2p_tx_de-skew = <0x09>;
+ cs0_dqs2n_tx_de-skew = <0x09>;
+ cs0_dm3_rx_de-skew = <0x07>;
+ cs0_dm3_tx_de-skew = <0x07>;
+ cs0_dq24_rx_de-skew = <0x08>;
+ cs0_dq24_tx_de-skew = <0x08>;
+ cs0_dq25_rx_de-skew = <0x09>;
+ cs0_dq25_tx_de-skew = <0x09>;
+ cs0_dq26_rx_de-skew = <0x09>;
+ cs0_dq26_tx_de-skew = <0x08>;
+ cs0_dq27_rx_de-skew = <0x09>;
+ cs0_dq27_tx_de-skew = <0x08>;
+ cs0_dq28_rx_de-skew = <0x09>;
+ cs0_dq28_tx_de-skew = <0x09>;
+ cs0_dq29_rx_de-skew = <0x09>;
+ cs0_dq29_tx_de-skew = <0x09>;
+ cs0_dq30_rx_de-skew = <0x08>;
+ cs0_dq30_tx_de-skew = <0x08>;
+ cs0_dq31_rx_de-skew = <0x08>;
+ cs0_dq31_tx_de-skew = <0x08>;
+ cs0_dqs3_rx_de-skew = <0x07>;
+ cs0_dqs3p_tx_de-skew = <0x09>;
+ cs0_dqs3n_tx_de-skew = <0x09>;
+ cs1_dm0_rx_de-skew = <0x07>;
+ cs1_dm0_tx_de-skew = <0x07>;
+ cs1_dq0_rx_de-skew = <0x08>;
+ cs1_dq0_tx_de-skew = <0x08>;
+ cs1_dq1_rx_de-skew = <0x09>;
+ cs1_dq1_tx_de-skew = <0x08>;
+ cs1_dq2_rx_de-skew = <0x08>;
+ cs1_dq2_tx_de-skew = <0x08>;
+ cs1_dq3_rx_de-skew = <0x08>;
+ cs1_dq3_tx_de-skew = <0x08>;
+ cs1_dq4_rx_de-skew = <0x08>;
+ cs1_dq4_tx_de-skew = <0x08>;
+ cs1_dq5_rx_de-skew = <0x09>;
+ cs1_dq5_tx_de-skew = <0x08>;
+ cs1_dq6_rx_de-skew = <0x09>;
+ cs1_dq6_tx_de-skew = <0x08>;
+ cs1_dq7_rx_de-skew = <0x08>;
+ cs1_dq7_tx_de-skew = <0x08>;
+ cs1_dqs0_rx_de-skew = <0x06>;
+ cs1_dqs0p_tx_de-skew = <0x09>;
+ cs1_dqs0n_tx_de-skew = <0x09>;
+ cs1_dm1_rx_de-skew = <0x07>;
+ cs1_dm1_tx_de-skew = <0x07>;
+ cs1_dq8_rx_de-skew = <0x08>;
+ cs1_dq8_tx_de-skew = <0x08>;
+ cs1_dq9_rx_de-skew = <0x08>;
+ cs1_dq9_tx_de-skew = <0x07>;
+ cs1_dq10_rx_de-skew = <0x07>;
+ cs1_dq10_tx_de-skew = <0x08>;
+ cs1_dq11_rx_de-skew = <0x08>;
+ cs1_dq11_tx_de-skew = <0x08>;
+ cs1_dq12_rx_de-skew = <0x08>;
+ cs1_dq12_tx_de-skew = <0x07>;
+ cs1_dq13_rx_de-skew = <0x08>;
+ cs1_dq13_tx_de-skew = <0x08>;
+ cs1_dq14_rx_de-skew = <0x08>;
+ cs1_dq14_tx_de-skew = <0x08>;
+ cs1_dq15_rx_de-skew = <0x08>;
+ cs1_dq15_tx_de-skew = <0x07>;
+ cs1_dqs1_rx_de-skew = <0x07>;
+ cs1_dqs1p_tx_de-skew = <0x09>;
+ cs1_dqs1n_tx_de-skew = <0x09>;
+ cs1_dm2_rx_de-skew = <0x07>;
+ cs1_dm2_tx_de-skew = <0x08>;
+ cs1_dq16_rx_de-skew = <0x08>;
+ cs1_dq16_tx_de-skew = <0x09>;
+ cs1_dq17_rx_de-skew = <0x08>;
+ cs1_dq17_tx_de-skew = <0x09>;
+ cs1_dq18_rx_de-skew = <0x07>;
+ cs1_dq18_tx_de-skew = <0x08>;
+ cs1_dq19_rx_de-skew = <0x08>;
+ cs1_dq19_tx_de-skew = <0x09>;
+ cs1_dq20_rx_de-skew = <0x09>;
+ cs1_dq20_tx_de-skew = <0x09>;
+ cs1_dq21_rx_de-skew = <0x09>;
+ cs1_dq21_tx_de-skew = <0x09>;
+ cs1_dq22_rx_de-skew = <0x08>;
+ cs1_dq22_tx_de-skew = <0x09>;
+ cs1_dq23_rx_de-skew = <0x08>;
+ cs1_dq23_tx_de-skew = <0x09>;
+ cs1_dqs2_rx_de-skew = <0x06>;
+ cs1_dqs2p_tx_de-skew = <0x09>;
+ cs1_dqs2n_tx_de-skew = <0x09>;
+ cs1_dm3_rx_de-skew = <0x07>;
+ cs1_dm3_tx_de-skew = <0x07>;
+ cs1_dq24_rx_de-skew = <0x08>;
+ cs1_dq24_tx_de-skew = <0x09>;
+ cs1_dq25_rx_de-skew = <0x09>;
+ cs1_dq25_tx_de-skew = <0x09>;
+ cs1_dq26_rx_de-skew = <0x09>;
+ cs1_dq26_tx_de-skew = <0x08>;
+ cs1_dq27_rx_de-skew = <0x08>;
+ cs1_dq27_tx_de-skew = <0x08>;
+ cs1_dq28_rx_de-skew = <0x09>;
+ cs1_dq28_tx_de-skew = <0x09>;
+ cs1_dq29_rx_de-skew = <0x09>;
+ cs1_dq29_tx_de-skew = <0x09>;
+ cs1_dq30_rx_de-skew = <0x09>;
+ cs1_dq30_tx_de-skew = <0x08>;
+ cs1_dq31_rx_de-skew = <0x08>;
+ cs1_dq31_tx_de-skew = <0x08>;
+ cs1_dqs3_rx_de-skew = <0x07>;
+ cs1_dqs3p_tx_de-skew = <0x09>;
+ cs1_dqs3n_tx_de-skew = <0x09>;
+ phandle = <0xaf>;
+ };
+
+ aliases {
+ ethernet0 = "/ethernet@ff360000";
+ i2c0 = "/i2c@ff180000";
+ i2c1 = "/i2c@ff190000";
+ i2c2 = "/i2c@ff1a0000";
+ i2c3 = "/i2c@ff1b0000";
+ serial0 = "/serial@ff030000";
+ serial1 = "/serial@ff158000";
+ serial2 = "/serial@ff160000";
+ serial3 = "/serial@ff168000";
+ serial4 = "/serial@ff170000";
+ serial5 = "/serial@ff178000";
+ spi0 = "/spi@ff1d0000";
+ spi1 = "/spi@ff1d8000";
+ };
+
+ cpus {
+ #address-cells = <0x02>;
+ #size-cells = <0x00>;
+
+ cpu@0 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a35\0arm,armv8";
+ reg = <0x00 0x00>;
+ enable-method = "psci";
+ clocks = <0x02 0x07>;
+ #cooling-cells = <0x02>;
+ dynamic-power-coefficient = <0x5a>;
+ operating-points-v2 = <0x03>;
+ cpu-idle-states = <0x04 0x05>;
+ cpu-supply = <0x06>;
+ phandle = <0x09>;
+ };
+
+ cpu@1 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a35\0arm,armv8";
+ reg = <0x00 0x01>;
+ enable-method = "psci";
+ operating-points-v2 = <0x03>;
+ cpu-idle-states = <0x04 0x05>;
+ phandle = <0x0a>;
+ };
+
+ cpu@2 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a35\0arm,armv8";
+ reg = <0x00 0x02>;
+ enable-method = "psci";
+ operating-points-v2 = <0x03>;
+ cpu-idle-states = <0x04 0x05>;
+ phandle = <0x0b>;
+ };
+
+ cpu@3 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a35\0arm,armv8";
+ reg = <0x00 0x03>;
+ enable-method = "psci";
+ operating-points-v2 = <0x03>;
+ cpu-idle-states = <0x04 0x05>;
+ phandle = <0x0c>;
+ };
+
+ idle-states {
+ entry-method = "psci";
+
+ cpu-sleep {
+ compatible = "arm,idle-state";
+ local-timer-stop;
+ arm,psci-suspend-param = <0x10000>;
+ entry-latency-us = <0x78>;
+ exit-latency-us = <0xfa>;
+ min-residency-us = <0x384>;
+ phandle = <0x04>;
+ };
+
+ cluster-sleep {
+ compatible = "arm,idle-state";
+ local-timer-stop;
+ arm,psci-suspend-param = <0x1010000>;
+ entry-latency-us = <0x190>;
+ exit-latency-us = <0x1f4>;
+ min-residency-us = <0x7d0>;
+ phandle = <0x05>;
+ };
+ };
+ };
+
+ cpu0-opp-table {
+ compatible = "operating-points-v2";
+ opp-shared;
+ rockchip,temp-hysteresis = <0x1388>;
+ rockchip,low-temp = <0x00>;
+ rockchip,low-temp-min-volt = <0xf4240>;
+ rockchip,low-temp-adjust-volt = <0x00 0x5e8 0xc350>;
+ clocks = <0x02 0x01>;
+ rockchip,avs-scale = <0x04>;
+ rockchip,max-volt = <0x149970>;
+ rockchip,evb-irdrop = <0x61a8>;
+ nvmem-cells = <0x07 0x08>;
+ nvmem-cell-names = "cpu_leakage\0performance";
+ rockchip,bin-scaling-sel = <0x00 0x0d 0x01 0x0d>;
+ rockchip,pvtm-voltage-sel = <0x00 0xc350 0x00 0xc351 0xd2f0 0x01 0xd2f1 0xea60 0x02 0xea61 0x1869f 0x03>;
+ rockchip,pvtm-freq = <0x639c0>;
+ rockchip,pvtm-volt = <0xf4240>;
+ rockchip,pvtm-ch = <0x00 0x00>;
+ rockchip,pvtm-sample-time = <0x3e8>;
+ rockchip,pvtm-number = <0x0a>;
+ rockchip,pvtm-error = <0x3e8>;
+ rockchip,pvtm-ref-temp = <0x28>;
+ rockchip,pvtm-temp-prop = <0xffffffc8 0xffffffc8>;
+ rockchip,thermal-zone = "soc-thermal";
+ rockchip,avs = <0x01>;
+ phandle = <0x03>;
+
+ opp-1008000000 {
+ opp-hz = <0x00 0x3c14dc00>;
+ opp-microvolt = <0x11edd8 0x11edd8 0x149970>;
+ opp-microvolt-L0 = <0x11edd8 0x11edd8 0x149970>;
+ opp-microvolt-L1 = <0x112a88 0x112a88 0x149970>;
+ opp-microvolt-L2 = <0x112a88 0x112a88 0x149970>;
+ opp-microvolt-L3 = <0x100590 0x100590 0x149970>;
+ clock-latency-ns = <0x9c40>;
+ };
+
+ opp-1200000000 {
+ opp-hz = <0x00 0x47868c00>;
+ opp-microvolt = <0x13d620 0x13d620 0x149970>;
+ opp-microvolt-L0 = <0x13d620 0x13d620 0x149970>;
+ opp-microvolt-L1 = <0x137478 0x137478 0x149970>;
+ opp-microvolt-L2 = <0x1312d0 0x1312d0 0x149970>;
+ opp-microvolt-L3 = <0x124f80 0x124f80 0x149970>;
+ clock-latency-ns = <0x9c40>;
+ };
+
+ opp-1248000000 {
+ opp-hz = <0x00 0x4a62f800>;
+ opp-microvolt = <0x149970 0x149970 0x149970>;
+ opp-microvolt-L0 = <0x149970 0x149970 0x149970>;
+ opp-microvolt-L1 = <0x13d620 0x13d620 0x149970>;
+ opp-microvolt-L2 = <0x137478 0x137478 0x149970>;
+ opp-microvolt-L3 = <0x12b128 0x12b128 0x149970>;
+ clock-latency-ns = <0x9c40>;
+ };
+
+ opp-1296000000 {
+ opp-hz = <0x00 0x4d3f6400>;
+ opp-microvolt = <0x149970 0x149970 0x149970>;
+ opp-microvolt-L0 = <0x149970 0x149970 0x149970>;
+ opp-microvolt-L1 = <0x149970 0x149970 0x149970>;
+ opp-microvolt-L2 = <0x13d620 0x13d620 0x149970>;
+ opp-microvolt-L3 = <0x1312d0 0x1312d0 0x149970>;
+ clock-latency-ns = <0x9c40>;
+ };
+ };
+
+ arm-pmu {
+ compatible = "arm,cortex-a53-pmu";
+ interrupts = <0x00 0x64 0x04 0x00 0x65 0x04 0x00 0x66 0x04 0x00 0x67 0x04>;
+ interrupt-affinity = <0x09 0x0a 0x0b 0x0c>;
+ };
+
+ bus-soc {
+ compatible = "rockchip,px30-bus";
+ rockchip,busfreq-policy = "autocs";
+ phandle = <0xc4>;
+
+ soc-bus0 {
+ bus-id = <0x00>;
+ timer-us = <0x14>;
+ enable-msk = <0x40f7>;
+ status = "disabled";
+ };
+
+ soc-bus1 {
+ bus-id = <0x01>;
+ timer-us = <0xc8>;
+ enable-msk = <0x40bf>;
+ status = "disabled";
+ };
+
+ soc-bus2 {
+ bus-id = <0x02>;
+ timer-us = <0xc8>;
+ enable-msk = <0x4007>;
+ status = "disabled";
+ };
+ };
+
+ bus-apll {
+ compatible = "rockchip,px30-bus";
+ rockchip,busfreq-policy = "clkfreq";
+ clocks = <0x02 0x01>;
+ clock-names = "bus";
+ operating-points-v2 = <0x0d>;
+ status = "okay";
+ bus-supply = <0x0e>;
+ phandle = <0xc5>;
+ };
+
+ bus-apll-opp-table {
+ compatible = "operating-points-v2";
+ opp-shared;
+ phandle = <0x0d>;
+
+ opp-1512000000 {
+ opp-hz = <0x00 0x5a1f4a00>;
+ opp-microvolt = <0xf4240>;
+ };
+
+ opp-1008000000 {
+ opp-hz = <0x00 0x3c14dc00>;
+ opp-microvolt = <0xe7ef0>;
+ };
+ };
+
+ cpuinfo {
+ compatible = "rockchip,cpuinfo";
+ nvmem-cells = <0x0f>;
+ nvmem-cell-names = "id";
+ };
+
+ display-subsystem {
+ compatible = "rockchip,display-subsystem";
+ ports = <0x10>;
+ status = "okay";
+ logo-memory-region = <0x11>;
+ phandle = <0xc6>;
+
+ route {
+
+ route-lvds {
+ status = "disabled";
+ logo,uboot = "logo.bmp";
+ logo,kernel = "logo_kernel.bmp";
+ logo,mode = "center";
+ charge_logo,mode = "center";
+ connect = <0x12>;
+ phandle = <0xc7>;
+ };
+
+ route-dsi {
+ status = "okay";
+ logo,uboot = "logo.bmp";
+ logo,kernel = "logo_kernel.bmp";
+ logo,mode = "center";
+ charge_logo,mode = "center";
+ connect = <0x13>;
+ phandle = <0xc8>;
+ };
+
+ route-rgb {
+ status = "disabled";
+ logo,uboot = "logo.bmp";
+ logo,kernel = "logo_kernel.bmp";
+ logo,mode = "center";
+ charge_logo,mode = "center";
+ connect = <0x14>;
+ phandle = <0xc9>;
+ };
+ };
+ };
+
+ firmware {
+
+ optee {
+ compatible = "linaro,optee-tz";
+ method = "smc";
+ };
+ };
+
+ external-gmac-clock {
+ compatible = "fixed-clock";
+ clock-frequency = <0x2faf080>;
+ clock-output-names = "gmac_clkin";
+ #clock-cells = <0x00>;
+ phandle = <0xca>;
+ };
+
+ psci {
+ compatible = "arm,psci-1.0";
+ method = "smc";
+ };
+
+ rockchip-suspend {
+ compatible = "rockchip,pm-px30";
+ status = "okay";
+ rockchip,sleep-debug-en = <0x01>;
+ rockchip,sleep-mode-config = <0x20702>;
+ rockchip,wakeup-config = <0x85>;
+ phandle = <0xcb>;
+ };
+
+ timer {
+ compatible = "arm,armv8-timer";
+ interrupts = <0x01 0x0d 0xf04 0x01 0x0e 0xf04 0x01 0x0b 0xf04 0x01 0x0a 0xf04>;
+ };
+
+ xin24m {
+ compatible = "fixed-clock";
+ #clock-cells = <0x00>;
+ clock-frequency = <0x16e3600>;
+ clock-output-names = "xin24m";
+ phandle = <0xcc>;
+ };
+
+ xin32k {
+ compatible = "fixed-clock";
+ #clock-cells = <0x00>;
+ clock-frequency = <0x8000>;
+ clock-output-names = "xin32k";
+ phandle = <0xcd>;
+ };
+
+ power-management@ff000000 {
+ compatible = "rockchip,px30-pmu\0syscon\0simple-mfd";
+ reg = <0x00 0xff000000 0x00 0x1000>;
+ phandle = <0xce>;
+
+ power-controller {
+ compatible = "rockchip,px30-power-controller";
+ #power-domain-cells = <0x01>;
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+ phandle = <0x8a>;
+
+ pd_usb@5 {
+ reg = <0x05>;
+ clocks = <0x02 0x103 0x02 0x102 0x02 0x3c>;
+ pm_qos = <0x15 0x16>;
+ };
+
+ pd_sdcard@7 {
+ reg = <0x07>;
+ clocks = <0x02 0xf7 0x02 0x3b>;
+ pm_qos = <0x17>;
+ };
+
+ pd_gmac@9 {
+ reg = <0x09>;
+ clocks = <0x02 0xb2 0x02 0x143 0x02 0x40 0x02 0x3f>;
+ pm_qos = <0x18>;
+ };
+
+ pd_mmc_nand@10 {
+ reg = <0x0a>;
+ clocks = <0x02 0xfe 0x02 0x100 0x02 0xff 0x02 0x101 0x02 0x39 0x02 0x37 0x02 0x38 0x02 0x3a>;
+ pm_qos = <0x19 0x1a 0x1b 0x1c>;
+ };
+
+ pd_vpu@11 {
+ reg = <0x0b>;
+ clocks = <0x02 0xaf 0x02 0xf4 0x02 0x4b>;
+ pm_qos = <0x1d 0x1e>;
+ };
+
+ pd_vo@12 {
+ reg = <0x0c>;
+ clocks = <0x02 0xb7 0x02 0xb5 0x02 0xb6 0x02 0x96 0x02 0x97 0x02 0xfd 0x02 0xfb 0x02 0xfc 0x02 0x144 0x02 0x35 0x02 0x36>;
+ pm_qos = <0x1f 0x20 0x21 0x22>;
+ };
+
+ pd_vi@13 {
+ reg = <0x0d>;
+ clocks = <0x02 0xb3 0x02 0xb4 0x02 0xf9 0x02 0xfa 0x02 0x33>;
+ pm_qos = <0x23 0x24 0x25 0x26 0x27>;
+ };
+
+ pd_gpu@14 {
+ reg = <0x0e>;
+ clocks = <0x02 0x49>;
+ pm_qos = <0x28>;
+ };
+ };
+ };
+
+ syscon@ff010000 {
+ compatible = "rockchip,px30-pmugrf\0syscon\0simple-mfd";
+ reg = <0x00 0xff010000 0x00 0x1000>;
+ #address-cells = <0x01>;
+ #size-cells = <0x01>;
+ phandle = <0xac>;
+
+ io-domains {
+ compatible = "rockchip,px30-pmu-io-voltage-domain";
+ status = "okay";
+ pmuio1-supply = <0x29>;
+ pmuio2-supply = <0x29>;
+ phandle = <0xcf>;
+ };
+
+ reboot-mode {
+ compatible = "syscon-reboot-mode";
+ offset = <0x200>;
+ mode-bootloader = <0x5242c301>;
+ mode-charge = <0x5242c30b>;
+ mode-fastboot = <0x5242c309>;
+ mode-loader = <0x5242c301>;
+ mode-normal = <0x5242c300>;
+ mode-recovery = <0x5242c303>;
+ mode-ums = <0x5242c30c>;
+ };
+
+ pmu-pvtm {
+ compatible = "rockchip,px30-pmu-pvtm";
+ clocks = <0x2a 0x07>;
+ clock-names = "pmu";
+ status = "okay";
+ phandle = <0xd0>;
+ };
+ };
+
+ serial@ff030000 {
+ compatible = "rockchip,px30-uart\0snps,dw-apb-uart";
+ reg = <0x00 0xff030000 0x00 0x100>;
+ interrupts = <0x00 0x0f 0x04>;
+ clocks = <0x2a 0x06 0x2a 0x15>;
+ clock-names = "baudclk\0apb_pclk";
+ reg-shift = <0x02>;
+ reg-io-width = <0x04>;
+ dmas = <0x2b 0x00 0x2b 0x01>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x2c 0x2d 0x2e>;
+ status = "disabled";
+ phandle = <0xd1>;
+ };
+
+ i2s@ff060000 {
+ compatible = "rockchip,px30-i2s-tdm";
+ reg = <0x00 0xff060000 0x00 0x1000>;
+ interrupts = <0x00 0x0c 0x04>;
+ clocks = <0x02 0x10 0x02 0x12 0x02 0x106>;
+ clock-names = "mclk_tx\0mclk_rx\0hclk";
+ dmas = <0x2b 0x10 0x2b 0x11>;
+ dma-names = "tx\0rx";
+ resets = <0x02 0x84 0x02 0xbf>;
+ reset-names = "tx-m\0rx-m";
+ rockchip,cru = <0x02>;
+ rockchip,grf = <0x2f>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x30 0x31 0x32 0x33 0x34 0x35 0x36 0x37 0x38 0x39 0x3a 0x3b>;
+ status = "disabled";
+ phandle = <0xd2>;
+ };
+
+ i2s@ff070000 {
+ compatible = "rockchip,px30-i2s\0rockchip,rk3066-i2s";
+ reg = <0x00 0xff070000 0x00 0x1000>;
+ interrupts = <0x00 0x0d 0x04>;
+ clocks = <0x02 0x14 0x02 0x107>;
+ clock-names = "i2s_clk\0i2s_hclk";
+ dmas = <0x2b 0x12 0x2b 0x13>;
+ dma-names = "tx\0rx";
+ resets = <0x02 0x86 0x02 0x85>;
+ reset-names = "reset-m\0reset-h";
+ pinctrl-names = "default";
+ pinctrl-0 = <0x3c 0x3d 0x3e 0x3f>;
+ status = "okay";
+ #sound-dai-cells = <0x00>;
+ phandle = <0xc2>;
+ };
+
+ i2s@ff080000 {
+ compatible = "rockchip,px30-i2s\0rockchip,rk3066-i2s";
+ reg = <0x00 0xff080000 0x00 0x1000>;
+ interrupts = <0x00 0x0e 0x04>;
+ clocks = <0x02 0x16 0x02 0x108>;
+ clock-names = "i2s_clk\0i2s_hclk";
+ dmas = <0x2b 0x14 0x2b 0x15>;
+ dma-names = "tx\0rx";
+ resets = <0x02 0x88 0x02 0x87>;
+ reset-names = "reset-m\0reset-h";
+ pinctrl-names = "default";
+ pinctrl-0 = <0x40 0x41 0x42 0x43>;
+ status = "disabled";
+ phandle = <0xd3>;
+ };
+
+ pdm@ff0a0000 {
+ compatible = "rockchip,px30-pdm\0rockchip,pdm";
+ reg = <0x00 0xff0a0000 0x00 0x1000>;
+ clocks = <0x02 0x0f 0x02 0x105>;
+ clock-names = "pdm_clk\0pdm_hclk";
+ dmas = <0x2b 0x18>;
+ dma-names = "rx";
+ resets = <0x02 0x82>;
+ reset-names = "pdm-m";
+ pinctrl-names = "default";
+ pinctrl-0 = <0x44 0x45 0x46 0x47 0x48 0x49>;
+ status = "disabled";
+ phandle = <0xd4>;
+ };
+
+ crypto@ff0b0000 {
+ compatible = "rockchip,px30-crypto";
+ reg = <0x00 0xff0b0000 0x00 0x4000>;
+ interrupts = <0x00 0x52 0x04>;
+ clocks = <0x02 0xac 0x02 0xf1 0x02 0x30 0x02 0x31>;
+ clock-names = "aclk\0hclk\0sclk\0apb_pclk";
+ resets = <0x02 0x74>;
+ reset-names = "crypto-rst";
+ status = "disabled";
+ phandle = <0xd5>;
+ };
+
+ rng@ff0b0000 {
+ compatible = "rockchip,cryptov2-rng";
+ reg = <0x00 0xff0b0000 0x00 0x4000>;
+ clocks = <0x02 0x30 0x02 0x31 0x02 0xac 0x02 0xf1>;
+ clock-names = "clk_crypto\0clk_crypto_apk\0aclk_crypto\0hclk_crypto";
+ assigned-clocks = <0x02 0x30 0x02 0x31 0x02 0xac 0x02 0xf1>;
+ assigned-clock-rates = <0x8f0d180 0x8f0d180 0xbebc200 0x5f5e100>;
+ resets = <0x02 0x74>;
+ reset-names = "reset";
+ status = "okay";
+ phandle = <0xd6>;
+ };
+
+ interrupt-controller@ff131000 {
+ compatible = "arm,gic-400";
+ #interrupt-cells = <0x03>;
+ #address-cells = <0x00>;
+ interrupt-controller;
+ reg = <0x00 0xff131000 0x00 0x1000 0x00 0xff132000 0x00 0x2000 0x00 0xff134000 0x00 0x2000 0x00 0xff136000 0x00 0x2000>;
+ interrupts = <0x01 0x09 0xf04>;
+ phandle = <0x01>;
+ };
+
+ syscon@ff140000 {
+ compatible = "rockchip,px30-grf\0syscon\0simple-mfd";
+ reg = <0x00 0xff140000 0x00 0x1000>;
+ #address-cells = <0x01>;
+ #size-cells = <0x01>;
+ phandle = <0x2f>;
+
+ io-domains {
+ compatible = "rockchip,px30-io-voltage-domain";
+ status = "okay";
+ vccio1-supply = <0x4a>;
+ vccio2-supply = <0x4a>;
+ vccio3-supply = <0x4b>;
+ vccio4-supply = <0x4b>;
+ vccio5-supply = <0x4b>;
+ vccio6-supply = <0x4b>;
+ phandle = <0xd7>;
+ };
+
+ lvds {
+ compatible = "rockchip,px30-lvds";
+ phys = <0x4c>;
+ phy-names = "phy";
+ status = "disabled";
+ phandle = <0xd8>;
+
+ ports {
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+
+ port@0 {
+ reg = <0x00>;
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+
+ endpoint@0 {
+ reg = <0x00>;
+ remote-endpoint = <0x12>;
+ phandle = <0xa2>;
+ };
+ };
+ };
+ };
+
+ rgb {
+ compatible = "rockchip,px30-rgb";
+ pinctrl-names = "default\0sleep";
+ pinctrl-0 = <0x4d>;
+ pinctrl-1 = <0x4e>;
+ status = "disabled";
+ phys = <0x4c>;
+ phy-names = "phy";
+ phandle = <0xd9>;
+
+ ports {
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+
+ port@0 {
+ reg = <0x00>;
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+
+ endpoint@0 {
+ reg = <0x00>;
+ remote-endpoint = <0x14>;
+ phandle = <0xa4>;
+ };
+ };
+ };
+ };
+ };
+
+ syscon@ff148000 {
+ compatible = "syscon\0simple-mfd";
+ reg = <0x00 0xff148000 0x00 0x1000>;
+ #address-cells = <0x01>;
+ #size-cells = <0x01>;
+ phandle = <0xda>;
+
+ pvtm {
+ compatible = "rockchip,px30-pvtm";
+ clocks = <0x02 0x4a>;
+ clock-names = "core";
+ status = "okay";
+ phandle = <0xdb>;
+ };
+ };
+
+ serial@ff158000 {
+ compatible = "rockchip,px30-uart\0snps,dw-apb-uart";
+ reg = <0x00 0xff158000 0x00 0x100>;
+ interrupts = <0x00 0x10 0x04>;
+ clocks = <0x02 0x18 0x02 0x149>;
+ clock-names = "baudclk\0apb_pclk";
+ reg-shift = <0x02>;
+ reg-io-width = <0x04>;
+ dmas = <0x2b 0x02 0x2b 0x03>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x4f 0x50>;
+ status = "okay";
+ phandle = <0xdc>;
+ };
+
+ serial@ff160000 {
+ compatible = "rockchip,px30-uart\0snps,dw-apb-uart";
+ reg = <0x00 0xff160000 0x00 0x100>;
+ interrupts = <0x00 0x11 0x04>;
+ clocks = <0x02 0x19 0x02 0x14a>;
+ clock-names = "baudclk\0apb_pclk";
+ reg-shift = <0x02>;
+ reg-io-width = <0x04>;
+ dmas = <0x2b 0x04 0x2b 0x05>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x51>;
+ status = "disabled";
+ phandle = <0xdd>;
+ };
+
+ serial@ff168000 {
+ compatible = "rockchip,px30-uart\0snps,dw-apb-uart";
+ reg = <0x00 0xff168000 0x00 0x100>;
+ interrupts = <0x00 0x12 0x04>;
+ clocks = <0x02 0x1a 0x02 0x14b>;
+ clock-names = "baudclk\0apb_pclk";
+ reg-shift = <0x02>;
+ reg-io-width = <0x04>;
+ dmas = <0x2b 0x06 0x2b 0x07>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x52 0x53 0x54>;
+ status = "disabled";
+ phandle = <0xde>;
+ };
+
+ serial@ff170000 {
+ compatible = "rockchip,px30-uart\0snps,dw-apb-uart";
+ reg = <0x00 0xff170000 0x00 0x100>;
+ interrupts = <0x00 0x13 0x04>;
+ clocks = <0x02 0x1b 0x02 0x14c>;
+ clock-names = "baudclk\0apb_pclk";
+ reg-shift = <0x02>;
+ reg-io-width = <0x04>;
+ dmas = <0x2b 0x08 0x2b 0x09>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x55 0x56 0x57>;
+ status = "disabled";
+ phandle = <0xdf>;
+ };
+
+ serial@ff178000 {
+ compatible = "rockchip,px30-uart\0snps,dw-apb-uart";
+ reg = <0x00 0xff178000 0x00 0x100>;
+ interrupts = <0x00 0x14 0x04>;
+ clocks = <0x02 0x1c 0x02 0x14d>;
+ clock-names = "baudclk\0apb_pclk";
+ reg-shift = <0x02>;
+ reg-io-width = <0x04>;
+ dmas = <0x2b 0x0a 0x2b 0x0b>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x58 0x59 0x5a>;
+ status = "disabled";
+ phandle = <0xe0>;
+ };
+
+ i2c@ff180000 {
+ compatible = "rockchip,rk3399-i2c";
+ reg = <0x00 0xff180000 0x00 0x1000>;
+ clocks = <0x02 0x1d 0x02 0x14e>;
+ clock-names = "i2c\0pclk";
+ interrupts = <0x00 0x07 0x04>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x5b>;
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+ status = "okay";
+ clock-frequency = <0x61a80>;
+ i2c-scl-rising-time-ns = <0x118>;
+ i2c-scl-falling-time-ns = <0x10>;
+ phandle = <0xe1>;
+
+ pmic@20 {
+ compatible = "rockchip,rk817";
+ reg = <0x20>;
+ interrupt-parent = <0x5c>;
+ interrupts = <0x0a 0x08>;
+ pinctrl-names = "default\0pmic-sleep\0pmic-power-off\0pmic-reset";
+ pinctrl-0 = <0x5d>;
+ pinctrl-1 = <0x5e 0x5f>;
+ pinctrl-2 = <0x60 0x61>;
+ pinctrl-3 = <0x62 0x63>;
+ rockchip,system-power-controller;
+ wakeup-source;
+ #clock-cells = <0x01>;
+ clock-output-names = "rk808-clkout1\0rk808-clkout2";
+ pmic-reset-func = <0x01>;
+ vcc1-supply = <0x64>;
+ vcc2-supply = <0x64>;
+ vcc3-supply = <0x64>;
+ vcc4-supply = <0x64>;
+ vcc5-supply = <0x64>;
+ vcc6-supply = <0x64>;
+ vcc7-supply = <0x64>;
+ vcc8-supply = <0x64>;
+ vcc9-supply = <0x65>;
+ phandle = <0xe2>;
+
+ pwrkey {
+ status = "okay";
+ };
+
+ pinctrl_rk8xx {
+ gpio-controller;
+ #gpio-cells = <0x02>;
+ phandle = <0xe3>;
+
+ rk817_ts_gpio1 {
+ pins = "gpio_ts";
+ function = "pin_fun1";
+ phandle = <0xe4>;
+ };
+
+ rk817_gt_gpio2 {
+ pins = "gpio_gt";
+ function = "pin_fun1";
+ phandle = <0xe5>;
+ };
+
+ rk817_pin_ts {
+ pins = "gpio_ts";
+ function = "pin_fun0";
+ phandle = <0xe6>;
+ };
+
+ rk817_pin_gt {
+ pins = "gpio_gt";
+ function = "pin_fun0";
+ phandle = <0xe7>;
+ };
+
+ rk817_slppin_null {
+ pins = "gpio_slp";
+ function = "pin_fun0";
+ phandle = <0xe8>;
+ };
+
+ rk817_slppin_slp {
+ pins = "gpio_slp";
+ function = "pin_fun1";
+ phandle = <0x5f>;
+ };
+
+ rk817_slppin_pwrdn {
+ pins = "gpio_slp";
+ function = "pin_fun2";
+ phandle = <0x61>;
+ };
+
+ rk817_slppin_rst {
+ pins = "gpio_slp";
+ function = "pin_fun3";
+ phandle = <0x63>;
+ };
+ };
+
+ regulators {
+
+ DCDC_REG1 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <0xe7ef0>;
+ regulator-max-microvolt = <0x118c30>;
+ regulator-ramp-delay = <0x1771>;
+ regulator-initial-mode = <0x02>;
+ regulator-name = "vdd_logic";
+ phandle = <0x0e>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <0xe7ef0>;
+ };
+ };
+
+ DCDC_REG2 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <0xe7ef0>;
+ regulator-max-microvolt = <0x149970>;
+ regulator-ramp-delay = <0x1771>;
+ regulator-initial-mode = <0x02>;
+ regulator-name = "vdd_arm";
+ phandle = <0x06>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <0xe7ef0>;
+ };
+ };
+
+ DCDC_REG3 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-initial-mode = <0x02>;
+ regulator-name = "vcc_ddr";
+ phandle = <0xe9>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ };
+ };
+
+ DCDC_REG4 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <0x325aa0>;
+ regulator-max-microvolt = <0x325aa0>;
+ regulator-initial-mode = <0x02>;
+ regulator-name = "vcc_3v3";
+ phandle = <0x4b>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <0x325aa0>;
+ };
+ };
+
+ LDO_REG1 {
+ regulator-min-microvolt = <0xf4240>;
+ regulator-max-microvolt = <0xf4240>;
+ regulator-name = "vcc_1v0";
+ phandle = <0xea>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <0xf4240>;
+ };
+ };
+
+ LDO_REG2 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <0x1b7740>;
+ regulator-max-microvolt = <0x1b7740>;
+ regulator-name = "vcc1v8_soc";
+ phandle = <0x88>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <0x1b7740>;
+ };
+ };
+
+ LDO_REG3 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <0xf4240>;
+ regulator-max-microvolt = <0xf4240>;
+ regulator-name = "vcc1v0_soc";
+ phandle = <0xeb>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <0xf4240>;
+ };
+ };
+
+ LDO_REG4 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <0x325aa0>;
+ regulator-max-microvolt = <0x325aa0>;
+ regulator-name = "vcc3v3_pmu";
+ phandle = <0x29>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <0x325aa0>;
+ };
+ };
+
+ LDO_REG5 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <0x1b7740>;
+ regulator-max-microvolt = <0x1b7740>;
+ regulator-name = "vccio_sd";
+ phandle = <0x4a>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <0x1b7740>;
+ };
+ };
+
+ LDO_REG6 {
+ regulator-min-microvolt = <0x1b7740>;
+ regulator-max-microvolt = <0x2dc6c0>;
+ regulator-boot-on;
+ regulator-name = "vcc_sd";
+ phandle = <0x93>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <0x2dc6c0>;
+ };
+ };
+
+ LDO_REG7 {
+ regulator-min-microvolt = <0x325aa0>;
+ regulator-max-microvolt = <0x325aa0>;
+ regulator-name = "vcc_backlight";
+ phandle = <0x9e>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <0x325aa0>;
+ };
+ };
+
+ LDO_REG8 {
+ regulator-min-microvolt = <0x2ab980>;
+ regulator-max-microvolt = <0x2ab980>;
+ regulator-name = "vcc_lcd";
+ phandle = <0x9f>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <0x2ab980>;
+ };
+ };
+
+ BOOST {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <0x4c4b40>;
+ regulator-max-microvolt = <0x5265c0>;
+ regulator-name = "boost";
+ phandle = <0x65>;
+ };
+
+ OTG_SWITCH {
+ regulator-boot-on;
+ regulator-name = "otg_switch";
+ phandle = <0xec>;
+ };
+ };
+
+ battery {
+ compatible = "rk817,battery";
+ ocv_table = <0xc5d 0xc94 0xcd0 0xd02 0xd34 0xd66 0xd98 0xdca 0xdfc 0xe2e 0xe56 0xe7e 0xea6 0xece 0xef6 0xf1e 0xf46 0xf6e 0xf96 0xf9b 0xfa0>;
+ design_capacity = <0xd34>;
+ design_qmax = <0xe86>;
+ bat_res = <0x64>;
+ sleep_enter_current = <0x12c>;
+ sleep_exit_current = <0x12c>;
+ sleep_filter_current = <0x64>;
+ power_off_thresd = <0xbb8>;
+ zero_algorithm_vol = <0xf0a>;
+ max_soc_offset = <0x3c>;
+ monitor_sec = <0x05>;
+ virtual_power = <0x00>;
+ sample_res = <0x0a>;
+ };
+
+ charger {
+ compatible = "rk817,charger";
+ min_input_voltage = <0x1194>;
+ max_input_current = <0x5dc>;
+ max_chrg_current = <0x7d0>;
+ max_chrg_voltage = <0x1068>;
+ chrg_term_mode = <0x00>;
+ chrg_finish_cur = <0x34>;
+ virtual_power = <0x00>;
+ sample_res = <0x0a>;
+ dc_det_gpio = <0x5c 0x0b 0x00>;
+ bat_low_gpio = <0x66 0x0d 0x00>;
+ extcon = <0x67>;
+ };
+
+ codec {
+ #sound-dai-cells = <0x00>;
+ compatible = "rockchip,rk817-codec";
+ clocks = <0x02 0x15>;
+ clock-names = "mclk";
+ pinctrl-names = "default";
+ pinctrl-0 = <0x68>;
+ hp-volume = <0x14>;
+ spk-volume = <0x03>;
+ status = "okay";
+ phandle = <0xc3>;
+ };
+ };
+ };
+
+ i2c@ff190000 {
+ compatible = "rockchip,rk3399-i2c";
+ reg = <0x00 0xff190000 0x00 0x1000>;
+ clocks = <0x02 0x1e 0x02 0x14f>;
+ clock-names = "i2c\0pclk";
+ interrupts = <0x00 0x08 0x04>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x69>;
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+ status = "okay";
+ clock-frequency = <0x61a80>;
+ phandle = <0xed>;
+ };
+
+ i2c@ff1a0000 {
+ compatible = "rockchip,rk3399-i2c";
+ reg = <0x00 0xff1a0000 0x00 0x1000>;
+ clocks = <0x02 0x1f 0x02 0x150>;
+ clock-names = "i2c\0pclk";
+ interrupts = <0x00 0x09 0x04>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x6a>;
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+ status = "disabled";
+ phandle = <0xee>;
+ };
+
+ i2c@ff1b0000 {
+ compatible = "rockchip,rk3399-i2c";
+ reg = <0x00 0xff1b0000 0x00 0x1000>;
+ clocks = <0x02 0x20 0x02 0x151>;
+ clock-names = "i2c\0pclk";
+ interrupts = <0x00 0x0a 0x04>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x6b>;
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+ status = "disabled";
+ phandle = <0xef>;
+ };
+
+ spi@ff1d0000 {
+ compatible = "rockchip,px30-spi\0rockchip,rk3066-spi";
+ reg = <0x00 0xff1d0000 0x00 0x1000>;
+ interrupts = <0x00 0x1a 0x04>;
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+ clocks = <0x02 0x24 0x02 0x155>;
+ clock-names = "spiclk\0apb_pclk";
+ dmas = <0x2b 0x0c 0x2b 0x0d>;
+ dma-names = "tx\0rx";
+ pinctrl-names = "default\0high_speed";
+ pinctrl-0 = <0x6c 0x6d 0x6e 0x6f>;
+ pinctrl-1 = <0x70 0x6d 0x71 0x72>;
+ status = "disabled";
+ phandle = <0xf0>;
+ };
+
+ spi@ff1d8000 {
+ compatible = "rockchip,px30-spi\0rockchip,rk3066-spi";
+ reg = <0x00 0xff1d8000 0x00 0x1000>;
+ interrupts = <0x00 0x1b 0x04>;
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+ clocks = <0x02 0x25 0x02 0x156>;
+ clock-names = "spiclk\0apb_pclk";
+ dmas = <0x2b 0x0e 0x2b 0x0f>;
+ dma-names = "tx\0rx";
+ pinctrl-names = "default\0high_speed";
+ pinctrl-0 = <0x73 0x74 0x75 0x76 0x77>;
+ pinctrl-1 = <0x78 0x74 0x75 0x79 0x7a>;
+ status = "disabled";
+ phandle = <0xf1>;
+ };
+
+ watchdog@ff1e0000 {
+ compatible = "snps,dw-wdt";
+ reg = <0x00 0xff1e0000 0x00 0x100>;
+ clocks = <0x02 0x15b>;
+ interrupts = <0x00 0x25 0x04>;
+ resets = <0x02 0xb5>;
+ reset-names = "reset";
+ status = "disabled";
+ phandle = <0xf2>;
+ };
+
+ pwm@ff200000 {
+ compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm";
+ reg = <0x00 0xff200000 0x00 0x10>;
+ #pwm-cells = <0x03>;
+ pinctrl-names = "active";
+ pinctrl-0 = <0x7b>;
+ clocks = <0x02 0x22 0x02 0x153>;
+ clock-names = "pwm\0pclk";
+ status = "okay";
+ phandle = <0xbc>;
+ };
+
+ pwm@ff200010 {
+ compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm";
+ reg = <0x00 0xff200010 0x00 0x10>;
+ #pwm-cells = <0x03>;
+ pinctrl-names = "active";
+ pinctrl-0 = <0x7c>;
+ clocks = <0x02 0x22 0x02 0x153>;
+ clock-names = "pwm\0pclk";
+ status = "okay";
+ phandle = <0xc1>;
+ };
+
+ pwm@ff200020 {
+ compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm";
+ reg = <0x00 0xff200020 0x00 0x10>;
+ #pwm-cells = <0x03>;
+ pinctrl-names = "active";
+ pinctrl-0 = <0x7d>;
+ clocks = <0x02 0x22 0x02 0x153>;
+ clock-names = "pwm\0pclk";
+ status = "disabled";
+ phandle = <0xf3>;
+ };
+
+ pwm@ff200030 {
+ compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm";
+ reg = <0x00 0xff200030 0x00 0x10>;
+ #pwm-cells = <0x03>;
+ pinctrl-names = "active";
+ pinctrl-0 = <0x7e>;
+ clocks = <0x02 0x22 0x02 0x153>;
+ clock-names = "pwm\0pclk";
+ status = "disabled";
+ phandle = <0xf4>;
+ };
+
+ pwm@ff208000 {
+ compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm";
+ reg = <0x00 0xff208000 0x00 0x10>;
+ #pwm-cells = <0x03>;
+ pinctrl-names = "active";
+ pinctrl-0 = <0x7f>;
+ clocks = <0x02 0x23 0x02 0x154>;
+ clock-names = "pwm\0pclk";
+ status = "disabled";
+ phandle = <0xf5>;
+ };
+
+ pwm@ff208010 {
+ compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm";
+ reg = <0x00 0xff208010 0x00 0x10>;
+ #pwm-cells = <0x03>;
+ pinctrl-names = "active";
+ pinctrl-0 = <0x80>;
+ clocks = <0x02 0x23 0x02 0x154>;
+ clock-names = "pwm\0pclk";
+ status = "disabled";
+ phandle = <0xf6>;
+ };
+
+ pwm@ff208020 {
+ compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm";
+ reg = <0x00 0xff208020 0x00 0x10>;
+ #pwm-cells = <0x03>;
+ pinctrl-names = "active";
+ pinctrl-0 = <0x81>;
+ clocks = <0x02 0x23 0x02 0x154>;
+ clock-names = "pwm\0pclk";
+ status = "disabled";
+ phandle = <0xf7>;
+ };
+
+ pwm@ff208030 {
+ compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm";
+ reg = <0x00 0xff208030 0x00 0x10>;
+ #pwm-cells = <0x03>;
+ pinctrl-names = "active";
+ pinctrl-0 = <0x82>;
+ clocks = <0x02 0x23 0x02 0x154>;
+ clock-names = "pwm\0pclk";
+ status = "disabled";
+ phandle = <0xf8>;
+ };
+
+ rktimer@ff210000 {
+ compatible = "rockchip,rk3288-timer";
+ reg = <0x00 0xff210000 0x00 0x1000>;
+ interrupts = <0x00 0x1e 0x04>;
+ clocks = <0x02 0x159 0x02 0x26>;
+ clock-names = "pclk\0timer";
+ phandle = <0xf9>;
+ };
+
+ amba {
+ compatible = "simple-bus";
+ #address-cells = <0x02>;
+ #size-cells = <0x02>;
+ ranges;
+
+ dmac@ff240000 {
+ compatible = "arm,pl330\0arm,primecell";
+ reg = <0x00 0xff240000 0x00 0x4000>;
+ interrupts = <0x00 0x01 0x04 0x00 0x02 0x04>;
+ clocks = <0x02 0xbb>;
+ clock-names = "apb_pclk";
+ #dma-cells = <0x01>;
+ peripherals-req-type-burst;
+ phandle = <0x2b>;
+ };
+ };
+
+ thermal-zones {
+ phandle = <0xfa>;
+
+ soc-thermal {
+ polling-delay-passive = <0x14>;
+ polling-delay = <0x3e8>;
+ sustainable-power = <0x2ee>;
+ thermal-sensors = <0x83 0x00>;
+ phandle = <0xfb>;
+
+ trips {
+
+ trip-point-0 {
+ temperature = <0x11170>;
+ hysteresis = <0x7d0>;
+ type = "passive";
+ phandle = <0xfc>;
+ };
+
+ trip-point-1 {
+ temperature = <0x14c08>;
+ hysteresis = <0x7d0>;
+ type = "passive";
+ phandle = <0x84>;
+ };
+
+ soc-crit {
+ temperature = <0x1c138>;
+ hysteresis = <0x7d0>;
+ type = "critical";
+ phandle = <0xfd>;
+ };
+ };
+
+ cooling-maps {
+
+ map0 {
+ trip = <0x84>;
+ cooling-device = <0x09 0xffffffff 0xffffffff>;
+ contribution = <0x1000>;
+ };
+
+ map1 {
+ trip = <0x84>;
+ cooling-device = <0x85 0xffffffff 0xffffffff>;
+ contribution = <0x1000>;
+ };
+ };
+ };
+
+ gpu-thermal {
+ polling-delay-passive = <0x64>;
+ polling-delay = <0x3e8>;
+ thermal-sensors = <0x83 0x01>;
+ phandle = <0xfe>;
+ };
+ };
+
+ tsadc@ff280000 {
+ compatible = "rockchip,px30-tsadc";
+ reg = <0x00 0xff280000 0x00 0x100>;
+ interrupts = <0x00 0x24 0x04>;
+ rockchip,grf = <0x2f>;
+ clocks = <0x02 0x2c 0x02 0x158>;
+ clock-names = "tsadc\0apb_pclk";
+ assigned-clocks = <0x02 0x2c>;
+ assigned-clock-rates = <0xc350>;
+ resets = <0x02 0xa8>;
+ reset-names = "tsadc-apb";
+ #thermal-sensor-cells = <0x01>;
+ rockchip,hw-tshut-temp = <0x1d4c0>;
+ status = "okay";
+ pinctrl-names = "gpio\0otpout";
+ pinctrl-0 = <0x86>;
+ pinctrl-1 = <0x87>;
+ phandle = <0x83>;
+ };
+
+ saradc@ff288000 {
+ compatible = "rockchip,px30-saradc\0rockchip,rk3399-saradc";
+ reg = <0x00 0xff288000 0x00 0x100>;
+ interrupts = <0x00 0x54 0x04>;
+ #io-channel-cells = <0x01>;
+ clocks = <0x02 0x2d 0x02 0x157>;
+ clock-names = "saradc\0apb_pclk";
+ resets = <0x02 0xa5>;
+ reset-names = "saradc-apb";
+ status = "okay";
+ vref-supply = <0x88>;
+ phandle = <0xbe>;
+ };
+
+ otp@ff290000 {
+ compatible = "rockchip,px30-otp";
+ reg = <0x00 0xff290000 0x00 0x4000>;
+ #address-cells = <0x01>;
+ #size-cells = <0x01>;
+ clocks = <0x02 0x2f 0x02 0x15a 0x02 0x161>;
+ clock-names = "clk_otp\0pclk_otp\0pclk_otp_phy";
+ resets = <0x02 0xb4>;
+ reset-names = "otp_phy";
+ phandle = <0xff>;
+
+ id@7 {
+ reg = <0x07 0x10>;
+ phandle = <0x0f>;
+ };
+
+ cpu-leakage@17 {
+ reg = <0x17 0x01>;
+ phandle = <0x07>;
+ };
+
+ performance@1e {
+ reg = <0x1e 0x01>;
+ bits = <0x04 0x03>;
+ phandle = <0x08>;
+ };
+ };
+
+ clock-controller@ff2b0000 {
+ compatible = "rockchip,px30-cru";
+ reg = <0x00 0xff2b0000 0x00 0x1000>;
+ rockchip,grf = <0x2f>;
+ rockchip,boost = <0x89>;
+ #clock-cells = <0x01>;
+ #reset-cells = <0x01>;
+ assigned-clocks = <0x02 0x04>;
+ assigned-clock-rates = <0x3dfd2400>;
+ phandle = <0x02>;
+ };
+
+ cpu-boost@ff2b8000 {
+ compatible = "syscon";
+ reg = <0x00 0xff2b8000 0x00 0x1000>;
+ rockchip,boost-low-con0 = <0x1032>;
+ rockchip,boost-low-con1 = <0x1441>;
+ rockchip,boost-high-con0 = <0x1036>;
+ rockchip,boost-high-con1 = <0x1441>;
+ rockchip,boost-backup-pll = <0x01>;
+ rockchip,boost-backup-pll-usage = <0x00>;
+ rockchip,boost-switch-threshold = <0x249f00>;
+ rockchip,boost-statis-threshold = <0x100>;
+ rockchip,boost-statis-enable = <0x00>;
+ rockchip,boost-enable = <0x00>;
+ phandle = <0x89>;
+ };
+
+ pmu-clock-controller@ff2bc000 {
+ compatible = "rockchip,px30-pmucru";
+ reg = <0x00 0xff2bc000 0x00 0x1000>;
+ rockchip,grf = <0x2f>;
+ #clock-cells = <0x01>;
+ #reset-cells = <0x01>;
+ assigned-clocks = <0x2a 0x01 0x2a 0x08 0x2a 0x05 0x02 0x07 0x02 0xab 0x02 0xb0 0x02 0xf0 0x02 0xf5 0x02 0x140 0x02 0x49>;
+ assigned-clock-rates = <0x47868c00 0x5f5e100 0x18cba80 0x23c34600 0xbebc200 0xbebc200 0x8f0d180 0x8f0d180 0x5f5e100 0xbebc200>;
+ phandle = <0x2a>;
+ };
+
+ syscon@ff2c0000 {
+ compatible = "rockchip,px30-usb2phy-grf\0syscon\0simple-mfd";
+ reg = <0x00 0xff2c0000 0x00 0x10000>;
+ #address-cells = <0x01>;
+ #size-cells = <0x01>;
+ phandle = <0x100>;
+
+ usb2-phy@100 {
+ compatible = "rockchip,px30-usb2phy\0rockchip,rk3328-usb2phy";
+ reg = <0x100 0x10>;
+ clocks = <0x2a 0x0a>;
+ clock-names = "phyclk";
+ #clock-cells = <0x00>;
+ assigned-clocks = <0x02 0x0e 0x02 0x55>;
+ assigned-clock-parents = <0x67 0x02 0x0e>;
+ clock-output-names = "usb480m_phy";
+ status = "okay";
+ phandle = <0x67>;
+
+ host-port {
+ #phy-cells = <0x00>;
+ interrupts = <0x00 0x44 0x04>;
+ interrupt-names = "linestate";
+ status = "okay";
+ phandle = <0x8c>;
+ };
+
+ otg-port {
+ #phy-cells = <0x00>;
+ interrupts = <0x00 0x42 0x04 0x00 0x41 0x04 0x00 0x40 0x04>;
+ interrupt-names = "otg-bvalid\0otg-id\0linestate";
+ status = "disabled";
+ phandle = <0x8b>;
+ };
+ };
+ };
+
+ video-phy@ff2e0000 {
+ compatible = "rockchip,px30-video-phy";
+ reg = <0x00 0xff2e0000 0x00 0x10000 0x00 0xff450000 0x00 0x10000>;
+ clocks = <0x2a 0x0b 0x02 0x145 0x02 0x144>;
+ clock-names = "ref\0pclk_phy\0pclk_host";
+ #clock-cells = <0x00>;
+ resets = <0x02 0x3e>;
+ reset-names = "rst";
+ power-domains = <0x8a 0x0c>;
+ #phy-cells = <0x00>;
+ status = "okay";
+ phandle = <0x4c>;
+ };
+
+ mipi-dphy-rx0@ff2f0000 {
+ compatible = "rockchip,rk3326-mipi-dphy";
+ reg = <0x00 0xff2f0000 0x00 0x4000>;
+ clocks = <0x02 0x146>;
+ clock-names = "dphy-ref";
+ power-domains = <0x8a 0x0d>;
+ rockchip,grf = <0x2f>;
+ status = "okay";
+ phandle = <0x101>;
+ };
+
+ usb@ff300000 {
+ compatible = "rockchip,px30-usb\0rockchip,rk3066-usb\0snps,dwc2";
+ reg = <0x00 0xff300000 0x00 0x40000>;
+ interrupts = <0x00 0x3e 0x04>;
+ clocks = <0x02 0x102>;
+ clock-names = "otg";
+ power-domains = <0x8a 0x05>;
+ dr_mode = "otg";
+ g-np-tx-fifo-size = <0x10>;
+ g-rx-fifo-size = <0x118>;
+ g-tx-fifo-size = <0x100 0x80 0x80 0x40 0x20 0x10>;
+ g-use-dma;
+ phys = <0x8b>;
+ phy-names = "usb2-phy";
+ status = "okay";
+ phandle = <0x102>;
+ };
+
+ usb@ff340000 {
+ compatible = "generic-ehci";
+ reg = <0x00 0xff340000 0x00 0x10000>;
+ interrupts = <0x00 0x3c 0x04>;
+ clocks = <0x02 0x103 0x67>;
+ clock-names = "usbhost\0utmi";
+ power-domains = <0x8a 0x05>;
+ phys = <0x8c>;
+ phy-names = "usb";
+ status = "disabled";
+ phandle = <0x103>;
+ };
+
+ usb@ff350000 {
+ compatible = "generic-ohci";
+ reg = <0x00 0xff350000 0x00 0x10000>;
+ interrupts = <0x00 0x3d 0x04>;
+ clocks = <0x02 0x103 0x67>;
+ clock-names = "usbhost\0utmi";
+ power-domains = <0x8a 0x05>;
+ phys = <0x8c>;
+ phy-names = "usb";
+ status = "disabled";
+ phandle = <0x104>;
+ };
+
+ ethernet@ff360000 {
+ compatible = "rockchip,px30-gmac";
+ reg = <0x00 0xff360000 0x00 0x10000>;
+ rockchip,grf = <0x2f>;
+ interrupts = <0x00 0x2b 0x04>;
+ interrupt-names = "macirq";
+ clocks = <0x02 0x3e 0x02 0x3f 0x02 0x3f 0x02 0x40 0x02 0x41 0x02 0xb2 0x02 0x143 0x02 0x4c>;
+ clock-names = "stmmaceth\0mac_clk_rx\0mac_clk_tx\0clk_mac_ref\0clk_mac_refout\0aclk_mac\0pclk_mac\0clk_mac_speed";
+ phy-mode = "rmii";
+ pinctrl-names = "default";
+ pinctrl-0 = <0x8d 0x8e>;
+ resets = <0x02 0x5e>;
+ reset-names = "stmmaceth";
+ power-domains = <0x8a 0x09>;
+ status = "disabled";
+ phandle = <0x105>;
+ };
+
+ dwmmc@ff370000 {
+ compatible = "rockchip,px30-dw-mshc\0rockchip,rk3288-dw-mshc";
+ reg = <0x00 0xff370000 0x00 0x4000>;
+ max-frequency = <0x8f0d180>;
+ clocks = <0x02 0xf7 0x02 0x3b 0x02 0x43 0x02 0x44>;
+ clock-names = "biu\0ciu\0ciu-drv\0ciu-sample";
+ assigned-clocks = <0x02 0x3b>;
+ assigned-clock-parents = <0x02 0x57>;
+ power-domains = <0x8a 0x07>;
+ fifo-depth = <0x100>;
+ interrupts = <0x00 0x36 0x04>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x8f 0x90 0x91 0x92>;
+ status = "okay";
+ bus-width = <0x04>;
+ cap-mmc-highspeed;
+ cap-sd-highspeed;
+ supports-sd;
+ card-detect-delay = <0x320>;
+ ignore-pm-notify;
+ cd-gpios = <0x5c 0x03 0x01>;
+ sd-uhs-sdr12;
+ sd-uhs-sdr25;
+ sd-uhs-sdr50;
+ sd-uhs-sdr104;
+ vqmmc-supply = <0x4a>;
+ vmmc-supply = <0x93>;
+ phandle = <0x106>;
+ };
+
+ dwmmc@ff380000 {
+ compatible = "rockchip,px30-dw-mshc\0rockchip,rk3288-dw-mshc";
+ reg = <0x00 0xff380000 0x00 0x4000>;
+ max-frequency = <0x8f0d180>;
+ clocks = <0x02 0xff 0x02 0x38 0x02 0x45 0x02 0x46>;
+ clock-names = "biu\0ciu\0ciu-drv\0ciu-sample";
+ assigned-clocks = <0x02 0x38>;
+ assigned-clock-parents = <0x02 0x51>;
+ power-domains = <0x8a 0x0a>;
+ fifo-depth = <0x100>;
+ interrupts = <0x00 0x37 0x04>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x94 0x95 0x96>;
+ status = "okay";
+ bus-width = <0x04>;
+ cap-mmc-highspeed;
+ cap-sd-highspeed;
+ supports-sd;
+ card-detect-delay = <0x320>;
+ ignore-pm-notify;
+ cd-gpios = <0x97 0x0e 0x01>;
+ sd-uhs-sdr12;
+ sd-uhs-sdr25;
+ sd-uhs-sdr50;
+ sd-uhs-sdr104;
+ vqmmc-supply = <0x4a>;
+ vmmc-supply = <0x93>;
+ phandle = <0x107>;
+ };
+
+ dwmmc@ff390000 {
+ compatible = "rockchip,px30-dw-mshc\0rockchip,rk3288-dw-mshc";
+ reg = <0x00 0xff390000 0x00 0x4000>;
+ max-frequency = <0x8f0d180>;
+ clocks = <0x02 0x100 0x02 0x39 0x02 0x47 0x02 0x48>;
+ clock-names = "biu\0ciu\0ciu-drv\0ciu-sample";
+ assigned-clocks = <0x02 0x39>;
+ assigned-clock-parents = <0x02 0x53>;
+ power-domains = <0x8a 0x0a>;
+ fifo-depth = <0x100>;
+ interrupts = <0x00 0x35 0x04>;
+ status = "disabled";
+ phandle = <0x108>;
+ };
+
+ nandc@ff3b0000 {
+ compatible = "rockchip,rk-nandc";
+ reg = <0x00 0xff3b0000 0x00 0x4000>;
+ interrupts = <0x00 0x39 0x04>;
+ nandc_id = <0x00>;
+ clocks = <0x02 0x37 0x02 0xfe>;
+ clock-names = "clk_nandc\0hclk_nandc";
+ assigned-clocks = <0x02 0x37>;
+ assigned-clock-parents = <0x02 0x4f>;
+ power-domains = <0x8a 0x0a>;
+ status = "disabled";
+ phandle = <0x109>;
+ };
+
+ sfc@ff3a0000 {
+ compatible = "rockchip,sfc";
+ reg = <0x00 0xff3a0000 0x00 0x4000>;
+ interrupts = <0x00 0x38 0x04>;
+ clocks = <0x02 0x3a 0x02 0x101>;
+ clock-names = "clk_sfc\0hclk_sfc";
+ assigned-clocks = <0x02 0x3a>;
+ assigned-clock-rates = <0x989680>;
+ status = "disabled";
+ phandle = <0x10a>;
+ };
+
+ gpu@ff400000 {
+ compatible = "arm,malit602\0arm,malit60x\0arm,malit6xx\0arm,mali-midgard";
+ reg = <0x00 0xff400000 0x00 0x4000>;
+ interrupts = <0x00 0x2d 0x04 0x00 0x2e 0x04 0x00 0x2f 0x04>;
+ interrupt-names = "GPU\0MMU\0JOB";
+ clocks = <0x02 0x49>;
+ clock-names = "clk_mali";
+ power-domains = <0x8a 0x0e>;
+ #cooling-cells = <0x02>;
+ operating-points-v2 = <0x98>;
+ status = "okay";
+ mali-supply = <0x0e>;
+ phandle = <0x85>;
+
+ power_model {
+ compatible = "arm,mali-simple-power-model";
+ static-coefficient = <0x64578>;
+ dynamic-coefficient = <0x2dd>;
+ ts = <0x7d00 0x125c 0xffffffb0 0x02>;
+ thermal-zone = "gpu-thermal";
+ };
+ };
+
+ gpu-opp-table {
+ compatible = "operating-points-v2";
+ rockchip,thermal-zone = "soc-thermal";
+ rockchip,temp-hysteresis = <0x1388>;
+ rockchip,low-temp = <0x00>;
+ rockchip,low-temp-min-volt = <0xf4240>;
+ rockchip,low-temp-adjust-volt = <0x00 0x1e0 0xc350>;
+ rockchip,max-volt = <0x11edd8>;
+ rockchip,evb-irdrop = <0x61a8>;
+ rockchip,pvtm-voltage-sel = <0x00 0xc350 0x00 0xc351 0xd2f0 0x01 0xd2f1 0xea60 0x02 0xea61 0x1869f 0x03>;
+ rockchip,pvtm-ch = <0x00 0x00>;
+ phandle = <0x98>;
+
+ opp-400000000 {
+ opp-hz = <0x00 0x17d78400>;
+ opp-microvolt = <0x100590>;
+ opp-microvolt-L0 = <0x100590>;
+ opp-microvolt-L1 = <0xfa3e8>;
+ opp-microvolt-L2 = <0xee098>;
+ opp-microvolt-L3 = <0xe7ef0>;
+ };
+
+ opp-480000000 {
+ opp-hz = <0x00 0x1c9c3800>;
+ opp-microvolt = <0x112a88>;
+ opp-microvolt-L0 = <0x112a88>;
+ opp-microvolt-L1 = <0x10c8e0>;
+ opp-microvolt-L2 = <0x100590>;
+ opp-microvolt-L3 = <0xf4240>;
+ };
+
+ opp-520000000 {
+ opp-hz = <0x00 0x1efe9200>;
+ opp-microvolt = <0x118c30>;
+ opp-microvolt-L0 = <0x118c30>;
+ opp-microvolt-L1 = <0x118c30>;
+ opp-microvolt-L2 = <0x10c8e0>;
+ opp-microvolt-L3 = <0x100590>;
+ };
+ };
+
+ hevc_service@ff440000 {
+ compatible = "rockchip,hevc_sub";
+ iommu_enabled = <0x01>;
+ reg = <0x00 0xff440000 0x00 0x400>;
+ interrupts = <0x00 0x31 0x04>;
+ interrupt-names = "irq_dec";
+ dev_mode = <0x01>;
+ iommus = <0x99>;
+ allocator = <0x01>;
+ phandle = <0x9c>;
+ };
+
+ vpu_service@ff442000 {
+ compatible = "rockchip,vpu_sub";
+ iommu_enabled = <0x01>;
+ reg = <0x00 0xff442000 0x00 0x800>;
+ interrupts = <0x00 0x50 0x04 0x00 0x4f 0x04>;
+ interrupt-names = "irq_enc\0irq_dec";
+ dev_mode = <0x00>;
+ iommus = <0x9a>;
+ allocator = <0x01>;
+ phandle = <0x9b>;
+ };
+
+ vpu_combo {
+ compatible = "rockchip,vpu_combo";
+ subcnt = <0x02>;
+ rockchip,grf = <0x2f>;
+ rockchip,sub = <0x9b 0x9c>;
+ clocks = <0x02 0xaf 0x02 0xf4 0x02 0x4b>;
+ clock-names = "aclk_vcodec\0hclk_vcodec\0clk_core";
+ resets = <0x02 0x24 0x02 0x26 0x02 0x25 0x02 0x27 0x02 0x3f>;
+ reset-names = "video_a\0video_h\0niu_a\0niu_h\0video_core";
+ power-domains = <0x8a 0x0b>;
+ mode_bit = <0x0f>;
+ mode_ctrl = <0x410>;
+ status = "okay";
+ phandle = <0x10b>;
+ };
+
+ iommu@ff440440 {
+ compatible = "rockchip,iommu";
+ reg = <0x00 0xff440440 0x00 0x40 0x00 0xff440480 0x00 0x40>;
+ interrupts = <0x00 0x32 0x04>;
+ interrupt-names = "hevc_mmu";
+ clocks = <0x02 0xaf 0x02 0xf4>;
+ clock-names = "aclk\0hclk";
+ power-domains = <0x8a 0x0b>;
+ #iommu-cells = <0x00>;
+ phandle = <0x99>;
+ };
+
+ iommu@ff442800 {
+ compatible = "rockchip,iommu";
+ reg = <0x00 0xff442800 0x00 0x100>;
+ interrupts = <0x00 0x51 0x04>;
+ interrupt-names = "vpu_mmu";
+ clocks = <0x02 0xaf 0x02 0xf4>;
+ clock-names = "aclk\0hclk";
+ power-domains = <0x8a 0x0b>;
+ #iommu-cells = <0x00>;
+ phandle = <0x9a>;
+ };
+
+ dsi@ff450000 {
+ compatible = "rockchip,px30-mipi-dsi";
+ reg = <0x00 0xff450000 0x00 0x10000>;
+ interrupts = <0x00 0x4b 0x04>;
+ clocks = <0x02 0x144 0x4c>;
+ clock-names = "pclk\0hs_clk";
+ resets = <0x02 0x3d>;
+ reset-names = "apb";
+ phys = <0x4c>;
+ phy-names = "mipi_dphy";
+ power-domains = <0x8a 0x0c>;
+ rockchip,grf = <0x2f>;
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+ status = "okay";
+ phandle = <0x10c>;
+
+ ports {
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+
+ port@0 {
+ reg = <0x00>;
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+
+ endpoint@0 {
+ reg = <0x00>;
+ remote-endpoint = <0x13>;
+ status = "okay";
+ phandle = <0xa3>;
+ };
+ };
+ };
+
+ panel@0 {
+ compatible = "sitronix,st7703\0simple-panel-dsi";
+ reg = <0x00>;
+ backlight = <0x9d>;
+ power-supply = <0x9f>;
+ prepare-delay-ms = <0x14>;
+ reset-delay-ms = <0x14>;
+ init-delay-ms = <0x14>;
+ enable-delay-ms = <0x78>;
+ disable-delay-ms = <0x14>;
+ unprepare-delay-ms = <0x14>;
+ width-mm = <0x99>;
+ height-mm = <0x55>;
+ dsi,flags = <0xa03>;
+ dsi,format = <0x00>;
+ dsi,lanes = <0x04>;
+ panel-init-sequence = [05 fa 01 11 39 00 04 b9 f1 12 83 39 00 1c ba 33 81 05 f9 0e 0e 20 00 00 00 00 00 00 00 44 25 00 90 0a 00 00 01 4f 01 00 00 37 39 00 05 b8 25 22 f0 63 39 00 04 bf 02 11 00 39 00 0b b3 10 10 28 28 03 ff 00 00 00 00 39 00 0a c0 73 73 50 50 00 00 12 70 00 15 00 02 bc 46 15 00 02 cc 0b 15 00 02 b4 80 39 00 04 b2 3c 12 30 39 00 0f e3 07 07 0b 0b 03 0b 00 00 00 00 ff 00 c0 10 39 00 0d c1 36 00 32 32 77 f1 cc cc 77 77 33 33 39 00 03 b5 0a 0a 39 00 03 b6 88 88 39 00 40 e9 c8 10 0a 10 0f a1 80 12 31 23 47 86 a1 80 47 08 00 00 0d 00 00 00 00 00 0d 00 00 00 48 02 8b af 46 02 88 88 88 88 88 48 13 8b af 57 13 88 88 88 88 88 00 00 00 00 00 00 00 00 00 00 00 00 00 39 00 3e ea 96 12 01 01 01 78 02 00 00 00 00 00 4f 31 8b a8 31 75 88 88 88 88 88 4f 20 8b a8 20 64 88 88 88 88 88 23 00 00 01 02 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 40 a1 80 00 00 00 00 39 00 23 e0 00 0a 0f 29 3b 3f 42 39 06 0d 10 13 15 14 15 10 17 00 0a 0f 29 3b 3f 42 39 06 0d 10 13 15 14 15 10 17 05 32 01 29];
+ panel-exit-sequence = <0x5140128 0x50a0110>;
+ reset-gpios = <0x97 0x10 0x01>;
+
+ display-timings {
+ native-mode = <0xa0>;
+
+ 60Hz {
+ clock-frequency = <0x22cf220>;
+ hactive = <0x2d0>;
+ vactive = <0x2d0>;
+ hfront-porch = <0x2d>;
+ hsync-len = <0x04>;
+ hback-porch = <0x2d>;
+ vfront-porch = <0x0f>;
+ vsync-len = <0x03>;
+ vback-porch = <0x0b>;
+ hsync-active = <0x00>;
+ vsync-active = <0x00>;
+ de-active = <0x00>;
+ pixelclk-active = <0x00>;
+ phandle = <0xa0>;
+ };
+ };
+ };
+ };
+
+ vop@ff460000 {
+ compatible = "rockchip,px30-vop-big";
+ reg = <0x00 0xff460000 0x00 0x1fc 0x00 0xff460a00 0x00 0x400>;
+ rockchip,grf = <0x2f>;
+ reg-names = "regs\0gamma_lut";
+ interrupts = <0x00 0x4d 0x04>;
+ clocks = <0x02 0xb5 0x02 0x96 0x02 0xfb>;
+ clock-names = "aclk_vop\0dclk_vop\0hclk_vop";
+ power-domains = <0x8a 0x0c>;
+ iommus = <0xa1>;
+ status = "okay";
+ phandle = <0x10f>;
+
+ port {
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+ phandle = <0x10>;
+
+ endpoint@0 {
+ reg = <0x00>;
+ remote-endpoint = <0xa2>;
+ phandle = <0x12>;
+ };
+
+ endpoint@1 {
+ reg = <0x01>;
+ remote-endpoint = <0xa3>;
+ phandle = <0x13>;
+ };
+
+ endpoint@2 {
+ reg = <0x02>;
+ remote-endpoint = <0xa4>;
+ phandle = <0x14>;
+ };
+ };
+ };
+
+ iommu@ff460f00 {
+ compatible = "rockchip,iommu";
+ reg = <0x00 0xff460f00 0x00 0x100>;
+ interrupts = <0x00 0x4d 0x04>;
+ interrupt-names = "vopb_mmu";
+ clocks = <0x02 0xb5 0x02 0xfb>;
+ clock-names = "aclk\0hclk";
+ power-domains = <0x8a 0x0c>;
+ #iommu-cells = <0x00>;
+ status = "okay";
+ phandle = <0xa1>;
+ };
+
+ rk_rga@ff480000 {
+ compatible = "rockchip,rga2";
+ reg = <0x00 0xff480000 0x00 0x1000>;
+ interrupts = <0x00 0x4c 0x04>;
+ clocks = <0x02 0xb7 0x02 0xfd 0x02 0x35>;
+ clock-names = "aclk_rga\0hclk_rga\0clk_rga";
+ power-domains = <0x8a 0x0c>;
+ dma-coherent;
+ status = "okay";
+ phandle = <0x110>;
+ };
+
+ cif@ff490000 {
+ compatible = "rockchip,cif";
+ reg = <0x00 0xff490000 0x00 0x200>;
+ interrupts = <0x00 0x45 0x04>;
+ clocks = <0x02 0xb3 0x02 0xf9 0x02 0x160 0x02 0x34>;
+ clock-names = "aclk_cif0\0hclk_cif0\0pclk_cif\0cif0_out";
+ resets = <0x02 0x2c 0x02 0x2d 0x02 0x2e>;
+ reset-names = "rst_cif_a\0rst_cif_h\0rst_cif_pclkin";
+ power-domains = <0x8a 0x0d>;
+ pinctrl-names = "cif_pin_all";
+ pinctrl-0 = <0xa5>;
+ iommus = <0xa6>;
+ status = "disabled";
+ phandle = <0x111>;
+ };
+
+ cif-new@ff490000 {
+ compatible = "rockchip,px30-cif";
+ reg = <0x00 0xff490000 0x00 0x200>;
+ interrupts = <0x00 0x45 0x04>;
+ clocks = <0x02 0xb3 0x02 0xf9 0x02 0x160 0x02 0x34>;
+ clock-names = "aclk_cif\0hclk_cif\0pclk_cif\0cif_out";
+ resets = <0x02 0x2c 0x02 0x2d 0x02 0x2e>;
+ reset-names = "rst_cif_a\0rst_cif_h\0rst_cif_pclkin";
+ power-domains = <0x8a 0x0d>;
+ iommus = <0xa6>;
+ status = "disabled";
+ phandle = <0x112>;
+ };
+
+ iommu@ff490800 {
+ compatible = "rockchip,iommu";
+ reg = <0x00 0xff490800 0x00 0x100>;
+ interrupts = <0x00 0x45 0x04>;
+ interrupt-names = "vip_mmu";
+ clocks = <0x02 0xb3 0x02 0xf9>;
+ clock-names = "aclk\0hclk";
+ power-domains = <0x8a 0x0d>;
+ rk_iommu,disable_reset_quirk;
+ #iommu-cells = <0x00>;
+ status = "okay";
+ phandle = <0xa6>;
+ };
+
+ rk_isp@ff4a0000 {
+ compatible = "rockchip,px30-isp\0rockchip,isp";
+ reg = <0x00 0xff4a0000 0x00 0x8000>;
+ interrupts = <0x00 0x46 0x04>;
+ clocks = <0x02 0xb4 0x02 0xfa 0x02 0x33 0x02 0x33 0x02 0x15f 0x02 0x34 0x02 0x34 0x02 0x146>;
+ clock-names = "aclk_isp\0hclk_isp\0clk_isp\0clk_isp_jpe\0pclkin_isp\0clk_cif_pll\0clk_cif_out\0pclk_dphyrx";
+ resets = <0x02 0x2b 0x02 0x2f>;
+ reset-names = "rst_isp\0rst_mipicsiphy";
+ power-domains = <0x8a 0x0d>;
+ pinctrl-names = "default\0isp_dvp8bit2\0isp_dvp10bit\0isp_dvp12bit";
+ pinctrl-0 = <0xa7>;
+ pinctrl-1 = <0xa5>;
+ pinctrl-2 = <0xa5 0xa8>;
+ pinctrl-3 = <0xa9 0xa5 0xa8>;
+ rockchip,isp,mipiphy = <0x01>;
+ rockchip,isp,csiphy,reg = <0xff2f0000 0x4000>;
+ rockchip,grf = <0x2f>;
+ rockchip,cru = <0x02>;
+ rockchip,isp,iommu-enable = <0x01>;
+ iommus = <0xaa>;
+ status = "disabled";
+ phandle = <0x113>;
+ };
+
+ rkisp1@ff4a0000 {
+ compatible = "rockchip,rk3326-rkisp1";
+ reg = <0x00 0xff4a0000 0x00 0x8000>;
+ interrupts = <0x00 0x46 0x04 0x00 0x49 0x04 0x00 0x4a 0x04>;
+ interrupt-names = "isp_irq\0mi_irq\0mipi_irq";
+ clocks = <0x02 0xb4 0x02 0xfa 0x02 0x33 0x02 0x15f>;
+ clock-names = "aclk_isp\0hclk_isp\0clk_isp\0pclk_isp";
+ devfreq = <0xab>;
+ power-domains = <0x8a 0x0d>;
+ iommus = <0xaa>;
+ rockchip,grf = <0x2f>;
+ status = "okay";
+ phandle = <0x114>;
+ };
+
+ iommu@ff4a8000 {
+ compatible = "rockchip,iommu";
+ reg = <0x00 0xff4a8000 0x00 0x100>;
+ interrupts = <0x00 0x46 0x04>;
+ interrupt-names = "isp_mmu";
+ clocks = <0x02 0xb4 0x02 0xfa>;
+ clock-names = "aclk\0hclk";
+ power-domains = <0x8a 0x0d>;
+ rk_iommu,disable_reset_quirk;
+ #iommu-cells = <0x00>;
+ status = "okay";
+ phandle = <0xaa>;
+ };
+
+ qos@ff518000 {
+ compatible = "syscon";
+ reg = <0x00 0xff518000 0x00 0x20>;
+ phandle = <0x18>;
+ };
+
+ qos@ff520000 {
+ compatible = "syscon";
+ reg = <0x00 0xff520000 0x00 0x20>;
+ phandle = <0x28>;
+ };
+
+ qos@ff52c000 {
+ compatible = "syscon";
+ reg = <0x00 0xff52c000 0x00 0x20>;
+ phandle = <0x17>;
+ };
+
+ qos@ff538000 {
+ compatible = "syscon";
+ reg = <0x00 0xff538000 0x00 0x20>;
+ phandle = <0x19>;
+ };
+
+ qos@ff538080 {
+ compatible = "syscon";
+ reg = <0x00 0xff538080 0x00 0x20>;
+ phandle = <0x1a>;
+ };
+
+ qos@ff538100 {
+ compatible = "syscon";
+ reg = <0x00 0xff538100 0x00 0x20>;
+ phandle = <0x1b>;
+ };
+
+ qos@ff538180 {
+ compatible = "syscon";
+ reg = <0x00 0xff538180 0x00 0x20>;
+ phandle = <0x1c>;
+ };
+
+ qos@ff540000 {
+ compatible = "syscon";
+ reg = <0x00 0xff540000 0x00 0x20>;
+ phandle = <0x15>;
+ };
+
+ qos@ff540080 {
+ compatible = "syscon";
+ reg = <0x00 0xff540080 0x00 0x20>;
+ phandle = <0x16>;
+ };
+
+ qos@ff548000 {
+ compatible = "syscon";
+ reg = <0x00 0xff548000 0x00 0x20>;
+ phandle = <0x23>;
+ };
+
+ qos@ff548080 {
+ compatible = "syscon";
+ reg = <0x00 0xff548080 0x00 0x20>;
+ phandle = <0x24>;
+ };
+
+ qos@ff548100 {
+ compatible = "syscon";
+ reg = <0x00 0xff548100 0x00 0x20>;
+ phandle = <0x25>;
+ };
+
+ qos@ff548180 {
+ compatible = "syscon";
+ reg = <0x00 0xff548180 0x00 0x20>;
+ phandle = <0x26>;
+ };
+
+ qos@ff548200 {
+ compatible = "syscon";
+ reg = <0x00 0xff548200 0x00 0x20>;
+ phandle = <0x27>;
+ };
+
+ qos@ff550000 {
+ compatible = "syscon";
+ reg = <0x00 0xff550000 0x00 0x20>;
+ phandle = <0x1f>;
+ };
+
+ qos@ff550080 {
+ compatible = "syscon";
+ reg = <0x00 0xff550080 0x00 0x20>;
+ phandle = <0x20>;
+ };
+
+ qos@ff550100 {
+ compatible = "syscon";
+ reg = <0x00 0xff550100 0x00 0x20>;
+ phandle = <0x21>;
+ };
+
+ qos@ff550180 {
+ compatible = "syscon";
+ reg = <0x00 0xff550180 0x00 0x20>;
+ phandle = <0x22>;
+ };
+
+ qos@ff558000 {
+ compatible = "syscon";
+ reg = <0x00 0xff558000 0x00 0x20>;
+ phandle = <0x1d>;
+ };
+
+ qos@ff558080 {
+ compatible = "syscon";
+ reg = <0x00 0xff558080 0x00 0x20>;
+ phandle = <0x1e>;
+ };
+
+ dfi@ff610000 {
+ reg = <0x00 0xff610000 0x00 0x400>;
+ compatible = "rockchip,px30-dfi";
+ rockchip,pmugrf = <0xac>;
+ status = "okay";
+ phandle = <0xad>;
+ };
+
+ dmc {
+ compatible = "rockchip,px30-dmc";
+ interrupts = <0x00 0x69 0x04>;
+ interrupt-names = "complete_irq";
+ devfreq-events = <0xad>;
+ clocks = <0x02 0x54>;
+ clock-names = "dmc_clk";
+ operating-points-v2 = <0xae>;
+ ddr_timing = <0xaf>;
+ upthreshold = <0x28>;
+ downdifferential = <0x14>;
+ system-status-freq = <0x01 0x80e80 0x08 0x6ddd0 0x02 0x2f5d0 0x20 0x6ddd0 0x1000 0x80e80 0x4000 0xa2990 0x2000 0xa2990>;
+ auto-min-freq = <0x50140>;
+ auto-freq-en = <0x01>;
+ #cooling-cells = <0x02>;
+ status = "okay";
+ center-supply = <0x0e>;
+ phandle = <0xab>;
+
+ ddr_power_model {
+ compatible = "ddr_power_model";
+ dynamic-power-coefficient = <0x78>;
+ static-power-coefficient = <0xc8>;
+ ts = <0x7d00 0x125c 0xffffffb0 0x02>;
+ thermal-zone = "soc-thermal";
+ phandle = <0x115>;
+ };
+ };
+
+ dmc-opp-table {
+ compatible = "operating-points-v2";
+ rockchip,max-volt = <0x118c30>;
+ rockchip,evb-irdrop = <0x61a8>;
+ rockchip,pvtm-voltage-sel = <0x00 0xc350 0x00 0xc351 0xd2f0 0x01 0xd2f1 0xea60 0x02 0xea61 0x1869f 0x03>;
+ rockchip,pvtm-ch = <0x00 0x00>;
+ phandle = <0xae>;
+
+ opp-528000000 {
+ opp-hz = <0x00 0x1f78a400>;
+ opp-microvolt = <0xee098>;
+ opp-microvolt-L0 = <0xee098>;
+ opp-microvolt-L1 = <0xee098>;
+ opp-microvolt-L2 = <0xe7ef0>;
+ opp-microvolt-L3 = <0xe7ef0>;
+ };
+
+ opp-666000000 {
+ opp-hz = <0x00 0x27b25a80>;
+ opp-microvolt = <0x100590>;
+ opp-microvolt-L0 = <0x100590>;
+ opp-microvolt-L1 = <0xf4240>;
+ opp-microvolt-L2 = <0xee098>;
+ opp-microvolt-L3 = <0xe7ef0>;
+ };
+
+ opp-786000000 {
+ opp-hz = <0x00 0x2ed96880>;
+ opp-microvolt = <0x10c8e0>;
+ opp-microvolt-L0 = <0x10c8e0>;
+ opp-microvolt-L1 = <0x100590>;
+ opp-microvolt-L2 = <0xfa3e8>;
+ opp-microvolt-L3 = <0xf4240>;
+ status = "okay";
+ };
+ };
+
+ rockchip-system-monitor {
+ compatible = "rockchip,system-monitor";
+ rockchip,thermal-zone = "soc-thermal";
+ rockchip,polling-delay = <0xc8>;
+ phandle = <0x116>;
+ };
+
+ pinctrl {
+ compatible = "rockchip,px30-pinctrl";
+ rockchip,grf = <0x2f>;
+ rockchip,pmu = <0xac>;
+ #address-cells = <0x02>;
+ #size-cells = <0x02>;
+ ranges;
+ phandle = <0x117>;
+
+ gpio0@ff040000 {
+ compatible = "rockchip,gpio-bank";
+ reg = <0x00 0xff040000 0x00 0x100>;
+ interrupts = <0x00 0x03 0x04>;
+ clocks = <0x2a 0x14>;
+ gpio-controller;
+ #gpio-cells = <0x02>;
+ interrupt-controller;
+ #interrupt-cells = <0x02>;
+ phandle = <0x5c>;
+ };
+
+ gpio1@ff250000 {
+ compatible = "rockchip,gpio-bank";
+ reg = <0x00 0xff250000 0x00 0x100>;
+ interrupts = <0x00 0x04 0x04>;
+ clocks = <0x02 0x15c>;
+ gpio-controller;
+ #gpio-cells = <0x02>;
+ interrupt-controller;
+ #interrupt-cells = <0x02>;
+ phandle = <0xbf>;
+ };
+
+ gpio2@ff260000 {
+ compatible = "rockchip,gpio-bank";
+ reg = <0x00 0xff260000 0x00 0x100>;
+ interrupts = <0x00 0x05 0x04>;
+ clocks = <0x02 0x15d>;
+ gpio-controller;
+ #gpio-cells = <0x02>;
+ interrupt-controller;
+ #interrupt-cells = <0x02>;
+ phandle = <0x66>;
+ };
+
+ gpio3@ff270000 {
+ compatible = "rockchip,gpio-bank";
+ reg = <0x00 0xff270000 0x00 0x100>;
+ interrupts = <0x00 0x06 0x04>;
+ clocks = <0x02 0x15e>;
+ gpio-controller;
+ #gpio-cells = <0x02>;
+ interrupt-controller;
+ #interrupt-cells = <0x02>;
+ phandle = <0x97>;
+ };
+
+ pcfg-pull-up {
+ bias-pull-up;
+ phandle = <0xb2>;
+ };
+
+ pcfg-pull-down {
+ bias-pull-down;
+ phandle = <0x118>;
+ };
+
+ pcfg-pull-none {
+ bias-disable;
+ phandle = <0xb1>;
+ };
+
+ pcfg-pull-none-2ma {
+ bias-disable;
+ drive-strength = <0x02>;
+ phandle = <0x119>;
+ };
+
+ pcfg-pull-up-2ma {
+ bias-pull-up;
+ drive-strength = <0x02>;
+ phandle = <0x11a>;
+ };
+
+ pcfg-pull-up-4ma {
+ bias-pull-up;
+ drive-strength = <0x04>;
+ phandle = <0xb3>;
+ };
+
+ pcfg-pull-none-4ma {
+ bias-disable;
+ drive-strength = <0x04>;
+ phandle = <0x11b>;
+ };
+
+ pcfg-pull-down-4ma {
+ bias-pull-down;
+ drive-strength = <0x04>;
+ phandle = <0x11c>;
+ };
+
+ pcfg-pull-none-8ma {
+ bias-disable;
+ drive-strength = <0x08>;
+ phandle = <0xb6>;
+ };
+
+ pcfg-pull-up-8ma {
+ bias-pull-up;
+ drive-strength = <0x08>;
+ phandle = <0xb4>;
+ };
+
+ pcfg-pull-none-12ma {
+ bias-disable;
+ drive-strength = <0x0c>;
+ phandle = <0xb8>;
+ };
+
+ pcfg-pull-up-12ma {
+ bias-pull-up;
+ drive-strength = <0x0c>;
+ phandle = <0xb7>;
+ };
+
+ pcfg-pull-none-smt {
+ bias-disable;
+ input-schmitt-enable;
+ phandle = <0xb0>;
+ };
+
+ pcfg-output-high {
+ output-high;
+ phandle = <0x11d>;
+ };
+
+ pcfg-output-low {
+ output-low;
+ phandle = <0xb9>;
+ };
+
+ pcfg-input-high {
+ bias-pull-up;
+ input-enable;
+ phandle = <0xb5>;
+ };
+
+ pcfg-input {
+ input-enable;
+ phandle = <0x11e>;
+ };
+
+ i2c0 {
+
+ i2c0-xfer {
+ rockchip,pins = <0x00 0x08 0x01 0xb0 0x00 0x09 0x01 0xb0>;
+ phandle = <0x5b>;
+ };
+ };
+
+ i2c1 {
+
+ i2c1-xfer {
+ rockchip,pins = <0x00 0x12 0x01 0xb0 0x00 0x13 0x01 0xb0>;
+ phandle = <0x69>;
+ };
+ };
+
+ i2c2 {
+
+ i2c2-xfer {
+ rockchip,pins = <0x02 0x0f 0x02 0xb0 0x02 0x10 0x02 0xb0>;
+ phandle = <0x6a>;
+ };
+ };
+
+ i2c3 {
+
+ i2c3-xfer {
+ rockchip,pins = <0x01 0x0c 0x04 0xb0 0x01 0x0d 0x04 0xb0>;
+ phandle = <0x6b>;
+ };
+ };
+
+ tsadc {
+
+ tsadc-otp-gpio {
+ rockchip,pins = <0x00 0x06 0x00 0xb1>;
+ phandle = <0x86>;
+ };
+
+ tsadc-otp-out {
+ rockchip,pins = <0x00 0x06 0x01 0xb1>;
+ phandle = <0x87>;
+ };
+ };
+
+ uart0 {
+
+ uart0-xfer {
+ rockchip,pins = <0x00 0x0a 0x01 0xb2 0x00 0x0b 0x01 0xb2>;
+ phandle = <0x2c>;
+ };
+
+ uart0-cts {
+ rockchip,pins = <0x00 0x0c 0x01 0xb1>;
+ phandle = <0x2d>;
+ };
+
+ uart0-rts {
+ rockchip,pins = <0x00 0x0d 0x01 0xb1>;
+ phandle = <0x2e>;
+ };
+
+ uart0-rts-gpio {
+ rockchip,pins = <0x00 0x0d 0x00 0xb1>;
+ phandle = <0x11f>;
+ };
+ };
+
+ uart1 {
+
+ uart1-xfer {
+ rockchip,pins = <0x01 0x11 0x01 0xb2 0x01 0x10 0x01 0xb2>;
+ phandle = <0x4f>;
+ };
+
+ uart1-cts {
+ rockchip,pins = <0x01 0x12 0x01 0xb1>;
+ phandle = <0x50>;
+ };
+
+ uart1-rts {
+ rockchip,pins = <0x01 0x13 0x01 0xb1>;
+ phandle = <0x120>;
+ };
+
+ uart1-rts-gpio {
+ rockchip,pins = <0x01 0x13 0x00 0xb1>;
+ phandle = <0x121>;
+ };
+ };
+
+ uart2-m0 {
+
+ uart2m0-xfer {
+ rockchip,pins = <0x01 0x1a 0x02 0xb2 0x01 0x1b 0x02 0xb2>;
+ phandle = <0x51>;
+ };
+ };
+
+ uart2-m1 {
+
+ uart2m1-xfer {
+ rockchip,pins = <0x02 0x0c 0x02 0xb2 0x02 0x0e 0x02 0xb2>;
+ phandle = <0xba>;
+ };
+ };
+
+ uart3-m0 {
+
+ uart3m0-xfer {
+ rockchip,pins = <0x00 0x10 0x02 0xb2 0x00 0x11 0x02 0xb2>;
+ phandle = <0x122>;
+ };
+
+ uart3m0-cts {
+ rockchip,pins = <0x00 0x12 0x02 0xb1>;
+ phandle = <0x123>;
+ };
+
+ uart3m0-rts {
+ rockchip,pins = <0x00 0x13 0x02 0xb1>;
+ phandle = <0x124>;
+ };
+
+ uart3m0-rts-gpio {
+ rockchip,pins = <0x00 0x13 0x00 0xb1>;
+ phandle = <0x125>;
+ };
+ };
+
+ uart3-m1 {
+
+ uart3m1-xfer {
+ rockchip,pins = <0x01 0x0e 0x02 0xb2 0x01 0x0f 0x02 0xb2>;
+ phandle = <0x52>;
+ };
+
+ uart3m1-cts {
+ rockchip,pins = <0x01 0x0c 0x02 0xb1>;
+ phandle = <0x53>;
+ };
+
+ uart3m1-rts {
+ rockchip,pins = <0x01 0x0d 0x02 0xb1>;
+ phandle = <0x54>;
+ };
+
+ uart3m1-rts-gpio {
+ rockchip,pins = <0x01 0x0d 0x00 0xb1>;
+ phandle = <0x126>;
+ };
+ };
+
+ uart4 {
+
+ uart4-xfer {
+ rockchip,pins = <0x01 0x1c 0x02 0xb2 0x01 0x1d 0x02 0xb2>;
+ phandle = <0x55>;
+ };
+
+ uart4-cts {
+ rockchip,pins = <0x01 0x1e 0x02 0xb1>;
+ phandle = <0x56>;
+ };
+
+ uart4-rts {
+ rockchip,pins = <0x01 0x1f 0x02 0xb1>;
+ phandle = <0x57>;
+ };
+ };
+
+ uart5 {
+
+ uart5-xfer {
+ rockchip,pins = <0x03 0x02 0x04 0xb2 0x03 0x01 0x04 0xb2>;
+ phandle = <0x58>;
+ };
+
+ uart5-cts {
+ rockchip,pins = <0x03 0x03 0x04 0xb1>;
+ phandle = <0x59>;
+ };
+
+ uart5-rts {
+ rockchip,pins = <0x03 0x05 0x04 0xb1>;
+ phandle = <0x5a>;
+ };
+ };
+
+ spi0 {
+
+ spi0-clk {
+ rockchip,pins = <0x01 0x0f 0x03 0xb3>;
+ phandle = <0x6c>;
+ };
+
+ spi0-csn {
+ rockchip,pins = <0x01 0x0e 0x03 0xb3>;
+ phandle = <0x6d>;
+ };
+
+ spi0-miso {
+ rockchip,pins = <0x01 0x0d 0x03 0xb3>;
+ phandle = <0x6e>;
+ };
+
+ spi0-mosi {
+ rockchip,pins = <0x01 0x0c 0x03 0xb3>;
+ phandle = <0x6f>;
+ };
+
+ spi0-clk-hs {
+ rockchip,pins = <0x01 0x0f 0x03 0xb4>;
+ phandle = <0x70>;
+ };
+
+ spi0-miso-hs {
+ rockchip,pins = <0x01 0x0d 0x03 0xb4>;
+ phandle = <0x71>;
+ };
+
+ spi0-mosi-hs {
+ rockchip,pins = <0x01 0x0c 0x03 0xb4>;
+ phandle = <0x72>;
+ };
+ };
+
+ spi1 {
+
+ spi1-clk {
+ rockchip,pins = <0x03 0x0f 0x04 0xb3>;
+ phandle = <0x73>;
+ };
+
+ spi1-csn0 {
+ rockchip,pins = <0x03 0x09 0x04 0xb3>;
+ phandle = <0x74>;
+ };
+
+ spi1-csn1 {
+ rockchip,pins = <0x03 0x0a 0x02 0xb3>;
+ phandle = <0x75>;
+ };
+
+ spi1-miso {
+ rockchip,pins = <0x03 0x0e 0x04 0xb3>;
+ phandle = <0x76>;
+ };
+
+ spi1-mosi {
+ rockchip,pins = <0x03 0x0c 0x04 0xb3>;
+ phandle = <0x77>;
+ };
+
+ spi1-clk-hs {
+ rockchip,pins = <0x03 0x0f 0x04 0xb4>;
+ phandle = <0x78>;
+ };
+
+ spi1-miso-hs {
+ rockchip,pins = <0x03 0x0e 0x04 0xb4>;
+ phandle = <0x79>;
+ };
+
+ spi1-mosi-hs {
+ rockchip,pins = <0x03 0x0c 0x04 0xb4>;
+ phandle = <0x7a>;
+ };
+ };
+
+ pdm {
+
+ pdm-clk0m0 {
+ rockchip,pins = <0x03 0x16 0x02 0xb1>;
+ phandle = <0x44>;
+ };
+
+ pdm-clk0m1 {
+ rockchip,pins = <0x02 0x16 0x01 0xb1>;
+ phandle = <0x127>;
+ };
+
+ pdm-clk1 {
+ rockchip,pins = <0x03 0x17 0x02 0xb1>;
+ phandle = <0x45>;
+ };
+
+ pdm-sdi0m0 {
+ rockchip,pins = <0x03 0x1b 0x02 0xb1>;
+ phandle = <0x46>;
+ };
+
+ pdm-sdi0m1 {
+ rockchip,pins = <0x02 0x15 0x02 0xb1>;
+ phandle = <0x128>;
+ };
+
+ pdm-sdi1 {
+ rockchip,pins = <0x03 0x18 0x02 0xb1>;
+ phandle = <0x47>;
+ };
+
+ pdm-sdi2 {
+ rockchip,pins = <0x03 0x19 0x02 0xb1>;
+ phandle = <0x48>;
+ };
+
+ pdm-sdi3 {
+ rockchip,pins = <0x03 0x1a 0x02 0xb1>;
+ phandle = <0x49>;
+ };
+
+ pdm-clk0m0-sleep {
+ rockchip,pins = <0x03 0x16 0x00 0xb5>;
+ phandle = <0x129>;
+ };
+
+ pdm-clk0m1-sleep {
+ rockchip,pins = <0x02 0x16 0x00 0xb5>;
+ phandle = <0x12a>;
+ };
+
+ pdm-clk1-sleep {
+ rockchip,pins = <0x03 0x17 0x00 0xb5>;
+ phandle = <0x12b>;
+ };
+
+ pdm-sdi0m0-sleep {
+ rockchip,pins = <0x03 0x1b 0x00 0xb5>;
+ phandle = <0x12c>;
+ };
+
+ pdm-sdi0m1-sleep {
+ rockchip,pins = <0x02 0x15 0x00 0xb5>;
+ phandle = <0x12d>;
+ };
+
+ pdm-sdi1-sleep {
+ rockchip,pins = <0x03 0x18 0x00 0xb5>;
+ phandle = <0x12e>;
+ };
+
+ pdm-sdi2-sleep {
+ rockchip,pins = <0x03 0x19 0x00 0xb5>;
+ phandle = <0x12f>;
+ };
+
+ pdm-sdi3-sleep {
+ rockchip,pins = <0x03 0x1a 0x00 0xb5>;
+ phandle = <0x130>;
+ };
+ };
+
+ i2s0 {
+
+ i2s0-8ch-mclk {
+ rockchip,pins = <0x03 0x11 0x02 0xb1>;
+ phandle = <0x131>;
+ };
+
+ i2s0-8ch-sclktx {
+ rockchip,pins = <0x03 0x13 0x02 0xb1>;
+ phandle = <0x30>;
+ };
+
+ i2s0-8ch-sclkrx {
+ rockchip,pins = <0x03 0x0c 0x02 0xb1>;
+ phandle = <0x31>;
+ };
+
+ i2s0-8ch-lrcktx {
+ rockchip,pins = <0x03 0x12 0x02 0xb1>;
+ phandle = <0x32>;
+ };
+
+ i2s0-8ch-lrckrx {
+ rockchip,pins = <0x03 0x0d 0x02 0xb1>;
+ phandle = <0x33>;
+ };
+
+ i2s0-8ch-sdo0 {
+ rockchip,pins = <0x03 0x14 0x02 0xb1>;
+ phandle = <0x38>;
+ };
+
+ i2s0-8ch-sdo1 {
+ rockchip,pins = <0x03 0x10 0x02 0xb1>;
+ phandle = <0x39>;
+ };
+
+ i2s0-8ch-sdo2 {
+ rockchip,pins = <0x03 0x0f 0x02 0xb1>;
+ phandle = <0x3a>;
+ };
+
+ i2s0-8ch-sdo3 {
+ rockchip,pins = <0x03 0x0e 0x02 0xb1>;
+ phandle = <0x3b>;
+ };
+
+ i2s0-8ch-sdi0 {
+ rockchip,pins = <0x03 0x15 0x02 0xb1>;
+ phandle = <0x34>;
+ };
+
+ i2s0-8ch-sdi1 {
+ rockchip,pins = <0x03 0x0b 0x02 0xb1>;
+ phandle = <0x35>;
+ };
+
+ i2s0-8ch-sdi2 {
+ rockchip,pins = <0x03 0x09 0x02 0xb1>;
+ phandle = <0x36>;
+ };
+
+ i2s0-8ch-sdi3 {
+ rockchip,pins = <0x03 0x08 0x02 0xb1>;
+ phandle = <0x37>;
+ };
+ };
+
+ i2s1 {
+
+ i2s1-2ch-mclk {
+ rockchip,pins = <0x02 0x13 0x01 0xb1>;
+ phandle = <0x68>;
+ };
+
+ i2s1-2ch-sclk {
+ rockchip,pins = <0x02 0x12 0x01 0xb1>;
+ phandle = <0x3c>;
+ };
+
+ i2s1-2ch-lrck {
+ rockchip,pins = <0x02 0x11 0x01 0xb1>;
+ phandle = <0x3d>;
+ };
+
+ i2s1-2ch-sdi {
+ rockchip,pins = <0x02 0x15 0x01 0xb1>;
+ phandle = <0x3e>;
+ };
+
+ i2s1-2ch-sdo {
+ rockchip,pins = <0x02 0x14 0x01 0xb1>;
+ phandle = <0x3f>;
+ };
+ };
+
+ i2s2 {
+
+ i2s2-2ch-mclk {
+ rockchip,pins = <0x03 0x01 0x02 0xb1>;
+ phandle = <0x132>;
+ };
+
+ i2s2-2ch-sclk {
+ rockchip,pins = <0x03 0x02 0x02 0xb1>;
+ phandle = <0x40>;
+ };
+
+ i2s2-2ch-lrck {
+ rockchip,pins = <0x03 0x03 0x02 0xb1>;
+ phandle = <0x41>;
+ };
+
+ i2s2-2ch-sdi {
+ rockchip,pins = <0x03 0x05 0x02 0xb1>;
+ phandle = <0x42>;
+ };
+
+ i2s2-2ch-sdo {
+ rockchip,pins = <0x03 0x07 0x02 0xb1>;
+ phandle = <0x43>;
+ };
+ };
+
+ sdmmc {
+
+ sdmmc-clk {
+ rockchip,pins = <0x01 0x1e 0x01 0xb6>;
+ phandle = <0x8f>;
+ };
+
+ sdmmc-cmd {
+ rockchip,pins = <0x01 0x1f 0x01 0xb4>;
+ phandle = <0x90>;
+ };
+
+ sdmmc-det {
+ rockchip,pins = <0x00 0x03 0x01 0xb4>;
+ phandle = <0x91>;
+ };
+
+ sdmmc-bus1 {
+ rockchip,pins = <0x01 0x1a 0x01 0xb4>;
+ phandle = <0x133>;
+ };
+
+ sdmmc-bus4 {
+ rockchip,pins = <0x01 0x1a 0x01 0xb4 0x01 0x1b 0x01 0xb4 0x01 0x1c 0x01 0xb4 0x01 0x1d 0x01 0xb4>;
+ phandle = <0x92>;
+ };
+
+ sdmmc-gpio {
+ rockchip,pins = <0x01 0x1a 0x00 0xb3 0x01 0x1b 0x00 0xb3 0x01 0x1c 0x00 0xb3 0x01 0x1d 0x00 0xb3 0x01 0x1e 0x00 0xb3 0x01 0x1f 0x00 0xb3>;
+ phandle = <0x134>;
+ };
+ };
+
+ sdio {
+
+ sdio-clk {
+ rockchip,pins = <0x01 0x15 0x01 0xb1>;
+ phandle = <0x96>;
+ };
+
+ sdio-cmd {
+ rockchip,pins = <0x01 0x14 0x01 0xb2>;
+ phandle = <0x95>;
+ };
+
+ sdio-bus4 {
+ rockchip,pins = <0x01 0x16 0x01 0xb2 0x01 0x17 0x01 0xb2 0x01 0x18 0x01 0xb2 0x01 0x19 0x01 0xb2>;
+ phandle = <0x94>;
+ };
+
+ sdio-gpio {
+ rockchip,pins = <0x01 0x16 0x00 0xb2 0x01 0x17 0x00 0xb2 0x01 0x18 0x00 0xb2 0x01 0x19 0x00 0xb2 0x01 0x14 0x00 0xb2 0x01 0x15 0x00 0xb2>;
+ phandle = <0x135>;
+ };
+ };
+
+ emmc {
+
+ emmc-clk {
+ rockchip,pins = <0x01 0x09 0x02 0xb6>;
+ phandle = <0x136>;
+ };
+
+ emmc-cmd {
+ rockchip,pins = <0x01 0x0a 0x02 0xb4>;
+ phandle = <0x137>;
+ };
+
+ emmc-pwren {
+ rockchip,pins = <0x01 0x08 0x02 0xb1>;
+ phandle = <0x138>;
+ };
+
+ emmc-rstnout {
+ rockchip,pins = <0x01 0x0b 0x02 0xb1>;
+ phandle = <0x139>;
+ };
+
+ emmc-bus1 {
+ rockchip,pins = <0x01 0x00 0x02 0xb4>;
+ phandle = <0x13a>;
+ };
+
+ emmc-bus4 {
+ rockchip,pins = <0x01 0x00 0x02 0xb4 0x01 0x01 0x02 0xb4 0x01 0x02 0x02 0xb4 0x01 0x03 0x02 0xb4>;
+ phandle = <0x13b>;
+ };
+
+ emmc-bus8 {
+ rockchip,pins = <0x01 0x00 0x02 0xb4 0x01 0x01 0x02 0xb4 0x01 0x02 0x02 0xb4 0x01 0x03 0x02 0xb4 0x01 0x04 0x02 0xb4 0x01 0x05 0x02 0xb4 0x01 0x06 0x02 0xb4 0x01 0x07 0x02 0xb4>;
+ phandle = <0x13c>;
+ };
+ };
+
+ flash {
+
+ flash-cs0 {
+ rockchip,pins = <0x01 0x08 0x01 0xb1>;
+ phandle = <0x13d>;
+ };
+
+ flash-rdy {
+ rockchip,pins = <0x01 0x09 0x01 0xb1>;
+ phandle = <0x13e>;
+ };
+
+ flash-dqs {
+ rockchip,pins = <0x01 0x0a 0x01 0xb1>;
+ phandle = <0x13f>;
+ };
+
+ flash-ale {
+ rockchip,pins = <0x01 0x0b 0x01 0xb1>;
+ phandle = <0x140>;
+ };
+
+ flash-cle {
+ rockchip,pins = <0x01 0x0c 0x01 0xb1>;
+ phandle = <0x141>;
+ };
+
+ flash-wrn {
+ rockchip,pins = <0x01 0x0d 0x01 0xb1>;
+ phandle = <0x142>;
+ };
+
+ flash-csl {
+ rockchip,pins = <0x01 0x0e 0x01 0xb1>;
+ phandle = <0x143>;
+ };
+
+ flash-rdn {
+ rockchip,pins = <0x01 0x0f 0x01 0xb1>;
+ phandle = <0x144>;
+ };
+
+ flash-bus8 {
+ rockchip,pins = <0x01 0x00 0x01 0xb7 0x01 0x01 0x01 0xb7 0x01 0x02 0x01 0xb7 0x01 0x03 0x01 0xb7 0x01 0x04 0x01 0xb7 0x01 0x05 0x01 0xb7 0x01 0x06 0x01 0xb7 0x01 0x07 0x01 0xb7>;
+ phandle = <0x145>;
+ };
+ };
+
+ lcdc {
+
+ lcdc-m0-rgb-pins {
+ rockchip,pins = <0x03 0x00 0x01 0xb6 0x03 0x01 0x01 0xb6 0x03 0x02 0x01 0xb6 0x03 0x03 0x01 0xb6 0x03 0x04 0x01 0xb6 0x03 0x05 0x01 0xb6 0x03 0x06 0x01 0xb6 0x03 0x07 0x01 0xb6 0x03 0x08 0x01 0xb6 0x03 0x09 0x01 0xb6 0x03 0x0a 0x01 0xb6 0x03 0x0b 0x01 0xb6 0x03 0x0c 0x01 0xb6 0x03 0x0d 0x01 0xb6 0x03 0x0e 0x01 0xb6 0x03 0x0f 0x01 0xb6 0x03 0x10 0x01 0xb6 0x03 0x11 0x01 0xb6 0x03 0x12 0x01 0xb6 0x03 0x13 0x01 0xb6 0x03 0x14 0x01 0xb6 0x03 0x15 0x01 0xb6 0x03 0x16 0x01 0xb6 0x03 0x17 0x01 0xb6 0x03 0x18 0x01 0xb6 0x03 0x19 0x01 0xb6 0x03 0x1a 0x01 0xb6 0x03 0x1b 0x01 0xb6>;
+ phandle = <0x146>;
+ };
+
+ lcdc-m0-sleep-pins {
+ rockchip,pins = <0x03 0x00 0x00 0xb1 0x03 0x01 0x00 0xb1 0x03 0x02 0x00 0xb1 0x03 0x03 0x00 0xb1 0x03 0x04 0x00 0xb1 0x03 0x05 0x00 0xb1 0x03 0x06 0x00 0xb1 0x03 0x07 0x00 0xb1 0x03 0x08 0x00 0xb1 0x03 0x09 0x00 0xb1 0x03 0x0a 0x00 0xb1 0x03 0x0b 0x00 0xb1 0x03 0x0c 0x00 0xb1 0x03 0x0d 0x00 0xb1 0x03 0x0e 0x00 0xb1 0x03 0x0f 0x00 0xb1 0x03 0x10 0x00 0xb1 0x03 0x11 0x00 0xb1 0x03 0x12 0x00 0xb1 0x03 0x13 0x00 0xb1 0x03 0x14 0x00 0xb1 0x03 0x15 0x00 0xb1 0x03 0x16 0x00 0xb1 0x03 0x17 0x00 0xb1 0x03 0x18 0x00 0xb1 0x03 0x19 0x00 0xb1 0x03 0x1a 0x00 0xb1 0x03 0x1b 0x00 0xb1>;
+ phandle = <0x147>;
+ };
+
+ lcdc-m1-rgb-pins {
+ rockchip,pins = <0x03 0x00 0x01 0xb6 0x03 0x04 0x01 0xb6 0x03 0x06 0x01 0xb6 0x03 0x0a 0x01 0xb6 0x03 0x0b 0x01 0xb6 0x03 0x0d 0x01 0xb6 0x03 0x10 0x01 0xb6 0x03 0x11 0x01 0xb6 0x03 0x12 0x01 0xb6 0x03 0x13 0x01 0xb6 0x03 0x14 0x01 0xb6 0x03 0x15 0x01 0xb6 0x03 0x16 0x01 0xb6 0x03 0x17 0x01 0xb6 0x03 0x18 0x01 0xb6 0x03 0x19 0x01 0xb6 0x03 0x1a 0x01 0xb6 0x03 0x1b 0x01 0xb6>;
+ phandle = <0x4d>;
+ };
+
+ lcdc-m1-sleep-pins {
+ rockchip,pins = <0x03 0x00 0x00 0xb1 0x03 0x04 0x00 0xb1 0x03 0x06 0x00 0xb1 0x03 0x0a 0x00 0xb1 0x03 0x0b 0x00 0xb1 0x03 0x0d 0x00 0xb1 0x03 0x10 0x00 0xb1 0x03 0x11 0x00 0xb1 0x03 0x12 0x00 0xb1 0x03 0x13 0x00 0xb1 0x03 0x14 0x00 0xb1 0x03 0x15 0x00 0xb1 0x03 0x16 0x00 0xb1 0x03 0x17 0x00 0xb1 0x03 0x18 0x00 0xb1 0x03 0x19 0x00 0xb1 0x03 0x1a 0x00 0xb1 0x03 0x1b 0x00 0xb1>;
+ phandle = <0x4e>;
+ };
+ };
+
+ pwm0 {
+
+ pwm0-pin {
+ rockchip,pins = <0x00 0x0f 0x01 0xb1>;
+ phandle = <0x7b>;
+ };
+ };
+
+ pwm1 {
+
+ pwm1-pin {
+ rockchip,pins = <0x00 0x10 0x01 0xb1>;
+ phandle = <0x7c>;
+ };
+ };
+
+ pwm2 {
+
+ pwm2-pin {
+ rockchip,pins = <0x02 0x0d 0x01 0xb1>;
+ phandle = <0x7d>;
+ };
+ };
+
+ pwm3 {
+
+ pwm3-pin {
+ rockchip,pins = <0x00 0x11 0x01 0xb1>;
+ phandle = <0x7e>;
+ };
+ };
+
+ pwm4 {
+
+ pwm4-pin {
+ rockchip,pins = <0x03 0x12 0x03 0xb1>;
+ phandle = <0x7f>;
+ };
+ };
+
+ pwm5 {
+
+ pwm5-pin {
+ rockchip,pins = <0x03 0x13 0x03 0xb1>;
+ phandle = <0x80>;
+ };
+ };
+
+ pwm6 {
+
+ pwm6-pin {
+ rockchip,pins = <0x03 0x14 0x03 0xb1>;
+ phandle = <0x81>;
+ };
+ };
+
+ pwm7 {
+
+ pwm7-pin {
+ rockchip,pins = <0x03 0x15 0x03 0xb1>;
+ phandle = <0x82>;
+ };
+ };
+
+ gmac {
+
+ rmii-pins {
+ rockchip,pins = <0x02 0x00 0x02 0xb8 0x02 0x01 0x02 0xb8 0x02 0x02 0x02 0xb8 0x02 0x03 0x02 0xb1 0x02 0x04 0x02 0xb1 0x02 0x05 0x02 0xb1 0x02 0x06 0x02 0xb1 0x02 0x07 0x02 0xb1 0x02 0x09 0x02 0xb1>;
+ phandle = <0x8d>;
+ };
+
+ mac-refclk-12ma {
+ rockchip,pins = <0x02 0x0a 0x02 0xb8>;
+ phandle = <0x8e>;
+ };
+
+ mac-refclk {
+ rockchip,pins = <0x02 0x0a 0x02 0xb1>;
+ phandle = <0x148>;
+ };
+ };
+
+ cif-m0 {
+
+ cif-clkout-m0 {
+ rockchip,pins = <0x02 0x0b 0x01 0xb8>;
+ phandle = <0xa7>;
+ };
+
+ dvp-d2d9-m0 {
+ rockchip,pins = <0x02 0x00 0x01 0xb1 0x02 0x01 0x01 0xb1 0x02 0x02 0x01 0xb1 0x02 0x03 0x01 0xb1 0x02 0x04 0x01 0xb1 0x02 0x05 0x01 0xb1 0x02 0x06 0x01 0xb1 0x02 0x07 0x01 0xb1 0x02 0x08 0x01 0xb1 0x02 0x09 0x01 0xb1 0x02 0x0a 0x01 0xb1 0x02 0x0b 0x01 0xb1>;
+ phandle = <0xa5>;
+ };
+
+ dvp-d0d1-m0 {
+ rockchip,pins = <0x02 0x0c 0x01 0xb1 0x02 0x0e 0x01 0xb1>;
+ phandle = <0xa9>;
+ };
+
+ d10-d11-m0 {
+ rockchip,pins = <0x02 0x0f 0x01 0xb1 0x02 0x10 0x01 0xb1>;
+ phandle = <0xa8>;
+ };
+ };
+
+ cif-m1 {
+
+ cif-clkout-m1 {
+ rockchip,pins = <0x03 0x18 0x03 0xb1>;
+ phandle = <0x149>;
+ };
+
+ dvp-d2d9-m1 {
+ rockchip,pins = <0x03 0x03 0x03 0xb1 0x03 0x05 0x03 0xb1 0x03 0x07 0x03 0xb1 0x03 0x08 0x03 0xb1 0x03 0x09 0x03 0xb1 0x03 0x0c 0x03 0xb1 0x03 0x0e 0x03 0xb1 0x03 0x0f 0x03 0xb1 0x03 0x19 0x03 0xb1 0x03 0x1a 0x03 0xb1 0x03 0x1b 0x03 0xb1 0x03 0x18 0x03 0xb1>;
+ phandle = <0x14a>;
+ };
+
+ dvp-d0d1-m1 {
+ rockchip,pins = <0x03 0x01 0x03 0xb1 0x03 0x02 0x03 0xb1>;
+ phandle = <0x14b>;
+ };
+
+ d10-d11-m1 {
+ rockchip,pins = <0x03 0x16 0x03 0xb1 0x03 0x17 0x03 0xb1>;
+ phandle = <0x14c>;
+ };
+ };
+
+ isp {
+
+ isp-prelight {
+ rockchip,pins = <0x03 0x19 0x04 0xb1>;
+ phandle = <0x14d>;
+ };
+ };
+
+ pmic {
+
+ pmic_int {
+ rockchip,pins = <0x00 0x0a 0x00 0xb2 0x00 0x0b 0x00 0xb1>;
+ phandle = <0x5d>;
+ };
+
+ soc_slppin_gpio {
+ rockchip,pins = <0x00 0x04 0x00 0xb9>;
+ phandle = <0x60>;
+ };
+
+ soc_slppin_slp {
+ rockchip,pins = <0x00 0x04 0x01 0xb1>;
+ phandle = <0x5e>;
+ };
+
+ soc_slppin_rst {
+ rockchip,pins = <0x00 0x04 0x02 0xb1>;
+ phandle = <0x62>;
+ };
+ };
+
+ leds {
+
+ led-pins {
+ rockchip,pins = <0x00 0x11 0x00 0xb1>;
+ phandle = <0xc0>;
+ };
+ };
+
+ btns {
+
+ btn-pins {
+ rockchip,pins = <0x01 0x0c 0x00 0xb2 0x01 0x0d 0x00 0xb2 0x01 0x0e 0x00 0xb2 0x01 0x0f 0x00 0xb2 0x01 0x02 0x00 0xb2 0x01 0x05 0x00 0xb2 0x01 0x06 0x00 0xb2 0x01 0x07 0x00 0xb2 0x02 0x00 0x00 0xb2 0x02 0x01 0x00 0xb2 0x02 0x02 0x00 0xb2 0x02 0x03 0x00 0xb2 0x02 0x04 0x00 0xb2 0x02 0x05 0x00 0xb2 0x02 0x06 0x00 0xb2 0x02 0x07 0x00 0xb2 0x03 0x09 0x00 0xb2 0x03 0x0a 0x00 0xb2 0x03 0x0c 0x00 0xb2 0x03 0x0f 0x00 0xb2>;
+ phandle = <0xbd>;
+ };
+ };
+ };
+
+ chosen {
+ bootargs = [00];
+ };
+
+ fiq-debugger {
+ compatible = "rockchip,fiq-debugger";
+ rockchip,serial-id = <0x02>;
+ rockchip,wake-irq = <0x00>;
+ rockchip,irq-mode-enable = <0x00>;
+ rockchip,baudrate = <0x1c200>;
+ interrupts = <0x00 0x7f 0x08>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0xba>;
+ status = "okay";
+ };
+
+ ramoops {
+ compatible = "ramoops";
+ record-size = <0x00 0x20000>;
+ console-size = <0x00 0x80000>;
+ ftrace-size = <0x00 0x00>;
+ pmsg-size = <0x00 0x00>;
+ memory-region = <0xbb>;
+ };
+
+ reserved-memory {
+ #address-cells = <0x02>;
+ #size-cells = <0x02>;
+ ranges;
+
+ drm-logo@00000000 {
+ compatible = "rockchip,drm-logo";
+ reg = <0x00 0x00 0x00 0x00>;
+ phandle = <0x11>;
+ };
+
+ region@110000 {
+ reg = <0x00 0x110000 0x00 0xf0000>;
+ reg-names = "ramoops_mem";
+ phandle = <0xbb>;
+ };
+ };
+
+ odroidgo3-keys {
+ compatible = "gpio-keys";
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+ autorepeat;
+ phandle = <0x14e>;
+
+ button@0 {
+ label = "GPIO BTN-VOLUP";
+ linux,code = <0x73>;
+ gpios = <0x66 0x00 0x01>;
+ };
+
+ button@1 {
+ label = "GPIO BTN-VOLDN";
+ linux,code = <0x72>;
+ gpios = <0x66 0x01 0x01>;
+ };
+ };
+
+ odroidgo3-joypad {
+ compatible = "odroidgo3-joypad";
+ pwms = <0xbc 0x00 0xbebc200 0x00>;
+ pwm-names = "enable";
+ rumble-boost-weak = <0x00>;
+ rumble-boost-strong = <0x00>;
+ joypad-name = "GO-Super Gamepad";
+ joypad-product = <0x1100>;
+ joypad-revision = <0x100>;
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <0xbd>;
+ pinctrl-1 = <0x7b>;
+ io-channel-names = "amux_adc";
+ io-channels = <0xbe 0x01>;
+ amux-count = <0x04>;
+ amux-a-gpios = <0x97 0x0b 0x01>;
+ amux-b-gpios = <0x97 0x08 0x01>;
+ amux-en-gpios = <0x97 0x0d 0x01>;
+ button-adc-scale = <0x02>;
+ button-adc-deadzone = <0x40>;
+ button-adc-fuzz = <0x20>;
+ button-adc-flat = <0x20>;
+ abs_x-p-tuning = <0xc8>;
+ abs_x-n-tuning = <0xc8>;
+ abs_y-p-tuning = <0xc8>;
+ abs_y-n-tuning = <0xc8>;
+ abs_rx-p-tuning = <0xc8>;
+ abs_rx-n-tuning = <0xc8>;
+ abs_ry-p-tuning = <0xc8>;
+ abs_ry-n-tuning = <0xc8>;
+ poll-interval = <0x0a>;
+ invert-absx;
+ invert-absy;
+ phandle = <0x14f>;
+
+ sw1 {
+ gpios = <0xbf 0x0c 0x01>;
+ label = "GPIO DPAD-UP";
+ linux,code = <0x220>;
+ };
+
+ sw2 {
+ gpios = <0xbf 0x0d 0x01>;
+ label = "GPIO DPAD-DOWN";
+ linux,code = <0x221>;
+ };
+
+ sw3 {
+ gpios = <0xbf 0x0e 0x01>;
+ label = "GPIO DPAD-LEFT";
+ linux,code = <0x222>;
+ };
+
+ sw4 {
+ gpios = <0xbf 0x0f 0x01>;
+ label = "GPIO DPAD-RIGHT";
+ linux,code = <0x223>;
+ };
+
+ sw5 {
+ gpios = <0xbf 0x02 0x01>;
+ label = "GPIO KEY BTN-A";
+ linux,code = <0x131>;
+ };
+
+ sw6 {
+ gpios = <0xbf 0x05 0x01>;
+ label = "GPIO BTN-B";
+ linux,code = <0x130>;
+ };
+
+ sw7 {
+ gpios = <0xbf 0x06 0x01>;
+ label = "GPIO BTN-Y";
+ linux,code = <0x134>;
+ };
+
+ sw8 {
+ gpios = <0xbf 0x07 0x01>;
+ label = "GPIO BTN-X";
+ linux,code = <0x133>;
+ };
+
+ sw11 {
+ gpios = <0x66 0x02 0x01>;
+ label = "GPIO F3";
+ linux,code = <0x2c2>;
+ };
+
+ sw12 {
+ gpios = <0x66 0x03 0x01>;
+ label = "GPIO F4";
+ linux,code = <0x2c3>;
+ };
+
+ sw13 {
+ gpios = <0x66 0x04 0x01>;
+ label = "GPIO F5";
+ linux,code = <0x2c4>;
+ };
+
+ sw15 {
+ gpios = <0x66 0x06 0x01>;
+ label = "GPIO TOP-LEFT";
+ linux,code = <0x136>;
+ };
+
+ sw16 {
+ gpios = <0x66 0x07 0x01>;
+ label = "GPIO TOP-RIGHT";
+ linux,code = <0x137>;
+ };
+
+ sw19 {
+ gpios = <0x97 0x09 0x01>;
+ label = "GPIO F1";
+ linux,code = <0x2c0>;
+ };
+
+ sw20 {
+ gpios = <0x97 0x0f 0x01>;
+ label = "GPIO TOP-RIGHT2";
+ linux,code = <0x139>;
+ };
+
+ sw21 {
+ gpios = <0x97 0x0a 0x01>;
+ label = "GPIO TOP-LEFT2";
+ linux,code = <0x138>;
+ };
+
+ sw22 {
+ gpios = <0x97 0x0c 0x01>;
+ label = "GPIO F2";
+ linux,code = <0x2c1>;
+ };
+ };
+
+ gpio_leds {
+ compatible = "gpio-leds";
+ pinctrl-names = "led_pins";
+ pinctrl-0 = <0xc0>;
+ phandle = <0x150>;
+
+ heartbeat {
+ label = "blue:heartbeat";
+ gpios = <0x5c 0x11 0x00>;
+ linux,default-trigger = "heartbeat";
+ };
+ };
+
+ backlight {
+ compatible = "pwm-backlight";
+ pwms = <0xc1 0x00 0x9c40 0x00>;
+ brightness-levels = <0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f 0x20 0x21 0x22 0x23 0x24 0x25 0x26 0x27 0x28 0x29 0x2a 0x2b 0x2c 0x2d 0x2e 0x2f 0x30 0x31 0x32 0x33 0x34 0x35 0x36 0x37 0x38 0x39 0x3a 0x3b 0x3c 0x3d 0x3e 0x3f 0x40 0x41 0x42 0x43 0x44 0x45 0x46 0x47 0x48 0x49 0x4a 0x4b 0x4c 0x4d 0x4e 0x4f 0x50 0x51 0x52 0x53 0x54 0x55 0x56 0x57 0x58 0x59 0x5a 0x5b 0x5c 0x5d 0x5e 0x5f 0x60 0x61 0x62 0x63 0x64 0x65 0x66 0x67 0x68 0x69 0x6a 0x6b 0x6c 0x6d 0x6e 0x6f 0x70 0x71 0x72 0x73 0x74 0x75 0x76 0x77 0x78 0x79 0x7a 0x7b 0x7c 0x7d 0x7e 0x7f 0x80 0x81 0x82 0x83 0x84 0x85 0x86 0x87 0x88 0x89 0x8a 0x8b 0x8c 0x8d 0x8e 0x8f 0x90 0x91 0x92 0x93 0x94 0x95 0x96 0x97 0x98 0x99 0x9a 0x9b 0x9c 0x9d 0x9e 0x9f 0xa0>;
+ default-brightness-level = <0x50>;
+ phandle = <0x9d>;
+ };
+
+ rk817-sound {
+ compatible = "simple-audio-card";
+ simple-audio-card,format = "i2s";
+ simple-audio-card,name = "rockchip,rk817-codec";
+ simple-audio-card,mclk-fs = <0x100>;
+ simple-audio-card,widgets = "Microphone\0Mic Jack\0Headphone\0Headphone Jack";
+ simple-audio-card,routing = "MIC_IN\0Mic Jack\0Headphone Jack\0HPOL\0Headphone Jack\0HPOR";
+ simple-audio-card,hp-det-gpio = <0x66 0x16 0x01>;
+ simple-audio-card,codec-hp-det = <0x01>;
+
+ simple-audio-card,cpu {
+ sound-dai = <0xc2>;
+ };
+
+ simple-audio-card,codec {
+ sound-dai = <0xc3>;
+ };
+ };
+
+ vccsys {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v8_sys";
+ regulator-always-on;
+ regulator-min-microvolt = <0x39fbc0>;
+ regulator-max-microvolt = <0x39fbc0>;
+ phandle = <0x64>;
+ };
+
+ __symbols__ {
+ ddr_timing = "/ddr_timing";
+ cpu0 = "/cpus/cpu@0";
+ cpu1 = "/cpus/cpu@1";
+ cpu2 = "/cpus/cpu@2";
+ cpu3 = "/cpus/cpu@3";
+ CPU_SLEEP = "/cpus/idle-states/cpu-sleep";
+ CLUSTER_SLEEP = "/cpus/idle-states/cluster-sleep";
+ cpu0_opp_table = "/cpu0-opp-table";
+ bus_soc = "/bus-soc";
+ bus_apll = "/bus-apll";
+ bus_apll_opp_table = "/bus-apll-opp-table";
+ display_subsystem = "/display-subsystem";
+ route_lvds = "/display-subsystem/route/route-lvds";
+ route_dsi = "/display-subsystem/route/route-dsi";
+ route_rgb = "/display-subsystem/route/route-rgb";
+ gmac_clkin = "/external-gmac-clock";
+ rockchip_suspend = "/rockchip-suspend";
+ xin24m = "/xin24m";
+ xin32k = "/xin32k";
+ pmu = "/power-management@ff000000";
+ power = "/power-management@ff000000/power-controller";
+ pmugrf = "/syscon@ff010000";
+ pmu_io_domains = "/syscon@ff010000/io-domains";
+ pmu_pvtm = "/syscon@ff010000/pmu-pvtm";
+ uart0 = "/serial@ff030000";
+ i2s0_8ch = "/i2s@ff060000";
+ i2s1_2ch = "/i2s@ff070000";
+ i2s2_2ch = "/i2s@ff080000";
+ pdm = "/pdm@ff0a0000";
+ crypto = "/crypto@ff0b0000";
+ rng = "/rng@ff0b0000";
+ gic = "/interrupt-controller@ff131000";
+ grf = "/syscon@ff140000";
+ io_domains = "/syscon@ff140000/io-domains";
+ lvds = "/syscon@ff140000/lvds";
+ lvds_in_vopb = "/syscon@ff140000/lvds/ports/port@0/endpoint@0";
+ rgb = "/syscon@ff140000/rgb";
+ rgb_in_vopb = "/syscon@ff140000/rgb/ports/port@0/endpoint@0";
+ core_grf = "/syscon@ff148000";
+ pvtm = "/syscon@ff148000/pvtm";
+ uart1 = "/serial@ff158000";
+ uart2 = "/serial@ff160000";
+ uart3 = "/serial@ff168000";
+ uart4 = "/serial@ff170000";
+ uart5 = "/serial@ff178000";
+ i2c0 = "/i2c@ff180000";
+ rk817 = "/i2c@ff180000/pmic@20";
+ pinctrl_rk8xx = "/i2c@ff180000/pmic@20/pinctrl_rk8xx";
+ rk817_ts_gpio1 = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_ts_gpio1";
+ rk817_gt_gpio2 = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_gt_gpio2";
+ rk817_pin_ts = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_pin_ts";
+ rk817_pin_gt = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_pin_gt";
+ rk817_slppin_null = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_slppin_null";
+ rk817_slppin_slp = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_slppin_slp";
+ rk817_slppin_pwrdn = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_slppin_pwrdn";
+ rk817_slppin_rst = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_slppin_rst";
+ vdd_logic = "/i2c@ff180000/pmic@20/regulators/DCDC_REG1";
+ vdd_arm = "/i2c@ff180000/pmic@20/regulators/DCDC_REG2";
+ vcc_ddr = "/i2c@ff180000/pmic@20/regulators/DCDC_REG3";
+ vcc_3v3 = "/i2c@ff180000/pmic@20/regulators/DCDC_REG4";
+ vcc_1v0 = "/i2c@ff180000/pmic@20/regulators/LDO_REG1";
+ vcc1v8_soc = "/i2c@ff180000/pmic@20/regulators/LDO_REG2";
+ vdd1v0_soc = "/i2c@ff180000/pmic@20/regulators/LDO_REG3";
+ vcc3v3_pmu = "/i2c@ff180000/pmic@20/regulators/LDO_REG4";
+ vccio_sd = "/i2c@ff180000/pmic@20/regulators/LDO_REG5";
+ vcc_sd = "/i2c@ff180000/pmic@20/regulators/LDO_REG6";
+ vcc_backlight = "/i2c@ff180000/pmic@20/regulators/LDO_REG7";
+ vcc_lcd = "/i2c@ff180000/pmic@20/regulators/LDO_REG8";
+ dcdc_boost = "/i2c@ff180000/pmic@20/regulators/BOOST";
+ otg_switch = "/i2c@ff180000/pmic@20/regulators/OTG_SWITCH";
+ rk817_codec = "/i2c@ff180000/pmic@20/codec";
+ i2c1 = "/i2c@ff190000";
+ i2c2 = "/i2c@ff1a0000";
+ i2c3 = "/i2c@ff1b0000";
+ spi0 = "/spi@ff1d0000";
+ spi1 = "/spi@ff1d8000";
+ wdt = "/watchdog@ff1e0000";
+ pwm0 = "/pwm@ff200000";
+ pwm1 = "/pwm@ff200010";
+ pwm2 = "/pwm@ff200020";
+ pwm3 = "/pwm@ff200030";
+ pwm4 = "/pwm@ff208000";
+ pwm5 = "/pwm@ff208010";
+ pwm6 = "/pwm@ff208020";
+ pwm7 = "/pwm@ff208030";
+ rktimer = "/rktimer@ff210000";
+ dmac = "/amba/dmac@ff240000";
+ thermal_zones = "/thermal-zones";
+ soc_thermal = "/thermal-zones/soc-thermal";
+ threshold = "/thermal-zones/soc-thermal/trips/trip-point-0";
+ target = "/thermal-zones/soc-thermal/trips/trip-point-1";
+ soc_crit = "/thermal-zones/soc-thermal/trips/soc-crit";
+ gpu_thermal = "/thermal-zones/gpu-thermal";
+ tsadc = "/tsadc@ff280000";
+ saradc = "/saradc@ff288000";
+ otp = "/otp@ff290000";
+ otp_id = "/otp@ff290000/id@7";
+ cpu_leakage = "/otp@ff290000/cpu-leakage@17";
+ performance = "/otp@ff290000/performance@1e";
+ cru = "/clock-controller@ff2b0000";
+ cpu_boost = "/cpu-boost@ff2b8000";
+ pmucru = "/pmu-clock-controller@ff2bc000";
+ usb2phy_grf = "/syscon@ff2c0000";
+ u2phy = "/syscon@ff2c0000/usb2-phy@100";
+ u2phy_host = "/syscon@ff2c0000/usb2-phy@100/host-port";
+ u2phy_otg = "/syscon@ff2c0000/usb2-phy@100/otg-port";
+ video_phy = "/video-phy@ff2e0000";
+ mipi_dphy_rx0 = "/mipi-dphy-rx0@ff2f0000";
+ usb20_otg = "/usb@ff300000";
+ usb_host0_ehci = "/usb@ff340000";
+ usb_host0_ohci = "/usb@ff350000";
+ gmac = "/ethernet@ff360000";
+ sdmmc = "/dwmmc@ff370000";
+ sdio = "/dwmmc@ff380000";
+ emmc = "/dwmmc@ff390000";
+ nandc0 = "/nandc@ff3b0000";
+ sfc = "/sfc@ff3a0000";
+ gpu = "/gpu@ff400000";
+ gpu_opp_table = "/gpu-opp-table";
+ hevc = "/hevc_service@ff440000";
+ vpu = "/vpu_service@ff442000";
+ vpu_combo = "/vpu_combo";
+ hevc_mmu = "/iommu@ff440440";
+ vpu_mmu = "/iommu@ff442800";
+ dsi = "/dsi@ff450000";
+ dsi_in_vopb = "/dsi@ff450000/ports/port@0/endpoint@0";
+ timing0 = "/dsi@ff450000/panel@0/display-timings/60Hz";
+ timing1 = "/dsi@ff450000/panel@0/display-timings/50Hz";
+ timing2 = "/dsi@ff450000/panel@0/display-timings/75Hz";
+ vopb = "/vop@ff460000";
+ vopb_out = "/vop@ff460000/port";
+ vopb_out_lvds = "/vop@ff460000/port/endpoint@0";
+ vopb_out_dsi = "/vop@ff460000/port/endpoint@1";
+ vopb_out_rgb = "/vop@ff460000/port/endpoint@2";
+ vopb_mmu = "/iommu@ff460f00";
+ rk_rga = "/rk_rga@ff480000";
+ cif = "/cif@ff490000";
+ cif_new = "/cif-new@ff490000";
+ vip_mmu = "/iommu@ff490800";
+ rk_isp = "/rk_isp@ff4a0000";
+ rkisp1 = "/rkisp1@ff4a0000";
+ isp_mmu = "/iommu@ff4a8000";
+ qos_gmac = "/qos@ff518000";
+ qos_gpu = "/qos@ff520000";
+ qos_sdmmc = "/qos@ff52c000";
+ qos_emmc = "/qos@ff538000";
+ qos_nand = "/qos@ff538080";
+ qos_sdio = "/qos@ff538100";
+ qos_sfc = "/qos@ff538180";
+ qos_usb_host = "/qos@ff540000";
+ qos_usb_otg = "/qos@ff540080";
+ qos_isp_128 = "/qos@ff548000";
+ qos_isp_rd = "/qos@ff548080";
+ qos_isp_wr = "/qos@ff548100";
+ qos_isp_m1 = "/qos@ff548180";
+ qos_vip = "/qos@ff548200";
+ qos_rga_rd = "/qos@ff550000";
+ qos_rga_wr = "/qos@ff550080";
+ qos_vop_m0 = "/qos@ff550100";
+ qos_vop_m1 = "/qos@ff550180";
+ qos_vpu = "/qos@ff558000";
+ qos_vpu_r128 = "/qos@ff558080";
+ dfi = "/dfi@ff610000";
+ dmc = "/dmc";
+ ddr_power_model = "/dmc/ddr_power_model";
+ dmc_opp_table = "/dmc-opp-table";
+ rockchip_system_monitor = "/rockchip-system-monitor";
+ pinctrl = "/pinctrl";
+ gpio0 = "/pinctrl/gpio0@ff040000";
+ gpio1 = "/pinctrl/gpio1@ff250000";
+ gpio2 = "/pinctrl/gpio2@ff260000";
+ gpio3 = "/pinctrl/gpio3@ff270000";
+ pcfg_pull_up = "/pinctrl/pcfg-pull-up";
+ pcfg_pull_down = "/pinctrl/pcfg-pull-down";
+ pcfg_pull_none = "/pinctrl/pcfg-pull-none";
+ pcfg_pull_none_2ma = "/pinctrl/pcfg-pull-none-2ma";
+ pcfg_pull_up_2ma = "/pinctrl/pcfg-pull-up-2ma";
+ pcfg_pull_up_4ma = "/pinctrl/pcfg-pull-up-4ma";
+ pcfg_pull_none_4ma = "/pinctrl/pcfg-pull-none-4ma";
+ pcfg_pull_down_4ma = "/pinctrl/pcfg-pull-down-4ma";
+ pcfg_pull_none_8ma = "/pinctrl/pcfg-pull-none-8ma";
+ pcfg_pull_up_8ma = "/pinctrl/pcfg-pull-up-8ma";
+ pcfg_pull_none_12ma = "/pinctrl/pcfg-pull-none-12ma";
+ pcfg_pull_up_12ma = "/pinctrl/pcfg-pull-up-12ma";
+ pcfg_pull_none_smt = "/pinctrl/pcfg-pull-none-smt";
+ pcfg_output_high = "/pinctrl/pcfg-output-high";
+ pcfg_output_low = "/pinctrl/pcfg-output-low";
+ pcfg_input_high = "/pinctrl/pcfg-input-high";
+ pcfg_input = "/pinctrl/pcfg-input";
+ i2c0_xfer = "/pinctrl/i2c0/i2c0-xfer";
+ i2c1_xfer = "/pinctrl/i2c1/i2c1-xfer";
+ i2c2_xfer = "/pinctrl/i2c2/i2c2-xfer";
+ i2c3_xfer = "/pinctrl/i2c3/i2c3-xfer";
+ tsadc_otp_gpio = "/pinctrl/tsadc/tsadc-otp-gpio";
+ tsadc_otp_out = "/pinctrl/tsadc/tsadc-otp-out";
+ uart0_xfer = "/pinctrl/uart0/uart0-xfer";
+ uart0_cts = "/pinctrl/uart0/uart0-cts";
+ uart0_rts = "/pinctrl/uart0/uart0-rts";
+ uart0_rts_gpio = "/pinctrl/uart0/uart0-rts-gpio";
+ uart1_xfer = "/pinctrl/uart1/uart1-xfer";
+ uart1_cts = "/pinctrl/uart1/uart1-cts";
+ uart1_rts = "/pinctrl/uart1/uart1-rts";
+ uart1_rts_gpio = "/pinctrl/uart1/uart1-rts-gpio";
+ uart2m0_xfer = "/pinctrl/uart2-m0/uart2m0-xfer";
+ uart2m1_xfer = "/pinctrl/uart2-m1/uart2m1-xfer";
+ uart3m0_xfer = "/pinctrl/uart3-m0/uart3m0-xfer";
+ uart3m0_cts = "/pinctrl/uart3-m0/uart3m0-cts";
+ uart3m0_rts = "/pinctrl/uart3-m0/uart3m0-rts";
+ uart3m0_rts_gpio = "/pinctrl/uart3-m0/uart3m0-rts-gpio";
+ uart3m1_xfer = "/pinctrl/uart3-m1/uart3m1-xfer";
+ uart3m1_cts = "/pinctrl/uart3-m1/uart3m1-cts";
+ uart3m1_rts = "/pinctrl/uart3-m1/uart3m1-rts";
+ uart3m1_rts_gpio = "/pinctrl/uart3-m1/uart3m1-rts-gpio";
+ uart4_xfer = "/pinctrl/uart4/uart4-xfer";
+ uart4_cts = "/pinctrl/uart4/uart4-cts";
+ uart4_rts = "/pinctrl/uart4/uart4-rts";
+ uart5_xfer = "/pinctrl/uart5/uart5-xfer";
+ uart5_cts = "/pinctrl/uart5/uart5-cts";
+ uart5_rts = "/pinctrl/uart5/uart5-rts";
+ spi0_clk = "/pinctrl/spi0/spi0-clk";
+ spi0_csn = "/pinctrl/spi0/spi0-csn";
+ spi0_miso = "/pinctrl/spi0/spi0-miso";
+ spi0_mosi = "/pinctrl/spi0/spi0-mosi";
+ spi0_clk_hs = "/pinctrl/spi0/spi0-clk-hs";
+ spi0_miso_hs = "/pinctrl/spi0/spi0-miso-hs";
+ spi0_mosi_hs = "/pinctrl/spi0/spi0-mosi-hs";
+ spi1_clk = "/pinctrl/spi1/spi1-clk";
+ spi1_csn0 = "/pinctrl/spi1/spi1-csn0";
+ spi1_csn1 = "/pinctrl/spi1/spi1-csn1";
+ spi1_miso = "/pinctrl/spi1/spi1-miso";
+ spi1_mosi = "/pinctrl/spi1/spi1-mosi";
+ spi1_clk_hs = "/pinctrl/spi1/spi1-clk-hs";
+ spi1_miso_hs = "/pinctrl/spi1/spi1-miso-hs";
+ spi1_mosi_hs = "/pinctrl/spi1/spi1-mosi-hs";
+ pdm_clk0m0 = "/pinctrl/pdm/pdm-clk0m0";
+ pdm_clk0m1 = "/pinctrl/pdm/pdm-clk0m1";
+ pdm_clk1 = "/pinctrl/pdm/pdm-clk1";
+ pdm_sdi0m0 = "/pinctrl/pdm/pdm-sdi0m0";
+ pdm_sdi0m1 = "/pinctrl/pdm/pdm-sdi0m1";
+ pdm_sdi1 = "/pinctrl/pdm/pdm-sdi1";
+ pdm_sdi2 = "/pinctrl/pdm/pdm-sdi2";
+ pdm_sdi3 = "/pinctrl/pdm/pdm-sdi3";
+ pdm_clk0m0_sleep = "/pinctrl/pdm/pdm-clk0m0-sleep";
+ pdm_clk0m_sleep1 = "/pinctrl/pdm/pdm-clk0m1-sleep";
+ pdm_clk1_sleep = "/pinctrl/pdm/pdm-clk1-sleep";
+ pdm_sdi0m0_sleep = "/pinctrl/pdm/pdm-sdi0m0-sleep";
+ pdm_sdi0m1_sleep = "/pinctrl/pdm/pdm-sdi0m1-sleep";
+ pdm_sdi1_sleep = "/pinctrl/pdm/pdm-sdi1-sleep";
+ pdm_sdi2_sleep = "/pinctrl/pdm/pdm-sdi2-sleep";
+ pdm_sdi3_sleep = "/pinctrl/pdm/pdm-sdi3-sleep";
+ i2s0_8ch_mclk = "/pinctrl/i2s0/i2s0-8ch-mclk";
+ i2s0_8ch_sclktx = "/pinctrl/i2s0/i2s0-8ch-sclktx";
+ i2s0_8ch_sclkrx = "/pinctrl/i2s0/i2s0-8ch-sclkrx";
+ i2s0_8ch_lrcktx = "/pinctrl/i2s0/i2s0-8ch-lrcktx";
+ i2s0_8ch_lrckrx = "/pinctrl/i2s0/i2s0-8ch-lrckrx";
+ i2s0_8ch_sdo0 = "/pinctrl/i2s0/i2s0-8ch-sdo0";
+ i2s0_8ch_sdo1 = "/pinctrl/i2s0/i2s0-8ch-sdo1";
+ i2s0_8ch_sdo2 = "/pinctrl/i2s0/i2s0-8ch-sdo2";
+ i2s0_8ch_sdo3 = "/pinctrl/i2s0/i2s0-8ch-sdo3";
+ i2s0_8ch_sdi0 = "/pinctrl/i2s0/i2s0-8ch-sdi0";
+ i2s0_8ch_sdi1 = "/pinctrl/i2s0/i2s0-8ch-sdi1";
+ i2s0_8ch_sdi2 = "/pinctrl/i2s0/i2s0-8ch-sdi2";
+ i2s0_8ch_sdi3 = "/pinctrl/i2s0/i2s0-8ch-sdi3";
+ i2s1_2ch_mclk = "/pinctrl/i2s1/i2s1-2ch-mclk";
+ i2s1_2ch_sclk = "/pinctrl/i2s1/i2s1-2ch-sclk";
+ i2s1_2ch_lrck = "/pinctrl/i2s1/i2s1-2ch-lrck";
+ i2s1_2ch_sdi = "/pinctrl/i2s1/i2s1-2ch-sdi";
+ i2s1_2ch_sdo = "/pinctrl/i2s1/i2s1-2ch-sdo";
+ i2s2_2ch_mclk = "/pinctrl/i2s2/i2s2-2ch-mclk";
+ i2s2_2ch_sclk = "/pinctrl/i2s2/i2s2-2ch-sclk";
+ i2s2_2ch_lrck = "/pinctrl/i2s2/i2s2-2ch-lrck";
+ i2s2_2ch_sdi = "/pinctrl/i2s2/i2s2-2ch-sdi";
+ i2s2_2ch_sdo = "/pinctrl/i2s2/i2s2-2ch-sdo";
+ sdmmc_clk = "/pinctrl/sdmmc/sdmmc-clk";
+ sdmmc_cmd = "/pinctrl/sdmmc/sdmmc-cmd";
+ sdmmc_det = "/pinctrl/sdmmc/sdmmc-det";
+ sdmmc_bus1 = "/pinctrl/sdmmc/sdmmc-bus1";
+ sdmmc_bus4 = "/pinctrl/sdmmc/sdmmc-bus4";
+ sdmmc_gpio = "/pinctrl/sdmmc/sdmmc-gpio";
+ sdio_clk = "/pinctrl/sdio/sdio-clk";
+ sdio_cmd = "/pinctrl/sdio/sdio-cmd";
+ sdio_bus4 = "/pinctrl/sdio/sdio-bus4";
+ sdio_gpio = "/pinctrl/sdio/sdio-gpio";
+ emmc_clk = "/pinctrl/emmc/emmc-clk";
+ emmc_cmd = "/pinctrl/emmc/emmc-cmd";
+ emmc_pwren = "/pinctrl/emmc/emmc-pwren";
+ emmc_rstnout = "/pinctrl/emmc/emmc-rstnout";
+ emmc_bus1 = "/pinctrl/emmc/emmc-bus1";
+ emmc_bus4 = "/pinctrl/emmc/emmc-bus4";
+ emmc_bus8 = "/pinctrl/emmc/emmc-bus8";
+ flash_cs0 = "/pinctrl/flash/flash-cs0";
+ flash_rdy = "/pinctrl/flash/flash-rdy";
+ flash_dqs = "/pinctrl/flash/flash-dqs";
+ flash_ale = "/pinctrl/flash/flash-ale";
+ flash_cle = "/pinctrl/flash/flash-cle";
+ flash_wrn = "/pinctrl/flash/flash-wrn";
+ flash_csl = "/pinctrl/flash/flash-csl";
+ flash_rdn = "/pinctrl/flash/flash-rdn";
+ flash_bus8 = "/pinctrl/flash/flash-bus8";
+ lcdc_m0_rgb_pins = "/pinctrl/lcdc/lcdc-m0-rgb-pins";
+ lcdc_m0_sleep_pins = "/pinctrl/lcdc/lcdc-m0-sleep-pins";
+ lcdc_m1_rgb_pins = "/pinctrl/lcdc/lcdc-m1-rgb-pins";
+ lcdc_m1_sleep_pins = "/pinctrl/lcdc/lcdc-m1-sleep-pins";
+ pwm0_pin = "/pinctrl/pwm0/pwm0-pin";
+ pwm1_pin = "/pinctrl/pwm1/pwm1-pin";
+ pwm2_pin = "/pinctrl/pwm2/pwm2-pin";
+ pwm3_pin = "/pinctrl/pwm3/pwm3-pin";
+ pwm4_pin = "/pinctrl/pwm4/pwm4-pin";
+ pwm5_pin = "/pinctrl/pwm5/pwm5-pin";
+ pwm6_pin = "/pinctrl/pwm6/pwm6-pin";
+ pwm7_pin = "/pinctrl/pwm7/pwm7-pin";
+ rmii_pins = "/pinctrl/gmac/rmii-pins";
+ mac_refclk_12ma = "/pinctrl/gmac/mac-refclk-12ma";
+ mac_refclk = "/pinctrl/gmac/mac-refclk";
+ cif_clkout_m0 = "/pinctrl/cif-m0/cif-clkout-m0";
+ dvp_d2d9_m0 = "/pinctrl/cif-m0/dvp-d2d9-m0";
+ dvp_d0d1_m0 = "/pinctrl/cif-m0/dvp-d0d1-m0";
+ dvp_d10d11_m0 = "/pinctrl/cif-m0/d10-d11-m0";
+ cif_clkout_m1 = "/pinctrl/cif-m1/cif-clkout-m1";
+ dvp_d2d9_m1 = "/pinctrl/cif-m1/dvp-d2d9-m1";
+ dvp_d0d1_m1 = "/pinctrl/cif-m1/dvp-d0d1-m1";
+ dvp_d10d11_m1 = "/pinctrl/cif-m1/d10-d11-m1";
+ isp_prelight = "/pinctrl/isp/isp-prelight";
+ pmic_int = "/pinctrl/pmic/pmic_int";
+ soc_slppin_gpio = "/pinctrl/pmic/soc_slppin_gpio";
+ soc_slppin_slp = "/pinctrl/pmic/soc_slppin_slp";
+ soc_slppin_rst = "/pinctrl/pmic/soc_slppin_rst";
+ led_pins = "/pinctrl/leds/led-pins";
+ btn_pins = "/pinctrl/btns/btn-pins";
+ drm_logo = "/reserved-memory/drm-logo@00000000";
+ ramoops_mem = "/reserved-memory/region@110000";
+ gpio_keys = "/odroidgo3-keys";
+ joypad = "/odroidgo3-joypad";
+ leds = "/gpio_leds";
+ backlight = "/backlight";
+ vccsys = "/vccsys";
+ };
+};
diff --git a/config/archr-dts/R36S-DTB/DTS/R46H.dts b/config/archr-dts/R36S-DTB/DTS/R46H.dts
new file mode 100644
index 0000000000..3a6b53fc42
--- /dev/null
+++ b/config/archr-dts/R36S-DTB/DTS/R46H.dts
@@ -0,0 +1,4038 @@
+/dts-v1/;
+
+/ {
+ compatible = "rockchip,rk3326-odroidgo3-linux\0rockchip,rk3326";
+ interrupt-parent = <0x01>;
+ #address-cells = <0x02>;
+ #size-cells = <0x02>;
+ model = "Hardkernel ODROID-GO3";
+
+ ddr_timing {
+ compatible = "rockchip,ddr-timing";
+ ddr2_speed_bin = <0x00>;
+ ddr3_speed_bin = <0x15>;
+ ddr4_speed_bin = <0x0c>;
+ pd_idle = <0x0d>;
+ sr_idle = <0x5d>;
+ sr_mc_gate_idle = <0x00>;
+ srpd_lite_idle = <0x00>;
+ standby_idle = <0x00>;
+ auto_pd_dis_freq = <0x42a>;
+ auto_sr_dis_freq = <0x320>;
+ ddr2_dll_dis_freq = <0x12c>;
+ ddr3_dll_dis_freq = <0x12c>;
+ ddr4_dll_dis_freq = <0x271>;
+ phy_dll_dis_freq = <0x190>;
+ ddr2_odt_dis_freq = <0x64>;
+ phy_ddr2_odt_dis_freq = <0x64>;
+ ddr2_drv = <0x01>;
+ ddr2_odt = <0x96>;
+ phy_ddr2_ca_drv = <0x15>;
+ phy_ddr2_ck_drv = <0x12>;
+ phy_ddr2_dq_drv = <0x15>;
+ phy_ddr2_odt = <0x02>;
+ ddr3_odt_dis_freq = <0x190>;
+ phy_ddr3_odt_dis_freq = <0x190>;
+ ddr3_drv = <0x28>;
+ ddr3_odt = <0x78>;
+ phy_ddr3_ca_drv = <0x15>;
+ phy_ddr3_ck_drv = <0x12>;
+ phy_ddr3_dq_drv = <0x15>;
+ phy_ddr3_odt = <0x02>;
+ phy_lpddr2_odt_dis_freq = <0x29a>;
+ lpddr2_drv = <0x28>;
+ phy_lpddr2_ca_drv = <0x16>;
+ phy_lpddr2_ck_drv = <0x13>;
+ phy_lpddr2_dq_drv = <0x16>;
+ phy_lpddr2_odt = <0x00>;
+ lpddr3_odt_dis_freq = <0x190>;
+ phy_lpddr3_odt_dis_freq = <0x190>;
+ lpddr3_drv = <0x28>;
+ lpddr3_odt = <0xf0>;
+ phy_lpddr3_ca_drv = <0x16>;
+ phy_lpddr3_ck_drv = <0x13>;
+ phy_lpddr3_dq_drv = <0x16>;
+ phy_lpddr3_odt = <0x02>;
+ lpddr4_odt_dis_freq = <0x320>;
+ phy_lpddr4_odt_dis_freq = <0x320>;
+ lpddr4_drv = <0x3c>;
+ lpddr4_dq_odt = <0x28>;
+ lpddr4_ca_odt = <0x28>;
+ phy_lpddr4_ca_drv = <0x14>;
+ phy_lpddr4_ck_cs_drv = <0x06>;
+ phy_lpddr4_dq_drv = <0x06>;
+ phy_lpddr4_odt = <0x10>;
+ ddr4_odt_dis_freq = <0x29a>;
+ phy_ddr4_odt_dis_freq = <0x29a>;
+ ddr4_drv = <0x22>;
+ ddr4_odt = <0xf0>;
+ phy_ddr4_ca_drv = <0x16>;
+ phy_ddr4_ck_drv = <0x13>;
+ phy_ddr4_dq_drv = <0x16>;
+ phy_ddr4_odt = <0x02>;
+ ddr3a1_ddr4a9_de-skew = <0x06>;
+ ddr3a0_ddr4a10_de-skew = <0x07>;
+ ddr3a3_ddr4a6_de-skew = <0x07>;
+ ddr3a2_ddr4a4_de-skew = <0x07>;
+ ddr3a5_ddr4a8_de-skew = <0x07>;
+ ddr3a4_ddr4a5_de-skew = <0x07>;
+ ddr3a7_ddr4a11_de-skew = <0x07>;
+ ddr3a6_ddr4a7_de-skew = <0x06>;
+ ddr3a9_ddr4a0_de-skew = <0x07>;
+ ddr3a8_ddr4a13_de-skew = <0x07>;
+ ddr3a11_ddr4a3_de-skew = <0x07>;
+ ddr3a10_ddr4cs0_de-skew = <0x07>;
+ ddr3a13_ddr4a2_de-skew = <0x07>;
+ ddr3a12_ddr4ba1_de-skew = <0x07>;
+ ddr3a15_ddr4odt0_de-skew = <0x07>;
+ ddr3a14_ddr4a1_de-skew = <0x07>;
+ ddr3ba1_ddr4a15_de-skew = <0x07>;
+ ddr3ba0_ddr4bg0_de-skew = <0x07>;
+ ddr3ras_ddr4cke_de-skew = <0x07>;
+ ddr3ba2_ddr4ba0_de-skew = <0x07>;
+ ddr3we_ddr4bg1_de-skew = <0x07>;
+ ddr3cas_ddr4a12_de-skew = <0x07>;
+ ddr3ckn_ddr4ckn_de-skew = <0x07>;
+ ddr3ckp_ddr4ckp_de-skew = <0x07>;
+ ddr3cke_ddr4a16_de-skew = <0x07>;
+ ddr3odt0_ddr4a14_de-skew = <0x07>;
+ ddr3cs0_ddr4act_de-skew = <0x06>;
+ ddr3reset_ddr4reset_de-skew = <0x07>;
+ ddr3cs1_ddr4cs1_de-skew = <0x06>;
+ ddr3odt1_ddr4odt1_de-skew = <0x07>;
+ cs0_dm0_rx_de-skew = <0x07>;
+ cs0_dm0_tx_de-skew = <0x07>;
+ cs0_dq0_rx_de-skew = <0x08>;
+ cs0_dq0_tx_de-skew = <0x08>;
+ cs0_dq1_rx_de-skew = <0x09>;
+ cs0_dq1_tx_de-skew = <0x08>;
+ cs0_dq2_rx_de-skew = <0x08>;
+ cs0_dq2_tx_de-skew = <0x08>;
+ cs0_dq3_rx_de-skew = <0x08>;
+ cs0_dq3_tx_de-skew = <0x08>;
+ cs0_dq4_rx_de-skew = <0x09>;
+ cs0_dq4_tx_de-skew = <0x08>;
+ cs0_dq5_rx_de-skew = <0x09>;
+ cs0_dq5_tx_de-skew = <0x08>;
+ cs0_dq6_rx_de-skew = <0x09>;
+ cs0_dq6_tx_de-skew = <0x08>;
+ cs0_dq7_rx_de-skew = <0x08>;
+ cs0_dq7_tx_de-skew = <0x08>;
+ cs0_dqs0_rx_de-skew = <0x06>;
+ cs0_dqs0p_tx_de-skew = <0x09>;
+ cs0_dqs0n_tx_de-skew = <0x09>;
+ cs0_dm1_rx_de-skew = <0x07>;
+ cs0_dm1_tx_de-skew = <0x06>;
+ cs0_dq8_rx_de-skew = <0x08>;
+ cs0_dq8_tx_de-skew = <0x07>;
+ cs0_dq9_rx_de-skew = <0x09>;
+ cs0_dq9_tx_de-skew = <0x07>;
+ cs0_dq10_rx_de-skew = <0x08>;
+ cs0_dq10_tx_de-skew = <0x08>;
+ cs0_dq11_rx_de-skew = <0x08>;
+ cs0_dq11_tx_de-skew = <0x07>;
+ cs0_dq12_rx_de-skew = <0x08>;
+ cs0_dq12_tx_de-skew = <0x08>;
+ cs0_dq13_rx_de-skew = <0x09>;
+ cs0_dq13_tx_de-skew = <0x07>;
+ cs0_dq14_rx_de-skew = <0x09>;
+ cs0_dq14_tx_de-skew = <0x08>;
+ cs0_dq15_rx_de-skew = <0x09>;
+ cs0_dq15_tx_de-skew = <0x07>;
+ cs0_dqs1_rx_de-skew = <0x07>;
+ cs0_dqs1p_tx_de-skew = <0x09>;
+ cs0_dqs1n_tx_de-skew = <0x09>;
+ cs0_dm2_rx_de-skew = <0x07>;
+ cs0_dm2_tx_de-skew = <0x07>;
+ cs0_dq16_rx_de-skew = <0x09>;
+ cs0_dq16_tx_de-skew = <0x09>;
+ cs0_dq17_rx_de-skew = <0x07>;
+ cs0_dq17_tx_de-skew = <0x09>;
+ cs0_dq18_rx_de-skew = <0x07>;
+ cs0_dq18_tx_de-skew = <0x08>;
+ cs0_dq19_rx_de-skew = <0x07>;
+ cs0_dq19_tx_de-skew = <0x09>;
+ cs0_dq20_rx_de-skew = <0x09>;
+ cs0_dq20_tx_de-skew = <0x09>;
+ cs0_dq21_rx_de-skew = <0x09>;
+ cs0_dq21_tx_de-skew = <0x09>;
+ cs0_dq22_rx_de-skew = <0x08>;
+ cs0_dq22_tx_de-skew = <0x09>;
+ cs0_dq23_rx_de-skew = <0x08>;
+ cs0_dq23_tx_de-skew = <0x09>;
+ cs0_dqs2_rx_de-skew = <0x06>;
+ cs0_dqs2p_tx_de-skew = <0x09>;
+ cs0_dqs2n_tx_de-skew = <0x09>;
+ cs0_dm3_rx_de-skew = <0x07>;
+ cs0_dm3_tx_de-skew = <0x07>;
+ cs0_dq24_rx_de-skew = <0x08>;
+ cs0_dq24_tx_de-skew = <0x08>;
+ cs0_dq25_rx_de-skew = <0x09>;
+ cs0_dq25_tx_de-skew = <0x09>;
+ cs0_dq26_rx_de-skew = <0x09>;
+ cs0_dq26_tx_de-skew = <0x08>;
+ cs0_dq27_rx_de-skew = <0x09>;
+ cs0_dq27_tx_de-skew = <0x08>;
+ cs0_dq28_rx_de-skew = <0x09>;
+ cs0_dq28_tx_de-skew = <0x09>;
+ cs0_dq29_rx_de-skew = <0x09>;
+ cs0_dq29_tx_de-skew = <0x09>;
+ cs0_dq30_rx_de-skew = <0x08>;
+ cs0_dq30_tx_de-skew = <0x08>;
+ cs0_dq31_rx_de-skew = <0x08>;
+ cs0_dq31_tx_de-skew = <0x08>;
+ cs0_dqs3_rx_de-skew = <0x07>;
+ cs0_dqs3p_tx_de-skew = <0x09>;
+ cs0_dqs3n_tx_de-skew = <0x09>;
+ cs1_dm0_rx_de-skew = <0x07>;
+ cs1_dm0_tx_de-skew = <0x07>;
+ cs1_dq0_rx_de-skew = <0x08>;
+ cs1_dq0_tx_de-skew = <0x08>;
+ cs1_dq1_rx_de-skew = <0x09>;
+ cs1_dq1_tx_de-skew = <0x08>;
+ cs1_dq2_rx_de-skew = <0x08>;
+ cs1_dq2_tx_de-skew = <0x08>;
+ cs1_dq3_rx_de-skew = <0x08>;
+ cs1_dq3_tx_de-skew = <0x08>;
+ cs1_dq4_rx_de-skew = <0x08>;
+ cs1_dq4_tx_de-skew = <0x08>;
+ cs1_dq5_rx_de-skew = <0x09>;
+ cs1_dq5_tx_de-skew = <0x08>;
+ cs1_dq6_rx_de-skew = <0x09>;
+ cs1_dq6_tx_de-skew = <0x08>;
+ cs1_dq7_rx_de-skew = <0x08>;
+ cs1_dq7_tx_de-skew = <0x08>;
+ cs1_dqs0_rx_de-skew = <0x06>;
+ cs1_dqs0p_tx_de-skew = <0x09>;
+ cs1_dqs0n_tx_de-skew = <0x09>;
+ cs1_dm1_rx_de-skew = <0x07>;
+ cs1_dm1_tx_de-skew = <0x07>;
+ cs1_dq8_rx_de-skew = <0x08>;
+ cs1_dq8_tx_de-skew = <0x08>;
+ cs1_dq9_rx_de-skew = <0x08>;
+ cs1_dq9_tx_de-skew = <0x07>;
+ cs1_dq10_rx_de-skew = <0x07>;
+ cs1_dq10_tx_de-skew = <0x08>;
+ cs1_dq11_rx_de-skew = <0x08>;
+ cs1_dq11_tx_de-skew = <0x08>;
+ cs1_dq12_rx_de-skew = <0x08>;
+ cs1_dq12_tx_de-skew = <0x07>;
+ cs1_dq13_rx_de-skew = <0x08>;
+ cs1_dq13_tx_de-skew = <0x08>;
+ cs1_dq14_rx_de-skew = <0x08>;
+ cs1_dq14_tx_de-skew = <0x08>;
+ cs1_dq15_rx_de-skew = <0x08>;
+ cs1_dq15_tx_de-skew = <0x07>;
+ cs1_dqs1_rx_de-skew = <0x07>;
+ cs1_dqs1p_tx_de-skew = <0x09>;
+ cs1_dqs1n_tx_de-skew = <0x09>;
+ cs1_dm2_rx_de-skew = <0x07>;
+ cs1_dm2_tx_de-skew = <0x08>;
+ cs1_dq16_rx_de-skew = <0x08>;
+ cs1_dq16_tx_de-skew = <0x09>;
+ cs1_dq17_rx_de-skew = <0x08>;
+ cs1_dq17_tx_de-skew = <0x09>;
+ cs1_dq18_rx_de-skew = <0x07>;
+ cs1_dq18_tx_de-skew = <0x08>;
+ cs1_dq19_rx_de-skew = <0x08>;
+ cs1_dq19_tx_de-skew = <0x09>;
+ cs1_dq20_rx_de-skew = <0x09>;
+ cs1_dq20_tx_de-skew = <0x09>;
+ cs1_dq21_rx_de-skew = <0x09>;
+ cs1_dq21_tx_de-skew = <0x09>;
+ cs1_dq22_rx_de-skew = <0x08>;
+ cs1_dq22_tx_de-skew = <0x09>;
+ cs1_dq23_rx_de-skew = <0x08>;
+ cs1_dq23_tx_de-skew = <0x09>;
+ cs1_dqs2_rx_de-skew = <0x06>;
+ cs1_dqs2p_tx_de-skew = <0x09>;
+ cs1_dqs2n_tx_de-skew = <0x09>;
+ cs1_dm3_rx_de-skew = <0x07>;
+ cs1_dm3_tx_de-skew = <0x07>;
+ cs1_dq24_rx_de-skew = <0x08>;
+ cs1_dq24_tx_de-skew = <0x09>;
+ cs1_dq25_rx_de-skew = <0x09>;
+ cs1_dq25_tx_de-skew = <0x09>;
+ cs1_dq26_rx_de-skew = <0x09>;
+ cs1_dq26_tx_de-skew = <0x08>;
+ cs1_dq27_rx_de-skew = <0x08>;
+ cs1_dq27_tx_de-skew = <0x08>;
+ cs1_dq28_rx_de-skew = <0x09>;
+ cs1_dq28_tx_de-skew = <0x09>;
+ cs1_dq29_rx_de-skew = <0x09>;
+ cs1_dq29_tx_de-skew = <0x09>;
+ cs1_dq30_rx_de-skew = <0x09>;
+ cs1_dq30_tx_de-skew = <0x08>;
+ cs1_dq31_rx_de-skew = <0x08>;
+ cs1_dq31_tx_de-skew = <0x08>;
+ cs1_dqs3_rx_de-skew = <0x07>;
+ cs1_dqs3p_tx_de-skew = <0x09>;
+ cs1_dqs3n_tx_de-skew = <0x09>;
+ phandle = <0xae>;
+ };
+
+ aliases {
+ ethernet0 = "/ethernet@ff360000";
+ i2c0 = "/i2c@ff180000";
+ i2c1 = "/i2c@ff190000";
+ i2c2 = "/i2c@ff1a0000";
+ i2c3 = "/i2c@ff1b0000";
+ serial0 = "/serial@ff030000";
+ serial1 = "/serial@ff158000";
+ serial2 = "/serial@ff160000";
+ serial3 = "/serial@ff168000";
+ serial4 = "/serial@ff170000";
+ serial5 = "/serial@ff178000";
+ spi0 = "/spi@ff1d0000";
+ spi1 = "/spi@ff1d8000";
+ };
+
+ cpus {
+ #address-cells = <0x02>;
+ #size-cells = <0x00>;
+
+ cpu@0 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a35\0arm,armv8";
+ reg = <0x00 0x00>;
+ enable-method = "psci";
+ clocks = <0x02 0x07>;
+ #cooling-cells = <0x02>;
+ dynamic-power-coefficient = <0x5a>;
+ operating-points-v2 = <0x03>;
+ cpu-idle-states = <0x04 0x05>;
+ cpu-supply = <0x06>;
+ phandle = <0x09>;
+ };
+
+ cpu@1 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a35\0arm,armv8";
+ reg = <0x00 0x01>;
+ enable-method = "psci";
+ operating-points-v2 = <0x03>;
+ cpu-idle-states = <0x04 0x05>;
+ phandle = <0x0a>;
+ };
+
+ cpu@2 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a35\0arm,armv8";
+ reg = <0x00 0x02>;
+ enable-method = "psci";
+ operating-points-v2 = <0x03>;
+ cpu-idle-states = <0x04 0x05>;
+ phandle = <0x0b>;
+ };
+
+ cpu@3 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a35\0arm,armv8";
+ reg = <0x00 0x03>;
+ enable-method = "psci";
+ operating-points-v2 = <0x03>;
+ cpu-idle-states = <0x04 0x05>;
+ phandle = <0x0c>;
+ };
+
+ idle-states {
+ entry-method = "psci";
+
+ cpu-sleep {
+ compatible = "arm,idle-state";
+ local-timer-stop;
+ arm,psci-suspend-param = <0x10000>;
+ entry-latency-us = <0x78>;
+ exit-latency-us = <0xfa>;
+ min-residency-us = <0x384>;
+ phandle = <0x04>;
+ };
+
+ cluster-sleep {
+ compatible = "arm,idle-state";
+ local-timer-stop;
+ arm,psci-suspend-param = <0x1010000>;
+ entry-latency-us = <0x190>;
+ exit-latency-us = <0x1f4>;
+ min-residency-us = <0x7d0>;
+ phandle = <0x05>;
+ };
+ };
+ };
+
+ cpu0-opp-table {
+ compatible = "operating-points-v2";
+ opp-shared;
+ rockchip,temp-hysteresis = <0x1388>;
+ rockchip,low-temp = <0x00>;
+ rockchip,low-temp-min-volt = <0xf4240>;
+ rockchip,low-temp-adjust-volt = <0x00 0x5e8 0xc350>;
+ clocks = <0x02 0x01>;
+ rockchip,avs-scale = <0x04>;
+ rockchip,max-volt = <0x149970>;
+ rockchip,evb-irdrop = <0x61a8>;
+ nvmem-cells = <0x07 0x08>;
+ nvmem-cell-names = "cpu_leakage\0performance";
+ rockchip,bin-scaling-sel = <0x00 0x0d 0x01 0x0d>;
+ rockchip,pvtm-voltage-sel = <0x00 0xc350 0x00 0xc351 0xd2f0 0x01 0xd2f1 0xea60 0x02 0xea61 0x1869f 0x03>;
+ rockchip,pvtm-freq = <0x639c0>;
+ rockchip,pvtm-volt = <0xf4240>;
+ rockchip,pvtm-ch = <0x00 0x00>;
+ rockchip,pvtm-sample-time = <0x3e8>;
+ rockchip,pvtm-number = <0x0a>;
+ rockchip,pvtm-error = <0x3e8>;
+ rockchip,pvtm-ref-temp = <0x28>;
+ rockchip,pvtm-temp-prop = <0xffffffc8 0xffffffc8>;
+ rockchip,thermal-zone = "soc-thermal";
+ rockchip,avs = <0x01>;
+ phandle = <0x03>;
+
+ opp-1008000000 {
+ opp-hz = <0x00 0x3c14dc00>;
+ opp-microvolt = <0x11edd8 0x11edd8 0x149970>;
+ opp-microvolt-L0 = <0x11edd8 0x11edd8 0x149970>;
+ opp-microvolt-L1 = <0x112a88 0x112a88 0x149970>;
+ opp-microvolt-L2 = <0x112a88 0x112a88 0x149970>;
+ opp-microvolt-L3 = <0x100590 0x100590 0x149970>;
+ clock-latency-ns = <0x9c40>;
+ };
+
+ opp-1200000000 {
+ opp-hz = <0x00 0x47868c00>;
+ opp-microvolt = <0x13d620 0x13d620 0x149970>;
+ opp-microvolt-L0 = <0x13d620 0x13d620 0x149970>;
+ opp-microvolt-L1 = <0x137478 0x137478 0x149970>;
+ opp-microvolt-L2 = <0x1312d0 0x1312d0 0x149970>;
+ opp-microvolt-L3 = <0x124f80 0x124f80 0x149970>;
+ clock-latency-ns = <0x9c40>;
+ };
+
+ opp-1248000000 {
+ opp-hz = <0x00 0x4a62f800>;
+ opp-microvolt = <0x149970 0x149970 0x149970>;
+ opp-microvolt-L0 = <0x149970 0x149970 0x149970>;
+ opp-microvolt-L1 = <0x13d620 0x13d620 0x149970>;
+ opp-microvolt-L2 = <0x137478 0x137478 0x149970>;
+ opp-microvolt-L3 = <0x12b128 0x12b128 0x149970>;
+ clock-latency-ns = <0x9c40>;
+ };
+
+ opp-1296000000 {
+ opp-hz = <0x00 0x4d3f6400>;
+ opp-microvolt = <0x149970 0x149970 0x149970>;
+ opp-microvolt-L0 = <0x149970 0x149970 0x149970>;
+ opp-microvolt-L1 = <0x149970 0x149970 0x149970>;
+ opp-microvolt-L2 = <0x13d620 0x13d620 0x149970>;
+ opp-microvolt-L3 = <0x1312d0 0x1312d0 0x149970>;
+ clock-latency-ns = <0x9c40>;
+ };
+ };
+
+ arm-pmu {
+ compatible = "arm,cortex-a53-pmu";
+ interrupts = <0x00 0x64 0x04 0x00 0x65 0x04 0x00 0x66 0x04 0x00 0x67 0x04>;
+ interrupt-affinity = <0x09 0x0a 0x0b 0x0c>;
+ };
+
+ bus-soc {
+ compatible = "rockchip,px30-bus";
+ rockchip,busfreq-policy = "autocs";
+ phandle = <0xc6>;
+
+ soc-bus0 {
+ bus-id = <0x00>;
+ timer-us = <0x14>;
+ enable-msk = <0x40f7>;
+ status = "disabled";
+ };
+
+ soc-bus1 {
+ bus-id = <0x01>;
+ timer-us = <0xc8>;
+ enable-msk = <0x40bf>;
+ status = "disabled";
+ };
+
+ soc-bus2 {
+ bus-id = <0x02>;
+ timer-us = <0xc8>;
+ enable-msk = <0x4007>;
+ status = "disabled";
+ };
+ };
+
+ bus-apll {
+ compatible = "rockchip,px30-bus";
+ rockchip,busfreq-policy = "clkfreq";
+ clocks = <0x02 0x01>;
+ clock-names = "bus";
+ operating-points-v2 = <0x0d>;
+ status = "okay";
+ bus-supply = <0x0e>;
+ phandle = <0xc7>;
+ };
+
+ bus-apll-opp-table {
+ compatible = "operating-points-v2";
+ opp-shared;
+ phandle = <0x0d>;
+
+ opp-1512000000 {
+ opp-hz = <0x00 0x5a1f4a00>;
+ opp-microvolt = <0xf4240>;
+ };
+
+ opp-1008000000 {
+ opp-hz = <0x00 0x3c14dc00>;
+ opp-microvolt = <0xe7ef0>;
+ };
+ };
+
+ cpuinfo {
+ compatible = "rockchip,cpuinfo";
+ nvmem-cells = <0x0f>;
+ nvmem-cell-names = "id";
+ };
+
+ display-subsystem {
+ compatible = "rockchip,display-subsystem";
+ ports = <0x10>;
+ status = "okay";
+ logo-memory-region = <0x11>;
+ phandle = <0xc8>;
+
+ route {
+
+ route-lvds {
+ status = "disabled";
+ logo,uboot = "logo.bmp";
+ logo,kernel = "logo_kernel.bmp";
+ logo,mode = "center";
+ charge_logo,mode = "center";
+ connect = <0x12>;
+ phandle = <0xc9>;
+ };
+
+ route-dsi {
+ status = "okay";
+ logo,uboot = "logo.bmp";
+ logo,kernel = "logo_kernel.bmp";
+ logo,mode = "center";
+ charge_logo,mode = "center";
+ connect = <0x13>;
+ phandle = <0xca>;
+ };
+
+ route-rgb {
+ status = "disabled";
+ logo,uboot = "logo.bmp";
+ logo,kernel = "logo_kernel.bmp";
+ logo,mode = "center";
+ charge_logo,mode = "center";
+ connect = <0x14>;
+ phandle = <0xcb>;
+ };
+ };
+ };
+
+ firmware {
+
+ optee {
+ compatible = "linaro,optee-tz";
+ method = "smc";
+ };
+ };
+
+ external-gmac-clock {
+ compatible = "fixed-clock";
+ clock-frequency = <0x2faf080>;
+ clock-output-names = "gmac_clkin";
+ #clock-cells = <0x00>;
+ phandle = <0xcc>;
+ };
+
+ psci {
+ compatible = "arm,psci-1.0";
+ method = "smc";
+ };
+
+ rockchip-suspend {
+ compatible = "rockchip,pm-px30";
+ status = "okay";
+ rockchip,sleep-debug-en = <0x01>;
+ rockchip,sleep-mode-config = <0x20702>;
+ rockchip,wakeup-config = <0x85>;
+ phandle = <0xcd>;
+ };
+
+ timer {
+ compatible = "arm,armv8-timer";
+ interrupts = <0x01 0x0d 0xf04 0x01 0x0e 0xf04 0x01 0x0b 0xf04 0x01 0x0a 0xf04>;
+ };
+
+ xin24m {
+ compatible = "fixed-clock";
+ #clock-cells = <0x00>;
+ clock-frequency = <0x16e3600>;
+ clock-output-names = "xin24m";
+ phandle = <0xce>;
+ };
+
+ xin32k {
+ compatible = "fixed-clock";
+ #clock-cells = <0x00>;
+ clock-frequency = <0x8000>;
+ clock-output-names = "xin32k";
+ phandle = <0xcf>;
+ };
+
+ power-management@ff000000 {
+ compatible = "rockchip,px30-pmu\0syscon\0simple-mfd";
+ reg = <0x00 0xff000000 0x00 0x1000>;
+ phandle = <0xd0>;
+
+ power-controller {
+ compatible = "rockchip,px30-power-controller";
+ #power-domain-cells = <0x01>;
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+ phandle = <0x8a>;
+
+ pd_usb@5 {
+ reg = <0x05>;
+ clocks = <0x02 0x103 0x02 0x102 0x02 0x3c>;
+ pm_qos = <0x15 0x16>;
+ };
+
+ pd_sdcard@7 {
+ reg = <0x07>;
+ clocks = <0x02 0xf7 0x02 0x3b>;
+ pm_qos = <0x17>;
+ };
+
+ pd_gmac@9 {
+ reg = <0x09>;
+ clocks = <0x02 0xb2 0x02 0x143 0x02 0x40 0x02 0x3f>;
+ pm_qos = <0x18>;
+ };
+
+ pd_mmc_nand@10 {
+ reg = <0x0a>;
+ clocks = <0x02 0xfe 0x02 0x100 0x02 0xff 0x02 0x101 0x02 0x39 0x02 0x37 0x02 0x38 0x02 0x3a>;
+ pm_qos = <0x19 0x1a 0x1b 0x1c>;
+ };
+
+ pd_vpu@11 {
+ reg = <0x0b>;
+ clocks = <0x02 0xaf 0x02 0xf4 0x02 0x4b>;
+ pm_qos = <0x1d 0x1e>;
+ };
+
+ pd_vo@12 {
+ reg = <0x0c>;
+ clocks = <0x02 0xb7 0x02 0xb5 0x02 0xb6 0x02 0x96 0x02 0x97 0x02 0xfd 0x02 0xfb 0x02 0xfc 0x02 0x144 0x02 0x35 0x02 0x36>;
+ pm_qos = <0x1f 0x20 0x21 0x22>;
+ };
+
+ pd_vi@13 {
+ reg = <0x0d>;
+ clocks = <0x02 0xb3 0x02 0xb4 0x02 0xf9 0x02 0xfa 0x02 0x33>;
+ pm_qos = <0x23 0x24 0x25 0x26 0x27>;
+ };
+
+ pd_gpu@14 {
+ reg = <0x0e>;
+ clocks = <0x02 0x49>;
+ pm_qos = <0x28>;
+ };
+ };
+ };
+
+ syscon@ff010000 {
+ compatible = "rockchip,px30-pmugrf\0syscon\0simple-mfd";
+ reg = <0x00 0xff010000 0x00 0x1000>;
+ #address-cells = <0x01>;
+ #size-cells = <0x01>;
+ phandle = <0xab>;
+
+ io-domains {
+ compatible = "rockchip,px30-pmu-io-voltage-domain";
+ status = "okay";
+ pmuio1-supply = <0x29>;
+ pmuio2-supply = <0x29>;
+ phandle = <0xd1>;
+ };
+
+ reboot-mode {
+ compatible = "syscon-reboot-mode";
+ offset = <0x200>;
+ mode-bootloader = <0x5242c301>;
+ mode-charge = <0x5242c30b>;
+ mode-fastboot = <0x5242c309>;
+ mode-loader = <0x5242c301>;
+ mode-normal = <0x5242c300>;
+ mode-recovery = <0x5242c303>;
+ mode-ums = <0x5242c30c>;
+ };
+
+ pmu-pvtm {
+ compatible = "rockchip,px30-pmu-pvtm";
+ clocks = <0x2a 0x07>;
+ clock-names = "pmu";
+ status = "okay";
+ phandle = <0xd2>;
+ };
+ };
+
+ serial@ff030000 {
+ compatible = "rockchip,px30-uart\0snps,dw-apb-uart";
+ reg = <0x00 0xff030000 0x00 0x100>;
+ interrupts = <0x00 0x0f 0x04>;
+ clocks = <0x2a 0x06 0x2a 0x15>;
+ clock-names = "baudclk\0apb_pclk";
+ reg-shift = <0x02>;
+ reg-io-width = <0x04>;
+ dmas = <0x2b 0x00 0x2b 0x01>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x2c 0x2d 0x2e>;
+ status = "disabled";
+ phandle = <0xd3>;
+ };
+
+ i2s@ff060000 {
+ compatible = "rockchip,px30-i2s-tdm";
+ reg = <0x00 0xff060000 0x00 0x1000>;
+ interrupts = <0x00 0x0c 0x04>;
+ clocks = <0x02 0x10 0x02 0x12 0x02 0x106>;
+ clock-names = "mclk_tx\0mclk_rx\0hclk";
+ dmas = <0x2b 0x10 0x2b 0x11>;
+ dma-names = "tx\0rx";
+ resets = <0x02 0x84 0x02 0xbf>;
+ reset-names = "tx-m\0rx-m";
+ rockchip,cru = <0x02>;
+ rockchip,grf = <0x2f>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x30 0x31 0x32 0x33 0x34 0x35 0x36 0x37 0x38 0x39 0x3a 0x3b>;
+ status = "disabled";
+ phandle = <0xd4>;
+ };
+
+ i2s@ff070000 {
+ compatible = "rockchip,px30-i2s\0rockchip,rk3066-i2s";
+ reg = <0x00 0xff070000 0x00 0x1000>;
+ interrupts = <0x00 0x0d 0x04>;
+ clocks = <0x02 0x14 0x02 0x107>;
+ clock-names = "i2s_clk\0i2s_hclk";
+ dmas = <0x2b 0x12 0x2b 0x13>;
+ dma-names = "tx\0rx";
+ resets = <0x02 0x86 0x02 0x85>;
+ reset-names = "reset-m\0reset-h";
+ pinctrl-names = "default";
+ pinctrl-0 = <0x3c 0x3d 0x3e 0x3f>;
+ status = "okay";
+ #sound-dai-cells = <0x00>;
+ phandle = <0xc4>;
+ };
+
+ i2s@ff080000 {
+ compatible = "rockchip,px30-i2s\0rockchip,rk3066-i2s";
+ reg = <0x00 0xff080000 0x00 0x1000>;
+ interrupts = <0x00 0x0e 0x04>;
+ clocks = <0x02 0x16 0x02 0x108>;
+ clock-names = "i2s_clk\0i2s_hclk";
+ dmas = <0x2b 0x14 0x2b 0x15>;
+ dma-names = "tx\0rx";
+ resets = <0x02 0x88 0x02 0x87>;
+ reset-names = "reset-m\0reset-h";
+ pinctrl-names = "default";
+ pinctrl-0 = <0x40 0x41 0x42 0x43>;
+ status = "disabled";
+ phandle = <0xd5>;
+ };
+
+ pdm@ff0a0000 {
+ compatible = "rockchip,px30-pdm\0rockchip,pdm";
+ reg = <0x00 0xff0a0000 0x00 0x1000>;
+ clocks = <0x02 0x0f 0x02 0x105>;
+ clock-names = "pdm_clk\0pdm_hclk";
+ dmas = <0x2b 0x18>;
+ dma-names = "rx";
+ resets = <0x02 0x82>;
+ reset-names = "pdm-m";
+ pinctrl-names = "default";
+ pinctrl-0 = <0x44 0x45 0x46 0x47 0x48 0x49>;
+ status = "disabled";
+ phandle = <0xd6>;
+ };
+
+ crypto@ff0b0000 {
+ compatible = "rockchip,px30-crypto";
+ reg = <0x00 0xff0b0000 0x00 0x4000>;
+ interrupts = <0x00 0x52 0x04>;
+ clocks = <0x02 0xac 0x02 0xf1 0x02 0x30 0x02 0x31>;
+ clock-names = "aclk\0hclk\0sclk\0apb_pclk";
+ resets = <0x02 0x74>;
+ reset-names = "crypto-rst";
+ status = "disabled";
+ phandle = <0xd7>;
+ };
+
+ rng@ff0b0000 {
+ compatible = "rockchip,cryptov2-rng";
+ reg = <0x00 0xff0b0000 0x00 0x4000>;
+ clocks = <0x02 0x30 0x02 0x31 0x02 0xac 0x02 0xf1>;
+ clock-names = "clk_crypto\0clk_crypto_apk\0aclk_crypto\0hclk_crypto";
+ assigned-clocks = <0x02 0x30 0x02 0x31 0x02 0xac 0x02 0xf1>;
+ assigned-clock-rates = <0x8f0d180 0x8f0d180 0xbebc200 0x5f5e100>;
+ resets = <0x02 0x74>;
+ reset-names = "reset";
+ status = "okay";
+ phandle = <0xd8>;
+ };
+
+ interrupt-controller@ff131000 {
+ compatible = "arm,gic-400";
+ #interrupt-cells = <0x03>;
+ #address-cells = <0x00>;
+ interrupt-controller;
+ reg = <0x00 0xff131000 0x00 0x1000 0x00 0xff132000 0x00 0x2000 0x00 0xff134000 0x00 0x2000 0x00 0xff136000 0x00 0x2000>;
+ interrupts = <0x01 0x09 0xf04>;
+ phandle = <0x01>;
+ };
+
+ syscon@ff140000 {
+ compatible = "rockchip,px30-grf\0syscon\0simple-mfd";
+ reg = <0x00 0xff140000 0x00 0x1000>;
+ #address-cells = <0x01>;
+ #size-cells = <0x01>;
+ phandle = <0x2f>;
+
+ io-domains {
+ compatible = "rockchip,px30-io-voltage-domain";
+ status = "okay";
+ vccio1-supply = <0x4a>;
+ vccio2-supply = <0x4a>;
+ vccio3-supply = <0x4b>;
+ vccio4-supply = <0x4b>;
+ vccio5-supply = <0x4b>;
+ vccio6-supply = <0x4b>;
+ phandle = <0xd9>;
+ };
+
+ lvds {
+ compatible = "rockchip,px30-lvds";
+ phys = <0x4c>;
+ phy-names = "phy";
+ status = "disabled";
+ phandle = <0xda>;
+
+ ports {
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+
+ port@0 {
+ reg = <0x00>;
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+
+ endpoint@0 {
+ reg = <0x00>;
+ remote-endpoint = <0x12>;
+ phandle = <0xa1>;
+ };
+ };
+ };
+ };
+
+ rgb {
+ compatible = "rockchip,px30-rgb";
+ pinctrl-names = "default\0sleep";
+ pinctrl-0 = <0x4d>;
+ pinctrl-1 = <0x4e>;
+ status = "disabled";
+ phys = <0x4c>;
+ phy-names = "phy";
+ phandle = <0xdb>;
+
+ ports {
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+
+ port@0 {
+ reg = <0x00>;
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+
+ endpoint@0 {
+ reg = <0x00>;
+ remote-endpoint = <0x14>;
+ phandle = <0xa3>;
+ };
+ };
+ };
+ };
+ };
+
+ syscon@ff148000 {
+ compatible = "syscon\0simple-mfd";
+ reg = <0x00 0xff148000 0x00 0x1000>;
+ #address-cells = <0x01>;
+ #size-cells = <0x01>;
+ phandle = <0xdc>;
+
+ pvtm {
+ compatible = "rockchip,px30-pvtm";
+ clocks = <0x02 0x4a>;
+ clock-names = "core";
+ status = "okay";
+ phandle = <0xdd>;
+ };
+ };
+
+ serial@ff158000 {
+ compatible = "rockchip,px30-uart\0snps,dw-apb-uart";
+ reg = <0x00 0xff158000 0x00 0x100>;
+ interrupts = <0x00 0x10 0x04>;
+ clocks = <0x02 0x18 0x02 0x149>;
+ clock-names = "baudclk\0apb_pclk";
+ reg-shift = <0x02>;
+ reg-io-width = <0x04>;
+ dmas = <0x2b 0x02 0x2b 0x03>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x4f 0x50>;
+ status = "okay";
+ phandle = <0xde>;
+ };
+
+ serial@ff160000 {
+ compatible = "rockchip,px30-uart\0snps,dw-apb-uart";
+ reg = <0x00 0xff160000 0x00 0x100>;
+ interrupts = <0x00 0x11 0x04>;
+ clocks = <0x02 0x19 0x02 0x14a>;
+ clock-names = "baudclk\0apb_pclk";
+ reg-shift = <0x02>;
+ reg-io-width = <0x04>;
+ dmas = <0x2b 0x04 0x2b 0x05>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x51>;
+ status = "disabled";
+ phandle = <0xdf>;
+ };
+
+ serial@ff168000 {
+ compatible = "rockchip,px30-uart\0snps,dw-apb-uart";
+ reg = <0x00 0xff168000 0x00 0x100>;
+ interrupts = <0x00 0x12 0x04>;
+ clocks = <0x02 0x1a 0x02 0x14b>;
+ clock-names = "baudclk\0apb_pclk";
+ reg-shift = <0x02>;
+ reg-io-width = <0x04>;
+ dmas = <0x2b 0x06 0x2b 0x07>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x52 0x53 0x54>;
+ status = "disabled";
+ phandle = <0xe0>;
+ };
+
+ serial@ff170000 {
+ compatible = "rockchip,px30-uart\0snps,dw-apb-uart";
+ reg = <0x00 0xff170000 0x00 0x100>;
+ interrupts = <0x00 0x13 0x04>;
+ clocks = <0x02 0x1b 0x02 0x14c>;
+ clock-names = "baudclk\0apb_pclk";
+ reg-shift = <0x02>;
+ reg-io-width = <0x04>;
+ dmas = <0x2b 0x08 0x2b 0x09>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x55 0x56 0x57>;
+ status = "disabled";
+ phandle = <0xe1>;
+ };
+
+ serial@ff178000 {
+ compatible = "rockchip,px30-uart\0snps,dw-apb-uart";
+ reg = <0x00 0xff178000 0x00 0x100>;
+ interrupts = <0x00 0x14 0x04>;
+ clocks = <0x02 0x1c 0x02 0x14d>;
+ clock-names = "baudclk\0apb_pclk";
+ reg-shift = <0x02>;
+ reg-io-width = <0x04>;
+ dmas = <0x2b 0x0a 0x2b 0x0b>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x58 0x59 0x5a>;
+ status = "disabled";
+ phandle = <0xe2>;
+ };
+
+ i2c@ff180000 {
+ compatible = "rockchip,rk3399-i2c";
+ reg = <0x00 0xff180000 0x00 0x1000>;
+ clocks = <0x02 0x1d 0x02 0x14e>;
+ clock-names = "i2c\0pclk";
+ interrupts = <0x00 0x07 0x04>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x5b>;
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+ status = "okay";
+ clock-frequency = <0x61a80>;
+ i2c-scl-rising-time-ns = <0x118>;
+ i2c-scl-falling-time-ns = <0x10>;
+ phandle = <0xe3>;
+
+ pmic@20 {
+ compatible = "rockchip,rk817";
+ reg = <0x20>;
+ interrupt-parent = <0x5c>;
+ interrupts = <0x0a 0x08>;
+ pinctrl-names = "default\0pmic-sleep\0pmic-power-off\0pmic-reset";
+ pinctrl-0 = <0x5d>;
+ pinctrl-1 = <0x5e 0x5f>;
+ pinctrl-2 = <0x60 0x61>;
+ pinctrl-3 = <0x62 0x63>;
+ rockchip,system-power-controller;
+ wakeup-source;
+ #clock-cells = <0x01>;
+ clock-output-names = "rk808-clkout1\0rk808-clkout2";
+ pmic-reset-func = <0x01>;
+ vcc1-supply = <0x64>;
+ vcc2-supply = <0x64>;
+ vcc3-supply = <0x64>;
+ vcc4-supply = <0x64>;
+ vcc5-supply = <0x64>;
+ vcc6-supply = <0x64>;
+ vcc7-supply = <0x64>;
+ vcc8-supply = <0x64>;
+ vcc9-supply = <0x65>;
+ phandle = <0xe4>;
+
+ pwrkey {
+ status = "okay";
+ };
+
+ pinctrl_rk8xx {
+ gpio-controller;
+ #gpio-cells = <0x02>;
+ phandle = <0xe5>;
+
+ rk817_ts_gpio1 {
+ pins = "gpio_ts";
+ function = "pin_fun1";
+ phandle = <0xe6>;
+ };
+
+ rk817_gt_gpio2 {
+ pins = "gpio_gt";
+ function = "pin_fun1";
+ phandle = <0xe7>;
+ };
+
+ rk817_pin_ts {
+ pins = "gpio_ts";
+ function = "pin_fun0";
+ phandle = <0xe8>;
+ };
+
+ rk817_pin_gt {
+ pins = "gpio_gt";
+ function = "pin_fun0";
+ phandle = <0xe9>;
+ };
+
+ rk817_slppin_null {
+ pins = "gpio_slp";
+ function = "pin_fun0";
+ phandle = <0xea>;
+ };
+
+ rk817_slppin_slp {
+ pins = "gpio_slp";
+ function = "pin_fun1";
+ phandle = <0x5f>;
+ };
+
+ rk817_slppin_pwrdn {
+ pins = "gpio_slp";
+ function = "pin_fun2";
+ phandle = <0x61>;
+ };
+
+ rk817_slppin_rst {
+ pins = "gpio_slp";
+ function = "pin_fun3";
+ phandle = <0x63>;
+ };
+ };
+
+ regulators {
+
+ DCDC_REG1 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <0xe7ef0>;
+ regulator-max-microvolt = <0x118c30>;
+ regulator-ramp-delay = <0x1771>;
+ regulator-initial-mode = <0x02>;
+ regulator-name = "vdd_logic";
+ phandle = <0x0e>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <0xe7ef0>;
+ };
+ };
+
+ DCDC_REG2 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <0xe7ef0>;
+ regulator-max-microvolt = <0x149970>;
+ regulator-ramp-delay = <0x1771>;
+ regulator-initial-mode = <0x02>;
+ regulator-name = "vdd_arm";
+ phandle = <0x06>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <0xe7ef0>;
+ };
+ };
+
+ DCDC_REG3 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-initial-mode = <0x02>;
+ regulator-name = "vcc_ddr";
+ phandle = <0xeb>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ };
+ };
+
+ DCDC_REG4 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <0x325aa0>;
+ regulator-max-microvolt = <0x325aa0>;
+ regulator-initial-mode = <0x02>;
+ regulator-name = "vcc_3v3";
+ phandle = <0x4b>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <0x325aa0>;
+ };
+ };
+
+ LDO_REG1 {
+ regulator-min-microvolt = <0xf4240>;
+ regulator-max-microvolt = <0xf4240>;
+ regulator-name = "vcc_1v0";
+ phandle = <0xec>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <0xf4240>;
+ };
+ };
+
+ LDO_REG2 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <0x1b7740>;
+ regulator-max-microvolt = <0x1b7740>;
+ regulator-name = "vcc1v8_soc";
+ phandle = <0x88>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <0x1b7740>;
+ };
+ };
+
+ LDO_REG3 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <0xf4240>;
+ regulator-max-microvolt = <0xf4240>;
+ regulator-name = "vcc1v0_soc";
+ phandle = <0xed>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <0xf4240>;
+ };
+ };
+
+ LDO_REG4 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <0x325aa0>;
+ regulator-max-microvolt = <0x325aa0>;
+ regulator-name = "vcc3v3_pmu";
+ phandle = <0x29>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <0x325aa0>;
+ };
+ };
+
+ LDO_REG5 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <0x1b7740>;
+ regulator-max-microvolt = <0x1b7740>;
+ regulator-name = "vccio_sd";
+ phandle = <0x4a>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <0x1b7740>;
+ };
+ };
+
+ LDO_REG6 {
+ regulator-min-microvolt = <0x1b7740>;
+ regulator-max-microvolt = <0x2dc6c0>;
+ regulator-boot-on;
+ regulator-name = "vcc_sd";
+ phandle = <0x93>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <0x2dc6c0>;
+ };
+ };
+
+ LDO_REG7 {
+ regulator-min-microvolt = <0x325aa0>;
+ regulator-max-microvolt = <0x325aa0>;
+ regulator-name = "vcc_backlight";
+ regulator-always-on;
+ phandle = <0xc3>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <0x325aa0>;
+ };
+ };
+
+ LDO_REG8 {
+ regulator-min-microvolt = <0x2ab980>;
+ regulator-max-microvolt = <0x2ab980>;
+ regulator-name = "vcc_lcd";
+ phandle = <0x9e>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <0x2ab980>;
+ };
+ };
+
+ BOOST {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <0x4c4b40>;
+ regulator-max-microvolt = <0x5265c0>;
+ regulator-name = "boost";
+ phandle = <0x65>;
+ };
+
+ OTG_SWITCH {
+ regulator-boot-on;
+ regulator-name = "otg_switch";
+ phandle = <0xee>;
+ };
+ };
+
+ battery {
+ compatible = "rk817,battery";
+ ocv_table = <0xc5d 0xc94 0xcd0 0xd02 0xd34 0xd66 0xd98 0xdca 0xdfc 0xe2e 0xe56 0xe7e 0xea6 0xece 0xef6 0xf1e 0xf46 0xf6e 0xf96 0xf9b 0xfa0>;
+ design_capacity = <0xd34>;
+ design_qmax = <0xe86>;
+ bat_res = <0x64>;
+ sleep_enter_current = <0x12c>;
+ sleep_exit_current = <0x12c>;
+ sleep_filter_current = <0x64>;
+ power_off_thresd = <0xbb8>;
+ zero_algorithm_vol = <0xf0a>;
+ max_soc_offset = <0x3c>;
+ monitor_sec = <0x05>;
+ virtual_power = <0x00>;
+ sample_res = <0x0a>;
+ };
+
+ charger {
+ compatible = "rk817,charger";
+ min_input_voltage = <0x1194>;
+ max_input_current = <0x5dc>;
+ max_chrg_current = <0x7d0>;
+ max_chrg_voltage = <0x1068>;
+ chrg_term_mode = <0x00>;
+ chrg_finish_cur = <0x34>;
+ virtual_power = <0x00>;
+ sample_res = <0x0a>;
+ dc_det_gpio = <0x5c 0x0b 0x00>;
+ bat_low_gpio = <0x66 0x0d 0x00>;
+ extcon = <0x67>;
+ };
+
+ codec {
+ #sound-dai-cells = <0x00>;
+ compatible = "rockchip,rk817-codec";
+ clocks = <0x02 0x15>;
+ clock-names = "mclk";
+ pinctrl-names = "default";
+ pinctrl-0 = <0x68>;
+ hp-volume = <0x14>;
+ spk-volume = <0x03>;
+ status = "okay";
+ phandle = <0xc5>;
+ };
+ };
+ };
+
+ i2c@ff190000 {
+ compatible = "rockchip,rk3399-i2c";
+ reg = <0x00 0xff190000 0x00 0x1000>;
+ clocks = <0x02 0x1e 0x02 0x14f>;
+ clock-names = "i2c\0pclk";
+ interrupts = <0x00 0x08 0x04>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x69>;
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+ status = "okay";
+ clock-frequency = <0x61a80>;
+ phandle = <0xef>;
+ };
+
+ i2c@ff1a0000 {
+ compatible = "rockchip,rk3399-i2c";
+ reg = <0x00 0xff1a0000 0x00 0x1000>;
+ clocks = <0x02 0x1f 0x02 0x150>;
+ clock-names = "i2c\0pclk";
+ interrupts = <0x00 0x09 0x04>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x6a>;
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+ status = "disabled";
+ phandle = <0xf0>;
+ };
+
+ i2c@ff1b0000 {
+ compatible = "rockchip,rk3399-i2c";
+ reg = <0x00 0xff1b0000 0x00 0x1000>;
+ clocks = <0x02 0x20 0x02 0x151>;
+ clock-names = "i2c\0pclk";
+ interrupts = <0x00 0x0a 0x04>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x6b>;
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+ status = "disabled";
+ phandle = <0xf1>;
+ };
+
+ spi@ff1d0000 {
+ compatible = "rockchip,px30-spi\0rockchip,rk3066-spi";
+ reg = <0x00 0xff1d0000 0x00 0x1000>;
+ interrupts = <0x00 0x1a 0x04>;
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+ clocks = <0x02 0x24 0x02 0x155>;
+ clock-names = "spiclk\0apb_pclk";
+ dmas = <0x2b 0x0c 0x2b 0x0d>;
+ dma-names = "tx\0rx";
+ pinctrl-names = "default\0high_speed";
+ pinctrl-0 = <0x6c 0x6d 0x6e 0x6f>;
+ pinctrl-1 = <0x70 0x6d 0x71 0x72>;
+ status = "disabled";
+ phandle = <0xf2>;
+ };
+
+ spi@ff1d8000 {
+ compatible = "rockchip,px30-spi\0rockchip,rk3066-spi";
+ reg = <0x00 0xff1d8000 0x00 0x1000>;
+ interrupts = <0x00 0x1b 0x04>;
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+ clocks = <0x02 0x25 0x02 0x156>;
+ clock-names = "spiclk\0apb_pclk";
+ dmas = <0x2b 0x0e 0x2b 0x0f>;
+ dma-names = "tx\0rx";
+ pinctrl-names = "default\0high_speed";
+ pinctrl-0 = <0x73 0x74 0x75 0x76 0x77>;
+ pinctrl-1 = <0x78 0x74 0x75 0x79 0x7a>;
+ status = "disabled";
+ phandle = <0xf3>;
+ };
+
+ watchdog@ff1e0000 {
+ compatible = "snps,dw-wdt";
+ reg = <0x00 0xff1e0000 0x00 0x100>;
+ clocks = <0x02 0x15b>;
+ interrupts = <0x00 0x25 0x04>;
+ resets = <0x02 0xb5>;
+ reset-names = "reset";
+ status = "disabled";
+ phandle = <0xf4>;
+ };
+
+ pwm@ff200000 {
+ compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm";
+ reg = <0x00 0xff200000 0x00 0x10>;
+ #pwm-cells = <0x03>;
+ pinctrl-names = "active";
+ pinctrl-0 = <0x7b>;
+ clocks = <0x02 0x22 0x02 0x153>;
+ clock-names = "pwm\0pclk";
+ status = "okay";
+ phandle = <0xbc>;
+ };
+
+ pwm@ff200010 {
+ compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm";
+ reg = <0x00 0xff200010 0x00 0x10>;
+ #pwm-cells = <0x03>;
+ pinctrl-names = "active";
+ pinctrl-0 = <0x7c>;
+ clocks = <0x02 0x22 0x02 0x153>;
+ clock-names = "pwm\0pclk";
+ status = "okay";
+ phandle = <0xc2>;
+ };
+
+ pwm@ff200020 {
+ compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm";
+ reg = <0x00 0xff200020 0x00 0x10>;
+ #pwm-cells = <0x03>;
+ pinctrl-names = "active";
+ pinctrl-0 = <0x7d>;
+ clocks = <0x02 0x22 0x02 0x153>;
+ clock-names = "pwm\0pclk";
+ status = "disabled";
+ phandle = <0xf5>;
+ };
+
+ pwm@ff200030 {
+ compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm";
+ reg = <0x00 0xff200030 0x00 0x10>;
+ #pwm-cells = <0x03>;
+ pinctrl-names = "active";
+ pinctrl-0 = <0x7e>;
+ clocks = <0x02 0x22 0x02 0x153>;
+ clock-names = "pwm\0pclk";
+ status = "disabled";
+ phandle = <0xf6>;
+ };
+
+ pwm@ff208000 {
+ compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm";
+ reg = <0x00 0xff208000 0x00 0x10>;
+ #pwm-cells = <0x03>;
+ pinctrl-names = "active";
+ pinctrl-0 = <0x7f>;
+ clocks = <0x02 0x23 0x02 0x154>;
+ clock-names = "pwm\0pclk";
+ status = "disabled";
+ phandle = <0xf7>;
+ };
+
+ pwm@ff208010 {
+ compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm";
+ reg = <0x00 0xff208010 0x00 0x10>;
+ #pwm-cells = <0x03>;
+ pinctrl-names = "active";
+ pinctrl-0 = <0x80>;
+ clocks = <0x02 0x23 0x02 0x154>;
+ clock-names = "pwm\0pclk";
+ status = "disabled";
+ phandle = <0xf8>;
+ };
+
+ pwm@ff208020 {
+ compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm";
+ reg = <0x00 0xff208020 0x00 0x10>;
+ #pwm-cells = <0x03>;
+ pinctrl-names = "active";
+ pinctrl-0 = <0x81>;
+ clocks = <0x02 0x23 0x02 0x154>;
+ clock-names = "pwm\0pclk";
+ status = "disabled";
+ phandle = <0xf9>;
+ };
+
+ pwm@ff208030 {
+ compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm";
+ reg = <0x00 0xff208030 0x00 0x10>;
+ #pwm-cells = <0x03>;
+ pinctrl-names = "active";
+ pinctrl-0 = <0x82>;
+ clocks = <0x02 0x23 0x02 0x154>;
+ clock-names = "pwm\0pclk";
+ status = "disabled";
+ phandle = <0xfa>;
+ };
+
+ rktimer@ff210000 {
+ compatible = "rockchip,rk3288-timer";
+ reg = <0x00 0xff210000 0x00 0x1000>;
+ interrupts = <0x00 0x1e 0x04>;
+ clocks = <0x02 0x159 0x02 0x26>;
+ clock-names = "pclk\0timer";
+ phandle = <0xfb>;
+ };
+
+ amba {
+ compatible = "simple-bus";
+ #address-cells = <0x02>;
+ #size-cells = <0x02>;
+ ranges;
+
+ dmac@ff240000 {
+ compatible = "arm,pl330\0arm,primecell";
+ reg = <0x00 0xff240000 0x00 0x4000>;
+ interrupts = <0x00 0x01 0x04 0x00 0x02 0x04>;
+ clocks = <0x02 0xbb>;
+ clock-names = "apb_pclk";
+ #dma-cells = <0x01>;
+ peripherals-req-type-burst;
+ phandle = <0x2b>;
+ };
+ };
+
+ thermal-zones {
+ phandle = <0xfc>;
+
+ soc-thermal {
+ polling-delay-passive = <0x14>;
+ polling-delay = <0x3e8>;
+ sustainable-power = <0x2ee>;
+ thermal-sensors = <0x83 0x00>;
+ phandle = <0xfd>;
+
+ trips {
+
+ trip-point-0 {
+ temperature = <0x11170>;
+ hysteresis = <0x7d0>;
+ type = "passive";
+ phandle = <0xfe>;
+ };
+
+ trip-point-1 {
+ temperature = <0x14c08>;
+ hysteresis = <0x7d0>;
+ type = "passive";
+ phandle = <0x84>;
+ };
+
+ soc-crit {
+ temperature = <0x1c138>;
+ hysteresis = <0x7d0>;
+ type = "critical";
+ phandle = <0xff>;
+ };
+ };
+
+ cooling-maps {
+
+ map0 {
+ trip = <0x84>;
+ cooling-device = <0x09 0xffffffff 0xffffffff>;
+ contribution = <0x1000>;
+ };
+
+ map1 {
+ trip = <0x84>;
+ cooling-device = <0x85 0xffffffff 0xffffffff>;
+ contribution = <0x1000>;
+ };
+ };
+ };
+
+ gpu-thermal {
+ polling-delay-passive = <0x64>;
+ polling-delay = <0x3e8>;
+ thermal-sensors = <0x83 0x01>;
+ phandle = <0x100>;
+ };
+ };
+
+ tsadc@ff280000 {
+ compatible = "rockchip,px30-tsadc";
+ reg = <0x00 0xff280000 0x00 0x100>;
+ interrupts = <0x00 0x24 0x04>;
+ rockchip,grf = <0x2f>;
+ clocks = <0x02 0x2c 0x02 0x158>;
+ clock-names = "tsadc\0apb_pclk";
+ assigned-clocks = <0x02 0x2c>;
+ assigned-clock-rates = <0xc350>;
+ resets = <0x02 0xa8>;
+ reset-names = "tsadc-apb";
+ #thermal-sensor-cells = <0x01>;
+ rockchip,hw-tshut-temp = <0x1d4c0>;
+ status = "okay";
+ pinctrl-names = "gpio\0otpout";
+ pinctrl-0 = <0x86>;
+ pinctrl-1 = <0x87>;
+ phandle = <0x83>;
+ };
+
+ saradc@ff288000 {
+ compatible = "rockchip,px30-saradc\0rockchip,rk3399-saradc";
+ reg = <0x00 0xff288000 0x00 0x100>;
+ interrupts = <0x00 0x54 0x04>;
+ #io-channel-cells = <0x01>;
+ clocks = <0x02 0x2d 0x02 0x157>;
+ clock-names = "saradc\0apb_pclk";
+ resets = <0x02 0xa5>;
+ reset-names = "saradc-apb";
+ status = "okay";
+ vref-supply = <0x88>;
+ phandle = <0xbe>;
+ };
+
+ otp@ff290000 {
+ compatible = "rockchip,px30-otp";
+ reg = <0x00 0xff290000 0x00 0x4000>;
+ #address-cells = <0x01>;
+ #size-cells = <0x01>;
+ clocks = <0x02 0x2f 0x02 0x15a 0x02 0x161>;
+ clock-names = "clk_otp\0pclk_otp\0pclk_otp_phy";
+ resets = <0x02 0xb4>;
+ reset-names = "otp_phy";
+ phandle = <0x101>;
+
+ id@7 {
+ reg = <0x07 0x10>;
+ phandle = <0x0f>;
+ };
+
+ cpu-leakage@17 {
+ reg = <0x17 0x01>;
+ phandle = <0x07>;
+ };
+
+ performance@1e {
+ reg = <0x1e 0x01>;
+ bits = <0x04 0x03>;
+ phandle = <0x08>;
+ };
+ };
+
+ clock-controller@ff2b0000 {
+ compatible = "rockchip,px30-cru";
+ reg = <0x00 0xff2b0000 0x00 0x1000>;
+ rockchip,grf = <0x2f>;
+ rockchip,boost = <0x89>;
+ #clock-cells = <0x01>;
+ #reset-cells = <0x01>;
+ assigned-clocks = <0x02 0x04>;
+ assigned-clock-rates = <0x3dfd2400>;
+ phandle = <0x02>;
+ };
+
+ cpu-boost@ff2b8000 {
+ compatible = "syscon";
+ reg = <0x00 0xff2b8000 0x00 0x1000>;
+ rockchip,boost-low-con0 = <0x1032>;
+ rockchip,boost-low-con1 = <0x1441>;
+ rockchip,boost-high-con0 = <0x1036>;
+ rockchip,boost-high-con1 = <0x1441>;
+ rockchip,boost-backup-pll = <0x01>;
+ rockchip,boost-backup-pll-usage = <0x00>;
+ rockchip,boost-switch-threshold = <0x249f00>;
+ rockchip,boost-statis-threshold = <0x100>;
+ rockchip,boost-statis-enable = <0x00>;
+ rockchip,boost-enable = <0x00>;
+ phandle = <0x89>;
+ };
+
+ pmu-clock-controller@ff2bc000 {
+ compatible = "rockchip,px30-pmucru";
+ reg = <0x00 0xff2bc000 0x00 0x1000>;
+ rockchip,grf = <0x2f>;
+ #clock-cells = <0x01>;
+ #reset-cells = <0x01>;
+ assigned-clocks = <0x2a 0x01 0x2a 0x08 0x2a 0x05 0x02 0x07 0x02 0xab 0x02 0xb0 0x02 0xf0 0x02 0xf5 0x02 0x140 0x02 0x49>;
+ assigned-clock-rates = <0x47868c00 0x5f5e100 0x18cba80 0x23c34600 0xbebc200 0xbebc200 0x8f0d180 0x8f0d180 0x5f5e100 0xbebc200>;
+ phandle = <0x2a>;
+ };
+
+ syscon@ff2c0000 {
+ compatible = "rockchip,px30-usb2phy-grf\0syscon\0simple-mfd";
+ reg = <0x00 0xff2c0000 0x00 0x10000>;
+ #address-cells = <0x01>;
+ #size-cells = <0x01>;
+ phandle = <0x102>;
+
+ usb2-phy@100 {
+ compatible = "rockchip,px30-usb2phy\0rockchip,rk3328-usb2phy";
+ reg = <0x100 0x10>;
+ clocks = <0x2a 0x0a>;
+ clock-names = "phyclk";
+ #clock-cells = <0x00>;
+ assigned-clocks = <0x02 0x0e 0x02 0x55>;
+ assigned-clock-parents = <0x67 0x02 0x0e>;
+ clock-output-names = "usb480m_phy";
+ status = "okay";
+ phandle = <0x67>;
+
+ host-port {
+ #phy-cells = <0x00>;
+ interrupts = <0x00 0x44 0x04>;
+ interrupt-names = "linestate";
+ status = "okay";
+ phandle = <0x8c>;
+ };
+
+ otg-port {
+ #phy-cells = <0x00>;
+ interrupts = <0x00 0x42 0x04 0x00 0x41 0x04 0x00 0x40 0x04>;
+ interrupt-names = "otg-bvalid\0otg-id\0linestate";
+ status = "disabled";
+ phandle = <0x8b>;
+ };
+ };
+ };
+
+ video-phy@ff2e0000 {
+ compatible = "rockchip,px30-video-phy";
+ reg = <0x00 0xff2e0000 0x00 0x10000 0x00 0xff450000 0x00 0x10000>;
+ clocks = <0x2a 0x0b 0x02 0x145 0x02 0x144>;
+ clock-names = "ref\0pclk_phy\0pclk_host";
+ #clock-cells = <0x00>;
+ resets = <0x02 0x3e>;
+ reset-names = "rst";
+ power-domains = <0x8a 0x0c>;
+ #phy-cells = <0x00>;
+ status = "okay";
+ phandle = <0x4c>;
+ };
+
+ mipi-dphy-rx0@ff2f0000 {
+ compatible = "rockchip,rk3326-mipi-dphy";
+ reg = <0x00 0xff2f0000 0x00 0x4000>;
+ clocks = <0x02 0x146>;
+ clock-names = "dphy-ref";
+ power-domains = <0x8a 0x0d>;
+ rockchip,grf = <0x2f>;
+ status = "okay";
+ phandle = <0x103>;
+ };
+
+ usb@ff300000 {
+ compatible = "rockchip,px30-usb\0rockchip,rk3066-usb\0snps,dwc2";
+ reg = <0x00 0xff300000 0x00 0x40000>;
+ interrupts = <0x00 0x3e 0x04>;
+ clocks = <0x02 0x102>;
+ clock-names = "otg";
+ power-domains = <0x8a 0x05>;
+ dr_mode = "otg";
+ g-np-tx-fifo-size = <0x10>;
+ g-rx-fifo-size = <0x118>;
+ g-tx-fifo-size = <0x100 0x80 0x80 0x40 0x20 0x10>;
+ g-use-dma;
+ phys = <0x8b>;
+ phy-names = "usb2-phy";
+ status = "okay";
+ phandle = <0x104>;
+ };
+
+ usb@ff340000 {
+ compatible = "generic-ehci";
+ reg = <0x00 0xff340000 0x00 0x10000>;
+ interrupts = <0x00 0x3c 0x04>;
+ clocks = <0x02 0x103 0x67>;
+ clock-names = "usbhost\0utmi";
+ power-domains = <0x8a 0x05>;
+ phys = <0x8c>;
+ phy-names = "usb";
+ status = "disabled";
+ phandle = <0x105>;
+ };
+
+ usb@ff350000 {
+ compatible = "generic-ohci";
+ reg = <0x00 0xff350000 0x00 0x10000>;
+ interrupts = <0x00 0x3d 0x04>;
+ clocks = <0x02 0x103 0x67>;
+ clock-names = "usbhost\0utmi";
+ power-domains = <0x8a 0x05>;
+ phys = <0x8c>;
+ phy-names = "usb";
+ status = "disabled";
+ phandle = <0x106>;
+ };
+
+ ethernet@ff360000 {
+ compatible = "rockchip,px30-gmac";
+ reg = <0x00 0xff360000 0x00 0x10000>;
+ rockchip,grf = <0x2f>;
+ interrupts = <0x00 0x2b 0x04>;
+ interrupt-names = "macirq";
+ clocks = <0x02 0x3e 0x02 0x3f 0x02 0x3f 0x02 0x40 0x02 0x41 0x02 0xb2 0x02 0x143 0x02 0x4c>;
+ clock-names = "stmmaceth\0mac_clk_rx\0mac_clk_tx\0clk_mac_ref\0clk_mac_refout\0aclk_mac\0pclk_mac\0clk_mac_speed";
+ phy-mode = "rmii";
+ pinctrl-names = "default";
+ pinctrl-0 = <0x8d 0x8e>;
+ resets = <0x02 0x5e>;
+ reset-names = "stmmaceth";
+ power-domains = <0x8a 0x09>;
+ status = "disabled";
+ phandle = <0x107>;
+ };
+
+ dwmmc@ff370000 {
+ compatible = "rockchip,px30-dw-mshc\0rockchip,rk3288-dw-mshc";
+ reg = <0x00 0xff370000 0x00 0x4000>;
+ max-frequency = <0x8f0d180>;
+ clocks = <0x02 0xf7 0x02 0x3b 0x02 0x43 0x02 0x44>;
+ clock-names = "biu\0ciu\0ciu-drv\0ciu-sample";
+ assigned-clocks = <0x02 0x3b>;
+ assigned-clock-parents = <0x02 0x57>;
+ power-domains = <0x8a 0x07>;
+ fifo-depth = <0x100>;
+ interrupts = <0x00 0x36 0x04>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x8f 0x90 0x91 0x92>;
+ status = "okay";
+ bus-width = <0x04>;
+ cap-mmc-highspeed;
+ cap-sd-highspeed;
+ supports-sd;
+ card-detect-delay = <0x320>;
+ ignore-pm-notify;
+ cd-gpios = <0x5c 0x03 0x01>;
+ sd-uhs-sdr12;
+ sd-uhs-sdr25;
+ sd-uhs-sdr50;
+ sd-uhs-sdr104;
+ vqmmc-supply = <0x4a>;
+ vmmc-supply = <0x93>;
+ phandle = <0x108>;
+ };
+
+ dwmmc@ff380000 {
+ compatible = "rockchip,px30-dw-mshc\0rockchip,rk3288-dw-mshc";
+ reg = <0x00 0xff380000 0x00 0x4000>;
+ max-frequency = <0x8f0d180>;
+ clocks = <0x02 0xff 0x02 0x38 0x02 0x45 0x02 0x46>;
+ clock-names = "biu\0ciu\0ciu-drv\0ciu-sample";
+ assigned-clocks = <0x02 0x38>;
+ assigned-clock-parents = <0x02 0x51>;
+ power-domains = <0x8a 0x0a>;
+ fifo-depth = <0x100>;
+ interrupts = <0x00 0x37 0x04>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x94 0x95 0x96>;
+ status = "okay";
+ bus-width = <0x04>;
+ cap-mmc-highspeed;
+ cap-sd-highspeed;
+ supports-sd;
+ card-detect-delay = <0x320>;
+ ignore-pm-notify;
+ cd-gpios = <0x97 0x0e 0x01>;
+ sd-uhs-sdr12;
+ sd-uhs-sdr25;
+ sd-uhs-sdr50;
+ sd-uhs-sdr104;
+ vqmmc-supply = <0x4a>;
+ vmmc-supply = <0x93>;
+ phandle = <0x109>;
+ };
+
+ dwmmc@ff390000 {
+ compatible = "rockchip,px30-dw-mshc\0rockchip,rk3288-dw-mshc";
+ reg = <0x00 0xff390000 0x00 0x4000>;
+ max-frequency = <0x8f0d180>;
+ clocks = <0x02 0x100 0x02 0x39 0x02 0x47 0x02 0x48>;
+ clock-names = "biu\0ciu\0ciu-drv\0ciu-sample";
+ assigned-clocks = <0x02 0x39>;
+ assigned-clock-parents = <0x02 0x53>;
+ power-domains = <0x8a 0x0a>;
+ fifo-depth = <0x100>;
+ interrupts = <0x00 0x35 0x04>;
+ status = "disabled";
+ phandle = <0x10a>;
+ };
+
+ nandc@ff3b0000 {
+ compatible = "rockchip,rk-nandc";
+ reg = <0x00 0xff3b0000 0x00 0x4000>;
+ interrupts = <0x00 0x39 0x04>;
+ nandc_id = <0x00>;
+ clocks = <0x02 0x37 0x02 0xfe>;
+ clock-names = "clk_nandc\0hclk_nandc";
+ assigned-clocks = <0x02 0x37>;
+ assigned-clock-parents = <0x02 0x4f>;
+ power-domains = <0x8a 0x0a>;
+ status = "disabled";
+ phandle = <0x10b>;
+ };
+
+ sfc@ff3a0000 {
+ compatible = "rockchip,sfc";
+ reg = <0x00 0xff3a0000 0x00 0x4000>;
+ interrupts = <0x00 0x38 0x04>;
+ clocks = <0x02 0x3a 0x02 0x101>;
+ clock-names = "clk_sfc\0hclk_sfc";
+ assigned-clocks = <0x02 0x3a>;
+ assigned-clock-rates = <0x989680>;
+ status = "disabled";
+ phandle = <0x10c>;
+ };
+
+ gpu@ff400000 {
+ compatible = "arm,malit602\0arm,malit60x\0arm,malit6xx\0arm,mali-midgard";
+ reg = <0x00 0xff400000 0x00 0x4000>;
+ interrupts = <0x00 0x2d 0x04 0x00 0x2e 0x04 0x00 0x2f 0x04>;
+ interrupt-names = "GPU\0MMU\0JOB";
+ clocks = <0x02 0x49>;
+ clock-names = "clk_mali";
+ power-domains = <0x8a 0x0e>;
+ #cooling-cells = <0x02>;
+ operating-points-v2 = <0x98>;
+ status = "okay";
+ mali-supply = <0x0e>;
+ phandle = <0x85>;
+
+ power_model {
+ compatible = "arm,mali-simple-power-model";
+ static-coefficient = <0x64578>;
+ dynamic-coefficient = <0x2dd>;
+ ts = <0x7d00 0x125c 0xffffffb0 0x02>;
+ thermal-zone = "gpu-thermal";
+ };
+ };
+
+ gpu-opp-table {
+ compatible = "operating-points-v2";
+ rockchip,thermal-zone = "soc-thermal";
+ rockchip,temp-hysteresis = <0x1388>;
+ rockchip,low-temp = <0x00>;
+ rockchip,low-temp-min-volt = <0xf4240>;
+ rockchip,low-temp-adjust-volt = <0x00 0x1e0 0xc350>;
+ rockchip,max-volt = <0x11edd8>;
+ rockchip,evb-irdrop = <0x61a8>;
+ rockchip,pvtm-voltage-sel = <0x00 0xc350 0x00 0xc351 0xd2f0 0x01 0xd2f1 0xea60 0x02 0xea61 0x1869f 0x03>;
+ rockchip,pvtm-ch = <0x00 0x00>;
+ phandle = <0x98>;
+
+ opp-400000000 {
+ opp-hz = <0x00 0x17d78400>;
+ opp-microvolt = <0x100590>;
+ opp-microvolt-L0 = <0x100590>;
+ opp-microvolt-L1 = <0xfa3e8>;
+ opp-microvolt-L2 = <0xee098>;
+ opp-microvolt-L3 = <0xe7ef0>;
+ };
+
+ opp-480000000 {
+ opp-hz = <0x00 0x1c9c3800>;
+ opp-microvolt = <0x112a88>;
+ opp-microvolt-L0 = <0x112a88>;
+ opp-microvolt-L1 = <0x10c8e0>;
+ opp-microvolt-L2 = <0x100590>;
+ opp-microvolt-L3 = <0xf4240>;
+ };
+
+ opp-520000000 {
+ opp-hz = <0x00 0x1efe9200>;
+ opp-microvolt = <0x118c30>;
+ opp-microvolt-L0 = <0x118c30>;
+ opp-microvolt-L1 = <0x118c30>;
+ opp-microvolt-L2 = <0x10c8e0>;
+ opp-microvolt-L3 = <0x100590>;
+ };
+ };
+
+ hevc_service@ff440000 {
+ compatible = "rockchip,hevc_sub";
+ iommu_enabled = <0x01>;
+ reg = <0x00 0xff440000 0x00 0x400>;
+ interrupts = <0x00 0x31 0x04>;
+ interrupt-names = "irq_dec";
+ dev_mode = <0x01>;
+ iommus = <0x99>;
+ allocator = <0x01>;
+ phandle = <0x9c>;
+ };
+
+ vpu_service@ff442000 {
+ compatible = "rockchip,vpu_sub";
+ iommu_enabled = <0x01>;
+ reg = <0x00 0xff442000 0x00 0x800>;
+ interrupts = <0x00 0x50 0x04 0x00 0x4f 0x04>;
+ interrupt-names = "irq_enc\0irq_dec";
+ dev_mode = <0x00>;
+ iommus = <0x9a>;
+ allocator = <0x01>;
+ phandle = <0x9b>;
+ };
+
+ vpu_combo {
+ compatible = "rockchip,vpu_combo";
+ subcnt = <0x02>;
+ rockchip,grf = <0x2f>;
+ rockchip,sub = <0x9b 0x9c>;
+ clocks = <0x02 0xaf 0x02 0xf4 0x02 0x4b>;
+ clock-names = "aclk_vcodec\0hclk_vcodec\0clk_core";
+ resets = <0x02 0x24 0x02 0x26 0x02 0x25 0x02 0x27 0x02 0x3f>;
+ reset-names = "video_a\0video_h\0niu_a\0niu_h\0video_core";
+ power-domains = <0x8a 0x0b>;
+ mode_bit = <0x0f>;
+ mode_ctrl = <0x410>;
+ status = "okay";
+ phandle = <0x10d>;
+ };
+
+ iommu@ff440440 {
+ compatible = "rockchip,iommu";
+ reg = <0x00 0xff440440 0x00 0x40 0x00 0xff440480 0x00 0x40>;
+ interrupts = <0x00 0x32 0x04>;
+ interrupt-names = "hevc_mmu";
+ clocks = <0x02 0xaf 0x02 0xf4>;
+ clock-names = "aclk\0hclk";
+ power-domains = <0x8a 0x0b>;
+ #iommu-cells = <0x00>;
+ phandle = <0x99>;
+ };
+
+ iommu@ff442800 {
+ compatible = "rockchip,iommu";
+ reg = <0x00 0xff442800 0x00 0x100>;
+ interrupts = <0x00 0x51 0x04>;
+ interrupt-names = "vpu_mmu";
+ clocks = <0x02 0xaf 0x02 0xf4>;
+ clock-names = "aclk\0hclk";
+ power-domains = <0x8a 0x0b>;
+ #iommu-cells = <0x00>;
+ phandle = <0x9a>;
+ };
+
+ dsi@ff450000 {
+ compatible = "rockchip,px30-mipi-dsi";
+ reg = <0x00 0xff450000 0x00 0x10000>;
+ interrupts = <0x00 0x4b 0x04>;
+ clocks = <0x02 0x144 0x4c>;
+ clock-names = "pclk\0hs_clk";
+ resets = <0x02 0x3d>;
+ reset-names = "apb";
+ phys = <0x4c>;
+ phy-names = "mipi_dphy";
+ power-domains = <0x8a 0x0c>;
+ rockchip,grf = <0x2f>;
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+ status = "okay";
+ phandle = <0x10e>;
+
+ ports {
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+
+ port@0 {
+ reg = <0x00>;
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+
+ endpoint@0 {
+ reg = <0x00>;
+ remote-endpoint = <0x13>;
+ status = "okay";
+ phandle = <0xa2>;
+ };
+ };
+ };
+
+ panel@0 {
+ compatible = "elida,kd35t133\0simple-panel-dsi";
+ reg = <0x00>;
+ backlight = <0x9d>;
+ power-supply = <0x9e>;
+ reset-gpios = <0x97 0x10 0x01>;
+ prepare-delay-ms = <0x14>;
+ reset-delay-ms = <0x96>;
+ init-delay-ms = <0x14>;
+ enable-delay-ms = <0x78>;
+ disable-delay-ms = <0x32>;
+ unprepare-delay-ms = <0x14>;
+ width-mm = <0x34>;
+ height-mm = <0x46>;
+ dsi,flags = <0xa03>;
+ dsi,format = <0x00>;
+ dsi,lanes = <0x04>;
+ panel-init-sequence = [15 00 02 ee 01 15 00 02 ea 07 15 00 02 eb 12 15 00 02 0a 8b 15 00 02 17 35 15 00 02 1d 33 15 00 02 21 01 15 00 02 28 1c 15 00 02 29 27 15 00 02 2a 63 15 00 02 2b b5 15 00 02 2c 00 15 00 02 2d 33 15 00 02 2f f3 15 00 02 ee 02 15 00 02 39 78 15 00 02 39 78 15 00 02 00 00 15 00 02 01 18 15 00 02 02 15 15 00 02 03 10 15 00 02 04 18 15 00 02 05 3f 15 00 02 06 11 15 00 02 07 11 15 00 02 08 11 15 00 02 09 0f 15 00 02 0a 10 15 00 02 0b 54 15 00 02 0c 14 15 00 02 0d 17 15 00 02 0e 35 15 00 02 0f 37 15 00 02 10 3f 15 00 02 20 00 15 00 02 21 18 15 00 02 22 15 15 00 02 23 10 15 00 02 24 12 15 00 02 25 37 15 00 02 26 0b 15 00 02 27 0d 15 00 02 28 0d 15 00 02 29 0b 15 00 02 2a 10 15 00 02 2b 54 15 00 02 2c 14 15 00 02 2d 17 15 00 02 2e 35 15 00 02 2f 37 15 00 02 30 3f 15 00 02 ee 04 15 00 02 00 04 15 00 02 01 01 15 00 02 02 80 15 00 02 03 04 15 00 02 04 00 15 00 02 06 16 15 00 02 07 03 15 00 02 08 13 15 00 02 09 0a 15 00 02 0a 0f 15 00 02 0b 10 15 00 02 22 80 15 00 02 24 08 15 00 02 2a 00 15 00 02 ee 05 15 00 02 00 04 15 00 02 01 08 15 00 02 02 55 15 00 02 03 05 15 00 02 04 00 15 00 02 05 04 15 00 02 06 00 15 00 02 07 13 15 00 02 08 1e 15 00 02 09 66 15 00 02 0d 22 15 00 02 10 08 15 00 02 11 0c 15 00 02 12 55 15 00 02 13 05 15 00 02 19 14 15 00 02 1a 76 15 00 02 23 00 15 00 02 43 13 15 00 02 40 44 15 00 02 41 00 15 00 02 30 01 15 00 02 31 01 15 00 02 32 00 15 00 02 33 14 15 00 02 34 14 15 00 02 35 b4 15 00 02 36 01 15 00 02 37 01 15 00 02 38 00 15 00 02 39 14 15 00 02 3a 14 15 00 02 44 01 15 00 02 45 81 15 00 02 46 05 15 00 02 ee 06 15 00 02 00 23 15 00 02 01 01 15 00 02 02 04 15 00 02 06 cd 15 00 02 08 67 15 00 02 09 45 15 00 02 0a 23 15 00 02 0b 01 15 00 02 ee 07 15 00 02 00 3c 15 00 02 01 20 15 00 02 02 20 15 00 02 03 21 15 00 02 04 21 15 00 02 05 3c 15 00 02 06 3c 15 00 02 07 04 15 00 02 08 04 15 00 02 09 0c 15 00 02 0a 0c 15 00 02 0b 01 15 00 02 0c 15 15 00 02 0d 15 15 00 02 0e 17 15 00 02 0f 17 15 00 02 10 11 15 00 02 11 11 15 00 02 12 13 15 00 02 13 13 15 00 02 14 0d 15 00 02 15 0d 15 00 02 20 3c 15 00 02 21 20 15 00 02 22 20 15 00 02 23 21 15 00 02 24 21 15 00 02 25 3c 15 00 02 26 3c 15 00 02 27 04 15 00 02 28 04 15 00 02 29 0c 15 00 02 2a 0c 15 00 02 2b 00 15 00 02 2c 14 15 00 02 2d 14 15 00 02 2e 16 15 00 02 2f 16 15 00 02 30 10 15 00 02 31 10 15 00 02 32 12 15 00 02 33 12 15 00 02 34 0d 15 00 02 35 0d 15 00 02 ee 08 15 00 02 10 00 15 00 02 12 da 15 00 02 14 10 15 00 02 22 69 15 00 02 ee 0f 15 00 02 00 01 15 00 02 01 10 15 00 02 ee 00 15 00 02 ea 00 15 00 02 eb 00 05 c8 01 11 05 14 01 29];
+ panel-exit-sequence = <0x5140128 0x50a0110>;
+
+ display-timings {
+ native-mode = <0x9f>;
+
+ 60Hz {
+ clock-frequency = <0x3938700>;
+ hactive = <0x400>;
+ vactive = <0x300>;
+ hfront-porch = <0x50>;
+ hsync-len = <0x3c>;
+ hback-porch = <0x3c>;
+ vfront-porch = <0x10>;
+ vsync-len = <0x08>;
+ vback-porch = <0x08>;
+ hsync-active = <0x00>;
+ vsync-active = <0x00>;
+ de-active = <0x00>;
+ pixelclk-active = <0x00>;
+ phandle = <0x9f>;
+ };
+ };
+ };
+ };
+
+ vop@ff460000 {
+ compatible = "rockchip,px30-vop-big";
+ reg = <0x00 0xff460000 0x00 0x1fc 0x00 0xff460a00 0x00 0x400>;
+ rockchip,grf = <0x2f>;
+ reg-names = "regs\0gamma_lut";
+ interrupts = <0x00 0x4d 0x04>;
+ clocks = <0x02 0xb5 0x02 0x96 0x02 0xfb>;
+ clock-names = "aclk_vop\0dclk_vop\0hclk_vop";
+ power-domains = <0x8a 0x0c>;
+ iommus = <0xa0>;
+ status = "okay";
+ phandle = <0x10f>;
+
+ port {
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+ phandle = <0x10>;
+
+ endpoint@0 {
+ reg = <0x00>;
+ remote-endpoint = <0xa1>;
+ phandle = <0x12>;
+ };
+
+ endpoint@1 {
+ reg = <0x01>;
+ remote-endpoint = <0xa2>;
+ phandle = <0x13>;
+ };
+
+ endpoint@2 {
+ reg = <0x02>;
+ remote-endpoint = <0xa3>;
+ phandle = <0x14>;
+ };
+ };
+ };
+
+ iommu@ff460f00 {
+ compatible = "rockchip,iommu";
+ reg = <0x00 0xff460f00 0x00 0x100>;
+ interrupts = <0x00 0x4d 0x04>;
+ interrupt-names = "vopb_mmu";
+ clocks = <0x02 0xb5 0x02 0xfb>;
+ clock-names = "aclk\0hclk";
+ power-domains = <0x8a 0x0c>;
+ #iommu-cells = <0x00>;
+ status = "okay";
+ phandle = <0xa0>;
+ };
+
+ rk_rga@ff480000 {
+ compatible = "rockchip,rga2";
+ reg = <0x00 0xff480000 0x00 0x1000>;
+ interrupts = <0x00 0x4c 0x04>;
+ clocks = <0x02 0xb7 0x02 0xfd 0x02 0x35>;
+ clock-names = "aclk_rga\0hclk_rga\0clk_rga";
+ power-domains = <0x8a 0x0c>;
+ dma-coherent;
+ status = "okay";
+ phandle = <0x110>;
+ };
+
+ cif@ff490000 {
+ compatible = "rockchip,cif";
+ reg = <0x00 0xff490000 0x00 0x200>;
+ interrupts = <0x00 0x45 0x04>;
+ clocks = <0x02 0xb3 0x02 0xf9 0x02 0x160 0x02 0x34>;
+ clock-names = "aclk_cif0\0hclk_cif0\0pclk_cif\0cif0_out";
+ resets = <0x02 0x2c 0x02 0x2d 0x02 0x2e>;
+ reset-names = "rst_cif_a\0rst_cif_h\0rst_cif_pclkin";
+ power-domains = <0x8a 0x0d>;
+ pinctrl-names = "cif_pin_all";
+ pinctrl-0 = <0xa4>;
+ iommus = <0xa5>;
+ status = "disabled";
+ phandle = <0x111>;
+ };
+
+ cif-new@ff490000 {
+ compatible = "rockchip,px30-cif";
+ reg = <0x00 0xff490000 0x00 0x200>;
+ interrupts = <0x00 0x45 0x04>;
+ clocks = <0x02 0xb3 0x02 0xf9 0x02 0x160 0x02 0x34>;
+ clock-names = "aclk_cif\0hclk_cif\0pclk_cif\0cif_out";
+ resets = <0x02 0x2c 0x02 0x2d 0x02 0x2e>;
+ reset-names = "rst_cif_a\0rst_cif_h\0rst_cif_pclkin";
+ power-domains = <0x8a 0x0d>;
+ iommus = <0xa5>;
+ status = "disabled";
+ phandle = <0x112>;
+ };
+
+ iommu@ff490800 {
+ compatible = "rockchip,iommu";
+ reg = <0x00 0xff490800 0x00 0x100>;
+ interrupts = <0x00 0x45 0x04>;
+ interrupt-names = "vip_mmu";
+ clocks = <0x02 0xb3 0x02 0xf9>;
+ clock-names = "aclk\0hclk";
+ power-domains = <0x8a 0x0d>;
+ rk_iommu,disable_reset_quirk;
+ #iommu-cells = <0x00>;
+ status = "okay";
+ phandle = <0xa5>;
+ };
+
+ rk_isp@ff4a0000 {
+ compatible = "rockchip,px30-isp\0rockchip,isp";
+ reg = <0x00 0xff4a0000 0x00 0x8000>;
+ interrupts = <0x00 0x46 0x04>;
+ clocks = <0x02 0xb4 0x02 0xfa 0x02 0x33 0x02 0x33 0x02 0x15f 0x02 0x34 0x02 0x34 0x02 0x146>;
+ clock-names = "aclk_isp\0hclk_isp\0clk_isp\0clk_isp_jpe\0pclkin_isp\0clk_cif_pll\0clk_cif_out\0pclk_dphyrx";
+ resets = <0x02 0x2b 0x02 0x2f>;
+ reset-names = "rst_isp\0rst_mipicsiphy";
+ power-domains = <0x8a 0x0d>;
+ pinctrl-names = "default\0isp_dvp8bit2\0isp_dvp10bit\0isp_dvp12bit";
+ pinctrl-0 = <0xa6>;
+ pinctrl-1 = <0xa4>;
+ pinctrl-2 = <0xa4 0xa7>;
+ pinctrl-3 = <0xa8 0xa4 0xa7>;
+ rockchip,isp,mipiphy = <0x01>;
+ rockchip,isp,csiphy,reg = <0xff2f0000 0x4000>;
+ rockchip,grf = <0x2f>;
+ rockchip,cru = <0x02>;
+ rockchip,isp,iommu-enable = <0x01>;
+ iommus = <0xa9>;
+ status = "disabled";
+ phandle = <0x113>;
+ };
+
+ rkisp1@ff4a0000 {
+ compatible = "rockchip,rk3326-rkisp1";
+ reg = <0x00 0xff4a0000 0x00 0x8000>;
+ interrupts = <0x00 0x46 0x04 0x00 0x49 0x04 0x00 0x4a 0x04>;
+ interrupt-names = "isp_irq\0mi_irq\0mipi_irq";
+ clocks = <0x02 0xb4 0x02 0xfa 0x02 0x33 0x02 0x15f>;
+ clock-names = "aclk_isp\0hclk_isp\0clk_isp\0pclk_isp";
+ devfreq = <0xaa>;
+ power-domains = <0x8a 0x0d>;
+ iommus = <0xa9>;
+ rockchip,grf = <0x2f>;
+ status = "okay";
+ phandle = <0x114>;
+ };
+
+ iommu@ff4a8000 {
+ compatible = "rockchip,iommu";
+ reg = <0x00 0xff4a8000 0x00 0x100>;
+ interrupts = <0x00 0x46 0x04>;
+ interrupt-names = "isp_mmu";
+ clocks = <0x02 0xb4 0x02 0xfa>;
+ clock-names = "aclk\0hclk";
+ power-domains = <0x8a 0x0d>;
+ rk_iommu,disable_reset_quirk;
+ #iommu-cells = <0x00>;
+ status = "okay";
+ phandle = <0xa9>;
+ };
+
+ qos@ff518000 {
+ compatible = "syscon";
+ reg = <0x00 0xff518000 0x00 0x20>;
+ phandle = <0x18>;
+ };
+
+ qos@ff520000 {
+ compatible = "syscon";
+ reg = <0x00 0xff520000 0x00 0x20>;
+ phandle = <0x28>;
+ };
+
+ qos@ff52c000 {
+ compatible = "syscon";
+ reg = <0x00 0xff52c000 0x00 0x20>;
+ phandle = <0x17>;
+ };
+
+ qos@ff538000 {
+ compatible = "syscon";
+ reg = <0x00 0xff538000 0x00 0x20>;
+ phandle = <0x19>;
+ };
+
+ qos@ff538080 {
+ compatible = "syscon";
+ reg = <0x00 0xff538080 0x00 0x20>;
+ phandle = <0x1a>;
+ };
+
+ qos@ff538100 {
+ compatible = "syscon";
+ reg = <0x00 0xff538100 0x00 0x20>;
+ phandle = <0x1b>;
+ };
+
+ qos@ff538180 {
+ compatible = "syscon";
+ reg = <0x00 0xff538180 0x00 0x20>;
+ phandle = <0x1c>;
+ };
+
+ qos@ff540000 {
+ compatible = "syscon";
+ reg = <0x00 0xff540000 0x00 0x20>;
+ phandle = <0x15>;
+ };
+
+ qos@ff540080 {
+ compatible = "syscon";
+ reg = <0x00 0xff540080 0x00 0x20>;
+ phandle = <0x16>;
+ };
+
+ qos@ff548000 {
+ compatible = "syscon";
+ reg = <0x00 0xff548000 0x00 0x20>;
+ phandle = <0x23>;
+ };
+
+ qos@ff548080 {
+ compatible = "syscon";
+ reg = <0x00 0xff548080 0x00 0x20>;
+ phandle = <0x24>;
+ };
+
+ qos@ff548100 {
+ compatible = "syscon";
+ reg = <0x00 0xff548100 0x00 0x20>;
+ phandle = <0x25>;
+ };
+
+ qos@ff548180 {
+ compatible = "syscon";
+ reg = <0x00 0xff548180 0x00 0x20>;
+ phandle = <0x26>;
+ };
+
+ qos@ff548200 {
+ compatible = "syscon";
+ reg = <0x00 0xff548200 0x00 0x20>;
+ phandle = <0x27>;
+ };
+
+ qos@ff550000 {
+ compatible = "syscon";
+ reg = <0x00 0xff550000 0x00 0x20>;
+ phandle = <0x1f>;
+ };
+
+ qos@ff550080 {
+ compatible = "syscon";
+ reg = <0x00 0xff550080 0x00 0x20>;
+ phandle = <0x20>;
+ };
+
+ qos@ff550100 {
+ compatible = "syscon";
+ reg = <0x00 0xff550100 0x00 0x20>;
+ phandle = <0x21>;
+ };
+
+ qos@ff550180 {
+ compatible = "syscon";
+ reg = <0x00 0xff550180 0x00 0x20>;
+ phandle = <0x22>;
+ };
+
+ qos@ff558000 {
+ compatible = "syscon";
+ reg = <0x00 0xff558000 0x00 0x20>;
+ phandle = <0x1d>;
+ };
+
+ qos@ff558080 {
+ compatible = "syscon";
+ reg = <0x00 0xff558080 0x00 0x20>;
+ phandle = <0x1e>;
+ };
+
+ dfi@ff610000 {
+ reg = <0x00 0xff610000 0x00 0x400>;
+ compatible = "rockchip,px30-dfi";
+ rockchip,pmugrf = <0xab>;
+ status = "okay";
+ phandle = <0xac>;
+ };
+
+ dmc {
+ compatible = "rockchip,px30-dmc";
+ interrupts = <0x00 0x69 0x04>;
+ interrupt-names = "complete_irq";
+ devfreq-events = <0xac>;
+ clocks = <0x02 0x54>;
+ clock-names = "dmc_clk";
+ operating-points-v2 = <0xad>;
+ ddr_timing = <0xae>;
+ upthreshold = <0x28>;
+ downdifferential = <0x14>;
+ system-status-freq = <0x01 0x80e80 0x08 0x6ddd0 0x02 0x2f5d0 0x20 0x6ddd0 0x1000 0x80e80 0x4000 0xa2990 0x2000 0xa2990>;
+ auto-min-freq = <0x50140>;
+ auto-freq-en = <0x01>;
+ #cooling-cells = <0x02>;
+ status = "okay";
+ center-supply = <0x0e>;
+ phandle = <0xaa>;
+
+ ddr_power_model {
+ compatible = "ddr_power_model";
+ dynamic-power-coefficient = <0x78>;
+ static-power-coefficient = <0xc8>;
+ ts = <0x7d00 0x125c 0xffffffb0 0x02>;
+ thermal-zone = "soc-thermal";
+ phandle = <0x115>;
+ };
+ };
+
+ dmc-opp-table {
+ compatible = "operating-points-v2";
+ rockchip,max-volt = <0x118c30>;
+ rockchip,evb-irdrop = <0x61a8>;
+ rockchip,pvtm-voltage-sel = <0x00 0xc350 0x00 0xc351 0xd2f0 0x01 0xd2f1 0xea60 0x02 0xea61 0x1869f 0x03>;
+ rockchip,pvtm-ch = <0x00 0x00>;
+ phandle = <0xad>;
+
+ opp-528000000 {
+ opp-hz = <0x00 0x1f78a400>;
+ opp-microvolt = <0xee098>;
+ opp-microvolt-L0 = <0xee098>;
+ opp-microvolt-L1 = <0xee098>;
+ opp-microvolt-L2 = <0xe7ef0>;
+ opp-microvolt-L3 = <0xe7ef0>;
+ };
+
+ opp-666000000 {
+ opp-hz = <0x00 0x27b25a80>;
+ opp-microvolt = <0x100590>;
+ opp-microvolt-L0 = <0x100590>;
+ opp-microvolt-L1 = <0xf4240>;
+ opp-microvolt-L2 = <0xee098>;
+ opp-microvolt-L3 = <0xe7ef0>;
+ };
+
+ opp-786000000 {
+ opp-hz = <0x00 0x2ed96880>;
+ opp-microvolt = <0x10c8e0>;
+ opp-microvolt-L0 = <0x10c8e0>;
+ opp-microvolt-L1 = <0x100590>;
+ opp-microvolt-L2 = <0xfa3e8>;
+ opp-microvolt-L3 = <0xf4240>;
+ status = "okay";
+ };
+ };
+
+ rockchip-system-monitor {
+ compatible = "rockchip,system-monitor";
+ rockchip,thermal-zone = "soc-thermal";
+ rockchip,polling-delay = <0xc8>;
+ phandle = <0x116>;
+ };
+
+ pinctrl {
+ compatible = "rockchip,px30-pinctrl";
+ rockchip,grf = <0x2f>;
+ rockchip,pmu = <0xab>;
+ #address-cells = <0x02>;
+ #size-cells = <0x02>;
+ ranges;
+ phandle = <0x117>;
+
+ gpio0@ff040000 {
+ compatible = "rockchip,gpio-bank";
+ reg = <0x00 0xff040000 0x00 0x100>;
+ interrupts = <0x00 0x03 0x04>;
+ clocks = <0x2a 0x14>;
+ gpio-controller;
+ #gpio-cells = <0x02>;
+ interrupt-controller;
+ #interrupt-cells = <0x02>;
+ phandle = <0x5c>;
+ };
+
+ gpio1@ff250000 {
+ compatible = "rockchip,gpio-bank";
+ reg = <0x00 0xff250000 0x00 0x100>;
+ interrupts = <0x00 0x04 0x04>;
+ clocks = <0x02 0x15c>;
+ gpio-controller;
+ #gpio-cells = <0x02>;
+ interrupt-controller;
+ #interrupt-cells = <0x02>;
+ phandle = <0xbf>;
+ };
+
+ gpio2@ff260000 {
+ compatible = "rockchip,gpio-bank";
+ reg = <0x00 0xff260000 0x00 0x100>;
+ interrupts = <0x00 0x05 0x04>;
+ clocks = <0x02 0x15d>;
+ gpio-controller;
+ #gpio-cells = <0x02>;
+ interrupt-controller;
+ #interrupt-cells = <0x02>;
+ phandle = <0x66>;
+ };
+
+ gpio3@ff270000 {
+ compatible = "rockchip,gpio-bank";
+ reg = <0x00 0xff270000 0x00 0x100>;
+ interrupts = <0x00 0x06 0x04>;
+ clocks = <0x02 0x15e>;
+ gpio-controller;
+ #gpio-cells = <0x02>;
+ interrupt-controller;
+ #interrupt-cells = <0x02>;
+ phandle = <0x97>;
+ };
+
+ pcfg-pull-up {
+ bias-pull-up;
+ phandle = <0xb1>;
+ };
+
+ pcfg-pull-down {
+ bias-pull-down;
+ phandle = <0xb9>;
+ };
+
+ pcfg-pull-none {
+ bias-disable;
+ phandle = <0xb0>;
+ };
+
+ pcfg-pull-none-2ma {
+ bias-disable;
+ drive-strength = <0x02>;
+ phandle = <0x118>;
+ };
+
+ pcfg-pull-up-2ma {
+ bias-pull-up;
+ drive-strength = <0x02>;
+ phandle = <0x119>;
+ };
+
+ pcfg-pull-up-4ma {
+ bias-pull-up;
+ drive-strength = <0x04>;
+ phandle = <0xb2>;
+ };
+
+ pcfg-pull-none-4ma {
+ bias-disable;
+ drive-strength = <0x04>;
+ phandle = <0x11a>;
+ };
+
+ pcfg-pull-down-4ma {
+ bias-pull-down;
+ drive-strength = <0x04>;
+ phandle = <0x11b>;
+ };
+
+ pcfg-pull-none-8ma {
+ bias-disable;
+ drive-strength = <0x08>;
+ phandle = <0xb5>;
+ };
+
+ pcfg-pull-up-8ma {
+ bias-pull-up;
+ drive-strength = <0x08>;
+ phandle = <0xb3>;
+ };
+
+ pcfg-pull-none-12ma {
+ bias-disable;
+ drive-strength = <0x0c>;
+ phandle = <0xb7>;
+ };
+
+ pcfg-pull-up-12ma {
+ bias-pull-up;
+ drive-strength = <0x0c>;
+ phandle = <0xb6>;
+ };
+
+ pcfg-pull-none-smt {
+ bias-disable;
+ input-schmitt-enable;
+ phandle = <0xaf>;
+ };
+
+ pcfg-output-high {
+ output-high;
+ phandle = <0x11c>;
+ };
+
+ pcfg-output-low {
+ output-low;
+ phandle = <0xb8>;
+ };
+
+ pcfg-input-high {
+ bias-pull-up;
+ input-enable;
+ phandle = <0xb4>;
+ };
+
+ pcfg-input {
+ input-enable;
+ phandle = <0x11d>;
+ };
+
+ i2c0 {
+
+ i2c0-xfer {
+ rockchip,pins = <0x00 0x08 0x01 0xaf 0x00 0x09 0x01 0xaf>;
+ phandle = <0x5b>;
+ };
+ };
+
+ i2c1 {
+
+ i2c1-xfer {
+ rockchip,pins = <0x00 0x12 0x01 0xaf 0x00 0x13 0x01 0xaf>;
+ phandle = <0x69>;
+ };
+ };
+
+ i2c2 {
+
+ i2c2-xfer {
+ rockchip,pins = <0x02 0x0f 0x02 0xaf 0x02 0x10 0x02 0xaf>;
+ phandle = <0x6a>;
+ };
+ };
+
+ i2c3 {
+
+ i2c3-xfer {
+ rockchip,pins = <0x01 0x0c 0x04 0xaf 0x01 0x0d 0x04 0xaf>;
+ phandle = <0x6b>;
+ };
+ };
+
+ tsadc {
+
+ tsadc-otp-gpio {
+ rockchip,pins = <0x00 0x06 0x00 0xb0>;
+ phandle = <0x86>;
+ };
+
+ tsadc-otp-out {
+ rockchip,pins = <0x00 0x06 0x01 0xb0>;
+ phandle = <0x87>;
+ };
+ };
+
+ uart0 {
+
+ uart0-xfer {
+ rockchip,pins = <0x00 0x0a 0x01 0xb1 0x00 0x0b 0x01 0xb1>;
+ phandle = <0x2c>;
+ };
+
+ uart0-cts {
+ rockchip,pins = <0x00 0x0c 0x01 0xb0>;
+ phandle = <0x2d>;
+ };
+
+ uart0-rts {
+ rockchip,pins = <0x00 0x0d 0x01 0xb0>;
+ phandle = <0x2e>;
+ };
+
+ uart0-rts-gpio {
+ rockchip,pins = <0x00 0x0d 0x00 0xb0>;
+ phandle = <0x11e>;
+ };
+ };
+
+ uart1 {
+
+ uart1-xfer {
+ rockchip,pins = <0x01 0x11 0x01 0xb1 0x01 0x10 0x01 0xb1>;
+ phandle = <0x4f>;
+ };
+
+ uart1-cts {
+ rockchip,pins = <0x01 0x12 0x01 0xb0>;
+ phandle = <0x50>;
+ };
+
+ uart1-rts {
+ rockchip,pins = <0x01 0x13 0x01 0xb0>;
+ phandle = <0x11f>;
+ };
+
+ uart1-rts-gpio {
+ rockchip,pins = <0x01 0x13 0x00 0xb0>;
+ phandle = <0x120>;
+ };
+ };
+
+ uart2-m0 {
+
+ uart2m0-xfer {
+ rockchip,pins = <0x01 0x1a 0x02 0xb1 0x01 0x1b 0x02 0xb1>;
+ phandle = <0x51>;
+ };
+ };
+
+ uart2-m1 {
+
+ uart2m1-xfer {
+ rockchip,pins = <0x02 0x0c 0x02 0xb1 0x02 0x0e 0x02 0xb1>;
+ phandle = <0xba>;
+ };
+ };
+
+ uart3-m0 {
+
+ uart3m0-xfer {
+ rockchip,pins = <0x00 0x10 0x02 0xb1 0x00 0x11 0x02 0xb1>;
+ phandle = <0x121>;
+ };
+
+ uart3m0-cts {
+ rockchip,pins = <0x00 0x12 0x02 0xb0>;
+ phandle = <0x122>;
+ };
+
+ uart3m0-rts {
+ rockchip,pins = <0x00 0x13 0x02 0xb0>;
+ phandle = <0x123>;
+ };
+
+ uart3m0-rts-gpio {
+ rockchip,pins = <0x00 0x13 0x00 0xb0>;
+ phandle = <0x124>;
+ };
+ };
+
+ uart3-m1 {
+
+ uart3m1-xfer {
+ rockchip,pins = <0x01 0x0e 0x02 0xb1 0x01 0x0f 0x02 0xb1>;
+ phandle = <0x52>;
+ };
+
+ uart3m1-cts {
+ rockchip,pins = <0x01 0x0c 0x02 0xb0>;
+ phandle = <0x53>;
+ };
+
+ uart3m1-rts {
+ rockchip,pins = <0x01 0x0d 0x02 0xb0>;
+ phandle = <0x54>;
+ };
+
+ uart3m1-rts-gpio {
+ rockchip,pins = <0x01 0x0d 0x00 0xb0>;
+ phandle = <0x125>;
+ };
+ };
+
+ uart4 {
+
+ uart4-xfer {
+ rockchip,pins = <0x01 0x1c 0x02 0xb1 0x01 0x1d 0x02 0xb1>;
+ phandle = <0x55>;
+ };
+
+ uart4-cts {
+ rockchip,pins = <0x01 0x1e 0x02 0xb0>;
+ phandle = <0x56>;
+ };
+
+ uart4-rts {
+ rockchip,pins = <0x01 0x1f 0x02 0xb0>;
+ phandle = <0x57>;
+ };
+ };
+
+ uart5 {
+
+ uart5-xfer {
+ rockchip,pins = <0x03 0x02 0x04 0xb1 0x03 0x01 0x04 0xb1>;
+ phandle = <0x58>;
+ };
+
+ uart5-cts {
+ rockchip,pins = <0x03 0x03 0x04 0xb0>;
+ phandle = <0x59>;
+ };
+
+ uart5-rts {
+ rockchip,pins = <0x03 0x05 0x04 0xb0>;
+ phandle = <0x5a>;
+ };
+ };
+
+ spi0 {
+
+ spi0-clk {
+ rockchip,pins = <0x01 0x0f 0x03 0xb2>;
+ phandle = <0x6c>;
+ };
+
+ spi0-csn {
+ rockchip,pins = <0x01 0x0e 0x03 0xb2>;
+ phandle = <0x6d>;
+ };
+
+ spi0-miso {
+ rockchip,pins = <0x01 0x0d 0x03 0xb2>;
+ phandle = <0x6e>;
+ };
+
+ spi0-mosi {
+ rockchip,pins = <0x01 0x0c 0x03 0xb2>;
+ phandle = <0x6f>;
+ };
+
+ spi0-clk-hs {
+ rockchip,pins = <0x01 0x0f 0x03 0xb3>;
+ phandle = <0x70>;
+ };
+
+ spi0-miso-hs {
+ rockchip,pins = <0x01 0x0d 0x03 0xb3>;
+ phandle = <0x71>;
+ };
+
+ spi0-mosi-hs {
+ rockchip,pins = <0x01 0x0c 0x03 0xb3>;
+ phandle = <0x72>;
+ };
+ };
+
+ spi1 {
+
+ spi1-clk {
+ rockchip,pins = <0x03 0x0f 0x04 0xb2>;
+ phandle = <0x73>;
+ };
+
+ spi1-csn0 {
+ rockchip,pins = <0x03 0x09 0x04 0xb2>;
+ phandle = <0x74>;
+ };
+
+ spi1-csn1 {
+ rockchip,pins = <0x03 0x0a 0x02 0xb2>;
+ phandle = <0x75>;
+ };
+
+ spi1-miso {
+ rockchip,pins = <0x03 0x0e 0x04 0xb2>;
+ phandle = <0x76>;
+ };
+
+ spi1-mosi {
+ rockchip,pins = <0x03 0x0c 0x04 0xb2>;
+ phandle = <0x77>;
+ };
+
+ spi1-clk-hs {
+ rockchip,pins = <0x03 0x0f 0x04 0xb3>;
+ phandle = <0x78>;
+ };
+
+ spi1-miso-hs {
+ rockchip,pins = <0x03 0x0e 0x04 0xb3>;
+ phandle = <0x79>;
+ };
+
+ spi1-mosi-hs {
+ rockchip,pins = <0x03 0x0c 0x04 0xb3>;
+ phandle = <0x7a>;
+ };
+ };
+
+ pdm {
+
+ pdm-clk0m0 {
+ rockchip,pins = <0x03 0x16 0x02 0xb0>;
+ phandle = <0x44>;
+ };
+
+ pdm-clk0m1 {
+ rockchip,pins = <0x02 0x16 0x01 0xb0>;
+ phandle = <0x126>;
+ };
+
+ pdm-clk1 {
+ rockchip,pins = <0x03 0x17 0x02 0xb0>;
+ phandle = <0x45>;
+ };
+
+ pdm-sdi0m0 {
+ rockchip,pins = <0x03 0x1b 0x02 0xb0>;
+ phandle = <0x46>;
+ };
+
+ pdm-sdi0m1 {
+ rockchip,pins = <0x02 0x15 0x02 0xb0>;
+ phandle = <0x127>;
+ };
+
+ pdm-sdi1 {
+ rockchip,pins = <0x03 0x18 0x02 0xb0>;
+ phandle = <0x47>;
+ };
+
+ pdm-sdi2 {
+ rockchip,pins = <0x03 0x19 0x02 0xb0>;
+ phandle = <0x48>;
+ };
+
+ pdm-sdi3 {
+ rockchip,pins = <0x03 0x1a 0x02 0xb0>;
+ phandle = <0x49>;
+ };
+
+ pdm-clk0m0-sleep {
+ rockchip,pins = <0x03 0x16 0x00 0xb4>;
+ phandle = <0x128>;
+ };
+
+ pdm-clk0m1-sleep {
+ rockchip,pins = <0x02 0x16 0x00 0xb4>;
+ phandle = <0x129>;
+ };
+
+ pdm-clk1-sleep {
+ rockchip,pins = <0x03 0x17 0x00 0xb4>;
+ phandle = <0x12a>;
+ };
+
+ pdm-sdi0m0-sleep {
+ rockchip,pins = <0x03 0x1b 0x00 0xb4>;
+ phandle = <0x12b>;
+ };
+
+ pdm-sdi0m1-sleep {
+ rockchip,pins = <0x02 0x15 0x00 0xb4>;
+ phandle = <0x12c>;
+ };
+
+ pdm-sdi1-sleep {
+ rockchip,pins = <0x03 0x18 0x00 0xb4>;
+ phandle = <0x12d>;
+ };
+
+ pdm-sdi2-sleep {
+ rockchip,pins = <0x03 0x19 0x00 0xb4>;
+ phandle = <0x12e>;
+ };
+
+ pdm-sdi3-sleep {
+ rockchip,pins = <0x03 0x1a 0x00 0xb4>;
+ phandle = <0x12f>;
+ };
+ };
+
+ i2s0 {
+
+ i2s0-8ch-mclk {
+ rockchip,pins = <0x03 0x11 0x02 0xb0>;
+ phandle = <0x130>;
+ };
+
+ i2s0-8ch-sclktx {
+ rockchip,pins = <0x03 0x13 0x02 0xb0>;
+ phandle = <0x30>;
+ };
+
+ i2s0-8ch-sclkrx {
+ rockchip,pins = <0x03 0x0c 0x02 0xb0>;
+ phandle = <0x31>;
+ };
+
+ i2s0-8ch-lrcktx {
+ rockchip,pins = <0x03 0x12 0x02 0xb0>;
+ phandle = <0x32>;
+ };
+
+ i2s0-8ch-lrckrx {
+ rockchip,pins = <0x03 0x0d 0x02 0xb0>;
+ phandle = <0x33>;
+ };
+
+ i2s0-8ch-sdo0 {
+ rockchip,pins = <0x03 0x14 0x02 0xb0>;
+ phandle = <0x38>;
+ };
+
+ i2s0-8ch-sdo1 {
+ rockchip,pins = <0x03 0x10 0x02 0xb0>;
+ phandle = <0x39>;
+ };
+
+ i2s0-8ch-sdo2 {
+ rockchip,pins = <0x03 0x0f 0x02 0xb0>;
+ phandle = <0x3a>;
+ };
+
+ i2s0-8ch-sdo3 {
+ rockchip,pins = <0x03 0x0e 0x02 0xb0>;
+ phandle = <0x3b>;
+ };
+
+ i2s0-8ch-sdi0 {
+ rockchip,pins = <0x03 0x15 0x02 0xb0>;
+ phandle = <0x34>;
+ };
+
+ i2s0-8ch-sdi1 {
+ rockchip,pins = <0x03 0x0b 0x02 0xb0>;
+ phandle = <0x35>;
+ };
+
+ i2s0-8ch-sdi2 {
+ rockchip,pins = <0x03 0x09 0x02 0xb0>;
+ phandle = <0x36>;
+ };
+
+ i2s0-8ch-sdi3 {
+ rockchip,pins = <0x03 0x08 0x02 0xb0>;
+ phandle = <0x37>;
+ };
+ };
+
+ i2s1 {
+
+ i2s1-2ch-mclk {
+ rockchip,pins = <0x02 0x13 0x01 0xb0>;
+ phandle = <0x68>;
+ };
+
+ i2s1-2ch-sclk {
+ rockchip,pins = <0x02 0x12 0x01 0xb0>;
+ phandle = <0x3c>;
+ };
+
+ i2s1-2ch-lrck {
+ rockchip,pins = <0x02 0x11 0x01 0xb0>;
+ phandle = <0x3d>;
+ };
+
+ i2s1-2ch-sdi {
+ rockchip,pins = <0x02 0x15 0x01 0xb0>;
+ phandle = <0x3e>;
+ };
+
+ i2s1-2ch-sdo {
+ rockchip,pins = <0x02 0x14 0x01 0xb0>;
+ phandle = <0x3f>;
+ };
+ };
+
+ i2s2 {
+
+ i2s2-2ch-mclk {
+ rockchip,pins = <0x03 0x01 0x02 0xb0>;
+ phandle = <0x131>;
+ };
+
+ i2s2-2ch-sclk {
+ rockchip,pins = <0x03 0x02 0x02 0xb0>;
+ phandle = <0x40>;
+ };
+
+ i2s2-2ch-lrck {
+ rockchip,pins = <0x03 0x03 0x02 0xb0>;
+ phandle = <0x41>;
+ };
+
+ i2s2-2ch-sdi {
+ rockchip,pins = <0x03 0x05 0x02 0xb0>;
+ phandle = <0x42>;
+ };
+
+ i2s2-2ch-sdo {
+ rockchip,pins = <0x03 0x07 0x02 0xb0>;
+ phandle = <0x43>;
+ };
+ };
+
+ sdmmc {
+
+ sdmmc-clk {
+ rockchip,pins = <0x01 0x1e 0x01 0xb5>;
+ phandle = <0x8f>;
+ };
+
+ sdmmc-cmd {
+ rockchip,pins = <0x01 0x1f 0x01 0xb3>;
+ phandle = <0x90>;
+ };
+
+ sdmmc-det {
+ rockchip,pins = <0x00 0x03 0x01 0xb3>;
+ phandle = <0x91>;
+ };
+
+ sdmmc-bus1 {
+ rockchip,pins = <0x01 0x1a 0x01 0xb3>;
+ phandle = <0x132>;
+ };
+
+ sdmmc-bus4 {
+ rockchip,pins = <0x01 0x1a 0x01 0xb3 0x01 0x1b 0x01 0xb3 0x01 0x1c 0x01 0xb3 0x01 0x1d 0x01 0xb3>;
+ phandle = <0x92>;
+ };
+
+ sdmmc-gpio {
+ rockchip,pins = <0x01 0x1a 0x00 0xb2 0x01 0x1b 0x00 0xb2 0x01 0x1c 0x00 0xb2 0x01 0x1d 0x00 0xb2 0x01 0x1e 0x00 0xb2 0x01 0x1f 0x00 0xb2>;
+ phandle = <0x133>;
+ };
+ };
+
+ sdio {
+
+ sdio-clk {
+ rockchip,pins = <0x01 0x15 0x01 0xb0>;
+ phandle = <0x96>;
+ };
+
+ sdio-cmd {
+ rockchip,pins = <0x01 0x14 0x01 0xb1>;
+ phandle = <0x95>;
+ };
+
+ sdio-bus4 {
+ rockchip,pins = <0x01 0x16 0x01 0xb1 0x01 0x17 0x01 0xb1 0x01 0x18 0x01 0xb1 0x01 0x19 0x01 0xb1>;
+ phandle = <0x94>;
+ };
+
+ sdio-gpio {
+ rockchip,pins = <0x01 0x16 0x00 0xb1 0x01 0x17 0x00 0xb1 0x01 0x18 0x00 0xb1 0x01 0x19 0x00 0xb1 0x01 0x14 0x00 0xb1 0x01 0x15 0x00 0xb1>;
+ phandle = <0x134>;
+ };
+ };
+
+ emmc {
+
+ emmc-clk {
+ rockchip,pins = <0x01 0x09 0x02 0xb5>;
+ phandle = <0x135>;
+ };
+
+ emmc-cmd {
+ rockchip,pins = <0x01 0x0a 0x02 0xb3>;
+ phandle = <0x136>;
+ };
+
+ emmc-pwren {
+ rockchip,pins = <0x01 0x08 0x02 0xb0>;
+ phandle = <0x137>;
+ };
+
+ emmc-rstnout {
+ rockchip,pins = <0x01 0x0b 0x02 0xb0>;
+ phandle = <0x138>;
+ };
+
+ emmc-bus1 {
+ rockchip,pins = <0x01 0x00 0x02 0xb3>;
+ phandle = <0x139>;
+ };
+
+ emmc-bus4 {
+ rockchip,pins = <0x01 0x00 0x02 0xb3 0x01 0x01 0x02 0xb3 0x01 0x02 0x02 0xb3 0x01 0x03 0x02 0xb3>;
+ phandle = <0x13a>;
+ };
+
+ emmc-bus8 {
+ rockchip,pins = <0x01 0x00 0x02 0xb3 0x01 0x01 0x02 0xb3 0x01 0x02 0x02 0xb3 0x01 0x03 0x02 0xb3 0x01 0x04 0x02 0xb3 0x01 0x05 0x02 0xb3 0x01 0x06 0x02 0xb3 0x01 0x07 0x02 0xb3>;
+ phandle = <0x13b>;
+ };
+ };
+
+ flash {
+
+ flash-cs0 {
+ rockchip,pins = <0x01 0x08 0x01 0xb0>;
+ phandle = <0x13c>;
+ };
+
+ flash-rdy {
+ rockchip,pins = <0x01 0x09 0x01 0xb0>;
+ phandle = <0x13d>;
+ };
+
+ flash-dqs {
+ rockchip,pins = <0x01 0x0a 0x01 0xb0>;
+ phandle = <0x13e>;
+ };
+
+ flash-ale {
+ rockchip,pins = <0x01 0x0b 0x01 0xb0>;
+ phandle = <0x13f>;
+ };
+
+ flash-cle {
+ rockchip,pins = <0x01 0x0c 0x01 0xb0>;
+ phandle = <0x140>;
+ };
+
+ flash-wrn {
+ rockchip,pins = <0x01 0x0d 0x01 0xb0>;
+ phandle = <0x141>;
+ };
+
+ flash-csl {
+ rockchip,pins = <0x01 0x0e 0x01 0xb0>;
+ phandle = <0x142>;
+ };
+
+ flash-rdn {
+ rockchip,pins = <0x01 0x0f 0x01 0xb0>;
+ phandle = <0x143>;
+ };
+
+ flash-bus8 {
+ rockchip,pins = <0x01 0x00 0x01 0xb6 0x01 0x01 0x01 0xb6 0x01 0x02 0x01 0xb6 0x01 0x03 0x01 0xb6 0x01 0x04 0x01 0xb6 0x01 0x05 0x01 0xb6 0x01 0x06 0x01 0xb6 0x01 0x07 0x01 0xb6>;
+ phandle = <0x144>;
+ };
+ };
+
+ lcdc {
+
+ lcdc-m0-rgb-pins {
+ rockchip,pins = <0x03 0x00 0x01 0xb5 0x03 0x01 0x01 0xb5 0x03 0x02 0x01 0xb5 0x03 0x03 0x01 0xb5 0x03 0x04 0x01 0xb5 0x03 0x05 0x01 0xb5 0x03 0x06 0x01 0xb5 0x03 0x07 0x01 0xb5 0x03 0x08 0x01 0xb5 0x03 0x09 0x01 0xb5 0x03 0x0a 0x01 0xb5 0x03 0x0b 0x01 0xb5 0x03 0x0c 0x01 0xb5 0x03 0x0d 0x01 0xb5 0x03 0x0e 0x01 0xb5 0x03 0x0f 0x01 0xb5 0x03 0x10 0x01 0xb5 0x03 0x11 0x01 0xb5 0x03 0x12 0x01 0xb5 0x03 0x13 0x01 0xb5 0x03 0x14 0x01 0xb5 0x03 0x15 0x01 0xb5 0x03 0x16 0x01 0xb5 0x03 0x17 0x01 0xb5 0x03 0x18 0x01 0xb5 0x03 0x19 0x01 0xb5 0x03 0x1a 0x01 0xb5 0x03 0x1b 0x01 0xb5>;
+ phandle = <0x145>;
+ };
+
+ lcdc-m0-sleep-pins {
+ rockchip,pins = <0x03 0x00 0x00 0xb0 0x03 0x01 0x00 0xb0 0x03 0x02 0x00 0xb0 0x03 0x03 0x00 0xb0 0x03 0x04 0x00 0xb0 0x03 0x05 0x00 0xb0 0x03 0x06 0x00 0xb0 0x03 0x07 0x00 0xb0 0x03 0x08 0x00 0xb0 0x03 0x09 0x00 0xb0 0x03 0x0a 0x00 0xb0 0x03 0x0b 0x00 0xb0 0x03 0x0c 0x00 0xb0 0x03 0x0d 0x00 0xb0 0x03 0x0e 0x00 0xb0 0x03 0x0f 0x00 0xb0 0x03 0x10 0x00 0xb0 0x03 0x11 0x00 0xb0 0x03 0x12 0x00 0xb0 0x03 0x13 0x00 0xb0 0x03 0x14 0x00 0xb0 0x03 0x15 0x00 0xb0 0x03 0x16 0x00 0xb0 0x03 0x17 0x00 0xb0 0x03 0x18 0x00 0xb0 0x03 0x19 0x00 0xb0 0x03 0x1a 0x00 0xb0 0x03 0x1b 0x00 0xb0>;
+ phandle = <0x146>;
+ };
+
+ lcdc-m1-rgb-pins {
+ rockchip,pins = <0x03 0x00 0x01 0xb5 0x03 0x04 0x01 0xb5 0x03 0x06 0x01 0xb5 0x03 0x0a 0x01 0xb5 0x03 0x0b 0x01 0xb5 0x03 0x0d 0x01 0xb5 0x03 0x10 0x01 0xb5 0x03 0x11 0x01 0xb5 0x03 0x12 0x01 0xb5 0x03 0x13 0x01 0xb5 0x03 0x14 0x01 0xb5 0x03 0x15 0x01 0xb5 0x03 0x16 0x01 0xb5 0x03 0x17 0x01 0xb5 0x03 0x18 0x01 0xb5 0x03 0x19 0x01 0xb5 0x03 0x1a 0x01 0xb5 0x03 0x1b 0x01 0xb5>;
+ phandle = <0x4d>;
+ };
+
+ lcdc-m1-sleep-pins {
+ rockchip,pins = <0x03 0x00 0x00 0xb0 0x03 0x04 0x00 0xb0 0x03 0x06 0x00 0xb0 0x03 0x0a 0x00 0xb0 0x03 0x0b 0x00 0xb0 0x03 0x0d 0x00 0xb0 0x03 0x10 0x00 0xb0 0x03 0x11 0x00 0xb0 0x03 0x12 0x00 0xb0 0x03 0x13 0x00 0xb0 0x03 0x14 0x00 0xb0 0x03 0x15 0x00 0xb0 0x03 0x16 0x00 0xb0 0x03 0x17 0x00 0xb0 0x03 0x18 0x00 0xb0 0x03 0x19 0x00 0xb0 0x03 0x1a 0x00 0xb0 0x03 0x1b 0x00 0xb0>;
+ phandle = <0x4e>;
+ };
+ };
+
+ pwm0 {
+
+ pwm0-pin {
+ rockchip,pins = <0x00 0x0f 0x01 0xb0>;
+ phandle = <0x7b>;
+ };
+ };
+
+ pwm1 {
+
+ pwm1-pin {
+ rockchip,pins = <0x00 0x10 0x01 0xb0>;
+ phandle = <0x7c>;
+ };
+ };
+
+ pwm2 {
+
+ pwm2-pin {
+ rockchip,pins = <0x02 0x0d 0x01 0xb0>;
+ phandle = <0x7d>;
+ };
+ };
+
+ pwm3 {
+
+ pwm3-pin {
+ rockchip,pins = <0x00 0x11 0x01 0xb0>;
+ phandle = <0x7e>;
+ };
+ };
+
+ pwm4 {
+
+ pwm4-pin {
+ rockchip,pins = <0x03 0x12 0x03 0xb0>;
+ phandle = <0x7f>;
+ };
+ };
+
+ pwm5 {
+
+ pwm5-pin {
+ rockchip,pins = <0x03 0x13 0x03 0xb0>;
+ phandle = <0x80>;
+ };
+ };
+
+ pwm6 {
+
+ pwm6-pin {
+ rockchip,pins = <0x03 0x14 0x03 0xb0>;
+ phandle = <0x81>;
+ };
+ };
+
+ pwm7 {
+
+ pwm7-pin {
+ rockchip,pins = <0x03 0x15 0x03 0xb0>;
+ phandle = <0x82>;
+ };
+ };
+
+ gmac {
+
+ rmii-pins {
+ rockchip,pins = <0x02 0x00 0x02 0xb7 0x02 0x01 0x02 0xb7 0x02 0x02 0x02 0xb7 0x02 0x03 0x02 0xb0 0x02 0x04 0x02 0xb0 0x02 0x05 0x02 0xb0 0x02 0x06 0x02 0xb0 0x02 0x07 0x02 0xb0 0x02 0x09 0x02 0xb0>;
+ phandle = <0x8d>;
+ };
+
+ mac-refclk-12ma {
+ rockchip,pins = <0x02 0x0a 0x02 0xb7>;
+ phandle = <0x8e>;
+ };
+
+ mac-refclk {
+ rockchip,pins = <0x02 0x0a 0x02 0xb0>;
+ phandle = <0x147>;
+ };
+ };
+
+ cif-m0 {
+
+ cif-clkout-m0 {
+ rockchip,pins = <0x02 0x0b 0x01 0xb7>;
+ phandle = <0xa6>;
+ };
+
+ dvp-d2d9-m0 {
+ rockchip,pins = <0x02 0x00 0x01 0xb0 0x02 0x01 0x01 0xb0 0x02 0x02 0x01 0xb0 0x02 0x03 0x01 0xb0 0x02 0x04 0x01 0xb0 0x02 0x05 0x01 0xb0 0x02 0x06 0x01 0xb0 0x02 0x07 0x01 0xb0 0x02 0x08 0x01 0xb0 0x02 0x09 0x01 0xb0 0x02 0x0a 0x01 0xb0 0x02 0x0b 0x01 0xb0>;
+ phandle = <0xa4>;
+ };
+
+ dvp-d0d1-m0 {
+ rockchip,pins = <0x02 0x0c 0x01 0xb0 0x02 0x0e 0x01 0xb0>;
+ phandle = <0xa8>;
+ };
+
+ d10-d11-m0 {
+ rockchip,pins = <0x02 0x0f 0x01 0xb0 0x02 0x10 0x01 0xb0>;
+ phandle = <0xa7>;
+ };
+ };
+
+ cif-m1 {
+
+ cif-clkout-m1 {
+ rockchip,pins = <0x03 0x18 0x03 0xb0>;
+ phandle = <0x148>;
+ };
+
+ dvp-d2d9-m1 {
+ rockchip,pins = <0x03 0x03 0x03 0xb0 0x03 0x05 0x03 0xb0 0x03 0x07 0x03 0xb0 0x03 0x08 0x03 0xb0 0x03 0x09 0x03 0xb0 0x03 0x0c 0x03 0xb0 0x03 0x0e 0x03 0xb0 0x03 0x0f 0x03 0xb0 0x03 0x19 0x03 0xb0 0x03 0x1a 0x03 0xb0 0x03 0x1b 0x03 0xb0 0x03 0x18 0x03 0xb0>;
+ phandle = <0x149>;
+ };
+
+ dvp-d0d1-m1 {
+ rockchip,pins = <0x03 0x01 0x03 0xb0 0x03 0x02 0x03 0xb0>;
+ phandle = <0x14a>;
+ };
+
+ d10-d11-m1 {
+ rockchip,pins = <0x03 0x16 0x03 0xb0 0x03 0x17 0x03 0xb0>;
+ phandle = <0x14b>;
+ };
+ };
+
+ isp {
+
+ isp-prelight {
+ rockchip,pins = <0x03 0x19 0x04 0xb0>;
+ phandle = <0x14c>;
+ };
+ };
+
+ pmic {
+
+ pmic_int {
+ rockchip,pins = <0x00 0x0a 0x00 0xb1 0x00 0x0b 0x00 0xb0>;
+ phandle = <0x5d>;
+ };
+
+ soc_slppin_gpio {
+ rockchip,pins = <0x00 0x04 0x00 0xb8>;
+ phandle = <0x60>;
+ };
+
+ soc_slppin_slp {
+ rockchip,pins = <0x00 0x04 0x01 0xb0>;
+ phandle = <0x5e>;
+ };
+
+ soc_slppin_rst {
+ rockchip,pins = <0x00 0x04 0x02 0xb0>;
+ phandle = <0x62>;
+ };
+ };
+
+ leds {
+
+ led-pins {
+ rockchip,pins = <0x00 0x11 0x00 0xb0>;
+ phandle = <0xc0>;
+ };
+ };
+
+ motor {
+
+ motor-pin {
+ rockchip,pins = <0x02 0x15 0x00 0xb9>;
+ phandle = <0xc1>;
+ };
+ };
+
+ btns {
+
+ btn-pins {
+ rockchip,pins = <0x01 0x0c 0x00 0xb1 0x01 0x0d 0x00 0xb1 0x01 0x0e 0x00 0xb1 0x01 0x0f 0x00 0xb1 0x01 0x02 0x00 0xb1 0x01 0x05 0x00 0xb1 0x01 0x06 0x00 0xb1 0x01 0x07 0x00 0xb1 0x02 0x00 0x00 0xb1 0x02 0x01 0x00 0xb1 0x02 0x02 0x00 0xb1 0x02 0x03 0x00 0xb1 0x02 0x04 0x00 0xb1 0x02 0x05 0x00 0xb1 0x02 0x06 0x00 0xb1 0x02 0x07 0x00 0xb1 0x03 0x09 0x00 0xb1 0x03 0x0a 0x00 0xb1 0x03 0x0c 0x00 0xb1 0x03 0x0f 0x00 0xb1>;
+ phandle = <0xbd>;
+ };
+ };
+ };
+
+ chosen {
+ bootargs = [00];
+ };
+
+ fiq-debugger {
+ compatible = "rockchip,fiq-debugger";
+ rockchip,serial-id = <0x02>;
+ rockchip,wake-irq = <0x00>;
+ rockchip,irq-mode-enable = <0x00>;
+ rockchip,baudrate = <0x1c200>;
+ interrupts = <0x00 0x7f 0x08>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0xba>;
+ status = "okay";
+ };
+
+ ramoops {
+ compatible = "ramoops";
+ record-size = <0x00 0x20000>;
+ console-size = <0x00 0x80000>;
+ ftrace-size = <0x00 0x00>;
+ pmsg-size = <0x00 0x00>;
+ memory-region = <0xbb>;
+ };
+
+ reserved-memory {
+ #address-cells = <0x02>;
+ #size-cells = <0x02>;
+ ranges;
+
+ drm-logo@00000000 {
+ compatible = "rockchip,drm-logo";
+ reg = <0x00 0x00 0x00 0x00>;
+ phandle = <0x11>;
+ };
+
+ region@110000 {
+ reg = <0x00 0x110000 0x00 0xf0000>;
+ reg-names = "ramoops_mem";
+ phandle = <0xbb>;
+ };
+ };
+
+ odroidgo3-keys {
+ compatible = "gpio-keys";
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+ autorepeat;
+ phandle = <0x14d>;
+
+ button@0 {
+ label = "GPIO BTN-VOLUP";
+ linux,code = <0x73>;
+ gpios = <0x66 0x00 0x01>;
+ };
+
+ button@1 {
+ label = "GPIO BTN-VOLDN";
+ linux,code = <0x72>;
+ gpios = <0x66 0x01 0x01>;
+ };
+ };
+
+ odroidgo3-joypad {
+ compatible = "odroidgo3-joypad";
+ pwms = <0xbc 0x00 0xbebc200 0x00>;
+ pwm-names = "enable";
+ rumble-boost-weak = <0x00>;
+ rumble-boost-strong = <0x00>;
+ joypad-name = "GO-Super Gamepad";
+ joypad-product = <0x1100>;
+ joypad-revision = <0x100>;
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <0xbd>;
+ pinctrl-1 = <0x7b>;
+ io-channel-names = "amux_adc";
+ io-channels = <0xbe 0x01>;
+ amux-count = <0x04>;
+ amux-a-gpios = <0x97 0x0b 0x01>;
+ amux-b-gpios = <0x97 0x08 0x01>;
+ amux-en-gpios = <0x97 0x0d 0x01>;
+ button-adc-scale = <0x02>;
+ button-adc-deadzone = <0x40>;
+ button-adc-fuzz = <0x20>;
+ button-adc-flat = <0x20>;
+ abs_x-p-tuning = <0xc8>;
+ abs_x-n-tuning = <0xc8>;
+ abs_y-p-tuning = <0xc8>;
+ abs_y-n-tuning = <0xc8>;
+ abs_rx-p-tuning = <0xc8>;
+ abs_rx-n-tuning = <0xc8>;
+ abs_ry-p-tuning = <0xc8>;
+ abs_ry-n-tuning = <0xc8>;
+ poll-interval = <0x0a>;
+ invert-absx;
+ invert-absy;
+ phandle = <0x14e>;
+
+ sw1 {
+ gpios = <0xbf 0x0c 0x01>;
+ label = "GPIO DPAD-UP";
+ linux,code = <0x220>;
+ };
+
+ sw2 {
+ gpios = <0xbf 0x0d 0x01>;
+ label = "GPIO DPAD-DOWN";
+ linux,code = <0x221>;
+ };
+
+ sw3 {
+ gpios = <0xbf 0x0e 0x01>;
+ label = "GPIO DPAD-LEFT";
+ linux,code = <0x222>;
+ };
+
+ sw4 {
+ gpios = <0xbf 0x0f 0x01>;
+ label = "GPIO DPAD-RIGHT";
+ linux,code = <0x223>;
+ };
+
+ sw5 {
+ gpios = <0xbf 0x02 0x01>;
+ label = "GPIO KEY BTN-A";
+ linux,code = <0x131>;
+ };
+
+ sw6 {
+ gpios = <0xbf 0x05 0x01>;
+ label = "GPIO BTN-B";
+ linux,code = <0x130>;
+ };
+
+ sw7 {
+ gpios = <0xbf 0x06 0x01>;
+ label = "GPIO BTN-Y";
+ linux,code = <0x134>;
+ };
+
+ sw8 {
+ gpios = <0xbf 0x07 0x01>;
+ label = "GPIO BTN-X";
+ linux,code = <0x133>;
+ };
+
+ sw11 {
+ gpios = <0x66 0x02 0x01>;
+ label = "GPIO F3";
+ linux,code = <0x2c2>;
+ };
+
+ sw12 {
+ gpios = <0x66 0x03 0x01>;
+ label = "GPIO F4";
+ linux,code = <0x2c3>;
+ };
+
+ sw13 {
+ gpios = <0x66 0x04 0x01>;
+ label = "GPIO F5";
+ linux,code = <0x2c4>;
+ };
+
+ sw15 {
+ gpios = <0x66 0x06 0x01>;
+ label = "GPIO TOP-LEFT";
+ linux,code = <0x136>;
+ };
+
+ sw16 {
+ gpios = <0x66 0x07 0x01>;
+ label = "GPIO TOP-RIGHT";
+ linux,code = <0x137>;
+ };
+
+ sw19 {
+ gpios = <0x97 0x09 0x01>;
+ label = "GPIO F1";
+ linux,code = <0x2c0>;
+ };
+
+ sw20 {
+ gpios = <0x97 0x0f 0x01>;
+ label = "GPIO TOP-RIGHT2";
+ linux,code = <0x139>;
+ };
+
+ sw21 {
+ gpios = <0x97 0x0a 0x01>;
+ label = "GPIO TOP-LEFT2";
+ linux,code = <0x138>;
+ };
+
+ sw22 {
+ gpios = <0x97 0x0c 0x01>;
+ label = "GPIO F2";
+ linux,code = <0x2c1>;
+ };
+ };
+
+ gpio_leds {
+ compatible = "gpio-leds";
+ pinctrl-names = "led_pins";
+ pinctrl-0 = <0xc0>;
+ phandle = <0x14f>;
+
+ heartbeat {
+ label = "blue:heartbeat";
+ gpios = <0x5c 0x11 0x00>;
+ linux,default-trigger = "heartbeat";
+ };
+ };
+
+ motor-control {
+ compatible = "gpio-motor";
+ motor-gpios = <0x66 0x15 0x00>;
+ default-state = "disabled";
+ pinctrl-names = "default";
+ pinctrl-0 = <0xc1>;
+ status = "okay";
+ phandle = <0x150>;
+ };
+
+ backlight {
+ compatible = "pwm-backlight";
+ pwms = <0xc2 0x00 0x9c40 0x00>;
+ brightness-levels = <0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f 0x20 0x21 0x22 0x23 0x24 0x25 0x26 0x27 0x28 0x29 0x2a 0x2b 0x2c 0x2d 0x2e 0x2f 0x30 0x31 0x32 0x33 0x34 0x35 0x36 0x37 0x38 0x39 0x3a 0x3b 0x3c 0x3d 0x3e 0x3f 0x40 0x41 0x42 0x43 0x44 0x45 0x46 0x47 0x48 0x49 0x4a 0x4b 0x4c 0x4d 0x4e 0x4f 0x50 0x51 0x52 0x53 0x54 0x55 0x56 0x57 0x58 0x59 0x5a 0x5b 0x5c 0x5d 0x5e 0x5f 0x60 0x61 0x62 0x63 0x64 0x65 0x66 0x67 0x68 0x69 0x6a 0x6b 0x6c 0x6d 0x6e 0x6f 0x70 0x71 0x72 0x73 0x74 0x75 0x76 0x77 0x78 0x79 0x7a 0x7b 0x7c 0x7d 0x7e 0x7f 0x80 0x81 0x82 0x83 0x84 0x85 0x86 0x87 0x88 0x89 0x8a 0x8b 0x8c 0x8d 0x8e 0x8f 0x90 0x91 0x92 0x93 0x94 0x95 0x96 0x97 0x98 0x99 0x9a 0x9b 0x9c 0x9d 0x9e 0x9f 0xa0>;
+ default-brightness-level = <0x50>;
+ power-supply = <0xc3>;
+ phandle = <0x9d>;
+ };
+
+ rk817-sound {
+ compatible = "simple-audio-card";
+ simple-audio-card,format = "i2s";
+ simple-audio-card,name = "rockchip,rk817-codec";
+ simple-audio-card,mclk-fs = <0x100>;
+ simple-audio-card,widgets = "Microphone\0Mic Jack\0Headphone\0Headphone Jack";
+ simple-audio-card,routing = "MIC_IN\0Mic Jack\0Headphone Jack\0HPOL\0Headphone Jack\0HPOR";
+ simple-audio-card,hp-det-gpio = <0x66 0x16 0x01>;
+ simple-audio-card,codec-hp-det = <0x01>;
+
+ simple-audio-card,cpu {
+ sound-dai = <0xc4>;
+ };
+
+ simple-audio-card,codec {
+ sound-dai = <0xc5>;
+ };
+ };
+
+ vccsys {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v8_sys";
+ regulator-always-on;
+ regulator-min-microvolt = <0x39fbc0>;
+ regulator-max-microvolt = <0x39fbc0>;
+ phandle = <0x64>;
+ };
+
+ __symbols__ {
+ ddr_timing = "/ddr_timing";
+ cpu0 = "/cpus/cpu@0";
+ cpu1 = "/cpus/cpu@1";
+ cpu2 = "/cpus/cpu@2";
+ cpu3 = "/cpus/cpu@3";
+ CPU_SLEEP = "/cpus/idle-states/cpu-sleep";
+ CLUSTER_SLEEP = "/cpus/idle-states/cluster-sleep";
+ cpu0_opp_table = "/cpu0-opp-table";
+ bus_soc = "/bus-soc";
+ bus_apll = "/bus-apll";
+ bus_apll_opp_table = "/bus-apll-opp-table";
+ display_subsystem = "/display-subsystem";
+ route_lvds = "/display-subsystem/route/route-lvds";
+ route_dsi = "/display-subsystem/route/route-dsi";
+ route_rgb = "/display-subsystem/route/route-rgb";
+ gmac_clkin = "/external-gmac-clock";
+ rockchip_suspend = "/rockchip-suspend";
+ xin24m = "/xin24m";
+ xin32k = "/xin32k";
+ pmu = "/power-management@ff000000";
+ power = "/power-management@ff000000/power-controller";
+ pmugrf = "/syscon@ff010000";
+ pmu_io_domains = "/syscon@ff010000/io-domains";
+ pmu_pvtm = "/syscon@ff010000/pmu-pvtm";
+ uart0 = "/serial@ff030000";
+ i2s0_8ch = "/i2s@ff060000";
+ i2s1_2ch = "/i2s@ff070000";
+ i2s2_2ch = "/i2s@ff080000";
+ pdm = "/pdm@ff0a0000";
+ crypto = "/crypto@ff0b0000";
+ rng = "/rng@ff0b0000";
+ gic = "/interrupt-controller@ff131000";
+ grf = "/syscon@ff140000";
+ io_domains = "/syscon@ff140000/io-domains";
+ lvds = "/syscon@ff140000/lvds";
+ lvds_in_vopb = "/syscon@ff140000/lvds/ports/port@0/endpoint@0";
+ rgb = "/syscon@ff140000/rgb";
+ rgb_in_vopb = "/syscon@ff140000/rgb/ports/port@0/endpoint@0";
+ core_grf = "/syscon@ff148000";
+ pvtm = "/syscon@ff148000/pvtm";
+ uart1 = "/serial@ff158000";
+ uart2 = "/serial@ff160000";
+ uart3 = "/serial@ff168000";
+ uart4 = "/serial@ff170000";
+ uart5 = "/serial@ff178000";
+ i2c0 = "/i2c@ff180000";
+ rk817 = "/i2c@ff180000/pmic@20";
+ pinctrl_rk8xx = "/i2c@ff180000/pmic@20/pinctrl_rk8xx";
+ rk817_ts_gpio1 = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_ts_gpio1";
+ rk817_gt_gpio2 = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_gt_gpio2";
+ rk817_pin_ts = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_pin_ts";
+ rk817_pin_gt = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_pin_gt";
+ rk817_slppin_null = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_slppin_null";
+ rk817_slppin_slp = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_slppin_slp";
+ rk817_slppin_pwrdn = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_slppin_pwrdn";
+ rk817_slppin_rst = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_slppin_rst";
+ vdd_logic = "/i2c@ff180000/pmic@20/regulators/DCDC_REG1";
+ vdd_arm = "/i2c@ff180000/pmic@20/regulators/DCDC_REG2";
+ vcc_ddr = "/i2c@ff180000/pmic@20/regulators/DCDC_REG3";
+ vcc_3v3 = "/i2c@ff180000/pmic@20/regulators/DCDC_REG4";
+ vcc_1v0 = "/i2c@ff180000/pmic@20/regulators/LDO_REG1";
+ vcc1v8_soc = "/i2c@ff180000/pmic@20/regulators/LDO_REG2";
+ vdd1v0_soc = "/i2c@ff180000/pmic@20/regulators/LDO_REG3";
+ vcc3v3_pmu = "/i2c@ff180000/pmic@20/regulators/LDO_REG4";
+ vccio_sd = "/i2c@ff180000/pmic@20/regulators/LDO_REG5";
+ vcc_sd = "/i2c@ff180000/pmic@20/regulators/LDO_REG6";
+ vcc_backlight = "/i2c@ff180000/pmic@20/regulators/LDO_REG7";
+ vcc_lcd = "/i2c@ff180000/pmic@20/regulators/LDO_REG8";
+ dcdc_boost = "/i2c@ff180000/pmic@20/regulators/BOOST";
+ otg_switch = "/i2c@ff180000/pmic@20/regulators/OTG_SWITCH";
+ rk817_codec = "/i2c@ff180000/pmic@20/codec";
+ i2c1 = "/i2c@ff190000";
+ i2c2 = "/i2c@ff1a0000";
+ i2c3 = "/i2c@ff1b0000";
+ spi0 = "/spi@ff1d0000";
+ spi1 = "/spi@ff1d8000";
+ wdt = "/watchdog@ff1e0000";
+ pwm0 = "/pwm@ff200000";
+ pwm1 = "/pwm@ff200010";
+ pwm2 = "/pwm@ff200020";
+ pwm3 = "/pwm@ff200030";
+ pwm4 = "/pwm@ff208000";
+ pwm5 = "/pwm@ff208010";
+ pwm6 = "/pwm@ff208020";
+ pwm7 = "/pwm@ff208030";
+ rktimer = "/rktimer@ff210000";
+ dmac = "/amba/dmac@ff240000";
+ thermal_zones = "/thermal-zones";
+ soc_thermal = "/thermal-zones/soc-thermal";
+ threshold = "/thermal-zones/soc-thermal/trips/trip-point-0";
+ target = "/thermal-zones/soc-thermal/trips/trip-point-1";
+ soc_crit = "/thermal-zones/soc-thermal/trips/soc-crit";
+ gpu_thermal = "/thermal-zones/gpu-thermal";
+ tsadc = "/tsadc@ff280000";
+ saradc = "/saradc@ff288000";
+ otp = "/otp@ff290000";
+ otp_id = "/otp@ff290000/id@7";
+ cpu_leakage = "/otp@ff290000/cpu-leakage@17";
+ performance = "/otp@ff290000/performance@1e";
+ cru = "/clock-controller@ff2b0000";
+ cpu_boost = "/cpu-boost@ff2b8000";
+ pmucru = "/pmu-clock-controller@ff2bc000";
+ usb2phy_grf = "/syscon@ff2c0000";
+ u2phy = "/syscon@ff2c0000/usb2-phy@100";
+ u2phy_host = "/syscon@ff2c0000/usb2-phy@100/host-port";
+ u2phy_otg = "/syscon@ff2c0000/usb2-phy@100/otg-port";
+ video_phy = "/video-phy@ff2e0000";
+ mipi_dphy_rx0 = "/mipi-dphy-rx0@ff2f0000";
+ usb20_otg = "/usb@ff300000";
+ usb_host0_ehci = "/usb@ff340000";
+ usb_host0_ohci = "/usb@ff350000";
+ gmac = "/ethernet@ff360000";
+ sdmmc = "/dwmmc@ff370000";
+ sdio = "/dwmmc@ff380000";
+ emmc = "/dwmmc@ff390000";
+ nandc0 = "/nandc@ff3b0000";
+ sfc = "/sfc@ff3a0000";
+ gpu = "/gpu@ff400000";
+ gpu_opp_table = "/gpu-opp-table";
+ hevc = "/hevc_service@ff440000";
+ vpu = "/vpu_service@ff442000";
+ vpu_combo = "/vpu_combo";
+ hevc_mmu = "/iommu@ff440440";
+ vpu_mmu = "/iommu@ff442800";
+ dsi = "/dsi@ff450000";
+ dsi_in_vopb = "/dsi@ff450000/ports/port@0/endpoint@0";
+ timing0 = "/dsi@ff450000/panel@0/display-timings/60Hz";
+ vopb = "/vop@ff460000";
+ vopb_out = "/vop@ff460000/port";
+ vopb_out_lvds = "/vop@ff460000/port/endpoint@0";
+ vopb_out_dsi = "/vop@ff460000/port/endpoint@1";
+ vopb_out_rgb = "/vop@ff460000/port/endpoint@2";
+ vopb_mmu = "/iommu@ff460f00";
+ rk_rga = "/rk_rga@ff480000";
+ cif = "/cif@ff490000";
+ cif_new = "/cif-new@ff490000";
+ vip_mmu = "/iommu@ff490800";
+ rk_isp = "/rk_isp@ff4a0000";
+ rkisp1 = "/rkisp1@ff4a0000";
+ isp_mmu = "/iommu@ff4a8000";
+ qos_gmac = "/qos@ff518000";
+ qos_gpu = "/qos@ff520000";
+ qos_sdmmc = "/qos@ff52c000";
+ qos_emmc = "/qos@ff538000";
+ qos_nand = "/qos@ff538080";
+ qos_sdio = "/qos@ff538100";
+ qos_sfc = "/qos@ff538180";
+ qos_usb_host = "/qos@ff540000";
+ qos_usb_otg = "/qos@ff540080";
+ qos_isp_128 = "/qos@ff548000";
+ qos_isp_rd = "/qos@ff548080";
+ qos_isp_wr = "/qos@ff548100";
+ qos_isp_m1 = "/qos@ff548180";
+ qos_vip = "/qos@ff548200";
+ qos_rga_rd = "/qos@ff550000";
+ qos_rga_wr = "/qos@ff550080";
+ qos_vop_m0 = "/qos@ff550100";
+ qos_vop_m1 = "/qos@ff550180";
+ qos_vpu = "/qos@ff558000";
+ qos_vpu_r128 = "/qos@ff558080";
+ dfi = "/dfi@ff610000";
+ dmc = "/dmc";
+ ddr_power_model = "/dmc/ddr_power_model";
+ dmc_opp_table = "/dmc-opp-table";
+ rockchip_system_monitor = "/rockchip-system-monitor";
+ pinctrl = "/pinctrl";
+ gpio0 = "/pinctrl/gpio0@ff040000";
+ gpio1 = "/pinctrl/gpio1@ff250000";
+ gpio2 = "/pinctrl/gpio2@ff260000";
+ gpio3 = "/pinctrl/gpio3@ff270000";
+ pcfg_pull_up = "/pinctrl/pcfg-pull-up";
+ pcfg_pull_down = "/pinctrl/pcfg-pull-down";
+ pcfg_pull_none = "/pinctrl/pcfg-pull-none";
+ pcfg_pull_none_2ma = "/pinctrl/pcfg-pull-none-2ma";
+ pcfg_pull_up_2ma = "/pinctrl/pcfg-pull-up-2ma";
+ pcfg_pull_up_4ma = "/pinctrl/pcfg-pull-up-4ma";
+ pcfg_pull_none_4ma = "/pinctrl/pcfg-pull-none-4ma";
+ pcfg_pull_down_4ma = "/pinctrl/pcfg-pull-down-4ma";
+ pcfg_pull_none_8ma = "/pinctrl/pcfg-pull-none-8ma";
+ pcfg_pull_up_8ma = "/pinctrl/pcfg-pull-up-8ma";
+ pcfg_pull_none_12ma = "/pinctrl/pcfg-pull-none-12ma";
+ pcfg_pull_up_12ma = "/pinctrl/pcfg-pull-up-12ma";
+ pcfg_pull_none_smt = "/pinctrl/pcfg-pull-none-smt";
+ pcfg_output_high = "/pinctrl/pcfg-output-high";
+ pcfg_output_low = "/pinctrl/pcfg-output-low";
+ pcfg_input_high = "/pinctrl/pcfg-input-high";
+ pcfg_input = "/pinctrl/pcfg-input";
+ i2c0_xfer = "/pinctrl/i2c0/i2c0-xfer";
+ i2c1_xfer = "/pinctrl/i2c1/i2c1-xfer";
+ i2c2_xfer = "/pinctrl/i2c2/i2c2-xfer";
+ i2c3_xfer = "/pinctrl/i2c3/i2c3-xfer";
+ tsadc_otp_gpio = "/pinctrl/tsadc/tsadc-otp-gpio";
+ tsadc_otp_out = "/pinctrl/tsadc/tsadc-otp-out";
+ uart0_xfer = "/pinctrl/uart0/uart0-xfer";
+ uart0_cts = "/pinctrl/uart0/uart0-cts";
+ uart0_rts = "/pinctrl/uart0/uart0-rts";
+ uart0_rts_gpio = "/pinctrl/uart0/uart0-rts-gpio";
+ uart1_xfer = "/pinctrl/uart1/uart1-xfer";
+ uart1_cts = "/pinctrl/uart1/uart1-cts";
+ uart1_rts = "/pinctrl/uart1/uart1-rts";
+ uart1_rts_gpio = "/pinctrl/uart1/uart1-rts-gpio";
+ uart2m0_xfer = "/pinctrl/uart2-m0/uart2m0-xfer";
+ uart2m1_xfer = "/pinctrl/uart2-m1/uart2m1-xfer";
+ uart3m0_xfer = "/pinctrl/uart3-m0/uart3m0-xfer";
+ uart3m0_cts = "/pinctrl/uart3-m0/uart3m0-cts";
+ uart3m0_rts = "/pinctrl/uart3-m0/uart3m0-rts";
+ uart3m0_rts_gpio = "/pinctrl/uart3-m0/uart3m0-rts-gpio";
+ uart3m1_xfer = "/pinctrl/uart3-m1/uart3m1-xfer";
+ uart3m1_cts = "/pinctrl/uart3-m1/uart3m1-cts";
+ uart3m1_rts = "/pinctrl/uart3-m1/uart3m1-rts";
+ uart3m1_rts_gpio = "/pinctrl/uart3-m1/uart3m1-rts-gpio";
+ uart4_xfer = "/pinctrl/uart4/uart4-xfer";
+ uart4_cts = "/pinctrl/uart4/uart4-cts";
+ uart4_rts = "/pinctrl/uart4/uart4-rts";
+ uart5_xfer = "/pinctrl/uart5/uart5-xfer";
+ uart5_cts = "/pinctrl/uart5/uart5-cts";
+ uart5_rts = "/pinctrl/uart5/uart5-rts";
+ spi0_clk = "/pinctrl/spi0/spi0-clk";
+ spi0_csn = "/pinctrl/spi0/spi0-csn";
+ spi0_miso = "/pinctrl/spi0/spi0-miso";
+ spi0_mosi = "/pinctrl/spi0/spi0-mosi";
+ spi0_clk_hs = "/pinctrl/spi0/spi0-clk-hs";
+ spi0_miso_hs = "/pinctrl/spi0/spi0-miso-hs";
+ spi0_mosi_hs = "/pinctrl/spi0/spi0-mosi-hs";
+ spi1_clk = "/pinctrl/spi1/spi1-clk";
+ spi1_csn0 = "/pinctrl/spi1/spi1-csn0";
+ spi1_csn1 = "/pinctrl/spi1/spi1-csn1";
+ spi1_miso = "/pinctrl/spi1/spi1-miso";
+ spi1_mosi = "/pinctrl/spi1/spi1-mosi";
+ spi1_clk_hs = "/pinctrl/spi1/spi1-clk-hs";
+ spi1_miso_hs = "/pinctrl/spi1/spi1-miso-hs";
+ spi1_mosi_hs = "/pinctrl/spi1/spi1-mosi-hs";
+ pdm_clk0m0 = "/pinctrl/pdm/pdm-clk0m0";
+ pdm_clk0m1 = "/pinctrl/pdm/pdm-clk0m1";
+ pdm_clk1 = "/pinctrl/pdm/pdm-clk1";
+ pdm_sdi0m0 = "/pinctrl/pdm/pdm-sdi0m0";
+ pdm_sdi0m1 = "/pinctrl/pdm/pdm-sdi0m1";
+ pdm_sdi1 = "/pinctrl/pdm/pdm-sdi1";
+ pdm_sdi2 = "/pinctrl/pdm/pdm-sdi2";
+ pdm_sdi3 = "/pinctrl/pdm/pdm-sdi3";
+ pdm_clk0m0_sleep = "/pinctrl/pdm/pdm-clk0m0-sleep";
+ pdm_clk0m_sleep1 = "/pinctrl/pdm/pdm-clk0m1-sleep";
+ pdm_clk1_sleep = "/pinctrl/pdm/pdm-clk1-sleep";
+ pdm_sdi0m0_sleep = "/pinctrl/pdm/pdm-sdi0m0-sleep";
+ pdm_sdi0m1_sleep = "/pinctrl/pdm/pdm-sdi0m1-sleep";
+ pdm_sdi1_sleep = "/pinctrl/pdm/pdm-sdi1-sleep";
+ pdm_sdi2_sleep = "/pinctrl/pdm/pdm-sdi2-sleep";
+ pdm_sdi3_sleep = "/pinctrl/pdm/pdm-sdi3-sleep";
+ i2s0_8ch_mclk = "/pinctrl/i2s0/i2s0-8ch-mclk";
+ i2s0_8ch_sclktx = "/pinctrl/i2s0/i2s0-8ch-sclktx";
+ i2s0_8ch_sclkrx = "/pinctrl/i2s0/i2s0-8ch-sclkrx";
+ i2s0_8ch_lrcktx = "/pinctrl/i2s0/i2s0-8ch-lrcktx";
+ i2s0_8ch_lrckrx = "/pinctrl/i2s0/i2s0-8ch-lrckrx";
+ i2s0_8ch_sdo0 = "/pinctrl/i2s0/i2s0-8ch-sdo0";
+ i2s0_8ch_sdo1 = "/pinctrl/i2s0/i2s0-8ch-sdo1";
+ i2s0_8ch_sdo2 = "/pinctrl/i2s0/i2s0-8ch-sdo2";
+ i2s0_8ch_sdo3 = "/pinctrl/i2s0/i2s0-8ch-sdo3";
+ i2s0_8ch_sdi0 = "/pinctrl/i2s0/i2s0-8ch-sdi0";
+ i2s0_8ch_sdi1 = "/pinctrl/i2s0/i2s0-8ch-sdi1";
+ i2s0_8ch_sdi2 = "/pinctrl/i2s0/i2s0-8ch-sdi2";
+ i2s0_8ch_sdi3 = "/pinctrl/i2s0/i2s0-8ch-sdi3";
+ i2s1_2ch_mclk = "/pinctrl/i2s1/i2s1-2ch-mclk";
+ i2s1_2ch_sclk = "/pinctrl/i2s1/i2s1-2ch-sclk";
+ i2s1_2ch_lrck = "/pinctrl/i2s1/i2s1-2ch-lrck";
+ i2s1_2ch_sdi = "/pinctrl/i2s1/i2s1-2ch-sdi";
+ i2s1_2ch_sdo = "/pinctrl/i2s1/i2s1-2ch-sdo";
+ i2s2_2ch_mclk = "/pinctrl/i2s2/i2s2-2ch-mclk";
+ i2s2_2ch_sclk = "/pinctrl/i2s2/i2s2-2ch-sclk";
+ i2s2_2ch_lrck = "/pinctrl/i2s2/i2s2-2ch-lrck";
+ i2s2_2ch_sdi = "/pinctrl/i2s2/i2s2-2ch-sdi";
+ i2s2_2ch_sdo = "/pinctrl/i2s2/i2s2-2ch-sdo";
+ sdmmc_clk = "/pinctrl/sdmmc/sdmmc-clk";
+ sdmmc_cmd = "/pinctrl/sdmmc/sdmmc-cmd";
+ sdmmc_det = "/pinctrl/sdmmc/sdmmc-det";
+ sdmmc_bus1 = "/pinctrl/sdmmc/sdmmc-bus1";
+ sdmmc_bus4 = "/pinctrl/sdmmc/sdmmc-bus4";
+ sdmmc_gpio = "/pinctrl/sdmmc/sdmmc-gpio";
+ sdio_clk = "/pinctrl/sdio/sdio-clk";
+ sdio_cmd = "/pinctrl/sdio/sdio-cmd";
+ sdio_bus4 = "/pinctrl/sdio/sdio-bus4";
+ sdio_gpio = "/pinctrl/sdio/sdio-gpio";
+ emmc_clk = "/pinctrl/emmc/emmc-clk";
+ emmc_cmd = "/pinctrl/emmc/emmc-cmd";
+ emmc_pwren = "/pinctrl/emmc/emmc-pwren";
+ emmc_rstnout = "/pinctrl/emmc/emmc-rstnout";
+ emmc_bus1 = "/pinctrl/emmc/emmc-bus1";
+ emmc_bus4 = "/pinctrl/emmc/emmc-bus4";
+ emmc_bus8 = "/pinctrl/emmc/emmc-bus8";
+ flash_cs0 = "/pinctrl/flash/flash-cs0";
+ flash_rdy = "/pinctrl/flash/flash-rdy";
+ flash_dqs = "/pinctrl/flash/flash-dqs";
+ flash_ale = "/pinctrl/flash/flash-ale";
+ flash_cle = "/pinctrl/flash/flash-cle";
+ flash_wrn = "/pinctrl/flash/flash-wrn";
+ flash_csl = "/pinctrl/flash/flash-csl";
+ flash_rdn = "/pinctrl/flash/flash-rdn";
+ flash_bus8 = "/pinctrl/flash/flash-bus8";
+ lcdc_m0_rgb_pins = "/pinctrl/lcdc/lcdc-m0-rgb-pins";
+ lcdc_m0_sleep_pins = "/pinctrl/lcdc/lcdc-m0-sleep-pins";
+ lcdc_m1_rgb_pins = "/pinctrl/lcdc/lcdc-m1-rgb-pins";
+ lcdc_m1_sleep_pins = "/pinctrl/lcdc/lcdc-m1-sleep-pins";
+ pwm0_pin = "/pinctrl/pwm0/pwm0-pin";
+ pwm1_pin = "/pinctrl/pwm1/pwm1-pin";
+ pwm2_pin = "/pinctrl/pwm2/pwm2-pin";
+ pwm3_pin = "/pinctrl/pwm3/pwm3-pin";
+ pwm4_pin = "/pinctrl/pwm4/pwm4-pin";
+ pwm5_pin = "/pinctrl/pwm5/pwm5-pin";
+ pwm6_pin = "/pinctrl/pwm6/pwm6-pin";
+ pwm7_pin = "/pinctrl/pwm7/pwm7-pin";
+ rmii_pins = "/pinctrl/gmac/rmii-pins";
+ mac_refclk_12ma = "/pinctrl/gmac/mac-refclk-12ma";
+ mac_refclk = "/pinctrl/gmac/mac-refclk";
+ cif_clkout_m0 = "/pinctrl/cif-m0/cif-clkout-m0";
+ dvp_d2d9_m0 = "/pinctrl/cif-m0/dvp-d2d9-m0";
+ dvp_d0d1_m0 = "/pinctrl/cif-m0/dvp-d0d1-m0";
+ dvp_d10d11_m0 = "/pinctrl/cif-m0/d10-d11-m0";
+ cif_clkout_m1 = "/pinctrl/cif-m1/cif-clkout-m1";
+ dvp_d2d9_m1 = "/pinctrl/cif-m1/dvp-d2d9-m1";
+ dvp_d0d1_m1 = "/pinctrl/cif-m1/dvp-d0d1-m1";
+ dvp_d10d11_m1 = "/pinctrl/cif-m1/d10-d11-m1";
+ isp_prelight = "/pinctrl/isp/isp-prelight";
+ pmic_int = "/pinctrl/pmic/pmic_int";
+ soc_slppin_gpio = "/pinctrl/pmic/soc_slppin_gpio";
+ soc_slppin_slp = "/pinctrl/pmic/soc_slppin_slp";
+ soc_slppin_rst = "/pinctrl/pmic/soc_slppin_rst";
+ led_pins = "/pinctrl/leds/led-pins";
+ motor_pin = "/pinctrl/motor/motor-pin";
+ btn_pins = "/pinctrl/btns/btn-pins";
+ drm_logo = "/reserved-memory/drm-logo@00000000";
+ ramoops_mem = "/reserved-memory/region@110000";
+ gpio_keys = "/odroidgo3-keys";
+ joypad = "/odroidgo3-joypad";
+ leds = "/gpio_leds";
+ motor = "/motor-control";
+ backlight = "/backlight";
+ vccsys = "/vccsys";
+ };
+};
diff --git a/config/archr-dts/R36S-DTB/DTS/RGB20S.dts b/config/archr-dts/R36S-DTB/DTS/RGB20S.dts
new file mode 100644
index 0000000000..053f31bcc2
--- /dev/null
+++ b/config/archr-dts/R36S-DTB/DTS/RGB20S.dts
@@ -0,0 +1,4053 @@
+/dts-v1/;
+
+/ {
+ compatible = "rockchip,rk3326-odroidgo3-linux\0rockchip,rk3326";
+ interrupt-parent = <0x01>;
+ #address-cells = <0x02>;
+ #size-cells = <0x02>;
+ model = "Hardkernel ODROID-GO3";
+
+ ddr_timing {
+ compatible = "rockchip,ddr-timing";
+ ddr2_speed_bin = <0x00>;
+ ddr3_speed_bin = <0x15>;
+ ddr4_speed_bin = <0x0c>;
+ pd_idle = <0x0d>;
+ sr_idle = <0x5d>;
+ sr_mc_gate_idle = <0x00>;
+ srpd_lite_idle = <0x00>;
+ standby_idle = <0x00>;
+ auto_pd_dis_freq = <0x42a>;
+ auto_sr_dis_freq = <0x320>;
+ ddr2_dll_dis_freq = <0x12c>;
+ ddr3_dll_dis_freq = <0x12c>;
+ ddr4_dll_dis_freq = <0x271>;
+ phy_dll_dis_freq = <0x190>;
+ ddr2_odt_dis_freq = <0x64>;
+ phy_ddr2_odt_dis_freq = <0x64>;
+ ddr2_drv = <0x01>;
+ ddr2_odt = <0x96>;
+ phy_ddr2_ca_drv = <0x15>;
+ phy_ddr2_ck_drv = <0x12>;
+ phy_ddr2_dq_drv = <0x15>;
+ phy_ddr2_odt = <0x02>;
+ ddr3_odt_dis_freq = <0x190>;
+ phy_ddr3_odt_dis_freq = <0x190>;
+ ddr3_drv = <0x28>;
+ ddr3_odt = <0x78>;
+ phy_ddr3_ca_drv = <0x15>;
+ phy_ddr3_ck_drv = <0x12>;
+ phy_ddr3_dq_drv = <0x15>;
+ phy_ddr3_odt = <0x02>;
+ phy_lpddr2_odt_dis_freq = <0x29a>;
+ lpddr2_drv = <0x28>;
+ phy_lpddr2_ca_drv = <0x16>;
+ phy_lpddr2_ck_drv = <0x13>;
+ phy_lpddr2_dq_drv = <0x16>;
+ phy_lpddr2_odt = <0x00>;
+ lpddr3_odt_dis_freq = <0x190>;
+ phy_lpddr3_odt_dis_freq = <0x190>;
+ lpddr3_drv = <0x28>;
+ lpddr3_odt = <0xf0>;
+ phy_lpddr3_ca_drv = <0x16>;
+ phy_lpddr3_ck_drv = <0x13>;
+ phy_lpddr3_dq_drv = <0x16>;
+ phy_lpddr3_odt = <0x02>;
+ lpddr4_odt_dis_freq = <0x320>;
+ phy_lpddr4_odt_dis_freq = <0x320>;
+ lpddr4_drv = <0x3c>;
+ lpddr4_dq_odt = <0x28>;
+ lpddr4_ca_odt = <0x28>;
+ phy_lpddr4_ca_drv = <0x14>;
+ phy_lpddr4_ck_cs_drv = <0x06>;
+ phy_lpddr4_dq_drv = <0x06>;
+ phy_lpddr4_odt = <0x10>;
+ ddr4_odt_dis_freq = <0x29a>;
+ phy_ddr4_odt_dis_freq = <0x29a>;
+ ddr4_drv = <0x22>;
+ ddr4_odt = <0xf0>;
+ phy_ddr4_ca_drv = <0x16>;
+ phy_ddr4_ck_drv = <0x13>;
+ phy_ddr4_dq_drv = <0x16>;
+ phy_ddr4_odt = <0x02>;
+ ddr3a1_ddr4a9_de-skew = <0x06>;
+ ddr3a0_ddr4a10_de-skew = <0x07>;
+ ddr3a3_ddr4a6_de-skew = <0x07>;
+ ddr3a2_ddr4a4_de-skew = <0x07>;
+ ddr3a5_ddr4a8_de-skew = <0x07>;
+ ddr3a4_ddr4a5_de-skew = <0x07>;
+ ddr3a7_ddr4a11_de-skew = <0x07>;
+ ddr3a6_ddr4a7_de-skew = <0x06>;
+ ddr3a9_ddr4a0_de-skew = <0x07>;
+ ddr3a8_ddr4a13_de-skew = <0x07>;
+ ddr3a11_ddr4a3_de-skew = <0x07>;
+ ddr3a10_ddr4cs0_de-skew = <0x07>;
+ ddr3a13_ddr4a2_de-skew = <0x07>;
+ ddr3a12_ddr4ba1_de-skew = <0x07>;
+ ddr3a15_ddr4odt0_de-skew = <0x07>;
+ ddr3a14_ddr4a1_de-skew = <0x07>;
+ ddr3ba1_ddr4a15_de-skew = <0x07>;
+ ddr3ba0_ddr4bg0_de-skew = <0x07>;
+ ddr3ras_ddr4cke_de-skew = <0x07>;
+ ddr3ba2_ddr4ba0_de-skew = <0x07>;
+ ddr3we_ddr4bg1_de-skew = <0x07>;
+ ddr3cas_ddr4a12_de-skew = <0x07>;
+ ddr3ckn_ddr4ckn_de-skew = <0x07>;
+ ddr3ckp_ddr4ckp_de-skew = <0x07>;
+ ddr3cke_ddr4a16_de-skew = <0x07>;
+ ddr3odt0_ddr4a14_de-skew = <0x07>;
+ ddr3cs0_ddr4act_de-skew = <0x06>;
+ ddr3reset_ddr4reset_de-skew = <0x07>;
+ ddr3cs1_ddr4cs1_de-skew = <0x06>;
+ ddr3odt1_ddr4odt1_de-skew = <0x07>;
+ cs0_dm0_rx_de-skew = <0x07>;
+ cs0_dm0_tx_de-skew = <0x07>;
+ cs0_dq0_rx_de-skew = <0x08>;
+ cs0_dq0_tx_de-skew = <0x08>;
+ cs0_dq1_rx_de-skew = <0x09>;
+ cs0_dq1_tx_de-skew = <0x08>;
+ cs0_dq2_rx_de-skew = <0x08>;
+ cs0_dq2_tx_de-skew = <0x08>;
+ cs0_dq3_rx_de-skew = <0x08>;
+ cs0_dq3_tx_de-skew = <0x08>;
+ cs0_dq4_rx_de-skew = <0x09>;
+ cs0_dq4_tx_de-skew = <0x08>;
+ cs0_dq5_rx_de-skew = <0x09>;
+ cs0_dq5_tx_de-skew = <0x08>;
+ cs0_dq6_rx_de-skew = <0x09>;
+ cs0_dq6_tx_de-skew = <0x08>;
+ cs0_dq7_rx_de-skew = <0x08>;
+ cs0_dq7_tx_de-skew = <0x08>;
+ cs0_dqs0_rx_de-skew = <0x06>;
+ cs0_dqs0p_tx_de-skew = <0x09>;
+ cs0_dqs0n_tx_de-skew = <0x09>;
+ cs0_dm1_rx_de-skew = <0x07>;
+ cs0_dm1_tx_de-skew = <0x06>;
+ cs0_dq8_rx_de-skew = <0x08>;
+ cs0_dq8_tx_de-skew = <0x07>;
+ cs0_dq9_rx_de-skew = <0x09>;
+ cs0_dq9_tx_de-skew = <0x07>;
+ cs0_dq10_rx_de-skew = <0x08>;
+ cs0_dq10_tx_de-skew = <0x08>;
+ cs0_dq11_rx_de-skew = <0x08>;
+ cs0_dq11_tx_de-skew = <0x07>;
+ cs0_dq12_rx_de-skew = <0x08>;
+ cs0_dq12_tx_de-skew = <0x08>;
+ cs0_dq13_rx_de-skew = <0x09>;
+ cs0_dq13_tx_de-skew = <0x07>;
+ cs0_dq14_rx_de-skew = <0x09>;
+ cs0_dq14_tx_de-skew = <0x08>;
+ cs0_dq15_rx_de-skew = <0x09>;
+ cs0_dq15_tx_de-skew = <0x07>;
+ cs0_dqs1_rx_de-skew = <0x07>;
+ cs0_dqs1p_tx_de-skew = <0x09>;
+ cs0_dqs1n_tx_de-skew = <0x09>;
+ cs0_dm2_rx_de-skew = <0x07>;
+ cs0_dm2_tx_de-skew = <0x07>;
+ cs0_dq16_rx_de-skew = <0x09>;
+ cs0_dq16_tx_de-skew = <0x09>;
+ cs0_dq17_rx_de-skew = <0x07>;
+ cs0_dq17_tx_de-skew = <0x09>;
+ cs0_dq18_rx_de-skew = <0x07>;
+ cs0_dq18_tx_de-skew = <0x08>;
+ cs0_dq19_rx_de-skew = <0x07>;
+ cs0_dq19_tx_de-skew = <0x09>;
+ cs0_dq20_rx_de-skew = <0x09>;
+ cs0_dq20_tx_de-skew = <0x09>;
+ cs0_dq21_rx_de-skew = <0x09>;
+ cs0_dq21_tx_de-skew = <0x09>;
+ cs0_dq22_rx_de-skew = <0x08>;
+ cs0_dq22_tx_de-skew = <0x09>;
+ cs0_dq23_rx_de-skew = <0x08>;
+ cs0_dq23_tx_de-skew = <0x09>;
+ cs0_dqs2_rx_de-skew = <0x06>;
+ cs0_dqs2p_tx_de-skew = <0x09>;
+ cs0_dqs2n_tx_de-skew = <0x09>;
+ cs0_dm3_rx_de-skew = <0x07>;
+ cs0_dm3_tx_de-skew = <0x07>;
+ cs0_dq24_rx_de-skew = <0x08>;
+ cs0_dq24_tx_de-skew = <0x08>;
+ cs0_dq25_rx_de-skew = <0x09>;
+ cs0_dq25_tx_de-skew = <0x09>;
+ cs0_dq26_rx_de-skew = <0x09>;
+ cs0_dq26_tx_de-skew = <0x08>;
+ cs0_dq27_rx_de-skew = <0x09>;
+ cs0_dq27_tx_de-skew = <0x08>;
+ cs0_dq28_rx_de-skew = <0x09>;
+ cs0_dq28_tx_de-skew = <0x09>;
+ cs0_dq29_rx_de-skew = <0x09>;
+ cs0_dq29_tx_de-skew = <0x09>;
+ cs0_dq30_rx_de-skew = <0x08>;
+ cs0_dq30_tx_de-skew = <0x08>;
+ cs0_dq31_rx_de-skew = <0x08>;
+ cs0_dq31_tx_de-skew = <0x08>;
+ cs0_dqs3_rx_de-skew = <0x07>;
+ cs0_dqs3p_tx_de-skew = <0x09>;
+ cs0_dqs3n_tx_de-skew = <0x09>;
+ cs1_dm0_rx_de-skew = <0x07>;
+ cs1_dm0_tx_de-skew = <0x07>;
+ cs1_dq0_rx_de-skew = <0x08>;
+ cs1_dq0_tx_de-skew = <0x08>;
+ cs1_dq1_rx_de-skew = <0x09>;
+ cs1_dq1_tx_de-skew = <0x08>;
+ cs1_dq2_rx_de-skew = <0x08>;
+ cs1_dq2_tx_de-skew = <0x08>;
+ cs1_dq3_rx_de-skew = <0x08>;
+ cs1_dq3_tx_de-skew = <0x08>;
+ cs1_dq4_rx_de-skew = <0x08>;
+ cs1_dq4_tx_de-skew = <0x08>;
+ cs1_dq5_rx_de-skew = <0x09>;
+ cs1_dq5_tx_de-skew = <0x08>;
+ cs1_dq6_rx_de-skew = <0x09>;
+ cs1_dq6_tx_de-skew = <0x08>;
+ cs1_dq7_rx_de-skew = <0x08>;
+ cs1_dq7_tx_de-skew = <0x08>;
+ cs1_dqs0_rx_de-skew = <0x06>;
+ cs1_dqs0p_tx_de-skew = <0x09>;
+ cs1_dqs0n_tx_de-skew = <0x09>;
+ cs1_dm1_rx_de-skew = <0x07>;
+ cs1_dm1_tx_de-skew = <0x07>;
+ cs1_dq8_rx_de-skew = <0x08>;
+ cs1_dq8_tx_de-skew = <0x08>;
+ cs1_dq9_rx_de-skew = <0x08>;
+ cs1_dq9_tx_de-skew = <0x07>;
+ cs1_dq10_rx_de-skew = <0x07>;
+ cs1_dq10_tx_de-skew = <0x08>;
+ cs1_dq11_rx_de-skew = <0x08>;
+ cs1_dq11_tx_de-skew = <0x08>;
+ cs1_dq12_rx_de-skew = <0x08>;
+ cs1_dq12_tx_de-skew = <0x07>;
+ cs1_dq13_rx_de-skew = <0x08>;
+ cs1_dq13_tx_de-skew = <0x08>;
+ cs1_dq14_rx_de-skew = <0x08>;
+ cs1_dq14_tx_de-skew = <0x08>;
+ cs1_dq15_rx_de-skew = <0x08>;
+ cs1_dq15_tx_de-skew = <0x07>;
+ cs1_dqs1_rx_de-skew = <0x07>;
+ cs1_dqs1p_tx_de-skew = <0x09>;
+ cs1_dqs1n_tx_de-skew = <0x09>;
+ cs1_dm2_rx_de-skew = <0x07>;
+ cs1_dm2_tx_de-skew = <0x08>;
+ cs1_dq16_rx_de-skew = <0x08>;
+ cs1_dq16_tx_de-skew = <0x09>;
+ cs1_dq17_rx_de-skew = <0x08>;
+ cs1_dq17_tx_de-skew = <0x09>;
+ cs1_dq18_rx_de-skew = <0x07>;
+ cs1_dq18_tx_de-skew = <0x08>;
+ cs1_dq19_rx_de-skew = <0x08>;
+ cs1_dq19_tx_de-skew = <0x09>;
+ cs1_dq20_rx_de-skew = <0x09>;
+ cs1_dq20_tx_de-skew = <0x09>;
+ cs1_dq21_rx_de-skew = <0x09>;
+ cs1_dq21_tx_de-skew = <0x09>;
+ cs1_dq22_rx_de-skew = <0x08>;
+ cs1_dq22_tx_de-skew = <0x09>;
+ cs1_dq23_rx_de-skew = <0x08>;
+ cs1_dq23_tx_de-skew = <0x09>;
+ cs1_dqs2_rx_de-skew = <0x06>;
+ cs1_dqs2p_tx_de-skew = <0x09>;
+ cs1_dqs2n_tx_de-skew = <0x09>;
+ cs1_dm3_rx_de-skew = <0x07>;
+ cs1_dm3_tx_de-skew = <0x07>;
+ cs1_dq24_rx_de-skew = <0x08>;
+ cs1_dq24_tx_de-skew = <0x09>;
+ cs1_dq25_rx_de-skew = <0x09>;
+ cs1_dq25_tx_de-skew = <0x09>;
+ cs1_dq26_rx_de-skew = <0x09>;
+ cs1_dq26_tx_de-skew = <0x08>;
+ cs1_dq27_rx_de-skew = <0x08>;
+ cs1_dq27_tx_de-skew = <0x08>;
+ cs1_dq28_rx_de-skew = <0x09>;
+ cs1_dq28_tx_de-skew = <0x09>;
+ cs1_dq29_rx_de-skew = <0x09>;
+ cs1_dq29_tx_de-skew = <0x09>;
+ cs1_dq30_rx_de-skew = <0x09>;
+ cs1_dq30_tx_de-skew = <0x08>;
+ cs1_dq31_rx_de-skew = <0x08>;
+ cs1_dq31_tx_de-skew = <0x08>;
+ cs1_dqs3_rx_de-skew = <0x07>;
+ cs1_dqs3p_tx_de-skew = <0x09>;
+ cs1_dqs3n_tx_de-skew = <0x09>;
+ phandle = <0xaf>;
+ };
+
+ aliases {
+ ethernet0 = "/ethernet@ff360000";
+ i2c0 = "/i2c@ff180000";
+ i2c1 = "/i2c@ff190000";
+ i2c2 = "/i2c@ff1a0000";
+ i2c3 = "/i2c@ff1b0000";
+ serial0 = "/serial@ff030000";
+ serial1 = "/serial@ff158000";
+ serial2 = "/serial@ff160000";
+ serial3 = "/serial@ff168000";
+ serial4 = "/serial@ff170000";
+ serial5 = "/serial@ff178000";
+ spi0 = "/spi@ff1d0000";
+ spi1 = "/spi@ff1d8000";
+ };
+
+ cpus {
+ #address-cells = <0x02>;
+ #size-cells = <0x00>;
+
+ cpu@0 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a35\0arm,armv8";
+ reg = <0x00 0x00>;
+ enable-method = "psci";
+ clocks = <0x02 0x07>;
+ #cooling-cells = <0x02>;
+ dynamic-power-coefficient = <0x5a>;
+ operating-points-v2 = <0x03>;
+ cpu-idle-states = <0x04 0x05>;
+ cpu-supply = <0x06>;
+ phandle = <0x09>;
+ };
+
+ cpu@1 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a35\0arm,armv8";
+ reg = <0x00 0x01>;
+ enable-method = "psci";
+ operating-points-v2 = <0x03>;
+ cpu-idle-states = <0x04 0x05>;
+ phandle = <0x0a>;
+ };
+
+ cpu@2 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a35\0arm,armv8";
+ reg = <0x00 0x02>;
+ enable-method = "psci";
+ operating-points-v2 = <0x03>;
+ cpu-idle-states = <0x04 0x05>;
+ phandle = <0x0b>;
+ };
+
+ cpu@3 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a35\0arm,armv8";
+ reg = <0x00 0x03>;
+ enable-method = "psci";
+ operating-points-v2 = <0x03>;
+ cpu-idle-states = <0x04 0x05>;
+ phandle = <0x0c>;
+ };
+
+ idle-states {
+ entry-method = "psci";
+
+ cpu-sleep {
+ compatible = "arm,idle-state";
+ local-timer-stop;
+ arm,psci-suspend-param = <0x10000>;
+ entry-latency-us = <0x78>;
+ exit-latency-us = <0xfa>;
+ min-residency-us = <0x384>;
+ phandle = <0x04>;
+ };
+
+ cluster-sleep {
+ compatible = "arm,idle-state";
+ local-timer-stop;
+ arm,psci-suspend-param = <0x1010000>;
+ entry-latency-us = <0x190>;
+ exit-latency-us = <0x1f4>;
+ min-residency-us = <0x7d0>;
+ phandle = <0x05>;
+ };
+ };
+ };
+
+ cpu0-opp-table {
+ compatible = "operating-points-v2";
+ opp-shared;
+ rockchip,temp-hysteresis = <0x1388>;
+ rockchip,low-temp = <0x00>;
+ rockchip,low-temp-min-volt = <0xf4240>;
+ rockchip,low-temp-adjust-volt = <0x00 0x5e8 0xc350>;
+ clocks = <0x02 0x01>;
+ rockchip,avs-scale = <0x04>;
+ rockchip,max-volt = <0x149970>;
+ rockchip,evb-irdrop = <0x61a8>;
+ nvmem-cells = <0x07 0x08>;
+ nvmem-cell-names = "cpu_leakage\0performance";
+ rockchip,bin-scaling-sel = <0x00 0x0d 0x01 0x0d>;
+ rockchip,pvtm-voltage-sel = <0x00 0xc350 0x00 0xc351 0xd2f0 0x01 0xd2f1 0xea60 0x02 0xea61 0x1869f 0x03>;
+ rockchip,pvtm-freq = <0x639c0>;
+ rockchip,pvtm-volt = <0xf4240>;
+ rockchip,pvtm-ch = <0x00 0x00>;
+ rockchip,pvtm-sample-time = <0x3e8>;
+ rockchip,pvtm-number = <0x0a>;
+ rockchip,pvtm-error = <0x3e8>;
+ rockchip,pvtm-ref-temp = <0x28>;
+ rockchip,pvtm-temp-prop = <0xffffffc8 0xffffffc8>;
+ rockchip,thermal-zone = "soc-thermal";
+ rockchip,avs = <0x01>;
+ phandle = <0x03>;
+
+ opp-1008000000 {
+ opp-hz = <0x00 0x3c14dc00>;
+ opp-microvolt = <0x11edd8 0x11edd8 0x149970>;
+ opp-microvolt-L0 = <0x11edd8 0x11edd8 0x149970>;
+ opp-microvolt-L1 = <0x112a88 0x112a88 0x149970>;
+ opp-microvolt-L2 = <0x112a88 0x112a88 0x149970>;
+ opp-microvolt-L3 = <0x100590 0x100590 0x149970>;
+ clock-latency-ns = <0x9c40>;
+ };
+
+ opp-1200000000 {
+ opp-hz = <0x00 0x47868c00>;
+ opp-microvolt = <0x13d620 0x13d620 0x149970>;
+ opp-microvolt-L0 = <0x13d620 0x13d620 0x149970>;
+ opp-microvolt-L1 = <0x137478 0x137478 0x149970>;
+ opp-microvolt-L2 = <0x1312d0 0x1312d0 0x149970>;
+ opp-microvolt-L3 = <0x124f80 0x124f80 0x149970>;
+ clock-latency-ns = <0x9c40>;
+ };
+
+ opp-1248000000 {
+ opp-hz = <0x00 0x4a62f800>;
+ opp-microvolt = <0x149970 0x149970 0x149970>;
+ opp-microvolt-L0 = <0x149970 0x149970 0x149970>;
+ opp-microvolt-L1 = <0x13d620 0x13d620 0x149970>;
+ opp-microvolt-L2 = <0x137478 0x137478 0x149970>;
+ opp-microvolt-L3 = <0x12b128 0x12b128 0x149970>;
+ clock-latency-ns = <0x9c40>;
+ };
+
+ opp-1296000000 {
+ opp-hz = <0x00 0x4d3f6400>;
+ opp-microvolt = <0x149970 0x149970 0x149970>;
+ opp-microvolt-L0 = <0x149970 0x149970 0x149970>;
+ opp-microvolt-L1 = <0x149970 0x149970 0x149970>;
+ opp-microvolt-L2 = <0x13d620 0x13d620 0x149970>;
+ opp-microvolt-L3 = <0x1312d0 0x1312d0 0x149970>;
+ clock-latency-ns = <0x9c40>;
+ };
+ };
+
+ arm-pmu {
+ compatible = "arm,cortex-a53-pmu";
+ interrupts = <0x00 0x64 0x04 0x00 0x65 0x04 0x00 0x66 0x04 0x00 0x67 0x04>;
+ interrupt-affinity = <0x09 0x0a 0x0b 0x0c>;
+ };
+
+ bus-soc {
+ compatible = "rockchip,px30-bus";
+ rockchip,busfreq-policy = "autocs";
+ phandle = <0xc4>;
+
+ soc-bus0 {
+ bus-id = <0x00>;
+ timer-us = <0x14>;
+ enable-msk = <0x40f7>;
+ status = "disabled";
+ };
+
+ soc-bus1 {
+ bus-id = <0x01>;
+ timer-us = <0xc8>;
+ enable-msk = <0x40bf>;
+ status = "disabled";
+ };
+
+ soc-bus2 {
+ bus-id = <0x02>;
+ timer-us = <0xc8>;
+ enable-msk = <0x4007>;
+ status = "disabled";
+ };
+ };
+
+ bus-apll {
+ compatible = "rockchip,px30-bus";
+ rockchip,busfreq-policy = "clkfreq";
+ clocks = <0x02 0x01>;
+ clock-names = "bus";
+ operating-points-v2 = <0x0d>;
+ status = "okay";
+ bus-supply = <0x0e>;
+ phandle = <0xc5>;
+ };
+
+ bus-apll-opp-table {
+ compatible = "operating-points-v2";
+ opp-shared;
+ phandle = <0x0d>;
+
+ opp-1512000000 {
+ opp-hz = <0x00 0x5a1f4a00>;
+ opp-microvolt = <0xf4240>;
+ };
+
+ opp-1008000000 {
+ opp-hz = <0x00 0x3c14dc00>;
+ opp-microvolt = <0xe7ef0>;
+ };
+ };
+
+ cpuinfo {
+ compatible = "rockchip,cpuinfo";
+ nvmem-cells = <0x0f>;
+ nvmem-cell-names = "id";
+ };
+
+ display-subsystem {
+ compatible = "rockchip,display-subsystem";
+ ports = <0x10>;
+ status = "okay";
+ logo-memory-region = <0x11>;
+ phandle = <0xc6>;
+
+ route {
+
+ route-lvds {
+ status = "disabled";
+ logo,uboot = "logo.bmp";
+ logo,kernel = "logo_kernel.bmp";
+ logo,mode = "center";
+ charge_logo,mode = "center";
+ connect = <0x12>;
+ phandle = <0xc7>;
+ };
+
+ route-dsi {
+ status = "okay";
+ logo,uboot = "logo.bmp";
+ logo,kernel = "logo_kernel.bmp";
+ logo,mode = "center";
+ charge_logo,mode = "center";
+ connect = <0x13>;
+ phandle = <0xc8>;
+ };
+
+ route-rgb {
+ status = "disabled";
+ logo,uboot = "logo.bmp";
+ logo,kernel = "logo_kernel.bmp";
+ logo,mode = "center";
+ charge_logo,mode = "center";
+ connect = <0x14>;
+ phandle = <0xc9>;
+ };
+ };
+ };
+
+ firmware {
+
+ optee {
+ compatible = "linaro,optee-tz";
+ method = "smc";
+ };
+ };
+
+ external-gmac-clock {
+ compatible = "fixed-clock";
+ clock-frequency = <0x2faf080>;
+ clock-output-names = "gmac_clkin";
+ #clock-cells = <0x00>;
+ phandle = <0xca>;
+ };
+
+ psci {
+ compatible = "arm,psci-1.0";
+ method = "smc";
+ };
+
+ rockchip-suspend {
+ compatible = "rockchip,pm-px30";
+ status = "okay";
+ rockchip,sleep-debug-en = <0x01>;
+ rockchip,sleep-mode-config = <0x20702>;
+ rockchip,wakeup-config = <0x85>;
+ phandle = <0xcb>;
+ };
+
+ timer {
+ compatible = "arm,armv8-timer";
+ interrupts = <0x01 0x0d 0xf04 0x01 0x0e 0xf04 0x01 0x0b 0xf04 0x01 0x0a 0xf04>;
+ };
+
+ xin24m {
+ compatible = "fixed-clock";
+ #clock-cells = <0x00>;
+ clock-frequency = <0x16e3600>;
+ clock-output-names = "xin24m";
+ phandle = <0xcc>;
+ };
+
+ xin32k {
+ compatible = "fixed-clock";
+ #clock-cells = <0x00>;
+ clock-frequency = <0x8000>;
+ clock-output-names = "xin32k";
+ phandle = <0xcd>;
+ };
+
+ power-management@ff000000 {
+ compatible = "rockchip,px30-pmu\0syscon\0simple-mfd";
+ reg = <0x00 0xff000000 0x00 0x1000>;
+ phandle = <0xce>;
+
+ power-controller {
+ compatible = "rockchip,px30-power-controller";
+ #power-domain-cells = <0x01>;
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+ phandle = <0x8a>;
+
+ pd_usb@5 {
+ reg = <0x05>;
+ clocks = <0x02 0x103 0x02 0x102 0x02 0x3c>;
+ pm_qos = <0x15 0x16>;
+ };
+
+ pd_sdcard@7 {
+ reg = <0x07>;
+ clocks = <0x02 0xf7 0x02 0x3b>;
+ pm_qos = <0x17>;
+ };
+
+ pd_gmac@9 {
+ reg = <0x09>;
+ clocks = <0x02 0xb2 0x02 0x143 0x02 0x40 0x02 0x3f>;
+ pm_qos = <0x18>;
+ };
+
+ pd_mmc_nand@10 {
+ reg = <0x0a>;
+ clocks = <0x02 0xfe 0x02 0x100 0x02 0xff 0x02 0x101 0x02 0x39 0x02 0x37 0x02 0x38 0x02 0x3a>;
+ pm_qos = <0x19 0x1a 0x1b 0x1c>;
+ };
+
+ pd_vpu@11 {
+ reg = <0x0b>;
+ clocks = <0x02 0xaf 0x02 0xf4 0x02 0x4b>;
+ pm_qos = <0x1d 0x1e>;
+ };
+
+ pd_vo@12 {
+ reg = <0x0c>;
+ clocks = <0x02 0xb7 0x02 0xb5 0x02 0xb6 0x02 0x96 0x02 0x97 0x02 0xfd 0x02 0xfb 0x02 0xfc 0x02 0x144 0x02 0x35 0x02 0x36>;
+ pm_qos = <0x1f 0x20 0x21 0x22>;
+ };
+
+ pd_vi@13 {
+ reg = <0x0d>;
+ clocks = <0x02 0xb3 0x02 0xb4 0x02 0xf9 0x02 0xfa 0x02 0x33>;
+ pm_qos = <0x23 0x24 0x25 0x26 0x27>;
+ };
+
+ pd_gpu@14 {
+ reg = <0x0e>;
+ clocks = <0x02 0x49>;
+ pm_qos = <0x28>;
+ };
+ };
+ };
+
+ syscon@ff010000 {
+ compatible = "rockchip,px30-pmugrf\0syscon\0simple-mfd";
+ reg = <0x00 0xff010000 0x00 0x1000>;
+ #address-cells = <0x01>;
+ #size-cells = <0x01>;
+ phandle = <0xac>;
+
+ io-domains {
+ compatible = "rockchip,px30-pmu-io-voltage-domain";
+ status = "okay";
+ pmuio1-supply = <0x29>;
+ pmuio2-supply = <0x29>;
+ phandle = <0xcf>;
+ };
+
+ reboot-mode {
+ compatible = "syscon-reboot-mode";
+ offset = <0x200>;
+ mode-bootloader = <0x5242c301>;
+ mode-charge = <0x5242c30b>;
+ mode-fastboot = <0x5242c309>;
+ mode-loader = <0x5242c301>;
+ mode-normal = <0x5242c300>;
+ mode-recovery = <0x5242c303>;
+ mode-ums = <0x5242c30c>;
+ };
+
+ pmu-pvtm {
+ compatible = "rockchip,px30-pmu-pvtm";
+ clocks = <0x2a 0x07>;
+ clock-names = "pmu";
+ status = "okay";
+ phandle = <0xd0>;
+ };
+ };
+
+ serial@ff030000 {
+ compatible = "rockchip,px30-uart\0snps,dw-apb-uart";
+ reg = <0x00 0xff030000 0x00 0x100>;
+ interrupts = <0x00 0x0f 0x04>;
+ clocks = <0x2a 0x06 0x2a 0x15>;
+ clock-names = "baudclk\0apb_pclk";
+ reg-shift = <0x02>;
+ reg-io-width = <0x04>;
+ dmas = <0x2b 0x00 0x2b 0x01>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x2c 0x2d 0x2e>;
+ status = "disabled";
+ phandle = <0xd1>;
+ };
+
+ i2s@ff060000 {
+ compatible = "rockchip,px30-i2s-tdm";
+ reg = <0x00 0xff060000 0x00 0x1000>;
+ interrupts = <0x00 0x0c 0x04>;
+ clocks = <0x02 0x10 0x02 0x12 0x02 0x106>;
+ clock-names = "mclk_tx\0mclk_rx\0hclk";
+ dmas = <0x2b 0x10 0x2b 0x11>;
+ dma-names = "tx\0rx";
+ resets = <0x02 0x84 0x02 0xbf>;
+ reset-names = "tx-m\0rx-m";
+ rockchip,cru = <0x02>;
+ rockchip,grf = <0x2f>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x30 0x31 0x32 0x33 0x34 0x35 0x36 0x37 0x38 0x39 0x3a 0x3b>;
+ status = "disabled";
+ phandle = <0xd2>;
+ };
+
+ i2s@ff070000 {
+ compatible = "rockchip,px30-i2s\0rockchip,rk3066-i2s";
+ reg = <0x00 0xff070000 0x00 0x1000>;
+ interrupts = <0x00 0x0d 0x04>;
+ clocks = <0x02 0x14 0x02 0x107>;
+ clock-names = "i2s_clk\0i2s_hclk";
+ dmas = <0x2b 0x12 0x2b 0x13>;
+ dma-names = "tx\0rx";
+ resets = <0x02 0x86 0x02 0x85>;
+ reset-names = "reset-m\0reset-h";
+ pinctrl-names = "default";
+ pinctrl-0 = <0x3c 0x3d 0x3e 0x3f>;
+ status = "okay";
+ #sound-dai-cells = <0x00>;
+ phandle = <0xc2>;
+ };
+
+ i2s@ff080000 {
+ compatible = "rockchip,px30-i2s\0rockchip,rk3066-i2s";
+ reg = <0x00 0xff080000 0x00 0x1000>;
+ interrupts = <0x00 0x0e 0x04>;
+ clocks = <0x02 0x16 0x02 0x108>;
+ clock-names = "i2s_clk\0i2s_hclk";
+ dmas = <0x2b 0x14 0x2b 0x15>;
+ dma-names = "tx\0rx";
+ resets = <0x02 0x88 0x02 0x87>;
+ reset-names = "reset-m\0reset-h";
+ pinctrl-names = "default";
+ pinctrl-0 = <0x40 0x41 0x42 0x43>;
+ status = "disabled";
+ phandle = <0xd3>;
+ };
+
+ pdm@ff0a0000 {
+ compatible = "rockchip,px30-pdm\0rockchip,pdm";
+ reg = <0x00 0xff0a0000 0x00 0x1000>;
+ clocks = <0x02 0x0f 0x02 0x105>;
+ clock-names = "pdm_clk\0pdm_hclk";
+ dmas = <0x2b 0x18>;
+ dma-names = "rx";
+ resets = <0x02 0x82>;
+ reset-names = "pdm-m";
+ pinctrl-names = "default";
+ pinctrl-0 = <0x44 0x45 0x46 0x47 0x48 0x49>;
+ status = "disabled";
+ phandle = <0xd4>;
+ };
+
+ crypto@ff0b0000 {
+ compatible = "rockchip,px30-crypto";
+ reg = <0x00 0xff0b0000 0x00 0x4000>;
+ interrupts = <0x00 0x52 0x04>;
+ clocks = <0x02 0xac 0x02 0xf1 0x02 0x30 0x02 0x31>;
+ clock-names = "aclk\0hclk\0sclk\0apb_pclk";
+ resets = <0x02 0x74>;
+ reset-names = "crypto-rst";
+ status = "disabled";
+ phandle = <0xd5>;
+ };
+
+ rng@ff0b0000 {
+ compatible = "rockchip,cryptov2-rng";
+ reg = <0x00 0xff0b0000 0x00 0x4000>;
+ clocks = <0x02 0x30 0x02 0x31 0x02 0xac 0x02 0xf1>;
+ clock-names = "clk_crypto\0clk_crypto_apk\0aclk_crypto\0hclk_crypto";
+ assigned-clocks = <0x02 0x30 0x02 0x31 0x02 0xac 0x02 0xf1>;
+ assigned-clock-rates = <0x8f0d180 0x8f0d180 0xbebc200 0x5f5e100>;
+ resets = <0x02 0x74>;
+ reset-names = "reset";
+ status = "okay";
+ phandle = <0xd6>;
+ };
+
+ interrupt-controller@ff131000 {
+ compatible = "arm,gic-400";
+ #interrupt-cells = <0x03>;
+ #address-cells = <0x00>;
+ interrupt-controller;
+ reg = <0x00 0xff131000 0x00 0x1000 0x00 0xff132000 0x00 0x2000 0x00 0xff134000 0x00 0x2000 0x00 0xff136000 0x00 0x2000>;
+ interrupts = <0x01 0x09 0xf04>;
+ phandle = <0x01>;
+ };
+
+ syscon@ff140000 {
+ compatible = "rockchip,px30-grf\0syscon\0simple-mfd";
+ reg = <0x00 0xff140000 0x00 0x1000>;
+ #address-cells = <0x01>;
+ #size-cells = <0x01>;
+ phandle = <0x2f>;
+
+ io-domains {
+ compatible = "rockchip,px30-io-voltage-domain";
+ status = "okay";
+ vccio1-supply = <0x4a>;
+ vccio2-supply = <0x4a>;
+ vccio3-supply = <0x4b>;
+ vccio4-supply = <0x4b>;
+ vccio5-supply = <0x4b>;
+ vccio6-supply = <0x4b>;
+ phandle = <0xd7>;
+ };
+
+ lvds {
+ compatible = "rockchip,px30-lvds";
+ phys = <0x4c>;
+ phy-names = "phy";
+ status = "disabled";
+ phandle = <0xd8>;
+
+ ports {
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+
+ port@0 {
+ reg = <0x00>;
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+
+ endpoint@0 {
+ reg = <0x00>;
+ remote-endpoint = <0x12>;
+ phandle = <0xa2>;
+ };
+ };
+ };
+ };
+
+ rgb {
+ compatible = "rockchip,px30-rgb";
+ pinctrl-names = "default\0sleep";
+ pinctrl-0 = <0x4d>;
+ pinctrl-1 = <0x4e>;
+ status = "disabled";
+ phys = <0x4c>;
+ phy-names = "phy";
+ phandle = <0xd9>;
+
+ ports {
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+
+ port@0 {
+ reg = <0x00>;
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+
+ endpoint@0 {
+ reg = <0x00>;
+ remote-endpoint = <0x14>;
+ phandle = <0xa4>;
+ };
+ };
+ };
+ };
+ };
+
+ syscon@ff148000 {
+ compatible = "syscon\0simple-mfd";
+ reg = <0x00 0xff148000 0x00 0x1000>;
+ #address-cells = <0x01>;
+ #size-cells = <0x01>;
+ phandle = <0xda>;
+
+ pvtm {
+ compatible = "rockchip,px30-pvtm";
+ clocks = <0x02 0x4a>;
+ clock-names = "core";
+ status = "okay";
+ phandle = <0xdb>;
+ };
+ };
+
+ serial@ff158000 {
+ compatible = "rockchip,px30-uart\0snps,dw-apb-uart";
+ reg = <0x00 0xff158000 0x00 0x100>;
+ interrupts = <0x00 0x10 0x04>;
+ clocks = <0x02 0x18 0x02 0x149>;
+ clock-names = "baudclk\0apb_pclk";
+ reg-shift = <0x02>;
+ reg-io-width = <0x04>;
+ dmas = <0x2b 0x02 0x2b 0x03>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x4f 0x50>;
+ status = "okay";
+ phandle = <0xdc>;
+ };
+
+ serial@ff160000 {
+ compatible = "rockchip,px30-uart\0snps,dw-apb-uart";
+ reg = <0x00 0xff160000 0x00 0x100>;
+ interrupts = <0x00 0x11 0x04>;
+ clocks = <0x02 0x19 0x02 0x14a>;
+ clock-names = "baudclk\0apb_pclk";
+ reg-shift = <0x02>;
+ reg-io-width = <0x04>;
+ dmas = <0x2b 0x04 0x2b 0x05>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x51>;
+ status = "disabled";
+ phandle = <0xdd>;
+ };
+
+ serial@ff168000 {
+ compatible = "rockchip,px30-uart\0snps,dw-apb-uart";
+ reg = <0x00 0xff168000 0x00 0x100>;
+ interrupts = <0x00 0x12 0x04>;
+ clocks = <0x02 0x1a 0x02 0x14b>;
+ clock-names = "baudclk\0apb_pclk";
+ reg-shift = <0x02>;
+ reg-io-width = <0x04>;
+ dmas = <0x2b 0x06 0x2b 0x07>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x52 0x53 0x54>;
+ status = "disabled";
+ phandle = <0xde>;
+ };
+
+ serial@ff170000 {
+ compatible = "rockchip,px30-uart\0snps,dw-apb-uart";
+ reg = <0x00 0xff170000 0x00 0x100>;
+ interrupts = <0x00 0x13 0x04>;
+ clocks = <0x02 0x1b 0x02 0x14c>;
+ clock-names = "baudclk\0apb_pclk";
+ reg-shift = <0x02>;
+ reg-io-width = <0x04>;
+ dmas = <0x2b 0x08 0x2b 0x09>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x55 0x56 0x57>;
+ status = "disabled";
+ phandle = <0xdf>;
+ };
+
+ serial@ff178000 {
+ compatible = "rockchip,px30-uart\0snps,dw-apb-uart";
+ reg = <0x00 0xff178000 0x00 0x100>;
+ interrupts = <0x00 0x14 0x04>;
+ clocks = <0x02 0x1c 0x02 0x14d>;
+ clock-names = "baudclk\0apb_pclk";
+ reg-shift = <0x02>;
+ reg-io-width = <0x04>;
+ dmas = <0x2b 0x0a 0x2b 0x0b>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x58 0x59 0x5a>;
+ status = "disabled";
+ phandle = <0xe0>;
+ };
+
+ i2c@ff180000 {
+ compatible = "rockchip,rk3399-i2c";
+ reg = <0x00 0xff180000 0x00 0x1000>;
+ clocks = <0x02 0x1d 0x02 0x14e>;
+ clock-names = "i2c\0pclk";
+ interrupts = <0x00 0x07 0x04>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x5b>;
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+ status = "okay";
+ clock-frequency = <0x61a80>;
+ i2c-scl-rising-time-ns = <0x118>;
+ i2c-scl-falling-time-ns = <0x10>;
+ phandle = <0xe1>;
+
+ pmic@20 {
+ compatible = "rockchip,rk817";
+ reg = <0x20>;
+ interrupt-parent = <0x5c>;
+ interrupts = <0x0a 0x08>;
+ pinctrl-names = "default\0pmic-sleep\0pmic-power-off\0pmic-reset";
+ pinctrl-0 = <0x5d>;
+ pinctrl-1 = <0x5e 0x5f>;
+ pinctrl-2 = <0x60 0x61>;
+ pinctrl-3 = <0x62 0x63>;
+ rockchip,system-power-controller;
+ wakeup-source;
+ #clock-cells = <0x01>;
+ clock-output-names = "rk808-clkout1\0rk808-clkout2";
+ pmic-reset-func = <0x01>;
+ vcc1-supply = <0x64>;
+ vcc2-supply = <0x64>;
+ vcc3-supply = <0x64>;
+ vcc4-supply = <0x64>;
+ vcc5-supply = <0x64>;
+ vcc6-supply = <0x64>;
+ vcc7-supply = <0x64>;
+ vcc8-supply = <0x64>;
+ vcc9-supply = <0x65>;
+ phandle = <0xe2>;
+
+ pwrkey {
+ status = "okay";
+ };
+
+ pinctrl_rk8xx {
+ gpio-controller;
+ #gpio-cells = <0x02>;
+ phandle = <0xe3>;
+
+ rk817_ts_gpio1 {
+ pins = "gpio_ts";
+ function = "pin_fun1";
+ phandle = <0xe4>;
+ };
+
+ rk817_gt_gpio2 {
+ pins = "gpio_gt";
+ function = "pin_fun1";
+ phandle = <0xe5>;
+ };
+
+ rk817_pin_ts {
+ pins = "gpio_ts";
+ function = "pin_fun0";
+ phandle = <0xe6>;
+ };
+
+ rk817_pin_gt {
+ pins = "gpio_gt";
+ function = "pin_fun0";
+ phandle = <0xe7>;
+ };
+
+ rk817_slppin_null {
+ pins = "gpio_slp";
+ function = "pin_fun0";
+ phandle = <0xe8>;
+ };
+
+ rk817_slppin_slp {
+ pins = "gpio_slp";
+ function = "pin_fun1";
+ phandle = <0x5f>;
+ };
+
+ rk817_slppin_pwrdn {
+ pins = "gpio_slp";
+ function = "pin_fun2";
+ phandle = <0x61>;
+ };
+
+ rk817_slppin_rst {
+ pins = "gpio_slp";
+ function = "pin_fun3";
+ phandle = <0x63>;
+ };
+ };
+
+ regulators {
+
+ DCDC_REG1 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <0xe7ef0>;
+ regulator-max-microvolt = <0x118c30>;
+ regulator-ramp-delay = <0x1771>;
+ regulator-initial-mode = <0x02>;
+ regulator-name = "vdd_logic";
+ phandle = <0x0e>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <0xe7ef0>;
+ };
+ };
+
+ DCDC_REG2 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <0xe7ef0>;
+ regulator-max-microvolt = <0x149970>;
+ regulator-ramp-delay = <0x1771>;
+ regulator-initial-mode = <0x02>;
+ regulator-name = "vdd_arm";
+ phandle = <0x06>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <0xe7ef0>;
+ };
+ };
+
+ DCDC_REG3 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-initial-mode = <0x02>;
+ regulator-name = "vcc_ddr";
+ phandle = <0xe9>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ };
+ };
+
+ DCDC_REG4 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <0x325aa0>;
+ regulator-max-microvolt = <0x325aa0>;
+ regulator-initial-mode = <0x02>;
+ regulator-name = "vcc_3v3";
+ phandle = <0x4b>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <0x325aa0>;
+ };
+ };
+
+ LDO_REG1 {
+ regulator-min-microvolt = <0xf4240>;
+ regulator-max-microvolt = <0xf4240>;
+ regulator-name = "vcc_1v0";
+ phandle = <0xea>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <0xf4240>;
+ };
+ };
+
+ LDO_REG2 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <0x1b7740>;
+ regulator-max-microvolt = <0x1b7740>;
+ regulator-name = "vcc1v8_soc";
+ phandle = <0x88>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <0x1b7740>;
+ };
+ };
+
+ LDO_REG3 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <0xf4240>;
+ regulator-max-microvolt = <0xf4240>;
+ regulator-name = "vcc1v0_soc";
+ phandle = <0xeb>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <0xf4240>;
+ };
+ };
+
+ LDO_REG4 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <0x325aa0>;
+ regulator-max-microvolt = <0x325aa0>;
+ regulator-name = "vcc3v3_pmu";
+ phandle = <0x29>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <0x325aa0>;
+ };
+ };
+
+ LDO_REG5 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <0x1b7740>;
+ regulator-max-microvolt = <0x1b7740>;
+ regulator-name = "vccio_sd";
+ phandle = <0x4a>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <0x1b7740>;
+ };
+ };
+
+ LDO_REG6 {
+ regulator-min-microvolt = <0x1b7740>;
+ regulator-max-microvolt = <0x2dc6c0>;
+ regulator-boot-on;
+ regulator-name = "vcc_sd";
+ phandle = <0x93>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <0x2dc6c0>;
+ };
+ };
+
+ LDO_REG7 {
+ regulator-min-microvolt = <0x325aa0>;
+ regulator-max-microvolt = <0x325aa0>;
+ regulator-name = "vcc_backlight";
+ phandle = <0x9e>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <0x325aa0>;
+ };
+ };
+
+ LDO_REG8 {
+ regulator-min-microvolt = <0x2ab980>;
+ regulator-max-microvolt = <0x2ab980>;
+ regulator-name = "vcc_lcd";
+ phandle = <0x9f>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <0x2ab980>;
+ };
+ };
+
+ BOOST {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <0x4c4b40>;
+ regulator-max-microvolt = <0x5265c0>;
+ regulator-name = "boost";
+ phandle = <0x65>;
+ };
+
+ OTG_SWITCH {
+ regulator-boot-on;
+ regulator-name = "otg_switch";
+ phandle = <0xec>;
+ };
+ };
+
+ battery {
+ compatible = "rk817,battery";
+ ocv_table = <0xc5d 0xc94 0xcd0 0xd02 0xd34 0xd66 0xd98 0xdca 0xdfc 0xe2e 0xe56 0xe7e 0xea6 0xece 0xef6 0xf1e 0xf46 0xf6e 0xf96 0xf9b 0xfa0>;
+ design_capacity = <0xd34>;
+ design_qmax = <0xe86>;
+ bat_res = <0x64>;
+ sleep_enter_current = <0x12c>;
+ sleep_exit_current = <0x12c>;
+ sleep_filter_current = <0x64>;
+ power_off_thresd = <0xbb8>;
+ zero_algorithm_vol = <0xf0a>;
+ max_soc_offset = <0x3c>;
+ monitor_sec = <0x05>;
+ virtual_power = <0x00>;
+ sample_res = <0x0a>;
+ };
+
+ charger {
+ compatible = "rk817,charger";
+ min_input_voltage = <0x1194>;
+ max_input_current = <0x5dc>;
+ max_chrg_current = <0x7d0>;
+ max_chrg_voltage = <0x1068>;
+ chrg_term_mode = <0x00>;
+ chrg_finish_cur = <0x34>;
+ virtual_power = <0x00>;
+ sample_res = <0x0a>;
+ dc_det_gpio = <0x5c 0x0b 0x00>;
+ bat_low_gpio = <0x66 0x0d 0x00>;
+ extcon = <0x67>;
+ };
+
+ codec {
+ #sound-dai-cells = <0x00>;
+ compatible = "rockchip,rk817-codec";
+ clocks = <0x02 0x15>;
+ clock-names = "mclk";
+ pinctrl-names = "default";
+ pinctrl-0 = <0x68>;
+ hp-volume = <0x14>;
+ spk-volume = <0x03>;
+ status = "okay";
+ phandle = <0xc3>;
+ };
+ };
+ };
+
+ i2c@ff190000 {
+ compatible = "rockchip,rk3399-i2c";
+ reg = <0x00 0xff190000 0x00 0x1000>;
+ clocks = <0x02 0x1e 0x02 0x14f>;
+ clock-names = "i2c\0pclk";
+ interrupts = <0x00 0x08 0x04>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x69>;
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+ status = "okay";
+ clock-frequency = <0x61a80>;
+ phandle = <0xed>;
+ };
+
+ i2c@ff1a0000 {
+ compatible = "rockchip,rk3399-i2c";
+ reg = <0x00 0xff1a0000 0x00 0x1000>;
+ clocks = <0x02 0x1f 0x02 0x150>;
+ clock-names = "i2c\0pclk";
+ interrupts = <0x00 0x09 0x04>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x6a>;
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+ status = "disabled";
+ phandle = <0xee>;
+ };
+
+ i2c@ff1b0000 {
+ compatible = "rockchip,rk3399-i2c";
+ reg = <0x00 0xff1b0000 0x00 0x1000>;
+ clocks = <0x02 0x20 0x02 0x151>;
+ clock-names = "i2c\0pclk";
+ interrupts = <0x00 0x0a 0x04>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x6b>;
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+ status = "disabled";
+ phandle = <0xef>;
+ };
+
+ spi@ff1d0000 {
+ compatible = "rockchip,px30-spi\0rockchip,rk3066-spi";
+ reg = <0x00 0xff1d0000 0x00 0x1000>;
+ interrupts = <0x00 0x1a 0x04>;
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+ clocks = <0x02 0x24 0x02 0x155>;
+ clock-names = "spiclk\0apb_pclk";
+ dmas = <0x2b 0x0c 0x2b 0x0d>;
+ dma-names = "tx\0rx";
+ pinctrl-names = "default\0high_speed";
+ pinctrl-0 = <0x6c 0x6d 0x6e 0x6f>;
+ pinctrl-1 = <0x70 0x6d 0x71 0x72>;
+ status = "disabled";
+ phandle = <0xf0>;
+ };
+
+ spi@ff1d8000 {
+ compatible = "rockchip,px30-spi\0rockchip,rk3066-spi";
+ reg = <0x00 0xff1d8000 0x00 0x1000>;
+ interrupts = <0x00 0x1b 0x04>;
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+ clocks = <0x02 0x25 0x02 0x156>;
+ clock-names = "spiclk\0apb_pclk";
+ dmas = <0x2b 0x0e 0x2b 0x0f>;
+ dma-names = "tx\0rx";
+ pinctrl-names = "default\0high_speed";
+ pinctrl-0 = <0x73 0x74 0x75 0x76 0x77>;
+ pinctrl-1 = <0x78 0x74 0x75 0x79 0x7a>;
+ status = "disabled";
+ phandle = <0xf1>;
+ };
+
+ watchdog@ff1e0000 {
+ compatible = "snps,dw-wdt";
+ reg = <0x00 0xff1e0000 0x00 0x100>;
+ clocks = <0x02 0x15b>;
+ interrupts = <0x00 0x25 0x04>;
+ resets = <0x02 0xb5>;
+ reset-names = "reset";
+ status = "disabled";
+ phandle = <0xf2>;
+ };
+
+ pwm@ff200000 {
+ compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm";
+ reg = <0x00 0xff200000 0x00 0x10>;
+ #pwm-cells = <0x03>;
+ pinctrl-names = "active";
+ pinctrl-0 = <0x7b>;
+ clocks = <0x02 0x22 0x02 0x153>;
+ clock-names = "pwm\0pclk";
+ status = "okay";
+ phandle = <0xbc>;
+ };
+
+ pwm@ff200010 {
+ compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm";
+ reg = <0x00 0xff200010 0x00 0x10>;
+ #pwm-cells = <0x03>;
+ pinctrl-names = "active";
+ pinctrl-0 = <0x7c>;
+ clocks = <0x02 0x22 0x02 0x153>;
+ clock-names = "pwm\0pclk";
+ status = "okay";
+ phandle = <0xc1>;
+ };
+
+ pwm@ff200020 {
+ compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm";
+ reg = <0x00 0xff200020 0x00 0x10>;
+ #pwm-cells = <0x03>;
+ pinctrl-names = "active";
+ pinctrl-0 = <0x7d>;
+ clocks = <0x02 0x22 0x02 0x153>;
+ clock-names = "pwm\0pclk";
+ status = "disabled";
+ phandle = <0xf3>;
+ };
+
+ pwm@ff200030 {
+ compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm";
+ reg = <0x00 0xff200030 0x00 0x10>;
+ #pwm-cells = <0x03>;
+ pinctrl-names = "active";
+ pinctrl-0 = <0x7e>;
+ clocks = <0x02 0x22 0x02 0x153>;
+ clock-names = "pwm\0pclk";
+ status = "disabled";
+ phandle = <0xf4>;
+ };
+
+ pwm@ff208000 {
+ compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm";
+ reg = <0x00 0xff208000 0x00 0x10>;
+ #pwm-cells = <0x03>;
+ pinctrl-names = "active";
+ pinctrl-0 = <0x7f>;
+ clocks = <0x02 0x23 0x02 0x154>;
+ clock-names = "pwm\0pclk";
+ status = "disabled";
+ phandle = <0xf5>;
+ };
+
+ pwm@ff208010 {
+ compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm";
+ reg = <0x00 0xff208010 0x00 0x10>;
+ #pwm-cells = <0x03>;
+ pinctrl-names = "active";
+ pinctrl-0 = <0x80>;
+ clocks = <0x02 0x23 0x02 0x154>;
+ clock-names = "pwm\0pclk";
+ status = "disabled";
+ phandle = <0xf6>;
+ };
+
+ pwm@ff208020 {
+ compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm";
+ reg = <0x00 0xff208020 0x00 0x10>;
+ #pwm-cells = <0x03>;
+ pinctrl-names = "active";
+ pinctrl-0 = <0x81>;
+ clocks = <0x02 0x23 0x02 0x154>;
+ clock-names = "pwm\0pclk";
+ status = "disabled";
+ phandle = <0xf7>;
+ };
+
+ pwm@ff208030 {
+ compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm";
+ reg = <0x00 0xff208030 0x00 0x10>;
+ #pwm-cells = <0x03>;
+ pinctrl-names = "active";
+ pinctrl-0 = <0x82>;
+ clocks = <0x02 0x23 0x02 0x154>;
+ clock-names = "pwm\0pclk";
+ status = "disabled";
+ phandle = <0xf8>;
+ };
+
+ rktimer@ff210000 {
+ compatible = "rockchip,rk3288-timer";
+ reg = <0x00 0xff210000 0x00 0x1000>;
+ interrupts = <0x00 0x1e 0x04>;
+ clocks = <0x02 0x159 0x02 0x26>;
+ clock-names = "pclk\0timer";
+ phandle = <0xf9>;
+ };
+
+ amba {
+ compatible = "simple-bus";
+ #address-cells = <0x02>;
+ #size-cells = <0x02>;
+ ranges;
+
+ dmac@ff240000 {
+ compatible = "arm,pl330\0arm,primecell";
+ reg = <0x00 0xff240000 0x00 0x4000>;
+ interrupts = <0x00 0x01 0x04 0x00 0x02 0x04>;
+ clocks = <0x02 0xbb>;
+ clock-names = "apb_pclk";
+ #dma-cells = <0x01>;
+ peripherals-req-type-burst;
+ phandle = <0x2b>;
+ };
+ };
+
+ thermal-zones {
+ phandle = <0xfa>;
+
+ soc-thermal {
+ polling-delay-passive = <0x14>;
+ polling-delay = <0x3e8>;
+ sustainable-power = <0x2ee>;
+ thermal-sensors = <0x83 0x00>;
+ phandle = <0xfb>;
+
+ trips {
+
+ trip-point-0 {
+ temperature = <0x11170>;
+ hysteresis = <0x7d0>;
+ type = "passive";
+ phandle = <0xfc>;
+ };
+
+ trip-point-1 {
+ temperature = <0x14c08>;
+ hysteresis = <0x7d0>;
+ type = "passive";
+ phandle = <0x84>;
+ };
+
+ soc-crit {
+ temperature = <0x1c138>;
+ hysteresis = <0x7d0>;
+ type = "critical";
+ phandle = <0xfd>;
+ };
+ };
+
+ cooling-maps {
+
+ map0 {
+ trip = <0x84>;
+ cooling-device = <0x09 0xffffffff 0xffffffff>;
+ contribution = <0x1000>;
+ };
+
+ map1 {
+ trip = <0x84>;
+ cooling-device = <0x85 0xffffffff 0xffffffff>;
+ contribution = <0x1000>;
+ };
+ };
+ };
+
+ gpu-thermal {
+ polling-delay-passive = <0x64>;
+ polling-delay = <0x3e8>;
+ thermal-sensors = <0x83 0x01>;
+ phandle = <0xfe>;
+ };
+ };
+
+ tsadc@ff280000 {
+ compatible = "rockchip,px30-tsadc";
+ reg = <0x00 0xff280000 0x00 0x100>;
+ interrupts = <0x00 0x24 0x04>;
+ rockchip,grf = <0x2f>;
+ clocks = <0x02 0x2c 0x02 0x158>;
+ clock-names = "tsadc\0apb_pclk";
+ assigned-clocks = <0x02 0x2c>;
+ assigned-clock-rates = <0xc350>;
+ resets = <0x02 0xa8>;
+ reset-names = "tsadc-apb";
+ #thermal-sensor-cells = <0x01>;
+ rockchip,hw-tshut-temp = <0x1d4c0>;
+ status = "okay";
+ pinctrl-names = "gpio\0otpout";
+ pinctrl-0 = <0x86>;
+ pinctrl-1 = <0x87>;
+ phandle = <0x83>;
+ };
+
+ saradc@ff288000 {
+ compatible = "rockchip,px30-saradc\0rockchip,rk3399-saradc";
+ reg = <0x00 0xff288000 0x00 0x100>;
+ interrupts = <0x00 0x54 0x04>;
+ #io-channel-cells = <0x01>;
+ clocks = <0x02 0x2d 0x02 0x157>;
+ clock-names = "saradc\0apb_pclk";
+ resets = <0x02 0xa5>;
+ reset-names = "saradc-apb";
+ status = "okay";
+ vref-supply = <0x88>;
+ phandle = <0xbe>;
+ };
+
+ otp@ff290000 {
+ compatible = "rockchip,px30-otp";
+ reg = <0x00 0xff290000 0x00 0x4000>;
+ #address-cells = <0x01>;
+ #size-cells = <0x01>;
+ clocks = <0x02 0x2f 0x02 0x15a 0x02 0x161>;
+ clock-names = "clk_otp\0pclk_otp\0pclk_otp_phy";
+ resets = <0x02 0xb4>;
+ reset-names = "otp_phy";
+ phandle = <0xff>;
+
+ id@7 {
+ reg = <0x07 0x10>;
+ phandle = <0x0f>;
+ };
+
+ cpu-leakage@17 {
+ reg = <0x17 0x01>;
+ phandle = <0x07>;
+ };
+
+ performance@1e {
+ reg = <0x1e 0x01>;
+ bits = <0x04 0x03>;
+ phandle = <0x08>;
+ };
+ };
+
+ clock-controller@ff2b0000 {
+ compatible = "rockchip,px30-cru";
+ reg = <0x00 0xff2b0000 0x00 0x1000>;
+ rockchip,grf = <0x2f>;
+ rockchip,boost = <0x89>;
+ #clock-cells = <0x01>;
+ #reset-cells = <0x01>;
+ assigned-clocks = <0x02 0x04>;
+ assigned-clock-rates = <0x3dfd2400>;
+ phandle = <0x02>;
+ };
+
+ cpu-boost@ff2b8000 {
+ compatible = "syscon";
+ reg = <0x00 0xff2b8000 0x00 0x1000>;
+ rockchip,boost-low-con0 = <0x1032>;
+ rockchip,boost-low-con1 = <0x1441>;
+ rockchip,boost-high-con0 = <0x1036>;
+ rockchip,boost-high-con1 = <0x1441>;
+ rockchip,boost-backup-pll = <0x01>;
+ rockchip,boost-backup-pll-usage = <0x00>;
+ rockchip,boost-switch-threshold = <0x249f00>;
+ rockchip,boost-statis-threshold = <0x100>;
+ rockchip,boost-statis-enable = <0x00>;
+ rockchip,boost-enable = <0x00>;
+ phandle = <0x89>;
+ };
+
+ pmu-clock-controller@ff2bc000 {
+ compatible = "rockchip,px30-pmucru";
+ reg = <0x00 0xff2bc000 0x00 0x1000>;
+ rockchip,grf = <0x2f>;
+ #clock-cells = <0x01>;
+ #reset-cells = <0x01>;
+ assigned-clocks = <0x2a 0x01 0x2a 0x08 0x2a 0x05 0x02 0x07 0x02 0xab 0x02 0xb0 0x02 0xf0 0x02 0xf5 0x02 0x140 0x02 0x49>;
+ assigned-clock-rates = <0x47868c00 0x5f5e100 0x18cba80 0x23c34600 0xbebc200 0xbebc200 0x8f0d180 0x8f0d180 0x5f5e100 0xbebc200>;
+ phandle = <0x2a>;
+ };
+
+ syscon@ff2c0000 {
+ compatible = "rockchip,px30-usb2phy-grf\0syscon\0simple-mfd";
+ reg = <0x00 0xff2c0000 0x00 0x10000>;
+ #address-cells = <0x01>;
+ #size-cells = <0x01>;
+ phandle = <0x100>;
+
+ usb2-phy@100 {
+ compatible = "rockchip,px30-usb2phy\0rockchip,rk3328-usb2phy";
+ reg = <0x100 0x10>;
+ clocks = <0x2a 0x0a>;
+ clock-names = "phyclk";
+ #clock-cells = <0x00>;
+ assigned-clocks = <0x02 0x0e 0x02 0x55>;
+ assigned-clock-parents = <0x67 0x02 0x0e>;
+ clock-output-names = "usb480m_phy";
+ status = "okay";
+ phandle = <0x67>;
+
+ host-port {
+ #phy-cells = <0x00>;
+ interrupts = <0x00 0x44 0x04>;
+ interrupt-names = "linestate";
+ status = "okay";
+ phandle = <0x8c>;
+ };
+
+ otg-port {
+ #phy-cells = <0x00>;
+ interrupts = <0x00 0x42 0x04 0x00 0x41 0x04 0x00 0x40 0x04>;
+ interrupt-names = "otg-bvalid\0otg-id\0linestate";
+ status = "disabled";
+ phandle = <0x8b>;
+ };
+ };
+ };
+
+ video-phy@ff2e0000 {
+ compatible = "rockchip,px30-video-phy";
+ reg = <0x00 0xff2e0000 0x00 0x10000 0x00 0xff450000 0x00 0x10000>;
+ clocks = <0x2a 0x0b 0x02 0x145 0x02 0x144>;
+ clock-names = "ref\0pclk_phy\0pclk_host";
+ #clock-cells = <0x00>;
+ resets = <0x02 0x3e>;
+ reset-names = "rst";
+ power-domains = <0x8a 0x0c>;
+ #phy-cells = <0x00>;
+ status = "okay";
+ phandle = <0x4c>;
+ };
+
+ mipi-dphy-rx0@ff2f0000 {
+ compatible = "rockchip,rk3326-mipi-dphy";
+ reg = <0x00 0xff2f0000 0x00 0x4000>;
+ clocks = <0x02 0x146>;
+ clock-names = "dphy-ref";
+ power-domains = <0x8a 0x0d>;
+ rockchip,grf = <0x2f>;
+ status = "okay";
+ phandle = <0x101>;
+ };
+
+ usb@ff300000 {
+ compatible = "rockchip,px30-usb\0rockchip,rk3066-usb\0snps,dwc2";
+ reg = <0x00 0xff300000 0x00 0x40000>;
+ interrupts = <0x00 0x3e 0x04>;
+ clocks = <0x02 0x102>;
+ clock-names = "otg";
+ power-domains = <0x8a 0x05>;
+ dr_mode = "otg";
+ g-np-tx-fifo-size = <0x10>;
+ g-rx-fifo-size = <0x118>;
+ g-tx-fifo-size = <0x100 0x80 0x80 0x40 0x20 0x10>;
+ g-use-dma;
+ phys = <0x8b>;
+ phy-names = "usb2-phy";
+ status = "okay";
+ phandle = <0x102>;
+ };
+
+ usb@ff340000 {
+ compatible = "generic-ehci";
+ reg = <0x00 0xff340000 0x00 0x10000>;
+ interrupts = <0x00 0x3c 0x04>;
+ clocks = <0x02 0x103 0x67>;
+ clock-names = "usbhost\0utmi";
+ power-domains = <0x8a 0x05>;
+ phys = <0x8c>;
+ phy-names = "usb";
+ status = "disabled";
+ phandle = <0x103>;
+ };
+
+ usb@ff350000 {
+ compatible = "generic-ohci";
+ reg = <0x00 0xff350000 0x00 0x10000>;
+ interrupts = <0x00 0x3d 0x04>;
+ clocks = <0x02 0x103 0x67>;
+ clock-names = "usbhost\0utmi";
+ power-domains = <0x8a 0x05>;
+ phys = <0x8c>;
+ phy-names = "usb";
+ status = "disabled";
+ phandle = <0x104>;
+ };
+
+ ethernet@ff360000 {
+ compatible = "rockchip,px30-gmac";
+ reg = <0x00 0xff360000 0x00 0x10000>;
+ rockchip,grf = <0x2f>;
+ interrupts = <0x00 0x2b 0x04>;
+ interrupt-names = "macirq";
+ clocks = <0x02 0x3e 0x02 0x3f 0x02 0x3f 0x02 0x40 0x02 0x41 0x02 0xb2 0x02 0x143 0x02 0x4c>;
+ clock-names = "stmmaceth\0mac_clk_rx\0mac_clk_tx\0clk_mac_ref\0clk_mac_refout\0aclk_mac\0pclk_mac\0clk_mac_speed";
+ phy-mode = "rmii";
+ pinctrl-names = "default";
+ pinctrl-0 = <0x8d 0x8e>;
+ resets = <0x02 0x5e>;
+ reset-names = "stmmaceth";
+ power-domains = <0x8a 0x09>;
+ status = "disabled";
+ phandle = <0x105>;
+ };
+
+ dwmmc@ff370000 {
+ compatible = "rockchip,px30-dw-mshc\0rockchip,rk3288-dw-mshc";
+ reg = <0x00 0xff370000 0x00 0x4000>;
+ max-frequency = <0x8f0d180>;
+ clocks = <0x02 0xf7 0x02 0x3b 0x02 0x43 0x02 0x44>;
+ clock-names = "biu\0ciu\0ciu-drv\0ciu-sample";
+ assigned-clocks = <0x02 0x3b>;
+ assigned-clock-parents = <0x02 0x57>;
+ power-domains = <0x8a 0x07>;
+ fifo-depth = <0x100>;
+ interrupts = <0x00 0x36 0x04>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x8f 0x90 0x91 0x92>;
+ status = "okay";
+ bus-width = <0x04>;
+ cap-mmc-highspeed;
+ cap-sd-highspeed;
+ supports-sd;
+ card-detect-delay = <0x320>;
+ ignore-pm-notify;
+ cd-gpios = <0x5c 0x03 0x01>;
+ sd-uhs-sdr12;
+ sd-uhs-sdr25;
+ sd-uhs-sdr50;
+ sd-uhs-sdr104;
+ vqmmc-supply = <0x4a>;
+ vmmc-supply = <0x93>;
+ phandle = <0x106>;
+ };
+
+ dwmmc@ff380000 {
+ compatible = "rockchip,px30-dw-mshc\0rockchip,rk3288-dw-mshc";
+ reg = <0x00 0xff380000 0x00 0x4000>;
+ max-frequency = <0x8f0d180>;
+ clocks = <0x02 0xff 0x02 0x38 0x02 0x45 0x02 0x46>;
+ clock-names = "biu\0ciu\0ciu-drv\0ciu-sample";
+ assigned-clocks = <0x02 0x38>;
+ assigned-clock-parents = <0x02 0x51>;
+ power-domains = <0x8a 0x0a>;
+ fifo-depth = <0x100>;
+ interrupts = <0x00 0x37 0x04>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x94 0x95 0x96>;
+ status = "okay";
+ bus-width = <0x04>;
+ cap-mmc-highspeed;
+ cap-sd-highspeed;
+ supports-sd;
+ card-detect-delay = <0x320>;
+ ignore-pm-notify;
+ cd-gpios = <0x97 0x0e 0x01>;
+ sd-uhs-sdr12;
+ sd-uhs-sdr25;
+ sd-uhs-sdr50;
+ sd-uhs-sdr104;
+ vqmmc-supply = <0x4a>;
+ vmmc-supply = <0x93>;
+ phandle = <0x107>;
+ };
+
+ dwmmc@ff390000 {
+ compatible = "rockchip,px30-dw-mshc\0rockchip,rk3288-dw-mshc";
+ reg = <0x00 0xff390000 0x00 0x4000>;
+ max-frequency = <0x8f0d180>;
+ clocks = <0x02 0x100 0x02 0x39 0x02 0x47 0x02 0x48>;
+ clock-names = "biu\0ciu\0ciu-drv\0ciu-sample";
+ assigned-clocks = <0x02 0x39>;
+ assigned-clock-parents = <0x02 0x53>;
+ power-domains = <0x8a 0x0a>;
+ fifo-depth = <0x100>;
+ interrupts = <0x00 0x35 0x04>;
+ status = "disabled";
+ phandle = <0x108>;
+ };
+
+ nandc@ff3b0000 {
+ compatible = "rockchip,rk-nandc";
+ reg = <0x00 0xff3b0000 0x00 0x4000>;
+ interrupts = <0x00 0x39 0x04>;
+ nandc_id = <0x00>;
+ clocks = <0x02 0x37 0x02 0xfe>;
+ clock-names = "clk_nandc\0hclk_nandc";
+ assigned-clocks = <0x02 0x37>;
+ assigned-clock-parents = <0x02 0x4f>;
+ power-domains = <0x8a 0x0a>;
+ status = "disabled";
+ phandle = <0x109>;
+ };
+
+ sfc@ff3a0000 {
+ compatible = "rockchip,sfc";
+ reg = <0x00 0xff3a0000 0x00 0x4000>;
+ interrupts = <0x00 0x38 0x04>;
+ clocks = <0x02 0x3a 0x02 0x101>;
+ clock-names = "clk_sfc\0hclk_sfc";
+ assigned-clocks = <0x02 0x3a>;
+ assigned-clock-rates = <0x989680>;
+ status = "disabled";
+ phandle = <0x10a>;
+ };
+
+ gpu@ff400000 {
+ compatible = "arm,malit602\0arm,malit60x\0arm,malit6xx\0arm,mali-midgard";
+ reg = <0x00 0xff400000 0x00 0x4000>;
+ interrupts = <0x00 0x2d 0x04 0x00 0x2e 0x04 0x00 0x2f 0x04>;
+ interrupt-names = "GPU\0MMU\0JOB";
+ clocks = <0x02 0x49>;
+ clock-names = "clk_mali";
+ power-domains = <0x8a 0x0e>;
+ #cooling-cells = <0x02>;
+ operating-points-v2 = <0x98>;
+ status = "okay";
+ mali-supply = <0x0e>;
+ phandle = <0x85>;
+
+ power_model {
+ compatible = "arm,mali-simple-power-model";
+ static-coefficient = <0x64578>;
+ dynamic-coefficient = <0x2dd>;
+ ts = <0x7d00 0x125c 0xffffffb0 0x02>;
+ thermal-zone = "gpu-thermal";
+ };
+ };
+
+ gpu-opp-table {
+ compatible = "operating-points-v2";
+ rockchip,thermal-zone = "soc-thermal";
+ rockchip,temp-hysteresis = <0x1388>;
+ rockchip,low-temp = <0x00>;
+ rockchip,low-temp-min-volt = <0xf4240>;
+ rockchip,low-temp-adjust-volt = <0x00 0x1e0 0xc350>;
+ rockchip,max-volt = <0x11edd8>;
+ rockchip,evb-irdrop = <0x61a8>;
+ rockchip,pvtm-voltage-sel = <0x00 0xc350 0x00 0xc351 0xd2f0 0x01 0xd2f1 0xea60 0x02 0xea61 0x1869f 0x03>;
+ rockchip,pvtm-ch = <0x00 0x00>;
+ phandle = <0x98>;
+
+ opp-400000000 {
+ opp-hz = <0x00 0x17d78400>;
+ opp-microvolt = <0x100590>;
+ opp-microvolt-L0 = <0x100590>;
+ opp-microvolt-L1 = <0xfa3e8>;
+ opp-microvolt-L2 = <0xee098>;
+ opp-microvolt-L3 = <0xe7ef0>;
+ };
+
+ opp-480000000 {
+ opp-hz = <0x00 0x1c9c3800>;
+ opp-microvolt = <0x112a88>;
+ opp-microvolt-L0 = <0x112a88>;
+ opp-microvolt-L1 = <0x10c8e0>;
+ opp-microvolt-L2 = <0x100590>;
+ opp-microvolt-L3 = <0xf4240>;
+ };
+
+ opp-520000000 {
+ opp-hz = <0x00 0x1efe9200>;
+ opp-microvolt = <0x118c30>;
+ opp-microvolt-L0 = <0x118c30>;
+ opp-microvolt-L1 = <0x118c30>;
+ opp-microvolt-L2 = <0x10c8e0>;
+ opp-microvolt-L3 = <0x100590>;
+ };
+ };
+
+ hevc_service@ff440000 {
+ compatible = "rockchip,hevc_sub";
+ iommu_enabled = <0x01>;
+ reg = <0x00 0xff440000 0x00 0x400>;
+ interrupts = <0x00 0x31 0x04>;
+ interrupt-names = "irq_dec";
+ dev_mode = <0x01>;
+ iommus = <0x99>;
+ allocator = <0x01>;
+ phandle = <0x9c>;
+ };
+
+ vpu_service@ff442000 {
+ compatible = "rockchip,vpu_sub";
+ iommu_enabled = <0x01>;
+ reg = <0x00 0xff442000 0x00 0x800>;
+ interrupts = <0x00 0x50 0x04 0x00 0x4f 0x04>;
+ interrupt-names = "irq_enc\0irq_dec";
+ dev_mode = <0x00>;
+ iommus = <0x9a>;
+ allocator = <0x01>;
+ phandle = <0x9b>;
+ };
+
+ vpu_combo {
+ compatible = "rockchip,vpu_combo";
+ subcnt = <0x02>;
+ rockchip,grf = <0x2f>;
+ rockchip,sub = <0x9b 0x9c>;
+ clocks = <0x02 0xaf 0x02 0xf4 0x02 0x4b>;
+ clock-names = "aclk_vcodec\0hclk_vcodec\0clk_core";
+ resets = <0x02 0x24 0x02 0x26 0x02 0x25 0x02 0x27 0x02 0x3f>;
+ reset-names = "video_a\0video_h\0niu_a\0niu_h\0video_core";
+ power-domains = <0x8a 0x0b>;
+ mode_bit = <0x0f>;
+ mode_ctrl = <0x410>;
+ status = "okay";
+ phandle = <0x10b>;
+ };
+
+ iommu@ff440440 {
+ compatible = "rockchip,iommu";
+ reg = <0x00 0xff440440 0x00 0x40 0x00 0xff440480 0x00 0x40>;
+ interrupts = <0x00 0x32 0x04>;
+ interrupt-names = "hevc_mmu";
+ clocks = <0x02 0xaf 0x02 0xf4>;
+ clock-names = "aclk\0hclk";
+ power-domains = <0x8a 0x0b>;
+ #iommu-cells = <0x00>;
+ phandle = <0x99>;
+ };
+
+ iommu@ff442800 {
+ compatible = "rockchip,iommu";
+ reg = <0x00 0xff442800 0x00 0x100>;
+ interrupts = <0x00 0x51 0x04>;
+ interrupt-names = "vpu_mmu";
+ clocks = <0x02 0xaf 0x02 0xf4>;
+ clock-names = "aclk\0hclk";
+ power-domains = <0x8a 0x0b>;
+ #iommu-cells = <0x00>;
+ phandle = <0x9a>;
+ };
+
+ dsi@ff450000 {
+ compatible = "rockchip,px30-mipi-dsi";
+ reg = <0x00 0xff450000 0x00 0x10000>;
+ interrupts = <0x00 0x4b 0x04>;
+ clocks = <0x02 0x144 0x4c>;
+ clock-names = "pclk\0hs_clk";
+ resets = <0x02 0x3d>;
+ reset-names = "apb";
+ phys = <0x4c>;
+ phy-names = "mipi_dphy";
+ power-domains = <0x8a 0x0c>;
+ rockchip,grf = <0x2f>;
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+ status = "okay";
+ phandle = <0x10c>;
+
+ ports {
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+
+ port@0 {
+ reg = <0x00>;
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+
+ endpoint@0 {
+ reg = <0x00>;
+ remote-endpoint = <0x13>;
+ status = "okay";
+ phandle = <0xa3>;
+ };
+ };
+ };
+
+ panel@0 {
+ compatible = "elida,kd35t133\0simple-panel-dsi";
+ reg = <0x00>;
+ backlight = <0x9d>;
+ backlight-supply = <0x9e>;
+ power-supply = <0x9f>;
+ reset-gpios = <0x97 0x10 0x01>;
+ prepare-delay-ms = <0x02>;
+ reset-delay-ms = <0x01>;
+ init-delay-ms = <0x14>;
+ enable-delay-ms = <0x78>;
+ disable-delay-ms = <0x32>;
+ unprepare-delay-ms = <0x14>;
+ width-mm = <0x34>;
+ height-mm = <0x46>;
+ dsi,flags = <0xa03>;
+ dsi,format = <0x00>;
+ dsi,lanes = <0x04>;
+ panel-init-sequence = <0x150002ff 0x30150002 0xff521500 0x2ff0115 0x2e300 0x15000240 0xa150002 0x3401500 0x2040015 0x20503 0x15000224 0x12150002 0x251e1500 0x2262815 0x22752 0x15000228 0x57150002 0x29011500 0x22adf15 0x2389c 0x15000239 0xa7150002 0x3a531500 0x2440015 0x2493c 0x15000259 0xfe150002 0x5c001500 0x2917715 0x29277 0x150002a0 0x55150002 0xa1501500 0x2a49c15 0x2a702 0x150002a8 0x1150002 0xa9011500 0x2aafc15 0x2ab28 0x150002ac 0x6150002 0xad061500 0x2ae0615 0x2af03 0x150002b0 0x8150002 0xb1261500 0x2b22815 0x2b328 0x150002b4 0x33150002 0xb5081500 0x2b62615 0x2b708 0x150002b8 0x26150002 0xff301500 0x2ff5215 0x2ff02 0x150002b0 0xb150002 0xb1161500 0x2b21715 0x2b32c 0x150002b4 0x32150002 0xb53b1500 0x2b62915 0x2b740 0x150002b8 0xd150002 0xb9051500 0x2ba1215 0x2bb10 0x150002bc 0x12150002 0xbd151500 0x2be1915 0x2bf0e 0x150002c0 0x16150002 0xc10a1500 0x2d00c15 0x2d117 0x150002d2 0x14150002 0xd32e1500 0x2d43215 0x2d53c 0x150002d6 0x22150002 0xd73d1500 0x2d80d15 0x2d907 0x150002da 0x13150002 0xdb131500 0x2dc1115 0x2dd15 0x150002de 0x19150002 0xdf101500 0x2e01715 0x2e10a 0x150002ff 0x30150002 0xff521500 0x2ff0315 0x2002a 0x15000201 0x2a150002 0x22a1500 0x2032a15 0x20461 0x15000205 0x80150002 0x6c71500 0x2070115 0x20882 0x15000209 0x83150002 0x302a1500 0x2312a15 0x2322a 0x15000233 0x2a150002 0x34611500 0x235c515 0x23680 0x15000237 0x23150002 0x40821500 0x2418315 0x24280 0x15000243 0x81150002 0x44111500 0x245e615 0x246e5 0x15000247 0x11150002 0x48e81500 0x249e715 0x25002 0x15000251 0x1150002 0x52041500 0x2530315 0x25411 0x15000255 0xea150002 0x56e91500 0x2571115 0x258ec 0x15000259 0xeb150002 0x7e021500 0x27f8015 0x2e05a 0x150002b1 0x150002 0xb40e1500 0x2b50f15 0x2b604 0x150002b7 0x7150002 0xb8061500 0x2b90515 0x2ba0f 0x150002c7 0x150002 0xca0e1500 0x2cb0f15 0x2cc04 0x150002cd 0x7150002 0xce061500 0x2cf0515 0x2d00f 0x15000281 0xf150002 0x840e1500 0x2850f15 0x28607 0x15000287 0x4150002 0x88051500 0x2890615 0x28a00 0x15000297 0xf150002 0x9a0e1500 0x29b0f15 0x29c07 0x1500029d 0x4150002 0x9e051500 0x29f0615 0x2a000 0x150002ff 0x30150002 0xff521500 0x2ff0215 0x20101 0x15000202 0xda150002 0x3ba1500 0x204a815 0x2059a 0x15000206 0x70150002 0x7ff1500 0x2089115 0x20990 0x1500020a 0xff150002 0xb8f1500 0x20c6015 0x20d58 0x1500020e 0x48150002 0xf381500 0x2102b15 0x2ff30 0x150002ff 0x52150002 0xff001500 0x2360215 0x23a70 0x5c80111 0x50a0129>;
+ panel-exit-sequence = <0x5140128 0x50a0110>;
+
+ display-timings {
+ native-mode = <0xa0>;
+
+ 60Hz {
+ clock-frequency = <0x192d500>;
+ hactive = <0x280>;
+ vactive = <0x1e0>;
+ hfront-porch = <0x77>;
+ hsync-len = <0x02>;
+ hback-porch = <0x77>;
+ vfront-porch = <0x0d>;
+ vsync-len = <0x02>;
+ vback-porch = <0x05>;
+ hsync-active = <0x00>;
+ vsync-active = <0x00>;
+ de-active = <0x00>;
+ pixelclk-active = <0x00>;
+ phandle = <0xa0>;
+ };
+
+ 50Hz {
+ clock-frequency = <0x192d500>;
+ hactive = <0x280>;
+ vactive = <0x1e0>;
+ hfront-porch = <0xcf>;
+ hsync-len = <0x02>;
+ hback-porch = <0xcf>;
+ vfront-porch = <0x0d>;
+ vsync-len = <0x02>;
+ vback-porch = <0x05>;
+ hsync-active = <0x00>;
+ vsync-active = <0x00>;
+ de-active = <0x00>;
+ pixelclk-active = <0x00>;
+ phandle = <0x10d>;
+ };
+
+ 75Hz {
+ clock-frequency = <0x192d500>;
+ hactive = <0x280>;
+ vactive = <0x1e0>;
+ hfront-porch = <0x1f>;
+ hsync-len = <0x02>;
+ hback-porch = <0x1f>;
+ vfront-porch = <0x0d>;
+ vsync-len = <0x02>;
+ vback-porch = <0x05>;
+ hsync-active = <0x00>;
+ vsync-active = <0x00>;
+ de-active = <0x00>;
+ pixelclk-active = <0x00>;
+ phandle = <0x10e>;
+ };
+ };
+ };
+ };
+
+ vop@ff460000 {
+ compatible = "rockchip,px30-vop-big";
+ reg = <0x00 0xff460000 0x00 0x1fc 0x00 0xff460a00 0x00 0x400>;
+ rockchip,grf = <0x2f>;
+ reg-names = "regs\0gamma_lut";
+ interrupts = <0x00 0x4d 0x04>;
+ clocks = <0x02 0xb5 0x02 0x96 0x02 0xfb>;
+ clock-names = "aclk_vop\0dclk_vop\0hclk_vop";
+ power-domains = <0x8a 0x0c>;
+ iommus = <0xa1>;
+ status = "okay";
+ phandle = <0x10f>;
+
+ port {
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+ phandle = <0x10>;
+
+ endpoint@0 {
+ reg = <0x00>;
+ remote-endpoint = <0xa2>;
+ phandle = <0x12>;
+ };
+
+ endpoint@1 {
+ reg = <0x01>;
+ remote-endpoint = <0xa3>;
+ phandle = <0x13>;
+ };
+
+ endpoint@2 {
+ reg = <0x02>;
+ remote-endpoint = <0xa4>;
+ phandle = <0x14>;
+ };
+ };
+ };
+
+ iommu@ff460f00 {
+ compatible = "rockchip,iommu";
+ reg = <0x00 0xff460f00 0x00 0x100>;
+ interrupts = <0x00 0x4d 0x04>;
+ interrupt-names = "vopb_mmu";
+ clocks = <0x02 0xb5 0x02 0xfb>;
+ clock-names = "aclk\0hclk";
+ power-domains = <0x8a 0x0c>;
+ #iommu-cells = <0x00>;
+ status = "okay";
+ phandle = <0xa1>;
+ };
+
+ rk_rga@ff480000 {
+ compatible = "rockchip,rga2";
+ reg = <0x00 0xff480000 0x00 0x1000>;
+ interrupts = <0x00 0x4c 0x04>;
+ clocks = <0x02 0xb7 0x02 0xfd 0x02 0x35>;
+ clock-names = "aclk_rga\0hclk_rga\0clk_rga";
+ power-domains = <0x8a 0x0c>;
+ dma-coherent;
+ status = "okay";
+ phandle = <0x110>;
+ };
+
+ cif@ff490000 {
+ compatible = "rockchip,cif";
+ reg = <0x00 0xff490000 0x00 0x200>;
+ interrupts = <0x00 0x45 0x04>;
+ clocks = <0x02 0xb3 0x02 0xf9 0x02 0x160 0x02 0x34>;
+ clock-names = "aclk_cif0\0hclk_cif0\0pclk_cif\0cif0_out";
+ resets = <0x02 0x2c 0x02 0x2d 0x02 0x2e>;
+ reset-names = "rst_cif_a\0rst_cif_h\0rst_cif_pclkin";
+ power-domains = <0x8a 0x0d>;
+ pinctrl-names = "cif_pin_all";
+ pinctrl-0 = <0xa5>;
+ iommus = <0xa6>;
+ status = "disabled";
+ phandle = <0x111>;
+ };
+
+ cif-new@ff490000 {
+ compatible = "rockchip,px30-cif";
+ reg = <0x00 0xff490000 0x00 0x200>;
+ interrupts = <0x00 0x45 0x04>;
+ clocks = <0x02 0xb3 0x02 0xf9 0x02 0x160 0x02 0x34>;
+ clock-names = "aclk_cif\0hclk_cif\0pclk_cif\0cif_out";
+ resets = <0x02 0x2c 0x02 0x2d 0x02 0x2e>;
+ reset-names = "rst_cif_a\0rst_cif_h\0rst_cif_pclkin";
+ power-domains = <0x8a 0x0d>;
+ iommus = <0xa6>;
+ status = "disabled";
+ phandle = <0x112>;
+ };
+
+ iommu@ff490800 {
+ compatible = "rockchip,iommu";
+ reg = <0x00 0xff490800 0x00 0x100>;
+ interrupts = <0x00 0x45 0x04>;
+ interrupt-names = "vip_mmu";
+ clocks = <0x02 0xb3 0x02 0xf9>;
+ clock-names = "aclk\0hclk";
+ power-domains = <0x8a 0x0d>;
+ rk_iommu,disable_reset_quirk;
+ #iommu-cells = <0x00>;
+ status = "okay";
+ phandle = <0xa6>;
+ };
+
+ rk_isp@ff4a0000 {
+ compatible = "rockchip,px30-isp\0rockchip,isp";
+ reg = <0x00 0xff4a0000 0x00 0x8000>;
+ interrupts = <0x00 0x46 0x04>;
+ clocks = <0x02 0xb4 0x02 0xfa 0x02 0x33 0x02 0x33 0x02 0x15f 0x02 0x34 0x02 0x34 0x02 0x146>;
+ clock-names = "aclk_isp\0hclk_isp\0clk_isp\0clk_isp_jpe\0pclkin_isp\0clk_cif_pll\0clk_cif_out\0pclk_dphyrx";
+ resets = <0x02 0x2b 0x02 0x2f>;
+ reset-names = "rst_isp\0rst_mipicsiphy";
+ power-domains = <0x8a 0x0d>;
+ pinctrl-names = "default\0isp_dvp8bit2\0isp_dvp10bit\0isp_dvp12bit";
+ pinctrl-0 = <0xa7>;
+ pinctrl-1 = <0xa5>;
+ pinctrl-2 = <0xa5 0xa8>;
+ pinctrl-3 = <0xa9 0xa5 0xa8>;
+ rockchip,isp,mipiphy = <0x01>;
+ rockchip,isp,csiphy,reg = <0xff2f0000 0x4000>;
+ rockchip,grf = <0x2f>;
+ rockchip,cru = <0x02>;
+ rockchip,isp,iommu-enable = <0x01>;
+ iommus = <0xaa>;
+ status = "disabled";
+ phandle = <0x113>;
+ };
+
+ rkisp1@ff4a0000 {
+ compatible = "rockchip,rk3326-rkisp1";
+ reg = <0x00 0xff4a0000 0x00 0x8000>;
+ interrupts = <0x00 0x46 0x04 0x00 0x49 0x04 0x00 0x4a 0x04>;
+ interrupt-names = "isp_irq\0mi_irq\0mipi_irq";
+ clocks = <0x02 0xb4 0x02 0xfa 0x02 0x33 0x02 0x15f>;
+ clock-names = "aclk_isp\0hclk_isp\0clk_isp\0pclk_isp";
+ devfreq = <0xab>;
+ power-domains = <0x8a 0x0d>;
+ iommus = <0xaa>;
+ rockchip,grf = <0x2f>;
+ status = "okay";
+ phandle = <0x114>;
+ };
+
+ iommu@ff4a8000 {
+ compatible = "rockchip,iommu";
+ reg = <0x00 0xff4a8000 0x00 0x100>;
+ interrupts = <0x00 0x46 0x04>;
+ interrupt-names = "isp_mmu";
+ clocks = <0x02 0xb4 0x02 0xfa>;
+ clock-names = "aclk\0hclk";
+ power-domains = <0x8a 0x0d>;
+ rk_iommu,disable_reset_quirk;
+ #iommu-cells = <0x00>;
+ status = "okay";
+ phandle = <0xaa>;
+ };
+
+ qos@ff518000 {
+ compatible = "syscon";
+ reg = <0x00 0xff518000 0x00 0x20>;
+ phandle = <0x18>;
+ };
+
+ qos@ff520000 {
+ compatible = "syscon";
+ reg = <0x00 0xff520000 0x00 0x20>;
+ phandle = <0x28>;
+ };
+
+ qos@ff52c000 {
+ compatible = "syscon";
+ reg = <0x00 0xff52c000 0x00 0x20>;
+ phandle = <0x17>;
+ };
+
+ qos@ff538000 {
+ compatible = "syscon";
+ reg = <0x00 0xff538000 0x00 0x20>;
+ phandle = <0x19>;
+ };
+
+ qos@ff538080 {
+ compatible = "syscon";
+ reg = <0x00 0xff538080 0x00 0x20>;
+ phandle = <0x1a>;
+ };
+
+ qos@ff538100 {
+ compatible = "syscon";
+ reg = <0x00 0xff538100 0x00 0x20>;
+ phandle = <0x1b>;
+ };
+
+ qos@ff538180 {
+ compatible = "syscon";
+ reg = <0x00 0xff538180 0x00 0x20>;
+ phandle = <0x1c>;
+ };
+
+ qos@ff540000 {
+ compatible = "syscon";
+ reg = <0x00 0xff540000 0x00 0x20>;
+ phandle = <0x15>;
+ };
+
+ qos@ff540080 {
+ compatible = "syscon";
+ reg = <0x00 0xff540080 0x00 0x20>;
+ phandle = <0x16>;
+ };
+
+ qos@ff548000 {
+ compatible = "syscon";
+ reg = <0x00 0xff548000 0x00 0x20>;
+ phandle = <0x23>;
+ };
+
+ qos@ff548080 {
+ compatible = "syscon";
+ reg = <0x00 0xff548080 0x00 0x20>;
+ phandle = <0x24>;
+ };
+
+ qos@ff548100 {
+ compatible = "syscon";
+ reg = <0x00 0xff548100 0x00 0x20>;
+ phandle = <0x25>;
+ };
+
+ qos@ff548180 {
+ compatible = "syscon";
+ reg = <0x00 0xff548180 0x00 0x20>;
+ phandle = <0x26>;
+ };
+
+ qos@ff548200 {
+ compatible = "syscon";
+ reg = <0x00 0xff548200 0x00 0x20>;
+ phandle = <0x27>;
+ };
+
+ qos@ff550000 {
+ compatible = "syscon";
+ reg = <0x00 0xff550000 0x00 0x20>;
+ phandle = <0x1f>;
+ };
+
+ qos@ff550080 {
+ compatible = "syscon";
+ reg = <0x00 0xff550080 0x00 0x20>;
+ phandle = <0x20>;
+ };
+
+ qos@ff550100 {
+ compatible = "syscon";
+ reg = <0x00 0xff550100 0x00 0x20>;
+ phandle = <0x21>;
+ };
+
+ qos@ff550180 {
+ compatible = "syscon";
+ reg = <0x00 0xff550180 0x00 0x20>;
+ phandle = <0x22>;
+ };
+
+ qos@ff558000 {
+ compatible = "syscon";
+ reg = <0x00 0xff558000 0x00 0x20>;
+ phandle = <0x1d>;
+ };
+
+ qos@ff558080 {
+ compatible = "syscon";
+ reg = <0x00 0xff558080 0x00 0x20>;
+ phandle = <0x1e>;
+ };
+
+ dfi@ff610000 {
+ reg = <0x00 0xff610000 0x00 0x400>;
+ compatible = "rockchip,px30-dfi";
+ rockchip,pmugrf = <0xac>;
+ status = "okay";
+ phandle = <0xad>;
+ };
+
+ dmc {
+ compatible = "rockchip,px30-dmc";
+ interrupts = <0x00 0x69 0x04>;
+ interrupt-names = "complete_irq";
+ devfreq-events = <0xad>;
+ clocks = <0x02 0x54>;
+ clock-names = "dmc_clk";
+ operating-points-v2 = <0xae>;
+ ddr_timing = <0xaf>;
+ upthreshold = <0x28>;
+ downdifferential = <0x14>;
+ system-status-freq = <0x01 0x80e80 0x08 0x6ddd0 0x02 0x2f5d0 0x20 0x6ddd0 0x1000 0x80e80 0x4000 0xa2990 0x2000 0xa2990>;
+ auto-min-freq = <0x50140>;
+ auto-freq-en = <0x01>;
+ #cooling-cells = <0x02>;
+ status = "okay";
+ center-supply = <0x0e>;
+ phandle = <0xab>;
+
+ ddr_power_model {
+ compatible = "ddr_power_model";
+ dynamic-power-coefficient = <0x78>;
+ static-power-coefficient = <0xc8>;
+ ts = <0x7d00 0x125c 0xffffffb0 0x02>;
+ thermal-zone = "soc-thermal";
+ phandle = <0x115>;
+ };
+ };
+
+ dmc-opp-table {
+ compatible = "operating-points-v2";
+ rockchip,max-volt = <0x118c30>;
+ rockchip,evb-irdrop = <0x61a8>;
+ rockchip,pvtm-voltage-sel = <0x00 0xc350 0x00 0xc351 0xd2f0 0x01 0xd2f1 0xea60 0x02 0xea61 0x1869f 0x03>;
+ rockchip,pvtm-ch = <0x00 0x00>;
+ phandle = <0xae>;
+
+ opp-528000000 {
+ opp-hz = <0x00 0x1f78a400>;
+ opp-microvolt = <0xee098>;
+ opp-microvolt-L0 = <0xee098>;
+ opp-microvolt-L1 = <0xee098>;
+ opp-microvolt-L2 = <0xe7ef0>;
+ opp-microvolt-L3 = <0xe7ef0>;
+ };
+
+ opp-666000000 {
+ opp-hz = <0x00 0x27b25a80>;
+ opp-microvolt = <0x100590>;
+ opp-microvolt-L0 = <0x100590>;
+ opp-microvolt-L1 = <0xf4240>;
+ opp-microvolt-L2 = <0xee098>;
+ opp-microvolt-L3 = <0xe7ef0>;
+ };
+
+ opp-786000000 {
+ opp-hz = <0x00 0x2ed96880>;
+ opp-microvolt = <0x10c8e0>;
+ opp-microvolt-L0 = <0x10c8e0>;
+ opp-microvolt-L1 = <0x100590>;
+ opp-microvolt-L2 = <0xfa3e8>;
+ opp-microvolt-L3 = <0xf4240>;
+ status = "okay";
+ };
+ };
+
+ rockchip-system-monitor {
+ compatible = "rockchip,system-monitor";
+ rockchip,thermal-zone = "soc-thermal";
+ rockchip,polling-delay = <0xc8>;
+ phandle = <0x116>;
+ };
+
+ pinctrl {
+ compatible = "rockchip,px30-pinctrl";
+ rockchip,grf = <0x2f>;
+ rockchip,pmu = <0xac>;
+ #address-cells = <0x02>;
+ #size-cells = <0x02>;
+ ranges;
+ phandle = <0x117>;
+
+ gpio0@ff040000 {
+ compatible = "rockchip,gpio-bank";
+ reg = <0x00 0xff040000 0x00 0x100>;
+ interrupts = <0x00 0x03 0x04>;
+ clocks = <0x2a 0x14>;
+ gpio-controller;
+ #gpio-cells = <0x02>;
+ interrupt-controller;
+ #interrupt-cells = <0x02>;
+ phandle = <0x5c>;
+ };
+
+ gpio1@ff250000 {
+ compatible = "rockchip,gpio-bank";
+ reg = <0x00 0xff250000 0x00 0x100>;
+ interrupts = <0x00 0x04 0x04>;
+ clocks = <0x02 0x15c>;
+ gpio-controller;
+ #gpio-cells = <0x02>;
+ interrupt-controller;
+ #interrupt-cells = <0x02>;
+ phandle = <0xbf>;
+ };
+
+ gpio2@ff260000 {
+ compatible = "rockchip,gpio-bank";
+ reg = <0x00 0xff260000 0x00 0x100>;
+ interrupts = <0x00 0x05 0x04>;
+ clocks = <0x02 0x15d>;
+ gpio-controller;
+ #gpio-cells = <0x02>;
+ interrupt-controller;
+ #interrupt-cells = <0x02>;
+ phandle = <0x66>;
+ };
+
+ gpio3@ff270000 {
+ compatible = "rockchip,gpio-bank";
+ reg = <0x00 0xff270000 0x00 0x100>;
+ interrupts = <0x00 0x06 0x04>;
+ clocks = <0x02 0x15e>;
+ gpio-controller;
+ #gpio-cells = <0x02>;
+ interrupt-controller;
+ #interrupt-cells = <0x02>;
+ phandle = <0x97>;
+ };
+
+ pcfg-pull-up {
+ bias-pull-up;
+ phandle = <0xb2>;
+ };
+
+ pcfg-pull-down {
+ bias-pull-down;
+ phandle = <0x118>;
+ };
+
+ pcfg-pull-none {
+ bias-disable;
+ phandle = <0xb1>;
+ };
+
+ pcfg-pull-none-2ma {
+ bias-disable;
+ drive-strength = <0x02>;
+ phandle = <0x119>;
+ };
+
+ pcfg-pull-up-2ma {
+ bias-pull-up;
+ drive-strength = <0x02>;
+ phandle = <0x11a>;
+ };
+
+ pcfg-pull-up-4ma {
+ bias-pull-up;
+ drive-strength = <0x04>;
+ phandle = <0xb3>;
+ };
+
+ pcfg-pull-none-4ma {
+ bias-disable;
+ drive-strength = <0x04>;
+ phandle = <0x11b>;
+ };
+
+ pcfg-pull-down-4ma {
+ bias-pull-down;
+ drive-strength = <0x04>;
+ phandle = <0x11c>;
+ };
+
+ pcfg-pull-none-8ma {
+ bias-disable;
+ drive-strength = <0x08>;
+ phandle = <0xb6>;
+ };
+
+ pcfg-pull-up-8ma {
+ bias-pull-up;
+ drive-strength = <0x08>;
+ phandle = <0xb4>;
+ };
+
+ pcfg-pull-none-12ma {
+ bias-disable;
+ drive-strength = <0x0c>;
+ phandle = <0xb8>;
+ };
+
+ pcfg-pull-up-12ma {
+ bias-pull-up;
+ drive-strength = <0x0c>;
+ phandle = <0xb7>;
+ };
+
+ pcfg-pull-none-smt {
+ bias-disable;
+ input-schmitt-enable;
+ phandle = <0xb0>;
+ };
+
+ pcfg-output-high {
+ output-high;
+ phandle = <0x11d>;
+ };
+
+ pcfg-output-low {
+ output-low;
+ phandle = <0xb9>;
+ };
+
+ pcfg-input-high {
+ bias-pull-up;
+ input-enable;
+ phandle = <0xb5>;
+ };
+
+ pcfg-input {
+ input-enable;
+ phandle = <0x11e>;
+ };
+
+ i2c0 {
+
+ i2c0-xfer {
+ rockchip,pins = <0x00 0x08 0x01 0xb0 0x00 0x09 0x01 0xb0>;
+ phandle = <0x5b>;
+ };
+ };
+
+ i2c1 {
+
+ i2c1-xfer {
+ rockchip,pins = <0x00 0x12 0x01 0xb0 0x00 0x13 0x01 0xb0>;
+ phandle = <0x69>;
+ };
+ };
+
+ i2c2 {
+
+ i2c2-xfer {
+ rockchip,pins = <0x02 0x0f 0x02 0xb0 0x02 0x10 0x02 0xb0>;
+ phandle = <0x6a>;
+ };
+ };
+
+ i2c3 {
+
+ i2c3-xfer {
+ rockchip,pins = <0x01 0x0c 0x04 0xb0 0x01 0x0d 0x04 0xb0>;
+ phandle = <0x6b>;
+ };
+ };
+
+ tsadc {
+
+ tsadc-otp-gpio {
+ rockchip,pins = <0x00 0x06 0x00 0xb1>;
+ phandle = <0x86>;
+ };
+
+ tsadc-otp-out {
+ rockchip,pins = <0x00 0x06 0x01 0xb1>;
+ phandle = <0x87>;
+ };
+ };
+
+ uart0 {
+
+ uart0-xfer {
+ rockchip,pins = <0x00 0x0a 0x01 0xb2 0x00 0x0b 0x01 0xb2>;
+ phandle = <0x2c>;
+ };
+
+ uart0-cts {
+ rockchip,pins = <0x00 0x0c 0x01 0xb1>;
+ phandle = <0x2d>;
+ };
+
+ uart0-rts {
+ rockchip,pins = <0x00 0x0d 0x01 0xb1>;
+ phandle = <0x2e>;
+ };
+
+ uart0-rts-gpio {
+ rockchip,pins = <0x00 0x0d 0x00 0xb1>;
+ phandle = <0x11f>;
+ };
+ };
+
+ uart1 {
+
+ uart1-xfer {
+ rockchip,pins = <0x01 0x11 0x01 0xb2 0x01 0x10 0x01 0xb2>;
+ phandle = <0x4f>;
+ };
+
+ uart1-cts {
+ rockchip,pins = <0x01 0x12 0x01 0xb1>;
+ phandle = <0x50>;
+ };
+
+ uart1-rts {
+ rockchip,pins = <0x01 0x13 0x01 0xb1>;
+ phandle = <0x120>;
+ };
+
+ uart1-rts-gpio {
+ rockchip,pins = <0x01 0x13 0x00 0xb1>;
+ phandle = <0x121>;
+ };
+ };
+
+ uart2-m0 {
+
+ uart2m0-xfer {
+ rockchip,pins = <0x01 0x1a 0x02 0xb2 0x01 0x1b 0x02 0xb2>;
+ phandle = <0x51>;
+ };
+ };
+
+ uart2-m1 {
+
+ uart2m1-xfer {
+ rockchip,pins = <0x02 0x0c 0x02 0xb2 0x02 0x0e 0x02 0xb2>;
+ phandle = <0xba>;
+ };
+ };
+
+ uart3-m0 {
+
+ uart3m0-xfer {
+ rockchip,pins = <0x00 0x10 0x02 0xb2 0x00 0x11 0x02 0xb2>;
+ phandle = <0x122>;
+ };
+
+ uart3m0-cts {
+ rockchip,pins = <0x00 0x12 0x02 0xb1>;
+ phandle = <0x123>;
+ };
+
+ uart3m0-rts {
+ rockchip,pins = <0x00 0x13 0x02 0xb1>;
+ phandle = <0x124>;
+ };
+
+ uart3m0-rts-gpio {
+ rockchip,pins = <0x00 0x13 0x00 0xb1>;
+ phandle = <0x125>;
+ };
+ };
+
+ uart3-m1 {
+
+ uart3m1-xfer {
+ rockchip,pins = <0x01 0x0e 0x02 0xb2 0x01 0x0f 0x02 0xb2>;
+ phandle = <0x52>;
+ };
+
+ uart3m1-cts {
+ rockchip,pins = <0x01 0x0c 0x02 0xb1>;
+ phandle = <0x53>;
+ };
+
+ uart3m1-rts {
+ rockchip,pins = <0x01 0x0d 0x02 0xb1>;
+ phandle = <0x54>;
+ };
+
+ uart3m1-rts-gpio {
+ rockchip,pins = <0x01 0x0d 0x00 0xb1>;
+ phandle = <0x126>;
+ };
+ };
+
+ uart4 {
+
+ uart4-xfer {
+ rockchip,pins = <0x01 0x1c 0x02 0xb2 0x01 0x1d 0x02 0xb2>;
+ phandle = <0x55>;
+ };
+
+ uart4-cts {
+ rockchip,pins = <0x01 0x1e 0x02 0xb1>;
+ phandle = <0x56>;
+ };
+
+ uart4-rts {
+ rockchip,pins = <0x01 0x1f 0x02 0xb1>;
+ phandle = <0x57>;
+ };
+ };
+
+ uart5 {
+
+ uart5-xfer {
+ rockchip,pins = <0x03 0x02 0x04 0xb2 0x03 0x01 0x04 0xb2>;
+ phandle = <0x58>;
+ };
+
+ uart5-cts {
+ rockchip,pins = <0x03 0x03 0x04 0xb1>;
+ phandle = <0x59>;
+ };
+
+ uart5-rts {
+ rockchip,pins = <0x03 0x05 0x04 0xb1>;
+ phandle = <0x5a>;
+ };
+ };
+
+ spi0 {
+
+ spi0-clk {
+ rockchip,pins = <0x01 0x0f 0x03 0xb3>;
+ phandle = <0x6c>;
+ };
+
+ spi0-csn {
+ rockchip,pins = <0x01 0x0e 0x03 0xb3>;
+ phandle = <0x6d>;
+ };
+
+ spi0-miso {
+ rockchip,pins = <0x01 0x0d 0x03 0xb3>;
+ phandle = <0x6e>;
+ };
+
+ spi0-mosi {
+ rockchip,pins = <0x01 0x0c 0x03 0xb3>;
+ phandle = <0x6f>;
+ };
+
+ spi0-clk-hs {
+ rockchip,pins = <0x01 0x0f 0x03 0xb4>;
+ phandle = <0x70>;
+ };
+
+ spi0-miso-hs {
+ rockchip,pins = <0x01 0x0d 0x03 0xb4>;
+ phandle = <0x71>;
+ };
+
+ spi0-mosi-hs {
+ rockchip,pins = <0x01 0x0c 0x03 0xb4>;
+ phandle = <0x72>;
+ };
+ };
+
+ spi1 {
+
+ spi1-clk {
+ rockchip,pins = <0x03 0x0f 0x04 0xb3>;
+ phandle = <0x73>;
+ };
+
+ spi1-csn0 {
+ rockchip,pins = <0x03 0x09 0x04 0xb3>;
+ phandle = <0x74>;
+ };
+
+ spi1-csn1 {
+ rockchip,pins = <0x03 0x0a 0x02 0xb3>;
+ phandle = <0x75>;
+ };
+
+ spi1-miso {
+ rockchip,pins = <0x03 0x0e 0x04 0xb3>;
+ phandle = <0x76>;
+ };
+
+ spi1-mosi {
+ rockchip,pins = <0x03 0x0c 0x04 0xb3>;
+ phandle = <0x77>;
+ };
+
+ spi1-clk-hs {
+ rockchip,pins = <0x03 0x0f 0x04 0xb4>;
+ phandle = <0x78>;
+ };
+
+ spi1-miso-hs {
+ rockchip,pins = <0x03 0x0e 0x04 0xb4>;
+ phandle = <0x79>;
+ };
+
+ spi1-mosi-hs {
+ rockchip,pins = <0x03 0x0c 0x04 0xb4>;
+ phandle = <0x7a>;
+ };
+ };
+
+ pdm {
+
+ pdm-clk0m0 {
+ rockchip,pins = <0x03 0x16 0x02 0xb1>;
+ phandle = <0x44>;
+ };
+
+ pdm-clk0m1 {
+ rockchip,pins = <0x02 0x16 0x01 0xb1>;
+ phandle = <0x127>;
+ };
+
+ pdm-clk1 {
+ rockchip,pins = <0x03 0x17 0x02 0xb1>;
+ phandle = <0x45>;
+ };
+
+ pdm-sdi0m0 {
+ rockchip,pins = <0x03 0x1b 0x02 0xb1>;
+ phandle = <0x46>;
+ };
+
+ pdm-sdi0m1 {
+ rockchip,pins = <0x02 0x15 0x02 0xb1>;
+ phandle = <0x128>;
+ };
+
+ pdm-sdi1 {
+ rockchip,pins = <0x03 0x18 0x02 0xb1>;
+ phandle = <0x47>;
+ };
+
+ pdm-sdi2 {
+ rockchip,pins = <0x03 0x19 0x02 0xb1>;
+ phandle = <0x48>;
+ };
+
+ pdm-sdi3 {
+ rockchip,pins = <0x03 0x1a 0x02 0xb1>;
+ phandle = <0x49>;
+ };
+
+ pdm-clk0m0-sleep {
+ rockchip,pins = <0x03 0x16 0x00 0xb5>;
+ phandle = <0x129>;
+ };
+
+ pdm-clk0m1-sleep {
+ rockchip,pins = <0x02 0x16 0x00 0xb5>;
+ phandle = <0x12a>;
+ };
+
+ pdm-clk1-sleep {
+ rockchip,pins = <0x03 0x17 0x00 0xb5>;
+ phandle = <0x12b>;
+ };
+
+ pdm-sdi0m0-sleep {
+ rockchip,pins = <0x03 0x1b 0x00 0xb5>;
+ phandle = <0x12c>;
+ };
+
+ pdm-sdi0m1-sleep {
+ rockchip,pins = <0x02 0x15 0x00 0xb5>;
+ phandle = <0x12d>;
+ };
+
+ pdm-sdi1-sleep {
+ rockchip,pins = <0x03 0x18 0x00 0xb5>;
+ phandle = <0x12e>;
+ };
+
+ pdm-sdi2-sleep {
+ rockchip,pins = <0x03 0x19 0x00 0xb5>;
+ phandle = <0x12f>;
+ };
+
+ pdm-sdi3-sleep {
+ rockchip,pins = <0x03 0x1a 0x00 0xb5>;
+ phandle = <0x130>;
+ };
+ };
+
+ i2s0 {
+
+ i2s0-8ch-mclk {
+ rockchip,pins = <0x03 0x11 0x02 0xb1>;
+ phandle = <0x131>;
+ };
+
+ i2s0-8ch-sclktx {
+ rockchip,pins = <0x03 0x13 0x02 0xb1>;
+ phandle = <0x30>;
+ };
+
+ i2s0-8ch-sclkrx {
+ rockchip,pins = <0x03 0x0c 0x02 0xb1>;
+ phandle = <0x31>;
+ };
+
+ i2s0-8ch-lrcktx {
+ rockchip,pins = <0x03 0x12 0x02 0xb1>;
+ phandle = <0x32>;
+ };
+
+ i2s0-8ch-lrckrx {
+ rockchip,pins = <0x03 0x0d 0x02 0xb1>;
+ phandle = <0x33>;
+ };
+
+ i2s0-8ch-sdo0 {
+ rockchip,pins = <0x03 0x14 0x02 0xb1>;
+ phandle = <0x38>;
+ };
+
+ i2s0-8ch-sdo1 {
+ rockchip,pins = <0x03 0x10 0x02 0xb1>;
+ phandle = <0x39>;
+ };
+
+ i2s0-8ch-sdo2 {
+ rockchip,pins = <0x03 0x0f 0x02 0xb1>;
+ phandle = <0x3a>;
+ };
+
+ i2s0-8ch-sdo3 {
+ rockchip,pins = <0x03 0x0e 0x02 0xb1>;
+ phandle = <0x3b>;
+ };
+
+ i2s0-8ch-sdi0 {
+ rockchip,pins = <0x03 0x15 0x02 0xb1>;
+ phandle = <0x34>;
+ };
+
+ i2s0-8ch-sdi1 {
+ rockchip,pins = <0x03 0x0b 0x02 0xb1>;
+ phandle = <0x35>;
+ };
+
+ i2s0-8ch-sdi2 {
+ rockchip,pins = <0x03 0x09 0x02 0xb1>;
+ phandle = <0x36>;
+ };
+
+ i2s0-8ch-sdi3 {
+ rockchip,pins = <0x03 0x08 0x02 0xb1>;
+ phandle = <0x37>;
+ };
+ };
+
+ i2s1 {
+
+ i2s1-2ch-mclk {
+ rockchip,pins = <0x02 0x13 0x01 0xb1>;
+ phandle = <0x68>;
+ };
+
+ i2s1-2ch-sclk {
+ rockchip,pins = <0x02 0x12 0x01 0xb1>;
+ phandle = <0x3c>;
+ };
+
+ i2s1-2ch-lrck {
+ rockchip,pins = <0x02 0x11 0x01 0xb1>;
+ phandle = <0x3d>;
+ };
+
+ i2s1-2ch-sdi {
+ rockchip,pins = <0x02 0x15 0x01 0xb1>;
+ phandle = <0x3e>;
+ };
+
+ i2s1-2ch-sdo {
+ rockchip,pins = <0x02 0x14 0x01 0xb1>;
+ phandle = <0x3f>;
+ };
+ };
+
+ i2s2 {
+
+ i2s2-2ch-mclk {
+ rockchip,pins = <0x03 0x01 0x02 0xb1>;
+ phandle = <0x132>;
+ };
+
+ i2s2-2ch-sclk {
+ rockchip,pins = <0x03 0x02 0x02 0xb1>;
+ phandle = <0x40>;
+ };
+
+ i2s2-2ch-lrck {
+ rockchip,pins = <0x03 0x03 0x02 0xb1>;
+ phandle = <0x41>;
+ };
+
+ i2s2-2ch-sdi {
+ rockchip,pins = <0x03 0x05 0x02 0xb1>;
+ phandle = <0x42>;
+ };
+
+ i2s2-2ch-sdo {
+ rockchip,pins = <0x03 0x07 0x02 0xb1>;
+ phandle = <0x43>;
+ };
+ };
+
+ sdmmc {
+
+ sdmmc-clk {
+ rockchip,pins = <0x01 0x1e 0x01 0xb6>;
+ phandle = <0x8f>;
+ };
+
+ sdmmc-cmd {
+ rockchip,pins = <0x01 0x1f 0x01 0xb4>;
+ phandle = <0x90>;
+ };
+
+ sdmmc-det {
+ rockchip,pins = <0x00 0x03 0x01 0xb4>;
+ phandle = <0x91>;
+ };
+
+ sdmmc-bus1 {
+ rockchip,pins = <0x01 0x1a 0x01 0xb4>;
+ phandle = <0x133>;
+ };
+
+ sdmmc-bus4 {
+ rockchip,pins = <0x01 0x1a 0x01 0xb4 0x01 0x1b 0x01 0xb4 0x01 0x1c 0x01 0xb4 0x01 0x1d 0x01 0xb4>;
+ phandle = <0x92>;
+ };
+
+ sdmmc-gpio {
+ rockchip,pins = <0x01 0x1a 0x00 0xb3 0x01 0x1b 0x00 0xb3 0x01 0x1c 0x00 0xb3 0x01 0x1d 0x00 0xb3 0x01 0x1e 0x00 0xb3 0x01 0x1f 0x00 0xb3>;
+ phandle = <0x134>;
+ };
+ };
+
+ sdio {
+
+ sdio-clk {
+ rockchip,pins = <0x01 0x15 0x01 0xb1>;
+ phandle = <0x96>;
+ };
+
+ sdio-cmd {
+ rockchip,pins = <0x01 0x14 0x01 0xb2>;
+ phandle = <0x95>;
+ };
+
+ sdio-bus4 {
+ rockchip,pins = <0x01 0x16 0x01 0xb2 0x01 0x17 0x01 0xb2 0x01 0x18 0x01 0xb2 0x01 0x19 0x01 0xb2>;
+ phandle = <0x94>;
+ };
+
+ sdio-gpio {
+ rockchip,pins = <0x01 0x16 0x00 0xb2 0x01 0x17 0x00 0xb2 0x01 0x18 0x00 0xb2 0x01 0x19 0x00 0xb2 0x01 0x14 0x00 0xb2 0x01 0x15 0x00 0xb2>;
+ phandle = <0x135>;
+ };
+ };
+
+ emmc {
+
+ emmc-clk {
+ rockchip,pins = <0x01 0x09 0x02 0xb6>;
+ phandle = <0x136>;
+ };
+
+ emmc-cmd {
+ rockchip,pins = <0x01 0x0a 0x02 0xb4>;
+ phandle = <0x137>;
+ };
+
+ emmc-pwren {
+ rockchip,pins = <0x01 0x08 0x02 0xb1>;
+ phandle = <0x138>;
+ };
+
+ emmc-rstnout {
+ rockchip,pins = <0x01 0x0b 0x02 0xb1>;
+ phandle = <0x139>;
+ };
+
+ emmc-bus1 {
+ rockchip,pins = <0x01 0x00 0x02 0xb4>;
+ phandle = <0x13a>;
+ };
+
+ emmc-bus4 {
+ rockchip,pins = <0x01 0x00 0x02 0xb4 0x01 0x01 0x02 0xb4 0x01 0x02 0x02 0xb4 0x01 0x03 0x02 0xb4>;
+ phandle = <0x13b>;
+ };
+
+ emmc-bus8 {
+ rockchip,pins = <0x01 0x00 0x02 0xb4 0x01 0x01 0x02 0xb4 0x01 0x02 0x02 0xb4 0x01 0x03 0x02 0xb4 0x01 0x04 0x02 0xb4 0x01 0x05 0x02 0xb4 0x01 0x06 0x02 0xb4 0x01 0x07 0x02 0xb4>;
+ phandle = <0x13c>;
+ };
+ };
+
+ flash {
+
+ flash-cs0 {
+ rockchip,pins = <0x01 0x08 0x01 0xb1>;
+ phandle = <0x13d>;
+ };
+
+ flash-rdy {
+ rockchip,pins = <0x01 0x09 0x01 0xb1>;
+ phandle = <0x13e>;
+ };
+
+ flash-dqs {
+ rockchip,pins = <0x01 0x0a 0x01 0xb1>;
+ phandle = <0x13f>;
+ };
+
+ flash-ale {
+ rockchip,pins = <0x01 0x0b 0x01 0xb1>;
+ phandle = <0x140>;
+ };
+
+ flash-cle {
+ rockchip,pins = <0x01 0x0c 0x01 0xb1>;
+ phandle = <0x141>;
+ };
+
+ flash-wrn {
+ rockchip,pins = <0x01 0x0d 0x01 0xb1>;
+ phandle = <0x142>;
+ };
+
+ flash-csl {
+ rockchip,pins = <0x01 0x0e 0x01 0xb1>;
+ phandle = <0x143>;
+ };
+
+ flash-rdn {
+ rockchip,pins = <0x01 0x0f 0x01 0xb1>;
+ phandle = <0x144>;
+ };
+
+ flash-bus8 {
+ rockchip,pins = <0x01 0x00 0x01 0xb7 0x01 0x01 0x01 0xb7 0x01 0x02 0x01 0xb7 0x01 0x03 0x01 0xb7 0x01 0x04 0x01 0xb7 0x01 0x05 0x01 0xb7 0x01 0x06 0x01 0xb7 0x01 0x07 0x01 0xb7>;
+ phandle = <0x145>;
+ };
+ };
+
+ lcdc {
+
+ lcdc-m0-rgb-pins {
+ rockchip,pins = <0x03 0x00 0x01 0xb6 0x03 0x01 0x01 0xb6 0x03 0x02 0x01 0xb6 0x03 0x03 0x01 0xb6 0x03 0x04 0x01 0xb6 0x03 0x05 0x01 0xb6 0x03 0x06 0x01 0xb6 0x03 0x07 0x01 0xb6 0x03 0x08 0x01 0xb6 0x03 0x09 0x01 0xb6 0x03 0x0a 0x01 0xb6 0x03 0x0b 0x01 0xb6 0x03 0x0c 0x01 0xb6 0x03 0x0d 0x01 0xb6 0x03 0x0e 0x01 0xb6 0x03 0x0f 0x01 0xb6 0x03 0x10 0x01 0xb6 0x03 0x11 0x01 0xb6 0x03 0x12 0x01 0xb6 0x03 0x13 0x01 0xb6 0x03 0x14 0x01 0xb6 0x03 0x15 0x01 0xb6 0x03 0x16 0x01 0xb6 0x03 0x17 0x01 0xb6 0x03 0x18 0x01 0xb6 0x03 0x19 0x01 0xb6 0x03 0x1a 0x01 0xb6 0x03 0x1b 0x01 0xb6>;
+ phandle = <0x146>;
+ };
+
+ lcdc-m0-sleep-pins {
+ rockchip,pins = <0x03 0x00 0x00 0xb1 0x03 0x01 0x00 0xb1 0x03 0x02 0x00 0xb1 0x03 0x03 0x00 0xb1 0x03 0x04 0x00 0xb1 0x03 0x05 0x00 0xb1 0x03 0x06 0x00 0xb1 0x03 0x07 0x00 0xb1 0x03 0x08 0x00 0xb1 0x03 0x09 0x00 0xb1 0x03 0x0a 0x00 0xb1 0x03 0x0b 0x00 0xb1 0x03 0x0c 0x00 0xb1 0x03 0x0d 0x00 0xb1 0x03 0x0e 0x00 0xb1 0x03 0x0f 0x00 0xb1 0x03 0x10 0x00 0xb1 0x03 0x11 0x00 0xb1 0x03 0x12 0x00 0xb1 0x03 0x13 0x00 0xb1 0x03 0x14 0x00 0xb1 0x03 0x15 0x00 0xb1 0x03 0x16 0x00 0xb1 0x03 0x17 0x00 0xb1 0x03 0x18 0x00 0xb1 0x03 0x19 0x00 0xb1 0x03 0x1a 0x00 0xb1 0x03 0x1b 0x00 0xb1>;
+ phandle = <0x147>;
+ };
+
+ lcdc-m1-rgb-pins {
+ rockchip,pins = <0x03 0x00 0x01 0xb6 0x03 0x04 0x01 0xb6 0x03 0x06 0x01 0xb6 0x03 0x0a 0x01 0xb6 0x03 0x0b 0x01 0xb6 0x03 0x0d 0x01 0xb6 0x03 0x10 0x01 0xb6 0x03 0x11 0x01 0xb6 0x03 0x12 0x01 0xb6 0x03 0x13 0x01 0xb6 0x03 0x14 0x01 0xb6 0x03 0x15 0x01 0xb6 0x03 0x16 0x01 0xb6 0x03 0x17 0x01 0xb6 0x03 0x18 0x01 0xb6 0x03 0x19 0x01 0xb6 0x03 0x1a 0x01 0xb6 0x03 0x1b 0x01 0xb6>;
+ phandle = <0x4d>;
+ };
+
+ lcdc-m1-sleep-pins {
+ rockchip,pins = <0x03 0x00 0x00 0xb1 0x03 0x04 0x00 0xb1 0x03 0x06 0x00 0xb1 0x03 0x0a 0x00 0xb1 0x03 0x0b 0x00 0xb1 0x03 0x0d 0x00 0xb1 0x03 0x10 0x00 0xb1 0x03 0x11 0x00 0xb1 0x03 0x12 0x00 0xb1 0x03 0x13 0x00 0xb1 0x03 0x14 0x00 0xb1 0x03 0x15 0x00 0xb1 0x03 0x16 0x00 0xb1 0x03 0x17 0x00 0xb1 0x03 0x18 0x00 0xb1 0x03 0x19 0x00 0xb1 0x03 0x1a 0x00 0xb1 0x03 0x1b 0x00 0xb1>;
+ phandle = <0x4e>;
+ };
+ };
+
+ pwm0 {
+
+ pwm0-pin {
+ rockchip,pins = <0x00 0x0f 0x01 0xb1>;
+ phandle = <0x7b>;
+ };
+ };
+
+ pwm1 {
+
+ pwm1-pin {
+ rockchip,pins = <0x00 0x10 0x01 0xb1>;
+ phandle = <0x7c>;
+ };
+ };
+
+ pwm2 {
+
+ pwm2-pin {
+ rockchip,pins = <0x02 0x0d 0x01 0xb1>;
+ phandle = <0x7d>;
+ };
+ };
+
+ pwm3 {
+
+ pwm3-pin {
+ rockchip,pins = <0x00 0x11 0x01 0xb1>;
+ phandle = <0x7e>;
+ };
+ };
+
+ pwm4 {
+
+ pwm4-pin {
+ rockchip,pins = <0x03 0x12 0x03 0xb1>;
+ phandle = <0x7f>;
+ };
+ };
+
+ pwm5 {
+
+ pwm5-pin {
+ rockchip,pins = <0x03 0x13 0x03 0xb1>;
+ phandle = <0x80>;
+ };
+ };
+
+ pwm6 {
+
+ pwm6-pin {
+ rockchip,pins = <0x03 0x14 0x03 0xb1>;
+ phandle = <0x81>;
+ };
+ };
+
+ pwm7 {
+
+ pwm7-pin {
+ rockchip,pins = <0x03 0x15 0x03 0xb1>;
+ phandle = <0x82>;
+ };
+ };
+
+ gmac {
+
+ rmii-pins {
+ rockchip,pins = <0x02 0x00 0x02 0xb8 0x02 0x01 0x02 0xb8 0x02 0x02 0x02 0xb8 0x02 0x03 0x02 0xb1 0x02 0x04 0x02 0xb1 0x02 0x05 0x02 0xb1 0x02 0x06 0x02 0xb1 0x02 0x07 0x02 0xb1 0x02 0x09 0x02 0xb1>;
+ phandle = <0x8d>;
+ };
+
+ mac-refclk-12ma {
+ rockchip,pins = <0x02 0x0a 0x02 0xb8>;
+ phandle = <0x8e>;
+ };
+
+ mac-refclk {
+ rockchip,pins = <0x02 0x0a 0x02 0xb1>;
+ phandle = <0x148>;
+ };
+ };
+
+ cif-m0 {
+
+ cif-clkout-m0 {
+ rockchip,pins = <0x02 0x0b 0x01 0xb8>;
+ phandle = <0xa7>;
+ };
+
+ dvp-d2d9-m0 {
+ rockchip,pins = <0x02 0x00 0x01 0xb1 0x02 0x01 0x01 0xb1 0x02 0x02 0x01 0xb1 0x02 0x03 0x01 0xb1 0x02 0x04 0x01 0xb1 0x02 0x05 0x01 0xb1 0x02 0x06 0x01 0xb1 0x02 0x07 0x01 0xb1 0x02 0x08 0x01 0xb1 0x02 0x09 0x01 0xb1 0x02 0x0a 0x01 0xb1 0x02 0x0b 0x01 0xb1>;
+ phandle = <0xa5>;
+ };
+
+ dvp-d0d1-m0 {
+ rockchip,pins = <0x02 0x0c 0x01 0xb1 0x02 0x0e 0x01 0xb1>;
+ phandle = <0xa9>;
+ };
+
+ d10-d11-m0 {
+ rockchip,pins = <0x02 0x0f 0x01 0xb1 0x02 0x10 0x01 0xb1>;
+ phandle = <0xa8>;
+ };
+ };
+
+ cif-m1 {
+
+ cif-clkout-m1 {
+ rockchip,pins = <0x03 0x18 0x03 0xb1>;
+ phandle = <0x149>;
+ };
+
+ dvp-d2d9-m1 {
+ rockchip,pins = <0x03 0x03 0x03 0xb1 0x03 0x05 0x03 0xb1 0x03 0x07 0x03 0xb1 0x03 0x08 0x03 0xb1 0x03 0x09 0x03 0xb1 0x03 0x0c 0x03 0xb1 0x03 0x0e 0x03 0xb1 0x03 0x0f 0x03 0xb1 0x03 0x19 0x03 0xb1 0x03 0x1a 0x03 0xb1 0x03 0x1b 0x03 0xb1 0x03 0x18 0x03 0xb1>;
+ phandle = <0x14a>;
+ };
+
+ dvp-d0d1-m1 {
+ rockchip,pins = <0x03 0x01 0x03 0xb1 0x03 0x02 0x03 0xb1>;
+ phandle = <0x14b>;
+ };
+
+ d10-d11-m1 {
+ rockchip,pins = <0x03 0x16 0x03 0xb1 0x03 0x17 0x03 0xb1>;
+ phandle = <0x14c>;
+ };
+ };
+
+ isp {
+
+ isp-prelight {
+ rockchip,pins = <0x03 0x19 0x04 0xb1>;
+ phandle = <0x14d>;
+ };
+ };
+
+ pmic {
+
+ pmic_int {
+ rockchip,pins = <0x00 0x0a 0x00 0xb2 0x00 0x0b 0x00 0xb1>;
+ phandle = <0x5d>;
+ };
+
+ soc_slppin_gpio {
+ rockchip,pins = <0x00 0x04 0x00 0xb9>;
+ phandle = <0x60>;
+ };
+
+ soc_slppin_slp {
+ rockchip,pins = <0x00 0x04 0x01 0xb1>;
+ phandle = <0x5e>;
+ };
+
+ soc_slppin_rst {
+ rockchip,pins = <0x00 0x04 0x02 0xb1>;
+ phandle = <0x62>;
+ };
+ };
+
+ leds {
+
+ led-pins {
+ rockchip,pins = <0x00 0x11 0x00 0xb1>;
+ phandle = <0xc0>;
+ };
+ };
+
+ btns {
+
+ btn-pins {
+ rockchip,pins = <0x01 0x0c 0x00 0xb2 0x01 0x0d 0x00 0xb2 0x01 0x0e 0x00 0xb2 0x01 0x0f 0x00 0xb2 0x01 0x02 0x00 0xb2 0x01 0x05 0x00 0xb2 0x01 0x06 0x00 0xb2 0x01 0x07 0x00 0xb2 0x02 0x00 0x00 0xb2 0x02 0x01 0x00 0xb2 0x02 0x02 0x00 0xb2 0x02 0x03 0x00 0xb2 0x02 0x04 0x00 0xb2 0x02 0x05 0x00 0xb2 0x02 0x06 0x00 0xb2 0x02 0x07 0x00 0xb2 0x03 0x09 0x00 0xb2 0x03 0x0a 0x00 0xb2 0x03 0x0c 0x00 0xb2 0x03 0x0f 0x00 0xb2>;
+ phandle = <0xbd>;
+ };
+ };
+ };
+
+ chosen {
+ bootargs = [00];
+ };
+
+ fiq-debugger {
+ compatible = "rockchip,fiq-debugger";
+ rockchip,serial-id = <0x02>;
+ rockchip,wake-irq = <0x00>;
+ rockchip,irq-mode-enable = <0x00>;
+ rockchip,baudrate = <0x1c200>;
+ interrupts = <0x00 0x7f 0x08>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0xba>;
+ status = "okay";
+ };
+
+ ramoops {
+ compatible = "ramoops";
+ record-size = <0x00 0x20000>;
+ console-size = <0x00 0x80000>;
+ ftrace-size = <0x00 0x00>;
+ pmsg-size = <0x00 0x00>;
+ memory-region = <0xbb>;
+ };
+
+ reserved-memory {
+ #address-cells = <0x02>;
+ #size-cells = <0x02>;
+ ranges;
+
+ drm-logo@00000000 {
+ compatible = "rockchip,drm-logo";
+ reg = <0x00 0x00 0x00 0x00>;
+ phandle = <0x11>;
+ };
+
+ region@110000 {
+ reg = <0x00 0x110000 0x00 0xf0000>;
+ reg-names = "ramoops_mem";
+ phandle = <0xbb>;
+ };
+ };
+
+ odroidgo3-keys {
+ compatible = "gpio-keys";
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+ autorepeat;
+ phandle = <0x14e>;
+
+ button@0 {
+ label = "GPIO BTN-VOLUP";
+ linux,code = <0x73>;
+ gpios = <0x66 0x00 0x01>;
+ };
+
+ button@1 {
+ label = "GPIO BTN-VOLDN";
+ linux,code = <0x72>;
+ gpios = <0x66 0x01 0x01>;
+ };
+ };
+
+ odroidgo3-joypad {
+ compatible = "odroidgo3-joypad";
+ pwms = <0xbc 0x00 0xbebc200 0x00>;
+ pwm-names = "enable";
+ rumble-boost-weak = <0x00>;
+ rumble-boost-strong = <0x00>;
+ joypad-name = "GO-Super Gamepad";
+ joypad-product = <0x1100>;
+ joypad-revision = <0x100>;
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <0xbd>;
+ pinctrl-1 = <0x7b>;
+ io-channel-names = "amux_adc";
+ io-channels = <0xbe 0x01>;
+ amux-count = <0x04>;
+ amux-a-gpios = <0x97 0x0b 0x01>;
+ amux-b-gpios = <0x97 0x08 0x01>;
+ amux-en-gpios = <0x97 0x0d 0x01>;
+ button-adc-scale = <0x02>;
+ button-adc-deadzone = <0x40>;
+ button-adc-fuzz = <0x20>;
+ button-adc-flat = <0x20>;
+ abs_x-p-tuning = <0xc8>;
+ abs_x-n-tuning = <0xc8>;
+ abs_y-p-tuning = <0xc8>;
+ abs_y-n-tuning = <0xc8>;
+ abs_rx-p-tuning = <0xc8>;
+ abs_rx-n-tuning = <0xc8>;
+ abs_ry-p-tuning = <0xc8>;
+ abs_ry-n-tuning = <0xc8>;
+ poll-interval = <0x0a>;
+ invert-absx;
+ invert-absy;
+ phandle = <0x14f>;
+
+ sw1 {
+ gpios = <0xbf 0x0c 0x01>;
+ label = "GPIO DPAD-UP";
+ linux,code = <0x220>;
+ };
+
+ sw2 {
+ gpios = <0xbf 0x0d 0x01>;
+ label = "GPIO DPAD-DOWN";
+ linux,code = <0x221>;
+ };
+
+ sw3 {
+ gpios = <0xbf 0x0e 0x01>;
+ label = "GPIO DPAD-LEFT";
+ linux,code = <0x222>;
+ };
+
+ sw4 {
+ gpios = <0xbf 0x0f 0x01>;
+ label = "GPIO DPAD-RIGHT";
+ linux,code = <0x223>;
+ };
+
+ sw5 {
+ gpios = <0xbf 0x02 0x01>;
+ label = "GPIO KEY BTN-A";
+ linux,code = <0x131>;
+ };
+
+ sw6 {
+ gpios = <0xbf 0x05 0x01>;
+ label = "GPIO BTN-B";
+ linux,code = <0x130>;
+ };
+
+ sw7 {
+ gpios = <0xbf 0x06 0x01>;
+ label = "GPIO BTN-Y";
+ linux,code = <0x134>;
+ };
+
+ sw8 {
+ gpios = <0xbf 0x07 0x01>;
+ label = "GPIO BTN-X";
+ linux,code = <0x133>;
+ };
+
+ sw11 {
+ gpios = <0x66 0x02 0x01>;
+ label = "GPIO F3";
+ linux,code = <0x2c2>;
+ };
+
+ sw12 {
+ gpios = <0x66 0x03 0x01>;
+ label = "GPIO F4";
+ linux,code = <0x2c3>;
+ };
+
+ sw13 {
+ gpios = <0x66 0x04 0x01>;
+ label = "GPIO F5";
+ linux,code = <0x2c4>;
+ };
+
+ sw15 {
+ gpios = <0x66 0x06 0x01>;
+ label = "GPIO TOP-LEFT";
+ linux,code = <0x136>;
+ };
+
+ sw16 {
+ gpios = <0x66 0x07 0x01>;
+ label = "GPIO TOP-RIGHT";
+ linux,code = <0x137>;
+ };
+
+ sw19 {
+ gpios = <0x97 0x09 0x01>;
+ label = "GPIO F1";
+ linux,code = <0x2c0>;
+ };
+
+ sw20 {
+ gpios = <0x97 0x0f 0x01>;
+ label = "GPIO TOP-RIGHT2";
+ linux,code = <0x139>;
+ };
+
+ sw21 {
+ gpios = <0x97 0x0a 0x01>;
+ label = "GPIO TOP-LEFT2";
+ linux,code = <0x138>;
+ };
+
+ sw22 {
+ gpios = <0x97 0x0c 0x01>;
+ label = "GPIO F2";
+ linux,code = <0x2c1>;
+ };
+ };
+
+ gpio_leds {
+ compatible = "gpio-leds";
+ pinctrl-names = "led_pins";
+ pinctrl-0 = <0xc0>;
+ phandle = <0x150>;
+
+ heartbeat {
+ label = "blue:heartbeat";
+ gpios = <0x5c 0x11 0x00>;
+ linux,default-trigger = "heartbeat";
+ };
+ };
+
+ backlight {
+ compatible = "pwm-backlight";
+ pwms = <0xc1 0x00 0x9c40 0x00>;
+ brightness-levels = <0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f 0x20 0x21 0x22 0x23 0x24 0x25 0x26 0x27 0x28 0x29 0x2a 0x2b 0x2c 0x2d 0x2e 0x2f 0x30 0x31 0x32 0x33 0x34 0x35 0x36 0x37 0x38 0x39 0x3a 0x3b 0x3c 0x3d 0x3e 0x3f 0x40 0x41 0x42 0x43 0x44 0x45 0x46 0x47 0x48 0x49 0x4a 0x4b 0x4c 0x4d 0x4e 0x4f 0x50 0x51 0x52 0x53 0x54 0x55 0x56 0x57 0x58 0x59 0x5a 0x5b 0x5c 0x5d 0x5e 0x5f 0x60 0x61 0x62 0x63 0x64 0x65 0x66 0x67 0x68 0x69 0x6a 0x6b 0x6c 0x6d 0x6e 0x6f 0x70 0x71 0x72 0x73 0x74 0x75 0x76 0x77 0x78 0x79 0x7a 0x7b 0x7c 0x7d 0x7e 0x7f 0x80 0x81 0x82 0x83 0x84 0x85 0x86 0x87 0x88 0x89 0x8a 0x8b 0x8c 0x8d 0x8e 0x8f 0x90 0x91 0x92 0x93 0x94 0x95 0x96 0x97 0x98 0x99 0x9a 0x9b 0x9c 0x9d 0x9e 0x9f 0xa0>;
+ default-brightness-level = <0x50>;
+ phandle = <0x9d>;
+ };
+
+ rk817-sound {
+ compatible = "simple-audio-card";
+ simple-audio-card,format = "i2s";
+ simple-audio-card,name = "rockchip,rk817-codec";
+ simple-audio-card,mclk-fs = <0x100>;
+ simple-audio-card,widgets = "Microphone\0Mic Jack\0Headphone\0Headphone Jack";
+ simple-audio-card,routing = "MIC_IN\0Mic Jack\0Headphone Jack\0HPOL\0Headphone Jack\0HPOR";
+ simple-audio-card,hp-det-gpio = <0x66 0x16 0x01>;
+ simple-audio-card,codec-hp-det = <0x01>;
+
+ simple-audio-card,cpu {
+ sound-dai = <0xc2>;
+ };
+
+ simple-audio-card,codec {
+ sound-dai = <0xc3>;
+ };
+ };
+
+ vccsys {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v8_sys";
+ regulator-always-on;
+ regulator-min-microvolt = <0x39fbc0>;
+ regulator-max-microvolt = <0x39fbc0>;
+ phandle = <0x64>;
+ };
+
+ __symbols__ {
+ ddr_timing = "/ddr_timing";
+ cpu0 = "/cpus/cpu@0";
+ cpu1 = "/cpus/cpu@1";
+ cpu2 = "/cpus/cpu@2";
+ cpu3 = "/cpus/cpu@3";
+ CPU_SLEEP = "/cpus/idle-states/cpu-sleep";
+ CLUSTER_SLEEP = "/cpus/idle-states/cluster-sleep";
+ cpu0_opp_table = "/cpu0-opp-table";
+ bus_soc = "/bus-soc";
+ bus_apll = "/bus-apll";
+ bus_apll_opp_table = "/bus-apll-opp-table";
+ display_subsystem = "/display-subsystem";
+ route_lvds = "/display-subsystem/route/route-lvds";
+ route_dsi = "/display-subsystem/route/route-dsi";
+ route_rgb = "/display-subsystem/route/route-rgb";
+ gmac_clkin = "/external-gmac-clock";
+ rockchip_suspend = "/rockchip-suspend";
+ xin24m = "/xin24m";
+ xin32k = "/xin32k";
+ pmu = "/power-management@ff000000";
+ power = "/power-management@ff000000/power-controller";
+ pmugrf = "/syscon@ff010000";
+ pmu_io_domains = "/syscon@ff010000/io-domains";
+ pmu_pvtm = "/syscon@ff010000/pmu-pvtm";
+ uart0 = "/serial@ff030000";
+ i2s0_8ch = "/i2s@ff060000";
+ i2s1_2ch = "/i2s@ff070000";
+ i2s2_2ch = "/i2s@ff080000";
+ pdm = "/pdm@ff0a0000";
+ crypto = "/crypto@ff0b0000";
+ rng = "/rng@ff0b0000";
+ gic = "/interrupt-controller@ff131000";
+ grf = "/syscon@ff140000";
+ io_domains = "/syscon@ff140000/io-domains";
+ lvds = "/syscon@ff140000/lvds";
+ lvds_in_vopb = "/syscon@ff140000/lvds/ports/port@0/endpoint@0";
+ rgb = "/syscon@ff140000/rgb";
+ rgb_in_vopb = "/syscon@ff140000/rgb/ports/port@0/endpoint@0";
+ core_grf = "/syscon@ff148000";
+ pvtm = "/syscon@ff148000/pvtm";
+ uart1 = "/serial@ff158000";
+ uart2 = "/serial@ff160000";
+ uart3 = "/serial@ff168000";
+ uart4 = "/serial@ff170000";
+ uart5 = "/serial@ff178000";
+ i2c0 = "/i2c@ff180000";
+ rk817 = "/i2c@ff180000/pmic@20";
+ pinctrl_rk8xx = "/i2c@ff180000/pmic@20/pinctrl_rk8xx";
+ rk817_ts_gpio1 = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_ts_gpio1";
+ rk817_gt_gpio2 = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_gt_gpio2";
+ rk817_pin_ts = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_pin_ts";
+ rk817_pin_gt = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_pin_gt";
+ rk817_slppin_null = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_slppin_null";
+ rk817_slppin_slp = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_slppin_slp";
+ rk817_slppin_pwrdn = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_slppin_pwrdn";
+ rk817_slppin_rst = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_slppin_rst";
+ vdd_logic = "/i2c@ff180000/pmic@20/regulators/DCDC_REG1";
+ vdd_arm = "/i2c@ff180000/pmic@20/regulators/DCDC_REG2";
+ vcc_ddr = "/i2c@ff180000/pmic@20/regulators/DCDC_REG3";
+ vcc_3v3 = "/i2c@ff180000/pmic@20/regulators/DCDC_REG4";
+ vcc_1v0 = "/i2c@ff180000/pmic@20/regulators/LDO_REG1";
+ vcc1v8_soc = "/i2c@ff180000/pmic@20/regulators/LDO_REG2";
+ vdd1v0_soc = "/i2c@ff180000/pmic@20/regulators/LDO_REG3";
+ vcc3v3_pmu = "/i2c@ff180000/pmic@20/regulators/LDO_REG4";
+ vccio_sd = "/i2c@ff180000/pmic@20/regulators/LDO_REG5";
+ vcc_sd = "/i2c@ff180000/pmic@20/regulators/LDO_REG6";
+ vcc_backlight = "/i2c@ff180000/pmic@20/regulators/LDO_REG7";
+ vcc_lcd = "/i2c@ff180000/pmic@20/regulators/LDO_REG8";
+ dcdc_boost = "/i2c@ff180000/pmic@20/regulators/BOOST";
+ otg_switch = "/i2c@ff180000/pmic@20/regulators/OTG_SWITCH";
+ rk817_codec = "/i2c@ff180000/pmic@20/codec";
+ i2c1 = "/i2c@ff190000";
+ i2c2 = "/i2c@ff1a0000";
+ i2c3 = "/i2c@ff1b0000";
+ spi0 = "/spi@ff1d0000";
+ spi1 = "/spi@ff1d8000";
+ wdt = "/watchdog@ff1e0000";
+ pwm0 = "/pwm@ff200000";
+ pwm1 = "/pwm@ff200010";
+ pwm2 = "/pwm@ff200020";
+ pwm3 = "/pwm@ff200030";
+ pwm4 = "/pwm@ff208000";
+ pwm5 = "/pwm@ff208010";
+ pwm6 = "/pwm@ff208020";
+ pwm7 = "/pwm@ff208030";
+ rktimer = "/rktimer@ff210000";
+ dmac = "/amba/dmac@ff240000";
+ thermal_zones = "/thermal-zones";
+ soc_thermal = "/thermal-zones/soc-thermal";
+ threshold = "/thermal-zones/soc-thermal/trips/trip-point-0";
+ target = "/thermal-zones/soc-thermal/trips/trip-point-1";
+ soc_crit = "/thermal-zones/soc-thermal/trips/soc-crit";
+ gpu_thermal = "/thermal-zones/gpu-thermal";
+ tsadc = "/tsadc@ff280000";
+ saradc = "/saradc@ff288000";
+ otp = "/otp@ff290000";
+ otp_id = "/otp@ff290000/id@7";
+ cpu_leakage = "/otp@ff290000/cpu-leakage@17";
+ performance = "/otp@ff290000/performance@1e";
+ cru = "/clock-controller@ff2b0000";
+ cpu_boost = "/cpu-boost@ff2b8000";
+ pmucru = "/pmu-clock-controller@ff2bc000";
+ usb2phy_grf = "/syscon@ff2c0000";
+ u2phy = "/syscon@ff2c0000/usb2-phy@100";
+ u2phy_host = "/syscon@ff2c0000/usb2-phy@100/host-port";
+ u2phy_otg = "/syscon@ff2c0000/usb2-phy@100/otg-port";
+ video_phy = "/video-phy@ff2e0000";
+ mipi_dphy_rx0 = "/mipi-dphy-rx0@ff2f0000";
+ usb20_otg = "/usb@ff300000";
+ usb_host0_ehci = "/usb@ff340000";
+ usb_host0_ohci = "/usb@ff350000";
+ gmac = "/ethernet@ff360000";
+ sdmmc = "/dwmmc@ff370000";
+ sdio = "/dwmmc@ff380000";
+ emmc = "/dwmmc@ff390000";
+ nandc0 = "/nandc@ff3b0000";
+ sfc = "/sfc@ff3a0000";
+ gpu = "/gpu@ff400000";
+ gpu_opp_table = "/gpu-opp-table";
+ hevc = "/hevc_service@ff440000";
+ vpu = "/vpu_service@ff442000";
+ vpu_combo = "/vpu_combo";
+ hevc_mmu = "/iommu@ff440440";
+ vpu_mmu = "/iommu@ff442800";
+ dsi = "/dsi@ff450000";
+ dsi_in_vopb = "/dsi@ff450000/ports/port@0/endpoint@0";
+ timing0 = "/dsi@ff450000/panel@0/display-timings/60Hz";
+ timing1 = "/dsi@ff450000/panel@0/display-timings/50Hz";
+ timing2 = "/dsi@ff450000/panel@0/display-timings/75Hz";
+ vopb = "/vop@ff460000";
+ vopb_out = "/vop@ff460000/port";
+ vopb_out_lvds = "/vop@ff460000/port/endpoint@0";
+ vopb_out_dsi = "/vop@ff460000/port/endpoint@1";
+ vopb_out_rgb = "/vop@ff460000/port/endpoint@2";
+ vopb_mmu = "/iommu@ff460f00";
+ rk_rga = "/rk_rga@ff480000";
+ cif = "/cif@ff490000";
+ cif_new = "/cif-new@ff490000";
+ vip_mmu = "/iommu@ff490800";
+ rk_isp = "/rk_isp@ff4a0000";
+ rkisp1 = "/rkisp1@ff4a0000";
+ isp_mmu = "/iommu@ff4a8000";
+ qos_gmac = "/qos@ff518000";
+ qos_gpu = "/qos@ff520000";
+ qos_sdmmc = "/qos@ff52c000";
+ qos_emmc = "/qos@ff538000";
+ qos_nand = "/qos@ff538080";
+ qos_sdio = "/qos@ff538100";
+ qos_sfc = "/qos@ff538180";
+ qos_usb_host = "/qos@ff540000";
+ qos_usb_otg = "/qos@ff540080";
+ qos_isp_128 = "/qos@ff548000";
+ qos_isp_rd = "/qos@ff548080";
+ qos_isp_wr = "/qos@ff548100";
+ qos_isp_m1 = "/qos@ff548180";
+ qos_vip = "/qos@ff548200";
+ qos_rga_rd = "/qos@ff550000";
+ qos_rga_wr = "/qos@ff550080";
+ qos_vop_m0 = "/qos@ff550100";
+ qos_vop_m1 = "/qos@ff550180";
+ qos_vpu = "/qos@ff558000";
+ qos_vpu_r128 = "/qos@ff558080";
+ dfi = "/dfi@ff610000";
+ dmc = "/dmc";
+ ddr_power_model = "/dmc/ddr_power_model";
+ dmc_opp_table = "/dmc-opp-table";
+ rockchip_system_monitor = "/rockchip-system-monitor";
+ pinctrl = "/pinctrl";
+ gpio0 = "/pinctrl/gpio0@ff040000";
+ gpio1 = "/pinctrl/gpio1@ff250000";
+ gpio2 = "/pinctrl/gpio2@ff260000";
+ gpio3 = "/pinctrl/gpio3@ff270000";
+ pcfg_pull_up = "/pinctrl/pcfg-pull-up";
+ pcfg_pull_down = "/pinctrl/pcfg-pull-down";
+ pcfg_pull_none = "/pinctrl/pcfg-pull-none";
+ pcfg_pull_none_2ma = "/pinctrl/pcfg-pull-none-2ma";
+ pcfg_pull_up_2ma = "/pinctrl/pcfg-pull-up-2ma";
+ pcfg_pull_up_4ma = "/pinctrl/pcfg-pull-up-4ma";
+ pcfg_pull_none_4ma = "/pinctrl/pcfg-pull-none-4ma";
+ pcfg_pull_down_4ma = "/pinctrl/pcfg-pull-down-4ma";
+ pcfg_pull_none_8ma = "/pinctrl/pcfg-pull-none-8ma";
+ pcfg_pull_up_8ma = "/pinctrl/pcfg-pull-up-8ma";
+ pcfg_pull_none_12ma = "/pinctrl/pcfg-pull-none-12ma";
+ pcfg_pull_up_12ma = "/pinctrl/pcfg-pull-up-12ma";
+ pcfg_pull_none_smt = "/pinctrl/pcfg-pull-none-smt";
+ pcfg_output_high = "/pinctrl/pcfg-output-high";
+ pcfg_output_low = "/pinctrl/pcfg-output-low";
+ pcfg_input_high = "/pinctrl/pcfg-input-high";
+ pcfg_input = "/pinctrl/pcfg-input";
+ i2c0_xfer = "/pinctrl/i2c0/i2c0-xfer";
+ i2c1_xfer = "/pinctrl/i2c1/i2c1-xfer";
+ i2c2_xfer = "/pinctrl/i2c2/i2c2-xfer";
+ i2c3_xfer = "/pinctrl/i2c3/i2c3-xfer";
+ tsadc_otp_gpio = "/pinctrl/tsadc/tsadc-otp-gpio";
+ tsadc_otp_out = "/pinctrl/tsadc/tsadc-otp-out";
+ uart0_xfer = "/pinctrl/uart0/uart0-xfer";
+ uart0_cts = "/pinctrl/uart0/uart0-cts";
+ uart0_rts = "/pinctrl/uart0/uart0-rts";
+ uart0_rts_gpio = "/pinctrl/uart0/uart0-rts-gpio";
+ uart1_xfer = "/pinctrl/uart1/uart1-xfer";
+ uart1_cts = "/pinctrl/uart1/uart1-cts";
+ uart1_rts = "/pinctrl/uart1/uart1-rts";
+ uart1_rts_gpio = "/pinctrl/uart1/uart1-rts-gpio";
+ uart2m0_xfer = "/pinctrl/uart2-m0/uart2m0-xfer";
+ uart2m1_xfer = "/pinctrl/uart2-m1/uart2m1-xfer";
+ uart3m0_xfer = "/pinctrl/uart3-m0/uart3m0-xfer";
+ uart3m0_cts = "/pinctrl/uart3-m0/uart3m0-cts";
+ uart3m0_rts = "/pinctrl/uart3-m0/uart3m0-rts";
+ uart3m0_rts_gpio = "/pinctrl/uart3-m0/uart3m0-rts-gpio";
+ uart3m1_xfer = "/pinctrl/uart3-m1/uart3m1-xfer";
+ uart3m1_cts = "/pinctrl/uart3-m1/uart3m1-cts";
+ uart3m1_rts = "/pinctrl/uart3-m1/uart3m1-rts";
+ uart3m1_rts_gpio = "/pinctrl/uart3-m1/uart3m1-rts-gpio";
+ uart4_xfer = "/pinctrl/uart4/uart4-xfer";
+ uart4_cts = "/pinctrl/uart4/uart4-cts";
+ uart4_rts = "/pinctrl/uart4/uart4-rts";
+ uart5_xfer = "/pinctrl/uart5/uart5-xfer";
+ uart5_cts = "/pinctrl/uart5/uart5-cts";
+ uart5_rts = "/pinctrl/uart5/uart5-rts";
+ spi0_clk = "/pinctrl/spi0/spi0-clk";
+ spi0_csn = "/pinctrl/spi0/spi0-csn";
+ spi0_miso = "/pinctrl/spi0/spi0-miso";
+ spi0_mosi = "/pinctrl/spi0/spi0-mosi";
+ spi0_clk_hs = "/pinctrl/spi0/spi0-clk-hs";
+ spi0_miso_hs = "/pinctrl/spi0/spi0-miso-hs";
+ spi0_mosi_hs = "/pinctrl/spi0/spi0-mosi-hs";
+ spi1_clk = "/pinctrl/spi1/spi1-clk";
+ spi1_csn0 = "/pinctrl/spi1/spi1-csn0";
+ spi1_csn1 = "/pinctrl/spi1/spi1-csn1";
+ spi1_miso = "/pinctrl/spi1/spi1-miso";
+ spi1_mosi = "/pinctrl/spi1/spi1-mosi";
+ spi1_clk_hs = "/pinctrl/spi1/spi1-clk-hs";
+ spi1_miso_hs = "/pinctrl/spi1/spi1-miso-hs";
+ spi1_mosi_hs = "/pinctrl/spi1/spi1-mosi-hs";
+ pdm_clk0m0 = "/pinctrl/pdm/pdm-clk0m0";
+ pdm_clk0m1 = "/pinctrl/pdm/pdm-clk0m1";
+ pdm_clk1 = "/pinctrl/pdm/pdm-clk1";
+ pdm_sdi0m0 = "/pinctrl/pdm/pdm-sdi0m0";
+ pdm_sdi0m1 = "/pinctrl/pdm/pdm-sdi0m1";
+ pdm_sdi1 = "/pinctrl/pdm/pdm-sdi1";
+ pdm_sdi2 = "/pinctrl/pdm/pdm-sdi2";
+ pdm_sdi3 = "/pinctrl/pdm/pdm-sdi3";
+ pdm_clk0m0_sleep = "/pinctrl/pdm/pdm-clk0m0-sleep";
+ pdm_clk0m_sleep1 = "/pinctrl/pdm/pdm-clk0m1-sleep";
+ pdm_clk1_sleep = "/pinctrl/pdm/pdm-clk1-sleep";
+ pdm_sdi0m0_sleep = "/pinctrl/pdm/pdm-sdi0m0-sleep";
+ pdm_sdi0m1_sleep = "/pinctrl/pdm/pdm-sdi0m1-sleep";
+ pdm_sdi1_sleep = "/pinctrl/pdm/pdm-sdi1-sleep";
+ pdm_sdi2_sleep = "/pinctrl/pdm/pdm-sdi2-sleep";
+ pdm_sdi3_sleep = "/pinctrl/pdm/pdm-sdi3-sleep";
+ i2s0_8ch_mclk = "/pinctrl/i2s0/i2s0-8ch-mclk";
+ i2s0_8ch_sclktx = "/pinctrl/i2s0/i2s0-8ch-sclktx";
+ i2s0_8ch_sclkrx = "/pinctrl/i2s0/i2s0-8ch-sclkrx";
+ i2s0_8ch_lrcktx = "/pinctrl/i2s0/i2s0-8ch-lrcktx";
+ i2s0_8ch_lrckrx = "/pinctrl/i2s0/i2s0-8ch-lrckrx";
+ i2s0_8ch_sdo0 = "/pinctrl/i2s0/i2s0-8ch-sdo0";
+ i2s0_8ch_sdo1 = "/pinctrl/i2s0/i2s0-8ch-sdo1";
+ i2s0_8ch_sdo2 = "/pinctrl/i2s0/i2s0-8ch-sdo2";
+ i2s0_8ch_sdo3 = "/pinctrl/i2s0/i2s0-8ch-sdo3";
+ i2s0_8ch_sdi0 = "/pinctrl/i2s0/i2s0-8ch-sdi0";
+ i2s0_8ch_sdi1 = "/pinctrl/i2s0/i2s0-8ch-sdi1";
+ i2s0_8ch_sdi2 = "/pinctrl/i2s0/i2s0-8ch-sdi2";
+ i2s0_8ch_sdi3 = "/pinctrl/i2s0/i2s0-8ch-sdi3";
+ i2s1_2ch_mclk = "/pinctrl/i2s1/i2s1-2ch-mclk";
+ i2s1_2ch_sclk = "/pinctrl/i2s1/i2s1-2ch-sclk";
+ i2s1_2ch_lrck = "/pinctrl/i2s1/i2s1-2ch-lrck";
+ i2s1_2ch_sdi = "/pinctrl/i2s1/i2s1-2ch-sdi";
+ i2s1_2ch_sdo = "/pinctrl/i2s1/i2s1-2ch-sdo";
+ i2s2_2ch_mclk = "/pinctrl/i2s2/i2s2-2ch-mclk";
+ i2s2_2ch_sclk = "/pinctrl/i2s2/i2s2-2ch-sclk";
+ i2s2_2ch_lrck = "/pinctrl/i2s2/i2s2-2ch-lrck";
+ i2s2_2ch_sdi = "/pinctrl/i2s2/i2s2-2ch-sdi";
+ i2s2_2ch_sdo = "/pinctrl/i2s2/i2s2-2ch-sdo";
+ sdmmc_clk = "/pinctrl/sdmmc/sdmmc-clk";
+ sdmmc_cmd = "/pinctrl/sdmmc/sdmmc-cmd";
+ sdmmc_det = "/pinctrl/sdmmc/sdmmc-det";
+ sdmmc_bus1 = "/pinctrl/sdmmc/sdmmc-bus1";
+ sdmmc_bus4 = "/pinctrl/sdmmc/sdmmc-bus4";
+ sdmmc_gpio = "/pinctrl/sdmmc/sdmmc-gpio";
+ sdio_clk = "/pinctrl/sdio/sdio-clk";
+ sdio_cmd = "/pinctrl/sdio/sdio-cmd";
+ sdio_bus4 = "/pinctrl/sdio/sdio-bus4";
+ sdio_gpio = "/pinctrl/sdio/sdio-gpio";
+ emmc_clk = "/pinctrl/emmc/emmc-clk";
+ emmc_cmd = "/pinctrl/emmc/emmc-cmd";
+ emmc_pwren = "/pinctrl/emmc/emmc-pwren";
+ emmc_rstnout = "/pinctrl/emmc/emmc-rstnout";
+ emmc_bus1 = "/pinctrl/emmc/emmc-bus1";
+ emmc_bus4 = "/pinctrl/emmc/emmc-bus4";
+ emmc_bus8 = "/pinctrl/emmc/emmc-bus8";
+ flash_cs0 = "/pinctrl/flash/flash-cs0";
+ flash_rdy = "/pinctrl/flash/flash-rdy";
+ flash_dqs = "/pinctrl/flash/flash-dqs";
+ flash_ale = "/pinctrl/flash/flash-ale";
+ flash_cle = "/pinctrl/flash/flash-cle";
+ flash_wrn = "/pinctrl/flash/flash-wrn";
+ flash_csl = "/pinctrl/flash/flash-csl";
+ flash_rdn = "/pinctrl/flash/flash-rdn";
+ flash_bus8 = "/pinctrl/flash/flash-bus8";
+ lcdc_m0_rgb_pins = "/pinctrl/lcdc/lcdc-m0-rgb-pins";
+ lcdc_m0_sleep_pins = "/pinctrl/lcdc/lcdc-m0-sleep-pins";
+ lcdc_m1_rgb_pins = "/pinctrl/lcdc/lcdc-m1-rgb-pins";
+ lcdc_m1_sleep_pins = "/pinctrl/lcdc/lcdc-m1-sleep-pins";
+ pwm0_pin = "/pinctrl/pwm0/pwm0-pin";
+ pwm1_pin = "/pinctrl/pwm1/pwm1-pin";
+ pwm2_pin = "/pinctrl/pwm2/pwm2-pin";
+ pwm3_pin = "/pinctrl/pwm3/pwm3-pin";
+ pwm4_pin = "/pinctrl/pwm4/pwm4-pin";
+ pwm5_pin = "/pinctrl/pwm5/pwm5-pin";
+ pwm6_pin = "/pinctrl/pwm6/pwm6-pin";
+ pwm7_pin = "/pinctrl/pwm7/pwm7-pin";
+ rmii_pins = "/pinctrl/gmac/rmii-pins";
+ mac_refclk_12ma = "/pinctrl/gmac/mac-refclk-12ma";
+ mac_refclk = "/pinctrl/gmac/mac-refclk";
+ cif_clkout_m0 = "/pinctrl/cif-m0/cif-clkout-m0";
+ dvp_d2d9_m0 = "/pinctrl/cif-m0/dvp-d2d9-m0";
+ dvp_d0d1_m0 = "/pinctrl/cif-m0/dvp-d0d1-m0";
+ dvp_d10d11_m0 = "/pinctrl/cif-m0/d10-d11-m0";
+ cif_clkout_m1 = "/pinctrl/cif-m1/cif-clkout-m1";
+ dvp_d2d9_m1 = "/pinctrl/cif-m1/dvp-d2d9-m1";
+ dvp_d0d1_m1 = "/pinctrl/cif-m1/dvp-d0d1-m1";
+ dvp_d10d11_m1 = "/pinctrl/cif-m1/d10-d11-m1";
+ isp_prelight = "/pinctrl/isp/isp-prelight";
+ pmic_int = "/pinctrl/pmic/pmic_int";
+ soc_slppin_gpio = "/pinctrl/pmic/soc_slppin_gpio";
+ soc_slppin_slp = "/pinctrl/pmic/soc_slppin_slp";
+ soc_slppin_rst = "/pinctrl/pmic/soc_slppin_rst";
+ led_pins = "/pinctrl/leds/led-pins";
+ btn_pins = "/pinctrl/btns/btn-pins";
+ drm_logo = "/reserved-memory/drm-logo@00000000";
+ ramoops_mem = "/reserved-memory/region@110000";
+ gpio_keys = "/odroidgo3-keys";
+ joypad = "/odroidgo3-joypad";
+ leds = "/gpio_leds";
+ backlight = "/backlight";
+ vccsys = "/vccsys";
+ };
+};
diff --git a/config/archr-dts/retrogame_joypad_s2_f1.dtsi b/config/archr-dts/retrogame_joypad_s2_f1.dtsi
new file mode 100644
index 0000000000..7a0f231091
--- /dev/null
+++ b/config/archr-dts/retrogame_joypad_s2_f1.dtsi
@@ -0,0 +1,122 @@
+/*
+ This is a skeleton of joypad with 2 sticks and FN (MODE) button.
+ Fits devices with 1 stick and 2 extra face buttons too.
+ By including this ans setting I/O properties only,
+ devices should get consistent controller id and mapping
+ thus reusing non-game configs:
+ * SDL gamecontrollerdb.txt
+ * ES es_input.cfg
+ * Retroarch gamepad
+*/
+
+/ {
+ joypad: retrogame_joypad_s2_f1 {
+ /* These drivers emit the same button set which makes this skeleton ADC-agnostic */
+ /* compatible = "archr-joypad"; */
+ /* compatible = "archr-singleadc-joypad"; */
+
+ /* These are constants making Joystick Guid the same */
+ joypad-name = "retrogame_joypad_s2_f1";
+ joypad-vendor = <0x484B>;
+ joypad-product = <0x1121>; /* 11 inherited, 2 for number of sticks, 1 for number of FN */
+ joypad-revision = <0x0100>;
+
+ /* require explicit status = "okay"; */
+ status = "disabled";
+
+ /* adc calculate scale */
+ button-adc-scale = <2>;
+
+ /* adc deadzone range */
+ button-adc-deadzone = <64>;
+
+ /*
+ specifies fuzz value that is used to filter noise from
+ the event stream.
+ */
+ button-adc-fuzz = <32>;
+ button-adc-flat = <32>;
+
+ /* poll device interval (ms), adc read interval */
+ poll-interval = <10>;
+
+ /* gpio button auto repeat set value : default disable */
+ /*
+ autorepeat;
+ */
+
+ /* meaningful node names for easier use */
+ up {
+ label = "GPIO DPAD-UP";
+ linux,code = ;
+ };
+ down {
+ label = "GPIO DPAD-DOWN";
+ linux,code = ;
+ };
+ left {
+ label = "GPIO DPAD-LEFT";
+ linux,code = ;
+ };
+ right {
+ label = "GPIO DPAD-RIGHT";
+ linux,code = ;
+ };
+
+ a {
+ label = "GPIO BTN-A";
+ linux,code = ;
+ };
+ b {
+ label = "GPIO BTN-B";
+ linux,code = ;
+ };
+ x {
+ label = "GPIO BTN-X";
+ linux,code = ;
+ };
+ y {
+ label = "GPIO BTN-Y";
+ linux,code = ;
+ };
+
+ select {
+ label = "GPIO BTN_SELECT";
+ linux,code = ;
+ };
+ start {
+ label = "GPIO BTN_START";
+ linux,code = ;
+ };
+ mode {
+ label = "GPIO BTN_F";
+ linux,code = ;
+ };
+
+ tl {
+ label = "GPIO BTN_TL";
+ linux,code = ;
+ };
+ tr {
+ label = "GPIO BTN_TR";
+ linux,code = ;
+ };
+ tl2 {
+ label = "GPIO BTN_TL2";
+ linux,code = ;
+ };
+ tr2 {
+ label = "GPIO BTN_TR2";
+ linux,code = ;
+ };
+
+ thumbl {
+ label = "GPIO BTN_THUMBL";
+ linux,code = ;
+ };
+ thumbr {
+ label = "GPIO BTN_THUMBR";
+ linux,code = ;
+ };
+ };
+};
diff --git a/config/archr-dts/rk3326-anbernic-rg351m.dts b/config/archr-dts/rk3326-anbernic-rg351m.dts
new file mode 100644
index 0000000000..c12bb79944
--- /dev/null
+++ b/config/archr-dts/rk3326-anbernic-rg351m.dts
@@ -0,0 +1,58 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2019 Hardkernel Co., Ltd
+ * Copyright (c) 2020 Theobroma Systems Design und Consulting GmbH
+ * Copyright (c) 2022 Maya Matuszczyk
+ */
+
+/dts-v1/;
+#include "rk3326-odroid-go.dtsi"
+
+/ {
+ model = "Anbernic RG351M";
+ compatible = "anbernic,rg351m", "rockchip,rk3326";
+
+ battery: battery {
+ compatible = "simple-battery";
+ charge-full-design-microamp-hours = <3500000>;
+ charge-term-current-microamp = <350000>;
+ constant-charge-current-max-microamp = <2000000>;
+ constant-charge-voltage-max-microvolt = <4200000>;
+ factory-internal-resistance-micro-ohms = <180000>;
+ voltage-max-design-microvolt = <4100000>;
+ voltage-min-design-microvolt = <3500000>;
+
+ ocv-capacity-celsius = <20>;
+ ocv-capacity-table-0 = <4046950 100>, <4001920 95>, <3967900 90>, <3919950 85>,
+ <3888450 80>, <3861850 75>, <3831540 70>, <3799130 65>,
+ <3768190 60>, <3745650 55>, <3726610 50>, <3711630 45>,
+ <3696720 40>, <3685660 35>, <3674950 30>, <3663050 25>,
+ <3649470 20>, <3635260 15>, <3616920 10>, <3592440 5>,
+ <3574170 0>;
+ };
+
+ vibrator {
+ compatible = "pwm-vibrator";
+ pwms = <&pwm0 0 1000000 0>;
+ pwm-names = "enable";
+ };
+};
+
+/delete-node/ &vcc_host; /* conflicts with pwm vibration motor */
+
+&internal_display {
+ compatible = "elida,kd35t133";
+ iovcc-supply = <&vcc_lcd>;
+ vdd-supply = <&vcc_lcd>;
+ rotation = <270>;
+};
+
+&pwm0 {
+ status = "okay";
+};
+
+&rk817_charger {
+ /* This device does not have a current sense resistor */
+ //rockchip,resistor-sense-micro-ohms = <0>;
+ monitored-battery = <&battery>;
+};
diff --git a/config/archr-dts/rk3326-anbernic-rg351m.dtsi b/config/archr-dts/rk3326-anbernic-rg351m.dtsi
new file mode 100644
index 0000000000..f580df54e6
--- /dev/null
+++ b/config/archr-dts/rk3326-anbernic-rg351m.dtsi
@@ -0,0 +1,480 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2019 Hardkernel Co., Ltd
+ * Copyright (c) 2020 Theobroma Systems Design und Consulting GmbH
+ * Copyright (c) 2022 Maya Matuszczyk
+ */
+
+/dts-v1/;
+#include
+#include
+#include
+#include
+#include "rk3326.dtsi"
+
+/ {
+ aliases {
+ mmc0 = &sdmmc;
+ };
+
+ chosen {
+ stdout-path = "serial2:115200n8";
+ };
+
+ backlight: backlight {
+ compatible = "pwm-backlight";
+ power-supply = <&vcc_bl>;
+ pwms = <&pwm1 0 25000 0>;
+ };
+
+ /*
+ * LED is a tri-state. Driven high it is red, driven low it is
+ * green, and not driven at all (pin set to input) it is amber.
+ * Additionally, there is a 2nd LED that is not controllable
+ * that is on (red) when plugged in to power.
+ */
+ gpio_led: gpio-leds {
+ compatible = "gpio-leds";
+ pinctrl-names = "default";
+ pinctrl-0 = <&led_pin>;
+
+ red_green_led: led-0 {
+ color = ;
+ gpios = <&gpio2 RK_PB5 GPIO_ACTIVE_HIGH>;
+ function = LED_FUNCTION_CHARGING;
+ };
+ };
+
+ rk817-sound {
+ compatible = "simple-audio-card";
+ simple-audio-card,name = "rk817_int";
+ simple-audio-card,format = "i2s";
+ simple-audio-card,hp-det-gpio = <&gpio2 RK_PC6 GPIO_ACTIVE_HIGH>;
+ simple-audio-card,mclk-fs = <256>;
+ simple-audio-card,widgets =
+ "Microphone", "Mic Jack",
+ "Headphone", "Headphones",
+ "Speaker", "Speaker";
+ simple-audio-card,routing =
+ "MICL", "Mic Jack",
+ "Headphones", "HPOL",
+ "Headphones", "HPOR",
+ "Speaker", "SPKO";
+
+ simple-audio-card,codec {
+ sound-dai = <&rk817>;
+ };
+
+ simple-audio-card,cpu {
+ sound-dai = <&i2s1_2ch>;
+ };
+ };
+
+ vccsys: regulator-vccsys {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v8_sys";
+ regulator-always-on;
+ regulator-min-microvolt = <3800000>;
+ regulator-max-microvolt = <3800000>;
+ };
+
+ vibrator {
+ compatible = "pwm-vibrator";
+ pwms = <&pwm0 0 1000000 0>;
+ pwm-names = "enable";
+ };
+};
+
+&cpu0 {
+ cpu-supply = <&vdd_arm>;
+};
+
+&cpu1 {
+ cpu-supply = <&vdd_arm>;
+};
+
+&cpu2 {
+ cpu-supply = <&vdd_arm>;
+};
+
+&cpu3 {
+ cpu-supply = <&vdd_arm>;
+};
+
+&cru {
+ assigned-clocks = <&cru PLL_NPLL>,
+ <&cru ACLK_BUS_PRE>, <&cru ACLK_PERI_PRE>,
+ <&cru HCLK_BUS_PRE>, <&cru HCLK_PERI_PRE>,
+ <&cru PCLK_BUS_PRE>, <&cru SCLK_GPU>;
+
+ assigned-clock-rates = <1188000000>,
+ <200000000>, <200000000>,
+ <150000000>, <150000000>,
+ <100000000>, <200000000>;
+};
+
+&display_subsystem {
+ status = "okay";
+};
+
+&dsi {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "okay";
+
+ ports {
+ mipi_out: port@1 {
+ reg = <1>;
+
+ mipi_out_panel: endpoint {
+ remote-endpoint = <&mipi_in_panel>;
+ };
+ };
+ };
+
+ internal_display: panel@0 {
+ reg = <0>;
+ backlight = <&backlight>;
+ reset-gpios = <&gpio3 RK_PC0 GPIO_ACTIVE_LOW>;
+
+ port {
+ mipi_in_panel: endpoint {
+ remote-endpoint = <&mipi_out_panel>;
+ };
+ };
+ };
+};
+
+&dsi_dphy {
+ status = "okay";
+};
+
+&gpu {
+ mali-supply = <&vdd_logic>;
+ status = "okay";
+};
+
+&i2c0 {
+ clock-frequency = <400000>;
+ i2c-scl-falling-time-ns = <16>;
+ i2c-scl-rising-time-ns = <280>;
+ status = "okay";
+
+ rk817: pmic@20 {
+ compatible = "rockchip,rk817";
+ reg = <0x20>;
+ #clock-cells = <1>;
+ clock-names = "mclk";
+ clock-output-names = "rk808-clkout1", "xin32k";
+ clocks = <&cru SCLK_I2S1_OUT>;
+ interrupt-parent = <&gpio0>;
+ interrupts = ;
+ pinctrl-0 = <&pmic_int>, <&i2s1_2ch_mclk>;
+ pinctrl-names = "default";
+ #sound-dai-cells = <0>;
+ wakeup-source;
+
+ vcc1-supply = <&vccsys>;
+ vcc2-supply = <&vccsys>;
+ vcc3-supply = <&vccsys>;
+ vcc4-supply = <&vccsys>;
+ vcc5-supply = <&vccsys>;
+ vcc6-supply = <&vccsys>;
+ vcc7-supply = <&vccsys>;
+ vcc8-supply = <&vccsys>;
+
+ regulators {
+ vdd_logic: DCDC_REG1 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <1150000>;
+ regulator-min-microvolt = <950000>;
+ regulator-name = "vdd_logic";
+ regulator-ramp-delay = <6001>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <950000>;
+ };
+ };
+
+ vdd_arm: DCDC_REG2 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <1350000>;
+ regulator-min-microvolt = <950000>;
+ regulator-name = "vdd_arm";
+ regulator-ramp-delay = <6001>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <950000>;
+ };
+ };
+
+ vcc_ddr: DCDC_REG3 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-name = "vcc_ddr";
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ };
+ };
+
+ vcc_3v3: DCDC_REG4 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <3300000>;
+ regulator-min-microvolt = <3300000>;
+ regulator-name = "vcc_3v3";
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <3300000>;
+ };
+ };
+
+ vcc_1v8: LDO_REG2 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <1800000>;
+ regulator-min-microvolt = <1800000>;
+ regulator-name = "vcc_1v8";
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <1800000>;
+ };
+ };
+
+ vdd_1v0: LDO_REG3 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <1000000>;
+ regulator-min-microvolt = <1000000>;
+ regulator-name = "vdd_1v0";
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <1000000>;
+ };
+ };
+
+ vcc3v3_pmu: LDO_REG4 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <3300000>;
+ regulator-min-microvolt = <3300000>;
+ regulator-name = "vcc3v3_pmu";
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <3300000>;
+ };
+ };
+
+ vccio_sd: LDO_REG5 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <3300000>;
+ regulator-min-microvolt = <1800000>;
+ regulator-name = "vccio_sd";
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <3300000>;
+ };
+ };
+
+ vcc_sd: LDO_REG6 {
+ regulator-boot-on;
+ regulator-max-microvolt = <3300000>;
+ regulator-min-microvolt = <3300000>;
+ regulator-name = "vcc_sd";
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <3300000>;
+ };
+ };
+
+ vcc_bl: LDO_REG7 {
+ regulator-max-microvolt = <3300000>;
+ regulator-min-microvolt = <3300000>;
+ regulator-name = "vcc_bl";
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <3300000>;
+ };
+ };
+
+ vcc_lcd: LDO_REG8 {
+ regulator-max-microvolt = <2800000>;
+ regulator-min-microvolt = <2800000>;
+ regulator-name = "vcc_lcd";
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <2800000>;
+ };
+ };
+
+ vcc_wifi: LDO_REG9 {
+ regulator-max-microvolt = <3300000>;
+ regulator-min-microvolt = <3300000>;
+ regulator-name = "vcc_wifi";
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <3300000>;
+ };
+ };
+
+ usb_midu: BOOST {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <5400000>;
+ regulator-min-microvolt = <5000000>;
+ regulator-name = "usb_midu";
+ };
+ };
+
+ rk817_codec: codec {
+ rockchip,mic-in-differential;
+ };
+ };
+};
+
+&i2s1_2ch {
+ status = "okay";
+};
+
+&io_domains {
+ vccio1-supply = <&vcc_3v3>;
+ vccio2-supply = <&vccio_sd>;
+ vccio3-supply = <&vcc_3v3>;
+ vccio4-supply = <&vcc_3v3>;
+ vccio5-supply = <&vcc_3v3>;
+ vccio6-supply = <&vcc_3v3>;
+ status = "okay";
+};
+
+&pmu_io_domains {
+ pmuio1-supply = <&vcc3v3_pmu>;
+ pmuio2-supply = <&vcc3v3_pmu>;
+ status = "okay";
+};
+
+&pwm0 {
+ status = "okay";
+};
+
+&pwm1 {
+ status = "okay";
+};
+
+&saradc {
+ vref-supply = <&vcc_1v8>;
+ status = "okay";
+};
+
+&sdmmc {
+ cap-sd-highspeed;
+ card-detect-delay = <200>;
+ cd-gpios = <&gpio0 RK_PA3 GPIO_ACTIVE_LOW>;
+ sd-uhs-sdr12;
+ sd-uhs-sdr25;
+ sd-uhs-sdr50;
+ sd-uhs-sdr104;
+ vmmc-supply = <&vcc_sd>;
+ vqmmc-supply = <&vccio_sd>;
+ status = "okay";
+};
+
+&sfc {
+ #address-cells = <1>;
+ pinctrl-0 = <&sfc_clk &sfc_cs0 &sfc_bus2>;
+ pinctrl-names = "default";
+ #size-cells = <0>;
+ status = "okay";
+
+ flash@0 {
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ spi-max-frequency = <108000000>;
+ spi-rx-bus-width = <2>;
+ spi-tx-bus-width = <1>;
+ };
+};
+
+&tsadc {
+ status = "okay";
+};
+
+&u2phy {
+ status = "okay";
+
+ u2phy_host: host-port {
+ status = "okay";
+ };
+
+ u2phy_otg: otg-port {
+ status = "okay";
+ };
+};
+
+&usb20_otg {
+ status = "okay";
+};
+
+&uart2 {
+ pinctrl-0 = <&uart2m1_xfer>;
+ pinctrl-names = "default";
+ status = "okay";
+};
+
+&vopb {
+ status = "okay";
+};
+
+&vopb_mmu {
+ status = "okay";
+};
+
+&pinctrl {
+ headphone {
+ hp_det: hp-det {
+ rockchip,pins = <2 RK_PC6 RK_FUNC_GPIO &pcfg_pull_down>;
+ };
+ };
+
+ leds {
+ led_pin: led-pin {
+ rockchip,pins = <2 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ pmic {
+ dc_det: dc-det {
+ rockchip,pins = <0 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ pmic_int: pmic-int {
+ rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+
+ soc_slppin_gpio: soc_slppin_gpio {
+ rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_output_low>;
+ };
+
+ soc_slppin_rst: soc_slppin_rst {
+ rockchip,pins = <0 RK_PA4 2 &pcfg_pull_none>;
+ };
+
+ soc_slppin_slp: soc_slppin_slp {
+ rockchip,pins = <0 RK_PA4 1 &pcfg_pull_none>;
+ };
+ };
+};
diff --git a/config/archr-dts/rk3326-anbernic-rg351v.dts b/config/archr-dts/rk3326-anbernic-rg351v.dts
new file mode 100644
index 0000000000..26658a37f4
--- /dev/null
+++ b/config/archr-dts/rk3326-anbernic-rg351v.dts
@@ -0,0 +1,124 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2019 Hardkernel Co., Ltd
+ * Copyright (c) 2020 Theobroma Systems Design und Consulting GmbH
+ * Copyright (c) 2022 Maya Matuszczyk
+ */
+
+/dts-v1/;
+#include "rk3326-odroid-go.dtsi"
+
+/ {
+ model = "Anbernic RG351V";
+ compatible = "anbernic,rg351v", "rockchip,rk3326";
+
+ aliases {
+ mmc0 = &sdio;
+ mmc1 = &sdmmc;
+ };
+
+ gpio-keys-vol {
+ compatible = "gpio-keys";
+ autorepeat;
+ pinctrl-0 = <&btn_pins_vol>;
+ pinctrl-names = "default";
+
+ button-vol-down {
+ gpios = <&gpio2 RK_PA1 GPIO_ACTIVE_LOW>;
+ label = "VOLUMEDOWN";
+ linux,code = ;
+ };
+
+ button-volume-up {
+ gpios = <&gpio2 RK_PA0 GPIO_ACTIVE_LOW>;
+ label = "VOLUMEUP";
+ linux,code = ;
+ };
+ };
+
+ battery: battery {
+ compatible = "simple-battery";
+ charge-full-design-microamp-hours = <3500000>;
+ charge-term-current-microamp = <350000>;
+ constant-charge-current-max-microamp = <2000000>;
+ constant-charge-voltage-max-microvolt = <4200000>;
+ factory-internal-resistance-micro-ohms = <180000>;
+ voltage-max-design-microvolt = <4100000>;
+ voltage-min-design-microvolt = <3500000>;
+
+ ocv-capacity-celsius = <20>;
+ ocv-capacity-table-0 = <4046950 100>, <4001920 95>, <3967900 90>, <3919950 85>,
+ <3888450 80>, <3861850 75>, <3831540 70>, <3799130 65>,
+ <3768190 60>, <3745650 55>, <3726610 50>, <3711630 45>,
+ <3696720 40>, <3685660 35>, <3674950 30>, <3663050 25>,
+ <3649470 20>, <3635260 15>, <3616920 10>, <3592440 5>,
+ <3574170 0>;
+ };
+
+ vibrator {
+ compatible = "pwm-vibrator";
+ pwms = <&pwm0 0 1000000 0>;
+ pwm-names = "enable";
+ };
+};
+
+/* conflicts with pwm vibration motor */
+/delete-node/ &vcc_host;
+
+/* Device only has 1 LED compared to Odroid Go Advance */
+/delete-node/ &gpio_led;
+
+&internal_display {
+ compatible = "anbernic,rg351v-panel", "newvision,nv3051d";
+ iovcc-supply = <&vcc_lcd>;
+ vdd-supply = <&vcc_lcd>;
+};
+
+&io_domains {
+ vccio1-supply = <&vccio_sd>;
+};
+
+/delete-node/ &pwm_led;
+
+&pwm0 {
+ status = "okay";
+};
+
+/delete-node/ &pwm3;
+
+&rk817_charger {
+ /* This device does not have a current sense resistor */
+ rockchip,resistor-sense-micro-ohms = <0>;
+ monitored-battery = <&battery>;
+};
+
+&sdio {
+ cap-sd-highspeed;
+ card-detect-delay = <200>;
+ cd-gpios = <&gpio3 RK_PB4 GPIO_ACTIVE_LOW>; /*[> CD GPIO <]*/
+ sd-uhs-sdr12;
+ sd-uhs-sdr25;
+ sd-uhs-sdr50;
+ sd-uhs-sdr104;
+ vmmc-supply = <&vcc_sd>;
+ vqmmc-supply = <&vccio_sd>;
+ status = "okay";
+};
+
+&vcc_sd {
+ regulator-max-microvolt = <3000000>;
+ regulator-min-microvolt = <1800000>;
+};
+
+&vccio_sd {
+ regulator-max-microvolt = <1800000>;
+};
+
+&pinctrl {
+ btns {
+ btn_pins_vol: btn-pins-vol {
+ rockchip,pins = <2 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>,
+ <2 RK_PA1 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+};
diff --git a/config/archr-dts/rk3326-batlexp-g350.dts b/config/archr-dts/rk3326-batlexp-g350.dts
new file mode 100644
index 0000000000..9cad95fc57
--- /dev/null
+++ b/config/archr-dts/rk3326-batlexp-g350.dts
@@ -0,0 +1,163 @@
+/// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+* Copyright (c) 2025 lcdyk <2670878301@qq.com>
+*/
+
+/dts-v1/;
+#include "rk3326-gameconsole-r3xs.dtsi"
+#include "retrogame_joypad_s2_f1.dtsi"
+
+/ {
+ model = "BatleXP G350";
+ compatible = "batlexp,g350", "rockchip,rk3326";
+};
+
+&joypad {
+ compatible = "archr-singleadc-joypad";
+ pwms = <&pwm0 0 200000000 0>;
+ pwm-names = "enable";
+ rumble-boost-weak = <0x0000>;
+ rumble-boost-strong = <0x0000>;
+ joypad-name = "retrogame_joypad";
+ joypad-vendor = <0x484B>;
+ joypad-product = <0x1101>;
+ joypad-revision = <0x0100>;
+
+ status = "okay";
+
+ /* gpio pincontrol setup */
+ pinctrl-names = "default";
+ pinctrl-0 = <&btn_pins>;
+ pinctrl-1 = <&pwm0_pin>;
+
+ /* Analog mux define */
+ io-channel-names = "amux_adc";
+ io-channels = <&saradc 1>;
+
+ /* adc mux channel count */
+ amux-count = <4>;
+ /* non-default wiring */
+ amux-channel-mapping = <2 0 1 3>;
+ /* adc mux enable gpio */
+ amux-a-gpios = <&gpio3 RK_PB0 GPIO_ACTIVE_LOW>;
+ amux-b-gpios = <&gpio3 RK_PB3 GPIO_ACTIVE_LOW>;
+ /* adc mux enable gpio */
+ amux-en-gpios = <&gpio3 RK_PB5 GPIO_ACTIVE_LOW>;
+
+ /*
+ Analog Stick data tuning value(precent)
+ p = positive direction, n = negative direction
+ report value = (real_adc_data * tuning_value) / 100
+ */
+ abs_x-p-tuning = <200>;
+ abs_x-n-tuning = <200>;
+
+ abs_y-p-tuning = <200>;
+ abs_y-n-tuning = <200>;
+
+ abs_rx-p-tuning = <200>;
+ abs_rx-n-tuning = <200>;
+
+ abs_ry-p-tuning = <200>;
+ abs_ry-n-tuning = <200>;
+
+ /* gpio button auto repeat set value : default disable */
+ /*
+ autorepeat;
+ */
+ invert-absx;
+ invert-absy;
+ invert-absrx;
+
+ up { gpios = <&gpio1 RK_PB4 GPIO_ACTIVE_LOW>; };
+ down { gpios = <&gpio1 RK_PB5 GPIO_ACTIVE_LOW>; };
+ left { gpios = <&gpio1 RK_PB6 GPIO_ACTIVE_LOW>; };
+ right { gpios = <&gpio1 RK_PB7 GPIO_ACTIVE_LOW>; };
+ a { gpios = <&gpio1 RK_PA2 GPIO_ACTIVE_LOW>; };
+ b { gpios = <&gpio1 RK_PA5 GPIO_ACTIVE_LOW>; };
+ x { gpios = <&gpio1 RK_PA7 GPIO_ACTIVE_LOW>; };
+ y { gpios = <&gpio1 RK_PA6 GPIO_ACTIVE_LOW>; };
+ select { gpios = <&gpio3 RK_PB1 GPIO_ACTIVE_LOW>; };
+ start { gpios = <&gpio3 RK_PB4 GPIO_ACTIVE_LOW>; };
+ mode { gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_LOW>; };
+ tl { gpios = <&gpio2 RK_PA6 GPIO_ACTIVE_LOW>; };
+ tr { gpios = <&gpio2 RK_PA7 GPIO_ACTIVE_LOW>; };
+ tl2 { gpios = <&gpio3 RK_PB2 GPIO_ACTIVE_LOW>; };
+ tr2 { gpios = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>; };
+ thumbl { gpios = <&gpio2 RK_PA2 GPIO_ACTIVE_LOW>; };
+ thumbr { gpios = <&gpio2 RK_PA3 GPIO_ACTIVE_LOW>; };
+};
+
+&dsi {
+ internal_display: panel@0 {
+ compatible = "archr,generic-dsi";
+ iovcc-supply = <&vcc_lcd>;
+ vcc-supply = <&vcc_lcd>;
+ reset-gpios = <&gpio3 RK_PC0 GPIO_ACTIVE_LOW>;
+ panel_description =
+ "G size=52,70 delays=20,150,20,120,20 format=rgb888 lanes=4 flags=0xe03",
+
+ "M clock=50000 horizontal=640,450,70,450 vertical=480,17,5,13 default=1",
+ "M clock=50000 horizontal=640,450,85,450 vertical=480,17,106,13",
+ "M clock=50010 horizontal=640,450,127,450 vertical=480,17,90,13",
+ "M clock=50010 horizontal=640,450,73,450 vertical=480,17,110,13",
+ "M clock=50830 horizontal=640,450,85,450 vertical=480,17,34,13",
+ "M clock=53200 horizontal=640,450,128,450 vertical=480,17,24,13",
+ "M clock=50400 horizontal=640,450,77,450 vertical=480,17,10,13",
+ "M clock=50310 horizontal=640,450,85,450 vertical=480,17,6,13",
+ "M clock=54600 horizontal=640,450,94,450 vertical=480,17,46,13",
+ "M clock=65370 horizontal=640,450,113,450 vertical=480,17,14,13",
+ "M clock=76050 horizontal=640,450,85,450 vertical=480,17,10,13",
+ "M clock=100620 horizontal=640,450,85,450 vertical=480,17,6,13",
+
+ "I seq=b9f11283",
+ "I seq=b1000000da80",
+ "I seq=b2001370",
+ "I seq=b31010282803ff00000000",
+ "I seq=b480",
+ "I seq=b50a0a",
+ "I seq=b67f7f",
+ "I seq=b82662f063",
+ "I seq=ba338105f90e0e2000000000000000442500900a0000014f01000037",
+ "I seq=bc47",
+ "I seq=bf021100",
+ "I seq=c0737350500000125000",
+ "I seq=c15300323277d1cccc77773333",
+ "I seq=c68200bfff00ff",
+ "I seq=c7b8000a000000",
+ "I seq=c810401e02",
+ "I seq=cc0b",
+ "I seq=e000070d37353f4144060c0d0f111012141a00070d37353f4144060c0d0f111012141a",
+ "I seq=e307070b0b0b0b00000000ff00c010",
+ "I seq=e9c810020000b0b11131232880b0b127080004020000000004020000008888ba60240888888888888888ba713518888888888800000001000000000000000000",
+ "I seq=ea970a820203070000000000008188ba17538888888888888088ba0642888888888888230000028000000000000000000000000000000000000000000000",
+ "I seq=efffff01",
+ "I seq=11 wait=200",
+ "I seq=29 wait=50";
+ };
+};
+
+&pinctrl {
+ btns {
+ btn_pins: btn-pins {
+ rockchip,pins =
+ <1 RK_PB4 RK_FUNC_GPIO &pcfg_pull_up>,
+ <1 RK_PB5 RK_FUNC_GPIO &pcfg_pull_up>,
+ <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_up>,
+ <1 RK_PB7 RK_FUNC_GPIO &pcfg_pull_up>,
+ <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>,
+ <1 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>,
+ <1 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>,
+ <1 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up>,
+ <2 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>,
+ <2 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>,
+ <3 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>,
+ <2 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>,
+ <2 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up>,
+ <3 RK_PB1 RK_FUNC_GPIO &pcfg_pull_up>,
+ <3 RK_PB7 RK_FUNC_GPIO &pcfg_pull_up>,
+ <3 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>,
+ <3 RK_PB4 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+};
diff --git a/config/archr-dts/rk3326-device-group-r36.dtsi b/config/archr-dts/rk3326-device-group-r36.dtsi
new file mode 100644
index 0000000000..bfc399984a
--- /dev/null
+++ b/config/archr-dts/rk3326-device-group-r36.dtsi
@@ -0,0 +1,7 @@
+/ {
+ archr,device_switch {
+ r33s = "rk3326-gameconsole-r33s";
+ r36s = "rk3326-gameconsole-r36s";
+ rgb10x = "rk3326-powkiddy-rgb10x";
+ };
+};
diff --git a/config/archr-dts/rk3326-gameconsole-eeclone.dts b/config/archr-dts/rk3326-gameconsole-eeclone.dts
new file mode 100644
index 0000000000..ead32bbfe7
--- /dev/null
+++ b/config/archr-dts/rk3326-gameconsole-eeclone.dts
@@ -0,0 +1,960 @@
+/// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2024-present ROCKNIX (https://github.com/ROCKNIX)
+ * Copyright (c) 2025 Danil Zagoskin
+ */
+
+/dts-v1/;
+#include
+#include
+#include
+#include
+#include "rk3326.dtsi"
+
+/ {
+ model = "Generic EE clone";
+ compatible = "gameconsole,eeclone", "rockchip,rk3326";
+
+ aliases {
+ mmc0 = &emmc;
+ mmc1 = &sdmmc;
+ mmc2 = &sdio;
+ serial1 = &uart2;
+ serial2 = &uart5;
+ };
+
+ backlight: backlight {
+ compatible = "pwm-backlight";
+ pwms = <&pwm1 0 25000 0>;
+ brightness-levels = <
+ 0 1 2 3 4 5 6 7
+ 8 9 10 11 12 13 14 15
+ 16 17 18 19 20 21 22 23
+ 24 25 26 27 28 29 30 31
+ 32 33 34 35 36 37 38 39
+ 40 41 42 43 44 45 46 47
+ 48 49 50 51 52 53 54 55
+ 56 57 58 59 60 61 62 63
+ 64 65 66 67 68 69 70 71
+ 72 73 74 75 76 77 78 79
+ 80 81 82 83 84 85 86 87
+ 88 89 90 91 92 93 94 95
+ 96 97 98 99 100 101 102 103
+ 104 105 106 107 108 109 110 111
+ 112 113 114 115 116 117 118 119
+ 120 121 122 123 124 125 126 127
+ 128 129 130 131 132 133 134 135
+ 136 137 138 139 140 141 142 143
+ 144 145 146 147 148 149 150 151
+ 152 153 154 155 156 157 158 159
+ 160 161 162 163 164 165 166 167
+ 168 169 170 171 172 173 174 175
+ 176 177 178 179 180 181 182 183
+ 184 185 186 187 188 189 190 191
+ 192 193 194 195 196 197 198 199
+ 200 201 202 203 204 205 206 207
+ 208 209 210 211 212 213 214 215
+ 216 217 218 219 220 221 222 223
+ 224 225 226 227 228 229 230 231
+ 232 233 234 235 236 237 238 239
+ 240 241 242 243 244 245 246 247
+ 248 249 250 251 252 253 254 255>;
+ default-brightness-level = <128>;
+ };
+
+ battery: battery {
+ compatible = "simple-battery";
+ charge-full-design-microamp-hours = <4000000>;
+ charge-term-current-microamp = <200000>;
+ constant-charge-current-max-microamp = <1500000>;
+ constant-charge-voltage-max-microvolt = <4200000>;
+ factory-internal-resistance-micro-ohms = <100000>;
+ voltage-max-design-microvolt = <4100000>;
+ voltage-min-design-microvolt = <3300000>;
+
+ ocv-capacity-celsius = <20>;
+ ocv-capacity-table-0 =
+ <4046950 100>, <4001920 95>, <3967900 90>, <3940000 85>,
+ <3910000 80>, <3870000 75>, <3830000 70>, <3790000 65>,
+ <3750000 60>, <3720000 55>, <3690000 50>, <3650000 45>,
+ <3610000 40>, <3570000 35>, <3540000 30>, <3500000 25>,
+ <3460000 20>, <3420000 15>, <3380000 10>, <3340000 5>,
+ <3300000 0>;
+ };
+
+ adc_keys: adc-keys {
+ compatible = "adc-keys";
+ io-channels = <&saradc 2>;
+ io-channel-names = "buttons";
+ keyup-threshold-microvolt = <1800000>;
+ poll-interval = <100>;
+
+ /* disabled by default, dtbo may enable it when needed */
+ status = "disabled";
+
+ button-vol-up {
+ press-threshold-microvolt = <15000>;
+ label = "VOLUMEUP";
+ linux,code = ;
+ };
+
+ button-vol-down {
+ press-threshold-microvolt = <300000>;
+ label = "VOLUMEDOWN";
+ linux,code = ;
+ };
+ };
+
+ joypad: joypad {
+ compatible = "archr-singleadc-joypad";
+
+ joypad-name = "r36s_Gamepad";
+ joypad-product = <0x1188>;
+ joypad-revision = <0x0188>;
+
+ status = "okay";
+
+ /* gpio pincontrol setup */
+ pinctrl-names = "default";
+ pinctrl-0 = <&btn_pins>;
+
+ /* Analog mux define */
+ io-channel-names = "amux_adc";
+ io-channels = <&saradc 1>;
+
+ /* adc mux channel count */
+ amux-count = <4>;
+ /* non-default wiring */
+ amux-channel-mapping = <2 3 1 0>;
+ /* adc mux enable gpio */
+ amux-en-gpios = <&gpio2 RK_PB4 GPIO_ACTIVE_LOW>; /* rocker0-gpios */
+ /* adc mux select(a,b) gpio */
+ amux-a-gpios = <&gpio2 RK_PC0 GPIO_ACTIVE_LOW>; /* rocker1-gpios */
+ amux-b-gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_LOW>; /* rocker-gpios */
+
+ /* adc calculate scale */
+ button-adc-scale = <2>;
+
+ /* adc deadzone range */
+ button-adc-deadzone = <64>;
+
+ /*
+ specifies fuzz value that is used to filter noise from
+ the event stream.
+ */
+ button-adc-fuzz = <32>;
+ button-adc-flat = <32>;
+
+ /*
+ Analog Stick data tuning value(precent)
+ p = positive direction, n = negative direction
+ report value = (real_adc_data * tuning_value) / 100
+ */
+ abs_x-p-tuning = <200>;
+ abs_x-n-tuning = <200>;
+
+ abs_y-p-tuning = <200>;
+ abs_y-n-tuning = <200>;
+
+ abs_rx-p-tuning = <200>;
+ abs_rx-n-tuning = <200>;
+
+ abs_ry-p-tuning = <200>;
+ abs_ry-n-tuning = <200>;
+
+ /* poll device interval (ms), adc read interval */
+ poll-interval = <10>;
+
+ /* gpio button auto repeat set value : default disable */
+ /*
+ autorepeat;
+ */
+
+ /*
+ joypad driver is poll-device driver.
+ poll-device is does not support wakeup-source.
+ */
+ sw1 {
+ gpios = <&gpio3 RK_PC6 GPIO_ACTIVE_LOW>;
+ label = "GPIO DPAD-UP";
+ linux,code = ; // 0x220
+ };
+ sw2 {
+ gpios = <&gpio3 RK_PC7 GPIO_ACTIVE_LOW>;
+ label = "GPIO DPAD-DOWN";
+ linux,code = ; // 0x221
+ };
+ sw3 {
+ gpios = <&gpio3 RK_PC4 GPIO_ACTIVE_LOW>;
+ label = "GPIO DPAD-LEFT";
+ linux,code = ; // 0x222
+ };
+ sw4 {
+ gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_LOW>;
+ label = "GPIO DPAD-RIGHT";
+ linux,code = ; // 0x223
+ };
+
+ sw5 {
+ gpios = <&gpio3 RK_PC0 GPIO_ACTIVE_LOW>;
+ label = "GPIO KEY BTN-A";
+ linux,code = ; // 0x131
+ };
+ sw6 {
+ gpios = <&gpio3 RK_PC1 GPIO_ACTIVE_LOW>;
+ label = "GPIO BTN-B";
+ linux,code = ; // 0x130
+ };
+ sw7 {
+ gpios = <&gpio3 RK_PC3 GPIO_ACTIVE_LOW>;
+ label = "GPIO BTN-Y";
+ linux,code = ; // 0x134
+ };
+ sw8 {
+ gpios = <&gpio3 RK_PC2 GPIO_ACTIVE_LOW>;
+ label = "GPIO BTN-X";
+ linux,code = ; // 0x133
+ };
+
+ sw11 {
+ gpios = <&gpio2 RK_PB5 GPIO_ACTIVE_LOW>;
+ label = "GPIO BTN_THUMBL";
+ linux,code = ; // 0x2c2
+ };
+ sw12 {
+ gpios = <&gpio2 RK_PB6 GPIO_ACTIVE_LOW>;
+ label = "GPIO BTN_THUMBR";
+ linux,code = ; // 0x2c3
+ };
+
+ sw13 {
+ gpios = <&gpio3 RK_PB2 GPIO_ACTIVE_LOW>;
+ label = "GPIO BTN_FN";
+ linux,code = ; // 0x2c4
+ };
+
+ sw15 {
+ gpios = <&gpio3 RK_PB5 GPIO_ACTIVE_LOW>;
+ label = "GPIO TOP-LEFT";
+ linux,code = ; // 0x02
+ };
+ sw16 {
+ gpios = <&gpio3 RK_PB3 GPIO_ACTIVE_LOW>;
+ label = "GPIO TOP-RIGHT";
+ linux,code = ; // 0x05
+ };
+ sw19 {
+ gpios = <&gpio3 RK_PD0 GPIO_ACTIVE_LOW>;
+ label = "GPIO BTN_SELECT";
+ linux,code = ;
+ };
+ sw20 {
+ gpios = <&gpio3 RK_PB4 GPIO_ACTIVE_LOW>;
+ label = "GPIO TOP-RIGHT2";
+ linux,code = ;
+ };
+ sw21 {
+ gpios = <&gpio3 RK_PB6 GPIO_ACTIVE_LOW>;
+ label = "GPIO TOP-LEFT2";
+ linux,code = ;
+ };
+ sw22 {
+ gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_LOW>;
+ label = "GPIO BTN_START";
+ linux,code = ;
+ };
+ };
+
+ leds: gpio-leds {
+ compatible = "gpio-leds";
+ pinctrl-0 = <&led_pins>;
+ pinctrl-names = "default";
+
+ /* charge_red_gpio = <&gpio0 17 0>; */
+ led-0 {
+ color = ;
+ default-state = "off";
+ function = LED_FUNCTION_CHARGING;
+ linux,default-trigger = "none";
+ gpios = <&gpio0 RK_PC1 GPIO_ACTIVE_HIGH>;
+ };
+
+ /* charge_blue_gpio = <&gpio0 0 0>; */
+ led-1 {
+ color = ;
+ default-state = "on";
+ function = LED_FUNCTION_POWER;
+ linux,default-trigger = "default-on";
+ gpios = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>;
+ };
+ };
+
+ spk_amp: audio-amplifier {
+ compatible = "simple-audio-amplifier";
+ enable-gpios = <&gpio3 RK_PA7 GPIO_ACTIVE_HIGH>;
+ pinctrl-0 = <&spk_amp_enable_h>;
+ pinctrl-names = "default";
+ sound-name-prefix = "Speaker Amp";
+ };
+
+ rk817-sound-amplified {
+ compatible = "simple-audio-card";
+ pinctrl-names = "default";
+ pinctrl-0 = <&hp_det>;
+ simple-audio-card,name = "rk817_ext";
+ simple-audio-card,aux-devs = <&spk_amp>;
+ simple-audio-card,format = "i2s";
+ simple-audio-card,hp-det-gpio = <&gpio2 RK_PC6 GPIO_ACTIVE_HIGH>;
+ simple-audio-card,mclk-fs = <256>;
+ simple-audio-card,widgets =
+ "Headphone", "Headphones",
+ "Speaker", "Internal Speakers";
+ /* despite it's just a mono speaker, we need to route both Speaker Amp channels
+ Otherwise, the second channel stays on and keeps amp enabled */
+ simple-audio-card,routing =
+ "Headphones", "HPOL",
+ "Headphones", "HPOR",
+ "Internal Speakers", "Speaker Amp OUTL",
+ "Internal Speakers", "Speaker Amp OUTR",
+ "Speaker Amp INL", "HPOL",
+ "Speaker Amp INR", "HPOR";
+
+ simple-audio-card,pin-switches = "Internal Speakers";
+
+ status = "disabled";
+
+ simple-audio-card,codec {
+ sound-dai = <&rk817>;
+ };
+
+ simple-audio-card,cpu {
+ sound-dai = <&i2s1_2ch>;
+ };
+ };
+
+ rk817-sound-simple {
+ compatible = "simple-audio-card";
+ pinctrl-names = "default";
+ pinctrl-0 = <&hp_det>;
+ simple-audio-card,name = "rk817_ext";
+ simple-audio-card,format = "i2s";
+ simple-audio-card,hp-det-gpio = <&gpio2 RK_PC6 GPIO_ACTIVE_HIGH>;
+ simple-audio-card,mclk-fs = <256>;
+ simple-audio-card,widgets =
+ "Headphone", "Headphones",
+ "Speaker", "Internal Speakers";
+ simple-audio-card,routing =
+ "Headphones", "HPOL",
+ "Headphones", "HPOR",
+ "Internal Speakers", "SPKO";
+
+ status = "disabled";
+
+ simple-audio-card,codec {
+ sound-dai = <&rk817>;
+ };
+
+ simple-audio-card,cpu {
+ sound-dai = <&i2s1_2ch>;
+ };
+ };
+
+ vccsys: vccsys {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc5v0_sys";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ };
+
+ vcc-phy-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc_phy";
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ vcc18_lcd0: vcc18-lcd0 {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc18_lcd0_n";
+ gpio = <&gpio0 RK_PB5 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ pinctrl-0 = <&vcc18_lcd_n>;
+ pinctrl-names = "default";
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc_host: vcc_host {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc_host";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ gpio = <&gpio3 RK_PA4 GPIO_ACTIVE_HIGH>;
+ pinctrl-0 = <&vcc5_usb>;
+ pinctrl-names = "default";
+ enable-active-high;
+ regulator-always-on;
+ regulator-boot-on;
+ vin-supply = <&usb_midu>;
+ };
+};
+
+&dmc {
+ center-supply = <&vdd_logic>;
+};
+
+&cpu0 {
+ cpu-supply = <&vdd_arm>;
+};
+
+&cpu1 {
+ cpu-supply = <&vdd_arm>;
+};
+
+&cpu2 {
+ cpu-supply = <&vdd_arm>;
+};
+
+&cpu3 {
+ cpu-supply = <&vdd_arm>;
+};
+
+&cru {
+ assigned-clocks = <&cru PLL_NPLL>,
+ <&cru ACLK_BUS_PRE>, <&cru ACLK_PERI_PRE>,
+ <&cru HCLK_BUS_PRE>, <&cru HCLK_PERI_PRE>,
+ <&cru PCLK_BUS_PRE>, <&cru SCLK_GPU>;
+
+ assigned-clock-rates = <1188000000>,
+ <200000000>, <200000000>,
+ <150000000>, <150000000>,
+ <100000000>, <200000000>;
+};
+
+&display_subsystem {
+ status = "okay";
+};
+
+&dsi {
+ status = "okay";
+
+ ports {
+ mipi_out: port@1 {
+ reg = <1>;
+
+ mipi_out_panel: endpoint {
+ remote-endpoint = <&mipi_in_panel>;
+ };
+ };
+ };
+
+ internal_display: panel@0 {
+ compatible = "magicx,xu10-panel", "sitronix,st7703";
+ iovcc-supply = <&vcc18_lcd0>;
+ vcc-supply = <&vcc18_lcd0>;
+ reg = <0>;
+ backlight = <&backlight>;
+ reset-gpios = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&lcd_rst>;
+
+ port {
+ mipi_in_panel: endpoint {
+ remote-endpoint = <&mipi_out_panel>;
+ };
+ };
+ };
+};
+
+&dsi_dphy {
+ status = "okay";
+};
+
+&gpu {
+ mali-supply = <&vdd_logic>;
+ status = "okay";
+};
+
+&i2c0 {
+ clock-frequency = <400000>;
+ i2c-scl-falling-time-ns = <16>;
+ i2c-scl-rising-time-ns = <280>;
+ status = "okay";
+
+ rk817: pmic@20 {
+ compatible = "rockchip,rk817";
+ reg = <0x20>;
+ interrupt-parent = <&gpio0>;
+ interrupts = ;
+ clock-output-names = "rk808-clkout1", "xin32k";
+ clock-names = "mclk";
+ clocks = <&cru SCLK_I2S1_OUT>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pmic_int>, <&i2s1_2ch_mclk>;
+ rockchip,system-power-controller;
+ wakeup-source;
+ #clock-cells = <1>;
+ #sound-dai-cells = <0>;
+
+ vcc1-supply = <&vccsys>;
+ vcc2-supply = <&vccsys>;
+ vcc3-supply = <&vccsys>;
+ vcc4-supply = <&vccsys>;
+ vcc5-supply = <&vccsys>;
+ vcc6-supply = <&vccsys>;
+ vcc7-supply = <&vcc_3v0>;
+ vcc8-supply = <&vccsys>;
+
+ regulators {
+ vdd_logic: DCDC_REG1 {
+ regulator-name = "vdd_logic";
+ regulator-min-microvolt = <950000>;
+ regulator-max-microvolt = <1350000>;
+ regulator-initial-mode = <0x02>;
+ regulator-ramp-delay = <6001>;
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <950000>;
+ };
+ };
+
+ vdd_arm: DCDC_REG2 {
+ regulator-name = "vdd_arm";
+ regulator-min-microvolt = <850000>;
+ regulator-max-microvolt = <1350000>;
+ regulator-ramp-delay = <6001>;
+ regulator-initial-mode = <0x02>;
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <950000>;
+ };
+ };
+
+ vcc_ddr: DCDC_REG3 {
+ regulator-name = "vcc_ddr";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-initial-mode = <0x02>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ };
+ };
+
+ vcc_3v0: DCDC_REG4 {
+ regulator-name = "vcc_3v0";
+ regulator-min-microvolt = <3000000>;
+ regulator-max-microvolt = <3000000>;
+ regulator-initial-mode = <0x02>;
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <3000000>;
+ };
+ };
+
+ vcc_1v0: LDO_REG1 {
+ regulator-name = "vcc_1v0";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1000000>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <1000000>;
+ };
+ };
+
+ vcc1v8_soc: LDO_REG2 {
+ regulator-name = "vcc1v8_soc";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <1800000>;
+ };
+ };
+
+ vcc1v0_soc: LDO_REG3 {
+ regulator-name = "vcc1v0_soc";
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1000000>;
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <1000000>;
+ };
+ };
+
+ vcc3v0_pmu: LDO_REG4 {
+ regulator-name = "vcc3v0_pmu";
+ regulator-min-microvolt = <3000000>;
+ regulator-max-microvolt = <3000000>;
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <3000000>;
+ };
+ };
+
+ vccio_sd: LDO_REG5 {
+ regulator-name = "vccio_sd";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <3300000>;
+ };
+ };
+
+ vcc_sd: LDO_REG6 {
+ regulator-name = "vcc_sd";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <3300000>;
+ };
+ };
+
+ vcc2v8_dvp: LDO_REG7 {
+ regulator-name = "vcc2v8_dvp";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <3300000>;
+ };
+ };
+
+ vcc3v0_dvp: LDO_REG8 {
+ regulator-name = "vcc3v0_dvp";
+ regulator-min-microvolt = <3000000>;
+ regulator-max-microvolt = <3000000>;
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <3000000>;
+ };
+ };
+
+ vdd1v5_dvp: LDO_REG9 {
+ regulator-min-microvolt = <1500000>;
+ regulator-max-microvolt = <1500000>;
+ regulator-name = "vdd1v5_dvp";
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <1500000>;
+ };
+ };
+
+ usb_midu: BOOST {
+ regulator-name = "usb_midu";
+ regulator-min-microvolt = <4900000>;
+ regulator-max-microvolt = <5400000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ /*
+ otg_switch: OTG_SWITCH {
+ regulator-name = "otg_switch";
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+ */
+ };
+
+ rk817_charger: charger {
+ monitored-battery = <&battery>;
+ rockchip,resistor-sense-micro-ohms = <10000>;
+ rockchip,sleep-enter-current-microamp = <300000>;
+ rockchip,sleep-filter-current-microamp = <100000>;
+ };
+
+ rk817_codec: codec {
+ rockchip,mic-in-differential;
+ };
+ };
+};
+
+/* I2S 1 Channel Used Header(P2):1(GPIO2.C3),2(.C2), 3(.C1), 4(.C5), 5(.C4) */
+&i2s1_2ch {
+ status = "okay";
+ #sound-dai-cells = <0>;
+};
+
+&io_domains {
+ vccio1-supply = <&vcc2v8_dvp>;
+ vccio2-supply = <&vccio_sd>;
+ vccio3-supply = <&vcc1v8_soc>;
+ vccio4-supply = <&vcc_3v0>;
+ vccio5-supply = <&vcc_3v0>;
+ vccio6-supply = <&vcc1v8_soc>;
+ status = "okay";
+};
+
+&isp {
+ status = "okay";
+};
+
+&isp_mmu {
+ status = "okay";
+};
+
+&pmu_io_domains {
+ pmuio1-supply = <&vcc3v0_pmu>;
+ pmuio2-supply = <&vcc3v0_pmu>;
+ status = "okay";
+};
+
+&csi_dphy {
+ status = "okay";
+};
+
+&pwm1 {
+ status = "okay";
+};
+
+&saradc {
+ vref-supply = <&vcc1v8_soc>;
+ status = "okay";
+};
+
+&sdmmc {
+ cap-sd-highspeed;
+ card-detect-delay = <800>;
+ cd-gpios = <&gpio0 RK_PA3 GPIO_ACTIVE_LOW>; /*[> ff370000 PD_SDCARD CD GPIO <]*/
+ sd-uhs-sdr12;
+ sd-uhs-sdr25;
+ sd-uhs-sdr50;
+ sd-uhs-sdr104;
+ vqmmc-supply = <&vccio_sd>;
+ vmmc-supply = <&vcc_sd>;
+ status = "okay";
+};
+
+&sdio {
+ cap-sd-highspeed;
+ max-frequency = <100000000>;
+ cd-gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_LOW>;
+ card-detect-delay = <800>;
+ supports-sd;
+ sd-uhs-sdr12;
+ sd-uhs-sdr25;
+ sd-uhs-sdr50;
+ sd-uhs-sdr104;
+ vqmmc-supply = <&vcc2v8_dvp>;
+ vmmc-supply = <&vcc3v0_dvp>;
+ status = "okay";
+};
+
+&emmc {
+ status = "okay";
+ no-sdio;
+ no-sd;
+ disable-wp;
+ non-removable;
+ num-slots = <1>;
+};
+
+&tsadc {
+ status = "okay";
+};
+
+&u2phy {
+ status = "okay";
+
+ u2phy_host: host-port {
+ status = "okay";
+ };
+
+ u2phy_otg: otg-port {
+ status = "okay";
+ };
+};
+
+&usb20_otg {
+ status = "okay";
+};
+
+&vopb {
+ status = "okay";
+};
+
+&vopb_mmu {
+ status = "okay";
+};
+&pinctrl {
+ btns {
+ btn_pins: btn-pins {
+ rockchip,pins =
+ <2 RK_PB5 RK_FUNC_GPIO &pcfg_pull_up>,
+ <2 RK_PB6 RK_FUNC_GPIO &pcfg_pull_up>,
+ <3 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>,
+ <3 RK_PB3 RK_FUNC_GPIO &pcfg_pull_up>,
+ <3 RK_PB4 RK_FUNC_GPIO &pcfg_pull_up>,
+ <3 RK_PB5 RK_FUNC_GPIO &pcfg_pull_up>,
+ <3 RK_PB6 RK_FUNC_GPIO &pcfg_pull_up>,
+ <3 RK_PC0 RK_FUNC_GPIO &pcfg_pull_up>,
+ <3 RK_PC1 RK_FUNC_GPIO &pcfg_pull_up>,
+ <3 RK_PC2 RK_FUNC_GPIO &pcfg_pull_up>,
+ <3 RK_PC3 RK_FUNC_GPIO &pcfg_pull_up>,
+ <3 RK_PC4 RK_FUNC_GPIO &pcfg_pull_up>,
+ <3 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>,
+ <3 RK_PC6 RK_FUNC_GPIO &pcfg_pull_up>,
+ <3 RK_PC7 RK_FUNC_GPIO &pcfg_pull_up>,
+ <3 RK_PD0 RK_FUNC_GPIO &pcfg_pull_up>,
+ <3 RK_PD1 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+
+ headphone {
+ hp_det: hp-det {
+ rockchip,pins = <2 RK_PC6 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+
+ gpio-lcd {
+ lcd_rst: lcd-rst {
+ rockchip,pins = <3 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ vcc18-lcd {
+ vcc18_lcd_n: vcc18-lcd-n {
+ rockchip,pins = <0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ vcc5-usb {
+ vcc5_usb: vcc5-usb {
+ rockchip,pins = <3 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ gpio-led {
+ led_pins: led-pins {
+ rockchip,pins =
+ <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>, /* charge_blue_gpio = <&gpio0 0 0>; */
+ <0 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>; /* charge_red_gpio = <&gpio0 17 0>; */
+ };
+ };
+
+ pmic {
+ dc_det: dc-det {
+ rockchip,pins = <0 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ pmic_int: pmic-int {
+ rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+
+ soc_slppin_gpio: soc_slppin_gpio {
+ rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_output_low>;
+ };
+
+ soc_slppin_rst: soc_slppin_rst {
+ rockchip,pins = <0 RK_PA4 2 &pcfg_pull_none>;
+ };
+
+ soc_slppin_slp: soc_slppin_slp {
+ rockchip,pins = <0 RK_PA4 1 &pcfg_pull_none>;
+ };
+ };
+
+ speaker {
+ spk_amp_enable_h: spk-amp-enable-h {
+ rockchip,pins = <3 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+};
+
+&uart5 {
+ status = "okay";
+};
+&uart2 {
+ status = "disabled";
+};
+
+
+&internal_display {
+ compatible = "archr,generic-dsi";
+ panel_description =
+ "G size=153,85 delays=20,20,20,120,20 format=rgb888 lanes=4 flags=0xe03",
+
+ "M clock=50000 horizontal=720,140,80,140 vertical=720,20,4,20 default=1",
+ "M clock=50000 horizontal=720,140,100,140 vertical=720,20,150,20",
+ "M clock=50040 horizontal=720,140,112,140 vertical=720,20,140,20",
+ "M clock=51400 horizontal=720,140,132,140 vertical=720,20,148,20",
+ "M clock=50140 horizontal=720,140,90,140 vertical=720,20,40,20",
+ "M clock=56900 horizontal=720,140,90,140 vertical=720,20,114,20",
+ "M clock=50400 horizontal=720,140,92,140 vertical=720,20,10,20",
+ "M clock=50220 horizontal=720,140,80,140 vertical=720,20,15,20",
+ "M clock=54600 horizontal=720,140,112,140 vertical=720,20,57,20",
+ "M clock=75450 horizontal=720,140,95,140 vertical=720,20,153,20",
+ "M clock=75330 horizontal=720,140,80,140 vertical=720,20,15,20",
+ "M clock=100440 horizontal=720,140,80,140 vertical=720,20,15,20",
+
+ "I seq=b9f11283",
+ "I seq=b1000000da80",
+ "I seq=b23c1230",
+ "I seq=b31010282803ff00000000",
+ "I seq=b480",
+ "I seq=b50a0a",
+ "I seq=b69797",
+ "I seq=b82622f013",
+ "I seq=ba338105f90e0e2000000000000000442500900a0000014f01000037",
+ "I seq=bc47",
+ "I seq=bf021100",
+ "I seq=c0737350500000127000",
+ "I seq=c12500323277e4ffffcccc7777",
+ "I seq=c68200bfff00ff",
+ "I seq=c7b8000a000000",
+ "I seq=c810401e02",
+ "I seq=cc0b",
+ "I seq=e0000b102c3d3f423a070d0f131513140f16000b102c3d3f423a070d0f131513140f16",
+ "I seq=e307070b0b0b0b00000000ff00c010",
+ "I seq=e9c8100a000080811231234f86a000470800000c00000000000c00000098028baf4602888888888898138baf5713888888888800000000000000000000000000",
+ "I seq=ea970c090909780000000000009f318ba8317588888888889f208ba820648888888888230000027100000000000000000000000000000040808100000000",
+ "I seq=efffff01",
+ "I seq=11 wait=250",
+ "I seq=29 wait=50";
+};
+
+
diff --git a/config/archr-dts/rk3326-gameconsole-r33s.dts b/config/archr-dts/rk3326-gameconsole-r33s.dts
new file mode 100644
index 0000000000..21dbab6d19
--- /dev/null
+++ b/config/archr-dts/rk3326-gameconsole-r33s.dts
@@ -0,0 +1,129 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * # Copyright (C) 2022-24 JELOS (https://github.com/JustEnoughLinuxOS)
+ */
+
+/dts-v1/;
+#include "rk3326-gameconsole-r3xs.dtsi"
+#include "rk3326-device-group-r36.dtsi"
+
+/ {
+ model = "Game Console R33S";
+ compatible = "gameconsole,r33s", "rockchip,rk3326";
+
+ archr,device_switch {
+ this = "r33s";
+ };
+
+ builtin_gamepad: r33s_joypad {
+ compatible = "archr-singleadc-joypad";
+ pinctrl-names = "default";
+ pinctrl-0 = <&btn_pins>;
+ joypad-name = "r33s_joypad";
+ joypad-product = <0x0AA2>;
+ joypad-revision = <0x0100>;
+ joypad-vendor = <0x0001>;
+
+ status = "okay";
+ amux-count = <0>;
+ /* poll device interval (ms), adc read interval */
+ poll-interval = <10>;
+ pwms = <&pwm0 0 1000000000 0>;
+ pwm-names = "enable";
+ rumble-boost-weak = <0x0000>;
+ rumble-boost-strong = <0x0000>;
+
+ button-sw1 {
+ gpios = <&gpio1 RK_PB4 GPIO_ACTIVE_LOW>;
+ label = "DPAD-UP";
+ linux,code = ;
+ };
+ button-sw2 {
+ gpios = <&gpio1 RK_PB5 GPIO_ACTIVE_LOW>;
+ label = "DPAD-DOWN";
+ linux,code = ;
+ };
+ button-sw3 {
+ gpios = <&gpio1 RK_PB6 GPIO_ACTIVE_LOW>;
+ label = "DPAD-LEFT";
+ linux,code = ;
+ };
+ button-sw4 {
+ gpios = <&gpio1 RK_PB7 GPIO_ACTIVE_LOW>;
+ label = "DPAD-RIGHT";
+ linux,code = ;
+ };
+ button-sw5 {
+ gpios = <&gpio1 RK_PA2 GPIO_ACTIVE_LOW>;
+ label = "BTN-A";
+ linux,code = ;
+ };
+ button-sw6 {
+ gpios = <&gpio1 RK_PA5 GPIO_ACTIVE_LOW>;
+ label = "BTN-B";
+ linux,code = ;
+ };
+ button-sw7 {
+ gpios = <&gpio1 RK_PA6 GPIO_ACTIVE_LOW>;
+ label = "BTN-Y";
+ linux,code = ;
+ };
+ button-sw8 {
+ gpios = <&gpio1 RK_PA7 GPIO_ACTIVE_LOW>;
+ label = "BTN-X";
+ linux,code = ;
+ };
+ button-sw9 {
+ gpios = <&gpio2 RK_PA6 GPIO_ACTIVE_LOW>;
+ label = "TOP-LEFT";
+ linux,code = ;
+ };
+ button-sw10 {
+ gpios = <&gpio2 RK_PA7 GPIO_ACTIVE_LOW>;
+ label = "TOP-RIGHT";
+ linux,code = ;
+ };
+ button-sw11 {
+ gpios = <&gpio3 RK_PB1 GPIO_ACTIVE_LOW>;
+ label = "SELECT";
+ linux,code = ;
+ };
+ button-sw12 {
+ gpios = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
+ label = "TOP-RIGHT 2";
+ linux,code = ;
+ };
+ button-sw13 {
+ gpios = <&gpio3 RK_PB2 GPIO_ACTIVE_LOW>;
+ label = "TOP-LEFT 2";
+ linux,code = ;
+ };
+ button-sw14 {
+ gpios = <&gpio3 RK_PB4 GPIO_ACTIVE_LOW>;
+ label = "START";
+ linux,code = ;
+ };
+ };
+};
+
+&pinctrl {
+ btns {
+ btn_pins: btn-pins {
+ rockchip,pins = <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>,
+ <1 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>,
+ <1 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>,
+ <1 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up>,
+ <1 RK_PB4 RK_FUNC_GPIO &pcfg_pull_up>,
+ <1 RK_PB5 RK_FUNC_GPIO &pcfg_pull_up>,
+ <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_up>,
+ <1 RK_PB7 RK_FUNC_GPIO &pcfg_pull_up>,
+ <2 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>,
+ <2 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up>,
+ <3 RK_PB1 RK_FUNC_GPIO &pcfg_pull_up>,
+ <3 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>,
+ <3 RK_PB4 RK_FUNC_GPIO &pcfg_pull_up>,
+ <3 RK_PB7 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+
+ };
+};
diff --git a/config/archr-dts/rk3326-gameconsole-r36max.dts b/config/archr-dts/rk3326-gameconsole-r36max.dts
new file mode 100644
index 0000000000..dfc2c6e099
--- /dev/null
+++ b/config/archr-dts/rk3326-gameconsole-r36max.dts
@@ -0,0 +1,18 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * R36Max / K36 clone — alias for Generic EE clone board.
+ *
+ * ROCKNIX uses "r36max" for the K36 clone family. This DTS
+ * includes the eeclone base with a different model/compatible
+ * so U-Boot's fdtfile can reference either name.
+ *
+ * Copyright (c) 2024-present ROCKNIX (https://github.com/ROCKNIX)
+ * Copyright (c) 2025 Arch R
+ */
+
+#include "rk3326-gameconsole-eeclone.dts"
+
+/ {
+ model = "Game Console R36Max";
+ compatible = "gameconsole,r36max", "gameconsole,eeclone", "rockchip,rk3326";
+};
diff --git a/config/archr-dts/rk3326-gameconsole-r36s.dts b/config/archr-dts/rk3326-gameconsole-r36s.dts
new file mode 100644
index 0000000000..5dbee3a001
--- /dev/null
+++ b/config/archr-dts/rk3326-gameconsole-r36s.dts
@@ -0,0 +1,234 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * # Copyright (C) 2022-24 JELOS (https://github.com/JustEnoughLinuxOS)
+ */
+
+/dts-v1/;
+#include "rk3326-gameconsole-r3xs.dtsi"
+#include "rk3326-device-group-r36.dtsi"
+
+/ {
+ model = "Game Console R36S";
+ compatible = "gameconsole,r35s", "gameconsole,r36s", "rockchip,rk3326";
+
+ archr,device_switch {
+ this = "r36s";
+ };
+
+ /* R36S has an external speaker amplifier on GPIO3_PC4 */
+ spk_amp: audio-amplifier {
+ compatible = "simple-audio-amplifier";
+ enable-gpios = <&gpio3 RK_PC4 GPIO_ACTIVE_HIGH>;
+ pinctrl-0 = <&spk_amp_enable_h>;
+ pinctrl-names = "default";
+ sound-name-prefix = "Speaker Amp";
+ };
+
+ joypad: odroidgo3-joypad {
+ compatible = "odroidgo3-joypad";
+ pwms = <&pwm0 0 200000000 0>;
+ pwm-names = "enable";
+ rumble-boost-weak = <0x0000>;
+ rumble-boost-strong = <0x0000>;
+
+ joypad-name = "r36s_Gamepad";
+ joypad-product = <0x1188>;
+ joypad-revision = <0x0188>;
+
+ status = "okay";
+
+ /* gpio pincontrol setup */
+ pinctrl-names = "default";
+ pinctrl-0 = <&btn_pins>;
+ pinctrl-1 = <&pwm0_pin>;
+
+ /* Analog mux define */
+ io-channel-names = "amux_adc";
+ io-channels = <&saradc 1>;
+
+ /* adc mux channel count */
+ amux-count = <4>;
+ /* adc mux select(a,b) gpio */
+ amux-a-gpios = <&gpio3 RK_PB3 GPIO_ACTIVE_LOW>;
+ amux-b-gpios = <&gpio3 RK_PB0 GPIO_ACTIVE_LOW>;
+ /* adc mux enable gpio */
+ amux-en-gpios = <&gpio3 RK_PB5 GPIO_ACTIVE_LOW>;
+
+ /* adc calculate scale */
+ button-adc-scale = <2>;
+
+ /* adc deadzone range */
+ button-adc-deadzone = <64>;
+
+ /*
+ specifies fuzz value that is used to filter noise from
+ the event stream.
+ */
+ button-adc-fuzz = <32>;
+ button-adc-flat = <32>;
+
+ /*
+ Analog Stick data tuning value(precent)
+ p = positive direction, n = negative direction
+ report value = (real_adc_data * tuning_value) / 100
+ */
+ abs_x-p-tuning = <200>;
+ abs_x-n-tuning = <200>;
+
+ abs_y-p-tuning = <200>;
+ abs_y-n-tuning = <200>;
+
+ abs_rx-p-tuning = <200>;
+ abs_rx-n-tuning = <200>;
+
+ abs_ry-p-tuning = <200>;
+ abs_ry-n-tuning = <200>;
+
+ /* poll device interval (ms), adc read interval */
+ poll-interval = <10>;
+
+ /* required for RG36S */
+ invert-absx;
+ invert-absy;
+
+ /* gpio button auto repeat set value : default disable */
+ /*
+ autorepeat;
+ */
+
+ /*
+ joypad driver is poll-device driver.
+ poll-device is does not support wakeup-source.
+ */
+ sw1 {
+ gpios = <&gpio1 RK_PB4 GPIO_ACTIVE_LOW>;
+ label = "GPIO DPAD-UP";
+ linux,code = ; // 0x220
+ };
+ sw2 {
+ gpios = <&gpio1 RK_PB5 GPIO_ACTIVE_LOW>;
+ label = "GPIO DPAD-DOWN";
+ linux,code = ; // 0x221
+ };
+ sw3 {
+ gpios = <&gpio1 RK_PB6 GPIO_ACTIVE_LOW>;
+ label = "GPIO DPAD-LEFT";
+ linux,code = ; // 0x222
+ };
+ sw4 {
+ gpios = <&gpio1 RK_PB7 GPIO_ACTIVE_LOW>;
+ label = "GPIO DPAD-RIGHT";
+ linux,code = ; // 0x223
+ };
+ sw5 {
+ gpios = <&gpio1 RK_PA2 GPIO_ACTIVE_LOW>;
+ label = "GPIO KEY BTN-A";
+ linux,code = ; // 0x131
+ };
+ sw6 {
+ gpios = <&gpio1 RK_PA5 GPIO_ACTIVE_LOW>;
+ label = "GPIO BTN-B";
+ linux,code = ; // 0x130
+ };
+ sw7 {
+ gpios = <&gpio1 RK_PA6 GPIO_ACTIVE_LOW>;
+ label = "GPIO BTN-Y";
+ linux,code = ; // 0x134
+ };
+ sw8 {
+ gpios = <&gpio1 RK_PA7 GPIO_ACTIVE_LOW>;
+ label = "GPIO BTN-X";
+ linux,code = ; // 0x133
+ };
+ sw11 {
+ gpios = <&gpio2 RK_PA2 GPIO_ACTIVE_LOW>;
+ label = "GPIO BTN_THUMBL";
+ linux,code = ; // 0x2c2
+ };
+ sw12 {
+ gpios = <&gpio2 RK_PA3 GPIO_ACTIVE_LOW>;
+ label = "GPIO BTN_THUMBR";
+ linux,code = ; // 0x2c3
+ };
+ sw13 {
+ gpios = <&gpio2 RK_PA4 GPIO_ACTIVE_LOW>;
+ label = "GPIO BTN_FN";
+ linux,code = ; // 0x2c4
+ };
+ sw15 {
+ gpios = <&gpio2 RK_PA6 GPIO_ACTIVE_LOW>;
+ label = "GPIO TOP-LEFT";
+ linux,code = ; // 0x02
+ };
+ sw16 {
+ gpios = <&gpio2 RK_PA7 GPIO_ACTIVE_LOW>;
+ label = "GPIO TOP-RIGHT";
+ linux,code = ; // 0x05
+ };
+ sw19 {
+ gpios = <&gpio3 RK_PB1 GPIO_ACTIVE_LOW>;
+ label = "GPIO BTN_SELECT";
+ linux,code = ;
+ };
+ sw20 {
+ gpios = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
+ label = "GPIO TOP-RIGHT2";
+ linux,code = ;
+ };
+ sw21 {
+ gpios = <&gpio3 RK_PB2 GPIO_ACTIVE_LOW>;
+ label = "GPIO TOP-LEFT2";
+ linux,code = ;
+ };
+ sw22 {
+ gpios = <&gpio3 RK_PB4 GPIO_ACTIVE_LOW>;
+ label = "GPIO BTN_START";
+ linux,code = ;
+ };
+ };
+};
+
+/* Override sound card from r3xs.dtsi: add speaker amplifier */
+/ {
+ rk817-sound {
+ simple-audio-card,aux-devs = <&spk_amp>;
+ simple-audio-card,routing =
+ "MICL", "Mic Jack",
+ "Headphones", "HPOL",
+ "Headphones", "HPOR",
+ "Speaker Amp INL", "SPKO";
+ };
+};
+
+&pinctrl {
+ btns {
+ btn_pins: btn-pins {
+ rockchip,pins = <1 RK_PB4 RK_FUNC_GPIO &pcfg_pull_up>,
+ <1 RK_PB5 RK_FUNC_GPIO &pcfg_pull_up>,
+ <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_up>,
+ <1 RK_PB7 RK_FUNC_GPIO &pcfg_pull_up>,
+ <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>,
+ <1 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>,
+ <1 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>,
+ <1 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up>,
+ <2 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>,
+ <2 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>,
+ <2 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>,
+ <2 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>,
+ <2 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>,
+ <2 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up>,
+ <3 RK_PB1 RK_FUNC_GPIO &pcfg_pull_up>,
+ <3 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>,
+ <3 RK_PB4 RK_FUNC_GPIO &pcfg_pull_up>,
+ <3 RK_PB7 RK_FUNC_GPIO &pcfg_pull_up>;
+
+ };
+
+ };
+
+ speaker {
+ spk_amp_enable_h: spk-amp-enable-h {
+ rockchip,pins = <3 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+};
diff --git a/config/archr-dts/rk3326-gameconsole-r3xs.dtsi b/config/archr-dts/rk3326-gameconsole-r3xs.dtsi
new file mode 100644
index 0000000000..b9f4f17ed5
--- /dev/null
+++ b/config/archr-dts/rk3326-gameconsole-r3xs.dtsi
@@ -0,0 +1,545 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * # Copyright (C) 2022-24 JELOS (https://github.com/JustEnoughLinuxOS)
+ */
+
+/dts-v1/;
+#include
+#include
+#include
+#include
+#include "rk3326.dtsi"
+
+/ {
+ model = "Game Console R33S";
+ compatible = "gameconsolec,r33s", "rockchip,rk3326";
+
+ aliases {
+ mmc0 = &sdio;
+ mmc1 = &sdmmc;
+ };
+
+ chosen {
+ stdout-path = "serial2:115200n8";
+ };
+
+ backlight: backlight {
+ compatible = "pwm-backlight";
+ power-supply = <&vcc_bl>;
+ pwms = <&pwm1 0 25000 0>;
+ brightness-levels = <
+ 0 1 2 3 4 5 6 7
+ 8 9 10 11 12 13 14 15
+ 16 17 18 19 20 21 22 23
+ 24 25 26 27 28 29 30 31
+ 32 33 34 35 36 37 38 39
+ 40 41 42 43 44 45 46 47
+ 48 49 50 51 52 53 54 55
+ 56 57 58 59 60 61 62 63
+ 64 65 66 67 68 69 70 71
+ 72 73 74 75 76 77 78 79
+ 80 81 82 83 84 85 86 87
+ 88 89 90 91 92 93 94 95
+ 96 97 98 99 100 101 102 103
+ 104 105 106 107 108 109 110 111
+ 112 113 114 115 116 117 118 119
+ 120 121 122 123 124 125 126 127
+ 128 129 130 131 132 133 134 135
+ 136 137 138 139 140 141 142 143
+ 144 145 146 147 148 149 150 151
+ 152 153 154 155 156 157 158 159
+ 160 161 162 163 164 165 166 167
+ 168 169 170 171 172 173 174 175
+ 176 177 178 179 180 181 182 183
+ 184 185 186 187 188 189 190 191
+ 192 193 194 195 196 197 198 199
+ 200 201 202 203 204 205 206 207
+ 208 209 210 211 212 213 214 215
+ 216 217 218 219 220 221 222 223
+ 224 225 226 227 228 229 230 231
+ 232 233 234 235 236 237 238 239
+ 240 241 242 243 244 245 246 247
+ 248 249 250 251 252 253 254 255>;
+ default-brightness-level = <128>;
+ };
+
+ gpio-keys-vol {
+ compatible = "gpio-keys";
+ autorepeat;
+ pinctrl-0 = <&btn_pins_vol>;
+ pinctrl-names = "default";
+
+ button-vol-down {
+ gpios = <&gpio2 RK_PA1 GPIO_ACTIVE_LOW>;
+ label = "VOLUMEDOWN";
+ linux,code = ;
+ };
+
+ button-volume-up {
+ gpios = <&gpio2 RK_PA0 GPIO_ACTIVE_LOW>;
+ label = "VOLUMEUP";
+ linux,code = ;
+ };
+ };
+
+ battery: battery {
+ compatible = "simple-battery";
+ charge-full-design-microamp-hours = <3200000>;
+ charge-term-current-microamp = <320000>;
+ constant-charge-current-max-microamp = <2000000>;
+ constant-charge-voltage-max-microvolt = <4200000>;
+ factory-internal-resistance-micro-ohms = <180000>;
+ voltage-max-design-microvolt = <4100000>;
+ voltage-min-design-microvolt = <3500000>;
+
+ ocv-capacity-celsius = <20>;
+ ocv-capacity-table-0 = <4046950 100>, <4001920 95>, <3967900 90>, <3919950 85>,
+ <3888450 80>, <3861850 75>, <3831540 70>, <3799130 65>,
+ <3768190 60>, <3745650 55>, <3726610 50>, <3711630 45>,
+ <3696720 40>, <3685660 35>, <3674950 30>, <3663050 25>,
+ <3649470 20>, <3635260 15>, <3616920 10>, <3592440 5>,
+ <3574170 0>;
+
+ };
+
+ rk817-sound {
+ compatible = "simple-audio-card";
+ simple-audio-card,name = "rk817_int";
+ simple-audio-card,format = "i2s";
+ simple-audio-card,hp-det-gpio = <&gpio2 RK_PC6 GPIO_ACTIVE_HIGH>;
+ simple-audio-card,mclk-fs = <256>;
+ simple-audio-card,widgets =
+ "Microphone", "Mic Jack",
+ "Headphone", "Headphones",
+ "Speaker", "Speaker";
+ simple-audio-card,routing =
+ "MICL", "Mic Jack",
+ "Headphones", "HPOL",
+ "Headphones", "HPOR",
+ "Speaker", "SPKO";
+
+ simple-audio-card,codec {
+ sound-dai = <&rk817>;
+ };
+
+ simple-audio-card,cpu {
+ sound-dai = <&i2s1_2ch>;
+ };
+ };
+
+ vccsys: vccsys {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v8_sys";
+ regulator-always-on;
+ regulator-min-microvolt = <3800000>;
+ regulator-max-microvolt = <3800000>;
+ };
+};
+
+&dmc {
+ center-supply = <&vdd_logic>;
+};
+
+&cpu0 {
+ cpu-supply = <&vdd_arm>;
+};
+
+&cpu1 {
+ cpu-supply = <&vdd_arm>;
+};
+
+&cpu2 {
+ cpu-supply = <&vdd_arm>;
+};
+
+&cpu3 {
+ cpu-supply = <&vdd_arm>;
+};
+
+&cru {
+ assigned-clocks = <&cru PLL_NPLL>,
+ <&cru ACLK_BUS_PRE>, <&cru ACLK_PERI_PRE>,
+ <&cru HCLK_BUS_PRE>, <&cru HCLK_PERI_PRE>,
+ <&cru PCLK_BUS_PRE>, <&cru SCLK_GPU>;
+
+ assigned-clock-rates = <1188000000>,
+ <200000000>, <200000000>,
+ <150000000>, <150000000>,
+ <100000000>, <200000000>;
+};
+
+&display_subsystem {
+ status = "okay";
+};
+
+&dsi {
+ status = "okay";
+
+ ports {
+ mipi_out: port@1 {
+ reg = <1>;
+
+ mipi_out_panel: endpoint {
+ remote-endpoint = <&mipi_in_panel>;
+ };
+ };
+ };
+
+ internal_display: panel@0 {
+ reg = <0>;
+ backlight = <&backlight>;
+ reset-gpios = <&gpio3 RK_PC0 GPIO_ACTIVE_LOW>;
+
+ port {
+ mipi_in_panel: endpoint {
+ remote-endpoint = <&mipi_out_panel>;
+ };
+ };
+ };
+};
+
+&dsi_dphy {
+ status = "okay";
+};
+
+&gpu {
+ mali-supply = <&vdd_logic>;
+ status = "okay";
+};
+
+&internal_display {
+ compatible = "gameconsole,r36s-panel", "sitronix,st7703";
+ iovcc-supply = <&vcc_lcd>;
+ vdd-supply = <&vcc_lcd>;
+};
+
+&i2c0 {
+ clock-frequency = <400000>;
+ i2c-scl-falling-time-ns = <16>;
+ i2c-scl-rising-time-ns = <280>;
+ status = "okay";
+
+ rk817: pmic@20 {
+ compatible = "rockchip,rk817";
+ reg = <0x20>;
+ interrupt-parent = <&gpio0>;
+ interrupts = ;
+ clock-output-names = "rk808-clkout1", "xin32k";
+ clock-names = "mclk";
+ clocks = <&cru SCLK_I2S1_OUT>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pmic_int>, <&i2s1_2ch_mclk>;
+ rockchip,system-power-controller;
+ wakeup-source;
+ #clock-cells = <1>;
+ #sound-dai-cells = <0>;
+
+ vcc1-supply = <&vccsys>;
+ vcc2-supply = <&vccsys>;
+ vcc3-supply = <&vccsys>;
+ vcc4-supply = <&vccsys>;
+ vcc5-supply = <&vccsys>;
+ vcc6-supply = <&vccsys>;
+ vcc7-supply = <&vccsys>;
+ vcc8-supply = <&vccsys>;
+
+ regulators {
+ vdd_logic: DCDC_REG1 {
+ regulator-name = "vdd_logic";
+ regulator-min-microvolt = <950000>;
+ regulator-max-microvolt = <1150000>;
+ regulator-ramp-delay = <6001>;
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <950000>;
+ };
+ };
+
+ vdd_arm: DCDC_REG2 {
+ regulator-name = "vdd_arm";
+ regulator-min-microvolt = <950000>;
+ regulator-max-microvolt = <1350000>;
+ regulator-ramp-delay = <6001>;
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <950000>;
+ };
+ };
+
+ vcc_ddr: DCDC_REG3 {
+ regulator-name = "vcc_ddr";
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ };
+ };
+
+ vcc_3v3: DCDC_REG4 {
+ regulator-name = "vcc_3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <3300000>;
+ };
+ };
+
+ vcc_1v8: LDO_REG2 {
+ regulator-name = "vcc_1v8";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <1800000>;
+ };
+ };
+
+ vdd_1v0: LDO_REG3 {
+ regulator-name = "vdd_1v0";
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1000000>;
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <1000000>;
+ };
+ };
+
+ vcc3v3_pmu: LDO_REG4 {
+ regulator-name = "vcc3v3_pmu";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <3300000>;
+ };
+ };
+
+ vccio_sd: LDO_REG5 {
+ regulator-name = "vccio_sd";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <1800000>;
+ };
+ };
+
+ vcc_sd: LDO_REG6 {
+ regulator-name = "vcc_sd";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3000000>;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <3000000>;
+ };
+ };
+
+ vcc_bl: LDO_REG7 {
+ regulator-name = "vcc_bl";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <3300000>;
+ };
+ };
+
+ vcc_lcd: LDO_REG8 {
+ regulator-name = "vcc_lcd";
+ regulator-min-microvolt = <2800000>;
+ regulator-max-microvolt = <2800000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <2800000>;
+ };
+ };
+
+ LDO_REG9 {
+ /* unused */
+ };
+
+ usb_midu: BOOST {
+ regulator-name = "usb_midu";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5400000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+ };
+
+ rk817_charger: charger {
+ rockchip,resistor-sense-micro-ohms = <10000>;
+ rockchip,sleep-enter-current-microamp = <300000>;
+ rockchip,sleep-filter-current-microamp = <100000>;
+ };
+
+ rk817_codec: codec {
+ rockchip,mic-in-differential;
+ };
+ };
+};
+
+&i2s1_2ch {
+ status = "okay";
+};
+
+&io_domains {
+ vccio1-supply = <&vccio_sd>;
+ vccio2-supply = <&vccio_sd>;
+ vccio3-supply = <&vcc_3v3>;
+ vccio4-supply = <&vcc_3v3>;
+ vccio5-supply = <&vcc_3v3>;
+ vccio6-supply = <&vcc_3v3>;
+ status = "okay";
+};
+
+&pmu_io_domains {
+ pmuio1-supply = <&vcc3v3_pmu>;
+ pmuio2-supply = <&vcc3v3_pmu>;
+ status = "okay";
+};
+
+&pwm0 {
+ status = "okay";
+};
+
+&pwm1 {
+ status = "okay";
+};
+
+&saradc {
+ vref-supply = <&vcc_1v8>;
+ status = "okay";
+};
+
+&sdmmc {
+ bus-width = <4>;
+ cap-sd-highspeed;
+ card-detect-delay = <800>;
+ cd-gpios = <&gpio0 RK_PA3 GPIO_ACTIVE_LOW>; /*[> CD GPIO <]*/
+ disable-wp;
+ sd-uhs-sdr12;
+ sd-uhs-sdr25;
+ sd-uhs-sdr50;
+ sd-uhs-sdr104;
+ vmmc-supply = <&vcc_sd>;
+ vqmmc-supply = <&vccio_sd>;
+ status = "okay";
+};
+
+&sdio {
+ bus-width = <4>;
+ cap-sd-highspeed;
+ card-detect-delay = <800>;
+ cd-gpios = <&gpio3 RK_PB6 GPIO_ACTIVE_LOW>; /*[> CD GPIO <]*/
+ disable-wp;
+ sd-uhs-sdr12;
+ sd-uhs-sdr25;
+ sd-uhs-sdr50;
+ sd-uhs-sdr104;
+ vmmc-supply = <&vcc_sd>;
+ vqmmc-supply = <&vccio_sd>;
+ status = "okay";
+};
+
+&tsadc {
+ status = "okay";
+};
+
+&u2phy {
+ status = "okay";
+
+ u2phy_host: host-port {
+ status = "okay";
+ };
+
+ u2phy_otg: otg-port {
+ status = "okay";
+ };
+};
+
+&usb20_otg {
+ status = "okay";
+};
+
+&uart2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart2m1_xfer>;
+ status = "okay";
+};
+
+&vopb {
+ status = "okay";
+};
+
+&vopb_mmu {
+ status = "okay";
+};
+
+&rk817_charger {
+ monitored-battery = <&battery>;
+};
+
+&pinctrl {
+ btns {
+ btn_pins_vol: btn-pins-vol {
+ rockchip,pins = <2 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>,
+ <2 RK_PA1 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+
+ headphone {
+ hp_det: hp-det {
+ rockchip,pins = <2 RK_PC6 RK_FUNC_GPIO &pcfg_pull_down>;
+ };
+ };
+
+ pmic {
+ dc_det: dc-det {
+ rockchip,pins = <0 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ pmic_int: pmic-int {
+ rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+
+ soc_slppin_gpio: soc_slppin_gpio {
+ rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_output_low>;
+ };
+
+ soc_slppin_rst: soc_slppin_rst {
+ rockchip,pins = <0 RK_PA4 2 &pcfg_pull_none>;
+ };
+
+ soc_slppin_slp: soc_slppin_slp {
+ rockchip,pins = <0 RK_PA4 1 &pcfg_pull_none>;
+ };
+ };
+};
diff --git a/config/archr-dts/rk3326-gameforce-chi.dts b/config/archr-dts/rk3326-gameforce-chi.dts
new file mode 100644
index 0000000000..7b47cf7017
--- /dev/null
+++ b/config/archr-dts/rk3326-gameforce-chi.dts
@@ -0,0 +1,811 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2024 Chris Morgan
+ */
+
+/dts-v1/;
+#include
+#include
+#include
+#include
+#include "rk3326.dtsi"
+
+/ {
+ model = "GameForce Chi";
+ compatible = "gameforce,chi", "rockchip,rk3326";
+ chassis-type = "handset";
+
+ aliases {
+ mmc0 = &sdmmc;
+ mmc1 = &sdio;
+ };
+
+ chosen {
+ stdout-path = "serial2:115200n8";
+ };
+
+ adc_joystick: adc-joystick {
+ compatible = "adc-joystick";
+ io-channels = <&saradc 0>,
+ <&saradc 1>;
+ poll-interval = <100>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ axis@0 {
+ reg = <0>;
+ abs-flat = <10>;
+ abs-fuzz = <10>;
+ abs-range = <850 175>;
+ linux,code = ;
+ };
+
+ axis@1 {
+ reg = <1>;
+ abs-flat = <10>;
+ abs-fuzz = <10>;
+ abs-range = <800 190>;
+ linux,code = ;
+ };
+ };
+
+ adc_keys: adc-keys {
+ compatible = "adc-keys";
+ io-channels = <&saradc 2>;
+ io-channel-names = "buttons";
+ keyup-threshold-microvolt = <1800000>;
+ poll-interval = <60>;
+
+ button-1 {
+ label = "HAPPY1";
+ linux,code = ;
+ press-threshold-microvolt = <15000>;
+ };
+
+ button-2 {
+ label = "HAPPY2";
+ linux,code = ;
+ press-threshold-microvolt = <300000>;
+ };
+ };
+
+ backlight: backlight {
+ compatible = "pwm-backlight";
+ power-supply = <&vcc_bl>;
+ pwms = <&pwm1 0 25000 0>;
+ };
+
+ battery: battery {
+ compatible = "simple-battery";
+ charge-full-design-microamp-hours = <3000000>;
+ charge-term-current-microamp = <300000>;
+ constant-charge-current-max-microamp = <1500000>;
+ constant-charge-voltage-max-microvolt = <4200000>;
+ factory-internal-resistance-micro-ohms = <180000>;
+ ocv-capacity-celsius = <20>;
+ ocv-capacity-table-0 = <4106000 100>, <4071000 95>, <4018000 90>, <3975000 85>,
+ <3946000 80>, <3908000 75>, <3877000 70>, <3853000 65>,
+ <3834000 60>, <3816000 55>, <3802000 50>, <3788000 45>,
+ <3774000 40>, <3760000 35>, <3748000 30>, <3735000 25>,
+ <3718000 20>, <3697000 15>, <3685000 10>, <3625000 5>,
+ <3400000 0>;
+ voltage-max-design-microvolt = <4250000>;
+ voltage-min-design-microvolt = <3400000>;
+ };
+
+ gpio_leds: gpio-leds {
+ compatible = "gpio-leds";
+ pinctrl-names = "default";
+ pinctrl-0 = <&led_pins>;
+
+ red_led: led-0 {
+ color = ;
+ gpios = <&gpio3 RK_PC4 GPIO_ACTIVE_HIGH>;
+ };
+
+ green_led: led-1 {
+ color = ;
+ gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>;
+ };
+
+ blue_led: led-2 {
+ color = ;
+ gpios = <&gpio3 RK_PC6 GPIO_ACTIVE_HIGH>;
+ };
+
+ white_led: led-3 {
+ color = ;
+ function = LED_FUNCTION_STATUS;
+ gpios = <&gpio3 RK_PB3 GPIO_ACTIVE_HIGH>;
+ };
+
+ chg_led: led-4 {
+ color = ;
+ function = LED_FUNCTION_CHARGING;
+ gpios = <&gpio3 RK_PB2 GPIO_ACTIVE_HIGH>;
+ };
+
+ };
+
+ gpio_keys: gpio-keys {
+ compatible = "gpio-keys";
+ pinctrl-0 = <&btn_pins_ctrl>;
+ pinctrl-names = "default";
+
+ button-a {
+ gpios = <&gpio2 RK_PB0 GPIO_ACTIVE_LOW>;
+ label = "EAST";
+ linux,code = ;
+ };
+
+ button-b {
+ gpios = <&gpio2 RK_PB1 GPIO_ACTIVE_LOW>;
+ label = "SOUTH";
+ linux,code = ;
+ };
+
+ button-down {
+ gpios = <&gpio1 RK_PB5 GPIO_ACTIVE_LOW>;
+ label = "DPAD-DOWN";
+ linux,code = ;
+ };
+
+ button-home {
+ gpios = <&gpio2 RK_PA0 GPIO_ACTIVE_LOW>;
+ label = "HOME";
+ linux,code = ;
+ };
+
+ button-l1 {
+ gpios = <&gpio2 RK_PA6 GPIO_ACTIVE_LOW>;
+ label = "TL";
+ linux,code = ;
+ };
+
+ button-l2 {
+ gpios = <&gpio2 RK_PA4 GPIO_ACTIVE_LOW>;
+ label = "TL2";
+ linux,code = ;
+ };
+
+ button-left {
+ gpios = <&gpio1 RK_PB6 GPIO_ACTIVE_LOW>;
+ label = "DPAD-LEFT";
+ linux,code = ;
+ };
+
+ button-r1 {
+ gpios = <&gpio2 RK_PA7 GPIO_ACTIVE_LOW>;
+ label = "TR";
+ linux,code = ;
+ };
+
+ button-r2 {
+ gpios = <&gpio2 RK_PA5 GPIO_ACTIVE_LOW>;
+ label = "TR2";
+ linux,code = ;
+ };
+
+ button-right {
+ gpios = <&gpio1 RK_PB7 GPIO_ACTIVE_LOW>;
+ label = "DPAD-RIGHT";
+ linux,code = ;
+ };
+
+ button-select {
+ gpios = <&gpio2 RK_PA3 GPIO_ACTIVE_LOW>;
+ label = "SELECT";
+ linux,code = ;
+ };
+
+ button-start {
+ gpios = <&gpio2 RK_PA2 GPIO_ACTIVE_LOW>;
+ label = "START";
+ linux,code = ;
+ };
+
+ button-up {
+ gpios = <&gpio1 RK_PB4 GPIO_ACTIVE_LOW>;
+ label = "DPAD-UP";
+ linux,code = ;
+ };
+
+ button-x {
+ gpios = <&gpio2 RK_PB3 GPIO_ACTIVE_LOW>;
+ label = "NORTH";
+ linux,code = ;
+ };
+
+ button-y {
+ gpios = <&gpio2 RK_PB2 GPIO_ACTIVE_LOW>;
+ label = "WEST";
+ linux,code = ;
+ };
+ };
+
+ multi-led {
+ compatible = "leds-group-multicolor";
+ color = ;
+ function = LED_FUNCTION_KBD_BACKLIGHT;
+ leds = <&red_led>, <&green_led>, <&blue_led>;
+ };
+
+ spk_amp: audio-amplifier {
+ compatible = "simple-audio-amplifier";
+ enable-gpios = <&gpio2 RK_PB5 GPIO_ACTIVE_HIGH>;
+ pinctrl-0 = <&spk_amp_enable_h>;
+ pinctrl-names = "default";
+ sound-name-prefix = "Speaker Amp";
+ };
+
+ sound {
+ compatible = "simple-audio-card";
+ pinctrl-0 = <&hp_det>;
+ pinctrl-names = "default";
+ simple-audio-card,name = "rk817_ext";
+ simple-audio-card,aux-devs = <&spk_amp>;
+ simple-audio-card,format = "i2s";
+ simple-audio-card,hp-det-gpio = <&gpio2 RK_PC6 GPIO_ACTIVE_HIGH>;
+ simple-audio-card,mclk-fs = <256>;
+ simple-audio-card,widgets =
+ "Microphone", "Mic Jack",
+ "Headphone", "Headphones",
+ "Speaker", "Internal Speakers";
+ simple-audio-card,routing =
+ "MICL", "Mic Jack",
+ "Headphones", "HPOL",
+ "Headphones", "HPOR",
+ "Internal Speakers", "Speaker Amp OUTL",
+ "Internal Speakers", "Speaker Amp OUTR",
+ "Speaker Amp INL", "HPOL",
+ "Speaker Amp INR", "HPOR";
+ simple-audio-card,pin-switches = "Internal Speakers";
+
+ simple-audio-card,codec {
+ sound-dai = <&rk817>;
+ };
+
+ simple-audio-card,cpu {
+ sound-dai = <&i2s1_2ch>;
+ };
+ };
+
+ vibrator_left: pwm-vibrator-l {
+ compatible = "pwm-vibrator";
+ pwm-names = "enable";
+ pwms = <&pwm4 0 25000 0>;
+ };
+
+ vibrator_right: pwm-vibrator-r {
+ compatible = "pwm-vibrator";
+ pwm-names = "enable";
+ pwms = <&pwm5 0 25000 0>;
+ };
+
+ sdio_pwrseq: sdio-pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ clocks = <&rk817 1>;
+ clock-names = "ext_clock";
+ pinctrl-0 = <&wifi_enable_h>;
+ pinctrl-names = "default";
+ post-power-on-delay-ms = <200>;
+ reset-gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_LOW>;
+ };
+
+ vccsys: regulator-vccsys {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v8_sys";
+ regulator-always-on;
+ regulator-min-microvolt = <3800000>;
+ regulator-max-microvolt = <3800000>;
+ };
+};
+
+&cpu0 {
+ cpu-supply = <&vdd_arm>;
+};
+
+&cpu1 {
+ cpu-supply = <&vdd_arm>;
+};
+
+&cpu2 {
+ cpu-supply = <&vdd_arm>;
+};
+
+&cpu3 {
+ cpu-supply = <&vdd_arm>;
+};
+
+&display_subsystem {
+ status = "okay";
+};
+
+&dsi {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "okay";
+
+ internal_display: panel@0 {
+ reg = <0>;
+ compatible = "gameforce,chi-panel";
+ backlight = <&backlight>;
+ iovcc-supply = <&vcc_lcd>;
+ vcc-supply = <&vcc_lcd>;
+ reset-gpios = <&gpio3 RK_PA0 GPIO_ACTIVE_LOW>;
+
+ port {
+ mipi_in_panel: endpoint {
+ remote-endpoint = <&mipi_out_panel>;
+ };
+ };
+ };
+
+ ports {
+ mipi_out: port@1 {
+ reg = <1>;
+
+ mipi_out_panel: endpoint {
+ remote-endpoint = <&mipi_in_panel>;
+ };
+ };
+ };
+};
+
+&dsi_dphy {
+ status = "okay";
+};
+
+&gpu {
+ mali-supply = <&vdd_logic>;
+ status = "okay";
+};
+
+&i2c0 {
+ clock-frequency = <400000>;
+ i2c-scl-falling-time-ns = <16>;
+ i2c-scl-rising-time-ns = <280>;
+ status = "okay";
+
+ rk817: pmic@20 {
+ compatible = "rockchip,rk817";
+ reg = <0x20>;
+ #clock-cells = <1>;
+ clock-names = "mclk";
+ clock-output-names = "rk808-clkout1", "xin32k";
+ clocks = <&cru SCLK_I2S1_OUT>;
+ interrupt-parent = <&gpio0>;
+ interrupts = ;
+ pinctrl-0 = <&pmic_int>, <&i2s1_2ch_mclk>;
+ pinctrl-names = "default";
+ #sound-dai-cells = <0>;
+ system-power-controller;
+ wakeup-source;
+
+ vcc1-supply = <&vccsys>;
+ vcc2-supply = <&vccsys>;
+ vcc3-supply = <&vccsys>;
+ vcc4-supply = <&vccsys>;
+ vcc5-supply = <&vccsys>;
+ vcc6-supply = <&vccsys>;
+ vcc7-supply = <&vcc_3v0>;
+ vcc8-supply = <&vccsys>;
+ vcc9-supply = <&dcdc_boost>;
+
+ regulators {
+ vdd_logic: DCDC_REG1 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <1150000>;
+ regulator-min-microvolt = <950000>;
+ regulator-name = "vdd_logic";
+ regulator-ramp-delay = <6001>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <950000>;
+ };
+ };
+
+ vdd_arm: DCDC_REG2 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <1350000>;
+ regulator-min-microvolt = <950000>;
+ regulator-name = "vdd_arm";
+ regulator-ramp-delay = <6001>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <950000>;
+ };
+ };
+
+ vcc_ddr: DCDC_REG3 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-name = "vcc_ddr";
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ };
+ };
+
+ vcc_3v0: DCDC_REG4 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <3000000>;
+ regulator-min-microvolt = <3000000>;
+ regulator-name = "vcc_3v0";
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <3000000>;
+ };
+ };
+
+ vcc_1v8: LDO_REG2 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <1800000>;
+ regulator-min-microvolt = <1800000>;
+ regulator-name = "vcc_1v8";
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <1800000>;
+ };
+ };
+
+ vdd_1v0: LDO_REG3 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <1000000>;
+ regulator-min-microvolt = <1000000>;
+ regulator-name = "vdd_1v0";
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <1000000>;
+ };
+ };
+
+ vcc_3v0_pmu: LDO_REG4 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <3000000>;
+ regulator-min-microvolt = <3000000>;
+ regulator-name = "vcc_3v0_pmu";
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <3000000>;
+ };
+ };
+
+ vccio_sd: LDO_REG5 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <3300000>;
+ regulator-min-microvolt = <1800000>;
+ regulator-name = "vccio_sd";
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <3300000>;
+ };
+ };
+
+ vcc_sd: LDO_REG6 {
+ regulator-boot-on;
+ regulator-max-microvolt = <3300000>;
+ regulator-min-microvolt = <3300000>;
+ regulator-name = "vcc_sd";
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <3300000>;
+ };
+ };
+
+ vcc_bl: LDO_REG7 {
+ regulator-max-microvolt = <3300000>;
+ regulator-min-microvolt = <3300000>;
+ regulator-name = "vcc_bl";
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <3300000>;
+ };
+ };
+
+ vcc_lcd: LDO_REG8 {
+ regulator-max-microvolt = <2800000>;
+ regulator-min-microvolt = <2800000>;
+ regulator-name = "vcc_lcd";
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <2800000>;
+ };
+ };
+
+ vcc_wifi: LDO_REG9 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <3300000>;
+ regulator-min-microvolt = <3300000>;
+ regulator-name = "vcc_wifi";
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <3300000>;
+ };
+ };
+
+ dcdc_boost: BOOST {
+ regulator-max-microvolt = <5000000>;
+ regulator-min-microvolt = <5000000>;
+ regulator-name = "dcdc_boost";
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ otg_switch: OTG_SWITCH {
+ regulator-name = "otg_switch";
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+ };
+
+ rk817_charger: charger {
+ monitored-battery = <&battery>;
+ rockchip,resistor-sense-micro-ohms = <10000>;
+ rockchip,sleep-enter-current-microamp = <300000>;
+ rockchip,sleep-filter-current-microamp = <100000>;
+ };
+ };
+};
+
+&i2s1_2ch {
+ status = "okay";
+};
+
+&io_domains {
+ vccio1-supply = <&vcc_3v0_pmu>;
+ vccio2-supply = <&vccio_sd>;
+ vccio3-supply = <&vcc_3v0>;
+ vccio4-supply = <&vcc_3v0>;
+ vccio5-supply = <&vcc_3v0>;
+ vccio6-supply = <&vcc_3v0>;
+ status = "okay";
+};
+
+&pinctrl {
+ bluetooth-pins {
+ bt_reset: bt-reset {
+ rockchip,pins =
+ <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_down>;
+ };
+
+ bt_wake_dev: bt-wake-dev {
+ rockchip,pins =
+ <0 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ bt_wake_host: bt-wake-host {
+ rockchip,pins =
+ <0 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ headphone {
+ hp_det: hp-det {
+ rockchip,pins =
+ <2 RK_PC6 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+
+ gpio-btns {
+ btn_pins_ctrl: btn-pins-ctrl {
+ rockchip,pins =
+ <1 RK_PB4 RK_FUNC_GPIO &pcfg_pull_up>,
+ <1 RK_PB5 RK_FUNC_GPIO &pcfg_pull_up>,
+ <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_up>,
+ <1 RK_PB7 RK_FUNC_GPIO &pcfg_pull_up>,
+ <2 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>,
+ <2 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>,
+ <2 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>,
+ <2 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>,
+ <2 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>,
+ <2 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>,
+ <2 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up>,
+ <2 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>,
+ <2 RK_PB1 RK_FUNC_GPIO &pcfg_pull_up>,
+ <2 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>,
+ <2 RK_PB3 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+
+ gpio-leds {
+ led_pins: led-pins {
+ rockchip,pins =
+ <3 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>,
+ <3 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>,
+ <3 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>,
+ <3 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>,
+ <3 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ pmic {
+ pmic_int: pmic-int {
+ rockchip,pins =
+ <0 RK_PC1 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+
+ soc_slppin_gpio: soc_slppin_gpio {
+ rockchip,pins =
+ <0 RK_PA4 RK_FUNC_GPIO &pcfg_output_low>;
+ };
+
+ soc_slppin_rst: soc_slppin_rst {
+ rockchip,pins =
+ <0 RK_PA4 2 &pcfg_pull_none>;
+ };
+
+ soc_slppin_slp: soc_slppin_slp {
+ rockchip,pins =
+ <0 RK_PA4 1 &pcfg_pull_none>;
+ };
+ };
+
+ sdio-pwrseq {
+ wifi_enable_h: wifi-enable-h {
+ rockchip,pins =
+ <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ speaker {
+ spk_amp_enable_h: spk-amp-enable-h {
+ rockchip,pins =
+ <2 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+};
+
+&pmu_io_domains {
+ pmuio1-supply = <&vcc_1v8>;
+ pmuio2-supply = <&vcc_3v0_pmu>;
+ status = "okay";
+};
+
+&pwm1 {
+ status = "okay";
+};
+
+&pwm4 {
+ status = "okay";
+};
+
+&pwm5 {
+ status = "okay";
+};
+
+&saradc {
+ vref-supply = <&vcc_1v8>;
+ status = "okay";
+};
+
+&sdio {
+ bus-width = <4>;
+ cap-sd-highspeed;
+ cap-sdio-irq;
+ disable-wp;
+ keep-power-in-suspend;
+ mmc-pwrseq = <&sdio_pwrseq>;
+ no-mmc;
+ no-sd;
+ non-removable;
+ sd-uhs-sdr104;
+ status = "okay";
+};
+
+&sdmmc {
+ cap-mmc-highspeed;
+ cap-sd-highspeed;
+ no-sdio;
+ sd-uhs-sdr12;
+ sd-uhs-sdr25;
+ sd-uhs-sdr50;
+ sd-uhs-sdr104;
+ vmmc-supply = <&vcc_sd>;
+ vqmmc-supply = <&vccio_sd>;
+ status = "okay";
+};
+
+&sfc {
+ #address-cells = <1>;
+ pinctrl-0 = <&sfc_clk &sfc_cs0 &sfc_bus2>;
+ pinctrl-names = "default";
+ #size-cells = <0>;
+ status = "okay";
+
+ flash@0 {
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ spi-max-frequency = <108000000>;
+ spi-rx-bus-width = <2>;
+ spi-tx-bus-width = <1>;
+ };
+};
+
+&tsadc {
+ status = "okay";
+};
+
+&u2phy {
+ status = "okay";
+
+ u2phy_otg: otg-port {
+ status = "okay";
+ };
+};
+
+&usb20_otg {
+ status = "okay";
+};
+
+/*
+ * The right ADC joystick exists connected to an unknown ADC
+ * controller which can be communicated with via uart0. This ADC device
+ * is an 8-pin SOIC with no markings located right next to the left ADC
+ * joystick ribbon cable. The pinout for this ADC controller appears to
+ * be pin 1 - VCC (2.8v), pin 2 - 1.8v (clk maybe?), pin 3 - GPIO 10,
+ * pin 4 - unknown, pin 5 - unknown, pin 6 - analog in, pin 7 - analog in,
+ * pin 8 - ground. There is currently a userspace UART driver for this
+ * device but it only works with the BSP joystick driver.
+ */
+&uart0 {
+ status = "okay";
+};
+
+/*
+ * Bluetooth was not working on BSP and is not currently working on
+ * mainline due to missing firmware. Bluetooth requires removal of DMA
+ * or else it will not probe.
+ */
+&uart1 {
+ /delete-property/ dma-names;
+ /delete-property/ dmas;
+ uart-has-rtscts;
+ status = "okay";
+
+ bluetooth: bluetooth {
+ compatible = "realtek,rtl8723ds-bt";
+ device-wake-gpios = <&gpio0 RK_PA1 GPIO_ACTIVE_HIGH>;
+ enable-gpios = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>;
+ host-wake-gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_HIGH>;
+ pinctrl-0 = <&bt_reset>, <&bt_wake_dev>, <&bt_wake_host>;
+ pinctrl-names = "default";
+ };
+};
+
+&uart2 {
+ pinctrl-0 = <&uart2m1_xfer>;
+ pinctrl-names = "default";
+ status = "okay";
+};
+
+&vopb {
+ status = "okay";
+};
+
+&vopb_mmu {
+ status = "okay";
+};
diff --git a/config/archr-dts/rk3326-magicx-xu-mini-m.dts b/config/archr-dts/rk3326-magicx-xu-mini-m.dts
new file mode 100644
index 0000000000..ad4841e365
--- /dev/null
+++ b/config/archr-dts/rk3326-magicx-xu-mini-m.dts
@@ -0,0 +1,109 @@
+/// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2024-present ROCKNIX (https://github.com/ROCKNIX)
+ * Copyright (c) 2024 Olivier Schonken
+ */
+
+#include "rk3326-magicx-xu10.dts"
+
+/ {
+ model = "MagicX XU Mini M";
+ compatible = "magicx,xu-mini-m", "rockchip,rk3326";
+};
+
+&battery {
+ charge-full-design-microamp-hours = <2600000>;
+};
+
+&dsi {
+ internal_display: panel@0 {
+ compatible = "archr,generic-dsi";
+ panel_description =
+ "G size=69,139 delays=5,20,20,120,20 format=rgb888 lanes=2 flags=0xe03",
+
+ "M clock=25000 horizontal=480,60,10,54 vertical=640,20,10,20 default=1",
+ "M clock=25200 horizontal=480,60,22,54 vertical=640,20,139,20",
+ "M clock=25000 horizontal=480,60,31,54 vertical=640,20,120,20",
+ "M clock=25660 horizontal=480,60,22,54 vertical=640,20,153,20",
+ "M clock=25300 horizontal=480,60,31,54 vertical=640,20,24,20",
+ "M clock=28590 horizontal=480,60,15,54 vertical=640,20,106,20",
+ "M clock=25380 horizontal=480,60,17,54 vertical=640,20,13,20",
+ "M clock=25410 horizontal=480,60,11,54 vertical=640,20,20,20",
+ "M clock=29490 horizontal=480,60,24,54 vertical=640,20,114,20",
+ "M clock=33520 horizontal=480,60,36,54 vertical=640,20,25,20",
+ "M clock=38430 horizontal=480,60,16,54 vertical=640,20,20,20",
+ "M clock=50820 horizontal=480,60,11,54 vertical=640,20,20,20",
+
+ "I seq=ff7701000013",
+ "I seq=ef08",
+ "I seq=ff7701000010",
+ "I seq=c04f00", "I seq=c11002", "I seq=c22002", "I seq=cc10",
+ "I seq=b006161e0e12060a0809230412102b311f",
+ "I seq=b1060f160d100704090720051210262f1f",
+ "I seq=ff7701000011",
+ "I seq=b065", "I seq=b185", "I seq=b282", "I seq=b380", "I seq=b542", "I seq=b785",
+ "I seq=b820",
+ "I seq=c178", "I seq=c278",
+ "I seq=d088",
+ "I seq=e0000002",
+ "I seq=e104a006a005a007a0004444",
+ "I seq=e2000000000000000000000000",
+ "I seq=e300002222",
+ "I seq=e44444",
+ "I seq=e50c90a0a00e92a0a0088ca0a00a8ea0a0",
+ "I seq=e600002222",
+ "I seq=e74444",
+ "I seq=e80d91a0a00f93a0a0098da0a00b8fa0a0",
+ "I seq=eb0000e4e4440040",
+ "I seq=edfff5476f0ba1abffffba1ab0f6745fff",
+ "I seq=ef080808403f64",
+ "I seq=ff7701000013",
+ "I seq=e6167c", "I seq=e8000e",
+ "I seq=e8000c wait=50",
+ "I seq=e80000",
+ "I seq=ff7701000000",
+ "I seq=11 wait=150",
+ "I seq=29 wait=120";
+ rotation = <90>;
+ };
+};
+
+&joypad {
+ joypad-name = "XU Mini M Gamepad";
+
+ invert-absrx;
+ /delete-property/ invert-absx;
+
+ sw5 {
+ gpios = <&gpio2 RK_PA3 GPIO_ACTIVE_LOW>;
+ label = "GPIO BTN-B";
+ };
+ sw6 {
+ gpios = <&gpio2 RK_PA1 GPIO_ACTIVE_LOW>;
+ label = "GPIO BTN-A";
+ };
+ sw7 {
+ gpios = <&gpio2 RK_PA0 GPIO_ACTIVE_LOW>;
+ label = "GPIO BTN-X";
+ };
+ sw8 {
+ gpios = <&gpio2 RK_PA2 GPIO_ACTIVE_LOW>;
+ label = "GPIO BTN-Y";
+ };
+ sw16 {
+ gpios = <&gpio3 RK_PB4 GPIO_ACTIVE_LOW>;
+ };
+ sw17 {
+ gpios = <&gpio3 RK_PB2 GPIO_ACTIVE_LOW>;
+ };
+};
+
+&pinctrl {
+ headphone {
+ hp_det: hp-det {
+ rockchip,pins = <2 RK_PC6 RK_FUNC_GPIO &pcfg_pull_down>;
+ };
+ };
+};
+
+
diff --git a/config/archr-dts/rk3326-magicx-xu10.dts b/config/archr-dts/rk3326-magicx-xu10.dts
new file mode 100644
index 0000000000..91e06ffd17
--- /dev/null
+++ b/config/archr-dts/rk3326-magicx-xu10.dts
@@ -0,0 +1,872 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2019 Hardkernel Co., Ltd
+ * Copyright (c) 2020 Theobroma Systems Design und Consulting GmbH
+ * Copyright (c) 2022 Maya Matuszczyk
+ */
+
+/dts-v1/;
+#include
+#include
+#include
+#include
+#include "rk3326.dtsi"
+
+/ {
+ model = "MagicX XU10";
+ compatible = "magicx,xu10", "rockchip,rk3326";
+
+ aliases {
+ mmc0 = &sdio;
+ mmc1 = &sdmmc;
+ };
+
+ backlight: backlight {
+ compatible = "pwm-backlight";
+ pwms = <&pwm1 0 25000 0>;
+ brightness-levels = <
+ 0 1 2 3 4 5 6 7
+ 8 9 10 11 12 13 14 15
+ 16 17 18 19 20 21 22 23
+ 24 25 26 27 28 29 30 31
+ 32 33 34 35 36 37 38 39
+ 40 41 42 43 44 45 46 47
+ 48 49 50 51 52 53 54 55
+ 56 57 58 59 60 61 62 63
+ 64 65 66 67 68 69 70 71
+ 72 73 74 75 76 77 78 79
+ 80 81 82 83 84 85 86 87
+ 88 89 90 91 92 93 94 95
+ 96 97 98 99 100 101 102 103
+ 104 105 106 107 108 109 110 111
+ 112 113 114 115 116 117 118 119
+ 120 121 122 123 124 125 126 127
+ 128 129 130 131 132 133 134 135
+ 136 137 138 139 140 141 142 143
+ 144 145 146 147 148 149 150 151
+ 152 153 154 155 156 157 158 159
+ 160 161 162 163 164 165 166 167
+ 168 169 170 171 172 173 174 175
+ 176 177 178 179 180 181 182 183
+ 184 185 186 187 188 189 190 191
+ 192 193 194 195 196 197 198 199
+ 200 201 202 203 204 205 206 207
+ 208 209 210 211 212 213 214 215
+ 216 217 218 219 220 221 222 223
+ 224 225 226 227 228 229 230 231
+ 232 233 234 235 236 237 238 239
+ 240 241 242 243 244 245 246 247
+ 248 249 250 251 252 253 254 255>;
+ default-brightness-level = <128>;
+ };
+
+ joypad: xu10-joypad {
+ compatible = "xu10-joypad";
+
+ joypad-name = "XU10 Gamepad";
+ joypad-product = <0x0200>;
+ joypad-revision = <0x0010>;
+
+ status = "okay";
+ /*
+ - xu10-joypad sysfs list -
+ * for poll device interval(ms)
+ /sys/devices/platform/odroidgo3_joypad/poll_interval [rw]
+ ex) echo 20 > poll_interval
+ * for button-adc-fuzz
+ /sys/devices/platform/odroidgo3_joypad/adc_fuzz [r]
+ * for button-adc-flat
+ /sys/devices/platform/odroidgo3_joypad/adc_flat [r]
+
+ * for report control(1:enable, 0:disable)
+ /sys/devices/platform/odroidgo3_joypad/enable [rw]
+ * for adc calibration value setup(current adcs value -> cal value)
+ /sys/devices/platform/odroidgo3_joypad/adc_cal [rw]
+ ex) echo 0 > adc_cal
+ * for amux data debug
+ * Joypad driver is disabled when using this sysfs.
+ /sys/devices/platform/odroidgo3_joypad/amux_debug [rw]
+ ex) echo 0 > amux_debug --> select amux channel
+ ex) cat amux_debug --> get adc data of seleted channel
+ */
+
+ /* gpio pincontrol setup */
+ pinctrl-names = "default";
+ pinctrl-0 = <&btn_pins>;
+
+ /* Analog mux define */
+ io-channel-names = "joy_left", "joy_right";
+ io-channels = <&saradc 1>, <&saradc 2>;
+
+ /* adc mux channel count */
+ amux-count = <4>;
+
+ /* adc mux select(a,b) gpio */
+ amux-a-gpios = <&gpio2 RK_PB3 GPIO_ACTIVE_LOW>;
+ amux-b-gpios = <&gpio2 RK_PB5 GPIO_ACTIVE_LOW>;
+
+ /* adc mux enable gpio */
+ amux-en-gpios = <&gpio1 RK_PB0 GPIO_ACTIVE_LOW>;
+
+ /* adc calculate scale */
+ button-adc-scale = <2>;
+
+ /* adc deadzone range */
+ button-adc-deadzone = <180>;
+
+ /*
+ specifies fuzz value that is used to filter noise from
+ the event stream.
+ */
+ button-adc-fuzz = <32>;
+ button-adc-flat = <32>;
+
+ /*
+ Analog Stick data tuning value(precent)
+ p = positive direction, n = negative direction
+ report value = (real_adc_data * tuning_value) / 100
+ */
+ abs_x-p-tuning = <200>;
+ abs_x-n-tuning = <200>;
+
+ abs_y-p-tuning = <200>;
+ abs_y-n-tuning = <200>;
+
+ abs_rx-p-tuning = <200>;
+ abs_rx-n-tuning = <200>;
+
+ abs_ry-p-tuning = <200>;
+ abs_ry-n-tuning = <200>;
+
+ /* poll device interval (ms), adc read interval */
+ poll-interval = <10>;
+
+ /* required for XU10 */
+ invert-absx;
+ invert-absy;
+
+ /* gpio button auto repeat set value : default disable */
+ /*
+ autorepeat;
+ */
+
+ /*
+ *** MagicX XU10 - layoout ***
+ |-------------------------------|
+ | sw14 sw17 sw16 sw15 |
+ |-----|-------------------|-----|
+ | | | |
+ |vol+ | | sw13|
+ |vol- | | |
+ | | LCD Display | |
+ | | | |
+ | | | |
+ | |-------------------| |
+ | sw9 sw10 |
+ | |
+ | sw1 sw7 |
+ | sw3 sw4 sw8 sw6 |
+ | sw2 sw5 |
+ | |
+ | sw11 sw12 |
+ | |
+ |-------|---------------|-------|
+ */
+
+ /*
+ joypad driver is poll-device driver.
+ poll-device is does not support wakeup-source.
+ */
+
+ sw1 {
+ gpios = <&gpio1 RK_PB4 GPIO_ACTIVE_LOW>;
+ label = "GPIO DPAD-UP";
+ linux,code = ; // 0x220
+ };
+ sw2 {
+ gpios = <&gpio1 RK_PB5 GPIO_ACTIVE_LOW>;
+ label = "GPIO DPAD-DOWN";
+ linux,code = ; // 0x221
+ };
+ sw3 {
+ gpios = <&gpio1 RK_PB6 GPIO_ACTIVE_LOW>;
+ label = "GPIO DPAD-LEFT";
+ linux,code = ; // 0x222
+ };
+ sw4 {
+ gpios = <&gpio1 RK_PB7 GPIO_ACTIVE_LOW>;
+ label = "GPIO DPAD-RIGHT";
+ linux,code = ; // 0x223
+ };
+ sw5 {
+ gpios = <&gpio2 RK_PA2 GPIO_ACTIVE_LOW>;
+ label = "GPIO BTN-A";
+ linux,code = ; // 0x130
+ };
+ sw6 {
+ gpios = <&gpio2 RK_PA3 GPIO_ACTIVE_LOW>;
+ label = "GPIO BTN-B";
+ linux,code = ; // 0x131
+ };
+ sw7 {
+ gpios = <&gpio2 RK_PA1 GPIO_ACTIVE_LOW>;
+ label = "GPIO BTN-Y";
+ linux,code = ; // 0x133
+ };
+ sw8 {
+ gpios = <&gpio2 RK_PA0 GPIO_ACTIVE_LOW>;
+ label = "GPIO BTN-X";
+ linux,code = ; // 0x134
+ };
+ sw9 {
+ gpios = <&gpio2 RK_PB0 GPIO_ACTIVE_LOW>;
+ label = "GPIO BTN-SELECT";
+ linux,code = ; // 0x13a
+ };
+ sw10 {
+ gpios = <&gpio2 RK_PA5 GPIO_ACTIVE_LOW>;
+ label = "GPIO BTN-START";
+ linux,code = ; // 0x13b
+ };
+ sw11 {
+ gpios = <&gpio2 RK_PB1 GPIO_ACTIVE_LOW>;
+ label = "GPIO BTN-THUMBL";
+ linux,code = ; // 0x13d
+ };
+ sw12 {
+ gpios = <&gpio2 RK_PB2 GPIO_ACTIVE_LOW>;
+ label = "GPIO BTN-THUMBR";
+ linux,code = ; // 0x13e
+ };
+ sw13 {
+ gpios = <&gpio2 RK_PA4 GPIO_ACTIVE_LOW>;
+ label = "GPIO BTN-G";
+ linux,code = ; // 0x2c0
+ };
+ sw14 {
+ gpios = <&gpio2 RK_PA6 GPIO_ACTIVE_LOW>;
+ label = "GPIO BTN-LEFT";
+ linux,code = ; // 0x136
+ };
+ sw15 {
+ gpios = <&gpio2 RK_PA7 GPIO_ACTIVE_LOW>;
+ label = "GPIO BTN-RIGHT";
+ linux,code = ; // 0x137
+ };
+ sw16 {
+ gpios = <&gpio3 RK_PB2 GPIO_ACTIVE_LOW>;
+ label = "GPIO BTN-RIGHT2";
+ linux,code = ; // 0x139
+ };
+ sw17 {
+ gpios = <&gpio3 RK_PB4 GPIO_ACTIVE_LOW>;
+ label = "GPIO BTN-LEFT2";
+ linux,code = ; // 0x138
+ };
+ };
+
+ battery: battery {
+ compatible = "simple-battery";
+ charge-full-design-microamp-hours = <3000000>;
+ charge-term-current-microamp = <200000>;
+ constant-charge-current-max-microamp = <1500000>;
+ constant-charge-voltage-max-microvolt = <4200000>;
+ factory-internal-resistance-micro-ohms = <100000>;
+ voltage-max-design-microvolt = <4100000>;
+ voltage-min-design-microvolt = <3300000>;
+
+ ocv-capacity-celsius = <20>;
+ ocv-capacity-table-0 =
+ <4046950 100>, <4001920 95>, <3967900 90>, <3940000 85>,
+ <3910000 80>, <3870000 75>, <3830000 70>, <3790000 65>,
+ <3750000 60>, <3720000 55>, <3690000 50>, <3650000 45>,
+ <3610000 40>, <3570000 35>, <3540000 30>, <3500000 25>,
+ <3460000 20>, <3420000 15>, <3380000 10>, <3340000 5>,
+ <3300000 0>;
+ };
+
+ gpio-keys-vol {
+ compatible = "gpio-keys";
+ autorepeat;
+ pinctrl-0 = <&btn_pins_vol>;
+ pinctrl-names = "default";
+
+ button-vol-down {
+ gpios = <&gpio0 RK_PC1 GPIO_ACTIVE_LOW>;
+ label = "VOLUMEDOWN";
+ linux,code = ;
+ };
+
+ button-vol-up {
+ gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_LOW>;
+ label = "VOLUMEUP";
+ linux,code = ;
+ };
+ };
+
+ leds: gpio-leds {
+ compatible = "gpio-leds";
+ pinctrl-0 = <&led_pins>;
+ pinctrl-names = "default";
+
+ led-0 {
+ color = ;
+ default-state = "off";
+ function = LED_FUNCTION_CHARGING;
+ gpios = <&gpio0 RK_PB3 GPIO_ACTIVE_HIGH>;
+ };
+
+ led-1 {
+ color = ;
+ default-state = "off";
+ function = LED_FUNCTION_STATUS;
+ gpios = <&gpio0 RK_PB4 GPIO_ACTIVE_HIGH>;
+ };
+ };
+
+ rk817-sound {
+ compatible = "simple-audio-card";
+ pinctrl-names = "default";
+ pinctrl-0 = <&hp_det>;
+ simple-audio-card,name = "rk817_int";
+ simple-audio-card,format = "i2s";
+ simple-audio-card,hp-det-gpio = <&gpio2 RK_PC6 GPIO_ACTIVE_LOW>;
+ simple-audio-card,mclk-fs = <256>;
+ simple-audio-card,widgets =
+ "Microphone", "Mic Jack",
+ "Headphone", "Headphones",
+ "Speaker", "Speaker";
+ simple-audio-card,routing =
+ "MICL", "Mic Jack",
+ "Headphones", "HPOL",
+ "Headphones", "HPOR",
+ "Speaker", "SPKO";
+
+ simple-audio-card,codec {
+ sound-dai = <&rk817>;
+ };
+
+ simple-audio-card,cpu {
+ sound-dai = <&i2s1_2ch>;
+ };
+ };
+
+ vccsys: vccsys {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v8_sys";
+ regulator-always-on;
+ regulator-min-microvolt = <3800000>;
+ regulator-max-microvolt = <3800000>;
+ };
+
+ vcc-phy-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc_phy";
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ vcc18_lcd0: vcc18-lcd0 {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc18_lcd0_n";
+ gpio = <&gpio0 RK_PB5 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ pinctrl-0 = <&vcc18_lcd_n>;
+ pinctrl-names = "default";
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc_host: vcc_host {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc_host";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ gpio = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ regulator-always-on;
+ regulator-boot-on;
+ vin-supply = <&usb_midu>;
+ };
+};
+
+&dmc {
+ center-supply = <&vdd_logic>;
+};
+
+&cpu0 {
+ cpu-supply = <&vdd_arm>;
+};
+
+&cpu1 {
+ cpu-supply = <&vdd_arm>;
+};
+
+&cpu2 {
+ cpu-supply = <&vdd_arm>;
+};
+
+&cpu3 {
+ cpu-supply = <&vdd_arm>;
+};
+
+&cru {
+ assigned-clocks = <&cru PLL_NPLL>,
+ <&cru ACLK_BUS_PRE>, <&cru ACLK_PERI_PRE>,
+ <&cru HCLK_BUS_PRE>, <&cru HCLK_PERI_PRE>,
+ <&cru PCLK_BUS_PRE>, <&cru SCLK_GPU>;
+
+ assigned-clock-rates = <1188000000>,
+ <200000000>, <200000000>,
+ <150000000>, <150000000>,
+ <100000000>, <200000000>;
+};
+
+&display_subsystem {
+ status = "okay";
+};
+
+&dsi {
+ status = "okay";
+
+ ports {
+ mipi_out: port@1 {
+ reg = <1>;
+
+ mipi_out_panel: endpoint {
+ remote-endpoint = <&mipi_in_panel>;
+ };
+ };
+ };
+
+ internal_display: panel@0 {
+ compatible = "magicx,xu10-panel", "sitronix,st7703";
+ iovcc-supply = <&vcc18_lcd0>;
+ vcc-supply = <&vcc18_lcd0>;
+ reg = <0>;
+ backlight = <&backlight>;
+ reset-gpios = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&lcd_rst>;
+
+ port {
+ mipi_in_panel: endpoint {
+ remote-endpoint = <&mipi_out_panel>;
+ };
+ };
+ };
+};
+
+&dsi_dphy {
+ status = "okay";
+};
+
+&gpu {
+ mali-supply = <&vdd_logic>;
+ status = "okay";
+};
+
+&i2c0 {
+ clock-frequency = <400000>;
+ i2c-scl-falling-time-ns = <16>;
+ i2c-scl-rising-time-ns = <280>;
+ status = "okay";
+
+ rk817: pmic@20 {
+ compatible = "rockchip,rk817";
+ reg = <0x20>;
+ interrupt-parent = <&gpio0>;
+ interrupts = ;
+ clock-output-names = "rk808-clkout1", "xin32k";
+ clock-names = "mclk";
+ clocks = <&cru SCLK_I2S1_OUT>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pmic_int>, <&i2s1_2ch_mclk>;
+ rockchip,system-power-controller;
+ wakeup-source;
+ #clock-cells = <1>;
+ #sound-dai-cells = <0>;
+
+ vcc1-supply = <&vccsys>;
+ vcc2-supply = <&vccsys>;
+ vcc3-supply = <&vccsys>;
+ vcc4-supply = <&vccsys>;
+ vcc5-supply = <&vccsys>;
+ vcc6-supply = <&vccsys>;
+ vcc7-supply = <&vcc_3v0>;
+ vcc8-supply = <&vccsys>;
+ vcc9-supply = <&usb_midu>;
+
+ regulators {
+ vdd_logic: DCDC_REG1 {
+ regulator-name = "vdd_logic";
+ regulator-min-microvolt = <850000>;
+ regulator-max-microvolt = <1150000>;
+ regulator-ramp-delay = <6001>;
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <950000>;
+ };
+ };
+
+ vdd_arm: DCDC_REG2 {
+ regulator-name = "vdd_arm";
+ regulator-min-microvolt = <850000>;
+ regulator-max-microvolt = <1350000>;
+ regulator-ramp-delay = <6001>;
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <950000>;
+ };
+ };
+
+ vcc_ddr: DCDC_REG3 {
+ regulator-name = "vcc_ddr";
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ };
+ };
+
+ vcc_3v0: DCDC_REG4 {
+ regulator-name = "vcc_3v0";
+ regulator-min-microvolt = <3000000>;
+ regulator-max-microvolt = <3000000>;
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <3000000>;
+ };
+ };
+
+ vcc_1v0: LDO_REG1 {
+ regulator-name = "vcc_1v0";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1000000>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <1000000>;
+ };
+ };
+
+ vcc1v8_soc: LDO_REG2 {
+ regulator-name = "vcc1v8_soc";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <1800000>;
+ };
+ };
+
+ vcc1v0_soc: LDO_REG3 {
+ regulator-name = "vcc1v0_soc";
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1000000>;
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <1000000>;
+ };
+ };
+
+ vcc3v0_pmu: LDO_REG4 {
+ regulator-name = "vcc3v0_pmu";
+ regulator-min-microvolt = <3000000>;
+ regulator-max-microvolt = <3000000>;
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <3000000>;
+ };
+ };
+
+ vccio_sd: LDO_REG5 {
+ regulator-name = "vccio_sd";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <3300000>;
+ };
+ };
+
+ vcc_sd: LDO_REG6 {
+ regulator-name = "vcc_sd";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3000000>;
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <3000000>;
+ };
+ };
+
+ vcc2v8_dvp: LDO_REG7 {
+ regulator-name = "vcc2v8_dvp";
+ regulator-min-microvolt = <2800000>;
+ regulator-max-microvolt = <2800000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <2800000>;
+ };
+ };
+
+ vcc3v0_dvp: LDO_REG8 {
+ regulator-name = "vcc3v0_dvp";
+ regulator-min-microvolt = <3000000>;
+ regulator-max-microvolt = <3000000>;
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <3000000>;
+ };
+ };
+
+ vdd1v5_dvp: LDO_REG9 {
+ regulator-min-microvolt = <1500000>;
+ regulator-max-microvolt = <1500000>;
+ regulator-name = "vdd1v5_dvp";
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <1500000>;
+ };
+ };
+
+ usb_midu: BOOST {
+ regulator-name = "usb_midu";
+ regulator-min-microvolt = <4700000>;
+ regulator-max-microvolt = <5400000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ };
+
+ rk817_charger: charger {
+ monitored-battery = <&battery>;
+ rockchip,resistor-sense-micro-ohms = <10000>;
+ rockchip,sleep-enter-current-microamp = <300000>;
+ rockchip,sleep-filter-current-microamp = <100000>;
+ };
+
+ rk817_codec: codec {
+ rockchip,mic-in-differential;
+ };
+ };
+};
+
+/* I2S 1 Channel Used Header(P2):1(GPIO2.C3),2(.C2), 3(.C1), 4(.C5), 5(.C4) */
+&i2s1_2ch {
+ status = "okay";
+ #sound-dai-cells = <0>;
+};
+
+&io_domains {
+ vccio1-supply = <&vcc1v8_soc>;
+ vccio2-supply = <&vccio_sd>;
+ vccio3-supply = <&vcc3v0_dvp>;
+ vccio4-supply = <&vcc_3v0>;
+ vccio5-supply = <&vcc_3v0>;
+ vccio6-supply = <&vcc_3v0>;
+ status = "okay";
+};
+
+&isp {
+ status = "okay";
+};
+
+&isp_mmu {
+ status = "okay";
+};
+
+&pmu_io_domains {
+ pmuio1-supply = <&vcc3v0_pmu>;
+ pmuio2-supply = <&vcc3v0_pmu>;
+ status = "okay";
+};
+
+&csi_dphy {
+ status = "okay";
+};
+
+&pwm1 {
+ status = "okay";
+};
+
+&saradc {
+ vref-supply = <&vcc1v8_soc>;
+ status = "okay";
+};
+
+&sdmmc {
+ cap-sd-highspeed;
+ card-detect-delay = <200>;
+ cd-gpios = <&gpio0 RK_PA3 GPIO_ACTIVE_LOW>; /*[> ff370000 PD_SDCARD CD GPIO <]*/
+ sd-uhs-sdr12;
+ sd-uhs-sdr25;
+ sd-uhs-sdr50;
+ sd-uhs-sdr104;
+ vmmc-supply = <&vcc_sd>;
+ vqmmc-supply = <&vccio_sd>;
+ status = "okay";
+};
+
+&sdio {
+ cap-sd-highspeed;
+ card-detect-delay = <200>;
+ cd-gpios = <&gpio3 RK_PB6 GPIO_ACTIVE_LOW>; /*[> CD GPIO <]*/
+ sd-uhs-sdr12;
+ sd-uhs-sdr25;
+ sd-uhs-sdr50;
+ sd-uhs-sdr104;
+ vmmc-supply = <&vcc_sd>;
+ vqmmc-supply = <&vccio_sd>;
+ status = "okay";
+};
+
+&tsadc {
+ status = "okay";
+};
+
+&u2phy {
+ status = "okay";
+
+ u2phy_host: host-port {
+ status = "okay";
+ };
+
+ u2phy_otg: otg-port {
+ status = "okay";
+ };
+};
+
+/* FIQ Header(P2): 2(RXD:GPIO2.B4),3(TXD:.B6) */
+&uart2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart2m1_xfer>;
+ status = "okay";
+};
+
+&usb20_otg {
+ status = "okay";
+ dr_mode = "otg";
+};
+
+&vopb {
+ status = "okay";
+};
+
+&vopb_mmu {
+ status = "okay";
+};
+
+&pinctrl {
+ btns {
+ btn_pins: btn-pins {
+ rockchip,pins = <1 RK_PB4 RK_FUNC_GPIO &pcfg_pull_up>,
+ <1 RK_PB5 RK_FUNC_GPIO &pcfg_pull_up>,
+ <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_up>,
+ <1 RK_PB7 RK_FUNC_GPIO &pcfg_pull_up>,
+ <2 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>,
+ <2 RK_PA1 RK_FUNC_GPIO &pcfg_pull_up>,
+ <2 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>,
+ <2 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>,
+ <2 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>,
+ <2 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>,
+ <2 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>,
+ <2 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up>,
+ <2 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>,
+ <2 RK_PB1 RK_FUNC_GPIO &pcfg_pull_up>,
+ <2 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>,
+ <3 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>,
+ <3 RK_PB4 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+
+ btn_pins_vol: btn-pins-vol {
+ rockchip,pins =
+ <0 RK_PC1 RK_FUNC_GPIO &pcfg_pull_up>,
+ <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+
+ headphone {
+ hp_det: hp-det {
+ rockchip,pins = <2 RK_PC6 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+
+ gpio-lcd {
+ lcd_rst: lcd-rst {
+ rockchip,pins = <3 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ vcc18-lcd {
+ vcc18_lcd_n: vcc18-lcd-n {
+ rockchip,pins = <0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ gpio-led {
+ led_pins: led-pins {
+ rockchip,pins =
+ <0 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>,
+ <0 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ pmic {
+ dc_det: dc-det {
+ rockchip,pins = <0 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ pmic_int: pmic-int {
+ rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+
+ soc_slppin_gpio: soc_slppin_gpio {
+ rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_output_low>;
+ };
+
+ soc_slppin_rst: soc_slppin_rst {
+ rockchip,pins = <0 RK_PA4 2 &pcfg_pull_none>;
+ };
+
+ soc_slppin_slp: soc_slppin_slp {
+ rockchip,pins = <0 RK_PA4 1 &pcfg_pull_none>;
+ };
+ };
+};
diff --git a/config/archr-dts/rk3326-odroid-go.dtsi b/config/archr-dts/rk3326-odroid-go.dtsi
new file mode 100644
index 0000000000..6195402b5b
--- /dev/null
+++ b/config/archr-dts/rk3326-odroid-go.dtsi
@@ -0,0 +1,568 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2019 Hardkernel Co., Ltd
+ * Copyright (c) 2020 Theobroma Systems Design und Consulting GmbH
+ * Copyright (c) 2022 Maya Matuszczyk
+ */
+
+/dts-v1/;
+#include
+#include
+#include
+#include
+#include "rk3326.dtsi"
+
+/ {
+ aliases {
+ mmc0 = &sdmmc;
+ };
+
+ chosen {
+ stdout-path = "serial2:115200n8";
+ };
+
+ backlight: backlight {
+ compatible = "pwm-backlight";
+ power-supply = <&vcc_bl>;
+ pwms = <&pwm1 0 25000 0>;
+ brightness-levels = <
+ 0 1 2 3 4 5 6 7
+ 8 9 10 11 12 13 14 15
+ 16 17 18 19 20 21 22 23
+ 24 25 26 27 28 29 30 31
+ 32 33 34 35 36 37 38 39
+ 40 41 42 43 44 45 46 47
+ 48 49 50 51 52 53 54 55
+ 56 57 58 59 60 61 62 63
+ 64 65 66 67 68 69 70 71
+ 72 73 74 75 76 77 78 79
+ 80 81 82 83 84 85 86 87
+ 88 89 90 91 92 93 94 95
+ 96 97 98 99 100 101 102 103
+ 104 105 106 107 108 109 110 111
+ 112 113 114 115 116 117 118 119
+ 120 121 122 123 124 125 126 127
+ 128 129 130 131 132 133 134 135
+ 136 137 138 139 140 141 142 143
+ 144 145 146 147 148 149 150 151
+ 152 153 154 155 156 157 158 159
+ 160 161 162 163 164 165 166 167
+ 168 169 170 171 172 173 174 175
+ 176 177 178 179 180 181 182 183
+ 184 185 186 187 188 189 190 191
+ 192 193 194 195 196 197 198 199
+ 200 201 202 203 204 205 206 207
+ 208 209 210 211 212 213 214 215
+ 216 217 218 219 220 221 222 223
+ 224 225 226 227 228 229 230 231
+ 232 233 234 235 236 237 238 239
+ 240 241 242 243 244 245 246 247
+ 248 249 250 251 252 253 254 255>;
+ default-brightness-level = <128>;
+ };
+
+ /* led-1 is wired directly to output of always-on regulator */
+
+ gpio_led: gpio-leds {
+ compatible = "gpio-leds";
+ pinctrl-names = "default";
+ pinctrl-0 = <&red_led_pin>;
+
+ red_led: led-3 {
+ color = ;
+ gpios = <&gpio0 RK_PB5 GPIO_ACTIVE_HIGH>;
+ function = LED_FUNCTION_CHARGING;
+ };
+ };
+
+ pwm_led: led-controller {
+ compatible = "pwm-leds";
+
+ blue_led: led-2 {
+ color = ;
+ function = LED_FUNCTION_STATUS;
+ linux,default-trigger = "heartbeat";
+ max-brightness = <255>;
+ pwms = <&pwm3 0 25000 0>;
+ };
+ };
+
+ rk817-sound {
+ compatible = "simple-audio-card";
+ simple-audio-card,name = "rk817_int";
+ simple-audio-card,format = "i2s";
+ simple-audio-card,hp-det-gpio = <&gpio2 RK_PC6 GPIO_ACTIVE_HIGH>;
+ simple-audio-card,mclk-fs = <256>;
+ simple-audio-card,widgets =
+ "Microphone", "Mic Jack",
+ "Headphone", "Headphones",
+ "Speaker", "Speaker";
+ simple-audio-card,routing =
+ "MICL", "Mic Jack",
+ "Headphones", "HPOL",
+ "Headphones", "HPOR",
+ "Speaker", "SPKO";
+
+ simple-audio-card,codec {
+ sound-dai = <&rk817>;
+ };
+
+ simple-audio-card,cpu {
+ sound-dai = <&i2s1_2ch>;
+ };
+ };
+
+ vccsys: regulator-vccsys {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v8_sys";
+ regulator-always-on;
+ regulator-min-microvolt = <3800000>;
+ regulator-max-microvolt = <3800000>;
+ };
+
+ vcc_host: regulator-vcc-host {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc_host";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+
+ gpio = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ regulator-always-on;
+ regulator-boot-on;
+ vin-supply = <&usb_midu>;
+ };
+};
+
+&dmc {
+ center-supply = <&vdd_logic>;
+};
+
+&cpu0 {
+ cpu-supply = <&vdd_arm>;
+};
+
+&cpu1 {
+ cpu-supply = <&vdd_arm>;
+};
+
+&cpu2 {
+ cpu-supply = <&vdd_arm>;
+};
+
+&cpu3 {
+ cpu-supply = <&vdd_arm>;
+};
+
+&cru {
+ assigned-clocks = <&cru PLL_NPLL>,
+ <&cru ACLK_BUS_PRE>, <&cru ACLK_PERI_PRE>,
+ <&cru HCLK_BUS_PRE>, <&cru HCLK_PERI_PRE>,
+ <&cru PCLK_BUS_PRE>, <&cru SCLK_GPU>;
+
+ assigned-clock-rates = <1188000000>,
+ <200000000>, <200000000>,
+ <150000000>, <150000000>,
+ <100000000>, <200000000>;
+};
+
+&display_subsystem {
+ status = "okay";
+};
+
+&dsi {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "okay";
+
+ ports {
+ mipi_out: port@1 {
+ reg = <1>;
+
+ mipi_out_panel: endpoint {
+ remote-endpoint = <&mipi_in_panel>;
+ };
+ };
+ };
+
+ internal_display: panel@0 {
+ reg = <0>;
+ backlight = <&backlight>;
+ reset-gpios = <&gpio3 RK_PC0 GPIO_ACTIVE_LOW>;
+
+ port {
+ mipi_in_panel: endpoint {
+ remote-endpoint = <&mipi_out_panel>;
+ };
+ };
+ };
+};
+
+&dsi_dphy {
+ status = "okay";
+};
+
+&gpu {
+ mali-supply = <&vdd_logic>;
+ status = "okay";
+};
+
+&i2c0 {
+ clock-frequency = <400000>;
+ i2c-scl-falling-time-ns = <16>;
+ i2c-scl-rising-time-ns = <280>;
+ status = "okay";
+
+ rk817: pmic@20 {
+ compatible = "rockchip,rk817";
+ reg = <0x20>;
+ interrupt-parent = <&gpio0>;
+ interrupts = ;
+ clock-output-names = "rk808-clkout1", "xin32k";
+ clock-names = "mclk";
+ clocks = <&cru SCLK_I2S1_OUT>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pmic_int>, <&i2s1_2ch_mclk>;
+ rockchip,system-power-controller;
+ wakeup-source;
+ #clock-cells = <1>;
+ #sound-dai-cells = <0>;
+
+ vcc1-supply = <&vccsys>;
+ vcc2-supply = <&vccsys>;
+ vcc3-supply = <&vccsys>;
+ vcc4-supply = <&vccsys>;
+ vcc5-supply = <&vccsys>;
+ vcc6-supply = <&vccsys>;
+ vcc7-supply = <&vccsys>;
+ vcc8-supply = <&vccsys>;
+
+ regulators {
+ vdd_logic: DCDC_REG1 {
+ regulator-name = "vdd_logic";
+ regulator-min-microvolt = <950000>;
+ regulator-max-microvolt = <1150000>;
+ regulator-ramp-delay = <6001>;
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <950000>;
+ };
+ };
+
+ vdd_arm: DCDC_REG2 {
+ regulator-name = "vdd_arm";
+ regulator-min-microvolt = <950000>;
+ regulator-max-microvolt = <1350000>;
+ regulator-ramp-delay = <6001>;
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <950000>;
+ };
+ };
+
+ vcc_ddr: DCDC_REG3 {
+ regulator-name = "vcc_ddr";
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ };
+ };
+
+ vcc_3v3: DCDC_REG4 {
+ regulator-name = "vcc_3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <3300000>;
+ };
+ };
+
+ vcc_1v8: LDO_REG2 {
+ regulator-name = "vcc_1v8";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <1800000>;
+ };
+ };
+
+ vdd_1v0: LDO_REG3 {
+ regulator-name = "vdd_1v0";
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1000000>;
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <1000000>;
+ };
+ };
+
+ vcc3v3_pmu: LDO_REG4 {
+ regulator-name = "vcc3v3_pmu";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <3300000>;
+ };
+ };
+
+ vccio_sd: LDO_REG5 {
+ regulator-name = "vccio_sd";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <3300000>;
+ };
+ };
+
+ vcc_sd: LDO_REG6 {
+ regulator-name = "vcc_sd";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <3300000>;
+ };
+ };
+
+ vcc_bl: LDO_REG7 {
+ regulator-name = "vcc_bl";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <3300000>;
+ };
+ };
+
+ vcc_lcd: LDO_REG8 {
+ regulator-name = "vcc_lcd";
+ regulator-min-microvolt = <2800000>;
+ regulator-max-microvolt = <2800000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <2800000>;
+ };
+ };
+
+ LDO_REG9 {
+ /* unused */
+ };
+
+ usb_midu: BOOST {
+ regulator-name = "usb_midu";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5400000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+ };
+
+ rk817_charger: charger {
+ rockchip,resistor-sense-micro-ohms = <10000>;
+ rockchip,sleep-enter-current-microamp = <300000>;
+ rockchip,sleep-filter-current-microamp = <100000>;
+ };
+
+ rk817_codec: codec {
+ rockchip,mic-in-differential;
+ };
+ };
+};
+
+/* EXT Header(P2): 7(SCL:GPIO0.C2), 8(SDA:GPIO0.C3) */
+&i2c1 {
+ clock-frequency = <400000>;
+ status = "okay";
+};
+
+/* I2S 1 Channel Used */
+&i2s1_2ch {
+ status = "okay";
+};
+
+&io_domains {
+ vccio1-supply = <&vcc_3v3>;
+ vccio2-supply = <&vccio_sd>;
+ vccio3-supply = <&vcc_3v3>;
+ vccio4-supply = <&vcc_3v3>;
+ vccio5-supply = <&vcc_3v3>;
+ vccio6-supply = <&vcc_3v3>;
+ status = "okay";
+};
+
+&pmu_io_domains {
+ pmuio1-supply = <&vcc3v3_pmu>;
+ pmuio2-supply = <&vcc3v3_pmu>;
+ status = "okay";
+};
+
+&pwm1 {
+ status = "okay";
+};
+
+&pwm3 {
+ status = "okay";
+};
+
+&saradc {
+ vref-supply = <&vcc_1v8>;
+ status = "okay";
+};
+
+&sdmmc {
+ cap-sd-highspeed;
+ card-detect-delay = <200>;
+ cd-gpios = <&gpio0 RK_PA3 GPIO_ACTIVE_LOW>; /*[> CD GPIO <]*/
+ sd-uhs-sdr12;
+ sd-uhs-sdr25;
+ sd-uhs-sdr50;
+ sd-uhs-sdr104;
+ vmmc-supply = <&vcc_sd>;
+ vqmmc-supply = <&vccio_sd>;
+ status = "okay";
+};
+
+&sfc {
+ pinctrl-0 = <&sfc_clk &sfc_cs0 &sfc_bus2>;
+ pinctrl-names = "default";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "okay";
+
+ flash@0 {
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ spi-max-frequency = <108000000>;
+ spi-rx-bus-width = <2>;
+ spi-tx-bus-width = <1>;
+ };
+};
+
+&tsadc {
+ status = "okay";
+};
+
+&u2phy {
+ status = "okay";
+
+ u2phy_host: host-port {
+ status = "okay";
+ };
+
+ u2phy_otg: otg-port {
+ status = "okay";
+ };
+};
+
+&usb20_otg {
+ status = "okay";
+};
+
+/* EXT Header(P2): 2(RXD:GPIO1.C0),3(TXD:.C1),4(CTS:.C2),5(RTS:.C3) */
+&uart1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart1_xfer &uart1_cts>;
+ status = "okay";
+};
+
+&uart2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart2m1_xfer>;
+ status = "okay";
+};
+
+&vopb {
+ status = "okay";
+};
+
+&vopb_mmu {
+ status = "okay";
+};
+
+&pinctrl {
+ btns {
+ btn_pins: btn-pins {
+ rockchip,pins = <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>,
+ <1 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>,
+ <1 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>,
+ <1 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up>,
+ <1 RK_PB4 RK_FUNC_GPIO &pcfg_pull_up>,
+ <1 RK_PB5 RK_FUNC_GPIO &pcfg_pull_up>,
+ <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_up>,
+ <1 RK_PB7 RK_FUNC_GPIO &pcfg_pull_up>,
+ <2 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>,
+ <2 RK_PA1 RK_FUNC_GPIO &pcfg_pull_up>,
+ <2 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>,
+ <2 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>,
+ <2 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>,
+ <2 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>,
+ <2 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>,
+ <2 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+
+ headphone {
+ hp_det: hp-det {
+ rockchip,pins = <2 RK_PC6 RK_FUNC_GPIO &pcfg_pull_down>;
+ };
+ };
+
+ leds {
+ red_led_pin: red-led-pin {
+ rockchip,pins = <0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ pmic {
+ dc_det: dc-det {
+ rockchip,pins = <0 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ pmic_int: pmic-int {
+ rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+
+ soc_slppin_gpio: soc_slppin_gpio {
+ rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_output_low>;
+ };
+
+ soc_slppin_rst: soc_slppin_rst {
+ rockchip,pins = <0 RK_PA4 2 &pcfg_pull_none>;
+ };
+
+ soc_slppin_slp: soc_slppin_slp {
+ rockchip,pins = <0 RK_PA4 1 &pcfg_pull_none>;
+ };
+ };
+};
diff --git a/config/archr-dts/rk3326-odroid-go2-v11.dts b/config/archr-dts/rk3326-odroid-go2-v11.dts
new file mode 100644
index 0000000000..489e0e2d0f
--- /dev/null
+++ b/config/archr-dts/rk3326-odroid-go2-v11.dts
@@ -0,0 +1,310 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2019 Hardkernel Co., Ltd
+ * Copyright (c) 2020 Theobroma Systems Design und Consulting GmbH
+ * Copyright (c) 2022 Maya Matuszczyk
+ */
+
+/dts-v1/;
+#include "rk3326-odroid-go.dtsi"
+
+/ {
+ model = "ODROID-GO Advance Black Edition";
+ compatible = "hardkernel,rk3326-odroid-go2-v11", "rockchip,rk3326";
+
+ aliases {
+ mmc1 = &sdio;
+ };
+
+ gpio_keys: volume-keys {
+ compatible = "gpio-keys";
+ autorepeat;
+ pinctrl-0 = <&btn_pins_vol>;
+ pinctrl-names = "default";
+
+ volume-up-button {
+ label = "VOLUMEUP";
+ linux,code = ;
+ gpios = <&gpio2 RK_PA3 GPIO_ACTIVE_LOW>;
+
+ };
+ volume-down-button {
+ label = "VOLUMEDOWN";
+ linux,code = ;
+ gpios = <&gpio2 RK_PA2 GPIO_ACTIVE_LOW>;
+
+ };
+ };
+
+ joypad: odroidgo2-joypad {
+ compatible = "odroidgo2-v11-joypad";
+
+ /*
+ - odroidgo2-joypad sysfs list -
+ * for poll device interval(ms)
+ /sys/devices/platform/odroidgo2_joypad/poll_interval [rw]
+ * for button-adc-fuzz
+ /sys/devices/platform/odroidgo2_joypad/adc_fuzz [r]
+ * for button-adc-flat
+ /sys/devices/platform/odroidgo2_joypad/adc_flat [r]
+
+ * for report control(1:enable, 0:disable)
+ /sys/devices/platform/odroidgo2_joypad/enable [rw]
+ * for adc calibration value setup(1:current adcs value -> cal value)
+ /sys/devices/platform/odroidgo2_joypad/adc_cal [rw]
+ */
+
+ /* gpio pincontrol setup */
+ pinctrl-names = "default";
+ pinctrl-0 = <&btn_pins>;
+
+ /* JOY_X, JOY_Y Channel define */
+ io-channel-names = "joy_x", "joy_y";
+ io-channels = <&saradc 1>, <&saradc 2>;
+
+ /* adc channel count */
+ button-adc-count = <2>;
+
+ /* adc calculate scale */
+ button-adc-scale = <2>;
+
+ /* adc deadzone range */
+ button-adc-deadzone = <20>;
+
+ /*
+ joy-stick voltage range
+ /sys/devices/platform/ff288000.saradc/iio:device0
+ adc-x : in_voltage1_raw
+ adc-y : in_voltage2_raw
+
+ range calculate.
+ (adc raw max value - adc raw min value) * scale * 1.7515
+ */
+ button-adc-x-range = <1800>;
+ button-adc-y-range = <1800>;
+
+ /*
+ specifies fuzz value that is used to filter noise from
+ the event stream.
+ */
+ button-adc-fuzz = <32>;
+ button-adc-flat = <32>;
+
+ /* poll device interval (ms), adc read interval */
+ poll-interval = <10>;
+
+ /* gpio button auto repeat set value : default disable */
+ /*
+ autorepeat;
+ */
+
+ /*
+ *** ODROIDGO2-Advance Switch layoout ***
+ |------------------------------------------------|
+ | sw15 sw16 |
+ | sw20 sw21 |
+ |------------------------------------------------|
+ | sw1 |-------------------| sw8 |
+ | sw3 sw4 | | sw7 sw5 |
+ | sw2 | LCD Display | sw6 |
+ | | | |
+ | |-------------------| |
+ | sw9 sw10 vol- vol+ sw13 sw14 |
+ |------------------------------------------------|
+ */
+ /*
+ joypad driver is poll-device driver.
+ poll-device is does not support wakeup-source.
+ */
+ sw1 {
+ gpios = <&gpio1 RK_PB4 GPIO_ACTIVE_LOW>;
+ label = "GPIO DPAD-UP";
+ linux,code = ; // 0x220
+ };
+ sw2 {
+ gpios = <&gpio1 RK_PB5 GPIO_ACTIVE_LOW>;
+ label = "GPIO DPAD-DOWN";
+ linux,code = ; // 0x221
+ };
+ sw3 {
+ gpios = <&gpio1 RK_PB6 GPIO_ACTIVE_LOW>;
+ label = "GPIO DPAD-LEFT";
+ linux,code = ; // 0x222
+ };
+ sw4 {
+ gpios = <&gpio1 RK_PB7 GPIO_ACTIVE_LOW>;
+ label = "GPIO DPAD-RIGHT";
+ linux,code = ; // 0x223
+ };
+ sw5 {
+ gpios = <&gpio1 RK_PA2 GPIO_ACTIVE_LOW>;
+ label = "GPIO KEY BTN-A";
+ linux,code = ; // 0x131
+ };
+ sw6 {
+ gpios = <&gpio1 RK_PA5 GPIO_ACTIVE_LOW>;
+ label = "GPIO BTN-B";
+ linux,code = ; // 0x130
+ };
+ sw7 {
+ gpios = <&gpio1 RK_PA6 GPIO_ACTIVE_LOW>;
+ label = "GPIO BTN-Y";
+ linux,code = ; // 0x134
+ };
+ sw8 {
+ gpios = <&gpio1 RK_PA7 GPIO_ACTIVE_LOW>;
+ label = "GPIO BTN-X";
+ linux,code = ; // 0x133
+ };
+ sw9 {
+ gpios = <&gpio2 RK_PA0 GPIO_ACTIVE_LOW>;
+ label = "GPIO BTN-SELECT";
+ linux,code = ; // 0x2c0
+ };
+ sw10 {
+ gpios = <&gpio2 RK_PA1 GPIO_ACTIVE_LOW>;
+ label = "GPIO BTN-THUMBL";
+ linux,code = ; // 0x2c1
+ };
+ sw13 {
+ gpios = <&gpio2 RK_PA4 GPIO_ACTIVE_LOW>;
+ label = "GPIO BTN-THUMBR";
+ linux,code = ; // 0x2c4
+ };
+ sw14 {
+ gpios = <&gpio2 RK_PA5 GPIO_ACTIVE_LOW>;
+ label = "GPIO BTN-START";
+ linux,code = ; // 0x13c
+ };
+ sw15 {
+ gpios = <&gpio2 RK_PA6 GPIO_ACTIVE_LOW>;
+ label = "GPIO TOP-LEFT";
+ linux,code = ; // 0x02
+ };
+ sw16 {
+ gpios = <&gpio2 RK_PA7 GPIO_ACTIVE_LOW>;
+ label = "GPIO TOP-RIGHT";
+ linux,code = ; // 0x05
+ };
+ sw20 {
+ gpios = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
+ label = "GPIO TOP-LEFT2";
+ linux,code = ;
+ };
+ sw21 {
+ gpios = <&gpio3 RK_PB2 GPIO_ACTIVE_LOW>;
+ label = "GPIO TOP-RIGHT2";
+ linux,code = ;
+ };
+ };
+
+ battery: battery {
+ compatible = "simple-battery";
+ charge-full-design-microamp-hours = <3000000>;
+ charge-term-current-microamp = <300000>;
+ constant-charge-current-max-microamp = <2000000>;
+ constant-charge-voltage-max-microvolt = <4200000>;
+ factory-internal-resistance-micro-ohms = <180000>;
+ voltage-max-design-microvolt = <4100000>;
+ voltage-min-design-microvolt = <3500000>;
+
+ ocv-capacity-celsius = <20>;
+ ocv-capacity-table-0 = <4046950 100>, <4001920 95>, <3967900 90>, <3919950 85>,
+ <3888450 80>, <3861850 75>, <3831540 70>, <3799130 65>,
+ <3768190 60>, <3745650 55>, <3726610 50>, <3711630 45>,
+ <3696720 40>, <3685660 35>, <3674950 30>, <3663050 25>,
+ <3649470 20>, <3635260 15>, <3616920 10>, <3592440 5>,
+ <3574170 0>;
+ };
+
+ wifi_pwrseq: wifi-pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ pinctrl-names = "default";
+ pinctrl-0 = <&wifi_pwrseq_pins>;
+ reset-gpios = <&gpio3 RK_PB1 GPIO_ACTIVE_LOW>;
+ post-power-on-delay-ms = <300>;
+ power-off-delay-us = <200000>;
+ };
+};
+
+&internal_display {
+ compatible = "elida,kd35t133";
+ iovcc-supply = <&vcc_lcd>;
+ vdd-supply = <&vcc_lcd>;
+ rotation = <270>;
+};
+
+&rk817 {
+ regulators {
+ vcc_wifi: LDO_REG9 {
+ regulator-name = "vcc_wifi";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <3300000>;
+ };
+ };
+ };
+};
+
+&rk817_charger {
+ monitored-battery = <&battery>;
+};
+
+&sdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ bus-width = <4>;
+ cap-sd-highspeed;
+ cap-sdio-irq;
+ disable-wp;
+ keep-power-in-suspend;
+ non-removable;
+ vmmc-supply = <&vcc_wifi>;
+ mmc-pwrseq = <&wifi_pwrseq>;
+ status = "okay";
+
+ esp8089: wifi@1 {
+ compatible = "esp,esp8089";
+ reg = <1>;
+ esp,crystal-26M-en = <1>;
+ };
+};
+
+&pinctrl {
+ btns {
+ btn_pins: btn-pins {
+ rockchip,pins = <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>,
+ <1 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>,
+ <1 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>,
+ <1 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up>,
+ <1 RK_PB4 RK_FUNC_GPIO &pcfg_pull_up>,
+ <1 RK_PB5 RK_FUNC_GPIO &pcfg_pull_up>,
+ <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_up>,
+ <1 RK_PB7 RK_FUNC_GPIO &pcfg_pull_up>,
+ <2 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>,
+ <2 RK_PA1 RK_FUNC_GPIO &pcfg_pull_up>,
+ <2 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>,
+ <2 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>,
+ <2 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>,
+ <2 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up>,
+ <3 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>,
+ <3 RK_PB7 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ btn_pins_vol: btn-pins-vol {
+ rockchip,pins = <2 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>,
+ <2 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+
+ wifi {
+ wifi_pwrseq_pins: wifi-pwrseq-pins {
+ rockchip,pins = <3 RK_PB1 RK_FUNC_GPIO &pcfg_pull_up>,
+ <3 RK_PB6 RK_FUNC_GPIO &pcfg_output_high>;
+ };
+ };
+};
diff --git a/config/archr-dts/rk3326-odroid-go2.dts b/config/archr-dts/rk3326-odroid-go2.dts
new file mode 100644
index 0000000000..f142737a01
--- /dev/null
+++ b/config/archr-dts/rk3326-odroid-go2.dts
@@ -0,0 +1,235 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2019 Hardkernel Co., Ltd
+ * Copyright (c) 2020 Theobroma Systems Design und Consulting GmbH
+ * Copyright (c) 2022 Maya Matuszczyk
+ */
+
+/dts-v1/;
+#include "rk3326-odroid-go.dtsi"
+
+/ {
+ model = "ODROID-GO Advance";
+ compatible = "hardkernel,rk3326-odroid-go2", "rockchip,rk3326";
+
+ gpio_keys: volume-keys {
+ compatible = "gpio-keys-polled";
+ poll-interval = <5>;
+ autorepeat;
+
+ volume-up-button {
+ label = "VOLUME-UP";
+ linux,code = ;
+ gpios = <&gpio2 RK_PA3 GPIO_ACTIVE_LOW>;
+
+ };
+ volume-down-button {
+ label = "VOLUME-DOWN";
+ linux,code = ;
+ gpios = <&gpio2 RK_PA2 GPIO_ACTIVE_LOW>;
+
+ };
+ };
+
+ joypad: odroidgo2-joypad {
+ compatible = "odroidgo2-joypad";
+
+ /*
+ - odroidgo2-joypad sysfs list -
+ * for poll device interval(ms)
+ /sys/devices/platform/odroidgo2_joypad/poll_interval [rw]
+ * for button-adc-fuzz
+ /sys/devices/platform/odroidgo2_joypad/adc_fuzz [r]
+ * for button-adc-flat
+ /sys/devices/platform/odroidgo2_joypad/adc_flat [r]
+
+ * for report control(1:enable, 0:disable)
+ /sys/devices/platform/odroidgo2_joypad/enable [rw]
+ * for adc calibration value setup(1:current adcs value -> cal value)
+ /sys/devices/platform/odroidgo2_joypad/adc_cal [rw]
+ */
+
+ /* gpio pincontrol setup */
+ pinctrl-names = "default";
+ pinctrl-0 = <&btn_pins>;
+
+ /* JOY_X, JOY_Y Channel define */
+ io-channel-names = "joy_x", "joy_y";
+ io-channels = <&saradc 1>, <&saradc 2>;
+
+ /* adc channel count */
+ button-adc-count = <2>;
+
+ /* adc calculate scale */
+ button-adc-scale = <2>;
+
+ /* adc deadzone range */
+ button-adc-deadzone = <20>;
+
+ /*
+ joy-stick voltage range
+ /sys/devices/platform/ff288000.saradc/iio:device0
+ adc-x : in_voltage1_raw
+ adc-y : in_voltage2_raw
+
+ range calculate.
+ (adc raw max value - adc raw min value) * scale * 1.7515
+ */
+ button-adc-x-range = <1800>;
+ button-adc-y-range = <1800>;
+
+ /*
+ specifies fuzz value that is used to filter noise from
+ the event stream.
+ */
+ button-adc-fuzz = <32>;
+ button-adc-flat = <32>;
+
+ /* poll device interval (ms), adc read interval */
+ poll-interval = <10>;
+
+ /* gpio button auto repeat set value : default disable */
+ /*
+ autorepeat;
+ */
+
+ /*
+ *** ODROIDGO2-Advance Switch layoout ***
+ |------------------------------------------------|
+ | sw15 sw16 |
+ |------------------------------------------------|
+ | sw1 |-------------------| sw8 |
+ | sw3 sw4 | | sw7 sw5 |
+ | sw2 | LCD Display | sw6 |
+ | | | |
+ | |-------------------| |
+ | sw9 sw10 vol- vol+ sw13 sw14 |
+ |------------------------------------------------|
+ */
+ /*
+ joypad driver is poll-device driver.
+ poll-device is does not support wakeup-source.
+ */
+ sw1 {
+ gpios = <&gpio1 RK_PB4 GPIO_ACTIVE_LOW>;
+ label = "GPIO DPAD-UP";
+ linux,code = ; // 0x220
+ };
+ sw2 {
+ gpios = <&gpio1 RK_PB5 GPIO_ACTIVE_LOW>;
+ label = "GPIO DPAD-DOWN";
+ linux,code = ; // 0x221
+ };
+ sw3 {
+ gpios = <&gpio1 RK_PB6 GPIO_ACTIVE_LOW>;
+ label = "GPIO DPAD-LEFT";
+ linux,code = ; // 0x222
+ };
+ sw4 {
+ gpios = <&gpio1 RK_PB7 GPIO_ACTIVE_LOW>;
+ label = "GPIO DPAD-RIGHT";
+ linux,code = ; // 0x223
+ };
+ sw5 {
+ gpios = <&gpio1 RK_PA2 GPIO_ACTIVE_LOW>;
+ label = "GPIO KEY BTN-A";
+ linux,code = ; // 0x131
+ };
+ sw6 {
+ gpios = <&gpio1 RK_PA5 GPIO_ACTIVE_LOW>;
+ label = "GPIO BTN-B";
+ linux,code = ; // 0x130
+ };
+ sw7 {
+ gpios = <&gpio1 RK_PA6 GPIO_ACTIVE_LOW>;
+ label = "GPIO BTN-Y";
+ linux,code = ; // 0x134
+ };
+ sw8 {
+ gpios = <&gpio1 RK_PA7 GPIO_ACTIVE_LOW>;
+ label = "GPIO BTN-X";
+ linux,code = ; // 0x133
+ };
+ sw9 {
+ gpios = <&gpio2 RK_PA0 GPIO_ACTIVE_LOW>;
+ label = "GPIO F1";
+ linux,code = ; // 0x2c0
+ };
+ sw10 {
+ gpios = <&gpio2 RK_PA1 GPIO_ACTIVE_LOW>;
+ label = "GPIO F2";
+ linux,code = ; // 0x2c1
+ };
+ sw13 {
+ gpios = <&gpio2 RK_PA4 GPIO_ACTIVE_LOW>;
+ label = "GPIO F5";
+ linux,code = ; // 0x2c4
+ };
+ sw14 {
+ gpios = <&gpio2 RK_PA5 GPIO_ACTIVE_LOW>;
+ label = "GPIO F6";
+ linux,code = ; // 0x13c
+ };
+ sw15 {
+ gpios = <&gpio2 RK_PA6 GPIO_ACTIVE_LOW>;
+ label = "GPIO TOP-LEFT";
+ linux,code = ; // 0x02
+ };
+ sw16 {
+ gpios = <&gpio2 RK_PA7 GPIO_ACTIVE_LOW>;
+ label = "GPIO TOP-RIGHT";
+ linux,code = ; // 0x05
+ };
+ };
+
+ battery: battery {
+ compatible = "simple-battery";
+ charge-full-design-microamp-hours = <3000000>;
+ charge-term-current-microamp = <300000>;
+ constant-charge-current-max-microamp = <2000000>;
+ constant-charge-voltage-max-microvolt = <4200000>;
+ factory-internal-resistance-micro-ohms = <180000>;
+ voltage-max-design-microvolt = <4100000>;
+ voltage-min-design-microvolt = <3500000>;
+
+ ocv-capacity-celsius = <20>;
+ ocv-capacity-table-0 = <4046950 100>, <4001920 95>, <3967900 90>, <3919950 85>,
+ <3888450 80>, <3861850 75>, <3831540 70>, <3799130 65>,
+ <3768190 60>, <3745650 55>, <3726610 50>, <3711630 45>,
+ <3696720 40>, <3685660 35>, <3674950 30>, <3663050 25>,
+ <3649470 20>, <3635260 15>, <3616920 10>, <3592440 5>,
+ <3574170 0>;
+ };
+};
+
+&internal_display {
+ compatible = "elida,kd35t133";
+ iovcc-supply = <&vcc_lcd>;
+ vdd-supply = <&vcc_lcd>;
+ rotation = <270>;
+};
+
+&rk817_charger {
+ monitored-battery = <&battery>;
+};
+
+&pinctrl {
+ btns {
+ btn_pins: btn-pins {
+ rockchip,pins = <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>,
+ <1 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>,
+ <1 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>,
+ <1 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up>,
+ <1 RK_PB4 RK_FUNC_GPIO &pcfg_pull_up>,
+ <1 RK_PB5 RK_FUNC_GPIO &pcfg_pull_up>,
+ <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_up>,
+ <1 RK_PB7 RK_FUNC_GPIO &pcfg_pull_up>,
+ <2 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>,
+ <2 RK_PA1 RK_FUNC_GPIO &pcfg_pull_up>,
+ <2 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>,
+ <2 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>,
+ <2 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>,
+ <2 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+};
diff --git a/config/archr-dts/rk3326-odroid-go3.dts b/config/archr-dts/rk3326-odroid-go3.dts
new file mode 100644
index 0000000000..c3099f9cfe
--- /dev/null
+++ b/config/archr-dts/rk3326-odroid-go3.dts
@@ -0,0 +1,289 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2019 Hardkernel Co., Ltd
+ * Copyright (c) 2020 Theobroma Systems Design und Consulting GmbH
+ * Copyright (c) 2022 Maya Matuszczyk
+ */
+
+/dts-v1/;
+#include "rk3326-odroid-go.dtsi"
+
+/ {
+ model = "ODROID-GO Super";
+ compatible = "hardkernel,rk3326-odroid-go3", "rockchip,rk3326";
+
+ joypad: odroidgo3-joypad {
+ compatible = "odroidgo3-joypad";
+
+ joypad-name = "odroidgo3_joypad";
+ joypad-product = <0x0001>;
+ joypad-revision = <0x0101>;
+
+ status = "okay";
+ /*
+ - odroidgo3-joypad sysfs list -
+ * for poll device interval(ms)
+ /sys/devices/platform/odroidgo3_joypad/poll_interval [rw]
+ ex) echo 20 > poll_interval
+ * for button-adc-fuzz
+ /sys/devices/platform/odroidgo3_joypad/adc_fuzz [r]
+ * for button-adc-flat
+ /sys/devices/platform/odroidgo3_joypad/adc_flat [r]
+
+ * for report control(1:enable, 0:disable)
+ /sys/devices/platform/odroidgo3_joypad/enable [rw]
+ * for adc calibration value setup(current adcs value -> cal value)
+ /sys/devices/platform/odroidgo3_joypad/adc_cal [rw]
+ ex) echo 0 > adc_cal
+ * for amux data debug
+ * Joypad driver is disabled when using this sysfs.
+ /sys/devices/platform/odroidgo3_joypad/amux_debug [rw]
+ ex) echo 0 > amux_debug --> select amux channel
+ ex) cat amux_debug --> get adc data of seleted channel
+ */
+
+ /* gpio pincontrol setup */
+ pinctrl-names = "default";
+ pinctrl-0 = <&btn_pins>;
+
+ /* Analog mux define */
+ io-channel-names = "amux_adc";
+ io-channels = <&saradc 1>;
+
+ /* adc mux channel count */
+ amux-count = <4>;
+ /* adc mux select(a,b) gpio */
+ amux-a-gpios = <&gpio3 RK_PB3 GPIO_ACTIVE_LOW>;
+ amux-b-gpios = <&gpio3 RK_PB0 GPIO_ACTIVE_LOW>;
+ /* adc mux enable gpio */
+ amux-en-gpios = <&gpio3 RK_PB5 GPIO_ACTIVE_LOW>;
+
+ /* adc calculate scale */
+ button-adc-scale = <2>;
+
+ /* adc deadzone range */
+ button-adc-deadzone = <64>;
+
+ /*
+ specifies fuzz value that is used to filter noise from
+ the event stream.
+ */
+ button-adc-fuzz = <32>;
+ button-adc-flat = <32>;
+
+ /*
+ Analog Stick data tuning value(precent)
+ p = positive direction, n = negative direction
+ report value = (real_adc_data * tuning_value) / 100
+ */
+ abs_x-p-tuning = <180>;
+ abs_x-n-tuning = <180>;
+
+ abs_y-p-tuning = <180>;
+ abs_y-n-tuning = <170>;
+
+ abs_rx-p-tuning = <180>;
+ abs_rx-n-tuning = <180>;
+
+ abs_ry-p-tuning = <180>;
+ abs_ry-n-tuning = <170>;
+
+ /* poll device interval (ms), adc read interval */
+ poll-interval = <10>;
+
+ /* gpio button auto repeat set value : default disable */
+ /*
+ autorepeat;
+ */
+
+ /*
+ *** ODROIDGO3-Advance Switch layoout ***
+ |------------------------------------------------|
+ | sw15 sw21 sw10 sw9 sw20 sw16 |
+ |------------------------------------------------|
+ | sw19 sw22 |
+ | |-------------------| |
+ | sw1 | | sw8 |
+ | sw3 sw4 | | sw7 sw5 |
+ | sw2 | LCD Display | sw6 |
+ | | | |
+ | | | |
+ | |-------------------| |
+ | sw11 sw12 | sd-slot | sw13 sw14 |
+ |-------------------| |------------------|
+ */
+ /*
+ joypad driver is poll-device driver.
+ poll-device is does not support wakeup-source.
+ */
+ sw1 {
+ gpios = <&gpio1 RK_PB4 GPIO_ACTIVE_LOW>;
+ label = "GPIO DPAD-UP";
+ linux,code = ; // 0x220
+ };
+ sw2 {
+ gpios = <&gpio1 RK_PB5 GPIO_ACTIVE_LOW>;
+ label = "GPIO DPAD-DOWN";
+ linux,code = ; // 0x221
+ };
+ sw3 {
+ gpios = <&gpio1 RK_PB6 GPIO_ACTIVE_LOW>;
+ label = "GPIO DPAD-LEFT";
+ linux,code = ; // 0x222
+ };
+ sw4 {
+ gpios = <&gpio1 RK_PB7 GPIO_ACTIVE_LOW>;
+ label = "GPIO DPAD-RIGHT";
+ linux,code = ; // 0x223
+ };
+ sw5 {
+ gpios = <&gpio1 RK_PA2 GPIO_ACTIVE_LOW>;
+ label = "GPIO KEY BTN-A";
+ linux,code = ; // 0x131
+ };
+ sw6 {
+ gpios = <&gpio1 RK_PA5 GPIO_ACTIVE_LOW>;
+ label = "GPIO BTN-B";
+ linux,code = ; // 0x130
+ };
+ sw7 {
+ gpios = <&gpio1 RK_PA6 GPIO_ACTIVE_LOW>;
+ label = "GPIO BTN-Y";
+ linux,code = ; // 0x134
+ };
+ sw8 {
+ gpios = <&gpio1 RK_PA7 GPIO_ACTIVE_LOW>;
+ label = "GPIO BTN-X";
+ linux,code = ; // 0x133
+ };
+ sw11 {
+ gpios = <&gpio2 RK_PA2 GPIO_ACTIVE_LOW>;
+ label = "GPIO F3";
+ linux,code = ; // 0x2c2
+ };
+ sw12 {
+ gpios = <&gpio2 RK_PA3 GPIO_ACTIVE_LOW>;
+ label = "GPIO F4";
+ linux,code = ; // 0x2c3
+ };
+ sw13 {
+ gpios = <&gpio2 RK_PA4 GPIO_ACTIVE_LOW>;
+ label = "GPIO F5";
+ linux,code = ; // 0x2c4
+ };
+ sw14 {
+ gpios = <&gpio2 RK_PA5 GPIO_ACTIVE_LOW>;
+ label = "GPIO F6";
+ linux,code = ; // 0x13c
+ };
+ sw15 {
+ gpios = <&gpio2 RK_PA6 GPIO_ACTIVE_LOW>;
+ label = "GPIO TOP-LEFT";
+ linux,code = ; // 0x02
+ };
+ sw16 {
+ gpios = <&gpio2 RK_PA7 GPIO_ACTIVE_LOW>;
+ label = "GPIO TOP-RIGHT";
+ linux,code = ; // 0x05
+ };
+ sw19 {
+ gpios = <&gpio3 RK_PB1 GPIO_ACTIVE_LOW>;
+ label = "GPIO F1";
+ linux,code = ;
+ };
+ sw20 {
+ gpios = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
+ label = "GPIO TOP-RIGHT2";
+ linux,code = ;
+ };
+ sw21 {
+ gpios = <&gpio3 RK_PB2 GPIO_ACTIVE_LOW>;
+ label = "GPIO TOP-LEFT2";
+ linux,code = ;
+ };
+ sw22 {
+ gpios = <&gpio3 RK_PB4 GPIO_ACTIVE_LOW>;
+ label = "GPIO F2";
+ linux,code = ;
+ };
+ };
+
+ battery: battery {
+ compatible = "simple-battery";
+ charge-full-design-microamp-hours = <4000000>;
+ charge-term-current-microamp = <300000>;
+ constant-charge-current-max-microamp = <2000000>;
+ constant-charge-voltage-max-microvolt = <4200000>;
+ factory-internal-resistance-micro-ohms = <180000>;
+ voltage-max-design-microvolt = <4100000>;
+ voltage-min-design-microvolt = <3500000>;
+
+ ocv-capacity-celsius = <20>;
+ ocv-capacity-table-0 = <4046950 100>, <4001920 95>, <3967900 90>, <3919950 85>,
+ <3888450 80>, <3861850 75>, <3831540 70>, <3799130 65>,
+ <3768190 60>, <3745650 55>, <3726610 50>, <3711630 45>,
+ <3696720 40>, <3685660 35>, <3674950 30>, <3663050 25>,
+ <3649470 20>, <3635260 15>, <3616920 10>, <3592440 5>,
+ <3574170 0>;
+ };
+
+ gpio-keys-vol {
+ compatible = "gpio-keys";
+ autorepeat;
+ pinctrl-0 = <&btn_pins_vol>;
+ pinctrl-names = "default";
+
+ button-vol-down {
+ gpios = <&gpio2 RK_PA1 GPIO_ACTIVE_LOW>;
+ label = "VOLUMEDOWN";
+ linux,code = ;
+ };
+
+ button-volume-up {
+ gpios = <&gpio2 RK_PA0 GPIO_ACTIVE_LOW>;
+ label = "VOLUMEUP";
+ linux,code = ;
+ };
+ };
+};
+
+&internal_display {
+ compatible = "elida,kd50t048a", "sitronix,st7701";
+ reset-gpios = <&gpio3 RK_PC0 GPIO_ACTIVE_HIGH>;
+ IOVCC-supply = <&vcc_lcd>;
+ VCC-supply = <&vcc_lcd>;
+ rotation = <270>;
+};
+
+&rk817_charger {
+ monitored-battery = <&battery>;
+};
+
+&pinctrl {
+ btns {
+ btn_pins: btn-pins {
+ rockchip,pins = <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>,
+ <1 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>,
+ <1 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>,
+ <1 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up>,
+ <1 RK_PB4 RK_FUNC_GPIO &pcfg_pull_up>,
+ <1 RK_PB5 RK_FUNC_GPIO &pcfg_pull_up>,
+ <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_up>,
+ <1 RK_PB7 RK_FUNC_GPIO &pcfg_pull_up>,
+ <2 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>,
+ <2 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>,
+ <2 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>,
+ <2 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>,
+ <2 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>,
+ <2 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up>,
+ <3 RK_PB1 RK_FUNC_GPIO &pcfg_pull_up>,
+ <3 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>,
+ <3 RK_PB4 RK_FUNC_GPIO &pcfg_pull_up>,
+ <3 RK_PB7 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ btn_pins_vol: btn-pins-vol {
+ rockchip,pins = <2 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>,
+ <2 RK_PA1 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+};
diff --git a/config/archr-dts/rk3326-powkiddy-rgb10.dts b/config/archr-dts/rk3326-powkiddy-rgb10.dts
new file mode 100644
index 0000000000..de0f069fdd
--- /dev/null
+++ b/config/archr-dts/rk3326-powkiddy-rgb10.dts
@@ -0,0 +1,282 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2019 Hardkernel Co., Ltd
+ * Copyright (c) 2020 Theobroma Systems Design und Consulting GmbH
+ * Copyright (c) 2022 Maya Matuszczyk
+ */
+
+/dts-v1/;
+#include "rk3326-odroid-go.dtsi"
+
+/ {
+ model = "Powkiddy RGB10";
+ compatible = "powkiddy,rk3326-rgb10", "rockchip,rk3326";
+
+ aliases {
+ mmc1 = &sdio;
+ };
+
+ joypad: odroidgo2-joypad {
+ compatible = "odroidgo2-v11-joypad";
+
+ /*
+ - odroidgo2-joypad sysfs list -
+ * for poll device interval(ms)
+ /sys/devices/platform/odroidgo2_joypad/poll_interval [rw]
+ * for button-adc-fuzz
+ /sys/devices/platform/odroidgo2_joypad/adc_fuzz [r]
+ * for button-adc-flat
+ /sys/devices/platform/odroidgo2_joypad/adc_flat [r]
+
+ * for report control(1:enable, 0:disable)
+ /sys/devices/platform/odroidgo2_joypad/enable [rw]
+ * for adc calibration value setup(1:current adcs value -> cal value)
+ /sys/devices/platform/odroidgo2_joypad/adc_cal [rw]
+ */
+
+ /* gpio pincontrol setup */
+ pinctrl-names = "default";
+ pinctrl-0 = <&btn_pins>;
+
+ /* JOY_X, JOY_Y Channel define */
+ io-channel-names = "joy_x", "joy_y";
+ io-channels = <&saradc 1>, <&saradc 2>;
+
+ /* adc channel count */
+ button-adc-count = <2>;
+
+ /* adc calculate scale */
+ button-adc-scale = <2>;
+
+ /* adc deadzone range */
+ button-adc-deadzone = <20>;
+
+ /*
+ joy-stick voltage range
+ /sys/devices/platform/ff288000.saradc/iio:device0
+ adc-x : in_voltage1_raw
+ adc-y : in_voltage2_raw
+
+ range calculate.
+ (adc raw max value - adc raw min value) * scale * 1.7515
+ */
+ button-adc-x-range = <1800>;
+ button-adc-y-range = <1800>;
+
+ /*
+ specifies fuzz value that is used to filter noise from
+ the event stream.
+ */
+ button-adc-fuzz = <32>;
+ button-adc-flat = <32>;
+
+ /* poll device interval (ms), adc read interval */
+ poll-interval = <10>;
+
+ /* gpio button auto repeat set value : default disable */
+ /*
+ autorepeat;
+ */
+
+ /*
+ *** RGB10 Switch layoout ***
+ |------------------------------------------------|
+ | sw15 sw16 |
+ | sw20 sw21 |
+ |------------------------------------------------|
+ | sw1 sw10 |-------------------| sw13 sw8 |
+ | sw3 sw4 | | sw7 sw5 |
+ | sw2 | LCD Display | sw6 |
+ | | | |
+ | |-------------------| |
+ |------------------------------------------------|
+ */
+ /*
+ joypad driver is poll-device driver.
+ poll-device is does not support wakeup-source.
+ */
+ sw1 {
+ gpios = <&gpio1 RK_PB4 GPIO_ACTIVE_LOW>;
+ label = "GPIO DPAD-UP";
+ linux,code = ; // 0x220
+ };
+ sw2 {
+ gpios = <&gpio1 RK_PB5 GPIO_ACTIVE_LOW>;
+ label = "GPIO DPAD-DOWN";
+ linux,code = ; // 0x221
+ };
+ sw3 {
+ gpios = <&gpio1 RK_PB6 GPIO_ACTIVE_LOW>;
+ label = "GPIO DPAD-LEFT";
+ linux,code = ; // 0x222
+ };
+ sw4 {
+ gpios = <&gpio1 RK_PB7 GPIO_ACTIVE_LOW>;
+ label = "GPIO DPAD-RIGHT";
+ linux,code = ; // 0x223
+ };
+ sw5 {
+ gpios = <&gpio1 RK_PA2 GPIO_ACTIVE_LOW>;
+ label = "GPIO KEY BTN-A";
+ linux,code = ; // 0x131
+ };
+ sw6 {
+ gpios = <&gpio1 RK_PA5 GPIO_ACTIVE_LOW>;
+ label = "GPIO BTN-B";
+ linux,code = ; // 0x130
+ };
+ sw7 {
+ gpios = <&gpio1 RK_PA6 GPIO_ACTIVE_LOW>;
+ label = "GPIO BTN-Y";
+ linux,code = ; // 0x134
+ };
+ sw8 {
+ gpios = <&gpio1 RK_PA7 GPIO_ACTIVE_LOW>;
+ label = "GPIO BTN-X";
+ linux,code = ; // 0x133
+ };
+ sw9 {
+ gpios = <&gpio2 RK_PA0 GPIO_ACTIVE_LOW>;
+ label = "GPIO BTN-SELECT";
+ linux,code = ; // 0x2c0
+ };
+ sw10 {
+ gpios = <&gpio2 RK_PA1 GPIO_ACTIVE_LOW>;
+ label = "GPIO BTN-THUMBL";
+ linux,code = ; // 0x2c1
+ };
+ sw13 {
+ gpios = <&gpio2 RK_PA4 GPIO_ACTIVE_LOW>;
+ label = "GPIO BTN-THUMBR";
+ linux,code = ; // 0x2c4
+ };
+ sw14 {
+ gpios = <&gpio2 RK_PA5 GPIO_ACTIVE_LOW>;
+ label = "GPIO BTN-START";
+ linux,code = ; // 0x13c
+ };
+ sw15 {
+ gpios = <&gpio2 RK_PA6 GPIO_ACTIVE_LOW>;
+ label = "GPIO TOP-LEFT";
+ linux,code = ; // 0x02
+ };
+ sw16 {
+ gpios = <&gpio2 RK_PA7 GPIO_ACTIVE_LOW>;
+ label = "GPIO TOP-RIGHT";
+ linux,code = ; // 0x05
+ };
+ sw20 {
+ gpios = <&gpio2 RK_PA2 GPIO_ACTIVE_LOW>;
+ label = "GPIO TOP-LEFT2";
+ linux,code = ;
+ };
+ sw21 {
+ gpios = <&gpio2 RK_PA3 GPIO_ACTIVE_LOW>;
+ label = "GPIO TOP-RIGHT2";
+ linux,code = ;
+ };
+ };
+
+ battery: battery {
+ compatible = "simple-battery";
+ charge-full-design-microamp-hours = <2800000>;
+ charge-term-current-microamp = <280000>;
+ constant-charge-current-max-microamp = <2000000>;
+ constant-charge-voltage-max-microvolt = <4200000>;
+ factory-internal-resistance-micro-ohms = <180000>;
+ voltage-max-design-microvolt = <4100000>;
+ voltage-min-design-microvolt = <3500000>;
+
+ ocv-capacity-celsius = <20>;
+ ocv-capacity-table-0 = <4046950 100>, <4001920 95>, <3967900 90>, <3919950 85>,
+ <3888450 80>, <3861850 75>, <3831540 70>, <3799130 65>,
+ <3768190 60>, <3745650 55>, <3726610 50>, <3711630 45>,
+ <3696720 40>, <3685660 35>, <3674950 30>, <3663050 25>,
+ <3649470 20>, <3635260 15>, <3616920 10>, <3592440 5>,
+ <3574170 0>;
+ };
+
+ wifi_pwrseq: wifi-pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ pinctrl-names = "default";
+ pinctrl-0 = <&wifi_pwrseq_pins>;
+ /*reset-gpios = <&gpio3 RK_PB1 GPIO_ACTIVE_LOW>;*/
+ };
+};
+
+&internal_display {
+ compatible = "elida,kd35t133";
+ iovcc-supply = <&vcc_lcd>;
+ vdd-supply = <&vcc_lcd>;
+ rotation = <270>;
+};
+
+&rk817 {
+ regulators {
+ vcc_wifi: LDO_REG9 {
+ regulator-name = "vcc_wifi";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <3300000>;
+ };
+ };
+ };
+};
+
+&rk817_charger {
+ monitored-battery = <&battery>;
+};
+
+&sdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ bus-width = <4>;
+ cap-sd-highspeed;
+ cap-sdio-irq;
+ disable-wp;
+ keep-power-in-suspend;
+ non-removable;
+ vmmc-supply = <&vcc_wifi>;
+ status = "okay";
+
+ esp8089: wifi@1 {
+ compatible = "esp,esp8089";
+ reg = <1>;
+ esp,crystal-26M-en = <2>;
+ };
+};
+
+&pinctrl {
+ btns {
+ btn_pins: btn-pins {
+ rockchip,pins = <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>,
+ <1 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>,
+ <1 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>,
+ <1 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up>,
+ <1 RK_PB4 RK_FUNC_GPIO &pcfg_pull_up>,
+ <1 RK_PB5 RK_FUNC_GPIO &pcfg_pull_up>,
+ <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_up>,
+ <1 RK_PB7 RK_FUNC_GPIO &pcfg_pull_up>,
+ <2 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>,
+ <2 RK_PA1 RK_FUNC_GPIO &pcfg_pull_up>,
+ <2 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>,
+ <2 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>,
+ <2 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>,
+ <2 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up>,
+ <3 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>,
+ <3 RK_PB7 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+
+ wifi {
+ wifi_pwrseq_pins: wifi-pwrseq-pins {
+ rockchip,pins = /*<3 RK_PB1 RK_FUNC_GPIO &pcfg_pull_up>,*/
+ <3 RK_PB6 RK_FUNC_GPIO &pcfg_output_high>;
+ };
+ };
+};
diff --git a/config/archr-dts/rk3326-powkiddy-rgb10x.dts b/config/archr-dts/rk3326-powkiddy-rgb10x.dts
new file mode 100644
index 0000000000..debc628194
--- /dev/null
+++ b/config/archr-dts/rk3326-powkiddy-rgb10x.dts
@@ -0,0 +1,214 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2024 ROCKNIX
+ */
+
+/dts-v1/;
+#include "rk3326-odroid-go.dtsi"
+#include "retrogame_joypad_s2_f1.dtsi"
+#include "rk3326-device-group-r36.dtsi"
+
+/ {
+ model = "Powkiddy RGB10X";
+ compatible = "powkiddy,rk3326-rgb10x", "rockchip,rk3326";
+
+ archr,device_switch {
+ this = "rgb10x";
+ };
+
+ aliases {
+ mmc1 = &sdio;
+ };
+
+ battery: battery {
+ compatible = "simple-battery";
+ charge-full-design-microamp-hours = <2800000>;
+ charge-term-current-microamp = <280000>;
+ constant-charge-current-max-microamp = <2000000>;
+ constant-charge-voltage-max-microvolt = <4200000>;
+ factory-internal-resistance-micro-ohms = <180000>;
+ voltage-max-design-microvolt = <4100000>;
+ voltage-min-design-microvolt = <3500000>;
+
+ ocv-capacity-celsius = <20>;
+ ocv-capacity-table-0 = <4046950 100>, <4001920 95>, <3967900 90>, <3919950 85>,
+ <3888450 80>, <3861850 75>, <3831540 70>, <3799130 65>,
+ <3768190 60>, <3745650 55>, <3726610 50>, <3711630 45>,
+ <3696720 40>, <3685660 35>, <3674950 30>, <3663050 25>,
+ <3649470 20>, <3635260 15>, <3616920 10>, <3592440 5>,
+ <3574170 0>;
+ };
+
+ gpio-keys-vol {
+ compatible = "gpio-keys";
+ autorepeat;
+ pinctrl-0 = <&btn_pins_vol>;
+ pinctrl-names = "default";
+
+ button-vol-down {
+ gpios = <&gpio2 RK_PA1 GPIO_ACTIVE_LOW>;
+ label = "VOLUMEDOWN";
+ linux,code = ;
+ };
+
+ button-volume-up {
+ gpios = <&gpio2 RK_PA0 GPIO_ACTIVE_LOW>;
+ label = "VOLUMEUP";
+ linux,code = ;
+ };
+ };
+};
+
+&joypad {
+ compatible = "archr-singleadc-joypad";
+ joypad-name = "retrogame_joypad_s1_f2"; /* distinct name to indicate there is 1 stick and 2 fn buttons */
+ joypad-product = <0x1112>; /* 11 inherited, 1 for number of sticks, 2 for number of FN */
+ status = "okay";
+
+ /* gpio pincontrol setup */
+ pinctrl-names = "default";
+ pinctrl-0 = <&btn_pins>;
+
+ /* Analog mux define */
+ io-channel-names = "amux_adc";
+ io-channels = <&saradc 1>;
+
+ /* adc mux channel count */
+ /* despite there is only left stick, amux-count needs to be 4, */
+ /* because amux 0 and 1 are hardcoded as RX and RY in the driver */
+ amux-count = <4>;
+ /* adc mux select(a,b) gpio */
+ amux-a-gpios = <&gpio3 RK_PB3 GPIO_ACTIVE_LOW>;
+ amux-b-gpios = <&gpio3 RK_PB0 GPIO_ACTIVE_LOW>;
+ /* adc mux enable gpio */
+ amux-en-gpios = <&gpio3 RK_PB5 GPIO_ACTIVE_LOW>;
+
+ /*
+ Analog Stick data tuning value(precent)
+ p = positive direction, n = negative direction
+ report value = (real_adc_data * tuning_value) / 100
+ */
+ abs_x-p-tuning = <200>;
+ abs_x-n-tuning = <200>;
+
+ abs_y-p-tuning = <200>;
+ abs_y-n-tuning = <200>;
+
+ abs_rx-p-tuning = <200>;
+ abs_rx-n-tuning = <200>;
+
+ abs_ry-p-tuning = <200>;
+ abs_ry-n-tuning = <200>;
+
+ /* required for RGB10X */
+ invert-absx;
+ invert-absy;
+
+ /*
+ joypad driver is poll-device driver.
+ poll-device is does not support wakeup-source.
+ */
+ up { gpios = <&gpio1 RK_PB4 GPIO_ACTIVE_LOW>; };
+ down { gpios = <&gpio1 RK_PB5 GPIO_ACTIVE_LOW>; };
+ left { gpios = <&gpio1 RK_PB6 GPIO_ACTIVE_LOW>; };
+ right { gpios = <&gpio1 RK_PB7 GPIO_ACTIVE_LOW>; };
+
+ a { gpios = <&gpio1 RK_PA2 GPIO_ACTIVE_LOW>; };
+ b { gpios = <&gpio1 RK_PA5 GPIO_ACTIVE_LOW>; };
+ x { gpios = <&gpio1 RK_PA7 GPIO_ACTIVE_LOW>; };
+ y { gpios = <&gpio1 RK_PA6 GPIO_ACTIVE_LOW>; };
+
+ tl { gpios = <&gpio2 RK_PA6 GPIO_ACTIVE_LOW>; };
+ tr { gpios = <&gpio2 RK_PA7 GPIO_ACTIVE_LOW>; };
+ tr2 { gpios = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>; };
+ tl2 { gpios = <&gpio3 RK_PB2 GPIO_ACTIVE_LOW>; };
+
+ select{ gpios = <&gpio3 RK_PB1 GPIO_ACTIVE_LOW>; };
+ start { gpios = <&gpio3 RK_PB4 GPIO_ACTIVE_LOW>; };
+
+ thumbl{ gpios = <&gpio2 RK_PA2 GPIO_ACTIVE_LOW>; };
+
+ /* Plus and Minus face buttons are mapped to mode and thumbr */
+ mode {
+ gpios = <&gpio2 RK_PA4 GPIO_ACTIVE_LOW>;
+ label = "GPIO MINUS";
+ };
+ thumbr {
+ gpios = <&gpio2 RK_PA3 GPIO_ACTIVE_LOW>;
+ label = "GPIO PLUS";
+ };
+};
+
+&internal_display {
+ compatible = "powkiddy,rk2023-panel", "newvision,nv3051d";
+ vdd-supply = <&vcc_lcd>;
+};
+
+&io_domains {
+ vccio1-supply = <&vccio_sd>;
+};
+
+/delete-node/ &pwm3;
+/delete-node/ &pwm_led;
+
+&red_led {
+ gpios = <&gpio2 RK_PB5 GPIO_ACTIVE_HIGH>;
+};
+
+&red_led_pin {
+ rockchip,pins = <2 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
+};
+
+&rk817_charger {
+ monitored-battery = <&battery>;
+};
+
+&sdio {
+ cap-sd-highspeed;
+ card-detect-delay = <200>;
+ cd-gpios = <&gpio3 RK_PB6 GPIO_ACTIVE_LOW>;
+ sd-uhs-sdr12;
+ sd-uhs-sdr25;
+ sd-uhs-sdr50;
+ sd-uhs-sdr104;
+ vmmc-supply = <&vcc_sd>;
+ vqmmc-supply = <&vccio_sd>;
+ status = "okay";
+};
+
+&vcc_sd {
+ regulator-max-microvolt = <3000000>;
+ regulator-min-microvolt = <1800000>;
+};
+
+&vccio_sd {
+ regulator-max-microvolt = <1800000>;
+};
+
+&pinctrl {
+ btns {
+ btn_pins: btn-pins {
+ rockchip,pins = <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>,
+ <1 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>,
+ <1 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>,
+ <1 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up>,
+ <1 RK_PB4 RK_FUNC_GPIO &pcfg_pull_up>,
+ <1 RK_PB5 RK_FUNC_GPIO &pcfg_pull_up>,
+ <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_up>,
+ <1 RK_PB7 RK_FUNC_GPIO &pcfg_pull_up>,
+ <2 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>,
+ <2 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>,
+ <2 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>,
+ <2 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>,
+ <2 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up>,
+ <3 RK_PB1 RK_FUNC_GPIO &pcfg_pull_up>,
+ <3 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>,
+ <3 RK_PB4 RK_FUNC_GPIO &pcfg_pull_up>,
+ <3 RK_PB7 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ btn_pins_vol: btn-pins-vol {
+ rockchip,pins = <2 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>,
+ <2 RK_PA1 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+};
diff --git a/config/archr-dts/rk3326-powkiddy-rgb20s.dts b/config/archr-dts/rk3326-powkiddy-rgb20s.dts
new file mode 100644
index 0000000000..93f149e62a
--- /dev/null
+++ b/config/archr-dts/rk3326-powkiddy-rgb20s.dts
@@ -0,0 +1,375 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2019 Hardkernel Co., Ltd
+ * Copyright (c) 2020 Theobroma Systems Design und Consulting GmbH
+ * Copyright (c) 2022 Maya Matuszczyk
+ */
+
+/dts-v1/;
+#include "rk3326-odroid-go.dtsi"
+
+/ {
+ model = "Powkiddy RGB20S";
+ compatible = "powkiddy,rgb20s", "rockchip,rk3326";
+
+ aliases {
+ mmc0 = &sdio;
+ mmc1 = &sdmmc;
+ };
+
+ gpio-keys-vol {
+ compatible = "gpio-keys";
+ autorepeat;
+ pinctrl-0 = <&btn_pins_vol>;
+ pinctrl-names = "default";
+
+ button-vol-down {
+ gpios = <&gpio2 RK_PA1 GPIO_ACTIVE_LOW>;
+ label = "VOLUMEDOWN";
+ linux,code = ;
+ };
+
+ button-volume-up {
+ gpios = <&gpio2 RK_PA0 GPIO_ACTIVE_LOW>;
+ label = "VOLUMEUP";
+ linux,code = ;
+ };
+ };
+
+ joypad: joypad {
+ compatible = "archr-singleadc-joypad";
+
+ pwms = <&pwm0 0 200000000 0>;
+ pwm-names = "enable";
+ rumble-boost-weak = <0x0000>;
+ rumble-boost-strong = <0x0000>;
+
+ joypad-name = "r36s_Gamepad";
+ joypad-product = <0x1188>;
+ joypad-revision = <0x0188>;
+ joypad-vendor = <0x0001>;
+
+ status = "okay";
+
+ /* gpio pincontrol setup */
+ pinctrl-names = "default";
+ pinctrl-0 = <&btn_pins>;
+ pinctrl-1 = <&pwm0_pin>;
+
+ /* Analog mux define */
+ io-channel-names = "amux_adc";
+ io-channels = <&saradc 1>;
+
+ /* adc mux channel count */
+ amux-count = <4>;
+ /* non-default wiring */
+ amux-channel-mapping = <0 1 2 3>;
+ /* adc mux select(a,b) gpio */
+ amux-a-gpios = <&gpio3 RK_PB3 GPIO_ACTIVE_LOW>;
+ amux-b-gpios = <&gpio3 RK_PB0 GPIO_ACTIVE_LOW>;
+ /* adc mux enable gpio */
+ amux-en-gpios = <&gpio3 RK_PB5 GPIO_ACTIVE_LOW>;
+
+ /* adc calculate scale */
+ button-adc-scale = <2>;
+
+ /* adc deadzone range */
+ button-adc-deadzone = <64>;
+
+ /*
+ specifies fuzz value that is used to filter noise from
+ the event stream.
+ */
+ button-adc-fuzz = <32>;
+ button-adc-flat = <32>;
+
+ /*
+ Analog Stick data tuning value(precent)
+ p = positive direction, n = negative direction
+ report value = (real_adc_data * tuning_value) / 100
+ */
+ abs_x-p-tuning = <400>;
+ abs_x-n-tuning = <400>;
+
+ abs_y-p-tuning = <400>;
+ abs_y-n-tuning = <400>;
+
+ abs_rx-p-tuning = <400>;
+ abs_rx-n-tuning = <400>;
+
+ abs_ry-p-tuning = <400>;
+ abs_ry-n-tuning = <400>;
+
+ /* poll device interval (ms), adc read interval */
+ poll-interval = <10>;
+
+ /* required for RG351MP */
+ invert-absx;
+ invert-absy;
+
+ /* gpio button auto repeat set value : default disable */
+ /*
+ autorepeat;
+ */
+
+ /*
+ joypad driver is poll-device driver.
+ poll-device is does not support wakeup-source.
+ */
+ sw1 {
+ gpios = <&gpio1 RK_PB4 GPIO_ACTIVE_LOW>;
+ label = "GPIO DPAD-UP";
+ linux,code = ; // 0x220
+ };
+ sw2 {
+ gpios = <&gpio1 RK_PB5 GPIO_ACTIVE_LOW>;
+ label = "GPIO DPAD-DOWN";
+ linux,code = ; // 0x221
+ };
+ sw3 {
+ gpios = <&gpio1 RK_PB6 GPIO_ACTIVE_LOW>;
+ label = "GPIO DPAD-LEFT";
+ linux,code = ; // 0x222
+ };
+ sw4 {
+ gpios = <&gpio1 RK_PB7 GPIO_ACTIVE_LOW>;
+ label = "GPIO DPAD-RIGHT";
+ linux,code = ; // 0x223
+ };
+ sw5 {
+ gpios = <&gpio1 RK_PA2 GPIO_ACTIVE_LOW>;
+ label = "GPIO KEY BTN-A";
+ linux,code = ; // 0x131
+ };
+ sw6 {
+ gpios = <&gpio1 RK_PA5 GPIO_ACTIVE_LOW>;
+ label = "GPIO BTN-B";
+ linux,code = 
[](https://github.com/ROCKNIX/distribution/releases/latest) [](https://github.com/ROCKNIX/distribution/commits) [](https://github.com/ROCKNIX/distribution/pulls) [](https://discord.gg/seTxckZjJy)
+ 
