diff --git a/README.md b/README.md index 3125cfef1b..40854a796a 100644 --- a/README.md +++ b/README.md @@ -24,7 +24,7 @@ Arch R is a custom Linux distribution for the **R36S** handheld gaming console a - EmulationStation frontend with RetroArch and 18+ cores pre-installed. - Full audio support with speaker/headphone auto-switch. - Battery monitoring with capacity reporting and LED warning. -- 20 pre-generated MIPI panel overlays (7 original + 13 clone variants). +- 43 pre-generated MIPI panel overlays (15 original + 18 clone + 10 soysauce variants), one per motherboard revision. - Separate images for original and clone boards, both with hardware auto-detection. - Integrated cross-device local and remote network play. - Fine-grained control for battery life and performance. @@ -50,7 +50,7 @@ Arch R is a custom Linux distribution for the **R36S** handheld gaming console a ### Display Panels -Arch R ships 20 pre-generated MIPI panel overlays covering all known R36S display variants. Panel selection is done by copying the correct `.dtbo` file to `overlays/mipi-panel.dtbo` on the boot partition. +Arch R ships 43 pre-generated MIPI panel overlays covering all known R36S display variants, named after the exact motherboard revision (e.g. `R36S-V21_2024-12-18_2551.dtbo`, `G80CA-MB_V1.3-20251212_Panel_8.dtbo`). Panel selection is done by copying the correct `.dtbo` file to `overlays/mipi-panel.dtbo` on the boot partition. Sources live under `config/archr-dts/{original,clone,soysauce}//`; the build extracts the panel description from each revision's `rk3326-r36s-linux.dtb` via `config/mipi-generator/generator.sh`. ## Quick Start diff --git a/config/archr-dts/R36S-Clones-DTB/Panel 1/extlinux/extlinux.conf b/config/archr-dts/R36S-Clones-DTB/Panel 1/extlinux/extlinux.conf deleted file mode 100644 index 590e9eff7c..0000000000 --- a/config/archr-dts/R36S-Clones-DTB/Panel 1/extlinux/extlinux.conf +++ /dev/null @@ -1,5 +0,0 @@ -LABEL ArkOS - LINUX /Image - FDT /rf3536k4ka.dtb - INITRD /uInitrd - APPEND earlyprintk console=ttyFIQ0 rw root=/dev/mmcblk1p2 rootfstype=ext4 loglevel=7 init=/sbin/init rootwait rootdelay=10 fsck.repair=yes fbcon=rotate:0 quiet splash plymouth.ignore-serial-consoles consoleblank=0 diff --git a/config/archr-dts/R36S-Clones-DTB/Panel 1/rf3536k4ka.dtb b/config/archr-dts/R36S-Clones-DTB/Panel 1/rf3536k4ka.dtb deleted file mode 100644 index 4bafa69fad..0000000000 Binary files a/config/archr-dts/R36S-Clones-DTB/Panel 1/rf3536k4ka.dtb and /dev/null differ diff --git a/config/archr-dts/R36S-Clones-DTB/Panel 10/extlinux/extlinux.conf b/config/archr-dts/R36S-Clones-DTB/Panel 10/extlinux/extlinux.conf deleted file mode 100644 index 6c37b053ea..0000000000 --- a/config/archr-dts/R36S-Clones-DTB/Panel 10/extlinux/extlinux.conf +++ /dev/null @@ -1,5 +0,0 @@ -LABEL ArkOS - LINUX /Image - FDT /rf3536k3ka.dtb - INITRD /uInitrd - APPEND earlyprintk console=ttyFIQ0 rw root=/dev/mmcblk1p2 rootfstype=ext4 loglevel=7 init=/sbin/init rootwait rootdelay=10 fsck.repair=yes fbcon=rotate:0 quiet splash plymouth.ignore-serial-consoles consoleblank=0 diff --git a/config/archr-dts/R36S-Clones-DTB/Panel 10/rf3536k3ka.dtb b/config/archr-dts/R36S-Clones-DTB/Panel 10/rf3536k3ka.dtb deleted file mode 100644 index d00864964f..0000000000 Binary files a/config/archr-dts/R36S-Clones-DTB/Panel 10/rf3536k3ka.dtb and /dev/null differ diff --git a/config/archr-dts/R36S-Clones-DTB/Panel 2/extlinux/extlinux.conf b/config/archr-dts/R36S-Clones-DTB/Panel 2/extlinux/extlinux.conf deleted file mode 100644 index 590e9eff7c..0000000000 --- a/config/archr-dts/R36S-Clones-DTB/Panel 2/extlinux/extlinux.conf +++ /dev/null @@ -1,5 +0,0 @@ -LABEL ArkOS - LINUX /Image - FDT /rf3536k4ka.dtb - INITRD /uInitrd - APPEND earlyprintk console=ttyFIQ0 rw root=/dev/mmcblk1p2 rootfstype=ext4 loglevel=7 init=/sbin/init rootwait rootdelay=10 fsck.repair=yes fbcon=rotate:0 quiet splash plymouth.ignore-serial-consoles consoleblank=0 diff --git a/config/archr-dts/R36S-Clones-DTB/Panel 2/rf3536k4ka.dtb b/config/archr-dts/R36S-Clones-DTB/Panel 2/rf3536k4ka.dtb deleted file mode 100644 index d6e65d2d09..0000000000 Binary files a/config/archr-dts/R36S-Clones-DTB/Panel 2/rf3536k4ka.dtb and /dev/null differ diff --git a/config/archr-dts/R36S-Clones-DTB/Panel 3/extlinux/extlinux.conf b/config/archr-dts/R36S-Clones-DTB/Panel 3/extlinux/extlinux.conf deleted file mode 100644 index 590e9eff7c..0000000000 --- a/config/archr-dts/R36S-Clones-DTB/Panel 3/extlinux/extlinux.conf +++ /dev/null @@ -1,5 +0,0 @@ -LABEL ArkOS - LINUX /Image - FDT /rf3536k4ka.dtb - INITRD /uInitrd - APPEND earlyprintk console=ttyFIQ0 rw root=/dev/mmcblk1p2 rootfstype=ext4 loglevel=7 init=/sbin/init rootwait rootdelay=10 fsck.repair=yes fbcon=rotate:0 quiet splash plymouth.ignore-serial-consoles consoleblank=0 diff --git a/config/archr-dts/R36S-Clones-DTB/Panel 3/rf3536k4ka.dtb b/config/archr-dts/R36S-Clones-DTB/Panel 3/rf3536k4ka.dtb deleted file mode 100644 index d4f1335dbf..0000000000 Binary files a/config/archr-dts/R36S-Clones-DTB/Panel 3/rf3536k4ka.dtb and /dev/null differ diff --git a/config/archr-dts/R36S-Clones-DTB/Panel 4/extlinux/extlinux.conf b/config/archr-dts/R36S-Clones-DTB/Panel 4/extlinux/extlinux.conf deleted file mode 100644 index 590e9eff7c..0000000000 --- a/config/archr-dts/R36S-Clones-DTB/Panel 4/extlinux/extlinux.conf +++ /dev/null @@ -1,5 +0,0 @@ -LABEL ArkOS - LINUX /Image - FDT /rf3536k4ka.dtb - INITRD /uInitrd - APPEND earlyprintk console=ttyFIQ0 rw root=/dev/mmcblk1p2 rootfstype=ext4 loglevel=7 init=/sbin/init rootwait rootdelay=10 fsck.repair=yes fbcon=rotate:0 quiet splash plymouth.ignore-serial-consoles consoleblank=0 diff --git a/config/archr-dts/R36S-Clones-DTB/Panel 4/rf3536k4ka.dtb b/config/archr-dts/R36S-Clones-DTB/Panel 4/rf3536k4ka.dtb deleted file mode 100644 index 2aaf9800e6..0000000000 Binary files a/config/archr-dts/R36S-Clones-DTB/Panel 4/rf3536k4ka.dtb and /dev/null differ diff --git a/config/archr-dts/R36S-Clones-DTB/Panel 5/extlinux/extlinux.conf b/config/archr-dts/R36S-Clones-DTB/Panel 5/extlinux/extlinux.conf deleted file mode 100644 index 590e9eff7c..0000000000 --- a/config/archr-dts/R36S-Clones-DTB/Panel 5/extlinux/extlinux.conf +++ /dev/null @@ -1,5 +0,0 @@ -LABEL ArkOS - LINUX /Image - FDT /rf3536k4ka.dtb - INITRD /uInitrd - APPEND earlyprintk console=ttyFIQ0 rw root=/dev/mmcblk1p2 rootfstype=ext4 loglevel=7 init=/sbin/init rootwait rootdelay=10 fsck.repair=yes fbcon=rotate:0 quiet splash plymouth.ignore-serial-consoles consoleblank=0 diff --git a/config/archr-dts/R36S-Clones-DTB/Panel 5/rf3536k4ka.dtb b/config/archr-dts/R36S-Clones-DTB/Panel 5/rf3536k4ka.dtb deleted file mode 100644 index f6de8ebc15..0000000000 Binary files a/config/archr-dts/R36S-Clones-DTB/Panel 5/rf3536k4ka.dtb and /dev/null differ diff --git a/config/archr-dts/R36S-Clones-DTB/Panel 6/extlinux/extlinux.conf b/config/archr-dts/R36S-Clones-DTB/Panel 6/extlinux/extlinux.conf deleted file mode 100644 index 590e9eff7c..0000000000 --- a/config/archr-dts/R36S-Clones-DTB/Panel 6/extlinux/extlinux.conf +++ /dev/null @@ -1,5 +0,0 @@ -LABEL ArkOS - LINUX /Image - FDT /rf3536k4ka.dtb - INITRD /uInitrd - APPEND earlyprintk console=ttyFIQ0 rw root=/dev/mmcblk1p2 rootfstype=ext4 loglevel=7 init=/sbin/init rootwait rootdelay=10 fsck.repair=yes fbcon=rotate:0 quiet splash plymouth.ignore-serial-consoles consoleblank=0 diff --git a/config/archr-dts/R36S-Clones-DTB/Panel 6/rf3536k4ka.dtb b/config/archr-dts/R36S-Clones-DTB/Panel 6/rf3536k4ka.dtb deleted file mode 100644 index 220c21f7db..0000000000 Binary files a/config/archr-dts/R36S-Clones-DTB/Panel 6/rf3536k4ka.dtb and /dev/null differ diff --git a/config/archr-dts/R36S-Clones-DTB/Panel 7/extlinux/extlinux.conf b/config/archr-dts/R36S-Clones-DTB/Panel 7/extlinux/extlinux.conf deleted file mode 100644 index 590e9eff7c..0000000000 --- a/config/archr-dts/R36S-Clones-DTB/Panel 7/extlinux/extlinux.conf +++ /dev/null @@ -1,5 +0,0 @@ -LABEL ArkOS - LINUX /Image - FDT /rf3536k4ka.dtb - INITRD /uInitrd - APPEND earlyprintk console=ttyFIQ0 rw root=/dev/mmcblk1p2 rootfstype=ext4 loglevel=7 init=/sbin/init rootwait rootdelay=10 fsck.repair=yes fbcon=rotate:0 quiet splash plymouth.ignore-serial-consoles consoleblank=0 diff --git a/config/archr-dts/R36S-Clones-DTB/Panel 7/rf3536k4ka.dtb b/config/archr-dts/R36S-Clones-DTB/Panel 7/rf3536k4ka.dtb deleted file mode 100644 index 96cd0a768a..0000000000 Binary files a/config/archr-dts/R36S-Clones-DTB/Panel 7/rf3536k4ka.dtb and /dev/null differ diff --git a/config/archr-dts/R36S-Clones-DTB/Panel 8/extlinux/extlinux.conf b/config/archr-dts/R36S-Clones-DTB/Panel 8/extlinux/extlinux.conf deleted file mode 100644 index 590e9eff7c..0000000000 --- a/config/archr-dts/R36S-Clones-DTB/Panel 8/extlinux/extlinux.conf +++ /dev/null @@ -1,5 +0,0 @@ -LABEL ArkOS - LINUX /Image - FDT /rf3536k4ka.dtb - INITRD /uInitrd - APPEND earlyprintk console=ttyFIQ0 rw root=/dev/mmcblk1p2 rootfstype=ext4 loglevel=7 init=/sbin/init rootwait rootdelay=10 fsck.repair=yes fbcon=rotate:0 quiet splash plymouth.ignore-serial-consoles consoleblank=0 diff --git a/config/archr-dts/R36S-Clones-DTB/Panel 8/rf3536k4ka.dtb b/config/archr-dts/R36S-Clones-DTB/Panel 8/rf3536k4ka.dtb deleted file mode 100644 index 0b60a5d717..0000000000 Binary files a/config/archr-dts/R36S-Clones-DTB/Panel 8/rf3536k4ka.dtb and /dev/null differ diff --git a/config/archr-dts/R36S-Clones-DTB/Panel 9/extlinux/extlinux.conf b/config/archr-dts/R36S-Clones-DTB/Panel 9/extlinux/extlinux.conf deleted file mode 100644 index 590e9eff7c..0000000000 --- a/config/archr-dts/R36S-Clones-DTB/Panel 9/extlinux/extlinux.conf +++ /dev/null @@ -1,5 +0,0 @@ -LABEL ArkOS - LINUX /Image - FDT /rf3536k4ka.dtb - INITRD /uInitrd - APPEND earlyprintk console=ttyFIQ0 rw root=/dev/mmcblk1p2 rootfstype=ext4 loglevel=7 init=/sbin/init rootwait rootdelay=10 fsck.repair=yes fbcon=rotate:0 quiet splash plymouth.ignore-serial-consoles consoleblank=0 diff --git a/config/archr-dts/R36S-Clones-DTB/Panel 9/rf3536k4ka.dtb b/config/archr-dts/R36S-Clones-DTB/Panel 9/rf3536k4ka.dtb deleted file mode 100644 index 3dfe2fa279..0000000000 Binary files a/config/archr-dts/R36S-Clones-DTB/Panel 9/rf3536k4ka.dtb and /dev/null differ diff --git a/config/archr-dts/R36S-Clones-DTB/R36 Max/extlinux/extlinux.conf b/config/archr-dts/R36S-Clones-DTB/R36 Max/extlinux/extlinux.conf deleted file mode 100644 index 590e9eff7c..0000000000 --- a/config/archr-dts/R36S-Clones-DTB/R36 Max/extlinux/extlinux.conf +++ /dev/null @@ -1,5 +0,0 @@ -LABEL ArkOS - LINUX /Image - FDT /rf3536k4ka.dtb - INITRD /uInitrd - APPEND earlyprintk console=ttyFIQ0 rw root=/dev/mmcblk1p2 rootfstype=ext4 loglevel=7 init=/sbin/init rootwait rootdelay=10 fsck.repair=yes fbcon=rotate:0 quiet splash plymouth.ignore-serial-consoles consoleblank=0 diff --git a/config/archr-dts/R36S-Clones-DTB/R36 Max/rf3536k4ka.dtb b/config/archr-dts/R36S-Clones-DTB/R36 Max/rf3536k4ka.dtb deleted file mode 100644 index cb4a5a5245..0000000000 Binary files a/config/archr-dts/R36S-Clones-DTB/R36 Max/rf3536k4ka.dtb and /dev/null differ diff --git a/config/archr-dts/R36S-Clones-DTB/RX6S/extlinux/extlinux.conf b/config/archr-dts/R36S-Clones-DTB/RX6S/extlinux/extlinux.conf deleted file mode 100644 index df58468a13..0000000000 --- a/config/archr-dts/R36S-Clones-DTB/RX6S/extlinux/extlinux.conf +++ /dev/null @@ -1,5 +0,0 @@ -LABEL ArkOS - LINUX /Image - FDT /rf351g3ka.dtb - INITRD /uInitrd - APPEND earlyprintk console=ttyFIQ0 rw root=/dev/mmcblk1p2 rootfstype=ext4 loglevel=7 init=/sbin/init rootwait rootdelay=10 fsck.repair=yes fbcon=rotate:0 quiet splash plymouth.ignore-serial-consoles consoleblank=0 diff --git a/config/archr-dts/R36S-Clones-DTB/RX6S/rf351g3ka.dtb b/config/archr-dts/R36S-Clones-DTB/RX6S/rf351g3ka.dtb deleted file mode 100644 index 42f806080c..0000000000 Binary files a/config/archr-dts/R36S-Clones-DTB/RX6S/rf351g3ka.dtb and /dev/null differ diff --git a/config/archr-dts/R36S-DTB/DTS/Panel0.dts b/config/archr-dts/R36S-DTB/DTS/Panel0.dts deleted file mode 100644 index 58cae809aa..0000000000 --- a/config/archr-dts/R36S-DTB/DTS/Panel0.dts +++ /dev/null @@ -1,4053 +0,0 @@ -/dts-v1/; - -/ { - compatible = "rockchip,rk3326-odroidgo3-linux\0rockchip,rk3326"; - interrupt-parent = <0x01>; - #address-cells = <0x02>; - #size-cells = <0x02>; - model = "Hardkernel ODROID-GO3"; - - ddr_timing { - compatible = "rockchip,ddr-timing"; - ddr2_speed_bin = <0x00>; - ddr3_speed_bin = <0x15>; - ddr4_speed_bin = <0x0c>; - pd_idle = <0x0d>; - sr_idle = <0x5d>; - sr_mc_gate_idle = <0x00>; - srpd_lite_idle = <0x00>; - standby_idle = <0x00>; - auto_pd_dis_freq = <0x42a>; - auto_sr_dis_freq = <0x320>; - ddr2_dll_dis_freq = <0x12c>; - ddr3_dll_dis_freq = <0x12c>; - ddr4_dll_dis_freq = <0x271>; - phy_dll_dis_freq = <0x190>; - ddr2_odt_dis_freq = <0x64>; - phy_ddr2_odt_dis_freq = <0x64>; - ddr2_drv = <0x01>; - ddr2_odt = <0x96>; - phy_ddr2_ca_drv = <0x15>; - phy_ddr2_ck_drv = <0x12>; - phy_ddr2_dq_drv = <0x15>; - phy_ddr2_odt = <0x02>; - ddr3_odt_dis_freq = <0x190>; - phy_ddr3_odt_dis_freq = <0x190>; - ddr3_drv = <0x28>; - ddr3_odt = <0x78>; - phy_ddr3_ca_drv = <0x15>; - phy_ddr3_ck_drv = <0x12>; - phy_ddr3_dq_drv = <0x15>; - phy_ddr3_odt = <0x02>; - phy_lpddr2_odt_dis_freq = <0x29a>; - lpddr2_drv = <0x28>; - phy_lpddr2_ca_drv = <0x16>; - phy_lpddr2_ck_drv = <0x13>; - phy_lpddr2_dq_drv = <0x16>; - phy_lpddr2_odt = <0x00>; - lpddr3_odt_dis_freq = <0x190>; - phy_lpddr3_odt_dis_freq = <0x190>; - lpddr3_drv = <0x28>; - lpddr3_odt = <0xf0>; - phy_lpddr3_ca_drv = <0x16>; - phy_lpddr3_ck_drv = <0x13>; - phy_lpddr3_dq_drv = <0x16>; - phy_lpddr3_odt = <0x02>; - lpddr4_odt_dis_freq = <0x320>; - phy_lpddr4_odt_dis_freq = <0x320>; - lpddr4_drv = <0x3c>; - lpddr4_dq_odt = <0x28>; - lpddr4_ca_odt = <0x28>; - phy_lpddr4_ca_drv = <0x14>; - phy_lpddr4_ck_cs_drv = <0x06>; - phy_lpddr4_dq_drv = <0x06>; - phy_lpddr4_odt = <0x10>; - ddr4_odt_dis_freq = <0x29a>; - phy_ddr4_odt_dis_freq = <0x29a>; - ddr4_drv = <0x22>; - ddr4_odt = <0xf0>; - phy_ddr4_ca_drv = <0x16>; - phy_ddr4_ck_drv = <0x13>; - phy_ddr4_dq_drv = <0x16>; - phy_ddr4_odt = <0x02>; - ddr3a1_ddr4a9_de-skew = <0x06>; - ddr3a0_ddr4a10_de-skew = <0x07>; - ddr3a3_ddr4a6_de-skew = <0x07>; - ddr3a2_ddr4a4_de-skew = <0x07>; - ddr3a5_ddr4a8_de-skew = <0x07>; - ddr3a4_ddr4a5_de-skew = <0x07>; - ddr3a7_ddr4a11_de-skew = <0x07>; - ddr3a6_ddr4a7_de-skew = <0x06>; - ddr3a9_ddr4a0_de-skew = <0x07>; - ddr3a8_ddr4a13_de-skew = <0x07>; - ddr3a11_ddr4a3_de-skew = <0x07>; - ddr3a10_ddr4cs0_de-skew = <0x07>; - ddr3a13_ddr4a2_de-skew = <0x07>; - ddr3a12_ddr4ba1_de-skew = <0x07>; - ddr3a15_ddr4odt0_de-skew = <0x07>; - ddr3a14_ddr4a1_de-skew = <0x07>; - ddr3ba1_ddr4a15_de-skew = <0x07>; - ddr3ba0_ddr4bg0_de-skew = <0x07>; - ddr3ras_ddr4cke_de-skew = <0x07>; - ddr3ba2_ddr4ba0_de-skew = <0x07>; - ddr3we_ddr4bg1_de-skew = <0x07>; - ddr3cas_ddr4a12_de-skew = <0x07>; - ddr3ckn_ddr4ckn_de-skew = <0x07>; - ddr3ckp_ddr4ckp_de-skew = <0x07>; - ddr3cke_ddr4a16_de-skew = <0x07>; - ddr3odt0_ddr4a14_de-skew = <0x07>; - ddr3cs0_ddr4act_de-skew = <0x06>; - ddr3reset_ddr4reset_de-skew = <0x07>; - ddr3cs1_ddr4cs1_de-skew = <0x06>; - ddr3odt1_ddr4odt1_de-skew = <0x07>; - cs0_dm0_rx_de-skew = <0x07>; - cs0_dm0_tx_de-skew = <0x07>; - cs0_dq0_rx_de-skew = <0x08>; - cs0_dq0_tx_de-skew = <0x08>; - cs0_dq1_rx_de-skew = <0x09>; - cs0_dq1_tx_de-skew = <0x08>; - cs0_dq2_rx_de-skew = <0x08>; - cs0_dq2_tx_de-skew = <0x08>; - cs0_dq3_rx_de-skew = <0x08>; - cs0_dq3_tx_de-skew = <0x08>; - cs0_dq4_rx_de-skew = <0x09>; - cs0_dq4_tx_de-skew = <0x08>; - cs0_dq5_rx_de-skew = <0x09>; - cs0_dq5_tx_de-skew = <0x08>; - cs0_dq6_rx_de-skew = <0x09>; - cs0_dq6_tx_de-skew = <0x08>; - cs0_dq7_rx_de-skew = <0x08>; - cs0_dq7_tx_de-skew = <0x08>; - cs0_dqs0_rx_de-skew = <0x06>; - cs0_dqs0p_tx_de-skew = <0x09>; - cs0_dqs0n_tx_de-skew = <0x09>; - cs0_dm1_rx_de-skew = <0x07>; - cs0_dm1_tx_de-skew = <0x06>; - cs0_dq8_rx_de-skew = <0x08>; - cs0_dq8_tx_de-skew = <0x07>; - cs0_dq9_rx_de-skew = <0x09>; - cs0_dq9_tx_de-skew = <0x07>; - cs0_dq10_rx_de-skew = <0x08>; - cs0_dq10_tx_de-skew = <0x08>; - cs0_dq11_rx_de-skew = <0x08>; - cs0_dq11_tx_de-skew = <0x07>; - cs0_dq12_rx_de-skew = <0x08>; - cs0_dq12_tx_de-skew = <0x08>; - cs0_dq13_rx_de-skew = <0x09>; - cs0_dq13_tx_de-skew = <0x07>; - cs0_dq14_rx_de-skew = <0x09>; - cs0_dq14_tx_de-skew = <0x08>; - cs0_dq15_rx_de-skew = <0x09>; - cs0_dq15_tx_de-skew = <0x07>; - cs0_dqs1_rx_de-skew = <0x07>; - cs0_dqs1p_tx_de-skew = <0x09>; - cs0_dqs1n_tx_de-skew = <0x09>; - cs0_dm2_rx_de-skew = <0x07>; - cs0_dm2_tx_de-skew = <0x07>; - cs0_dq16_rx_de-skew = <0x09>; - cs0_dq16_tx_de-skew = <0x09>; - cs0_dq17_rx_de-skew = <0x07>; - cs0_dq17_tx_de-skew = <0x09>; - cs0_dq18_rx_de-skew = <0x07>; - cs0_dq18_tx_de-skew = <0x08>; - cs0_dq19_rx_de-skew = <0x07>; - cs0_dq19_tx_de-skew = <0x09>; - cs0_dq20_rx_de-skew = <0x09>; - cs0_dq20_tx_de-skew = <0x09>; - cs0_dq21_rx_de-skew = <0x09>; - cs0_dq21_tx_de-skew = <0x09>; - cs0_dq22_rx_de-skew = <0x08>; - cs0_dq22_tx_de-skew = <0x09>; - cs0_dq23_rx_de-skew = <0x08>; - cs0_dq23_tx_de-skew = <0x09>; - cs0_dqs2_rx_de-skew = <0x06>; - cs0_dqs2p_tx_de-skew = <0x09>; - cs0_dqs2n_tx_de-skew = <0x09>; - cs0_dm3_rx_de-skew = <0x07>; - cs0_dm3_tx_de-skew = <0x07>; - cs0_dq24_rx_de-skew = <0x08>; - cs0_dq24_tx_de-skew = <0x08>; - cs0_dq25_rx_de-skew = <0x09>; - cs0_dq25_tx_de-skew = <0x09>; - cs0_dq26_rx_de-skew = <0x09>; - cs0_dq26_tx_de-skew = <0x08>; - cs0_dq27_rx_de-skew = <0x09>; - cs0_dq27_tx_de-skew = <0x08>; - cs0_dq28_rx_de-skew = <0x09>; - cs0_dq28_tx_de-skew = <0x09>; - cs0_dq29_rx_de-skew = <0x09>; - cs0_dq29_tx_de-skew = <0x09>; - cs0_dq30_rx_de-skew = <0x08>; - cs0_dq30_tx_de-skew = <0x08>; - cs0_dq31_rx_de-skew = <0x08>; - cs0_dq31_tx_de-skew = <0x08>; - cs0_dqs3_rx_de-skew = <0x07>; - cs0_dqs3p_tx_de-skew = <0x09>; - cs0_dqs3n_tx_de-skew = <0x09>; - cs1_dm0_rx_de-skew = <0x07>; - cs1_dm0_tx_de-skew = <0x07>; - cs1_dq0_rx_de-skew = <0x08>; - cs1_dq0_tx_de-skew = <0x08>; - cs1_dq1_rx_de-skew = <0x09>; - cs1_dq1_tx_de-skew = <0x08>; - cs1_dq2_rx_de-skew = <0x08>; - cs1_dq2_tx_de-skew = <0x08>; - cs1_dq3_rx_de-skew = <0x08>; - cs1_dq3_tx_de-skew = <0x08>; - cs1_dq4_rx_de-skew = <0x08>; - cs1_dq4_tx_de-skew = <0x08>; - cs1_dq5_rx_de-skew = <0x09>; - cs1_dq5_tx_de-skew = <0x08>; - cs1_dq6_rx_de-skew = <0x09>; - cs1_dq6_tx_de-skew = <0x08>; - cs1_dq7_rx_de-skew = <0x08>; - cs1_dq7_tx_de-skew = <0x08>; - cs1_dqs0_rx_de-skew = <0x06>; - cs1_dqs0p_tx_de-skew = <0x09>; - cs1_dqs0n_tx_de-skew = <0x09>; - cs1_dm1_rx_de-skew = <0x07>; - cs1_dm1_tx_de-skew = <0x07>; - cs1_dq8_rx_de-skew = <0x08>; - cs1_dq8_tx_de-skew = <0x08>; - cs1_dq9_rx_de-skew = <0x08>; - cs1_dq9_tx_de-skew = <0x07>; - cs1_dq10_rx_de-skew = <0x07>; - cs1_dq10_tx_de-skew = <0x08>; - cs1_dq11_rx_de-skew = <0x08>; - cs1_dq11_tx_de-skew = <0x08>; - cs1_dq12_rx_de-skew = <0x08>; - cs1_dq12_tx_de-skew = <0x07>; - cs1_dq13_rx_de-skew = <0x08>; - cs1_dq13_tx_de-skew = <0x08>; - cs1_dq14_rx_de-skew = <0x08>; - cs1_dq14_tx_de-skew = <0x08>; - cs1_dq15_rx_de-skew = <0x08>; - cs1_dq15_tx_de-skew = <0x07>; - cs1_dqs1_rx_de-skew = <0x07>; - cs1_dqs1p_tx_de-skew = <0x09>; - cs1_dqs1n_tx_de-skew = <0x09>; - cs1_dm2_rx_de-skew = <0x07>; - cs1_dm2_tx_de-skew = <0x08>; - cs1_dq16_rx_de-skew = <0x08>; - cs1_dq16_tx_de-skew = <0x09>; - cs1_dq17_rx_de-skew = <0x08>; - cs1_dq17_tx_de-skew = <0x09>; - cs1_dq18_rx_de-skew = <0x07>; - cs1_dq18_tx_de-skew = <0x08>; - cs1_dq19_rx_de-skew = <0x08>; - cs1_dq19_tx_de-skew = <0x09>; - cs1_dq20_rx_de-skew = <0x09>; - cs1_dq20_tx_de-skew = <0x09>; - cs1_dq21_rx_de-skew = <0x09>; - cs1_dq21_tx_de-skew = <0x09>; - cs1_dq22_rx_de-skew = <0x08>; - cs1_dq22_tx_de-skew = <0x09>; - cs1_dq23_rx_de-skew = <0x08>; - cs1_dq23_tx_de-skew = <0x09>; - cs1_dqs2_rx_de-skew = <0x06>; - cs1_dqs2p_tx_de-skew = <0x09>; - cs1_dqs2n_tx_de-skew = <0x09>; - cs1_dm3_rx_de-skew = <0x07>; - cs1_dm3_tx_de-skew = <0x07>; - cs1_dq24_rx_de-skew = <0x08>; - cs1_dq24_tx_de-skew = <0x09>; - cs1_dq25_rx_de-skew = <0x09>; - cs1_dq25_tx_de-skew = <0x09>; - cs1_dq26_rx_de-skew = <0x09>; - cs1_dq26_tx_de-skew = <0x08>; - cs1_dq27_rx_de-skew = <0x08>; - cs1_dq27_tx_de-skew = <0x08>; - cs1_dq28_rx_de-skew = <0x09>; - cs1_dq28_tx_de-skew = <0x09>; - cs1_dq29_rx_de-skew = <0x09>; - cs1_dq29_tx_de-skew = <0x09>; - cs1_dq30_rx_de-skew = <0x09>; - cs1_dq30_tx_de-skew = <0x08>; - cs1_dq31_rx_de-skew = <0x08>; - cs1_dq31_tx_de-skew = <0x08>; - cs1_dqs3_rx_de-skew = <0x07>; - cs1_dqs3p_tx_de-skew = <0x09>; - cs1_dqs3n_tx_de-skew = <0x09>; - phandle = <0xaf>; - }; - - aliases { - ethernet0 = "/ethernet@ff360000"; - i2c0 = "/i2c@ff180000"; - i2c1 = "/i2c@ff190000"; - i2c2 = "/i2c@ff1a0000"; - i2c3 = "/i2c@ff1b0000"; - serial0 = "/serial@ff030000"; - serial1 = "/serial@ff158000"; - serial2 = "/serial@ff160000"; - serial3 = "/serial@ff168000"; - serial4 = "/serial@ff170000"; - serial5 = "/serial@ff178000"; - spi0 = "/spi@ff1d0000"; - spi1 = "/spi@ff1d8000"; - }; - - cpus { - #address-cells = <0x02>; - #size-cells = <0x00>; - - cpu@0 { - device_type = "cpu"; - compatible = "arm,cortex-a35\0arm,armv8"; - reg = <0x00 0x00>; - enable-method = "psci"; - clocks = <0x02 0x07>; - #cooling-cells = <0x02>; - dynamic-power-coefficient = <0x5a>; - operating-points-v2 = <0x03>; - cpu-idle-states = <0x04 0x05>; - cpu-supply = <0x06>; - phandle = <0x09>; - }; - - cpu@1 { - device_type = "cpu"; - compatible = "arm,cortex-a35\0arm,armv8"; - reg = <0x00 0x01>; - enable-method = "psci"; - operating-points-v2 = <0x03>; - cpu-idle-states = <0x04 0x05>; - phandle = <0x0a>; - }; - - cpu@2 { - device_type = "cpu"; - compatible = "arm,cortex-a35\0arm,armv8"; - reg = <0x00 0x02>; - enable-method = "psci"; - operating-points-v2 = <0x03>; - cpu-idle-states = <0x04 0x05>; - phandle = <0x0b>; - }; - - cpu@3 { - device_type = "cpu"; - compatible = "arm,cortex-a35\0arm,armv8"; - reg = <0x00 0x03>; - enable-method = "psci"; - operating-points-v2 = <0x03>; - cpu-idle-states = <0x04 0x05>; - phandle = <0x0c>; - }; - - idle-states { - entry-method = "psci"; - - cpu-sleep { - compatible = "arm,idle-state"; - local-timer-stop; - arm,psci-suspend-param = <0x10000>; - entry-latency-us = <0x78>; - exit-latency-us = <0xfa>; - min-residency-us = <0x384>; - phandle = <0x04>; - }; - - cluster-sleep { - compatible = "arm,idle-state"; - local-timer-stop; - arm,psci-suspend-param = <0x1010000>; - entry-latency-us = <0x190>; - exit-latency-us = <0x1f4>; - min-residency-us = <0x7d0>; - phandle = <0x05>; - }; - }; - }; - - cpu0-opp-table { - compatible = "operating-points-v2"; - opp-shared; - rockchip,temp-hysteresis = <0x1388>; - rockchip,low-temp = <0x00>; - rockchip,low-temp-min-volt = <0xf4240>; - rockchip,low-temp-adjust-volt = <0x00 0x5e8 0xc350>; - clocks = <0x02 0x01>; - rockchip,avs-scale = <0x04>; - rockchip,max-volt = <0x149970>; - rockchip,evb-irdrop = <0x61a8>; - nvmem-cells = <0x07 0x08>; - nvmem-cell-names = "cpu_leakage\0performance"; - rockchip,bin-scaling-sel = <0x00 0x0d 0x01 0x0d>; - rockchip,pvtm-voltage-sel = <0x00 0xc350 0x00 0xc351 0xd2f0 0x01 0xd2f1 0xea60 0x02 0xea61 0x1869f 0x03>; - rockchip,pvtm-freq = <0x639c0>; - rockchip,pvtm-volt = <0xf4240>; - rockchip,pvtm-ch = <0x00 0x00>; - rockchip,pvtm-sample-time = <0x3e8>; - rockchip,pvtm-number = <0x0a>; - rockchip,pvtm-error = <0x3e8>; - rockchip,pvtm-ref-temp = <0x28>; - rockchip,pvtm-temp-prop = <0xffffffc8 0xffffffc8>; - rockchip,thermal-zone = "soc-thermal"; - rockchip,avs = <0x01>; - phandle = <0x03>; - - opp-1008000000 { - opp-hz = <0x00 0x3c14dc00>; - opp-microvolt = <0x11edd8 0x11edd8 0x149970>; - opp-microvolt-L0 = <0x11edd8 0x11edd8 0x149970>; - opp-microvolt-L1 = <0x112a88 0x112a88 0x149970>; - opp-microvolt-L2 = <0x112a88 0x112a88 0x149970>; - opp-microvolt-L3 = <0x100590 0x100590 0x149970>; - clock-latency-ns = <0x9c40>; - }; - - opp-1200000000 { - opp-hz = <0x00 0x47868c00>; - opp-microvolt = <0x13d620 0x13d620 0x149970>; - opp-microvolt-L0 = <0x13d620 0x13d620 0x149970>; - opp-microvolt-L1 = <0x137478 0x137478 0x149970>; - opp-microvolt-L2 = <0x1312d0 0x1312d0 0x149970>; - opp-microvolt-L3 = <0x124f80 0x124f80 0x149970>; - clock-latency-ns = <0x9c40>; - }; - - opp-1248000000 { - opp-hz = <0x00 0x4a62f800>; - opp-microvolt = <0x149970 0x149970 0x149970>; - opp-microvolt-L0 = <0x149970 0x149970 0x149970>; - opp-microvolt-L1 = <0x13d620 0x13d620 0x149970>; - opp-microvolt-L2 = <0x137478 0x137478 0x149970>; - opp-microvolt-L3 = <0x12b128 0x12b128 0x149970>; - clock-latency-ns = <0x9c40>; - }; - - opp-1296000000 { - opp-hz = <0x00 0x4d3f6400>; - opp-microvolt = <0x149970 0x149970 0x149970>; - opp-microvolt-L0 = <0x149970 0x149970 0x149970>; - opp-microvolt-L1 = <0x149970 0x149970 0x149970>; - opp-microvolt-L2 = <0x13d620 0x13d620 0x149970>; - opp-microvolt-L3 = <0x1312d0 0x1312d0 0x149970>; - clock-latency-ns = <0x9c40>; - }; - }; - - arm-pmu { - compatible = "arm,cortex-a53-pmu"; - interrupts = <0x00 0x64 0x04 0x00 0x65 0x04 0x00 0x66 0x04 0x00 0x67 0x04>; - interrupt-affinity = <0x09 0x0a 0x0b 0x0c>; - }; - - bus-soc { - compatible = "rockchip,px30-bus"; - rockchip,busfreq-policy = "autocs"; - phandle = <0xc4>; - - soc-bus0 { - bus-id = <0x00>; - timer-us = <0x14>; - enable-msk = <0x40f7>; - status = "disabled"; - }; - - soc-bus1 { - bus-id = <0x01>; - timer-us = <0xc8>; - enable-msk = <0x40bf>; - status = "disabled"; - }; - - soc-bus2 { - bus-id = <0x02>; - timer-us = <0xc8>; - enable-msk = <0x4007>; - status = "disabled"; - }; - }; - - bus-apll { - compatible = "rockchip,px30-bus"; - rockchip,busfreq-policy = "clkfreq"; - clocks = <0x02 0x01>; - clock-names = "bus"; - operating-points-v2 = <0x0d>; - status = "okay"; - bus-supply = <0x0e>; - phandle = <0xc5>; - }; - - bus-apll-opp-table { - compatible = "operating-points-v2"; - opp-shared; - phandle = <0x0d>; - - opp-1512000000 { - opp-hz = <0x00 0x5a1f4a00>; - opp-microvolt = <0xf4240>; - }; - - opp-1008000000 { - opp-hz = <0x00 0x3c14dc00>; - opp-microvolt = <0xe7ef0>; - }; - }; - - cpuinfo { - compatible = "rockchip,cpuinfo"; - nvmem-cells = <0x0f>; - nvmem-cell-names = "id"; - }; - - display-subsystem { - compatible = "rockchip,display-subsystem"; - ports = <0x10>; - status = "okay"; - logo-memory-region = <0x11>; - phandle = <0xc6>; - - route { - - route-lvds { - status = "disabled"; - logo,uboot = "logo.bmp"; - logo,kernel = "logo_kernel.bmp"; - logo,mode = "center"; - charge_logo,mode = "center"; - connect = <0x12>; - phandle = <0xc7>; - }; - - route-dsi { - status = "okay"; - logo,uboot = "logo.bmp"; - logo,kernel = "logo_kernel.bmp"; - logo,mode = "center"; - charge_logo,mode = "center"; - connect = <0x13>; - phandle = <0xc8>; - }; - - route-rgb { - status = "disabled"; - logo,uboot = "logo.bmp"; - logo,kernel = "logo_kernel.bmp"; - logo,mode = "center"; - charge_logo,mode = "center"; - connect = <0x14>; - phandle = <0xc9>; - }; - }; - }; - - firmware { - - optee { - compatible = "linaro,optee-tz"; - method = "smc"; - }; - }; - - external-gmac-clock { - compatible = "fixed-clock"; - clock-frequency = <0x2faf080>; - clock-output-names = "gmac_clkin"; - #clock-cells = <0x00>; - phandle = <0xca>; - }; - - psci { - compatible = "arm,psci-1.0"; - method = "smc"; - }; - - rockchip-suspend { - compatible = "rockchip,pm-px30"; - status = "okay"; - rockchip,sleep-debug-en = <0x01>; - rockchip,sleep-mode-config = <0x20702>; - rockchip,wakeup-config = <0x85>; - phandle = <0xcb>; - }; - - timer { - compatible = "arm,armv8-timer"; - interrupts = <0x01 0x0d 0xf04 0x01 0x0e 0xf04 0x01 0x0b 0xf04 0x01 0x0a 0xf04>; - }; - - xin24m { - compatible = "fixed-clock"; - #clock-cells = <0x00>; - clock-frequency = <0x16e3600>; - clock-output-names = "xin24m"; - phandle = <0xcc>; - }; - - xin32k { - compatible = "fixed-clock"; - #clock-cells = <0x00>; - clock-frequency = <0x8000>; - clock-output-names = "xin32k"; - phandle = <0xcd>; - }; - - power-management@ff000000 { - compatible = "rockchip,px30-pmu\0syscon\0simple-mfd"; - reg = <0x00 0xff000000 0x00 0x1000>; - phandle = <0xce>; - - power-controller { - compatible = "rockchip,px30-power-controller"; - #power-domain-cells = <0x01>; - #address-cells = <0x01>; - #size-cells = <0x00>; - phandle = <0x8a>; - - pd_usb@5 { - reg = <0x05>; - clocks = <0x02 0x103 0x02 0x102 0x02 0x3c>; - pm_qos = <0x15 0x16>; - }; - - pd_sdcard@7 { - reg = <0x07>; - clocks = <0x02 0xf7 0x02 0x3b>; - pm_qos = <0x17>; - }; - - pd_gmac@9 { - reg = <0x09>; - clocks = <0x02 0xb2 0x02 0x143 0x02 0x40 0x02 0x3f>; - pm_qos = <0x18>; - }; - - pd_mmc_nand@10 { - reg = <0x0a>; - clocks = <0x02 0xfe 0x02 0x100 0x02 0xff 0x02 0x101 0x02 0x39 0x02 0x37 0x02 0x38 0x02 0x3a>; - pm_qos = <0x19 0x1a 0x1b 0x1c>; - }; - - pd_vpu@11 { - reg = <0x0b>; - clocks = <0x02 0xaf 0x02 0xf4 0x02 0x4b>; - pm_qos = <0x1d 0x1e>; - }; - - pd_vo@12 { - reg = <0x0c>; - clocks = <0x02 0xb7 0x02 0xb5 0x02 0xb6 0x02 0x96 0x02 0x97 0x02 0xfd 0x02 0xfb 0x02 0xfc 0x02 0x144 0x02 0x35 0x02 0x36>; - pm_qos = <0x1f 0x20 0x21 0x22>; - }; - - pd_vi@13 { - reg = <0x0d>; - clocks = <0x02 0xb3 0x02 0xb4 0x02 0xf9 0x02 0xfa 0x02 0x33>; - pm_qos = <0x23 0x24 0x25 0x26 0x27>; - }; - - pd_gpu@14 { - reg = <0x0e>; - clocks = <0x02 0x49>; - pm_qos = <0x28>; - }; - }; - }; - - syscon@ff010000 { - compatible = "rockchip,px30-pmugrf\0syscon\0simple-mfd"; - reg = <0x00 0xff010000 0x00 0x1000>; - #address-cells = <0x01>; - #size-cells = <0x01>; - phandle = <0xac>; - - io-domains { - compatible = "rockchip,px30-pmu-io-voltage-domain"; - status = "okay"; - pmuio1-supply = <0x29>; - pmuio2-supply = <0x29>; - phandle = <0xcf>; - }; - - reboot-mode { - compatible = "syscon-reboot-mode"; - offset = <0x200>; - mode-bootloader = <0x5242c301>; - mode-charge = <0x5242c30b>; - mode-fastboot = <0x5242c309>; - mode-loader = <0x5242c301>; - mode-normal = <0x5242c300>; - mode-recovery = <0x5242c303>; - mode-ums = <0x5242c30c>; - }; - - pmu-pvtm { - compatible = "rockchip,px30-pmu-pvtm"; - clocks = <0x2a 0x07>; - clock-names = "pmu"; - status = "okay"; - phandle = <0xd0>; - }; - }; - - serial@ff030000 { - compatible = "rockchip,px30-uart\0snps,dw-apb-uart"; - reg = <0x00 0xff030000 0x00 0x100>; - interrupts = <0x00 0x0f 0x04>; - clocks = <0x2a 0x06 0x2a 0x15>; - clock-names = "baudclk\0apb_pclk"; - reg-shift = <0x02>; - reg-io-width = <0x04>; - dmas = <0x2b 0x00 0x2b 0x01>; - pinctrl-names = "default"; - pinctrl-0 = <0x2c 0x2d 0x2e>; - status = "disabled"; - phandle = <0xd1>; - }; - - i2s@ff060000 { - compatible = "rockchip,px30-i2s-tdm"; - reg = <0x00 0xff060000 0x00 0x1000>; - interrupts = <0x00 0x0c 0x04>; - clocks = <0x02 0x10 0x02 0x12 0x02 0x106>; - clock-names = "mclk_tx\0mclk_rx\0hclk"; - dmas = <0x2b 0x10 0x2b 0x11>; - dma-names = "tx\0rx"; - resets = <0x02 0x84 0x02 0xbf>; - reset-names = "tx-m\0rx-m"; - rockchip,cru = <0x02>; - rockchip,grf = <0x2f>; - pinctrl-names = "default"; - pinctrl-0 = <0x30 0x31 0x32 0x33 0x34 0x35 0x36 0x37 0x38 0x39 0x3a 0x3b>; - status = "disabled"; - phandle = <0xd2>; - }; - - i2s@ff070000 { - compatible = "rockchip,px30-i2s\0rockchip,rk3066-i2s"; - reg = <0x00 0xff070000 0x00 0x1000>; - interrupts = <0x00 0x0d 0x04>; - clocks = <0x02 0x14 0x02 0x107>; - clock-names = "i2s_clk\0i2s_hclk"; - dmas = <0x2b 0x12 0x2b 0x13>; - dma-names = "tx\0rx"; - resets = <0x02 0x86 0x02 0x85>; - reset-names = "reset-m\0reset-h"; - pinctrl-names = "default"; - pinctrl-0 = <0x3c 0x3d 0x3e 0x3f>; - status = "okay"; - #sound-dai-cells = <0x00>; - phandle = <0xc2>; - }; - - i2s@ff080000 { - compatible = "rockchip,px30-i2s\0rockchip,rk3066-i2s"; - reg = <0x00 0xff080000 0x00 0x1000>; - interrupts = <0x00 0x0e 0x04>; - clocks = <0x02 0x16 0x02 0x108>; - clock-names = "i2s_clk\0i2s_hclk"; - dmas = <0x2b 0x14 0x2b 0x15>; - dma-names = "tx\0rx"; - resets = <0x02 0x88 0x02 0x87>; - reset-names = "reset-m\0reset-h"; - pinctrl-names = "default"; - pinctrl-0 = <0x40 0x41 0x42 0x43>; - status = "disabled"; - phandle = <0xd3>; - }; - - pdm@ff0a0000 { - compatible = "rockchip,px30-pdm\0rockchip,pdm"; - reg = <0x00 0xff0a0000 0x00 0x1000>; - clocks = <0x02 0x0f 0x02 0x105>; - clock-names = "pdm_clk\0pdm_hclk"; - dmas = <0x2b 0x18>; - dma-names = "rx"; - resets = <0x02 0x82>; - reset-names = "pdm-m"; - pinctrl-names = "default"; - pinctrl-0 = <0x44 0x45 0x46 0x47 0x48 0x49>; - status = "disabled"; - phandle = <0xd4>; - }; - - crypto@ff0b0000 { - compatible = "rockchip,px30-crypto"; - reg = <0x00 0xff0b0000 0x00 0x4000>; - interrupts = <0x00 0x52 0x04>; - clocks = <0x02 0xac 0x02 0xf1 0x02 0x30 0x02 0x31>; - clock-names = "aclk\0hclk\0sclk\0apb_pclk"; - resets = <0x02 0x74>; - reset-names = "crypto-rst"; - status = "disabled"; - phandle = <0xd5>; - }; - - rng@ff0b0000 { - compatible = "rockchip,cryptov2-rng"; - reg = <0x00 0xff0b0000 0x00 0x4000>; - clocks = <0x02 0x30 0x02 0x31 0x02 0xac 0x02 0xf1>; - clock-names = "clk_crypto\0clk_crypto_apk\0aclk_crypto\0hclk_crypto"; - assigned-clocks = <0x02 0x30 0x02 0x31 0x02 0xac 0x02 0xf1>; - assigned-clock-rates = <0x8f0d180 0x8f0d180 0xbebc200 0x5f5e100>; - resets = <0x02 0x74>; - reset-names = "reset"; - status = "okay"; - phandle = <0xd6>; - }; - - interrupt-controller@ff131000 { - compatible = "arm,gic-400"; - #interrupt-cells = <0x03>; - #address-cells = <0x00>; - interrupt-controller; - reg = <0x00 0xff131000 0x00 0x1000 0x00 0xff132000 0x00 0x2000 0x00 0xff134000 0x00 0x2000 0x00 0xff136000 0x00 0x2000>; - interrupts = <0x01 0x09 0xf04>; - phandle = <0x01>; - }; - - syscon@ff140000 { - compatible = "rockchip,px30-grf\0syscon\0simple-mfd"; - reg = <0x00 0xff140000 0x00 0x1000>; - #address-cells = <0x01>; - #size-cells = <0x01>; - phandle = <0x2f>; - - io-domains { - compatible = "rockchip,px30-io-voltage-domain"; - status = "okay"; - vccio1-supply = <0x4a>; - vccio2-supply = <0x4a>; - vccio3-supply = <0x4b>; - vccio4-supply = <0x4b>; - vccio5-supply = <0x4b>; - vccio6-supply = <0x4b>; - phandle = <0xd7>; - }; - - lvds { - compatible = "rockchip,px30-lvds"; - phys = <0x4c>; - phy-names = "phy"; - status = "disabled"; - phandle = <0xd8>; - - ports { - #address-cells = <0x01>; - #size-cells = <0x00>; - - port@0 { - reg = <0x00>; - #address-cells = <0x01>; - #size-cells = <0x00>; - - endpoint@0 { - reg = <0x00>; - remote-endpoint = <0x12>; - phandle = <0xa2>; - }; - }; - }; - }; - - rgb { - compatible = "rockchip,px30-rgb"; - pinctrl-names = "default\0sleep"; - pinctrl-0 = <0x4d>; - pinctrl-1 = <0x4e>; - status = "disabled"; - phys = <0x4c>; - phy-names = "phy"; - phandle = <0xd9>; - - ports { - #address-cells = <0x01>; - #size-cells = <0x00>; - - port@0 { - reg = <0x00>; - #address-cells = <0x01>; - #size-cells = <0x00>; - - endpoint@0 { - reg = <0x00>; - remote-endpoint = <0x14>; - phandle = <0xa4>; - }; - }; - }; - }; - }; - - syscon@ff148000 { - compatible = "syscon\0simple-mfd"; - reg = <0x00 0xff148000 0x00 0x1000>; - #address-cells = <0x01>; - #size-cells = <0x01>; - phandle = <0xda>; - - pvtm { - compatible = "rockchip,px30-pvtm"; - clocks = <0x02 0x4a>; - clock-names = "core"; - status = "okay"; - phandle = <0xdb>; - }; - }; - - serial@ff158000 { - compatible = "rockchip,px30-uart\0snps,dw-apb-uart"; - reg = <0x00 0xff158000 0x00 0x100>; - interrupts = <0x00 0x10 0x04>; - clocks = <0x02 0x18 0x02 0x149>; - clock-names = "baudclk\0apb_pclk"; - reg-shift = <0x02>; - reg-io-width = <0x04>; - dmas = <0x2b 0x02 0x2b 0x03>; - pinctrl-names = "default"; - pinctrl-0 = <0x4f 0x50>; - status = "okay"; - phandle = <0xdc>; - }; - - serial@ff160000 { - compatible = "rockchip,px30-uart\0snps,dw-apb-uart"; - reg = <0x00 0xff160000 0x00 0x100>; - interrupts = <0x00 0x11 0x04>; - clocks = <0x02 0x19 0x02 0x14a>; - clock-names = "baudclk\0apb_pclk"; - reg-shift = <0x02>; - reg-io-width = <0x04>; - dmas = <0x2b 0x04 0x2b 0x05>; - pinctrl-names = "default"; - pinctrl-0 = <0x51>; - status = "disabled"; - phandle = <0xdd>; - }; - - serial@ff168000 { - compatible = "rockchip,px30-uart\0snps,dw-apb-uart"; - reg = <0x00 0xff168000 0x00 0x100>; - interrupts = <0x00 0x12 0x04>; - clocks = <0x02 0x1a 0x02 0x14b>; - clock-names = "baudclk\0apb_pclk"; - reg-shift = <0x02>; - reg-io-width = <0x04>; - dmas = <0x2b 0x06 0x2b 0x07>; - pinctrl-names = "default"; - pinctrl-0 = <0x52 0x53 0x54>; - status = "disabled"; - phandle = <0xde>; - }; - - serial@ff170000 { - compatible = "rockchip,px30-uart\0snps,dw-apb-uart"; - reg = <0x00 0xff170000 0x00 0x100>; - interrupts = <0x00 0x13 0x04>; - clocks = <0x02 0x1b 0x02 0x14c>; - clock-names = "baudclk\0apb_pclk"; - reg-shift = <0x02>; - reg-io-width = <0x04>; - dmas = <0x2b 0x08 0x2b 0x09>; - pinctrl-names = "default"; - pinctrl-0 = <0x55 0x56 0x57>; - status = "disabled"; - phandle = <0xdf>; - }; - - serial@ff178000 { - compatible = "rockchip,px30-uart\0snps,dw-apb-uart"; - reg = <0x00 0xff178000 0x00 0x100>; - interrupts = <0x00 0x14 0x04>; - clocks = <0x02 0x1c 0x02 0x14d>; - clock-names = "baudclk\0apb_pclk"; - reg-shift = <0x02>; - reg-io-width = <0x04>; - dmas = <0x2b 0x0a 0x2b 0x0b>; - pinctrl-names = "default"; - pinctrl-0 = <0x58 0x59 0x5a>; - status = "disabled"; - phandle = <0xe0>; - }; - - i2c@ff180000 { - compatible = "rockchip,rk3399-i2c"; - reg = <0x00 0xff180000 0x00 0x1000>; - clocks = <0x02 0x1d 0x02 0x14e>; - clock-names = "i2c\0pclk"; - interrupts = <0x00 0x07 0x04>; - pinctrl-names = "default"; - pinctrl-0 = <0x5b>; - #address-cells = <0x01>; - #size-cells = <0x00>; - status = "okay"; - clock-frequency = <0x61a80>; - i2c-scl-rising-time-ns = <0x118>; - i2c-scl-falling-time-ns = <0x10>; - phandle = <0xe1>; - - pmic@20 { - compatible = "rockchip,rk817"; - reg = <0x20>; - interrupt-parent = <0x5c>; - interrupts = <0x0a 0x08>; - pinctrl-names = "default\0pmic-sleep\0pmic-power-off\0pmic-reset"; - pinctrl-0 = <0x5d>; - pinctrl-1 = <0x5e 0x5f>; - pinctrl-2 = <0x60 0x61>; - pinctrl-3 = <0x62 0x63>; - rockchip,system-power-controller; - wakeup-source; - #clock-cells = <0x01>; - clock-output-names = "rk808-clkout1\0rk808-clkout2"; - pmic-reset-func = <0x01>; - vcc1-supply = <0x64>; - vcc2-supply = <0x64>; - vcc3-supply = <0x64>; - vcc4-supply = <0x64>; - vcc5-supply = <0x64>; - vcc6-supply = <0x64>; - vcc7-supply = <0x64>; - vcc8-supply = <0x64>; - vcc9-supply = <0x65>; - phandle = <0xe2>; - - pwrkey { - status = "okay"; - }; - - pinctrl_rk8xx { - gpio-controller; - #gpio-cells = <0x02>; - phandle = <0xe3>; - - rk817_ts_gpio1 { - pins = "gpio_ts"; - function = "pin_fun1"; - phandle = <0xe4>; - }; - - rk817_gt_gpio2 { - pins = "gpio_gt"; - function = "pin_fun1"; - phandle = <0xe5>; - }; - - rk817_pin_ts { - pins = "gpio_ts"; - function = "pin_fun0"; - phandle = <0xe6>; - }; - - rk817_pin_gt { - pins = "gpio_gt"; - function = "pin_fun0"; - phandle = <0xe7>; - }; - - rk817_slppin_null { - pins = "gpio_slp"; - function = "pin_fun0"; - phandle = <0xe8>; - }; - - rk817_slppin_slp { - pins = "gpio_slp"; - function = "pin_fun1"; - phandle = <0x5f>; - }; - - rk817_slppin_pwrdn { - pins = "gpio_slp"; - function = "pin_fun2"; - phandle = <0x61>; - }; - - rk817_slppin_rst { - pins = "gpio_slp"; - function = "pin_fun3"; - phandle = <0x63>; - }; - }; - - regulators { - - DCDC_REG1 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0xe7ef0>; - regulator-max-microvolt = <0x118c30>; - regulator-ramp-delay = <0x1771>; - regulator-initial-mode = <0x02>; - regulator-name = "vdd_logic"; - phandle = <0x0e>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <0xe7ef0>; - }; - }; - - DCDC_REG2 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0xe7ef0>; - regulator-max-microvolt = <0x149970>; - regulator-ramp-delay = <0x1771>; - regulator-initial-mode = <0x02>; - regulator-name = "vdd_arm"; - phandle = <0x06>; - - regulator-state-mem { - regulator-off-in-suspend; - regulator-suspend-microvolt = <0xe7ef0>; - }; - }; - - DCDC_REG3 { - regulator-always-on; - regulator-boot-on; - regulator-initial-mode = <0x02>; - regulator-name = "vcc_ddr"; - phandle = <0xe9>; - - regulator-state-mem { - regulator-on-in-suspend; - }; - }; - - DCDC_REG4 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0x325aa0>; - regulator-max-microvolt = <0x325aa0>; - regulator-initial-mode = <0x02>; - regulator-name = "vcc_3v3"; - phandle = <0x4b>; - - regulator-state-mem { - regulator-off-in-suspend; - regulator-suspend-microvolt = <0x325aa0>; - }; - }; - - LDO_REG1 { - regulator-min-microvolt = <0xf4240>; - regulator-max-microvolt = <0xf4240>; - regulator-name = "vcc_1v0"; - phandle = <0xea>; - - regulator-state-mem { - regulator-off-in-suspend; - regulator-suspend-microvolt = <0xf4240>; - }; - }; - - LDO_REG2 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0x1b7740>; - regulator-max-microvolt = <0x1b7740>; - regulator-name = "vcc1v8_soc"; - phandle = <0x88>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <0x1b7740>; - }; - }; - - LDO_REG3 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0xf4240>; - regulator-max-microvolt = <0xf4240>; - regulator-name = "vcc1v0_soc"; - phandle = <0xeb>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <0xf4240>; - }; - }; - - LDO_REG4 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0x325aa0>; - regulator-max-microvolt = <0x325aa0>; - regulator-name = "vcc3v3_pmu"; - phandle = <0x29>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <0x325aa0>; - }; - }; - - LDO_REG5 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0x1b7740>; - regulator-max-microvolt = <0x1b7740>; - regulator-name = "vccio_sd"; - phandle = <0x4a>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <0x1b7740>; - }; - }; - - LDO_REG6 { - regulator-min-microvolt = <0x1b7740>; - regulator-max-microvolt = <0x2dc6c0>; - regulator-boot-on; - regulator-name = "vcc_sd"; - phandle = <0x93>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <0x2dc6c0>; - }; - }; - - LDO_REG7 { - regulator-min-microvolt = <0x325aa0>; - regulator-max-microvolt = <0x325aa0>; - regulator-name = "vcc_backlight"; - phandle = <0x9e>; - - regulator-state-mem { - regulator-off-in-suspend; - regulator-suspend-microvolt = <0x325aa0>; - }; - }; - - LDO_REG8 { - regulator-min-microvolt = <0x2ab980>; - regulator-max-microvolt = <0x2ab980>; - regulator-name = "vcc_lcd"; - phandle = <0x9f>; - - regulator-state-mem { - regulator-off-in-suspend; - regulator-suspend-microvolt = <0x2ab980>; - }; - }; - - BOOST { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0x4c4b40>; - regulator-max-microvolt = <0x5265c0>; - regulator-name = "boost"; - phandle = <0x65>; - }; - - OTG_SWITCH { - regulator-boot-on; - regulator-name = "otg_switch"; - phandle = <0xec>; - }; - }; - - battery { - compatible = "rk817,battery"; - ocv_table = <0xc5d 0xc94 0xcd0 0xd02 0xd34 0xd66 0xd98 0xdca 0xdfc 0xe2e 0xe56 0xe7e 0xea6 0xece 0xef6 0xf1e 0xf46 0xf6e 0xf96 0xf9b 0xfa0>; - design_capacity = <0xd34>; - design_qmax = <0xe86>; - bat_res = <0x64>; - sleep_enter_current = <0x12c>; - sleep_exit_current = <0x12c>; - sleep_filter_current = <0x64>; - power_off_thresd = <0xbb8>; - zero_algorithm_vol = <0xf0a>; - max_soc_offset = <0x3c>; - monitor_sec = <0x05>; - virtual_power = <0x00>; - sample_res = <0x0a>; - }; - - charger { - compatible = "rk817,charger"; - min_input_voltage = <0x1194>; - max_input_current = <0x5dc>; - max_chrg_current = <0x7d0>; - max_chrg_voltage = <0x1068>; - chrg_term_mode = <0x00>; - chrg_finish_cur = <0x34>; - virtual_power = <0x00>; - sample_res = <0x0a>; - dc_det_gpio = <0x5c 0x0b 0x00>; - bat_low_gpio = <0x66 0x0d 0x00>; - extcon = <0x67>; - }; - - codec { - #sound-dai-cells = <0x00>; - compatible = "rockchip,rk817-codec"; - clocks = <0x02 0x15>; - clock-names = "mclk"; - pinctrl-names = "default"; - pinctrl-0 = <0x68>; - hp-volume = <0x14>; - spk-volume = <0x03>; - status = "okay"; - phandle = <0xc3>; - }; - }; - }; - - i2c@ff190000 { - compatible = "rockchip,rk3399-i2c"; - reg = <0x00 0xff190000 0x00 0x1000>; - clocks = <0x02 0x1e 0x02 0x14f>; - clock-names = "i2c\0pclk"; - interrupts = <0x00 0x08 0x04>; - pinctrl-names = "default"; - pinctrl-0 = <0x69>; - #address-cells = <0x01>; - #size-cells = <0x00>; - status = "okay"; - clock-frequency = <0x61a80>; - phandle = <0xed>; - }; - - i2c@ff1a0000 { - compatible = "rockchip,rk3399-i2c"; - reg = <0x00 0xff1a0000 0x00 0x1000>; - clocks = <0x02 0x1f 0x02 0x150>; - clock-names = "i2c\0pclk"; - interrupts = <0x00 0x09 0x04>; - pinctrl-names = "default"; - pinctrl-0 = <0x6a>; - #address-cells = <0x01>; - #size-cells = <0x00>; - status = "disabled"; - phandle = <0xee>; - }; - - i2c@ff1b0000 { - compatible = "rockchip,rk3399-i2c"; - reg = <0x00 0xff1b0000 0x00 0x1000>; - clocks = <0x02 0x20 0x02 0x151>; - clock-names = "i2c\0pclk"; - interrupts = <0x00 0x0a 0x04>; - pinctrl-names = "default"; - pinctrl-0 = <0x6b>; - #address-cells = <0x01>; - #size-cells = <0x00>; - status = "disabled"; - phandle = <0xef>; - }; - - spi@ff1d0000 { - compatible = "rockchip,px30-spi\0rockchip,rk3066-spi"; - reg = <0x00 0xff1d0000 0x00 0x1000>; - interrupts = <0x00 0x1a 0x04>; - #address-cells = <0x01>; - #size-cells = <0x00>; - clocks = <0x02 0x24 0x02 0x155>; - clock-names = "spiclk\0apb_pclk"; - dmas = <0x2b 0x0c 0x2b 0x0d>; - dma-names = "tx\0rx"; - pinctrl-names = "default\0high_speed"; - pinctrl-0 = <0x6c 0x6d 0x6e 0x6f>; - pinctrl-1 = <0x70 0x6d 0x71 0x72>; - status = "disabled"; - phandle = <0xf0>; - }; - - spi@ff1d8000 { - compatible = "rockchip,px30-spi\0rockchip,rk3066-spi"; - reg = <0x00 0xff1d8000 0x00 0x1000>; - interrupts = <0x00 0x1b 0x04>; - #address-cells = <0x01>; - #size-cells = <0x00>; - clocks = <0x02 0x25 0x02 0x156>; - clock-names = "spiclk\0apb_pclk"; - dmas = <0x2b 0x0e 0x2b 0x0f>; - dma-names = "tx\0rx"; - pinctrl-names = "default\0high_speed"; - pinctrl-0 = <0x73 0x74 0x75 0x76 0x77>; - pinctrl-1 = <0x78 0x74 0x75 0x79 0x7a>; - status = "disabled"; - phandle = <0xf1>; - }; - - watchdog@ff1e0000 { - compatible = "snps,dw-wdt"; - reg = <0x00 0xff1e0000 0x00 0x100>; - clocks = <0x02 0x15b>; - interrupts = <0x00 0x25 0x04>; - resets = <0x02 0xb5>; - reset-names = "reset"; - status = "disabled"; - phandle = <0xf2>; - }; - - pwm@ff200000 { - compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm"; - reg = <0x00 0xff200000 0x00 0x10>; - #pwm-cells = <0x03>; - pinctrl-names = "active"; - pinctrl-0 = <0x7b>; - clocks = <0x02 0x22 0x02 0x153>; - clock-names = "pwm\0pclk"; - status = "okay"; - phandle = <0xbc>; - }; - - pwm@ff200010 { - compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm"; - reg = <0x00 0xff200010 0x00 0x10>; - #pwm-cells = <0x03>; - pinctrl-names = "active"; - pinctrl-0 = <0x7c>; - clocks = <0x02 0x22 0x02 0x153>; - clock-names = "pwm\0pclk"; - status = "okay"; - phandle = <0xc1>; - }; - - pwm@ff200020 { - compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm"; - reg = <0x00 0xff200020 0x00 0x10>; - #pwm-cells = <0x03>; - pinctrl-names = "active"; - pinctrl-0 = <0x7d>; - clocks = <0x02 0x22 0x02 0x153>; - clock-names = "pwm\0pclk"; - status = "disabled"; - phandle = <0xf3>; - }; - - pwm@ff200030 { - compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm"; - reg = <0x00 0xff200030 0x00 0x10>; - #pwm-cells = <0x03>; - pinctrl-names = "active"; - pinctrl-0 = <0x7e>; - clocks = <0x02 0x22 0x02 0x153>; - clock-names = "pwm\0pclk"; - status = "disabled"; - phandle = <0xf4>; - }; - - pwm@ff208000 { - compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm"; - reg = <0x00 0xff208000 0x00 0x10>; - #pwm-cells = <0x03>; - pinctrl-names = "active"; - pinctrl-0 = <0x7f>; - clocks = <0x02 0x23 0x02 0x154>; - clock-names = "pwm\0pclk"; - status = "disabled"; - phandle = <0xf5>; - }; - - pwm@ff208010 { - compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm"; - reg = <0x00 0xff208010 0x00 0x10>; - #pwm-cells = <0x03>; - pinctrl-names = "active"; - pinctrl-0 = <0x80>; - clocks = <0x02 0x23 0x02 0x154>; - clock-names = "pwm\0pclk"; - status = "disabled"; - phandle = <0xf6>; - }; - - pwm@ff208020 { - compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm"; - reg = <0x00 0xff208020 0x00 0x10>; - #pwm-cells = <0x03>; - pinctrl-names = "active"; - pinctrl-0 = <0x81>; - clocks = <0x02 0x23 0x02 0x154>; - clock-names = "pwm\0pclk"; - status = "disabled"; - phandle = <0xf7>; - }; - - pwm@ff208030 { - compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm"; - reg = <0x00 0xff208030 0x00 0x10>; - #pwm-cells = <0x03>; - pinctrl-names = "active"; - pinctrl-0 = <0x82>; - clocks = <0x02 0x23 0x02 0x154>; - clock-names = "pwm\0pclk"; - status = "disabled"; - phandle = <0xf8>; - }; - - rktimer@ff210000 { - compatible = "rockchip,rk3288-timer"; - reg = <0x00 0xff210000 0x00 0x1000>; - interrupts = <0x00 0x1e 0x04>; - clocks = <0x02 0x159 0x02 0x26>; - clock-names = "pclk\0timer"; - phandle = <0xf9>; - }; - - amba { - compatible = "simple-bus"; - #address-cells = <0x02>; - #size-cells = <0x02>; - ranges; - - dmac@ff240000 { - compatible = "arm,pl330\0arm,primecell"; - reg = <0x00 0xff240000 0x00 0x4000>; - interrupts = <0x00 0x01 0x04 0x00 0x02 0x04>; - clocks = <0x02 0xbb>; - clock-names = "apb_pclk"; - #dma-cells = <0x01>; - peripherals-req-type-burst; - phandle = <0x2b>; - }; - }; - - thermal-zones { - phandle = <0xfa>; - - soc-thermal { - polling-delay-passive = <0x14>; - polling-delay = <0x3e8>; - sustainable-power = <0x2ee>; - thermal-sensors = <0x83 0x00>; - phandle = <0xfb>; - - trips { - - trip-point-0 { - temperature = <0x11170>; - hysteresis = <0x7d0>; - type = "passive"; - phandle = <0xfc>; - }; - - trip-point-1 { - temperature = <0x14c08>; - hysteresis = <0x7d0>; - type = "passive"; - phandle = <0x84>; - }; - - soc-crit { - temperature = <0x1c138>; - hysteresis = <0x7d0>; - type = "critical"; - phandle = <0xfd>; - }; - }; - - cooling-maps { - - map0 { - trip = <0x84>; - cooling-device = <0x09 0xffffffff 0xffffffff>; - contribution = <0x1000>; - }; - - map1 { - trip = <0x84>; - cooling-device = <0x85 0xffffffff 0xffffffff>; - contribution = <0x1000>; - }; - }; - }; - - gpu-thermal { - polling-delay-passive = <0x64>; - polling-delay = <0x3e8>; - thermal-sensors = <0x83 0x01>; - phandle = <0xfe>; - }; - }; - - tsadc@ff280000 { - compatible = "rockchip,px30-tsadc"; - reg = <0x00 0xff280000 0x00 0x100>; - interrupts = <0x00 0x24 0x04>; - rockchip,grf = <0x2f>; - clocks = <0x02 0x2c 0x02 0x158>; - clock-names = "tsadc\0apb_pclk"; - assigned-clocks = <0x02 0x2c>; - assigned-clock-rates = <0xc350>; - resets = <0x02 0xa8>; - reset-names = "tsadc-apb"; - #thermal-sensor-cells = <0x01>; - rockchip,hw-tshut-temp = <0x1d4c0>; - status = "okay"; - pinctrl-names = "gpio\0otpout"; - pinctrl-0 = <0x86>; - pinctrl-1 = <0x87>; - phandle = <0x83>; - }; - - saradc@ff288000 { - compatible = "rockchip,px30-saradc\0rockchip,rk3399-saradc"; - reg = <0x00 0xff288000 0x00 0x100>; - interrupts = <0x00 0x54 0x04>; - #io-channel-cells = <0x01>; - clocks = <0x02 0x2d 0x02 0x157>; - clock-names = "saradc\0apb_pclk"; - resets = <0x02 0xa5>; - reset-names = "saradc-apb"; - status = "okay"; - vref-supply = <0x88>; - phandle = <0xbe>; - }; - - otp@ff290000 { - compatible = "rockchip,px30-otp"; - reg = <0x00 0xff290000 0x00 0x4000>; - #address-cells = <0x01>; - #size-cells = <0x01>; - clocks = <0x02 0x2f 0x02 0x15a 0x02 0x161>; - clock-names = "clk_otp\0pclk_otp\0pclk_otp_phy"; - resets = <0x02 0xb4>; - reset-names = "otp_phy"; - phandle = <0xff>; - - id@7 { - reg = <0x07 0x10>; - phandle = <0x0f>; - }; - - cpu-leakage@17 { - reg = <0x17 0x01>; - phandle = <0x07>; - }; - - performance@1e { - reg = <0x1e 0x01>; - bits = <0x04 0x03>; - phandle = <0x08>; - }; - }; - - clock-controller@ff2b0000 { - compatible = "rockchip,px30-cru"; - reg = <0x00 0xff2b0000 0x00 0x1000>; - rockchip,grf = <0x2f>; - rockchip,boost = <0x89>; - #clock-cells = <0x01>; - #reset-cells = <0x01>; - assigned-clocks = <0x02 0x04>; - assigned-clock-rates = <0x3dfd2400>; - phandle = <0x02>; - }; - - cpu-boost@ff2b8000 { - compatible = "syscon"; - reg = <0x00 0xff2b8000 0x00 0x1000>; - rockchip,boost-low-con0 = <0x1032>; - rockchip,boost-low-con1 = <0x1441>; - rockchip,boost-high-con0 = <0x1036>; - rockchip,boost-high-con1 = <0x1441>; - rockchip,boost-backup-pll = <0x01>; - rockchip,boost-backup-pll-usage = <0x00>; - rockchip,boost-switch-threshold = <0x249f00>; - rockchip,boost-statis-threshold = <0x100>; - rockchip,boost-statis-enable = <0x00>; - rockchip,boost-enable = <0x00>; - phandle = <0x89>; - }; - - pmu-clock-controller@ff2bc000 { - compatible = "rockchip,px30-pmucru"; - reg = <0x00 0xff2bc000 0x00 0x1000>; - rockchip,grf = <0x2f>; - #clock-cells = <0x01>; - #reset-cells = <0x01>; - assigned-clocks = <0x2a 0x01 0x2a 0x08 0x2a 0x05 0x02 0x07 0x02 0xab 0x02 0xb0 0x02 0xf0 0x02 0xf5 0x02 0x140 0x02 0x49>; - assigned-clock-rates = <0x47868c00 0x5f5e100 0x18cba80 0x23c34600 0xbebc200 0xbebc200 0x8f0d180 0x8f0d180 0x5f5e100 0xbebc200>; - phandle = <0x2a>; - }; - - syscon@ff2c0000 { - compatible = "rockchip,px30-usb2phy-grf\0syscon\0simple-mfd"; - reg = <0x00 0xff2c0000 0x00 0x10000>; - #address-cells = <0x01>; - #size-cells = <0x01>; - phandle = <0x100>; - - usb2-phy@100 { - compatible = "rockchip,px30-usb2phy\0rockchip,rk3328-usb2phy"; - reg = <0x100 0x10>; - clocks = <0x2a 0x0a>; - clock-names = "phyclk"; - #clock-cells = <0x00>; - assigned-clocks = <0x02 0x0e 0x02 0x55>; - assigned-clock-parents = <0x67 0x02 0x0e>; - clock-output-names = "usb480m_phy"; - status = "okay"; - phandle = <0x67>; - - host-port { - #phy-cells = <0x00>; - interrupts = <0x00 0x44 0x04>; - interrupt-names = "linestate"; - status = "okay"; - phandle = <0x8c>; - }; - - otg-port { - #phy-cells = <0x00>; - interrupts = <0x00 0x42 0x04 0x00 0x41 0x04 0x00 0x40 0x04>; - interrupt-names = "otg-bvalid\0otg-id\0linestate"; - status = "disabled"; - phandle = <0x8b>; - }; - }; - }; - - video-phy@ff2e0000 { - compatible = "rockchip,px30-video-phy"; - reg = <0x00 0xff2e0000 0x00 0x10000 0x00 0xff450000 0x00 0x10000>; - clocks = <0x2a 0x0b 0x02 0x145 0x02 0x144>; - clock-names = "ref\0pclk_phy\0pclk_host"; - #clock-cells = <0x00>; - resets = <0x02 0x3e>; - reset-names = "rst"; - power-domains = <0x8a 0x0c>; - #phy-cells = <0x00>; - status = "okay"; - phandle = <0x4c>; - }; - - mipi-dphy-rx0@ff2f0000 { - compatible = "rockchip,rk3326-mipi-dphy"; - reg = <0x00 0xff2f0000 0x00 0x4000>; - clocks = <0x02 0x146>; - clock-names = "dphy-ref"; - power-domains = <0x8a 0x0d>; - rockchip,grf = <0x2f>; - status = "okay"; - phandle = <0x101>; - }; - - usb@ff300000 { - compatible = "rockchip,px30-usb\0rockchip,rk3066-usb\0snps,dwc2"; - reg = <0x00 0xff300000 0x00 0x40000>; - interrupts = <0x00 0x3e 0x04>; - clocks = <0x02 0x102>; - clock-names = "otg"; - power-domains = <0x8a 0x05>; - dr_mode = "otg"; - g-np-tx-fifo-size = <0x10>; - g-rx-fifo-size = <0x118>; - g-tx-fifo-size = <0x100 0x80 0x80 0x40 0x20 0x10>; - g-use-dma; - phys = <0x8b>; - phy-names = "usb2-phy"; - status = "okay"; - phandle = <0x102>; - }; - - usb@ff340000 { - compatible = "generic-ehci"; - reg = <0x00 0xff340000 0x00 0x10000>; - interrupts = <0x00 0x3c 0x04>; - clocks = <0x02 0x103 0x67>; - clock-names = "usbhost\0utmi"; - power-domains = <0x8a 0x05>; - phys = <0x8c>; - phy-names = "usb"; - status = "disabled"; - phandle = <0x103>; - }; - - usb@ff350000 { - compatible = "generic-ohci"; - reg = <0x00 0xff350000 0x00 0x10000>; - interrupts = <0x00 0x3d 0x04>; - clocks = <0x02 0x103 0x67>; - clock-names = "usbhost\0utmi"; - power-domains = <0x8a 0x05>; - phys = <0x8c>; - phy-names = "usb"; - status = "disabled"; - phandle = <0x104>; - }; - - ethernet@ff360000 { - compatible = "rockchip,px30-gmac"; - reg = <0x00 0xff360000 0x00 0x10000>; - rockchip,grf = <0x2f>; - interrupts = <0x00 0x2b 0x04>; - interrupt-names = "macirq"; - clocks = <0x02 0x3e 0x02 0x3f 0x02 0x3f 0x02 0x40 0x02 0x41 0x02 0xb2 0x02 0x143 0x02 0x4c>; - clock-names = "stmmaceth\0mac_clk_rx\0mac_clk_tx\0clk_mac_ref\0clk_mac_refout\0aclk_mac\0pclk_mac\0clk_mac_speed"; - phy-mode = "rmii"; - pinctrl-names = "default"; - pinctrl-0 = <0x8d 0x8e>; - resets = <0x02 0x5e>; - reset-names = "stmmaceth"; - power-domains = <0x8a 0x09>; - status = "disabled"; - phandle = <0x105>; - }; - - dwmmc@ff370000 { - compatible = "rockchip,px30-dw-mshc\0rockchip,rk3288-dw-mshc"; - reg = <0x00 0xff370000 0x00 0x4000>; - max-frequency = <0x8f0d180>; - clocks = <0x02 0xf7 0x02 0x3b 0x02 0x43 0x02 0x44>; - clock-names = "biu\0ciu\0ciu-drv\0ciu-sample"; - assigned-clocks = <0x02 0x3b>; - assigned-clock-parents = <0x02 0x57>; - power-domains = <0x8a 0x07>; - fifo-depth = <0x100>; - interrupts = <0x00 0x36 0x04>; - pinctrl-names = "default"; - pinctrl-0 = <0x8f 0x90 0x91 0x92>; - status = "okay"; - bus-width = <0x04>; - cap-mmc-highspeed; - cap-sd-highspeed; - supports-sd; - card-detect-delay = <0x320>; - ignore-pm-notify; - cd-gpios = <0x5c 0x03 0x01>; - sd-uhs-sdr12; - sd-uhs-sdr25; - sd-uhs-sdr50; - sd-uhs-sdr104; - vqmmc-supply = <0x4a>; - vmmc-supply = <0x93>; - phandle = <0x106>; - }; - - dwmmc@ff380000 { - compatible = "rockchip,px30-dw-mshc\0rockchip,rk3288-dw-mshc"; - reg = <0x00 0xff380000 0x00 0x4000>; - max-frequency = <0x8f0d180>; - clocks = <0x02 0xff 0x02 0x38 0x02 0x45 0x02 0x46>; - clock-names = "biu\0ciu\0ciu-drv\0ciu-sample"; - assigned-clocks = <0x02 0x38>; - assigned-clock-parents = <0x02 0x51>; - power-domains = <0x8a 0x0a>; - fifo-depth = <0x100>; - interrupts = <0x00 0x37 0x04>; - pinctrl-names = "default"; - pinctrl-0 = <0x94 0x95 0x96>; - status = "okay"; - bus-width = <0x04>; - cap-mmc-highspeed; - cap-sd-highspeed; - supports-sd; - card-detect-delay = <0x320>; - ignore-pm-notify; - cd-gpios = <0x97 0x0e 0x01>; - sd-uhs-sdr12; - sd-uhs-sdr25; - sd-uhs-sdr50; - sd-uhs-sdr104; - vqmmc-supply = <0x4a>; - vmmc-supply = <0x93>; - phandle = <0x107>; - }; - - dwmmc@ff390000 { - compatible = "rockchip,px30-dw-mshc\0rockchip,rk3288-dw-mshc"; - reg = <0x00 0xff390000 0x00 0x4000>; - max-frequency = <0x8f0d180>; - clocks = <0x02 0x100 0x02 0x39 0x02 0x47 0x02 0x48>; - clock-names = "biu\0ciu\0ciu-drv\0ciu-sample"; - assigned-clocks = <0x02 0x39>; - assigned-clock-parents = <0x02 0x53>; - power-domains = <0x8a 0x0a>; - fifo-depth = <0x100>; - interrupts = <0x00 0x35 0x04>; - status = "disabled"; - phandle = <0x108>; - }; - - nandc@ff3b0000 { - compatible = "rockchip,rk-nandc"; - reg = <0x00 0xff3b0000 0x00 0x4000>; - interrupts = <0x00 0x39 0x04>; - nandc_id = <0x00>; - clocks = <0x02 0x37 0x02 0xfe>; - clock-names = "clk_nandc\0hclk_nandc"; - assigned-clocks = <0x02 0x37>; - assigned-clock-parents = <0x02 0x4f>; - power-domains = <0x8a 0x0a>; - status = "disabled"; - phandle = <0x109>; - }; - - sfc@ff3a0000 { - compatible = "rockchip,sfc"; - reg = <0x00 0xff3a0000 0x00 0x4000>; - interrupts = <0x00 0x38 0x04>; - clocks = <0x02 0x3a 0x02 0x101>; - clock-names = "clk_sfc\0hclk_sfc"; - assigned-clocks = <0x02 0x3a>; - assigned-clock-rates = <0x989680>; - status = "disabled"; - phandle = <0x10a>; - }; - - gpu@ff400000 { - compatible = "arm,malit602\0arm,malit60x\0arm,malit6xx\0arm,mali-midgard"; - reg = <0x00 0xff400000 0x00 0x4000>; - interrupts = <0x00 0x2d 0x04 0x00 0x2e 0x04 0x00 0x2f 0x04>; - interrupt-names = "GPU\0MMU\0JOB"; - clocks = <0x02 0x49>; - clock-names = "clk_mali"; - power-domains = <0x8a 0x0e>; - #cooling-cells = <0x02>; - operating-points-v2 = <0x98>; - status = "okay"; - mali-supply = <0x0e>; - phandle = <0x85>; - - power_model { - compatible = "arm,mali-simple-power-model"; - static-coefficient = <0x64578>; - dynamic-coefficient = <0x2dd>; - ts = <0x7d00 0x125c 0xffffffb0 0x02>; - thermal-zone = "gpu-thermal"; - }; - }; - - gpu-opp-table { - compatible = "operating-points-v2"; - rockchip,thermal-zone = "soc-thermal"; - rockchip,temp-hysteresis = <0x1388>; - rockchip,low-temp = <0x00>; - rockchip,low-temp-min-volt = <0xf4240>; - rockchip,low-temp-adjust-volt = <0x00 0x1e0 0xc350>; - rockchip,max-volt = <0x11edd8>; - rockchip,evb-irdrop = <0x61a8>; - rockchip,pvtm-voltage-sel = <0x00 0xc350 0x00 0xc351 0xd2f0 0x01 0xd2f1 0xea60 0x02 0xea61 0x1869f 0x03>; - rockchip,pvtm-ch = <0x00 0x00>; - phandle = <0x98>; - - opp-400000000 { - opp-hz = <0x00 0x17d78400>; - opp-microvolt = <0x100590>; - opp-microvolt-L0 = <0x100590>; - opp-microvolt-L1 = <0xfa3e8>; - opp-microvolt-L2 = <0xee098>; - opp-microvolt-L3 = <0xe7ef0>; - }; - - opp-480000000 { - opp-hz = <0x00 0x1c9c3800>; - opp-microvolt = <0x112a88>; - opp-microvolt-L0 = <0x112a88>; - opp-microvolt-L1 = <0x10c8e0>; - opp-microvolt-L2 = <0x100590>; - opp-microvolt-L3 = <0xf4240>; - }; - - opp-520000000 { - opp-hz = <0x00 0x1efe9200>; - opp-microvolt = <0x118c30>; - opp-microvolt-L0 = <0x118c30>; - opp-microvolt-L1 = <0x118c30>; - opp-microvolt-L2 = <0x10c8e0>; - opp-microvolt-L3 = <0x100590>; - }; - }; - - hevc_service@ff440000 { - compatible = "rockchip,hevc_sub"; - iommu_enabled = <0x01>; - reg = <0x00 0xff440000 0x00 0x400>; - interrupts = <0x00 0x31 0x04>; - interrupt-names = "irq_dec"; - dev_mode = <0x01>; - iommus = <0x99>; - allocator = <0x01>; - phandle = <0x9c>; - }; - - vpu_service@ff442000 { - compatible = "rockchip,vpu_sub"; - iommu_enabled = <0x01>; - reg = <0x00 0xff442000 0x00 0x800>; - interrupts = <0x00 0x50 0x04 0x00 0x4f 0x04>; - interrupt-names = "irq_enc\0irq_dec"; - dev_mode = <0x00>; - iommus = <0x9a>; - allocator = <0x01>; - phandle = <0x9b>; - }; - - vpu_combo { - compatible = "rockchip,vpu_combo"; - subcnt = <0x02>; - rockchip,grf = <0x2f>; - rockchip,sub = <0x9b 0x9c>; - clocks = <0x02 0xaf 0x02 0xf4 0x02 0x4b>; - clock-names = "aclk_vcodec\0hclk_vcodec\0clk_core"; - resets = <0x02 0x24 0x02 0x26 0x02 0x25 0x02 0x27 0x02 0x3f>; - reset-names = "video_a\0video_h\0niu_a\0niu_h\0video_core"; - power-domains = <0x8a 0x0b>; - mode_bit = <0x0f>; - mode_ctrl = <0x410>; - status = "okay"; - phandle = <0x10b>; - }; - - iommu@ff440440 { - compatible = "rockchip,iommu"; - reg = <0x00 0xff440440 0x00 0x40 0x00 0xff440480 0x00 0x40>; - interrupts = <0x00 0x32 0x04>; - interrupt-names = "hevc_mmu"; - clocks = <0x02 0xaf 0x02 0xf4>; - clock-names = "aclk\0hclk"; - power-domains = <0x8a 0x0b>; - #iommu-cells = <0x00>; - phandle = <0x99>; - }; - - iommu@ff442800 { - compatible = "rockchip,iommu"; - reg = <0x00 0xff442800 0x00 0x100>; - interrupts = <0x00 0x51 0x04>; - interrupt-names = "vpu_mmu"; - clocks = <0x02 0xaf 0x02 0xf4>; - clock-names = "aclk\0hclk"; - power-domains = <0x8a 0x0b>; - #iommu-cells = <0x00>; - phandle = <0x9a>; - }; - - dsi@ff450000 { - compatible = "rockchip,px30-mipi-dsi"; - reg = <0x00 0xff450000 0x00 0x10000>; - interrupts = <0x00 0x4b 0x04>; - clocks = <0x02 0x144 0x4c>; - clock-names = "pclk\0hs_clk"; - resets = <0x02 0x3d>; - reset-names = "apb"; - phys = <0x4c>; - phy-names = "mipi_dphy"; - power-domains = <0x8a 0x0c>; - rockchip,grf = <0x2f>; - #address-cells = <0x01>; - #size-cells = <0x00>; - status = "okay"; - phandle = <0x10c>; - - ports { - #address-cells = <0x01>; - #size-cells = <0x00>; - - port@0 { - reg = <0x00>; - #address-cells = <0x01>; - #size-cells = <0x00>; - - endpoint@0 { - reg = <0x00>; - remote-endpoint = <0x13>; - status = "okay"; - phandle = <0xa3>; - }; - }; - }; - - panel@0 { - compatible = "elida,kd35t133\0simple-panel-dsi"; - reg = <0x00>; - backlight = <0x9d>; - backlight-supply = <0x9e>; - power-supply = <0x9f>; - reset-gpios = <0x97 0x10 0x01>; - prepare-delay-ms = <0x02>; - reset-delay-ms = <0x01>; - init-delay-ms = <0x14>; - enable-delay-ms = <0x78>; - disable-delay-ms = <0x32>; - unprepare-delay-ms = <0x14>; - width-mm = <0x34>; - height-mm = <0x46>; - dsi,flags = <0xa03>; - dsi,format = <0x00>; - dsi,lanes = <0x04>; - panel-init-sequence = [39 00 04 b9 f1 12 83 39 00 06 b1 00 00 00 da 80 39 00 04 b2 00 13 70 39 00 0b b3 10 10 28 28 03 ff 00 00 00 00 15 00 02 b4 80 15 00 03 b5 0a 0a 15 00 03 b6 7f 7f 39 00 05 b8 26 62 f0 63 39 00 1c ba 33 81 05 f9 0e 0e 20 00 00 00 00 00 00 00 44 25 00 90 0a 00 00 01 4f 01 00 00 37 15 00 02 bc 47 39 00 04 bf 02 11 00 39 00 0a c0 73 73 50 50 00 00 12 50 00 39 00 0d c1 53 c0 32 32 77 e1 dd dd 77 77 33 33 39 00 07 c6 82 00 bf ff 00 ff 39 00 07 c7 b8 00 0a 00 00 00 39 00 05 c8 10 40 1e 02 15 00 02 cc 0b 39 00 23 e0 00 07 0d 37 35 3f 41 44 06 0c 0d 0f 11 10 12 14 1a 00 07 0d 37 35 3f 41 44 06 0c 0d 0f 11 10 12 14 1a 39 00 0f e3 07 07 0b 0b 0b 0b 00 00 00 00 ff 00 c0 10 39 00 40 e9 c8 10 02 00 00 b0 b1 11 31 23 28 80 b0 b1 27 08 00 04 02 00 00 00 00 04 02 00 00 00 88 88 ba 60 24 08 88 88 88 88 88 88 88 ba 71 35 18 88 88 88 88 88 00 00 00 01 00 00 00 00 00 00 00 00 00 39 00 3e ea 97 0a 82 02 03 07 00 00 00 00 00 00 81 88 ba 17 53 88 88 88 88 88 88 80 88 ba 06 42 88 88 88 88 88 88 23 00 00 02 80 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 39 00 04 ef ff ff 01 05 c8 01 11 05 32 01 29]; - panel-exit-sequence = <0x5140128 0x50a0110>; - - display-timings { - native-mode = <0xa0>; - - 60Hz { - clock-frequency = <0x2faf080>; - hactive = <0x280>; - vactive = <0x1e0>; - hfront-porch = <0x1c2>; - hsync-len = <0x2e>; - hback-porch = <0x1c2>; - vfront-porch = <0x11>; - vsync-len = <0x05>; - vback-porch = <0x0d>; - hsync-active = <0x00>; - vsync-active = <0x00>; - de-active = <0x00>; - pixelclk-active = <0x01>; - phandle = <0xa0>; - }; - - 50Hz { - clock-frequency = <0x1851960>; - hactive = <0x280>; - vactive = <0x1e0>; - hfront-porch = <0xbc>; - hsync-len = <0x02>; - hback-porch = <0xbe>; - vfront-porch = <0x0d>; - vsync-len = <0x02>; - vback-porch = <0x05>; - hsync-active = <0x00>; - vsync-active = <0x00>; - de-active = <0x00>; - pixelclk-active = <0x00>; - phandle = <0x10d>; - }; - - 75Hz { - clock-frequency = <0x1d2eb40>; - hactive = <0x280>; - vactive = <0x1e0>; - hfront-porch = <0x57>; - hsync-len = <0x02>; - hback-porch = <0x57>; - vfront-porch = <0x0d>; - vsync-len = <0x02>; - vback-porch = <0x05>; - hsync-active = <0x00>; - vsync-active = <0x00>; - de-active = <0x00>; - pixelclk-active = <0x00>; - phandle = <0x10e>; - }; - }; - }; - }; - - vop@ff460000 { - compatible = "rockchip,px30-vop-big"; - reg = <0x00 0xff460000 0x00 0x1fc 0x00 0xff460a00 0x00 0x400>; - rockchip,grf = <0x2f>; - reg-names = "regs\0gamma_lut"; - interrupts = <0x00 0x4d 0x04>; - clocks = <0x02 0xb5 0x02 0x96 0x02 0xfb>; - clock-names = "aclk_vop\0dclk_vop\0hclk_vop"; - power-domains = <0x8a 0x0c>; - iommus = <0xa1>; - status = "okay"; - phandle = <0x10f>; - - port { - #address-cells = <0x01>; - #size-cells = <0x00>; - phandle = <0x10>; - - endpoint@0 { - reg = <0x00>; - remote-endpoint = <0xa2>; - phandle = <0x12>; - }; - - endpoint@1 { - reg = <0x01>; - remote-endpoint = <0xa3>; - phandle = <0x13>; - }; - - endpoint@2 { - reg = <0x02>; - remote-endpoint = <0xa4>; - phandle = <0x14>; - }; - }; - }; - - iommu@ff460f00 { - compatible = "rockchip,iommu"; - reg = <0x00 0xff460f00 0x00 0x100>; - interrupts = <0x00 0x4d 0x04>; - interrupt-names = "vopb_mmu"; - clocks = <0x02 0xb5 0x02 0xfb>; - clock-names = "aclk\0hclk"; - power-domains = <0x8a 0x0c>; - #iommu-cells = <0x00>; - status = "okay"; - phandle = <0xa1>; - }; - - rk_rga@ff480000 { - compatible = "rockchip,rga2"; - reg = <0x00 0xff480000 0x00 0x1000>; - interrupts = <0x00 0x4c 0x04>; - clocks = <0x02 0xb7 0x02 0xfd 0x02 0x35>; - clock-names = "aclk_rga\0hclk_rga\0clk_rga"; - power-domains = <0x8a 0x0c>; - dma-coherent; - status = "okay"; - phandle = <0x110>; - }; - - cif@ff490000 { - compatible = "rockchip,cif"; - reg = <0x00 0xff490000 0x00 0x200>; - interrupts = <0x00 0x45 0x04>; - clocks = <0x02 0xb3 0x02 0xf9 0x02 0x160 0x02 0x34>; - clock-names = "aclk_cif0\0hclk_cif0\0pclk_cif\0cif0_out"; - resets = <0x02 0x2c 0x02 0x2d 0x02 0x2e>; - reset-names = "rst_cif_a\0rst_cif_h\0rst_cif_pclkin"; - power-domains = <0x8a 0x0d>; - pinctrl-names = "cif_pin_all"; - pinctrl-0 = <0xa5>; - iommus = <0xa6>; - status = "disabled"; - phandle = <0x111>; - }; - - cif-new@ff490000 { - compatible = "rockchip,px30-cif"; - reg = <0x00 0xff490000 0x00 0x200>; - interrupts = <0x00 0x45 0x04>; - clocks = <0x02 0xb3 0x02 0xf9 0x02 0x160 0x02 0x34>; - clock-names = "aclk_cif\0hclk_cif\0pclk_cif\0cif_out"; - resets = <0x02 0x2c 0x02 0x2d 0x02 0x2e>; - reset-names = "rst_cif_a\0rst_cif_h\0rst_cif_pclkin"; - power-domains = <0x8a 0x0d>; - iommus = <0xa6>; - status = "disabled"; - phandle = <0x112>; - }; - - iommu@ff490800 { - compatible = "rockchip,iommu"; - reg = <0x00 0xff490800 0x00 0x100>; - interrupts = <0x00 0x45 0x04>; - interrupt-names = "vip_mmu"; - clocks = <0x02 0xb3 0x02 0xf9>; - clock-names = "aclk\0hclk"; - power-domains = <0x8a 0x0d>; - rk_iommu,disable_reset_quirk; - #iommu-cells = <0x00>; - status = "okay"; - phandle = <0xa6>; - }; - - rk_isp@ff4a0000 { - compatible = "rockchip,px30-isp\0rockchip,isp"; - reg = <0x00 0xff4a0000 0x00 0x8000>; - interrupts = <0x00 0x46 0x04>; - clocks = <0x02 0xb4 0x02 0xfa 0x02 0x33 0x02 0x33 0x02 0x15f 0x02 0x34 0x02 0x34 0x02 0x146>; - clock-names = "aclk_isp\0hclk_isp\0clk_isp\0clk_isp_jpe\0pclkin_isp\0clk_cif_pll\0clk_cif_out\0pclk_dphyrx"; - resets = <0x02 0x2b 0x02 0x2f>; - reset-names = "rst_isp\0rst_mipicsiphy"; - power-domains = <0x8a 0x0d>; - pinctrl-names = "default\0isp_dvp8bit2\0isp_dvp10bit\0isp_dvp12bit"; - pinctrl-0 = <0xa7>; - pinctrl-1 = <0xa5>; - pinctrl-2 = <0xa5 0xa8>; - pinctrl-3 = <0xa9 0xa5 0xa8>; - rockchip,isp,mipiphy = <0x01>; - rockchip,isp,csiphy,reg = <0xff2f0000 0x4000>; - rockchip,grf = <0x2f>; - rockchip,cru = <0x02>; - rockchip,isp,iommu-enable = <0x01>; - iommus = <0xaa>; - status = "disabled"; - phandle = <0x113>; - }; - - rkisp1@ff4a0000 { - compatible = "rockchip,rk3326-rkisp1"; - reg = <0x00 0xff4a0000 0x00 0x8000>; - interrupts = <0x00 0x46 0x04 0x00 0x49 0x04 0x00 0x4a 0x04>; - interrupt-names = "isp_irq\0mi_irq\0mipi_irq"; - clocks = <0x02 0xb4 0x02 0xfa 0x02 0x33 0x02 0x15f>; - clock-names = "aclk_isp\0hclk_isp\0clk_isp\0pclk_isp"; - devfreq = <0xab>; - power-domains = <0x8a 0x0d>; - iommus = <0xaa>; - rockchip,grf = <0x2f>; - status = "okay"; - phandle = <0x114>; - }; - - iommu@ff4a8000 { - compatible = "rockchip,iommu"; - reg = <0x00 0xff4a8000 0x00 0x100>; - interrupts = <0x00 0x46 0x04>; - interrupt-names = "isp_mmu"; - clocks = <0x02 0xb4 0x02 0xfa>; - clock-names = "aclk\0hclk"; - power-domains = <0x8a 0x0d>; - rk_iommu,disable_reset_quirk; - #iommu-cells = <0x00>; - status = "okay"; - phandle = <0xaa>; - }; - - qos@ff518000 { - compatible = "syscon"; - reg = <0x00 0xff518000 0x00 0x20>; - phandle = <0x18>; - }; - - qos@ff520000 { - compatible = "syscon"; - reg = <0x00 0xff520000 0x00 0x20>; - phandle = <0x28>; - }; - - qos@ff52c000 { - compatible = "syscon"; - reg = <0x00 0xff52c000 0x00 0x20>; - phandle = <0x17>; - }; - - qos@ff538000 { - compatible = "syscon"; - reg = <0x00 0xff538000 0x00 0x20>; - phandle = <0x19>; - }; - - qos@ff538080 { - compatible = "syscon"; - reg = <0x00 0xff538080 0x00 0x20>; - phandle = <0x1a>; - }; - - qos@ff538100 { - compatible = "syscon"; - reg = <0x00 0xff538100 0x00 0x20>; - phandle = <0x1b>; - }; - - qos@ff538180 { - compatible = "syscon"; - reg = <0x00 0xff538180 0x00 0x20>; - phandle = <0x1c>; - }; - - qos@ff540000 { - compatible = "syscon"; - reg = <0x00 0xff540000 0x00 0x20>; - phandle = <0x15>; - }; - - qos@ff540080 { - compatible = "syscon"; - reg = <0x00 0xff540080 0x00 0x20>; - phandle = <0x16>; - }; - - qos@ff548000 { - compatible = "syscon"; - reg = <0x00 0xff548000 0x00 0x20>; - phandle = <0x23>; - }; - - qos@ff548080 { - compatible = "syscon"; - reg = <0x00 0xff548080 0x00 0x20>; - phandle = <0x24>; - }; - - qos@ff548100 { - compatible = "syscon"; - reg = <0x00 0xff548100 0x00 0x20>; - phandle = <0x25>; - }; - - qos@ff548180 { - compatible = "syscon"; - reg = <0x00 0xff548180 0x00 0x20>; - phandle = <0x26>; - }; - - qos@ff548200 { - compatible = "syscon"; - reg = <0x00 0xff548200 0x00 0x20>; - phandle = <0x27>; - }; - - qos@ff550000 { - compatible = "syscon"; - reg = <0x00 0xff550000 0x00 0x20>; - phandle = <0x1f>; - }; - - qos@ff550080 { - compatible = "syscon"; - reg = <0x00 0xff550080 0x00 0x20>; - phandle = <0x20>; - }; - - qos@ff550100 { - compatible = "syscon"; - reg = <0x00 0xff550100 0x00 0x20>; - phandle = <0x21>; - }; - - qos@ff550180 { - compatible = "syscon"; - reg = <0x00 0xff550180 0x00 0x20>; - phandle = <0x22>; - }; - - qos@ff558000 { - compatible = "syscon"; - reg = <0x00 0xff558000 0x00 0x20>; - phandle = <0x1d>; - }; - - qos@ff558080 { - compatible = "syscon"; - reg = <0x00 0xff558080 0x00 0x20>; - phandle = <0x1e>; - }; - - dfi@ff610000 { - reg = <0x00 0xff610000 0x00 0x400>; - compatible = "rockchip,px30-dfi"; - rockchip,pmugrf = <0xac>; - status = "okay"; - phandle = <0xad>; - }; - - dmc { - compatible = "rockchip,px30-dmc"; - interrupts = <0x00 0x69 0x04>; - interrupt-names = "complete_irq"; - devfreq-events = <0xad>; - clocks = <0x02 0x54>; - clock-names = "dmc_clk"; - operating-points-v2 = <0xae>; - ddr_timing = <0xaf>; - upthreshold = <0x28>; - downdifferential = <0x14>; - system-status-freq = <0x01 0x80e80 0x08 0x6ddd0 0x02 0x2f5d0 0x20 0x6ddd0 0x1000 0x80e80 0x4000 0xa2990 0x2000 0xa2990>; - auto-min-freq = <0x50140>; - auto-freq-en = <0x01>; - #cooling-cells = <0x02>; - status = "okay"; - center-supply = <0x0e>; - phandle = <0xab>; - - ddr_power_model { - compatible = "ddr_power_model"; - dynamic-power-coefficient = <0x78>; - static-power-coefficient = <0xc8>; - ts = <0x7d00 0x125c 0xffffffb0 0x02>; - thermal-zone = "soc-thermal"; - phandle = <0x115>; - }; - }; - - dmc-opp-table { - compatible = "operating-points-v2"; - rockchip,max-volt = <0x118c30>; - rockchip,evb-irdrop = <0x61a8>; - rockchip,pvtm-voltage-sel = <0x00 0xc350 0x00 0xc351 0xd2f0 0x01 0xd2f1 0xea60 0x02 0xea61 0x1869f 0x03>; - rockchip,pvtm-ch = <0x00 0x00>; - phandle = <0xae>; - - opp-528000000 { - opp-hz = <0x00 0x1f78a400>; - opp-microvolt = <0xee098>; - opp-microvolt-L0 = <0xee098>; - opp-microvolt-L1 = <0xee098>; - opp-microvolt-L2 = <0xe7ef0>; - opp-microvolt-L3 = <0xe7ef0>; - }; - - opp-666000000 { - opp-hz = <0x00 0x27b25a80>; - opp-microvolt = <0x100590>; - opp-microvolt-L0 = <0x100590>; - opp-microvolt-L1 = <0xf4240>; - opp-microvolt-L2 = <0xee098>; - opp-microvolt-L3 = <0xe7ef0>; - }; - - opp-786000000 { - opp-hz = <0x00 0x2ed96880>; - opp-microvolt = <0x10c8e0>; - opp-microvolt-L0 = <0x10c8e0>; - opp-microvolt-L1 = <0x100590>; - opp-microvolt-L2 = <0xfa3e8>; - opp-microvolt-L3 = <0xf4240>; - status = "okay"; - }; - }; - - rockchip-system-monitor { - compatible = "rockchip,system-monitor"; - rockchip,thermal-zone = "soc-thermal"; - rockchip,polling-delay = <0xc8>; - phandle = <0x116>; - }; - - pinctrl { - compatible = "rockchip,px30-pinctrl"; - rockchip,grf = <0x2f>; - rockchip,pmu = <0xac>; - #address-cells = <0x02>; - #size-cells = <0x02>; - ranges; - phandle = <0x117>; - - gpio0@ff040000 { - compatible = "rockchip,gpio-bank"; - reg = <0x00 0xff040000 0x00 0x100>; - interrupts = <0x00 0x03 0x04>; - clocks = <0x2a 0x14>; - gpio-controller; - #gpio-cells = <0x02>; - interrupt-controller; - #interrupt-cells = <0x02>; - phandle = <0x5c>; - }; - - gpio1@ff250000 { - compatible = "rockchip,gpio-bank"; - reg = <0x00 0xff250000 0x00 0x100>; - interrupts = <0x00 0x04 0x04>; - clocks = <0x02 0x15c>; - gpio-controller; - #gpio-cells = <0x02>; - interrupt-controller; - #interrupt-cells = <0x02>; - phandle = <0xbf>; - }; - - gpio2@ff260000 { - compatible = "rockchip,gpio-bank"; - reg = <0x00 0xff260000 0x00 0x100>; - interrupts = <0x00 0x05 0x04>; - clocks = <0x02 0x15d>; - gpio-controller; - #gpio-cells = <0x02>; - interrupt-controller; - #interrupt-cells = <0x02>; - phandle = <0x66>; - }; - - gpio3@ff270000 { - compatible = "rockchip,gpio-bank"; - reg = <0x00 0xff270000 0x00 0x100>; - interrupts = <0x00 0x06 0x04>; - clocks = <0x02 0x15e>; - gpio-controller; - #gpio-cells = <0x02>; - interrupt-controller; - #interrupt-cells = <0x02>; - phandle = <0x97>; - }; - - pcfg-pull-up { - bias-pull-up; - phandle = <0xb2>; - }; - - pcfg-pull-down { - bias-pull-down; - phandle = <0x118>; - }; - - pcfg-pull-none { - bias-disable; - phandle = <0xb1>; - }; - - pcfg-pull-none-2ma { - bias-disable; - drive-strength = <0x02>; - phandle = <0x119>; - }; - - pcfg-pull-up-2ma { - bias-pull-up; - drive-strength = <0x02>; - phandle = <0x11a>; - }; - - pcfg-pull-up-4ma { - bias-pull-up; - drive-strength = <0x04>; - phandle = <0xb3>; - }; - - pcfg-pull-none-4ma { - bias-disable; - drive-strength = <0x04>; - phandle = <0x11b>; - }; - - pcfg-pull-down-4ma { - bias-pull-down; - drive-strength = <0x04>; - phandle = <0x11c>; - }; - - pcfg-pull-none-8ma { - bias-disable; - drive-strength = <0x08>; - phandle = <0xb6>; - }; - - pcfg-pull-up-8ma { - bias-pull-up; - drive-strength = <0x08>; - phandle = <0xb4>; - }; - - pcfg-pull-none-12ma { - bias-disable; - drive-strength = <0x0c>; - phandle = <0xb8>; - }; - - pcfg-pull-up-12ma { - bias-pull-up; - drive-strength = <0x0c>; - phandle = <0xb7>; - }; - - pcfg-pull-none-smt { - bias-disable; - input-schmitt-enable; - phandle = <0xb0>; - }; - - pcfg-output-high { - output-high; - phandle = <0x11d>; - }; - - pcfg-output-low { - output-low; - phandle = <0xb9>; - }; - - pcfg-input-high { - bias-pull-up; - input-enable; - phandle = <0xb5>; - }; - - pcfg-input { - input-enable; - phandle = <0x11e>; - }; - - i2c0 { - - i2c0-xfer { - rockchip,pins = <0x00 0x08 0x01 0xb0 0x00 0x09 0x01 0xb0>; - phandle = <0x5b>; - }; - }; - - i2c1 { - - i2c1-xfer { - rockchip,pins = <0x00 0x12 0x01 0xb0 0x00 0x13 0x01 0xb0>; - phandle = <0x69>; - }; - }; - - i2c2 { - - i2c2-xfer { - rockchip,pins = <0x02 0x0f 0x02 0xb0 0x02 0x10 0x02 0xb0>; - phandle = <0x6a>; - }; - }; - - i2c3 { - - i2c3-xfer { - rockchip,pins = <0x01 0x0c 0x04 0xb0 0x01 0x0d 0x04 0xb0>; - phandle = <0x6b>; - }; - }; - - tsadc { - - tsadc-otp-gpio { - rockchip,pins = <0x00 0x06 0x00 0xb1>; - phandle = <0x86>; - }; - - tsadc-otp-out { - rockchip,pins = <0x00 0x06 0x01 0xb1>; - phandle = <0x87>; - }; - }; - - uart0 { - - uart0-xfer { - rockchip,pins = <0x00 0x0a 0x01 0xb2 0x00 0x0b 0x01 0xb2>; - phandle = <0x2c>; - }; - - uart0-cts { - rockchip,pins = <0x00 0x0c 0x01 0xb1>; - phandle = <0x2d>; - }; - - uart0-rts { - rockchip,pins = <0x00 0x0d 0x01 0xb1>; - phandle = <0x2e>; - }; - - uart0-rts-gpio { - rockchip,pins = <0x00 0x0d 0x00 0xb1>; - phandle = <0x11f>; - }; - }; - - uart1 { - - uart1-xfer { - rockchip,pins = <0x01 0x11 0x01 0xb2 0x01 0x10 0x01 0xb2>; - phandle = <0x4f>; - }; - - uart1-cts { - rockchip,pins = <0x01 0x12 0x01 0xb1>; - phandle = <0x50>; - }; - - uart1-rts { - rockchip,pins = <0x01 0x13 0x01 0xb1>; - phandle = <0x120>; - }; - - uart1-rts-gpio { - rockchip,pins = <0x01 0x13 0x00 0xb1>; - phandle = <0x121>; - }; - }; - - uart2-m0 { - - uart2m0-xfer { - rockchip,pins = <0x01 0x1a 0x02 0xb2 0x01 0x1b 0x02 0xb2>; - phandle = <0x51>; - }; - }; - - uart2-m1 { - - uart2m1-xfer { - rockchip,pins = <0x02 0x0c 0x02 0xb2 0x02 0x0e 0x02 0xb2>; - phandle = <0xba>; - }; - }; - - uart3-m0 { - - uart3m0-xfer { - rockchip,pins = <0x00 0x10 0x02 0xb2 0x00 0x11 0x02 0xb2>; - phandle = <0x122>; - }; - - uart3m0-cts { - rockchip,pins = <0x00 0x12 0x02 0xb1>; - phandle = <0x123>; - }; - - uart3m0-rts { - rockchip,pins = <0x00 0x13 0x02 0xb1>; - phandle = <0x124>; - }; - - uart3m0-rts-gpio { - rockchip,pins = <0x00 0x13 0x00 0xb1>; - phandle = <0x125>; - }; - }; - - uart3-m1 { - - uart3m1-xfer { - rockchip,pins = <0x01 0x0e 0x02 0xb2 0x01 0x0f 0x02 0xb2>; - phandle = <0x52>; - }; - - uart3m1-cts { - rockchip,pins = <0x01 0x0c 0x02 0xb1>; - phandle = <0x53>; - }; - - uart3m1-rts { - rockchip,pins = <0x01 0x0d 0x02 0xb1>; - phandle = <0x54>; - }; - - uart3m1-rts-gpio { - rockchip,pins = <0x01 0x0d 0x00 0xb1>; - phandle = <0x126>; - }; - }; - - uart4 { - - uart4-xfer { - rockchip,pins = <0x01 0x1c 0x02 0xb2 0x01 0x1d 0x02 0xb2>; - phandle = <0x55>; - }; - - uart4-cts { - rockchip,pins = <0x01 0x1e 0x02 0xb1>; - phandle = <0x56>; - }; - - uart4-rts { - rockchip,pins = <0x01 0x1f 0x02 0xb1>; - phandle = <0x57>; - }; - }; - - uart5 { - - uart5-xfer { - rockchip,pins = <0x03 0x02 0x04 0xb2 0x03 0x01 0x04 0xb2>; - phandle = <0x58>; - }; - - uart5-cts { - rockchip,pins = <0x03 0x03 0x04 0xb1>; - phandle = <0x59>; - }; - - uart5-rts { - rockchip,pins = <0x03 0x05 0x04 0xb1>; - phandle = <0x5a>; - }; - }; - - spi0 { - - spi0-clk { - rockchip,pins = <0x01 0x0f 0x03 0xb3>; - phandle = <0x6c>; - }; - - spi0-csn { - rockchip,pins = <0x01 0x0e 0x03 0xb3>; - phandle = <0x6d>; - }; - - spi0-miso { - rockchip,pins = <0x01 0x0d 0x03 0xb3>; - phandle = <0x6e>; - }; - - spi0-mosi { - rockchip,pins = <0x01 0x0c 0x03 0xb3>; - phandle = <0x6f>; - }; - - spi0-clk-hs { - rockchip,pins = <0x01 0x0f 0x03 0xb4>; - phandle = <0x70>; - }; - - spi0-miso-hs { - rockchip,pins = <0x01 0x0d 0x03 0xb4>; - phandle = <0x71>; - }; - - spi0-mosi-hs { - rockchip,pins = <0x01 0x0c 0x03 0xb4>; - phandle = <0x72>; - }; - }; - - spi1 { - - spi1-clk { - rockchip,pins = <0x03 0x0f 0x04 0xb3>; - phandle = <0x73>; - }; - - spi1-csn0 { - rockchip,pins = <0x03 0x09 0x04 0xb3>; - phandle = <0x74>; - }; - - spi1-csn1 { - rockchip,pins = <0x03 0x0a 0x02 0xb3>; - phandle = <0x75>; - }; - - spi1-miso { - rockchip,pins = <0x03 0x0e 0x04 0xb3>; - phandle = <0x76>; - }; - - spi1-mosi { - rockchip,pins = <0x03 0x0c 0x04 0xb3>; - phandle = <0x77>; - }; - - spi1-clk-hs { - rockchip,pins = <0x03 0x0f 0x04 0xb4>; - phandle = <0x78>; - }; - - spi1-miso-hs { - rockchip,pins = <0x03 0x0e 0x04 0xb4>; - phandle = <0x79>; - }; - - spi1-mosi-hs { - rockchip,pins = <0x03 0x0c 0x04 0xb4>; - phandle = <0x7a>; - }; - }; - - pdm { - - pdm-clk0m0 { - rockchip,pins = <0x03 0x16 0x02 0xb1>; - phandle = <0x44>; - }; - - pdm-clk0m1 { - rockchip,pins = <0x02 0x16 0x01 0xb1>; - phandle = <0x127>; - }; - - pdm-clk1 { - rockchip,pins = <0x03 0x17 0x02 0xb1>; - phandle = <0x45>; - }; - - pdm-sdi0m0 { - rockchip,pins = <0x03 0x1b 0x02 0xb1>; - phandle = <0x46>; - }; - - pdm-sdi0m1 { - rockchip,pins = <0x02 0x15 0x02 0xb1>; - phandle = <0x128>; - }; - - pdm-sdi1 { - rockchip,pins = <0x03 0x18 0x02 0xb1>; - phandle = <0x47>; - }; - - pdm-sdi2 { - rockchip,pins = <0x03 0x19 0x02 0xb1>; - phandle = <0x48>; - }; - - pdm-sdi3 { - rockchip,pins = <0x03 0x1a 0x02 0xb1>; - phandle = <0x49>; - }; - - pdm-clk0m0-sleep { - rockchip,pins = <0x03 0x16 0x00 0xb5>; - phandle = <0x129>; - }; - - pdm-clk0m1-sleep { - rockchip,pins = <0x02 0x16 0x00 0xb5>; - phandle = <0x12a>; - }; - - pdm-clk1-sleep { - rockchip,pins = <0x03 0x17 0x00 0xb5>; - phandle = <0x12b>; - }; - - pdm-sdi0m0-sleep { - rockchip,pins = <0x03 0x1b 0x00 0xb5>; - phandle = <0x12c>; - }; - - pdm-sdi0m1-sleep { - rockchip,pins = <0x02 0x15 0x00 0xb5>; - phandle = <0x12d>; - }; - - pdm-sdi1-sleep { - rockchip,pins = <0x03 0x18 0x00 0xb5>; - phandle = <0x12e>; - }; - - pdm-sdi2-sleep { - rockchip,pins = <0x03 0x19 0x00 0xb5>; - phandle = <0x12f>; - }; - - pdm-sdi3-sleep { - rockchip,pins = <0x03 0x1a 0x00 0xb5>; - phandle = <0x130>; - }; - }; - - i2s0 { - - i2s0-8ch-mclk { - rockchip,pins = <0x03 0x11 0x02 0xb1>; - phandle = <0x131>; - }; - - i2s0-8ch-sclktx { - rockchip,pins = <0x03 0x13 0x02 0xb1>; - phandle = <0x30>; - }; - - i2s0-8ch-sclkrx { - rockchip,pins = <0x03 0x0c 0x02 0xb1>; - phandle = <0x31>; - }; - - i2s0-8ch-lrcktx { - rockchip,pins = <0x03 0x12 0x02 0xb1>; - phandle = <0x32>; - }; - - i2s0-8ch-lrckrx { - rockchip,pins = <0x03 0x0d 0x02 0xb1>; - phandle = <0x33>; - }; - - i2s0-8ch-sdo0 { - rockchip,pins = <0x03 0x14 0x02 0xb1>; - phandle = <0x38>; - }; - - i2s0-8ch-sdo1 { - rockchip,pins = <0x03 0x10 0x02 0xb1>; - phandle = <0x39>; - }; - - i2s0-8ch-sdo2 { - rockchip,pins = <0x03 0x0f 0x02 0xb1>; - phandle = <0x3a>; - }; - - i2s0-8ch-sdo3 { - rockchip,pins = <0x03 0x0e 0x02 0xb1>; - phandle = <0x3b>; - }; - - i2s0-8ch-sdi0 { - rockchip,pins = <0x03 0x15 0x02 0xb1>; - phandle = <0x34>; - }; - - i2s0-8ch-sdi1 { - rockchip,pins = <0x03 0x0b 0x02 0xb1>; - phandle = <0x35>; - }; - - i2s0-8ch-sdi2 { - rockchip,pins = <0x03 0x09 0x02 0xb1>; - phandle = <0x36>; - }; - - i2s0-8ch-sdi3 { - rockchip,pins = <0x03 0x08 0x02 0xb1>; - phandle = <0x37>; - }; - }; - - i2s1 { - - i2s1-2ch-mclk { - rockchip,pins = <0x02 0x13 0x01 0xb1>; - phandle = <0x68>; - }; - - i2s1-2ch-sclk { - rockchip,pins = <0x02 0x12 0x01 0xb1>; - phandle = <0x3c>; - }; - - i2s1-2ch-lrck { - rockchip,pins = <0x02 0x11 0x01 0xb1>; - phandle = <0x3d>; - }; - - i2s1-2ch-sdi { - rockchip,pins = <0x02 0x15 0x01 0xb1>; - phandle = <0x3e>; - }; - - i2s1-2ch-sdo { - rockchip,pins = <0x02 0x14 0x01 0xb1>; - phandle = <0x3f>; - }; - }; - - i2s2 { - - i2s2-2ch-mclk { - rockchip,pins = <0x03 0x01 0x02 0xb1>; - phandle = <0x132>; - }; - - i2s2-2ch-sclk { - rockchip,pins = <0x03 0x02 0x02 0xb1>; - phandle = <0x40>; - }; - - i2s2-2ch-lrck { - rockchip,pins = <0x03 0x03 0x02 0xb1>; - phandle = <0x41>; - }; - - i2s2-2ch-sdi { - rockchip,pins = <0x03 0x05 0x02 0xb1>; - phandle = <0x42>; - }; - - i2s2-2ch-sdo { - rockchip,pins = <0x03 0x07 0x02 0xb1>; - phandle = <0x43>; - }; - }; - - sdmmc { - - sdmmc-clk { - rockchip,pins = <0x01 0x1e 0x01 0xb6>; - phandle = <0x8f>; - }; - - sdmmc-cmd { - rockchip,pins = <0x01 0x1f 0x01 0xb4>; - phandle = <0x90>; - }; - - sdmmc-det { - rockchip,pins = <0x00 0x03 0x01 0xb4>; - phandle = <0x91>; - }; - - sdmmc-bus1 { - rockchip,pins = <0x01 0x1a 0x01 0xb4>; - phandle = <0x133>; - }; - - sdmmc-bus4 { - rockchip,pins = <0x01 0x1a 0x01 0xb4 0x01 0x1b 0x01 0xb4 0x01 0x1c 0x01 0xb4 0x01 0x1d 0x01 0xb4>; - phandle = <0x92>; - }; - - sdmmc-gpio { - rockchip,pins = <0x01 0x1a 0x00 0xb3 0x01 0x1b 0x00 0xb3 0x01 0x1c 0x00 0xb3 0x01 0x1d 0x00 0xb3 0x01 0x1e 0x00 0xb3 0x01 0x1f 0x00 0xb3>; - phandle = <0x134>; - }; - }; - - sdio { - - sdio-clk { - rockchip,pins = <0x01 0x15 0x01 0xb1>; - phandle = <0x96>; - }; - - sdio-cmd { - rockchip,pins = <0x01 0x14 0x01 0xb2>; - phandle = <0x95>; - }; - - sdio-bus4 { - rockchip,pins = <0x01 0x16 0x01 0xb2 0x01 0x17 0x01 0xb2 0x01 0x18 0x01 0xb2 0x01 0x19 0x01 0xb2>; - phandle = <0x94>; - }; - - sdio-gpio { - rockchip,pins = <0x01 0x16 0x00 0xb2 0x01 0x17 0x00 0xb2 0x01 0x18 0x00 0xb2 0x01 0x19 0x00 0xb2 0x01 0x14 0x00 0xb2 0x01 0x15 0x00 0xb2>; - phandle = <0x135>; - }; - }; - - emmc { - - emmc-clk { - rockchip,pins = <0x01 0x09 0x02 0xb6>; - phandle = <0x136>; - }; - - emmc-cmd { - rockchip,pins = <0x01 0x0a 0x02 0xb4>; - phandle = <0x137>; - }; - - emmc-pwren { - rockchip,pins = <0x01 0x08 0x02 0xb1>; - phandle = <0x138>; - }; - - emmc-rstnout { - rockchip,pins = <0x01 0x0b 0x02 0xb1>; - phandle = <0x139>; - }; - - emmc-bus1 { - rockchip,pins = <0x01 0x00 0x02 0xb4>; - phandle = <0x13a>; - }; - - emmc-bus4 { - rockchip,pins = <0x01 0x00 0x02 0xb4 0x01 0x01 0x02 0xb4 0x01 0x02 0x02 0xb4 0x01 0x03 0x02 0xb4>; - phandle = <0x13b>; - }; - - emmc-bus8 { - rockchip,pins = <0x01 0x00 0x02 0xb4 0x01 0x01 0x02 0xb4 0x01 0x02 0x02 0xb4 0x01 0x03 0x02 0xb4 0x01 0x04 0x02 0xb4 0x01 0x05 0x02 0xb4 0x01 0x06 0x02 0xb4 0x01 0x07 0x02 0xb4>; - phandle = <0x13c>; - }; - }; - - flash { - - flash-cs0 { - rockchip,pins = <0x01 0x08 0x01 0xb1>; - phandle = <0x13d>; - }; - - flash-rdy { - rockchip,pins = <0x01 0x09 0x01 0xb1>; - phandle = <0x13e>; - }; - - flash-dqs { - rockchip,pins = <0x01 0x0a 0x01 0xb1>; - phandle = <0x13f>; - }; - - flash-ale { - rockchip,pins = <0x01 0x0b 0x01 0xb1>; - phandle = <0x140>; - }; - - flash-cle { - rockchip,pins = <0x01 0x0c 0x01 0xb1>; - phandle = <0x141>; - }; - - flash-wrn { - rockchip,pins = <0x01 0x0d 0x01 0xb1>; - phandle = <0x142>; - }; - - flash-csl { - rockchip,pins = <0x01 0x0e 0x01 0xb1>; - phandle = <0x143>; - }; - - flash-rdn { - rockchip,pins = <0x01 0x0f 0x01 0xb1>; - phandle = <0x144>; - }; - - flash-bus8 { - rockchip,pins = <0x01 0x00 0x01 0xb7 0x01 0x01 0x01 0xb7 0x01 0x02 0x01 0xb7 0x01 0x03 0x01 0xb7 0x01 0x04 0x01 0xb7 0x01 0x05 0x01 0xb7 0x01 0x06 0x01 0xb7 0x01 0x07 0x01 0xb7>; - phandle = <0x145>; - }; - }; - - lcdc { - - lcdc-m0-rgb-pins { - rockchip,pins = <0x03 0x00 0x01 0xb6 0x03 0x01 0x01 0xb6 0x03 0x02 0x01 0xb6 0x03 0x03 0x01 0xb6 0x03 0x04 0x01 0xb6 0x03 0x05 0x01 0xb6 0x03 0x06 0x01 0xb6 0x03 0x07 0x01 0xb6 0x03 0x08 0x01 0xb6 0x03 0x09 0x01 0xb6 0x03 0x0a 0x01 0xb6 0x03 0x0b 0x01 0xb6 0x03 0x0c 0x01 0xb6 0x03 0x0d 0x01 0xb6 0x03 0x0e 0x01 0xb6 0x03 0x0f 0x01 0xb6 0x03 0x10 0x01 0xb6 0x03 0x11 0x01 0xb6 0x03 0x12 0x01 0xb6 0x03 0x13 0x01 0xb6 0x03 0x14 0x01 0xb6 0x03 0x15 0x01 0xb6 0x03 0x16 0x01 0xb6 0x03 0x17 0x01 0xb6 0x03 0x18 0x01 0xb6 0x03 0x19 0x01 0xb6 0x03 0x1a 0x01 0xb6 0x03 0x1b 0x01 0xb6>; - phandle = <0x146>; - }; - - lcdc-m0-sleep-pins { - rockchip,pins = <0x03 0x00 0x00 0xb1 0x03 0x01 0x00 0xb1 0x03 0x02 0x00 0xb1 0x03 0x03 0x00 0xb1 0x03 0x04 0x00 0xb1 0x03 0x05 0x00 0xb1 0x03 0x06 0x00 0xb1 0x03 0x07 0x00 0xb1 0x03 0x08 0x00 0xb1 0x03 0x09 0x00 0xb1 0x03 0x0a 0x00 0xb1 0x03 0x0b 0x00 0xb1 0x03 0x0c 0x00 0xb1 0x03 0x0d 0x00 0xb1 0x03 0x0e 0x00 0xb1 0x03 0x0f 0x00 0xb1 0x03 0x10 0x00 0xb1 0x03 0x11 0x00 0xb1 0x03 0x12 0x00 0xb1 0x03 0x13 0x00 0xb1 0x03 0x14 0x00 0xb1 0x03 0x15 0x00 0xb1 0x03 0x16 0x00 0xb1 0x03 0x17 0x00 0xb1 0x03 0x18 0x00 0xb1 0x03 0x19 0x00 0xb1 0x03 0x1a 0x00 0xb1 0x03 0x1b 0x00 0xb1>; - phandle = <0x147>; - }; - - lcdc-m1-rgb-pins { - rockchip,pins = <0x03 0x00 0x01 0xb6 0x03 0x04 0x01 0xb6 0x03 0x06 0x01 0xb6 0x03 0x0a 0x01 0xb6 0x03 0x0b 0x01 0xb6 0x03 0x0d 0x01 0xb6 0x03 0x10 0x01 0xb6 0x03 0x11 0x01 0xb6 0x03 0x12 0x01 0xb6 0x03 0x13 0x01 0xb6 0x03 0x14 0x01 0xb6 0x03 0x15 0x01 0xb6 0x03 0x16 0x01 0xb6 0x03 0x17 0x01 0xb6 0x03 0x18 0x01 0xb6 0x03 0x19 0x01 0xb6 0x03 0x1a 0x01 0xb6 0x03 0x1b 0x01 0xb6>; - phandle = <0x4d>; - }; - - lcdc-m1-sleep-pins { - rockchip,pins = <0x03 0x00 0x00 0xb1 0x03 0x04 0x00 0xb1 0x03 0x06 0x00 0xb1 0x03 0x0a 0x00 0xb1 0x03 0x0b 0x00 0xb1 0x03 0x0d 0x00 0xb1 0x03 0x10 0x00 0xb1 0x03 0x11 0x00 0xb1 0x03 0x12 0x00 0xb1 0x03 0x13 0x00 0xb1 0x03 0x14 0x00 0xb1 0x03 0x15 0x00 0xb1 0x03 0x16 0x00 0xb1 0x03 0x17 0x00 0xb1 0x03 0x18 0x00 0xb1 0x03 0x19 0x00 0xb1 0x03 0x1a 0x00 0xb1 0x03 0x1b 0x00 0xb1>; - phandle = <0x4e>; - }; - }; - - pwm0 { - - pwm0-pin { - rockchip,pins = <0x00 0x0f 0x01 0xb1>; - phandle = <0x7b>; - }; - }; - - pwm1 { - - pwm1-pin { - rockchip,pins = <0x00 0x10 0x01 0xb1>; - phandle = <0x7c>; - }; - }; - - pwm2 { - - pwm2-pin { - rockchip,pins = <0x02 0x0d 0x01 0xb1>; - phandle = <0x7d>; - }; - }; - - pwm3 { - - pwm3-pin { - rockchip,pins = <0x00 0x11 0x01 0xb1>; - phandle = <0x7e>; - }; - }; - - pwm4 { - - pwm4-pin { - rockchip,pins = <0x03 0x12 0x03 0xb1>; - phandle = <0x7f>; - }; - }; - - pwm5 { - - pwm5-pin { - rockchip,pins = <0x03 0x13 0x03 0xb1>; - phandle = <0x80>; - }; - }; - - pwm6 { - - pwm6-pin { - rockchip,pins = <0x03 0x14 0x03 0xb1>; - phandle = <0x81>; - }; - }; - - pwm7 { - - pwm7-pin { - rockchip,pins = <0x03 0x15 0x03 0xb1>; - phandle = <0x82>; - }; - }; - - gmac { - - rmii-pins { - rockchip,pins = <0x02 0x00 0x02 0xb8 0x02 0x01 0x02 0xb8 0x02 0x02 0x02 0xb8 0x02 0x03 0x02 0xb1 0x02 0x04 0x02 0xb1 0x02 0x05 0x02 0xb1 0x02 0x06 0x02 0xb1 0x02 0x07 0x02 0xb1 0x02 0x09 0x02 0xb1>; - phandle = <0x8d>; - }; - - mac-refclk-12ma { - rockchip,pins = <0x02 0x0a 0x02 0xb8>; - phandle = <0x8e>; - }; - - mac-refclk { - rockchip,pins = <0x02 0x0a 0x02 0xb1>; - phandle = <0x148>; - }; - }; - - cif-m0 { - - cif-clkout-m0 { - rockchip,pins = <0x02 0x0b 0x01 0xb8>; - phandle = <0xa7>; - }; - - dvp-d2d9-m0 { - rockchip,pins = <0x02 0x00 0x01 0xb1 0x02 0x01 0x01 0xb1 0x02 0x02 0x01 0xb1 0x02 0x03 0x01 0xb1 0x02 0x04 0x01 0xb1 0x02 0x05 0x01 0xb1 0x02 0x06 0x01 0xb1 0x02 0x07 0x01 0xb1 0x02 0x08 0x01 0xb1 0x02 0x09 0x01 0xb1 0x02 0x0a 0x01 0xb1 0x02 0x0b 0x01 0xb1>; - phandle = <0xa5>; - }; - - dvp-d0d1-m0 { - rockchip,pins = <0x02 0x0c 0x01 0xb1 0x02 0x0e 0x01 0xb1>; - phandle = <0xa9>; - }; - - d10-d11-m0 { - rockchip,pins = <0x02 0x0f 0x01 0xb1 0x02 0x10 0x01 0xb1>; - phandle = <0xa8>; - }; - }; - - cif-m1 { - - cif-clkout-m1 { - rockchip,pins = <0x03 0x18 0x03 0xb1>; - phandle = <0x149>; - }; - - dvp-d2d9-m1 { - rockchip,pins = <0x03 0x03 0x03 0xb1 0x03 0x05 0x03 0xb1 0x03 0x07 0x03 0xb1 0x03 0x08 0x03 0xb1 0x03 0x09 0x03 0xb1 0x03 0x0c 0x03 0xb1 0x03 0x0e 0x03 0xb1 0x03 0x0f 0x03 0xb1 0x03 0x19 0x03 0xb1 0x03 0x1a 0x03 0xb1 0x03 0x1b 0x03 0xb1 0x03 0x18 0x03 0xb1>; - phandle = <0x14a>; - }; - - dvp-d0d1-m1 { - rockchip,pins = <0x03 0x01 0x03 0xb1 0x03 0x02 0x03 0xb1>; - phandle = <0x14b>; - }; - - d10-d11-m1 { - rockchip,pins = <0x03 0x16 0x03 0xb1 0x03 0x17 0x03 0xb1>; - phandle = <0x14c>; - }; - }; - - isp { - - isp-prelight { - rockchip,pins = <0x03 0x19 0x04 0xb1>; - phandle = <0x14d>; - }; - }; - - pmic { - - pmic_int { - rockchip,pins = <0x00 0x0a 0x00 0xb2 0x00 0x0b 0x00 0xb1>; - phandle = <0x5d>; - }; - - soc_slppin_gpio { - rockchip,pins = <0x00 0x04 0x00 0xb9>; - phandle = <0x60>; - }; - - soc_slppin_slp { - rockchip,pins = <0x00 0x04 0x01 0xb1>; - phandle = <0x5e>; - }; - - soc_slppin_rst { - rockchip,pins = <0x00 0x04 0x02 0xb1>; - phandle = <0x62>; - }; - }; - - leds { - - led-pins { - rockchip,pins = <0x00 0x11 0x00 0xb1>; - phandle = <0xc0>; - }; - }; - - btns { - - btn-pins { - rockchip,pins = <0x01 0x0c 0x00 0xb2 0x01 0x0d 0x00 0xb2 0x01 0x0e 0x00 0xb2 0x01 0x0f 0x00 0xb2 0x01 0x02 0x00 0xb2 0x01 0x05 0x00 0xb2 0x01 0x06 0x00 0xb2 0x01 0x07 0x00 0xb2 0x02 0x00 0x00 0xb2 0x02 0x01 0x00 0xb2 0x02 0x02 0x00 0xb2 0x02 0x03 0x00 0xb2 0x02 0x04 0x00 0xb2 0x02 0x05 0x00 0xb2 0x02 0x06 0x00 0xb2 0x02 0x07 0x00 0xb2 0x03 0x09 0x00 0xb2 0x03 0x0a 0x00 0xb2 0x03 0x0c 0x00 0xb2 0x03 0x0f 0x00 0xb2>; - phandle = <0xbd>; - }; - }; - }; - - chosen { - bootargs = [00]; - }; - - fiq-debugger { - compatible = "rockchip,fiq-debugger"; - rockchip,serial-id = <0x02>; - rockchip,wake-irq = <0x00>; - rockchip,irq-mode-enable = <0x00>; - rockchip,baudrate = <0x1c200>; - interrupts = <0x00 0x7f 0x08>; - pinctrl-names = "default"; - pinctrl-0 = <0xba>; - status = "okay"; - }; - - ramoops { - compatible = "ramoops"; - record-size = <0x00 0x20000>; - console-size = <0x00 0x80000>; - ftrace-size = <0x00 0x00>; - pmsg-size = <0x00 0x00>; - memory-region = <0xbb>; - }; - - reserved-memory { - #address-cells = <0x02>; - #size-cells = <0x02>; - ranges; - - drm-logo@00000000 { - compatible = "rockchip,drm-logo"; - reg = <0x00 0x00 0x00 0x00>; - phandle = <0x11>; - }; - - region@110000 { - reg = <0x00 0x110000 0x00 0xf0000>; - reg-names = "ramoops_mem"; - phandle = <0xbb>; - }; - }; - - odroidgo3-keys { - compatible = "gpio-keys"; - #address-cells = <0x01>; - #size-cells = <0x00>; - autorepeat; - phandle = <0x14e>; - - button@0 { - label = "GPIO BTN-VOLUP"; - linux,code = <0x73>; - gpios = <0x66 0x00 0x01>; - }; - - button@1 { - label = "GPIO BTN-VOLDN"; - linux,code = <0x72>; - gpios = <0x66 0x01 0x01>; - }; - }; - - odroidgo3-joypad { - compatible = "odroidgo3-joypad"; - pwms = <0xbc 0x00 0xbebc200 0x00>; - pwm-names = "enable"; - rumble-boost-weak = <0x00>; - rumble-boost-strong = <0x00>; - joypad-name = "GO-Super Gamepad"; - joypad-product = <0x1100>; - joypad-revision = <0x100>; - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <0xbd>; - pinctrl-1 = <0x7b>; - io-channel-names = "amux_adc"; - io-channels = <0xbe 0x01>; - amux-count = <0x04>; - amux-a-gpios = <0x97 0x0b 0x01>; - amux-b-gpios = <0x97 0x08 0x01>; - amux-en-gpios = <0x97 0x0d 0x01>; - button-adc-scale = <0x02>; - button-adc-deadzone = <0x40>; - button-adc-fuzz = <0x20>; - button-adc-flat = <0x20>; - abs_x-p-tuning = <0xc8>; - abs_x-n-tuning = <0xc8>; - abs_y-p-tuning = <0xc8>; - abs_y-n-tuning = <0xc8>; - abs_rx-p-tuning = <0xc8>; - abs_rx-n-tuning = <0xc8>; - abs_ry-p-tuning = <0xc8>; - abs_ry-n-tuning = <0xc8>; - poll-interval = <0x0a>; - invert-absx; - invert-absy; - phandle = <0x14f>; - - sw1 { - gpios = <0xbf 0x0c 0x01>; - label = "GPIO DPAD-UP"; - linux,code = <0x220>; - }; - - sw2 { - gpios = <0xbf 0x0d 0x01>; - label = "GPIO DPAD-DOWN"; - linux,code = <0x221>; - }; - - sw3 { - gpios = <0xbf 0x0e 0x01>; - label = "GPIO DPAD-LEFT"; - linux,code = <0x222>; - }; - - sw4 { - gpios = <0xbf 0x0f 0x01>; - label = "GPIO DPAD-RIGHT"; - linux,code = <0x223>; - }; - - sw5 { - gpios = <0xbf 0x02 0x01>; - label = "GPIO KEY BTN-A"; - linux,code = <0x131>; - }; - - sw6 { - gpios = <0xbf 0x05 0x01>; - label = "GPIO BTN-B"; - linux,code = <0x130>; - }; - - sw7 { - gpios = <0xbf 0x06 0x01>; - label = "GPIO BTN-Y"; - linux,code = <0x134>; - }; - - sw8 { - gpios = <0xbf 0x07 0x01>; - label = "GPIO BTN-X"; - linux,code = <0x133>; - }; - - sw11 { - gpios = <0x66 0x02 0x01>; - label = "GPIO F3"; - linux,code = <0x2c2>; - }; - - sw12 { - gpios = <0x66 0x03 0x01>; - label = "GPIO F4"; - linux,code = <0x2c3>; - }; - - sw13 { - gpios = <0x66 0x04 0x01>; - label = "GPIO F5"; - linux,code = <0x2c4>; - }; - - sw15 { - gpios = <0x66 0x06 0x01>; - label = "GPIO TOP-LEFT"; - linux,code = <0x136>; - }; - - sw16 { - gpios = <0x66 0x07 0x01>; - label = "GPIO TOP-RIGHT"; - linux,code = <0x137>; - }; - - sw19 { - gpios = <0x97 0x09 0x01>; - label = "GPIO F1"; - linux,code = <0x2c0>; - }; - - sw20 { - gpios = <0x97 0x0f 0x01>; - label = "GPIO TOP-RIGHT2"; - linux,code = <0x139>; - }; - - sw21 { - gpios = <0x97 0x0a 0x01>; - label = "GPIO TOP-LEFT2"; - linux,code = <0x138>; - }; - - sw22 { - gpios = <0x97 0x0c 0x01>; - label = "GPIO F2"; - linux,code = <0x2c1>; - }; - }; - - gpio_leds { - compatible = "gpio-leds"; - pinctrl-names = "led_pins"; - pinctrl-0 = <0xc0>; - phandle = <0x150>; - - heartbeat { - label = "blue:heartbeat"; - gpios = <0x5c 0x11 0x00>; - linux,default-trigger = "heartbeat"; - }; - }; - - backlight { - compatible = "pwm-backlight"; - pwms = <0xc1 0x00 0x9c40 0x00>; - brightness-levels = <0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f 0x20 0x21 0x22 0x23 0x24 0x25 0x26 0x27 0x28 0x29 0x2a 0x2b 0x2c 0x2d 0x2e 0x2f 0x30 0x31 0x32 0x33 0x34 0x35 0x36 0x37 0x38 0x39 0x3a 0x3b 0x3c 0x3d 0x3e 0x3f 0x40 0x41 0x42 0x43 0x44 0x45 0x46 0x47 0x48 0x49 0x4a 0x4b 0x4c 0x4d 0x4e 0x4f 0x50 0x51 0x52 0x53 0x54 0x55 0x56 0x57 0x58 0x59 0x5a 0x5b 0x5c 0x5d 0x5e 0x5f 0x60 0x61 0x62 0x63 0x64 0x65 0x66 0x67 0x68 0x69 0x6a 0x6b 0x6c 0x6d 0x6e 0x6f 0x70 0x71 0x72 0x73 0x74 0x75 0x76 0x77 0x78 0x79 0x7a 0x7b 0x7c 0x7d 0x7e 0x7f 0x80 0x81 0x82 0x83 0x84 0x85 0x86 0x87 0x88 0x89 0x8a 0x8b 0x8c 0x8d 0x8e 0x8f 0x90 0x91 0x92 0x93 0x94 0x95 0x96 0x97 0x98 0x99 0x9a 0x9b 0x9c 0x9d 0x9e 0x9f 0xa0>; - default-brightness-level = <0x50>; - phandle = <0x9d>; - }; - - rk817-sound { - compatible = "simple-audio-card"; - simple-audio-card,format = "i2s"; - simple-audio-card,name = "rockchip,rk817-codec"; - simple-audio-card,mclk-fs = <0x100>; - simple-audio-card,widgets = "Microphone\0Mic Jack\0Headphone\0Headphone Jack"; - simple-audio-card,routing = "MIC_IN\0Mic Jack\0Headphone Jack\0HPOL\0Headphone Jack\0HPOR"; - simple-audio-card,hp-det-gpio = <0x66 0x16 0x01>; - simple-audio-card,codec-hp-det = <0x01>; - - simple-audio-card,cpu { - sound-dai = <0xc2>; - }; - - simple-audio-card,codec { - sound-dai = <0xc3>; - }; - }; - - vccsys { - compatible = "regulator-fixed"; - regulator-name = "vcc3v8_sys"; - regulator-always-on; - regulator-min-microvolt = <0x39fbc0>; - regulator-max-microvolt = <0x39fbc0>; - phandle = <0x64>; - }; - - __symbols__ { - ddr_timing = "/ddr_timing"; - cpu0 = "/cpus/cpu@0"; - cpu1 = "/cpus/cpu@1"; - cpu2 = "/cpus/cpu@2"; - cpu3 = "/cpus/cpu@3"; - CPU_SLEEP = "/cpus/idle-states/cpu-sleep"; - CLUSTER_SLEEP = "/cpus/idle-states/cluster-sleep"; - cpu0_opp_table = "/cpu0-opp-table"; - bus_soc = "/bus-soc"; - bus_apll = "/bus-apll"; - bus_apll_opp_table = "/bus-apll-opp-table"; - display_subsystem = "/display-subsystem"; - route_lvds = "/display-subsystem/route/route-lvds"; - route_dsi = "/display-subsystem/route/route-dsi"; - route_rgb = "/display-subsystem/route/route-rgb"; - gmac_clkin = "/external-gmac-clock"; - rockchip_suspend = "/rockchip-suspend"; - xin24m = "/xin24m"; - xin32k = "/xin32k"; - pmu = "/power-management@ff000000"; - power = "/power-management@ff000000/power-controller"; - pmugrf = "/syscon@ff010000"; - pmu_io_domains = "/syscon@ff010000/io-domains"; - pmu_pvtm = "/syscon@ff010000/pmu-pvtm"; - uart0 = "/serial@ff030000"; - i2s0_8ch = "/i2s@ff060000"; - i2s1_2ch = "/i2s@ff070000"; - i2s2_2ch = "/i2s@ff080000"; - pdm = "/pdm@ff0a0000"; - crypto = "/crypto@ff0b0000"; - rng = "/rng@ff0b0000"; - gic = "/interrupt-controller@ff131000"; - grf = "/syscon@ff140000"; - io_domains = "/syscon@ff140000/io-domains"; - lvds = "/syscon@ff140000/lvds"; - lvds_in_vopb = "/syscon@ff140000/lvds/ports/port@0/endpoint@0"; - rgb = "/syscon@ff140000/rgb"; - rgb_in_vopb = "/syscon@ff140000/rgb/ports/port@0/endpoint@0"; - core_grf = "/syscon@ff148000"; - pvtm = "/syscon@ff148000/pvtm"; - uart1 = "/serial@ff158000"; - uart2 = "/serial@ff160000"; - uart3 = "/serial@ff168000"; - uart4 = "/serial@ff170000"; - uart5 = "/serial@ff178000"; - i2c0 = "/i2c@ff180000"; - rk817 = "/i2c@ff180000/pmic@20"; - pinctrl_rk8xx = "/i2c@ff180000/pmic@20/pinctrl_rk8xx"; - rk817_ts_gpio1 = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_ts_gpio1"; - rk817_gt_gpio2 = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_gt_gpio2"; - rk817_pin_ts = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_pin_ts"; - rk817_pin_gt = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_pin_gt"; - rk817_slppin_null = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_slppin_null"; - rk817_slppin_slp = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_slppin_slp"; - rk817_slppin_pwrdn = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_slppin_pwrdn"; - rk817_slppin_rst = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_slppin_rst"; - vdd_logic = "/i2c@ff180000/pmic@20/regulators/DCDC_REG1"; - vdd_arm = "/i2c@ff180000/pmic@20/regulators/DCDC_REG2"; - vcc_ddr = "/i2c@ff180000/pmic@20/regulators/DCDC_REG3"; - vcc_3v3 = "/i2c@ff180000/pmic@20/regulators/DCDC_REG4"; - vcc_1v0 = "/i2c@ff180000/pmic@20/regulators/LDO_REG1"; - vcc1v8_soc = "/i2c@ff180000/pmic@20/regulators/LDO_REG2"; - vdd1v0_soc = "/i2c@ff180000/pmic@20/regulators/LDO_REG3"; - vcc3v3_pmu = "/i2c@ff180000/pmic@20/regulators/LDO_REG4"; - vccio_sd = "/i2c@ff180000/pmic@20/regulators/LDO_REG5"; - vcc_sd = "/i2c@ff180000/pmic@20/regulators/LDO_REG6"; - vcc_backlight = "/i2c@ff180000/pmic@20/regulators/LDO_REG7"; - vcc_lcd = "/i2c@ff180000/pmic@20/regulators/LDO_REG8"; - dcdc_boost = "/i2c@ff180000/pmic@20/regulators/BOOST"; - otg_switch = "/i2c@ff180000/pmic@20/regulators/OTG_SWITCH"; - rk817_codec = "/i2c@ff180000/pmic@20/codec"; - i2c1 = "/i2c@ff190000"; - i2c2 = "/i2c@ff1a0000"; - i2c3 = "/i2c@ff1b0000"; - spi0 = "/spi@ff1d0000"; - spi1 = "/spi@ff1d8000"; - wdt = "/watchdog@ff1e0000"; - pwm0 = "/pwm@ff200000"; - pwm1 = "/pwm@ff200010"; - pwm2 = "/pwm@ff200020"; - pwm3 = "/pwm@ff200030"; - pwm4 = "/pwm@ff208000"; - pwm5 = "/pwm@ff208010"; - pwm6 = "/pwm@ff208020"; - pwm7 = "/pwm@ff208030"; - rktimer = "/rktimer@ff210000"; - dmac = "/amba/dmac@ff240000"; - thermal_zones = "/thermal-zones"; - soc_thermal = "/thermal-zones/soc-thermal"; - threshold = "/thermal-zones/soc-thermal/trips/trip-point-0"; - target = "/thermal-zones/soc-thermal/trips/trip-point-1"; - soc_crit = "/thermal-zones/soc-thermal/trips/soc-crit"; - gpu_thermal = "/thermal-zones/gpu-thermal"; - tsadc = "/tsadc@ff280000"; - saradc = "/saradc@ff288000"; - otp = "/otp@ff290000"; - otp_id = "/otp@ff290000/id@7"; - cpu_leakage = "/otp@ff290000/cpu-leakage@17"; - performance = "/otp@ff290000/performance@1e"; - cru = "/clock-controller@ff2b0000"; - cpu_boost = "/cpu-boost@ff2b8000"; - pmucru = "/pmu-clock-controller@ff2bc000"; - usb2phy_grf = "/syscon@ff2c0000"; - u2phy = "/syscon@ff2c0000/usb2-phy@100"; - u2phy_host = "/syscon@ff2c0000/usb2-phy@100/host-port"; - u2phy_otg = "/syscon@ff2c0000/usb2-phy@100/otg-port"; - video_phy = "/video-phy@ff2e0000"; - mipi_dphy_rx0 = "/mipi-dphy-rx0@ff2f0000"; - usb20_otg = "/usb@ff300000"; - usb_host0_ehci = "/usb@ff340000"; - usb_host0_ohci = "/usb@ff350000"; - gmac = "/ethernet@ff360000"; - sdmmc = "/dwmmc@ff370000"; - sdio = "/dwmmc@ff380000"; - emmc = "/dwmmc@ff390000"; - nandc0 = "/nandc@ff3b0000"; - sfc = "/sfc@ff3a0000"; - gpu = "/gpu@ff400000"; - gpu_opp_table = "/gpu-opp-table"; - hevc = "/hevc_service@ff440000"; - vpu = "/vpu_service@ff442000"; - vpu_combo = "/vpu_combo"; - hevc_mmu = "/iommu@ff440440"; - vpu_mmu = "/iommu@ff442800"; - dsi = "/dsi@ff450000"; - dsi_in_vopb = "/dsi@ff450000/ports/port@0/endpoint@0"; - timing0 = "/dsi@ff450000/panel@0/display-timings/60Hz"; - timing1 = "/dsi@ff450000/panel@0/display-timings/50Hz"; - timing2 = "/dsi@ff450000/panel@0/display-timings/75Hz"; - vopb = "/vop@ff460000"; - vopb_out = "/vop@ff460000/port"; - vopb_out_lvds = "/vop@ff460000/port/endpoint@0"; - vopb_out_dsi = "/vop@ff460000/port/endpoint@1"; - vopb_out_rgb = "/vop@ff460000/port/endpoint@2"; - vopb_mmu = "/iommu@ff460f00"; - rk_rga = "/rk_rga@ff480000"; - cif = "/cif@ff490000"; - cif_new = "/cif-new@ff490000"; - vip_mmu = "/iommu@ff490800"; - rk_isp = "/rk_isp@ff4a0000"; - rkisp1 = "/rkisp1@ff4a0000"; - isp_mmu = "/iommu@ff4a8000"; - qos_gmac = "/qos@ff518000"; - qos_gpu = "/qos@ff520000"; - qos_sdmmc = "/qos@ff52c000"; - qos_emmc = "/qos@ff538000"; - qos_nand = "/qos@ff538080"; - qos_sdio = "/qos@ff538100"; - qos_sfc = "/qos@ff538180"; - qos_usb_host = "/qos@ff540000"; - qos_usb_otg = "/qos@ff540080"; - qos_isp_128 = "/qos@ff548000"; - qos_isp_rd = "/qos@ff548080"; - qos_isp_wr = "/qos@ff548100"; - qos_isp_m1 = "/qos@ff548180"; - qos_vip = "/qos@ff548200"; - qos_rga_rd = "/qos@ff550000"; - qos_rga_wr = "/qos@ff550080"; - qos_vop_m0 = "/qos@ff550100"; - qos_vop_m1 = "/qos@ff550180"; - qos_vpu = "/qos@ff558000"; - qos_vpu_r128 = "/qos@ff558080"; - dfi = "/dfi@ff610000"; - dmc = "/dmc"; - ddr_power_model = "/dmc/ddr_power_model"; - dmc_opp_table = "/dmc-opp-table"; - rockchip_system_monitor = "/rockchip-system-monitor"; - pinctrl = "/pinctrl"; - gpio0 = "/pinctrl/gpio0@ff040000"; - gpio1 = "/pinctrl/gpio1@ff250000"; - gpio2 = "/pinctrl/gpio2@ff260000"; - gpio3 = "/pinctrl/gpio3@ff270000"; - pcfg_pull_up = "/pinctrl/pcfg-pull-up"; - pcfg_pull_down = "/pinctrl/pcfg-pull-down"; - pcfg_pull_none = "/pinctrl/pcfg-pull-none"; - pcfg_pull_none_2ma = "/pinctrl/pcfg-pull-none-2ma"; - pcfg_pull_up_2ma = "/pinctrl/pcfg-pull-up-2ma"; - pcfg_pull_up_4ma = "/pinctrl/pcfg-pull-up-4ma"; - pcfg_pull_none_4ma = "/pinctrl/pcfg-pull-none-4ma"; - pcfg_pull_down_4ma = "/pinctrl/pcfg-pull-down-4ma"; - pcfg_pull_none_8ma = "/pinctrl/pcfg-pull-none-8ma"; - pcfg_pull_up_8ma = "/pinctrl/pcfg-pull-up-8ma"; - pcfg_pull_none_12ma = "/pinctrl/pcfg-pull-none-12ma"; - pcfg_pull_up_12ma = "/pinctrl/pcfg-pull-up-12ma"; - pcfg_pull_none_smt = "/pinctrl/pcfg-pull-none-smt"; - pcfg_output_high = "/pinctrl/pcfg-output-high"; - pcfg_output_low = "/pinctrl/pcfg-output-low"; - pcfg_input_high = "/pinctrl/pcfg-input-high"; - pcfg_input = "/pinctrl/pcfg-input"; - i2c0_xfer = "/pinctrl/i2c0/i2c0-xfer"; - i2c1_xfer = "/pinctrl/i2c1/i2c1-xfer"; - i2c2_xfer = "/pinctrl/i2c2/i2c2-xfer"; - i2c3_xfer = "/pinctrl/i2c3/i2c3-xfer"; - tsadc_otp_gpio = "/pinctrl/tsadc/tsadc-otp-gpio"; - tsadc_otp_out = "/pinctrl/tsadc/tsadc-otp-out"; - uart0_xfer = "/pinctrl/uart0/uart0-xfer"; - uart0_cts = "/pinctrl/uart0/uart0-cts"; - uart0_rts = "/pinctrl/uart0/uart0-rts"; - uart0_rts_gpio = "/pinctrl/uart0/uart0-rts-gpio"; - uart1_xfer = "/pinctrl/uart1/uart1-xfer"; - uart1_cts = "/pinctrl/uart1/uart1-cts"; - uart1_rts = "/pinctrl/uart1/uart1-rts"; - uart1_rts_gpio = "/pinctrl/uart1/uart1-rts-gpio"; - uart2m0_xfer = "/pinctrl/uart2-m0/uart2m0-xfer"; - uart2m1_xfer = "/pinctrl/uart2-m1/uart2m1-xfer"; - uart3m0_xfer = "/pinctrl/uart3-m0/uart3m0-xfer"; - uart3m0_cts = "/pinctrl/uart3-m0/uart3m0-cts"; - uart3m0_rts = "/pinctrl/uart3-m0/uart3m0-rts"; - uart3m0_rts_gpio = "/pinctrl/uart3-m0/uart3m0-rts-gpio"; - uart3m1_xfer = "/pinctrl/uart3-m1/uart3m1-xfer"; - uart3m1_cts = "/pinctrl/uart3-m1/uart3m1-cts"; - uart3m1_rts = "/pinctrl/uart3-m1/uart3m1-rts"; - uart3m1_rts_gpio = "/pinctrl/uart3-m1/uart3m1-rts-gpio"; - uart4_xfer = "/pinctrl/uart4/uart4-xfer"; - uart4_cts = "/pinctrl/uart4/uart4-cts"; - uart4_rts = "/pinctrl/uart4/uart4-rts"; - uart5_xfer = "/pinctrl/uart5/uart5-xfer"; - uart5_cts = "/pinctrl/uart5/uart5-cts"; - uart5_rts = "/pinctrl/uart5/uart5-rts"; - spi0_clk = "/pinctrl/spi0/spi0-clk"; - spi0_csn = "/pinctrl/spi0/spi0-csn"; - spi0_miso = "/pinctrl/spi0/spi0-miso"; - spi0_mosi = "/pinctrl/spi0/spi0-mosi"; - spi0_clk_hs = "/pinctrl/spi0/spi0-clk-hs"; - spi0_miso_hs = "/pinctrl/spi0/spi0-miso-hs"; - spi0_mosi_hs = "/pinctrl/spi0/spi0-mosi-hs"; - spi1_clk = "/pinctrl/spi1/spi1-clk"; - spi1_csn0 = "/pinctrl/spi1/spi1-csn0"; - spi1_csn1 = "/pinctrl/spi1/spi1-csn1"; - spi1_miso = "/pinctrl/spi1/spi1-miso"; - spi1_mosi = "/pinctrl/spi1/spi1-mosi"; - spi1_clk_hs = "/pinctrl/spi1/spi1-clk-hs"; - spi1_miso_hs = "/pinctrl/spi1/spi1-miso-hs"; - spi1_mosi_hs = "/pinctrl/spi1/spi1-mosi-hs"; - pdm_clk0m0 = "/pinctrl/pdm/pdm-clk0m0"; - pdm_clk0m1 = "/pinctrl/pdm/pdm-clk0m1"; - pdm_clk1 = "/pinctrl/pdm/pdm-clk1"; - pdm_sdi0m0 = "/pinctrl/pdm/pdm-sdi0m0"; - pdm_sdi0m1 = "/pinctrl/pdm/pdm-sdi0m1"; - pdm_sdi1 = "/pinctrl/pdm/pdm-sdi1"; - pdm_sdi2 = "/pinctrl/pdm/pdm-sdi2"; - pdm_sdi3 = "/pinctrl/pdm/pdm-sdi3"; - pdm_clk0m0_sleep = "/pinctrl/pdm/pdm-clk0m0-sleep"; - pdm_clk0m_sleep1 = "/pinctrl/pdm/pdm-clk0m1-sleep"; - pdm_clk1_sleep = "/pinctrl/pdm/pdm-clk1-sleep"; - pdm_sdi0m0_sleep = "/pinctrl/pdm/pdm-sdi0m0-sleep"; - pdm_sdi0m1_sleep = "/pinctrl/pdm/pdm-sdi0m1-sleep"; - pdm_sdi1_sleep = "/pinctrl/pdm/pdm-sdi1-sleep"; - pdm_sdi2_sleep = "/pinctrl/pdm/pdm-sdi2-sleep"; - pdm_sdi3_sleep = "/pinctrl/pdm/pdm-sdi3-sleep"; - i2s0_8ch_mclk = "/pinctrl/i2s0/i2s0-8ch-mclk"; - i2s0_8ch_sclktx = "/pinctrl/i2s0/i2s0-8ch-sclktx"; - i2s0_8ch_sclkrx = "/pinctrl/i2s0/i2s0-8ch-sclkrx"; - i2s0_8ch_lrcktx = "/pinctrl/i2s0/i2s0-8ch-lrcktx"; - i2s0_8ch_lrckrx = "/pinctrl/i2s0/i2s0-8ch-lrckrx"; - i2s0_8ch_sdo0 = "/pinctrl/i2s0/i2s0-8ch-sdo0"; - i2s0_8ch_sdo1 = "/pinctrl/i2s0/i2s0-8ch-sdo1"; - i2s0_8ch_sdo2 = "/pinctrl/i2s0/i2s0-8ch-sdo2"; - i2s0_8ch_sdo3 = "/pinctrl/i2s0/i2s0-8ch-sdo3"; - i2s0_8ch_sdi0 = "/pinctrl/i2s0/i2s0-8ch-sdi0"; - i2s0_8ch_sdi1 = "/pinctrl/i2s0/i2s0-8ch-sdi1"; - i2s0_8ch_sdi2 = "/pinctrl/i2s0/i2s0-8ch-sdi2"; - i2s0_8ch_sdi3 = "/pinctrl/i2s0/i2s0-8ch-sdi3"; - i2s1_2ch_mclk = "/pinctrl/i2s1/i2s1-2ch-mclk"; - i2s1_2ch_sclk = "/pinctrl/i2s1/i2s1-2ch-sclk"; - i2s1_2ch_lrck = "/pinctrl/i2s1/i2s1-2ch-lrck"; - i2s1_2ch_sdi = "/pinctrl/i2s1/i2s1-2ch-sdi"; - i2s1_2ch_sdo = "/pinctrl/i2s1/i2s1-2ch-sdo"; - i2s2_2ch_mclk = "/pinctrl/i2s2/i2s2-2ch-mclk"; - i2s2_2ch_sclk = "/pinctrl/i2s2/i2s2-2ch-sclk"; - i2s2_2ch_lrck = "/pinctrl/i2s2/i2s2-2ch-lrck"; - i2s2_2ch_sdi = "/pinctrl/i2s2/i2s2-2ch-sdi"; - i2s2_2ch_sdo = "/pinctrl/i2s2/i2s2-2ch-sdo"; - sdmmc_clk = "/pinctrl/sdmmc/sdmmc-clk"; - sdmmc_cmd = "/pinctrl/sdmmc/sdmmc-cmd"; - sdmmc_det = "/pinctrl/sdmmc/sdmmc-det"; - sdmmc_bus1 = "/pinctrl/sdmmc/sdmmc-bus1"; - sdmmc_bus4 = "/pinctrl/sdmmc/sdmmc-bus4"; - sdmmc_gpio = "/pinctrl/sdmmc/sdmmc-gpio"; - sdio_clk = "/pinctrl/sdio/sdio-clk"; - sdio_cmd = "/pinctrl/sdio/sdio-cmd"; - sdio_bus4 = "/pinctrl/sdio/sdio-bus4"; - sdio_gpio = "/pinctrl/sdio/sdio-gpio"; - emmc_clk = "/pinctrl/emmc/emmc-clk"; - emmc_cmd = "/pinctrl/emmc/emmc-cmd"; - emmc_pwren = "/pinctrl/emmc/emmc-pwren"; - emmc_rstnout = "/pinctrl/emmc/emmc-rstnout"; - emmc_bus1 = "/pinctrl/emmc/emmc-bus1"; - emmc_bus4 = "/pinctrl/emmc/emmc-bus4"; - emmc_bus8 = "/pinctrl/emmc/emmc-bus8"; - flash_cs0 = "/pinctrl/flash/flash-cs0"; - flash_rdy = "/pinctrl/flash/flash-rdy"; - flash_dqs = "/pinctrl/flash/flash-dqs"; - flash_ale = "/pinctrl/flash/flash-ale"; - flash_cle = "/pinctrl/flash/flash-cle"; - flash_wrn = "/pinctrl/flash/flash-wrn"; - flash_csl = "/pinctrl/flash/flash-csl"; - flash_rdn = "/pinctrl/flash/flash-rdn"; - flash_bus8 = "/pinctrl/flash/flash-bus8"; - lcdc_m0_rgb_pins = "/pinctrl/lcdc/lcdc-m0-rgb-pins"; - lcdc_m0_sleep_pins = "/pinctrl/lcdc/lcdc-m0-sleep-pins"; - lcdc_m1_rgb_pins = "/pinctrl/lcdc/lcdc-m1-rgb-pins"; - lcdc_m1_sleep_pins = "/pinctrl/lcdc/lcdc-m1-sleep-pins"; - pwm0_pin = "/pinctrl/pwm0/pwm0-pin"; - pwm1_pin = "/pinctrl/pwm1/pwm1-pin"; - pwm2_pin = "/pinctrl/pwm2/pwm2-pin"; - pwm3_pin = "/pinctrl/pwm3/pwm3-pin"; - pwm4_pin = "/pinctrl/pwm4/pwm4-pin"; - pwm5_pin = "/pinctrl/pwm5/pwm5-pin"; - pwm6_pin = "/pinctrl/pwm6/pwm6-pin"; - pwm7_pin = "/pinctrl/pwm7/pwm7-pin"; - rmii_pins = "/pinctrl/gmac/rmii-pins"; - mac_refclk_12ma = "/pinctrl/gmac/mac-refclk-12ma"; - mac_refclk = "/pinctrl/gmac/mac-refclk"; - cif_clkout_m0 = "/pinctrl/cif-m0/cif-clkout-m0"; - dvp_d2d9_m0 = "/pinctrl/cif-m0/dvp-d2d9-m0"; - dvp_d0d1_m0 = "/pinctrl/cif-m0/dvp-d0d1-m0"; - dvp_d10d11_m0 = "/pinctrl/cif-m0/d10-d11-m0"; - cif_clkout_m1 = "/pinctrl/cif-m1/cif-clkout-m1"; - dvp_d2d9_m1 = "/pinctrl/cif-m1/dvp-d2d9-m1"; - dvp_d0d1_m1 = "/pinctrl/cif-m1/dvp-d0d1-m1"; - dvp_d10d11_m1 = "/pinctrl/cif-m1/d10-d11-m1"; - isp_prelight = "/pinctrl/isp/isp-prelight"; - pmic_int = "/pinctrl/pmic/pmic_int"; - soc_slppin_gpio = "/pinctrl/pmic/soc_slppin_gpio"; - soc_slppin_slp = "/pinctrl/pmic/soc_slppin_slp"; - soc_slppin_rst = "/pinctrl/pmic/soc_slppin_rst"; - led_pins = "/pinctrl/leds/led-pins"; - btn_pins = "/pinctrl/btns/btn-pins"; - drm_logo = "/reserved-memory/drm-logo@00000000"; - ramoops_mem = "/reserved-memory/region@110000"; - gpio_keys = "/odroidgo3-keys"; - joypad = "/odroidgo3-joypad"; - leds = "/gpio_leds"; - backlight = "/backlight"; - vccsys = "/vccsys"; - }; -}; diff --git a/config/archr-dts/R36S-DTB/DTS/Panel1.dts b/config/archr-dts/R36S-DTB/DTS/Panel1.dts deleted file mode 100644 index f72f03b8d7..0000000000 --- a/config/archr-dts/R36S-DTB/DTS/Panel1.dts +++ /dev/null @@ -1,4063 +0,0 @@ -/dts-v1/; - -/ { - compatible = "rockchip,rk3326-odroidgo3-linux\0rockchip,rk3326"; - interrupt-parent = <0x01>; - #address-cells = <0x02>; - #size-cells = <0x02>; - model = "Game Console R35S/R36S fix by AeolusUX"; - - ddr_timing { - compatible = "rockchip,ddr-timing"; - ddr2_speed_bin = <0x00>; - ddr3_speed_bin = <0x15>; - ddr4_speed_bin = <0x0c>; - pd_idle = <0x0d>; - sr_idle = <0x5d>; - sr_mc_gate_idle = <0x00>; - srpd_lite_idle = <0x00>; - standby_idle = <0x00>; - auto_pd_dis_freq = <0x42a>; - auto_sr_dis_freq = <0x320>; - ddr2_dll_dis_freq = <0x12c>; - ddr3_dll_dis_freq = <0x12c>; - ddr4_dll_dis_freq = <0x271>; - phy_dll_dis_freq = <0x190>; - ddr2_odt_dis_freq = <0x64>; - phy_ddr2_odt_dis_freq = <0x64>; - ddr2_drv = <0x01>; - ddr2_odt = <0x96>; - phy_ddr2_ca_drv = <0x15>; - phy_ddr2_ck_drv = <0x12>; - phy_ddr2_dq_drv = <0x15>; - phy_ddr2_odt = <0x02>; - ddr3_odt_dis_freq = <0x190>; - phy_ddr3_odt_dis_freq = <0x190>; - ddr3_drv = <0x28>; - ddr3_odt = <0x78>; - phy_ddr3_ca_drv = <0x15>; - phy_ddr3_ck_drv = <0x12>; - phy_ddr3_dq_drv = <0x15>; - phy_ddr3_odt = <0x02>; - phy_lpddr2_odt_dis_freq = <0x29a>; - lpddr2_drv = <0x28>; - phy_lpddr2_ca_drv = <0x16>; - phy_lpddr2_ck_drv = <0x13>; - phy_lpddr2_dq_drv = <0x16>; - phy_lpddr2_odt = <0x00>; - lpddr3_odt_dis_freq = <0x190>; - phy_lpddr3_odt_dis_freq = <0x190>; - lpddr3_drv = <0x28>; - lpddr3_odt = <0xf0>; - phy_lpddr3_ca_drv = <0x16>; - phy_lpddr3_ck_drv = <0x13>; - phy_lpddr3_dq_drv = <0x16>; - phy_lpddr3_odt = <0x02>; - lpddr4_odt_dis_freq = <0x320>; - phy_lpddr4_odt_dis_freq = <0x320>; - lpddr4_drv = <0x3c>; - lpddr4_dq_odt = <0x28>; - lpddr4_ca_odt = <0x28>; - phy_lpddr4_ca_drv = <0x14>; - phy_lpddr4_ck_cs_drv = <0x06>; - phy_lpddr4_dq_drv = <0x06>; - phy_lpddr4_odt = <0x10>; - ddr4_odt_dis_freq = <0x29a>; - phy_ddr4_odt_dis_freq = <0x29a>; - ddr4_drv = <0x22>; - ddr4_odt = <0xf0>; - phy_ddr4_ca_drv = <0x16>; - phy_ddr4_ck_drv = <0x13>; - phy_ddr4_dq_drv = <0x16>; - phy_ddr4_odt = <0x02>; - ddr3a1_ddr4a9_de-skew = <0x06>; - ddr3a0_ddr4a10_de-skew = <0x07>; - ddr3a3_ddr4a6_de-skew = <0x07>; - ddr3a2_ddr4a4_de-skew = <0x07>; - ddr3a5_ddr4a8_de-skew = <0x07>; - ddr3a4_ddr4a5_de-skew = <0x07>; - ddr3a7_ddr4a11_de-skew = <0x07>; - ddr3a6_ddr4a7_de-skew = <0x06>; - ddr3a9_ddr4a0_de-skew = <0x07>; - ddr3a8_ddr4a13_de-skew = <0x07>; - ddr3a11_ddr4a3_de-skew = <0x07>; - ddr3a10_ddr4cs0_de-skew = <0x07>; - ddr3a13_ddr4a2_de-skew = <0x07>; - ddr3a12_ddr4ba1_de-skew = <0x07>; - ddr3a15_ddr4odt0_de-skew = <0x07>; - ddr3a14_ddr4a1_de-skew = <0x07>; - ddr3ba1_ddr4a15_de-skew = <0x07>; - ddr3ba0_ddr4bg0_de-skew = <0x07>; - ddr3ras_ddr4cke_de-skew = <0x07>; - ddr3ba2_ddr4ba0_de-skew = <0x07>; - ddr3we_ddr4bg1_de-skew = <0x07>; - ddr3cas_ddr4a12_de-skew = <0x07>; - ddr3ckn_ddr4ckn_de-skew = <0x07>; - ddr3ckp_ddr4ckp_de-skew = <0x07>; - ddr3cke_ddr4a16_de-skew = <0x07>; - ddr3odt0_ddr4a14_de-skew = <0x07>; - ddr3cs0_ddr4act_de-skew = <0x06>; - ddr3reset_ddr4reset_de-skew = <0x07>; - ddr3cs1_ddr4cs1_de-skew = <0x06>; - ddr3odt1_ddr4odt1_de-skew = <0x07>; - cs0_dm0_rx_de-skew = <0x07>; - cs0_dm0_tx_de-skew = <0x07>; - cs0_dq0_rx_de-skew = <0x08>; - cs0_dq0_tx_de-skew = <0x08>; - cs0_dq1_rx_de-skew = <0x09>; - cs0_dq1_tx_de-skew = <0x08>; - cs0_dq2_rx_de-skew = <0x08>; - cs0_dq2_tx_de-skew = <0x08>; - cs0_dq3_rx_de-skew = <0x08>; - cs0_dq3_tx_de-skew = <0x08>; - cs0_dq4_rx_de-skew = <0x09>; - cs0_dq4_tx_de-skew = <0x08>; - cs0_dq5_rx_de-skew = <0x09>; - cs0_dq5_tx_de-skew = <0x08>; - cs0_dq6_rx_de-skew = <0x09>; - cs0_dq6_tx_de-skew = <0x08>; - cs0_dq7_rx_de-skew = <0x08>; - cs0_dq7_tx_de-skew = <0x08>; - cs0_dqs0_rx_de-skew = <0x06>; - cs0_dqs0p_tx_de-skew = <0x09>; - cs0_dqs0n_tx_de-skew = <0x09>; - cs0_dm1_rx_de-skew = <0x07>; - cs0_dm1_tx_de-skew = <0x06>; - cs0_dq8_rx_de-skew = <0x08>; - cs0_dq8_tx_de-skew = <0x07>; - cs0_dq9_rx_de-skew = <0x09>; - cs0_dq9_tx_de-skew = <0x07>; - cs0_dq10_rx_de-skew = <0x08>; - cs0_dq10_tx_de-skew = <0x08>; - cs0_dq11_rx_de-skew = <0x08>; - cs0_dq11_tx_de-skew = <0x07>; - cs0_dq12_rx_de-skew = <0x08>; - cs0_dq12_tx_de-skew = <0x08>; - cs0_dq13_rx_de-skew = <0x09>; - cs0_dq13_tx_de-skew = <0x07>; - cs0_dq14_rx_de-skew = <0x09>; - cs0_dq14_tx_de-skew = <0x08>; - cs0_dq15_rx_de-skew = <0x09>; - cs0_dq15_tx_de-skew = <0x07>; - cs0_dqs1_rx_de-skew = <0x07>; - cs0_dqs1p_tx_de-skew = <0x09>; - cs0_dqs1n_tx_de-skew = <0x09>; - cs0_dm2_rx_de-skew = <0x07>; - cs0_dm2_tx_de-skew = <0x07>; - cs0_dq16_rx_de-skew = <0x09>; - cs0_dq16_tx_de-skew = <0x09>; - cs0_dq17_rx_de-skew = <0x07>; - cs0_dq17_tx_de-skew = <0x09>; - cs0_dq18_rx_de-skew = <0x07>; - cs0_dq18_tx_de-skew = <0x08>; - cs0_dq19_rx_de-skew = <0x07>; - cs0_dq19_tx_de-skew = <0x09>; - cs0_dq20_rx_de-skew = <0x09>; - cs0_dq20_tx_de-skew = <0x09>; - cs0_dq21_rx_de-skew = <0x09>; - cs0_dq21_tx_de-skew = <0x09>; - cs0_dq22_rx_de-skew = <0x08>; - cs0_dq22_tx_de-skew = <0x09>; - cs0_dq23_rx_de-skew = <0x08>; - cs0_dq23_tx_de-skew = <0x09>; - cs0_dqs2_rx_de-skew = <0x06>; - cs0_dqs2p_tx_de-skew = <0x09>; - cs0_dqs2n_tx_de-skew = <0x09>; - cs0_dm3_rx_de-skew = <0x07>; - cs0_dm3_tx_de-skew = <0x07>; - cs0_dq24_rx_de-skew = <0x08>; - cs0_dq24_tx_de-skew = <0x08>; - cs0_dq25_rx_de-skew = <0x09>; - cs0_dq25_tx_de-skew = <0x09>; - cs0_dq26_rx_de-skew = <0x09>; - cs0_dq26_tx_de-skew = <0x08>; - cs0_dq27_rx_de-skew = <0x09>; - cs0_dq27_tx_de-skew = <0x08>; - cs0_dq28_rx_de-skew = <0x09>; - cs0_dq28_tx_de-skew = <0x09>; - cs0_dq29_rx_de-skew = <0x09>; - cs0_dq29_tx_de-skew = <0x09>; - cs0_dq30_rx_de-skew = <0x08>; - cs0_dq30_tx_de-skew = <0x08>; - cs0_dq31_rx_de-skew = <0x08>; - cs0_dq31_tx_de-skew = <0x08>; - cs0_dqs3_rx_de-skew = <0x07>; - cs0_dqs3p_tx_de-skew = <0x09>; - cs0_dqs3n_tx_de-skew = <0x09>; - cs1_dm0_rx_de-skew = <0x07>; - cs1_dm0_tx_de-skew = <0x07>; - cs1_dq0_rx_de-skew = <0x08>; - cs1_dq0_tx_de-skew = <0x08>; - cs1_dq1_rx_de-skew = <0x09>; - cs1_dq1_tx_de-skew = <0x08>; - cs1_dq2_rx_de-skew = <0x08>; - cs1_dq2_tx_de-skew = <0x08>; - cs1_dq3_rx_de-skew = <0x08>; - cs1_dq3_tx_de-skew = <0x08>; - cs1_dq4_rx_de-skew = <0x08>; - cs1_dq4_tx_de-skew = <0x08>; - cs1_dq5_rx_de-skew = <0x09>; - cs1_dq5_tx_de-skew = <0x08>; - cs1_dq6_rx_de-skew = <0x09>; - cs1_dq6_tx_de-skew = <0x08>; - cs1_dq7_rx_de-skew = <0x08>; - cs1_dq7_tx_de-skew = <0x08>; - cs1_dqs0_rx_de-skew = <0x06>; - cs1_dqs0p_tx_de-skew = <0x09>; - cs1_dqs0n_tx_de-skew = <0x09>; - cs1_dm1_rx_de-skew = <0x07>; - cs1_dm1_tx_de-skew = <0x07>; - cs1_dq8_rx_de-skew = <0x08>; - cs1_dq8_tx_de-skew = <0x08>; - cs1_dq9_rx_de-skew = <0x08>; - cs1_dq9_tx_de-skew = <0x07>; - cs1_dq10_rx_de-skew = <0x07>; - cs1_dq10_tx_de-skew = <0x08>; - cs1_dq11_rx_de-skew = <0x08>; - cs1_dq11_tx_de-skew = <0x08>; - cs1_dq12_rx_de-skew = <0x08>; - cs1_dq12_tx_de-skew = <0x07>; - cs1_dq13_rx_de-skew = <0x08>; - cs1_dq13_tx_de-skew = <0x08>; - cs1_dq14_rx_de-skew = <0x08>; - cs1_dq14_tx_de-skew = <0x08>; - cs1_dq15_rx_de-skew = <0x08>; - cs1_dq15_tx_de-skew = <0x07>; - cs1_dqs1_rx_de-skew = <0x07>; - cs1_dqs1p_tx_de-skew = <0x09>; - cs1_dqs1n_tx_de-skew = <0x09>; - cs1_dm2_rx_de-skew = <0x07>; - cs1_dm2_tx_de-skew = <0x08>; - cs1_dq16_rx_de-skew = <0x08>; - cs1_dq16_tx_de-skew = <0x09>; - cs1_dq17_rx_de-skew = <0x08>; - cs1_dq17_tx_de-skew = <0x09>; - cs1_dq18_rx_de-skew = <0x07>; - cs1_dq18_tx_de-skew = <0x08>; - cs1_dq19_rx_de-skew = <0x08>; - cs1_dq19_tx_de-skew = <0x09>; - cs1_dq20_rx_de-skew = <0x09>; - cs1_dq20_tx_de-skew = <0x09>; - cs1_dq21_rx_de-skew = <0x09>; - cs1_dq21_tx_de-skew = <0x09>; - cs1_dq22_rx_de-skew = <0x08>; - cs1_dq22_tx_de-skew = <0x09>; - cs1_dq23_rx_de-skew = <0x08>; - cs1_dq23_tx_de-skew = <0x09>; - cs1_dqs2_rx_de-skew = <0x06>; - cs1_dqs2p_tx_de-skew = <0x09>; - cs1_dqs2n_tx_de-skew = <0x09>; - cs1_dm3_rx_de-skew = <0x07>; - cs1_dm3_tx_de-skew = <0x07>; - cs1_dq24_rx_de-skew = <0x08>; - cs1_dq24_tx_de-skew = <0x09>; - cs1_dq25_rx_de-skew = <0x09>; - cs1_dq25_tx_de-skew = <0x09>; - cs1_dq26_rx_de-skew = <0x09>; - cs1_dq26_tx_de-skew = <0x08>; - cs1_dq27_rx_de-skew = <0x08>; - cs1_dq27_tx_de-skew = <0x08>; - cs1_dq28_rx_de-skew = <0x09>; - cs1_dq28_tx_de-skew = <0x09>; - cs1_dq29_rx_de-skew = <0x09>; - cs1_dq29_tx_de-skew = <0x09>; - cs1_dq30_rx_de-skew = <0x09>; - cs1_dq30_tx_de-skew = <0x08>; - cs1_dq31_rx_de-skew = <0x08>; - cs1_dq31_tx_de-skew = <0x08>; - cs1_dqs3_rx_de-skew = <0x07>; - cs1_dqs3p_tx_de-skew = <0x09>; - cs1_dqs3n_tx_de-skew = <0x09>; - phandle = <0xaf>; - }; - - aliases { - ethernet0 = "/ethernet@ff360000"; - i2c0 = "/i2c@ff180000"; - i2c1 = "/i2c@ff190000"; - i2c2 = "/i2c@ff1a0000"; - i2c3 = "/i2c@ff1b0000"; - serial0 = "/serial@ff030000"; - serial1 = "/serial@ff158000"; - serial2 = "/serial@ff160000"; - serial3 = "/serial@ff168000"; - serial4 = "/serial@ff170000"; - serial5 = "/serial@ff178000"; - spi0 = "/spi@ff1d0000"; - spi1 = "/spi@ff1d8000"; - }; - - cpus { - #address-cells = <0x02>; - #size-cells = <0x00>; - - cpu@0 { - device_type = "cpu"; - compatible = "arm,cortex-a35\0arm,armv8"; - reg = <0x00 0x00>; - enable-method = "psci"; - clocks = <0x02 0x07>; - #cooling-cells = <0x02>; - dynamic-power-coefficient = <0x5a>; - operating-points-v2 = <0x03>; - cpu-idle-states = <0x04 0x05>; - cpu-supply = <0x06>; - phandle = <0x09>; - }; - - cpu@1 { - device_type = "cpu"; - compatible = "arm,cortex-a35\0arm,armv8"; - reg = <0x00 0x01>; - enable-method = "psci"; - operating-points-v2 = <0x03>; - cpu-idle-states = <0x04 0x05>; - phandle = <0x0a>; - }; - - cpu@2 { - device_type = "cpu"; - compatible = "arm,cortex-a35\0arm,armv8"; - reg = <0x00 0x02>; - enable-method = "psci"; - operating-points-v2 = <0x03>; - cpu-idle-states = <0x04 0x05>; - phandle = <0x0b>; - }; - - cpu@3 { - device_type = "cpu"; - compatible = "arm,cortex-a35\0arm,armv8"; - reg = <0x00 0x03>; - enable-method = "psci"; - operating-points-v2 = <0x03>; - cpu-idle-states = <0x04 0x05>; - phandle = <0x0c>; - }; - - idle-states { - entry-method = "psci"; - - cpu-sleep { - compatible = "arm,idle-state"; - local-timer-stop; - arm,psci-suspend-param = <0x10000>; - entry-latency-us = <0x78>; - exit-latency-us = <0xfa>; - min-residency-us = <0x384>; - phandle = <0x04>; - }; - - cluster-sleep { - compatible = "arm,idle-state"; - local-timer-stop; - arm,psci-suspend-param = <0x1010000>; - entry-latency-us = <0x190>; - exit-latency-us = <0x1f4>; - min-residency-us = <0x7d0>; - phandle = <0x05>; - }; - }; - }; - - cpu0-opp-table { - compatible = "operating-points-v2"; - opp-shared; - rockchip,temp-hysteresis = <0x1388>; - rockchip,low-temp = <0x00>; - rockchip,low-temp-min-volt = <0xf4240>; - rockchip,low-temp-adjust-volt = <0x00 0x5e8 0xc350>; - clocks = <0x02 0x01>; - rockchip,avs-scale = <0x04>; - rockchip,max-volt = <0x149970>; - rockchip,evb-irdrop = <0x61a8>; - nvmem-cells = <0x07 0x08>; - nvmem-cell-names = "cpu_leakage\0performance"; - rockchip,bin-scaling-sel = <0x00 0x0d 0x01 0x0d>; - rockchip,pvtm-voltage-sel = <0x00 0xc350 0x00 0xc351 0xd2f0 0x01 0xd2f1 0xea60 0x02 0xea61 0x1869f 0x03>; - rockchip,pvtm-freq = <0x639c0>; - rockchip,pvtm-volt = <0xf4240>; - rockchip,pvtm-ch = <0x00 0x00>; - rockchip,pvtm-sample-time = <0x3e8>; - rockchip,pvtm-number = <0x0a>; - rockchip,pvtm-error = <0x3e8>; - rockchip,pvtm-ref-temp = <0x28>; - rockchip,pvtm-temp-prop = <0xffffffc8 0xffffffc8>; - rockchip,thermal-zone = "soc-thermal"; - rockchip,avs = <0x01>; - phandle = <0x03>; - - opp-1008000000 { - opp-hz = <0x00 0x3c14dc00>; - opp-microvolt = <0x11edd8 0x11edd8 0x149970>; - opp-microvolt-L0 = <0x11edd8 0x11edd8 0x149970>; - opp-microvolt-L1 = <0x112a88 0x112a88 0x149970>; - opp-microvolt-L2 = <0x112a88 0x112a88 0x149970>; - opp-microvolt-L3 = <0x100590 0x100590 0x149970>; - clock-latency-ns = <0x9c40>; - }; - - opp-1200000000 { - opp-hz = <0x00 0x47868c00>; - opp-microvolt = <0x13d620 0x13d620 0x149970>; - opp-microvolt-L0 = <0x13d620 0x13d620 0x149970>; - opp-microvolt-L1 = <0x137478 0x137478 0x149970>; - opp-microvolt-L2 = <0x1312d0 0x1312d0 0x149970>; - opp-microvolt-L3 = <0x124f80 0x124f80 0x149970>; - clock-latency-ns = <0x9c40>; - }; - - opp-1248000000 { - opp-hz = <0x00 0x4a62f800>; - opp-microvolt = <0x149970 0x149970 0x149970>; - opp-microvolt-L0 = <0x149970 0x149970 0x149970>; - opp-microvolt-L1 = <0x13d620 0x13d620 0x149970>; - opp-microvolt-L2 = <0x137478 0x137478 0x149970>; - opp-microvolt-L3 = <0x12b128 0x12b128 0x149970>; - clock-latency-ns = <0x9c40>; - }; - - opp-1296000000 { - opp-hz = <0x00 0x4d3f6400>; - opp-microvolt = <0x149970 0x149970 0x149970>; - opp-microvolt-L0 = <0x149970 0x149970 0x149970>; - opp-microvolt-L1 = <0x149970 0x149970 0x149970>; - opp-microvolt-L2 = <0x13d620 0x13d620 0x149970>; - opp-microvolt-L3 = <0x1312d0 0x1312d0 0x149970>; - clock-latency-ns = <0x9c40>; - }; - - opp-1512000000 { - opp-hz = <0x00 0x5a1f4a00>; - opp-microvolt = <0x149970 0x149970 0x149970>; - opp-microvolt-L0 = <0x149970 0x149970 0x149970>; - opp-microvolt-L1 = <0x149970 0x149970 0x149970>; - opp-microvolt-L2 = <0x13d620 0x13d620 0x149970>; - opp-microvolt-L3 = <0x1312d0 0x1312d0 0x149970>; - clock-latency-ns = <0x9c40>; - }; - }; - - arm-pmu { - compatible = "arm,cortex-a53-pmu"; - interrupts = <0x00 0x64 0x04 0x00 0x65 0x04 0x00 0x66 0x04 0x00 0x67 0x04>; - interrupt-affinity = <0x09 0x0a 0x0b 0x0c>; - }; - - bus-soc { - compatible = "rockchip,px30-bus"; - rockchip,busfreq-policy = "autocs"; - phandle = <0xc4>; - - soc-bus0 { - bus-id = <0x00>; - timer-us = <0x14>; - enable-msk = <0x40f7>; - status = "disabled"; - }; - - soc-bus1 { - bus-id = <0x01>; - timer-us = <0xc8>; - enable-msk = <0x40bf>; - status = "disabled"; - }; - - soc-bus2 { - bus-id = <0x02>; - timer-us = <0xc8>; - enable-msk = <0x4007>; - status = "disabled"; - }; - }; - - bus-apll { - compatible = "rockchip,px30-bus"; - rockchip,busfreq-policy = "clkfreq"; - clocks = <0x02 0x01>; - clock-names = "bus"; - operating-points-v2 = <0x0d>; - status = "okay"; - bus-supply = <0x0e>; - phandle = <0xc5>; - }; - - bus-apll-opp-table { - compatible = "operating-points-v2"; - opp-shared; - phandle = <0x0d>; - - opp-1512000000 { - opp-hz = <0x00 0x5a1f4a00>; - opp-microvolt = <0xf4240>; - }; - - opp-1008000000 { - opp-hz = <0x00 0x3c14dc00>; - opp-microvolt = <0xe7ef0>; - }; - }; - - cpuinfo { - compatible = "rockchip,cpuinfo"; - nvmem-cells = <0x0f>; - nvmem-cell-names = "id"; - }; - - display-subsystem { - compatible = "rockchip,display-subsystem"; - ports = <0x10>; - status = "okay"; - logo-memory-region = <0x11>; - phandle = <0xc6>; - - route { - - route-lvds { - status = "disabled"; - logo,uboot = "logo.gif"; - logo,kernel = "logo_kernel.gif"; - logo,mode = "center"; - charge_logo,mode = "center"; - connect = <0x12>; - phandle = <0xc7>; - }; - - route-dsi { - status = "okay"; - logo,uboot = "logo.gif"; - logo,kernel = "logo_kernel.gif"; - logo,mode = "center"; - charge_logo,mode = "center"; - connect = <0x13>; - phandle = <0xc8>; - }; - - route-rgb { - status = "disabled"; - logo,uboot = "logo.gif"; - logo,kernel = "logo_kernel.gif"; - logo,mode = "center"; - charge_logo,mode = "center"; - connect = <0x14>; - phandle = <0xc9>; - }; - }; - }; - - firmware { - - optee { - compatible = "linaro,optee-tz"; - method = "smc"; - }; - }; - - external-gmac-clock { - compatible = "fixed-clock"; - clock-frequency = <0x2faf080>; - clock-output-names = "gmac_clkin"; - #clock-cells = <0x00>; - phandle = <0xca>; - }; - - psci { - compatible = "arm,psci-1.0"; - method = "smc"; - }; - - rockchip-suspend { - compatible = "rockchip,pm-px30"; - status = "okay"; - rockchip,sleep-debug-en = <0x01>; - rockchip,sleep-mode-config = <0x20702>; - rockchip,wakeup-config = <0x85>; - phandle = <0xcb>; - }; - - timer { - compatible = "arm,armv8-timer"; - interrupts = <0x01 0x0d 0xf04 0x01 0x0e 0xf04 0x01 0x0b 0xf04 0x01 0x0a 0xf04>; - }; - - xin24m { - compatible = "fixed-clock"; - #clock-cells = <0x00>; - clock-frequency = <0x16e3600>; - clock-output-names = "xin24m"; - phandle = <0xcc>; - }; - - xin32k { - compatible = "fixed-clock"; - #clock-cells = <0x00>; - clock-frequency = <0x8000>; - clock-output-names = "xin32k"; - phandle = <0xcd>; - }; - - power-management@ff000000 { - compatible = "rockchip,px30-pmu\0syscon\0simple-mfd"; - reg = <0x00 0xff000000 0x00 0x1000>; - phandle = <0xce>; - - power-controller { - compatible = "rockchip,px30-power-controller"; - #power-domain-cells = <0x01>; - #address-cells = <0x01>; - #size-cells = <0x00>; - phandle = <0x8a>; - - pd_usb@5 { - reg = <0x05>; - clocks = <0x02 0x103 0x02 0x102 0x02 0x3c>; - pm_qos = <0x15 0x16>; - }; - - pd_sdcard@7 { - reg = <0x07>; - clocks = <0x02 0xf7 0x02 0x3b>; - pm_qos = <0x17>; - }; - - pd_gmac@9 { - reg = <0x09>; - clocks = <0x02 0xb2 0x02 0x143 0x02 0x40 0x02 0x3f>; - pm_qos = <0x18>; - }; - - pd_mmc_nand@10 { - reg = <0x0a>; - clocks = <0x02 0xfe 0x02 0x100 0x02 0xff 0x02 0x101 0x02 0x39 0x02 0x37 0x02 0x38 0x02 0x3a>; - pm_qos = <0x19 0x1a 0x1b 0x1c>; - }; - - pd_vpu@11 { - reg = <0x0b>; - clocks = <0x02 0xaf 0x02 0xf4 0x02 0x4b>; - pm_qos = <0x1d 0x1e>; - }; - - pd_vo@12 { - reg = <0x0c>; - clocks = <0x02 0xb7 0x02 0xb5 0x02 0xb6 0x02 0x96 0x02 0x97 0x02 0xfd 0x02 0xfb 0x02 0xfc 0x02 0x144 0x02 0x35 0x02 0x36>; - pm_qos = <0x1f 0x20 0x21 0x22>; - }; - - pd_vi@13 { - reg = <0x0d>; - clocks = <0x02 0xb3 0x02 0xb4 0x02 0xf9 0x02 0xfa 0x02 0x33>; - pm_qos = <0x23 0x24 0x25 0x26 0x27>; - }; - - pd_gpu@14 { - reg = <0x0e>; - clocks = <0x02 0x49>; - pm_qos = <0x28>; - }; - }; - }; - - syscon@ff010000 { - compatible = "rockchip,px30-pmugrf\0syscon\0simple-mfd"; - reg = <0x00 0xff010000 0x00 0x1000>; - #address-cells = <0x01>; - #size-cells = <0x01>; - phandle = <0xac>; - - io-domains { - compatible = "rockchip,px30-pmu-io-voltage-domain"; - status = "okay"; - pmuio1-supply = <0x29>; - pmuio2-supply = <0x29>; - phandle = <0xcf>; - }; - - reboot-mode { - compatible = "syscon-reboot-mode"; - offset = <0x200>; - mode-bootloader = <0x5242c301>; - mode-charge = <0x5242c30b>; - mode-fastboot = <0x5242c309>; - mode-loader = <0x5242c301>; - mode-normal = <0x5242c300>; - mode-recovery = <0x5242c303>; - mode-ums = <0x5242c30c>; - }; - - pmu-pvtm { - compatible = "rockchip,px30-pmu-pvtm"; - clocks = <0x2a 0x07>; - clock-names = "pmu"; - status = "okay"; - phandle = <0xd0>; - }; - }; - - serial@ff030000 { - compatible = "rockchip,px30-uart\0snps,dw-apb-uart"; - reg = <0x00 0xff030000 0x00 0x100>; - interrupts = <0x00 0x0f 0x04>; - clocks = <0x2a 0x06 0x2a 0x15>; - clock-names = "baudclk\0apb_pclk"; - reg-shift = <0x02>; - reg-io-width = <0x04>; - dmas = <0x2b 0x00 0x2b 0x01>; - pinctrl-names = "default"; - pinctrl-0 = <0x2c 0x2d 0x2e>; - status = "disabled"; - phandle = <0xd1>; - }; - - i2s@ff060000 { - compatible = "rockchip,px30-i2s-tdm"; - reg = <0x00 0xff060000 0x00 0x1000>; - interrupts = <0x00 0x0c 0x04>; - clocks = <0x02 0x10 0x02 0x12 0x02 0x106>; - clock-names = "mclk_tx\0mclk_rx\0hclk"; - dmas = <0x2b 0x10 0x2b 0x11>; - dma-names = "tx\0rx"; - resets = <0x02 0x84 0x02 0xbf>; - reset-names = "tx-m\0rx-m"; - rockchip,cru = <0x02>; - rockchip,grf = <0x2f>; - pinctrl-names = "default"; - pinctrl-0 = <0x30 0x31 0x32 0x33 0x34 0x35 0x36 0x37 0x38 0x39 0x3a 0x3b>; - status = "disabled"; - phandle = <0xd2>; - }; - - i2s@ff070000 { - compatible = "rockchip,px30-i2s\0rockchip,rk3066-i2s"; - reg = <0x00 0xff070000 0x00 0x1000>; - interrupts = <0x00 0x0d 0x04>; - clocks = <0x02 0x14 0x02 0x107>; - clock-names = "i2s_clk\0i2s_hclk"; - dmas = <0x2b 0x12 0x2b 0x13>; - dma-names = "tx\0rx"; - resets = <0x02 0x86 0x02 0x85>; - reset-names = "reset-m\0reset-h"; - pinctrl-names = "default"; - pinctrl-0 = <0x3c 0x3d 0x3e 0x3f>; - status = "okay"; - #sound-dai-cells = <0x00>; - phandle = <0xc2>; - }; - - i2s@ff080000 { - compatible = "rockchip,px30-i2s\0rockchip,rk3066-i2s"; - reg = <0x00 0xff080000 0x00 0x1000>; - interrupts = <0x00 0x0e 0x04>; - clocks = <0x02 0x16 0x02 0x108>; - clock-names = "i2s_clk\0i2s_hclk"; - dmas = <0x2b 0x14 0x2b 0x15>; - dma-names = "tx\0rx"; - resets = <0x02 0x88 0x02 0x87>; - reset-names = "reset-m\0reset-h"; - pinctrl-names = "default"; - pinctrl-0 = <0x40 0x41 0x42 0x43>; - status = "disabled"; - phandle = <0xd3>; - }; - - pdm@ff0a0000 { - compatible = "rockchip,px30-pdm\0rockchip,pdm"; - reg = <0x00 0xff0a0000 0x00 0x1000>; - clocks = <0x02 0x0f 0x02 0x105>; - clock-names = "pdm_clk\0pdm_hclk"; - dmas = <0x2b 0x18>; - dma-names = "rx"; - resets = <0x02 0x82>; - reset-names = "pdm-m"; - pinctrl-names = "default"; - pinctrl-0 = <0x44 0x45 0x46 0x47 0x48 0x49>; - status = "disabled"; - phandle = <0xd4>; - }; - - crypto@ff0b0000 { - compatible = "rockchip,px30-crypto"; - reg = <0x00 0xff0b0000 0x00 0x4000>; - interrupts = <0x00 0x52 0x04>; - clocks = <0x02 0xac 0x02 0xf1 0x02 0x30 0x02 0x31>; - clock-names = "aclk\0hclk\0sclk\0apb_pclk"; - resets = <0x02 0x74>; - reset-names = "crypto-rst"; - status = "disabled"; - phandle = <0xd5>; - }; - - rng@ff0b0000 { - compatible = "rockchip,cryptov2-rng"; - reg = <0x00 0xff0b0000 0x00 0x4000>; - clocks = <0x02 0x30 0x02 0x31 0x02 0xac 0x02 0xf1>; - clock-names = "clk_crypto\0clk_crypto_apk\0aclk_crypto\0hclk_crypto"; - assigned-clocks = <0x02 0x30 0x02 0x31 0x02 0xac 0x02 0xf1>; - assigned-clock-rates = <0x8f0d180 0x8f0d180 0xbebc200 0x5f5e100>; - resets = <0x02 0x74>; - reset-names = "reset"; - status = "okay"; - phandle = <0xd6>; - }; - - interrupt-controller@ff131000 { - compatible = "arm,gic-400"; - #interrupt-cells = <0x03>; - #address-cells = <0x00>; - interrupt-controller; - reg = <0x00 0xff131000 0x00 0x1000 0x00 0xff132000 0x00 0x2000 0x00 0xff134000 0x00 0x2000 0x00 0xff136000 0x00 0x2000>; - interrupts = <0x01 0x09 0xf04>; - phandle = <0x01>; - }; - - syscon@ff140000 { - compatible = "rockchip,px30-grf\0syscon\0simple-mfd"; - reg = <0x00 0xff140000 0x00 0x1000>; - #address-cells = <0x01>; - #size-cells = <0x01>; - phandle = <0x2f>; - - io-domains { - compatible = "rockchip,px30-io-voltage-domain"; - status = "okay"; - vccio1-supply = <0x4a>; - vccio2-supply = <0x4a>; - vccio3-supply = <0x4b>; - vccio4-supply = <0x4b>; - vccio5-supply = <0x4b>; - vccio6-supply = <0x4b>; - phandle = <0xd7>; - }; - - lvds { - compatible = "rockchip,px30-lvds"; - phys = <0x4c>; - phy-names = "phy"; - status = "disabled"; - phandle = <0xd8>; - - ports { - #address-cells = <0x01>; - #size-cells = <0x00>; - - port@0 { - reg = <0x00>; - #address-cells = <0x01>; - #size-cells = <0x00>; - - endpoint@0 { - reg = <0x00>; - remote-endpoint = <0x12>; - phandle = <0xa2>; - }; - }; - }; - }; - - rgb { - compatible = "rockchip,px30-rgb"; - pinctrl-names = "default\0sleep"; - pinctrl-0 = <0x4d>; - pinctrl-1 = <0x4e>; - status = "disabled"; - phys = <0x4c>; - phy-names = "phy"; - phandle = <0xd9>; - - ports { - #address-cells = <0x01>; - #size-cells = <0x00>; - - port@0 { - reg = <0x00>; - #address-cells = <0x01>; - #size-cells = <0x00>; - - endpoint@0 { - reg = <0x00>; - remote-endpoint = <0x14>; - phandle = <0xa4>; - }; - }; - }; - }; - }; - - syscon@ff148000 { - compatible = "syscon\0simple-mfd"; - reg = <0x00 0xff148000 0x00 0x1000>; - #address-cells = <0x01>; - #size-cells = <0x01>; - phandle = <0xda>; - - pvtm { - compatible = "rockchip,px30-pvtm"; - clocks = <0x02 0x4a>; - clock-names = "core"; - status = "okay"; - phandle = <0xdb>; - }; - }; - - serial@ff158000 { - compatible = "rockchip,px30-uart\0snps,dw-apb-uart"; - reg = <0x00 0xff158000 0x00 0x100>; - interrupts = <0x00 0x10 0x04>; - clocks = <0x02 0x18 0x02 0x149>; - clock-names = "baudclk\0apb_pclk"; - reg-shift = <0x02>; - reg-io-width = <0x04>; - dmas = <0x2b 0x02 0x2b 0x03>; - pinctrl-names = "default"; - pinctrl-0 = <0x4f 0x50>; - status = "okay"; - phandle = <0xdc>; - }; - - serial@ff160000 { - compatible = "rockchip,px30-uart\0snps,dw-apb-uart"; - reg = <0x00 0xff160000 0x00 0x100>; - interrupts = <0x00 0x11 0x04>; - clocks = <0x02 0x19 0x02 0x14a>; - clock-names = "baudclk\0apb_pclk"; - reg-shift = <0x02>; - reg-io-width = <0x04>; - dmas = <0x2b 0x04 0x2b 0x05>; - pinctrl-names = "default"; - pinctrl-0 = <0x51>; - status = "disabled"; - phandle = <0xdd>; - }; - - serial@ff168000 { - compatible = "rockchip,px30-uart\0snps,dw-apb-uart"; - reg = <0x00 0xff168000 0x00 0x100>; - interrupts = <0x00 0x12 0x04>; - clocks = <0x02 0x1a 0x02 0x14b>; - clock-names = "baudclk\0apb_pclk"; - reg-shift = <0x02>; - reg-io-width = <0x04>; - dmas = <0x2b 0x06 0x2b 0x07>; - pinctrl-names = "default"; - pinctrl-0 = <0x52 0x53 0x54>; - status = "disabled"; - phandle = <0xde>; - }; - - serial@ff170000 { - compatible = "rockchip,px30-uart\0snps,dw-apb-uart"; - reg = <0x00 0xff170000 0x00 0x100>; - interrupts = <0x00 0x13 0x04>; - clocks = <0x02 0x1b 0x02 0x14c>; - clock-names = "baudclk\0apb_pclk"; - reg-shift = <0x02>; - reg-io-width = <0x04>; - dmas = <0x2b 0x08 0x2b 0x09>; - pinctrl-names = "default"; - pinctrl-0 = <0x55 0x56 0x57>; - status = "disabled"; - phandle = <0xdf>; - }; - - serial@ff178000 { - compatible = "rockchip,px30-uart\0snps,dw-apb-uart"; - reg = <0x00 0xff178000 0x00 0x100>; - interrupts = <0x00 0x14 0x04>; - clocks = <0x02 0x1c 0x02 0x14d>; - clock-names = "baudclk\0apb_pclk"; - reg-shift = <0x02>; - reg-io-width = <0x04>; - dmas = <0x2b 0x0a 0x2b 0x0b>; - pinctrl-names = "default"; - pinctrl-0 = <0x58 0x59 0x5a>; - status = "disabled"; - phandle = <0xe0>; - }; - - i2c@ff180000 { - compatible = "rockchip,rk3399-i2c"; - reg = <0x00 0xff180000 0x00 0x1000>; - clocks = <0x02 0x1d 0x02 0x14e>; - clock-names = "i2c\0pclk"; - interrupts = <0x00 0x07 0x04>; - pinctrl-names = "default"; - pinctrl-0 = <0x5b>; - #address-cells = <0x01>; - #size-cells = <0x00>; - status = "okay"; - clock-frequency = <0x61a80>; - i2c-scl-rising-time-ns = <0x118>; - i2c-scl-falling-time-ns = <0x10>; - phandle = <0xe1>; - - pmic@20 { - compatible = "rockchip,rk817"; - reg = <0x20>; - interrupt-parent = <0x5c>; - interrupts = <0x0a 0x08>; - pinctrl-names = "default\0pmic-sleep\0pmic-power-off\0pmic-reset"; - pinctrl-0 = <0x5d>; - pinctrl-1 = <0x5e 0x5f>; - pinctrl-2 = <0x60 0x61>; - pinctrl-3 = <0x62 0x63>; - rockchip,system-power-controller; - wakeup-source; - #clock-cells = <0x01>; - clock-output-names = "rk808-clkout1\0rk808-clkout2"; - pmic-reset-func = <0x01>; - vcc1-supply = <0x64>; - vcc2-supply = <0x64>; - vcc3-supply = <0x64>; - vcc4-supply = <0x64>; - vcc5-supply = <0x64>; - vcc6-supply = <0x64>; - vcc7-supply = <0x64>; - vcc8-supply = <0x64>; - vcc9-supply = <0x65>; - phandle = <0xe2>; - - pwrkey { - status = "okay"; - }; - - pinctrl_rk8xx { - gpio-controller; - #gpio-cells = <0x02>; - phandle = <0xe3>; - - rk817_ts_gpio1 { - pins = "gpio_ts"; - function = "pin_fun1"; - phandle = <0xe4>; - }; - - rk817_gt_gpio2 { - pins = "gpio_gt"; - function = "pin_fun1"; - phandle = <0xe5>; - }; - - rk817_pin_ts { - pins = "gpio_ts"; - function = "pin_fun0"; - phandle = <0xe6>; - }; - - rk817_pin_gt { - pins = "gpio_gt"; - function = "pin_fun0"; - phandle = <0xe7>; - }; - - rk817_slppin_null { - pins = "gpio_slp"; - function = "pin_fun0"; - phandle = <0xe8>; - }; - - rk817_slppin_slp { - pins = "gpio_slp"; - function = "pin_fun1"; - phandle = <0x5f>; - }; - - rk817_slppin_pwrdn { - pins = "gpio_slp"; - function = "pin_fun2"; - phandle = <0x61>; - }; - - rk817_slppin_rst { - pins = "gpio_slp"; - function = "pin_fun3"; - phandle = <0x63>; - }; - }; - - regulators { - - DCDC_REG1 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0xe7ef0>; - regulator-max-microvolt = <0x118c30>; - regulator-ramp-delay = <0x1771>; - regulator-initial-mode = <0x02>; - regulator-name = "vdd_logic"; - phandle = <0x0e>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <0xe7ef0>; - }; - }; - - DCDC_REG2 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0xe7ef0>; - regulator-max-microvolt = <0x149970>; - regulator-ramp-delay = <0x1771>; - regulator-initial-mode = <0x02>; - regulator-name = "vdd_arm"; - phandle = <0x06>; - - regulator-state-mem { - regulator-off-in-suspend; - regulator-suspend-microvolt = <0xe7ef0>; - }; - }; - - DCDC_REG3 { - regulator-always-on; - regulator-boot-on; - regulator-initial-mode = <0x02>; - regulator-name = "vcc_ddr"; - phandle = <0xe9>; - - regulator-state-mem { - regulator-on-in-suspend; - }; - }; - - DCDC_REG4 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0x325aa0>; - regulator-max-microvolt = <0x325aa0>; - regulator-initial-mode = <0x02>; - regulator-name = "vcc_3v3"; - phandle = <0x4b>; - - regulator-state-mem { - regulator-off-in-suspend; - regulator-suspend-microvolt = <0x325aa0>; - }; - }; - - LDO_REG1 { - regulator-min-microvolt = <0xf4240>; - regulator-max-microvolt = <0xf4240>; - regulator-name = "vcc_1v0"; - phandle = <0xea>; - - regulator-state-mem { - regulator-off-in-suspend; - regulator-suspend-microvolt = <0xf4240>; - }; - }; - - LDO_REG2 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0x1b7740>; - regulator-max-microvolt = <0x1b7740>; - regulator-name = "vcc1v8_soc"; - phandle = <0x88>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <0x1b7740>; - }; - }; - - LDO_REG3 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0xf4240>; - regulator-max-microvolt = <0xf4240>; - regulator-name = "vcc1v0_soc"; - phandle = <0xeb>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <0xf4240>; - }; - }; - - LDO_REG4 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0x325aa0>; - regulator-max-microvolt = <0x325aa0>; - regulator-name = "vcc3v3_pmu"; - phandle = <0x29>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <0x325aa0>; - }; - }; - - LDO_REG5 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0x1b7740>; - regulator-max-microvolt = <0x1b7740>; - regulator-name = "vccio_sd"; - phandle = <0x4a>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <0x1b7740>; - }; - }; - - LDO_REG6 { - regulator-min-microvolt = <0x1b7740>; - regulator-max-microvolt = <0x2dc6c0>; - regulator-boot-on; - regulator-name = "vcc_sd"; - phandle = <0x93>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <0x2dc6c0>; - }; - }; - - LDO_REG7 { - regulator-min-microvolt = <0x325aa0>; - regulator-max-microvolt = <0x325aa0>; - regulator-name = "vcc_backlight"; - phandle = <0x9e>; - - regulator-state-mem { - regulator-off-in-suspend; - regulator-suspend-microvolt = <0x325aa0>; - }; - }; - - LDO_REG8 { - regulator-min-microvolt = <0x2ab980>; - regulator-max-microvolt = <0x2ab980>; - regulator-name = "vcc_lcd"; - phandle = <0x9f>; - - regulator-state-mem { - regulator-off-in-suspend; - regulator-suspend-microvolt = <0x2ab980>; - }; - }; - - BOOST { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0x4c4b40>; - regulator-max-microvolt = <0x5265c0>; - regulator-name = "boost"; - phandle = <0x65>; - }; - - OTG_SWITCH { - regulator-boot-on; - regulator-name = "otg_switch"; - phandle = <0xec>; - }; - }; - - battery { - compatible = "rk817,battery"; - ocv_table = <0xc5d 0xc94 0xcd0 0xd02 0xd34 0xd66 0xd98 0xdca 0xdfc 0xe2e 0xe56 0xe7e 0xea6 0xece 0xef6 0xf1e 0xf46 0xf6e 0xf96 0xf9b 0xfa0>; - design_capacity = <0xd34>; - design_qmax = <0xe86>; - bat_res = <0x64>; - sleep_enter_current = <0x12c>; - sleep_exit_current = <0x12c>; - sleep_filter_current = <0x64>; - power_off_thresd = <0xbb8>; - zero_algorithm_vol = <0xf0a>; - max_soc_offset = <0x3c>; - monitor_sec = <0x05>; - virtual_power = <0x00>; - sample_res = <0x0a>; - }; - - charger { - compatible = "rk817,charger"; - min_input_voltage = <0x1194>; - max_input_current = <0x5dc>; - max_chrg_current = <0x7d0>; - max_chrg_voltage = <0x1068>; - chrg_term_mode = <0x00>; - chrg_finish_cur = <0x34>; - virtual_power = <0x00>; - sample_res = <0x0a>; - dc_det_gpio = <0x5c 0x0b 0x00>; - bat_low_gpio = <0x66 0x0d 0x00>; - extcon = <0x67>; - }; - - codec { - #sound-dai-cells = <0x00>; - compatible = "rockchip,rk817-codec"; - clocks = <0x02 0x15>; - clock-names = "mclk"; - pinctrl-names = "default"; - pinctrl-0 = <0x68>; - hp-volume = <0x14>; - spk-volume = <0x03>; - status = "okay"; - phandle = <0xc3>; - }; - }; - }; - - i2c@ff190000 { - compatible = "rockchip,rk3399-i2c"; - reg = <0x00 0xff190000 0x00 0x1000>; - clocks = <0x02 0x1e 0x02 0x14f>; - clock-names = "i2c\0pclk"; - interrupts = <0x00 0x08 0x04>; - pinctrl-names = "default"; - pinctrl-0 = <0x69>; - #address-cells = <0x01>; - #size-cells = <0x00>; - status = "okay"; - clock-frequency = <0x61a80>; - phandle = <0xed>; - }; - - i2c@ff1a0000 { - compatible = "rockchip,rk3399-i2c"; - reg = <0x00 0xff1a0000 0x00 0x1000>; - clocks = <0x02 0x1f 0x02 0x150>; - clock-names = "i2c\0pclk"; - interrupts = <0x00 0x09 0x04>; - pinctrl-names = "default"; - pinctrl-0 = <0x6a>; - #address-cells = <0x01>; - #size-cells = <0x00>; - status = "disabled"; - phandle = <0xee>; - }; - - i2c@ff1b0000 { - compatible = "rockchip,rk3399-i2c"; - reg = <0x00 0xff1b0000 0x00 0x1000>; - clocks = <0x02 0x20 0x02 0x151>; - clock-names = "i2c\0pclk"; - interrupts = <0x00 0x0a 0x04>; - pinctrl-names = "default"; - pinctrl-0 = <0x6b>; - #address-cells = <0x01>; - #size-cells = <0x00>; - status = "disabled"; - phandle = <0xef>; - }; - - spi@ff1d0000 { - compatible = "rockchip,px30-spi\0rockchip,rk3066-spi"; - reg = <0x00 0xff1d0000 0x00 0x1000>; - interrupts = <0x00 0x1a 0x04>; - #address-cells = <0x01>; - #size-cells = <0x00>; - clocks = <0x02 0x24 0x02 0x155>; - clock-names = "spiclk\0apb_pclk"; - dmas = <0x2b 0x0c 0x2b 0x0d>; - dma-names = "tx\0rx"; - pinctrl-names = "default\0high_speed"; - pinctrl-0 = <0x6c 0x6d 0x6e 0x6f>; - pinctrl-1 = <0x70 0x6d 0x71 0x72>; - status = "disabled"; - phandle = <0xf0>; - }; - - spi@ff1d8000 { - compatible = "rockchip,px30-spi\0rockchip,rk3066-spi"; - reg = <0x00 0xff1d8000 0x00 0x1000>; - interrupts = <0x00 0x1b 0x04>; - #address-cells = <0x01>; - #size-cells = <0x00>; - clocks = <0x02 0x25 0x02 0x156>; - clock-names = "spiclk\0apb_pclk"; - dmas = <0x2b 0x0e 0x2b 0x0f>; - dma-names = "tx\0rx"; - pinctrl-names = "default\0high_speed"; - pinctrl-0 = <0x73 0x74 0x75 0x76 0x77>; - pinctrl-1 = <0x78 0x74 0x75 0x79 0x7a>; - status = "disabled"; - phandle = <0xf1>; - }; - - watchdog@ff1e0000 { - compatible = "snps,dw-wdt"; - reg = <0x00 0xff1e0000 0x00 0x100>; - clocks = <0x02 0x15b>; - interrupts = <0x00 0x25 0x04>; - resets = <0x02 0xb5>; - reset-names = "reset"; - status = "disabled"; - phandle = <0xf2>; - }; - - pwm@ff200000 { - compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm"; - reg = <0x00 0xff200000 0x00 0x10>; - #pwm-cells = <0x03>; - pinctrl-names = "active"; - pinctrl-0 = <0x7b>; - clocks = <0x02 0x22 0x02 0x153>; - clock-names = "pwm\0pclk"; - status = "okay"; - phandle = <0xbc>; - }; - - pwm@ff200010 { - compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm"; - reg = <0x00 0xff200010 0x00 0x10>; - #pwm-cells = <0x03>; - pinctrl-names = "active"; - pinctrl-0 = <0x7c>; - clocks = <0x02 0x22 0x02 0x153>; - clock-names = "pwm\0pclk"; - status = "okay"; - phandle = <0xc1>; - }; - - pwm@ff200020 { - compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm"; - reg = <0x00 0xff200020 0x00 0x10>; - #pwm-cells = <0x03>; - pinctrl-names = "active"; - pinctrl-0 = <0x7d>; - clocks = <0x02 0x22 0x02 0x153>; - clock-names = "pwm\0pclk"; - status = "disabled"; - phandle = <0xf3>; - }; - - pwm@ff200030 { - compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm"; - reg = <0x00 0xff200030 0x00 0x10>; - #pwm-cells = <0x03>; - pinctrl-names = "active"; - pinctrl-0 = <0x7e>; - clocks = <0x02 0x22 0x02 0x153>; - clock-names = "pwm\0pclk"; - status = "disabled"; - phandle = <0xf4>; - }; - - pwm@ff208000 { - compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm"; - reg = <0x00 0xff208000 0x00 0x10>; - #pwm-cells = <0x03>; - pinctrl-names = "active"; - pinctrl-0 = <0x7f>; - clocks = <0x02 0x23 0x02 0x154>; - clock-names = "pwm\0pclk"; - status = "disabled"; - phandle = <0xf5>; - }; - - pwm@ff208010 { - compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm"; - reg = <0x00 0xff208010 0x00 0x10>; - #pwm-cells = <0x03>; - pinctrl-names = "active"; - pinctrl-0 = <0x80>; - clocks = <0x02 0x23 0x02 0x154>; - clock-names = "pwm\0pclk"; - status = "disabled"; - phandle = <0xf6>; - }; - - pwm@ff208020 { - compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm"; - reg = <0x00 0xff208020 0x00 0x10>; - #pwm-cells = <0x03>; - pinctrl-names = "active"; - pinctrl-0 = <0x81>; - clocks = <0x02 0x23 0x02 0x154>; - clock-names = "pwm\0pclk"; - status = "disabled"; - phandle = <0xf7>; - }; - - pwm@ff208030 { - compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm"; - reg = <0x00 0xff208030 0x00 0x10>; - #pwm-cells = <0x03>; - pinctrl-names = "active"; - pinctrl-0 = <0x82>; - clocks = <0x02 0x23 0x02 0x154>; - clock-names = "pwm\0pclk"; - status = "disabled"; - phandle = <0xf8>; - }; - - rktimer@ff210000 { - compatible = "rockchip,rk3288-timer"; - reg = <0x00 0xff210000 0x00 0x1000>; - interrupts = <0x00 0x1e 0x04>; - clocks = <0x02 0x159 0x02 0x26>; - clock-names = "pclk\0timer"; - phandle = <0xf9>; - }; - - amba { - compatible = "simple-bus"; - #address-cells = <0x02>; - #size-cells = <0x02>; - ranges; - - dmac@ff240000 { - compatible = "arm,pl330\0arm,primecell"; - reg = <0x00 0xff240000 0x00 0x4000>; - interrupts = <0x00 0x01 0x04 0x00 0x02 0x04>; - clocks = <0x02 0xbb>; - clock-names = "apb_pclk"; - #dma-cells = <0x01>; - peripherals-req-type-burst; - phandle = <0x2b>; - }; - }; - - thermal-zones { - phandle = <0xfa>; - - soc-thermal { - polling-delay-passive = <0x14>; - polling-delay = <0x3e8>; - sustainable-power = <0x2ee>; - thermal-sensors = <0x83 0x00>; - phandle = <0xfb>; - - trips { - - trip-point-0 { - temperature = <0x11170>; - hysteresis = <0x7d0>; - type = "passive"; - phandle = <0xfc>; - }; - - trip-point-1 { - temperature = <0x14c08>; - hysteresis = <0x7d0>; - type = "passive"; - phandle = <0x84>; - }; - - soc-crit { - temperature = <0x1c138>; - hysteresis = <0x7d0>; - type = "critical"; - phandle = <0xfd>; - }; - }; - - cooling-maps { - - map0 { - trip = <0x84>; - cooling-device = <0x09 0xffffffff 0xffffffff>; - contribution = <0x1000>; - }; - - map1 { - trip = <0x84>; - cooling-device = <0x85 0xffffffff 0xffffffff>; - contribution = <0x1000>; - }; - }; - }; - - gpu-thermal { - polling-delay-passive = <0x64>; - polling-delay = <0x3e8>; - thermal-sensors = <0x83 0x01>; - phandle = <0xfe>; - }; - }; - - tsadc@ff280000 { - compatible = "rockchip,px30-tsadc"; - reg = <0x00 0xff280000 0x00 0x100>; - interrupts = <0x00 0x24 0x04>; - rockchip,grf = <0x2f>; - clocks = <0x02 0x2c 0x02 0x158>; - clock-names = "tsadc\0apb_pclk"; - assigned-clocks = <0x02 0x2c>; - assigned-clock-rates = <0xc350>; - resets = <0x02 0xa8>; - reset-names = "tsadc-apb"; - #thermal-sensor-cells = <0x01>; - rockchip,hw-tshut-temp = <0x1d4c0>; - status = "okay"; - pinctrl-names = "gpio\0otpout"; - pinctrl-0 = <0x86>; - pinctrl-1 = <0x87>; - phandle = <0x83>; - }; - - saradc@ff288000 { - compatible = "rockchip,px30-saradc\0rockchip,rk3399-saradc"; - reg = <0x00 0xff288000 0x00 0x100>; - interrupts = <0x00 0x54 0x04>; - #io-channel-cells = <0x01>; - clocks = <0x02 0x2d 0x02 0x157>; - clock-names = "saradc\0apb_pclk"; - resets = <0x02 0xa5>; - reset-names = "saradc-apb"; - status = "okay"; - vref-supply = <0x88>; - phandle = <0xbe>; - }; - - otp@ff290000 { - compatible = "rockchip,px30-otp"; - reg = <0x00 0xff290000 0x00 0x4000>; - #address-cells = <0x01>; - #size-cells = <0x01>; - clocks = <0x02 0x2f 0x02 0x15a 0x02 0x161>; - clock-names = "clk_otp\0pclk_otp\0pclk_otp_phy"; - resets = <0x02 0xb4>; - reset-names = "otp_phy"; - phandle = <0xff>; - - id@7 { - reg = <0x07 0x10>; - phandle = <0x0f>; - }; - - cpu-leakage@17 { - reg = <0x17 0x01>; - phandle = <0x07>; - }; - - performance@1e { - reg = <0x1e 0x01>; - bits = <0x04 0x03>; - phandle = <0x08>; - }; - }; - - clock-controller@ff2b0000 { - compatible = "rockchip,px30-cru"; - reg = <0x00 0xff2b0000 0x00 0x1000>; - rockchip,grf = <0x2f>; - rockchip,boost = <0x89>; - #clock-cells = <0x01>; - #reset-cells = <0x01>; - assigned-clocks = <0x02 0x04>; - assigned-clock-rates = <0x3dfd2400>; - phandle = <0x02>; - }; - - cpu-boost@ff2b8000 { - compatible = "syscon"; - reg = <0x00 0xff2b8000 0x00 0x1000>; - rockchip,boost-low-con0 = <0x1032>; - rockchip,boost-low-con1 = <0x1441>; - rockchip,boost-high-con0 = <0x1036>; - rockchip,boost-high-con1 = <0x1441>; - rockchip,boost-backup-pll = <0x01>; - rockchip,boost-backup-pll-usage = <0x00>; - rockchip,boost-switch-threshold = <0x249f00>; - rockchip,boost-statis-threshold = <0x100>; - rockchip,boost-statis-enable = <0x00>; - rockchip,boost-enable = <0x00>; - phandle = <0x89>; - }; - - pmu-clock-controller@ff2bc000 { - compatible = "rockchip,px30-pmucru"; - reg = <0x00 0xff2bc000 0x00 0x1000>; - rockchip,grf = <0x2f>; - #clock-cells = <0x01>; - #reset-cells = <0x01>; - assigned-clocks = <0x2a 0x01 0x2a 0x08 0x2a 0x05 0x02 0x07 0x02 0xab 0x02 0xb0 0x02 0xf0 0x02 0xf5 0x02 0x140 0x02 0x49>; - assigned-clock-rates = <0x47868c00 0x5f5e100 0x18cba80 0x23c34600 0xbebc200 0xbebc200 0x8f0d180 0x8f0d180 0x5f5e100 0xbebc200>; - phandle = <0x2a>; - }; - - syscon@ff2c0000 { - compatible = "rockchip,px30-usb2phy-grf\0syscon\0simple-mfd"; - reg = <0x00 0xff2c0000 0x00 0x10000>; - #address-cells = <0x01>; - #size-cells = <0x01>; - phandle = <0x100>; - - usb2-phy@100 { - compatible = "rockchip,px30-usb2phy\0rockchip,rk3328-usb2phy"; - reg = <0x100 0x10>; - clocks = <0x2a 0x0a>; - clock-names = "phyclk"; - #clock-cells = <0x00>; - assigned-clocks = <0x02 0x0e 0x02 0x55>; - assigned-clock-parents = <0x67 0x02 0x0e>; - clock-output-names = "usb480m_phy"; - status = "okay"; - phandle = <0x67>; - - host-port { - #phy-cells = <0x00>; - interrupts = <0x00 0x44 0x04>; - interrupt-names = "linestate"; - status = "okay"; - phandle = <0x8c>; - }; - - otg-port { - #phy-cells = <0x00>; - interrupts = <0x00 0x42 0x04 0x00 0x41 0x04 0x00 0x40 0x04>; - interrupt-names = "otg-bvalid\0otg-id\0linestate"; - status = "disabled"; - phandle = <0x8b>; - }; - }; - }; - - video-phy@ff2e0000 { - compatible = "rockchip,px30-video-phy"; - reg = <0x00 0xff2e0000 0x00 0x10000 0x00 0xff450000 0x00 0x10000>; - clocks = <0x2a 0x0b 0x02 0x145 0x02 0x144>; - clock-names = "ref\0pclk_phy\0pclk_host"; - #clock-cells = <0x00>; - resets = <0x02 0x3e>; - reset-names = "rst"; - power-domains = <0x8a 0x0c>; - #phy-cells = <0x00>; - status = "okay"; - phandle = <0x4c>; - }; - - mipi-dphy-rx0@ff2f0000 { - compatible = "rockchip,rk3326-mipi-dphy"; - reg = <0x00 0xff2f0000 0x00 0x4000>; - clocks = <0x02 0x146>; - clock-names = "dphy-ref"; - power-domains = <0x8a 0x0d>; - rockchip,grf = <0x2f>; - status = "okay"; - phandle = <0x101>; - }; - - usb@ff300000 { - compatible = "rockchip,px30-usb\0rockchip,rk3066-usb\0snps,dwc2"; - reg = <0x00 0xff300000 0x00 0x40000>; - interrupts = <0x00 0x3e 0x04>; - clocks = <0x02 0x102>; - clock-names = "otg"; - power-domains = <0x8a 0x05>; - dr_mode = "otg"; - g-np-tx-fifo-size = <0x10>; - g-rx-fifo-size = <0x118>; - g-tx-fifo-size = <0x100 0x80 0x80 0x40 0x20 0x10>; - g-use-dma; - phys = <0x8b>; - phy-names = "usb2-phy"; - status = "okay"; - phandle = <0x102>; - }; - - usb@ff340000 { - compatible = "generic-ehci"; - reg = <0x00 0xff340000 0x00 0x10000>; - interrupts = <0x00 0x3c 0x04>; - clocks = <0x02 0x103 0x67>; - clock-names = "usbhost\0utmi"; - power-domains = <0x8a 0x05>; - phys = <0x8c>; - phy-names = "usb"; - status = "disabled"; - phandle = <0x103>; - }; - - usb@ff350000 { - compatible = "generic-ohci"; - reg = <0x00 0xff350000 0x00 0x10000>; - interrupts = <0x00 0x3d 0x04>; - clocks = <0x02 0x103 0x67>; - clock-names = "usbhost\0utmi"; - power-domains = <0x8a 0x05>; - phys = <0x8c>; - phy-names = "usb"; - status = "disabled"; - phandle = <0x104>; - }; - - ethernet@ff360000 { - compatible = "rockchip,px30-gmac"; - reg = <0x00 0xff360000 0x00 0x10000>; - rockchip,grf = <0x2f>; - interrupts = <0x00 0x2b 0x04>; - interrupt-names = "macirq"; - clocks = <0x02 0x3e 0x02 0x3f 0x02 0x3f 0x02 0x40 0x02 0x41 0x02 0xb2 0x02 0x143 0x02 0x4c>; - clock-names = "stmmaceth\0mac_clk_rx\0mac_clk_tx\0clk_mac_ref\0clk_mac_refout\0aclk_mac\0pclk_mac\0clk_mac_speed"; - phy-mode = "rmii"; - pinctrl-names = "default"; - pinctrl-0 = <0x8d 0x8e>; - resets = <0x02 0x5e>; - reset-names = "stmmaceth"; - power-domains = <0x8a 0x09>; - status = "disabled"; - phandle = <0x105>; - }; - - dwmmc@ff370000 { - compatible = "rockchip,px30-dw-mshc\0rockchip,rk3288-dw-mshc"; - reg = <0x00 0xff370000 0x00 0x4000>; - max-frequency = <0x8f0d180>; - clocks = <0x02 0xf7 0x02 0x3b 0x02 0x43 0x02 0x44>; - clock-names = "biu\0ciu\0ciu-drv\0ciu-sample"; - assigned-clocks = <0x02 0x3b>; - assigned-clock-parents = <0x02 0x57>; - power-domains = <0x8a 0x07>; - fifo-depth = <0x100>; - interrupts = <0x00 0x36 0x04>; - pinctrl-names = "default"; - pinctrl-0 = <0x8f 0x90 0x91 0x92>; - status = "okay"; - bus-width = <0x04>; - cap-mmc-highspeed; - cap-sd-highspeed; - supports-sd; - card-detect-delay = <0x320>; - ignore-pm-notify; - cd-gpios = <0x5c 0x03 0x01>; - sd-uhs-sdr12; - sd-uhs-sdr25; - sd-uhs-sdr50; - sd-uhs-sdr104; - vqmmc-supply = <0x4a>; - vmmc-supply = <0x93>; - phandle = <0x106>; - }; - - dwmmc@ff380000 { - compatible = "rockchip,px30-dw-mshc\0rockchip,rk3288-dw-mshc"; - reg = <0x00 0xff380000 0x00 0x4000>; - max-frequency = <0x8f0d180>; - clocks = <0x02 0xff 0x02 0x38 0x02 0x45 0x02 0x46>; - clock-names = "biu\0ciu\0ciu-drv\0ciu-sample"; - assigned-clocks = <0x02 0x38>; - assigned-clock-parents = <0x02 0x51>; - power-domains = <0x8a 0x0a>; - fifo-depth = <0x100>; - interrupts = <0x00 0x37 0x04>; - pinctrl-names = "default"; - pinctrl-0 = <0x94 0x95 0x96>; - status = "okay"; - bus-width = <0x04>; - cap-mmc-highspeed; - cap-sd-highspeed; - supports-sd; - card-detect-delay = <0x320>; - ignore-pm-notify; - cd-gpios = <0x97 0x0e 0x01>; - sd-uhs-sdr12; - sd-uhs-sdr25; - sd-uhs-sdr50; - sd-uhs-sdr104; - vqmmc-supply = <0x4a>; - vmmc-supply = <0x93>; - phandle = <0x107>; - }; - - dwmmc@ff390000 { - compatible = "rockchip,px30-dw-mshc\0rockchip,rk3288-dw-mshc"; - reg = <0x00 0xff390000 0x00 0x4000>; - max-frequency = <0x8f0d180>; - clocks = <0x02 0x100 0x02 0x39 0x02 0x47 0x02 0x48>; - clock-names = "biu\0ciu\0ciu-drv\0ciu-sample"; - assigned-clocks = <0x02 0x39>; - assigned-clock-parents = <0x02 0x53>; - power-domains = <0x8a 0x0a>; - fifo-depth = <0x100>; - interrupts = <0x00 0x35 0x04>; - status = "disabled"; - phandle = <0x108>; - }; - - nandc@ff3b0000 { - compatible = "rockchip,rk-nandc"; - reg = <0x00 0xff3b0000 0x00 0x4000>; - interrupts = <0x00 0x39 0x04>; - nandc_id = <0x00>; - clocks = <0x02 0x37 0x02 0xfe>; - clock-names = "clk_nandc\0hclk_nandc"; - assigned-clocks = <0x02 0x37>; - assigned-clock-parents = <0x02 0x4f>; - power-domains = <0x8a 0x0a>; - status = "disabled"; - phandle = <0x109>; - }; - - sfc@ff3a0000 { - compatible = "rockchip,sfc"; - reg = <0x00 0xff3a0000 0x00 0x4000>; - interrupts = <0x00 0x38 0x04>; - clocks = <0x02 0x3a 0x02 0x101>; - clock-names = "clk_sfc\0hclk_sfc"; - assigned-clocks = <0x02 0x3a>; - assigned-clock-rates = <0x989680>; - status = "disabled"; - phandle = <0x10a>; - }; - - gpu@ff400000 { - compatible = "arm,malit602\0arm,malit60x\0arm,malit6xx\0arm,mali-midgard"; - reg = <0x00 0xff400000 0x00 0x4000>; - interrupts = <0x00 0x2d 0x04 0x00 0x2e 0x04 0x00 0x2f 0x04>; - interrupt-names = "GPU\0MMU\0JOB"; - clocks = <0x02 0x49>; - clock-names = "clk_mali"; - power-domains = <0x8a 0x0e>; - #cooling-cells = <0x02>; - operating-points-v2 = <0x98>; - status = "okay"; - mali-supply = <0x0e>; - phandle = <0x85>; - - power_model { - compatible = "arm,mali-simple-power-model"; - static-coefficient = <0x64578>; - dynamic-coefficient = <0x2dd>; - ts = <0x7d00 0x125c 0xffffffb0 0x02>; - thermal-zone = "gpu-thermal"; - }; - }; - - gpu-opp-table { - compatible = "operating-points-v2"; - rockchip,thermal-zone = "soc-thermal"; - rockchip,temp-hysteresis = <0x1388>; - rockchip,low-temp = <0x00>; - rockchip,low-temp-min-volt = <0xf4240>; - rockchip,low-temp-adjust-volt = <0x00 0x1e0 0xc350>; - rockchip,max-volt = <0x11edd8>; - rockchip,evb-irdrop = <0x61a8>; - rockchip,pvtm-voltage-sel = <0x00 0xc350 0x00 0xc351 0xd2f0 0x01 0xd2f1 0xea60 0x02 0xea61 0x1869f 0x03>; - rockchip,pvtm-ch = <0x00 0x00>; - phandle = <0x98>; - - opp-400000000 { - opp-hz = <0x00 0x17d78400>; - opp-microvolt = <0x100590>; - opp-microvolt-L0 = <0x100590>; - opp-microvolt-L1 = <0xfa3e8>; - opp-microvolt-L2 = <0xee098>; - opp-microvolt-L3 = <0xe7ef0>; - }; - - opp-480000000 { - opp-hz = <0x00 0x1c9c3800>; - opp-microvolt = <0x112a88>; - opp-microvolt-L0 = <0x112a88>; - opp-microvolt-L1 = <0x10c8e0>; - opp-microvolt-L2 = <0x100590>; - opp-microvolt-L3 = <0xf4240>; - }; - - opp-520000000 { - opp-hz = <0x00 0x1efe9200>; - opp-microvolt = <0x118c30>; - opp-microvolt-L0 = <0x118c30>; - opp-microvolt-L1 = <0x118c30>; - opp-microvolt-L2 = <0x10c8e0>; - opp-microvolt-L3 = <0x100590>; - }; - }; - - hevc_service@ff440000 { - compatible = "rockchip,hevc_sub"; - iommu_enabled = <0x01>; - reg = <0x00 0xff440000 0x00 0x400>; - interrupts = <0x00 0x31 0x04>; - interrupt-names = "irq_dec"; - dev_mode = <0x01>; - iommus = <0x99>; - allocator = <0x01>; - phandle = <0x9c>; - }; - - vpu_service@ff442000 { - compatible = "rockchip,vpu_sub"; - iommu_enabled = <0x01>; - reg = <0x00 0xff442000 0x00 0x800>; - interrupts = <0x00 0x50 0x04 0x00 0x4f 0x04>; - interrupt-names = "irq_enc\0irq_dec"; - dev_mode = <0x00>; - iommus = <0x9a>; - allocator = <0x01>; - phandle = <0x9b>; - }; - - vpu_combo { - compatible = "rockchip,vpu_combo"; - subcnt = <0x02>; - rockchip,grf = <0x2f>; - rockchip,sub = <0x9b 0x9c>; - clocks = <0x02 0xaf 0x02 0xf4 0x02 0x4b>; - clock-names = "aclk_vcodec\0hclk_vcodec\0clk_core"; - resets = <0x02 0x24 0x02 0x26 0x02 0x25 0x02 0x27 0x02 0x3f>; - reset-names = "video_a\0video_h\0niu_a\0niu_h\0video_core"; - power-domains = <0x8a 0x0b>; - mode_bit = <0x0f>; - mode_ctrl = <0x410>; - status = "okay"; - phandle = <0x10b>; - }; - - iommu@ff440440 { - compatible = "rockchip,iommu"; - reg = <0x00 0xff440440 0x00 0x40 0x00 0xff440480 0x00 0x40>; - interrupts = <0x00 0x32 0x04>; - interrupt-names = "hevc_mmu"; - clocks = <0x02 0xaf 0x02 0xf4>; - clock-names = "aclk\0hclk"; - power-domains = <0x8a 0x0b>; - #iommu-cells = <0x00>; - phandle = <0x99>; - }; - - iommu@ff442800 { - compatible = "rockchip,iommu"; - reg = <0x00 0xff442800 0x00 0x100>; - interrupts = <0x00 0x51 0x04>; - interrupt-names = "vpu_mmu"; - clocks = <0x02 0xaf 0x02 0xf4>; - clock-names = "aclk\0hclk"; - power-domains = <0x8a 0x0b>; - #iommu-cells = <0x00>; - phandle = <0x9a>; - }; - - dsi@ff450000 { - compatible = "rockchip,px30-mipi-dsi"; - reg = <0x00 0xff450000 0x00 0x10000>; - interrupts = <0x00 0x4b 0x04>; - clocks = <0x02 0x144 0x4c>; - clock-names = "pclk\0hs_clk"; - resets = <0x02 0x3d>; - reset-names = "apb"; - phys = <0x4c>; - phy-names = "mipi_dphy"; - power-domains = <0x8a 0x0c>; - rockchip,grf = <0x2f>; - #address-cells = <0x01>; - #size-cells = <0x00>; - status = "okay"; - phandle = <0x10c>; - - ports { - #address-cells = <0x01>; - #size-cells = <0x00>; - - port@0 { - reg = <0x00>; - #address-cells = <0x01>; - #size-cells = <0x00>; - - endpoint@0 { - reg = <0x00>; - remote-endpoint = <0x13>; - status = "okay"; - phandle = <0xa3>; - }; - }; - }; - - panel@0 { - compatible = "elida,kd35t133\0simple-panel-dsi"; - reg = <0x00>; - backlight = <0x9d>; - backlight-supply = <0x9e>; - power-supply = <0x9f>; - reset-gpios = <0x97 0x10 0x01>; - reset-delay-ms = <0x96>; - init-delay-ms = <0x14>; - enable-delay-ms = <0x78>; - prepare-delay-ms = <0x14>; - unprepare-delay-ms = <0x14>; - disable-delay-ms = <0x32>; - width-mm = <0x34>; - height-mm = <0x46>; - dsi,flags = <0xa03>; - dsi,format = <0x00>; - dsi,lanes = <0x04>; - panel-init-sequence = [39 00 03 e0 ab ba 39 00 03 e1 ba ab 39 00 05 b1 10 01 47 ff 39 00 07 b2 0c 08 04 50 50 14 39 00 04 b3 56 12 e0 39 00 04 b4 33 30 04 39 00 08 b6 b0 00 00 10 00 10 00 39 00 06 b8 05 12 29 49 48 39 00 27 b9 7f 63 52 45 42 34 39 24 3e 3d 3c 59 46 4d 3e 3d 30 22 00 7f 63 52 45 42 34 39 24 3e 3d 3c 59 46 4d 3e 3d 30 22 00 39 00 11 c0 32 10 12 34 22 22 22 22 90 04 90 04 0f 00 00 c1 39 00 0b c1 12 9f 8e 89 90 04 90 04 54 40 39 00 0d c2 77 09 08 89 08 11 22 33 44 87 18 00 39 00 17 c3 88 4a 24 24 1e 1f 12 0c 0e 10 04 06 24 24 02 02 02 02 02 02 02 02 39 00 17 c4 09 0b 24 24 1e 1f 13 0d 0f 11 05 07 24 24 02 02 02 02 02 02 02 02 39 00 03 c6 46 55 39 00 07 c8 12 00 31 42 34 16 39 00 03 ca 18 43 39 00 09 cd 0e 64 64 2c 16 6b 06 b3 39 00 05 d2 e3 2b 38 08 39 00 0c d4 00 01 00 0e 04 44 08 10 00 00 00 39 00 09 e6 80 09 ff ff ff ff ff ff 39 00 06 f0 12 03 20 00 ff 15 00 02 f3 03 05 c8 01 11 05 14 01 29]; - panel-exit-sequence = <0x5140128 0x50a0110>; - - display-timings { - native-mode = <0xa0>; - - 60Hz { - clock-frequency = <0x1ba8140>; - hactive = <0x280>; - vactive = <0x1e0>; - hfront-porch = <0x50>; - hsync-len = <0x14>; - hback-porch = <0x50>; - vfront-porch = <0x14>; - vsync-len = <0x04>; - vback-porch = <0x0c>; - hsync-active = <0x00>; - vsync-active = <0x00>; - de-active = <0x00>; - pixelclk-active = <0x01>; - phandle = <0xa0>; - }; - - 50Hz { - clock-frequency = <0x1ba8140>; - hactive = <0x280>; - vactive = <0x1e0>; - hfront-porch = <0x50>; - hsync-len = <0x14>; - hback-porch = <0x50>; - vfront-porch = <0x14>; - vsync-len = <0x04>; - vback-porch = <0x0c>; - hsync-active = <0x00>; - vsync-active = <0x00>; - de-active = <0x00>; - pixelclk-active = <0x01>; - phandle = <0xa00>; - }; - - 75Hz { - clock-frequency = <0x1ba8140>; - hactive = <0x280>; - vactive = <0x1e0>; - hfront-porch = <0x50>; - hsync-len = <0x14>; - hback-porch = <0x50>; - vfront-porch = <0x14>; - vsync-len = <0x04>; - vback-porch = <0x0c>; - hsync-active = <0x00>; - vsync-active = <0x00>; - de-active = <0x00>; - pixelclk-active = <0x01>; - phandle = <0xa01>; - }; - }; - }; - }; - - vop@ff460000 { - compatible = "rockchip,px30-vop-big"; - reg = <0x00 0xff460000 0x00 0x1fc 0x00 0xff460a00 0x00 0x400>; - rockchip,grf = <0x2f>; - reg-names = "regs\0gamma_lut"; - interrupts = <0x00 0x4d 0x04>; - clocks = <0x02 0xb5 0x02 0x96 0x02 0xfb>; - clock-names = "aclk_vop\0dclk_vop\0hclk_vop"; - power-domains = <0x8a 0x0c>; - iommus = <0xa1>; - status = "okay"; - phandle = <0x10f>; - - port { - #address-cells = <0x01>; - #size-cells = <0x00>; - phandle = <0x10>; - - endpoint@0 { - reg = <0x00>; - remote-endpoint = <0xa2>; - phandle = <0x12>; - }; - - endpoint@1 { - reg = <0x01>; - remote-endpoint = <0xa3>; - phandle = <0x13>; - }; - - endpoint@2 { - reg = <0x02>; - remote-endpoint = <0xa4>; - phandle = <0x14>; - }; - }; - }; - - iommu@ff460f00 { - compatible = "rockchip,iommu"; - reg = <0x00 0xff460f00 0x00 0x100>; - interrupts = <0x00 0x4d 0x04>; - interrupt-names = "vopb_mmu"; - clocks = <0x02 0xb5 0x02 0xfb>; - clock-names = "aclk\0hclk"; - power-domains = <0x8a 0x0c>; - #iommu-cells = <0x00>; - status = "okay"; - phandle = <0xa1>; - }; - - rk_rga@ff480000 { - compatible = "rockchip,rga2"; - reg = <0x00 0xff480000 0x00 0x1000>; - interrupts = <0x00 0x4c 0x04>; - clocks = <0x02 0xb7 0x02 0xfd 0x02 0x35>; - clock-names = "aclk_rga\0hclk_rga\0clk_rga"; - power-domains = <0x8a 0x0c>; - dma-coherent; - status = "okay"; - phandle = <0x110>; - }; - - cif@ff490000 { - compatible = "rockchip,cif"; - reg = <0x00 0xff490000 0x00 0x200>; - interrupts = <0x00 0x45 0x04>; - clocks = <0x02 0xb3 0x02 0xf9 0x02 0x160 0x02 0x34>; - clock-names = "aclk_cif0\0hclk_cif0\0pclk_cif\0cif0_out"; - resets = <0x02 0x2c 0x02 0x2d 0x02 0x2e>; - reset-names = "rst_cif_a\0rst_cif_h\0rst_cif_pclkin"; - power-domains = <0x8a 0x0d>; - pinctrl-names = "cif_pin_all"; - pinctrl-0 = <0xa5>; - iommus = <0xa6>; - status = "disabled"; - phandle = <0x111>; - }; - - cif-new@ff490000 { - compatible = "rockchip,px30-cif"; - reg = <0x00 0xff490000 0x00 0x200>; - interrupts = <0x00 0x45 0x04>; - clocks = <0x02 0xb3 0x02 0xf9 0x02 0x160 0x02 0x34>; - clock-names = "aclk_cif\0hclk_cif\0pclk_cif\0cif_out"; - resets = <0x02 0x2c 0x02 0x2d 0x02 0x2e>; - reset-names = "rst_cif_a\0rst_cif_h\0rst_cif_pclkin"; - power-domains = <0x8a 0x0d>; - iommus = <0xa6>; - status = "disabled"; - phandle = <0x112>; - }; - - iommu@ff490800 { - compatible = "rockchip,iommu"; - reg = <0x00 0xff490800 0x00 0x100>; - interrupts = <0x00 0x45 0x04>; - interrupt-names = "vip_mmu"; - clocks = <0x02 0xb3 0x02 0xf9>; - clock-names = "aclk\0hclk"; - power-domains = <0x8a 0x0d>; - rk_iommu,disable_reset_quirk; - #iommu-cells = <0x00>; - status = "okay"; - phandle = <0xa6>; - }; - - rk_isp@ff4a0000 { - compatible = "rockchip,px30-isp\0rockchip,isp"; - reg = <0x00 0xff4a0000 0x00 0x8000>; - interrupts = <0x00 0x46 0x04>; - clocks = <0x02 0xb4 0x02 0xfa 0x02 0x33 0x02 0x33 0x02 0x15f 0x02 0x34 0x02 0x34 0x02 0x146>; - clock-names = "aclk_isp\0hclk_isp\0clk_isp\0clk_isp_jpe\0pclkin_isp\0clk_cif_pll\0clk_cif_out\0pclk_dphyrx"; - resets = <0x02 0x2b 0x02 0x2f>; - reset-names = "rst_isp\0rst_mipicsiphy"; - power-domains = <0x8a 0x0d>; - pinctrl-names = "default\0isp_dvp8bit2\0isp_dvp10bit\0isp_dvp12bit"; - pinctrl-0 = <0xa7>; - pinctrl-1 = <0xa5>; - pinctrl-2 = <0xa5 0xa8>; - pinctrl-3 = <0xa9 0xa5 0xa8>; - rockchip,isp,mipiphy = <0x01>; - rockchip,isp,csiphy,reg = <0xff2f0000 0x4000>; - rockchip,grf = <0x2f>; - rockchip,cru = <0x02>; - rockchip,isp,iommu-enable = <0x01>; - iommus = <0xaa>; - status = "disabled"; - phandle = <0x113>; - }; - - rkisp1@ff4a0000 { - compatible = "rockchip,rk3326-rkisp1"; - reg = <0x00 0xff4a0000 0x00 0x8000>; - interrupts = <0x00 0x46 0x04 0x00 0x49 0x04 0x00 0x4a 0x04>; - interrupt-names = "isp_irq\0mi_irq\0mipi_irq"; - clocks = <0x02 0xb4 0x02 0xfa 0x02 0x33 0x02 0x15f>; - clock-names = "aclk_isp\0hclk_isp\0clk_isp\0pclk_isp"; - devfreq = <0xab>; - power-domains = <0x8a 0x0d>; - iommus = <0xaa>; - rockchip,grf = <0x2f>; - status = "okay"; - phandle = <0x114>; - }; - - iommu@ff4a8000 { - compatible = "rockchip,iommu"; - reg = <0x00 0xff4a8000 0x00 0x100>; - interrupts = <0x00 0x46 0x04>; - interrupt-names = "isp_mmu"; - clocks = <0x02 0xb4 0x02 0xfa>; - clock-names = "aclk\0hclk"; - power-domains = <0x8a 0x0d>; - rk_iommu,disable_reset_quirk; - #iommu-cells = <0x00>; - status = "okay"; - phandle = <0xaa>; - }; - - qos@ff518000 { - compatible = "syscon"; - reg = <0x00 0xff518000 0x00 0x20>; - phandle = <0x18>; - }; - - qos@ff520000 { - compatible = "syscon"; - reg = <0x00 0xff520000 0x00 0x20>; - phandle = <0x28>; - }; - - qos@ff52c000 { - compatible = "syscon"; - reg = <0x00 0xff52c000 0x00 0x20>; - phandle = <0x17>; - }; - - qos@ff538000 { - compatible = "syscon"; - reg = <0x00 0xff538000 0x00 0x20>; - phandle = <0x19>; - }; - - qos@ff538080 { - compatible = "syscon"; - reg = <0x00 0xff538080 0x00 0x20>; - phandle = <0x1a>; - }; - - qos@ff538100 { - compatible = "syscon"; - reg = <0x00 0xff538100 0x00 0x20>; - phandle = <0x1b>; - }; - - qos@ff538180 { - compatible = "syscon"; - reg = <0x00 0xff538180 0x00 0x20>; - phandle = <0x1c>; - }; - - qos@ff540000 { - compatible = "syscon"; - reg = <0x00 0xff540000 0x00 0x20>; - phandle = <0x15>; - }; - - qos@ff540080 { - compatible = "syscon"; - reg = <0x00 0xff540080 0x00 0x20>; - phandle = <0x16>; - }; - - qos@ff548000 { - compatible = "syscon"; - reg = <0x00 0xff548000 0x00 0x20>; - phandle = <0x23>; - }; - - qos@ff548080 { - compatible = "syscon"; - reg = <0x00 0xff548080 0x00 0x20>; - phandle = <0x24>; - }; - - qos@ff548100 { - compatible = "syscon"; - reg = <0x00 0xff548100 0x00 0x20>; - phandle = <0x25>; - }; - - qos@ff548180 { - compatible = "syscon"; - reg = <0x00 0xff548180 0x00 0x20>; - phandle = <0x26>; - }; - - qos@ff548200 { - compatible = "syscon"; - reg = <0x00 0xff548200 0x00 0x20>; - phandle = <0x27>; - }; - - qos@ff550000 { - compatible = "syscon"; - reg = <0x00 0xff550000 0x00 0x20>; - phandle = <0x1f>; - }; - - qos@ff550080 { - compatible = "syscon"; - reg = <0x00 0xff550080 0x00 0x20>; - phandle = <0x20>; - }; - - qos@ff550100 { - compatible = "syscon"; - reg = <0x00 0xff550100 0x00 0x20>; - phandle = <0x21>; - }; - - qos@ff550180 { - compatible = "syscon"; - reg = <0x00 0xff550180 0x00 0x20>; - phandle = <0x22>; - }; - - qos@ff558000 { - compatible = "syscon"; - reg = <0x00 0xff558000 0x00 0x20>; - phandle = <0x1d>; - }; - - qos@ff558080 { - compatible = "syscon"; - reg = <0x00 0xff558080 0x00 0x20>; - phandle = <0x1e>; - }; - - dfi@ff610000 { - reg = <0x00 0xff610000 0x00 0x400>; - compatible = "rockchip,px30-dfi"; - rockchip,pmugrf = <0xac>; - status = "okay"; - phandle = <0xad>; - }; - - dmc { - compatible = "rockchip,px30-dmc"; - interrupts = <0x00 0x69 0x04>; - interrupt-names = "complete_irq"; - devfreq-events = <0xad>; - clocks = <0x02 0x54>; - clock-names = "dmc_clk"; - operating-points-v2 = <0xae>; - ddr_timing = <0xaf>; - upthreshold = <0x28>; - downdifferential = <0x14>; - system-status-freq = <0x01 0x80e80 0x08 0x6ddd0 0x02 0x2f5d0 0x20 0x6ddd0 0x1000 0x80e80 0x4000 0xa2990 0x2000 0xa2990>; - auto-min-freq = <0x50140>; - auto-freq-en = <0x01>; - #cooling-cells = <0x02>; - status = "okay"; - center-supply = <0x0e>; - phandle = <0xab>; - - ddr_power_model { - compatible = "ddr_power_model"; - dynamic-power-coefficient = <0x78>; - static-power-coefficient = <0xc8>; - ts = <0x7d00 0x125c 0xffffffb0 0x02>; - thermal-zone = "soc-thermal"; - phandle = <0x115>; - }; - }; - - dmc-opp-table { - compatible = "operating-points-v2"; - rockchip,max-volt = <0x118c30>; - rockchip,evb-irdrop = <0x61a8>; - rockchip,pvtm-voltage-sel = <0x00 0xc350 0x00 0xc351 0xd2f0 0x01 0xd2f1 0xea60 0x02 0xea61 0x1869f 0x03>; - rockchip,pvtm-ch = <0x00 0x00>; - phandle = <0xae>; - - opp-528000000 { - opp-hz = <0x00 0x1f78a400>; - opp-microvolt = <0xee098>; - opp-microvolt-L0 = <0xee098>; - opp-microvolt-L1 = <0xee098>; - opp-microvolt-L2 = <0xe7ef0>; - opp-microvolt-L3 = <0xe7ef0>; - }; - - opp-666000000 { - opp-hz = <0x00 0x27b25a80>; - opp-microvolt = <0x100590>; - opp-microvolt-L0 = <0x100590>; - opp-microvolt-L1 = <0xf4240>; - opp-microvolt-L2 = <0xee098>; - opp-microvolt-L3 = <0xe7ef0>; - }; - - opp-786000000 { - opp-hz = <0x00 0x2ed96880>; - opp-microvolt = <0x10c8e0>; - opp-microvolt-L0 = <0x10c8e0>; - opp-microvolt-L1 = <0x100590>; - opp-microvolt-L2 = <0xfa3e8>; - opp-microvolt-L3 = <0xf4240>; - status = "okay"; - }; - }; - - rockchip-system-monitor { - compatible = "rockchip,system-monitor"; - rockchip,thermal-zone = "soc-thermal"; - rockchip,polling-delay = <0xc8>; - phandle = <0x116>; - }; - - pinctrl { - compatible = "rockchip,px30-pinctrl"; - rockchip,grf = <0x2f>; - rockchip,pmu = <0xac>; - #address-cells = <0x02>; - #size-cells = <0x02>; - ranges; - phandle = <0x117>; - - gpio0@ff040000 { - compatible = "rockchip,gpio-bank"; - reg = <0x00 0xff040000 0x00 0x100>; - interrupts = <0x00 0x03 0x04>; - clocks = <0x2a 0x14>; - gpio-controller; - #gpio-cells = <0x02>; - interrupt-controller; - #interrupt-cells = <0x02>; - phandle = <0x5c>; - }; - - gpio1@ff250000 { - compatible = "rockchip,gpio-bank"; - reg = <0x00 0xff250000 0x00 0x100>; - interrupts = <0x00 0x04 0x04>; - clocks = <0x02 0x15c>; - gpio-controller; - #gpio-cells = <0x02>; - interrupt-controller; - #interrupt-cells = <0x02>; - phandle = <0xbf>; - }; - - gpio2@ff260000 { - compatible = "rockchip,gpio-bank"; - reg = <0x00 0xff260000 0x00 0x100>; - interrupts = <0x00 0x05 0x04>; - clocks = <0x02 0x15d>; - gpio-controller; - #gpio-cells = <0x02>; - interrupt-controller; - #interrupt-cells = <0x02>; - phandle = <0x66>; - }; - - gpio3@ff270000 { - compatible = "rockchip,gpio-bank"; - reg = <0x00 0xff270000 0x00 0x100>; - interrupts = <0x00 0x06 0x04>; - clocks = <0x02 0x15e>; - gpio-controller; - #gpio-cells = <0x02>; - interrupt-controller; - #interrupt-cells = <0x02>; - phandle = <0x97>; - }; - - pcfg-pull-up { - bias-pull-up; - phandle = <0xb2>; - }; - - pcfg-pull-down { - bias-pull-down; - phandle = <0x118>; - }; - - pcfg-pull-none { - bias-disable; - phandle = <0xb1>; - }; - - pcfg-pull-none-2ma { - bias-disable; - drive-strength = <0x02>; - phandle = <0x119>; - }; - - pcfg-pull-up-2ma { - bias-pull-up; - drive-strength = <0x02>; - phandle = <0x11a>; - }; - - pcfg-pull-up-4ma { - bias-pull-up; - drive-strength = <0x04>; - phandle = <0xb3>; - }; - - pcfg-pull-none-4ma { - bias-disable; - drive-strength = <0x04>; - phandle = <0x11b>; - }; - - pcfg-pull-down-4ma { - bias-pull-down; - drive-strength = <0x04>; - phandle = <0x11c>; - }; - - pcfg-pull-none-8ma { - bias-disable; - drive-strength = <0x08>; - phandle = <0xb6>; - }; - - pcfg-pull-up-8ma { - bias-pull-up; - drive-strength = <0x08>; - phandle = <0xb4>; - }; - - pcfg-pull-none-12ma { - bias-disable; - drive-strength = <0x0c>; - phandle = <0xb8>; - }; - - pcfg-pull-up-12ma { - bias-pull-up; - drive-strength = <0x0c>; - phandle = <0xb7>; - }; - - pcfg-pull-none-smt { - bias-disable; - input-schmitt-enable; - phandle = <0xb0>; - }; - - pcfg-output-high { - output-high; - phandle = <0x11d>; - }; - - pcfg-output-low { - output-low; - phandle = <0xb9>; - }; - - pcfg-input-high { - bias-pull-up; - input-enable; - phandle = <0xb5>; - }; - - pcfg-input { - input-enable; - phandle = <0x11e>; - }; - - i2c0 { - - i2c0-xfer { - rockchip,pins = <0x00 0x08 0x01 0xb0 0x00 0x09 0x01 0xb0>; - phandle = <0x5b>; - }; - }; - - i2c1 { - - i2c1-xfer { - rockchip,pins = <0x00 0x12 0x01 0xb0 0x00 0x13 0x01 0xb0>; - phandle = <0x69>; - }; - }; - - i2c2 { - - i2c2-xfer { - rockchip,pins = <0x02 0x0f 0x02 0xb0 0x02 0x10 0x02 0xb0>; - phandle = <0x6a>; - }; - }; - - i2c3 { - - i2c3-xfer { - rockchip,pins = <0x01 0x0c 0x04 0xb0 0x01 0x0d 0x04 0xb0>; - phandle = <0x6b>; - }; - }; - - tsadc { - - tsadc-otp-gpio { - rockchip,pins = <0x00 0x06 0x00 0xb1>; - phandle = <0x86>; - }; - - tsadc-otp-out { - rockchip,pins = <0x00 0x06 0x01 0xb1>; - phandle = <0x87>; - }; - }; - - uart0 { - - uart0-xfer { - rockchip,pins = <0x00 0x0a 0x01 0xb2 0x00 0x0b 0x01 0xb2>; - phandle = <0x2c>; - }; - - uart0-cts { - rockchip,pins = <0x00 0x0c 0x01 0xb1>; - phandle = <0x2d>; - }; - - uart0-rts { - rockchip,pins = <0x00 0x0d 0x01 0xb1>; - phandle = <0x2e>; - }; - - uart0-rts-gpio { - rockchip,pins = <0x00 0x0d 0x00 0xb1>; - phandle = <0x11f>; - }; - }; - - uart1 { - - uart1-xfer { - rockchip,pins = <0x01 0x11 0x01 0xb2 0x01 0x10 0x01 0xb2>; - phandle = <0x4f>; - }; - - uart1-cts { - rockchip,pins = <0x01 0x12 0x01 0xb1>; - phandle = <0x50>; - }; - - uart1-rts { - rockchip,pins = <0x01 0x13 0x01 0xb1>; - phandle = <0x120>; - }; - - uart1-rts-gpio { - rockchip,pins = <0x01 0x13 0x00 0xb1>; - phandle = <0x121>; - }; - }; - - uart2-m0 { - - uart2m0-xfer { - rockchip,pins = <0x01 0x1a 0x02 0xb2 0x01 0x1b 0x02 0xb2>; - phandle = <0x51>; - }; - }; - - uart2-m1 { - - uart2m1-xfer { - rockchip,pins = <0x02 0x0c 0x02 0xb2 0x02 0x0e 0x02 0xb2>; - phandle = <0xba>; - }; - }; - - uart3-m0 { - - uart3m0-xfer { - rockchip,pins = <0x00 0x10 0x02 0xb2 0x00 0x11 0x02 0xb2>; - phandle = <0x122>; - }; - - uart3m0-cts { - rockchip,pins = <0x00 0x12 0x02 0xb1>; - phandle = <0x123>; - }; - - uart3m0-rts { - rockchip,pins = <0x00 0x13 0x02 0xb1>; - phandle = <0x124>; - }; - - uart3m0-rts-gpio { - rockchip,pins = <0x00 0x13 0x00 0xb1>; - phandle = <0x125>; - }; - }; - - uart3-m1 { - - uart3m1-xfer { - rockchip,pins = <0x01 0x0e 0x02 0xb2 0x01 0x0f 0x02 0xb2>; - phandle = <0x52>; - }; - - uart3m1-cts { - rockchip,pins = <0x01 0x0c 0x02 0xb1>; - phandle = <0x53>; - }; - - uart3m1-rts { - rockchip,pins = <0x01 0x0d 0x02 0xb1>; - phandle = <0x54>; - }; - - uart3m1-rts-gpio { - rockchip,pins = <0x01 0x0d 0x00 0xb1>; - phandle = <0x126>; - }; - }; - - uart4 { - - uart4-xfer { - rockchip,pins = <0x01 0x1c 0x02 0xb2 0x01 0x1d 0x02 0xb2>; - phandle = <0x55>; - }; - - uart4-cts { - rockchip,pins = <0x01 0x1e 0x02 0xb1>; - phandle = <0x56>; - }; - - uart4-rts { - rockchip,pins = <0x01 0x1f 0x02 0xb1>; - phandle = <0x57>; - }; - }; - - uart5 { - - uart5-xfer { - rockchip,pins = <0x03 0x02 0x04 0xb2 0x03 0x01 0x04 0xb2>; - phandle = <0x58>; - }; - - uart5-cts { - rockchip,pins = <0x03 0x03 0x04 0xb1>; - phandle = <0x59>; - }; - - uart5-rts { - rockchip,pins = <0x03 0x05 0x04 0xb1>; - phandle = <0x5a>; - }; - }; - - spi0 { - - spi0-clk { - rockchip,pins = <0x01 0x0f 0x03 0xb3>; - phandle = <0x6c>; - }; - - spi0-csn { - rockchip,pins = <0x01 0x0e 0x03 0xb3>; - phandle = <0x6d>; - }; - - spi0-miso { - rockchip,pins = <0x01 0x0d 0x03 0xb3>; - phandle = <0x6e>; - }; - - spi0-mosi { - rockchip,pins = <0x01 0x0c 0x03 0xb3>; - phandle = <0x6f>; - }; - - spi0-clk-hs { - rockchip,pins = <0x01 0x0f 0x03 0xb4>; - phandle = <0x70>; - }; - - spi0-miso-hs { - rockchip,pins = <0x01 0x0d 0x03 0xb4>; - phandle = <0x71>; - }; - - spi0-mosi-hs { - rockchip,pins = <0x01 0x0c 0x03 0xb4>; - phandle = <0x72>; - }; - }; - - spi1 { - - spi1-clk { - rockchip,pins = <0x03 0x0f 0x04 0xb3>; - phandle = <0x73>; - }; - - spi1-csn0 { - rockchip,pins = <0x03 0x09 0x04 0xb3>; - phandle = <0x74>; - }; - - spi1-csn1 { - rockchip,pins = <0x03 0x0a 0x02 0xb3>; - phandle = <0x75>; - }; - - spi1-miso { - rockchip,pins = <0x03 0x0e 0x04 0xb3>; - phandle = <0x76>; - }; - - spi1-mosi { - rockchip,pins = <0x03 0x0c 0x04 0xb3>; - phandle = <0x77>; - }; - - spi1-clk-hs { - rockchip,pins = <0x03 0x0f 0x04 0xb4>; - phandle = <0x78>; - }; - - spi1-miso-hs { - rockchip,pins = <0x03 0x0e 0x04 0xb4>; - phandle = <0x79>; - }; - - spi1-mosi-hs { - rockchip,pins = <0x03 0x0c 0x04 0xb4>; - phandle = <0x7a>; - }; - }; - - pdm { - - pdm-clk0m0 { - rockchip,pins = <0x03 0x16 0x02 0xb1>; - phandle = <0x44>; - }; - - pdm-clk0m1 { - rockchip,pins = <0x02 0x16 0x01 0xb1>; - phandle = <0x127>; - }; - - pdm-clk1 { - rockchip,pins = <0x03 0x17 0x02 0xb1>; - phandle = <0x45>; - }; - - pdm-sdi0m0 { - rockchip,pins = <0x03 0x1b 0x02 0xb1>; - phandle = <0x46>; - }; - - pdm-sdi0m1 { - rockchip,pins = <0x02 0x15 0x02 0xb1>; - phandle = <0x128>; - }; - - pdm-sdi1 { - rockchip,pins = <0x03 0x18 0x02 0xb1>; - phandle = <0x47>; - }; - - pdm-sdi2 { - rockchip,pins = <0x03 0x19 0x02 0xb1>; - phandle = <0x48>; - }; - - pdm-sdi3 { - rockchip,pins = <0x03 0x1a 0x02 0xb1>; - phandle = <0x49>; - }; - - pdm-clk0m0-sleep { - rockchip,pins = <0x03 0x16 0x00 0xb5>; - phandle = <0x129>; - }; - - pdm-clk0m1-sleep { - rockchip,pins = <0x02 0x16 0x00 0xb5>; - phandle = <0x12a>; - }; - - pdm-clk1-sleep { - rockchip,pins = <0x03 0x17 0x00 0xb5>; - phandle = <0x12b>; - }; - - pdm-sdi0m0-sleep { - rockchip,pins = <0x03 0x1b 0x00 0xb5>; - phandle = <0x12c>; - }; - - pdm-sdi0m1-sleep { - rockchip,pins = <0x02 0x15 0x00 0xb5>; - phandle = <0x12d>; - }; - - pdm-sdi1-sleep { - rockchip,pins = <0x03 0x18 0x00 0xb5>; - phandle = <0x12e>; - }; - - pdm-sdi2-sleep { - rockchip,pins = <0x03 0x19 0x00 0xb5>; - phandle = <0x12f>; - }; - - pdm-sdi3-sleep { - rockchip,pins = <0x03 0x1a 0x00 0xb5>; - phandle = <0x130>; - }; - }; - - i2s0 { - - i2s0-8ch-mclk { - rockchip,pins = <0x03 0x11 0x02 0xb1>; - phandle = <0x131>; - }; - - i2s0-8ch-sclktx { - rockchip,pins = <0x03 0x13 0x02 0xb1>; - phandle = <0x30>; - }; - - i2s0-8ch-sclkrx { - rockchip,pins = <0x03 0x0c 0x02 0xb1>; - phandle = <0x31>; - }; - - i2s0-8ch-lrcktx { - rockchip,pins = <0x03 0x12 0x02 0xb1>; - phandle = <0x32>; - }; - - i2s0-8ch-lrckrx { - rockchip,pins = <0x03 0x0d 0x02 0xb1>; - phandle = <0x33>; - }; - - i2s0-8ch-sdo0 { - rockchip,pins = <0x03 0x14 0x02 0xb1>; - phandle = <0x38>; - }; - - i2s0-8ch-sdo1 { - rockchip,pins = <0x03 0x10 0x02 0xb1>; - phandle = <0x39>; - }; - - i2s0-8ch-sdo2 { - rockchip,pins = <0x03 0x0f 0x02 0xb1>; - phandle = <0x3a>; - }; - - i2s0-8ch-sdo3 { - rockchip,pins = <0x03 0x0e 0x02 0xb1>; - phandle = <0x3b>; - }; - - i2s0-8ch-sdi0 { - rockchip,pins = <0x03 0x15 0x02 0xb1>; - phandle = <0x34>; - }; - - i2s0-8ch-sdi1 { - rockchip,pins = <0x03 0x0b 0x02 0xb1>; - phandle = <0x35>; - }; - - i2s0-8ch-sdi2 { - rockchip,pins = <0x03 0x09 0x02 0xb1>; - phandle = <0x36>; - }; - - i2s0-8ch-sdi3 { - rockchip,pins = <0x03 0x08 0x02 0xb1>; - phandle = <0x37>; - }; - }; - - i2s1 { - - i2s1-2ch-mclk { - rockchip,pins = <0x02 0x13 0x01 0xb1>; - phandle = <0x68>; - }; - - i2s1-2ch-sclk { - rockchip,pins = <0x02 0x12 0x01 0xb1>; - phandle = <0x3c>; - }; - - i2s1-2ch-lrck { - rockchip,pins = <0x02 0x11 0x01 0xb1>; - phandle = <0x3d>; - }; - - i2s1-2ch-sdi { - rockchip,pins = <0x02 0x15 0x01 0xb1>; - phandle = <0x3e>; - }; - - i2s1-2ch-sdo { - rockchip,pins = <0x02 0x14 0x01 0xb1>; - phandle = <0x3f>; - }; - }; - - i2s2 { - - i2s2-2ch-mclk { - rockchip,pins = <0x03 0x01 0x02 0xb1>; - phandle = <0x132>; - }; - - i2s2-2ch-sclk { - rockchip,pins = <0x03 0x02 0x02 0xb1>; - phandle = <0x40>; - }; - - i2s2-2ch-lrck { - rockchip,pins = <0x03 0x03 0x02 0xb1>; - phandle = <0x41>; - }; - - i2s2-2ch-sdi { - rockchip,pins = <0x03 0x05 0x02 0xb1>; - phandle = <0x42>; - }; - - i2s2-2ch-sdo { - rockchip,pins = <0x03 0x07 0x02 0xb1>; - phandle = <0x43>; - }; - }; - - sdmmc { - - sdmmc-clk { - rockchip,pins = <0x01 0x1e 0x01 0xb6>; - phandle = <0x8f>; - }; - - sdmmc-cmd { - rockchip,pins = <0x01 0x1f 0x01 0xb4>; - phandle = <0x90>; - }; - - sdmmc-det { - rockchip,pins = <0x00 0x03 0x01 0xb4>; - phandle = <0x91>; - }; - - sdmmc-bus1 { - rockchip,pins = <0x01 0x1a 0x01 0xb4>; - phandle = <0x133>; - }; - - sdmmc-bus4 { - rockchip,pins = <0x01 0x1a 0x01 0xb4 0x01 0x1b 0x01 0xb4 0x01 0x1c 0x01 0xb4 0x01 0x1d 0x01 0xb4>; - phandle = <0x92>; - }; - - sdmmc-gpio { - rockchip,pins = <0x01 0x1a 0x00 0xb3 0x01 0x1b 0x00 0xb3 0x01 0x1c 0x00 0xb3 0x01 0x1d 0x00 0xb3 0x01 0x1e 0x00 0xb3 0x01 0x1f 0x00 0xb3>; - phandle = <0x134>; - }; - }; - - sdio { - - sdio-clk { - rockchip,pins = <0x01 0x15 0x01 0xb1>; - phandle = <0x96>; - }; - - sdio-cmd { - rockchip,pins = <0x01 0x14 0x01 0xb2>; - phandle = <0x95>; - }; - - sdio-bus4 { - rockchip,pins = <0x01 0x16 0x01 0xb2 0x01 0x17 0x01 0xb2 0x01 0x18 0x01 0xb2 0x01 0x19 0x01 0xb2>; - phandle = <0x94>; - }; - - sdio-gpio { - rockchip,pins = <0x01 0x16 0x00 0xb2 0x01 0x17 0x00 0xb2 0x01 0x18 0x00 0xb2 0x01 0x19 0x00 0xb2 0x01 0x14 0x00 0xb2 0x01 0x15 0x00 0xb2>; - phandle = <0x135>; - }; - }; - - emmc { - - emmc-clk { - rockchip,pins = <0x01 0x09 0x02 0xb6>; - phandle = <0x136>; - }; - - emmc-cmd { - rockchip,pins = <0x01 0x0a 0x02 0xb4>; - phandle = <0x137>; - }; - - emmc-pwren { - rockchip,pins = <0x01 0x08 0x02 0xb1>; - phandle = <0x138>; - }; - - emmc-rstnout { - rockchip,pins = <0x01 0x0b 0x02 0xb1>; - phandle = <0x139>; - }; - - emmc-bus1 { - rockchip,pins = <0x01 0x00 0x02 0xb4>; - phandle = <0x13a>; - }; - - emmc-bus4 { - rockchip,pins = <0x01 0x00 0x02 0xb4 0x01 0x01 0x02 0xb4 0x01 0x02 0x02 0xb4 0x01 0x03 0x02 0xb4>; - phandle = <0x13b>; - }; - - emmc-bus8 { - rockchip,pins = <0x01 0x00 0x02 0xb4 0x01 0x01 0x02 0xb4 0x01 0x02 0x02 0xb4 0x01 0x03 0x02 0xb4 0x01 0x04 0x02 0xb4 0x01 0x05 0x02 0xb4 0x01 0x06 0x02 0xb4 0x01 0x07 0x02 0xb4>; - phandle = <0x13c>; - }; - }; - - flash { - - flash-cs0 { - rockchip,pins = <0x01 0x08 0x01 0xb1>; - phandle = <0x13d>; - }; - - flash-rdy { - rockchip,pins = <0x01 0x09 0x01 0xb1>; - phandle = <0x13e>; - }; - - flash-dqs { - rockchip,pins = <0x01 0x0a 0x01 0xb1>; - phandle = <0x13f>; - }; - - flash-ale { - rockchip,pins = <0x01 0x0b 0x01 0xb1>; - phandle = <0x140>; - }; - - flash-cle { - rockchip,pins = <0x01 0x0c 0x01 0xb1>; - phandle = <0x141>; - }; - - flash-wrn { - rockchip,pins = <0x01 0x0d 0x01 0xb1>; - phandle = <0x142>; - }; - - flash-csl { - rockchip,pins = <0x01 0x0e 0x01 0xb1>; - phandle = <0x143>; - }; - - flash-rdn { - rockchip,pins = <0x01 0x0f 0x01 0xb1>; - phandle = <0x144>; - }; - - flash-bus8 { - rockchip,pins = <0x01 0x00 0x01 0xb7 0x01 0x01 0x01 0xb7 0x01 0x02 0x01 0xb7 0x01 0x03 0x01 0xb7 0x01 0x04 0x01 0xb7 0x01 0x05 0x01 0xb7 0x01 0x06 0x01 0xb7 0x01 0x07 0x01 0xb7>; - phandle = <0x145>; - }; - }; - - lcdc { - - lcdc-m0-rgb-pins { - rockchip,pins = <0x03 0x00 0x01 0xb6 0x03 0x01 0x01 0xb6 0x03 0x02 0x01 0xb6 0x03 0x03 0x01 0xb6 0x03 0x04 0x01 0xb6 0x03 0x05 0x01 0xb6 0x03 0x06 0x01 0xb6 0x03 0x07 0x01 0xb6 0x03 0x08 0x01 0xb6 0x03 0x09 0x01 0xb6 0x03 0x0a 0x01 0xb6 0x03 0x0b 0x01 0xb6 0x03 0x0c 0x01 0xb6 0x03 0x0d 0x01 0xb6 0x03 0x0e 0x01 0xb6 0x03 0x0f 0x01 0xb6 0x03 0x10 0x01 0xb6 0x03 0x11 0x01 0xb6 0x03 0x12 0x01 0xb6 0x03 0x13 0x01 0xb6 0x03 0x14 0x01 0xb6 0x03 0x15 0x01 0xb6 0x03 0x16 0x01 0xb6 0x03 0x17 0x01 0xb6 0x03 0x18 0x01 0xb6 0x03 0x19 0x01 0xb6 0x03 0x1a 0x01 0xb6 0x03 0x1b 0x01 0xb6>; - phandle = <0x146>; - }; - - lcdc-m0-sleep-pins { - rockchip,pins = <0x03 0x00 0x00 0xb1 0x03 0x01 0x00 0xb1 0x03 0x02 0x00 0xb1 0x03 0x03 0x00 0xb1 0x03 0x04 0x00 0xb1 0x03 0x05 0x00 0xb1 0x03 0x06 0x00 0xb1 0x03 0x07 0x00 0xb1 0x03 0x08 0x00 0xb1 0x03 0x09 0x00 0xb1 0x03 0x0a 0x00 0xb1 0x03 0x0b 0x00 0xb1 0x03 0x0c 0x00 0xb1 0x03 0x0d 0x00 0xb1 0x03 0x0e 0x00 0xb1 0x03 0x0f 0x00 0xb1 0x03 0x10 0x00 0xb1 0x03 0x11 0x00 0xb1 0x03 0x12 0x00 0xb1 0x03 0x13 0x00 0xb1 0x03 0x14 0x00 0xb1 0x03 0x15 0x00 0xb1 0x03 0x16 0x00 0xb1 0x03 0x17 0x00 0xb1 0x03 0x18 0x00 0xb1 0x03 0x19 0x00 0xb1 0x03 0x1a 0x00 0xb1 0x03 0x1b 0x00 0xb1>; - phandle = <0x147>; - }; - - lcdc-m1-rgb-pins { - rockchip,pins = <0x03 0x00 0x01 0xb6 0x03 0x04 0x01 0xb6 0x03 0x06 0x01 0xb6 0x03 0x0a 0x01 0xb6 0x03 0x0b 0x01 0xb6 0x03 0x0d 0x01 0xb6 0x03 0x10 0x01 0xb6 0x03 0x11 0x01 0xb6 0x03 0x12 0x01 0xb6 0x03 0x13 0x01 0xb6 0x03 0x14 0x01 0xb6 0x03 0x15 0x01 0xb6 0x03 0x16 0x01 0xb6 0x03 0x17 0x01 0xb6 0x03 0x18 0x01 0xb6 0x03 0x19 0x01 0xb6 0x03 0x1a 0x01 0xb6 0x03 0x1b 0x01 0xb6>; - phandle = <0x4d>; - }; - - lcdc-m1-sleep-pins { - rockchip,pins = <0x03 0x00 0x00 0xb1 0x03 0x04 0x00 0xb1 0x03 0x06 0x00 0xb1 0x03 0x0a 0x00 0xb1 0x03 0x0b 0x00 0xb1 0x03 0x0d 0x00 0xb1 0x03 0x10 0x00 0xb1 0x03 0x11 0x00 0xb1 0x03 0x12 0x00 0xb1 0x03 0x13 0x00 0xb1 0x03 0x14 0x00 0xb1 0x03 0x15 0x00 0xb1 0x03 0x16 0x00 0xb1 0x03 0x17 0x00 0xb1 0x03 0x18 0x00 0xb1 0x03 0x19 0x00 0xb1 0x03 0x1a 0x00 0xb1 0x03 0x1b 0x00 0xb1>; - phandle = <0x4e>; - }; - }; - - pwm0 { - - pwm0-pin { - rockchip,pins = <0x00 0x0f 0x01 0xb1>; - phandle = <0x7b>; - }; - }; - - pwm1 { - - pwm1-pin { - rockchip,pins = <0x00 0x10 0x01 0xb1>; - phandle = <0x7c>; - }; - }; - - pwm2 { - - pwm2-pin { - rockchip,pins = <0x02 0x0d 0x01 0xb1>; - phandle = <0x7d>; - }; - }; - - pwm3 { - - pwm3-pin { - rockchip,pins = <0x00 0x11 0x01 0xb1>; - phandle = <0x7e>; - }; - }; - - pwm4 { - - pwm4-pin { - rockchip,pins = <0x03 0x12 0x03 0xb1>; - phandle = <0x7f>; - }; - }; - - pwm5 { - - pwm5-pin { - rockchip,pins = <0x03 0x13 0x03 0xb1>; - phandle = <0x80>; - }; - }; - - pwm6 { - - pwm6-pin { - rockchip,pins = <0x03 0x14 0x03 0xb1>; - phandle = <0x81>; - }; - }; - - pwm7 { - - pwm7-pin { - rockchip,pins = <0x03 0x15 0x03 0xb1>; - phandle = <0x82>; - }; - }; - - gmac { - - rmii-pins { - rockchip,pins = <0x02 0x00 0x02 0xb8 0x02 0x01 0x02 0xb8 0x02 0x02 0x02 0xb8 0x02 0x03 0x02 0xb1 0x02 0x04 0x02 0xb1 0x02 0x05 0x02 0xb1 0x02 0x06 0x02 0xb1 0x02 0x07 0x02 0xb1 0x02 0x09 0x02 0xb1>; - phandle = <0x8d>; - }; - - mac-refclk-12ma { - rockchip,pins = <0x02 0x0a 0x02 0xb8>; - phandle = <0x8e>; - }; - - mac-refclk { - rockchip,pins = <0x02 0x0a 0x02 0xb1>; - phandle = <0x148>; - }; - }; - - cif-m0 { - - cif-clkout-m0 { - rockchip,pins = <0x02 0x0b 0x01 0xb8>; - phandle = <0xa7>; - }; - - dvp-d2d9-m0 { - rockchip,pins = <0x02 0x00 0x01 0xb1 0x02 0x01 0x01 0xb1 0x02 0x02 0x01 0xb1 0x02 0x03 0x01 0xb1 0x02 0x04 0x01 0xb1 0x02 0x05 0x01 0xb1 0x02 0x06 0x01 0xb1 0x02 0x07 0x01 0xb1 0x02 0x08 0x01 0xb1 0x02 0x09 0x01 0xb1 0x02 0x0a 0x01 0xb1 0x02 0x0b 0x01 0xb1>; - phandle = <0xa5>; - }; - - dvp-d0d1-m0 { - rockchip,pins = <0x02 0x0c 0x01 0xb1 0x02 0x0e 0x01 0xb1>; - phandle = <0xa9>; - }; - - d10-d11-m0 { - rockchip,pins = <0x02 0x0f 0x01 0xb1 0x02 0x10 0x01 0xb1>; - phandle = <0xa8>; - }; - }; - - cif-m1 { - - cif-clkout-m1 { - rockchip,pins = <0x03 0x18 0x03 0xb1>; - phandle = <0x149>; - }; - - dvp-d2d9-m1 { - rockchip,pins = <0x03 0x03 0x03 0xb1 0x03 0x05 0x03 0xb1 0x03 0x07 0x03 0xb1 0x03 0x08 0x03 0xb1 0x03 0x09 0x03 0xb1 0x03 0x0c 0x03 0xb1 0x03 0x0e 0x03 0xb1 0x03 0x0f 0x03 0xb1 0x03 0x19 0x03 0xb1 0x03 0x1a 0x03 0xb1 0x03 0x1b 0x03 0xb1 0x03 0x18 0x03 0xb1>; - phandle = <0x14a>; - }; - - dvp-d0d1-m1 { - rockchip,pins = <0x03 0x01 0x03 0xb1 0x03 0x02 0x03 0xb1>; - phandle = <0x14b>; - }; - - d10-d11-m1 { - rockchip,pins = <0x03 0x16 0x03 0xb1 0x03 0x17 0x03 0xb1>; - phandle = <0x14c>; - }; - }; - - isp { - - isp-prelight { - rockchip,pins = <0x03 0x19 0x04 0xb1>; - phandle = <0x14d>; - }; - }; - - pmic { - - pmic_int { - rockchip,pins = <0x00 0x0a 0x00 0xb2 0x00 0x0b 0x00 0xb1>; - phandle = <0x5d>; - }; - - soc_slppin_gpio { - rockchip,pins = <0x00 0x04 0x00 0xb9>; - phandle = <0x60>; - }; - - soc_slppin_slp { - rockchip,pins = <0x00 0x04 0x01 0xb1>; - phandle = <0x5e>; - }; - - soc_slppin_rst { - rockchip,pins = <0x00 0x04 0x02 0xb1>; - phandle = <0x62>; - }; - }; - - leds { - - led-pins { - rockchip,pins = <0x00 0x11 0x00 0xb1>; - phandle = <0xc0>; - }; - }; - - btns { - - btn-pins { - rockchip,pins = <0x01 0x0c 0x00 0xb2 0x01 0x0d 0x00 0xb2 0x01 0x0e 0x00 0xb2 0x01 0x0f 0x00 0xb2 0x01 0x02 0x00 0xb2 0x01 0x05 0x00 0xb2 0x01 0x06 0x00 0xb2 0x01 0x07 0x00 0xb2 0x02 0x00 0x00 0xb2 0x02 0x01 0x00 0xb2 0x02 0x02 0x00 0xb2 0x02 0x03 0x00 0xb2 0x02 0x04 0x00 0xb2 0x02 0x05 0x00 0xb2 0x02 0x06 0x00 0xb2 0x02 0x07 0x00 0xb2 0x03 0x09 0x00 0xb2 0x03 0x0a 0x00 0xb2 0x03 0x0c 0x00 0xb2 0x03 0x0f 0x00 0xb2>; - phandle = <0xbd>; - }; - }; - }; - - chosen { - bootargs = [00]; - }; - - fiq-debugger { - compatible = "rockchip,fiq-debugger"; - rockchip,serial-id = <0x02>; - rockchip,wake-irq = <0x00>; - rockchip,irq-mode-enable = <0x00>; - rockchip,baudrate = <0x1c200>; - interrupts = <0x00 0x7f 0x08>; - pinctrl-names = "default"; - pinctrl-0 = <0xba>; - status = "okay"; - }; - - ramoops { - compatible = "ramoops"; - record-size = <0x00 0x20000>; - console-size = <0x00 0x80000>; - ftrace-size = <0x00 0x00>; - pmsg-size = <0x00 0x00>; - memory-region = <0xbb>; - }; - - reserved-memory { - #address-cells = <0x02>; - #size-cells = <0x02>; - ranges; - - drm-logo@00000000 { - compatible = "rockchip,drm-logo"; - reg = <0x00 0x00 0x00 0x00>; - phandle = <0x11>; - }; - - region@110000 { - reg = <0x00 0x110000 0x00 0xf0000>; - reg-names = "ramoops_mem"; - phandle = <0xbb>; - }; - }; - - odroidgo3-keys { - compatible = "gpio-keys"; - #address-cells = <0x01>; - #size-cells = <0x00>; - autorepeat; - phandle = <0x14e>; - - button@0 { - label = "GPIO BTN-VOLUP"; - linux,code = <0x73>; - gpios = <0x66 0x00 0x01>; - }; - - button@1 { - label = "GPIO BTN-VOLDN"; - linux,code = <0x72>; - gpios = <0x66 0x01 0x01>; - }; - }; - - odroidgo3-joypad { - compatible = "odroidgo3-joypad"; - pwms = <0xbc 0x00 0xbebc200 0x00>; - pwm-names = "enable"; - rumble-boost-weak = <0x00>; - rumble-boost-strong = <0x00>; - joypad-name = "GO-Super Gamepad"; - joypad-product = <0x1100>; - joypad-revision = <0x100>; - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <0xbd>; - pinctrl-1 = <0x7b>; - io-channel-names = "amux_adc"; - io-channels = <0xbe 0x01>; - amux-count = <0x04>; - amux-a-gpios = <0x97 0x0b 0x01>; - amux-b-gpios = <0x97 0x08 0x01>; - amux-en-gpios = <0x97 0x0d 0x01>; - button-adc-scale = <0x02>; - button-adc-deadzone = <0x40>; - button-adc-fuzz = <0x20>; - button-adc-flat = <0x20>; - abs_x-p-tuning = <0xc8>; - abs_x-n-tuning = <0xc8>; - abs_y-p-tuning = <0xc8>; - abs_y-n-tuning = <0xc8>; - abs_rx-p-tuning = <0xc8>; - abs_rx-n-tuning = <0xc8>; - abs_ry-p-tuning = <0xc8>; - abs_ry-n-tuning = <0xc8>; - poll-interval = <0x0a>; - invert-absx; - invert-absy; - phandle = <0x14f>; - - sw1 { - gpios = <0xbf 0x0c 0x01>; - label = "GPIO DPAD-UP"; - linux,code = <0x220>; - }; - - sw2 { - gpios = <0xbf 0x0d 0x01>; - label = "GPIO DPAD-DOWN"; - linux,code = <0x221>; - }; - - sw3 { - gpios = <0xbf 0x0e 0x01>; - label = "GPIO DPAD-LEFT"; - linux,code = <0x222>; - }; - - sw4 { - gpios = <0xbf 0x0f 0x01>; - label = "GPIO DPAD-RIGHT"; - linux,code = <0x223>; - }; - - sw5 { - gpios = <0xbf 0x02 0x01>; - label = "GPIO KEY BTN-A"; - linux,code = <0x131>; - }; - - sw6 { - gpios = <0xbf 0x05 0x01>; - label = "GPIO BTN-B"; - linux,code = <0x130>; - }; - - sw7 { - gpios = <0xbf 0x06 0x01>; - label = "GPIO BTN-Y"; - linux,code = <0x134>; - }; - - sw8 { - gpios = <0xbf 0x07 0x01>; - label = "GPIO BTN-X"; - linux,code = <0x133>; - }; - - sw11 { - gpios = <0x66 0x02 0x01>; - label = "GPIO F3"; - linux,code = <0x2c2>; - }; - - sw12 { - gpios = <0x66 0x03 0x01>; - label = "GPIO F4"; - linux,code = <0x2c3>; - }; - - sw15 { - gpios = <0x66 0x06 0x01>; - label = "GPIO TOP-LEFT"; - linux,code = <0x136>; - }; - - sw16 { - gpios = <0x66 0x07 0x01>; - label = "GPIO TOP-RIGHT"; - linux,code = <0x137>; - }; - - sw19 { - gpios = <0x97 0x09 0x01>; - label = "GPIO F1"; - linux,code = <0x2c0>; - }; - - sw20 { - gpios = <0x97 0x0f 0x01>; - label = "GPIO TOP-RIGHT2"; - linux,code = <0x139>; - }; - - sw21 { - gpios = <0x97 0x0a 0x01>; - label = "GPIO TOP-LEFT2"; - linux,code = <0x138>; - }; - - sw22 { - gpios = <0x97 0x0c 0x01>; - label = "GPIO F2"; - linux,code = <0x2c1>; - }; - - sw13 { - gpios = <0x66 0x04 0x01>; - label = "GPIO F5"; - linux,code = <0x2c4>; - }; - }; - - gpio_leds { - compatible = "gpio-leds"; - pinctrl-names = "led_pins"; - pinctrl-0 = <0xc0>; - phandle = <0x150>; - - heartbeat { - label = "blue:heartbeat"; - gpios = <0x5c 0x11 0x00>; - linux,default-trigger = "heartbeat"; - }; - }; - - backlight { - compatible = "pwm-backlight"; - pwms = <0xc1 0x00 0xf519 0x00>; - brightness-levels = <0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f 0x20 0x21 0x22 0x23 0x24 0x25 0x26 0x27 0x28 0x29 0x2a 0x2b 0x2c 0x2d 0x2e 0x2f 0x30 0x31 0x32 0x33 0x34 0x35 0x36 0x37 0x38 0x39 0x3a 0x3b 0x3c 0x3d 0x3e 0x3f 0x40 0x41 0x42 0x43 0x44 0x45 0x46 0x47 0x48 0x49 0x4a 0x4b 0x4c 0x4d 0x4e 0x4f 0x50 0x51 0x52 0x53 0x54 0x55 0x56 0x57 0x58 0x59 0x5a 0x5b 0x5c 0x5d 0x5e 0x5f 0x60 0x61 0x62 0x63 0x64 0x65 0x66 0x67 0x68 0x69 0x6a 0x6b 0x6c 0x6d 0x6e 0x6f 0x70 0x71 0x72 0x73 0x74 0x75 0x76 0x77 0x78 0x79 0x7a 0x7b 0x7c 0x7d 0x7e 0x7f 0x80 0x81 0x82 0x83 0x84 0x85 0x86 0x87 0x88 0x89 0x8a 0x8b 0x8c 0x8d 0x8e 0x8f 0x90 0x91 0x92 0x93 0x94 0x95 0x96 0x97 0x98 0x99 0x9a 0x9b 0x9c 0x9d 0x9e 0x9f 0xa0>; - default-brightness-level = <0x33>; - phandle = <0x9d>; - }; - - rk817-sound { - compatible = "simple-audio-card"; - simple-audio-card,format = "i2s"; - simple-audio-card,name = "rockchip,rk817-codec"; - simple-audio-card,mclk-fs = <0x100>; - simple-audio-card,widgets = "Microphone\0Mic Jack\0Headphone\0Headphone Jack"; - simple-audio-card,routing = "MIC_IN\0Mic Jack\0Headphone Jack\0HPOL\0Headphone Jack\0HPOR"; - simple-audio-card,hp-det-gpio = <0x66 0x16 0x01>; - simple-audio-card,codec-hp-det = <0x01>; - - simple-audio-card,cpu { - sound-dai = <0xc2>; - }; - - simple-audio-card,codec { - sound-dai = <0xc3>; - }; - }; - - vccsys { - compatible = "regulator-fixed"; - regulator-name = "vcc3v8_sys"; - regulator-always-on; - regulator-min-microvolt = <0x39fbc0>; - regulator-max-microvolt = <0x39fbc0>; - phandle = <0x64>; - }; - - __symbols__ { - ddr_timing = "/ddr_timing"; - cpu0 = "/cpus/cpu@0"; - cpu1 = "/cpus/cpu@1"; - cpu2 = "/cpus/cpu@2"; - cpu3 = "/cpus/cpu@3"; - CPU_SLEEP = "/cpus/idle-states/cpu-sleep"; - CLUSTER_SLEEP = "/cpus/idle-states/cluster-sleep"; - cpu0_opp_table = "/cpu0-opp-table"; - bus_soc = "/bus-soc"; - bus_apll = "/bus-apll"; - bus_apll_opp_table = "/bus-apll-opp-table"; - display_subsystem = "/display-subsystem"; - route_lvds = "/display-subsystem/route/route-lvds"; - route_dsi = "/display-subsystem/route/route-dsi"; - route_rgb = "/display-subsystem/route/route-rgb"; - gmac_clkin = "/external-gmac-clock"; - rockchip_suspend = "/rockchip-suspend"; - xin24m = "/xin24m"; - xin32k = "/xin32k"; - pmu = "/power-management@ff000000"; - power = "/power-management@ff000000/power-controller"; - pmugrf = "/syscon@ff010000"; - pmu_io_domains = "/syscon@ff010000/io-domains"; - pmu_pvtm = "/syscon@ff010000/pmu-pvtm"; - uart0 = "/serial@ff030000"; - i2s0_8ch = "/i2s@ff060000"; - i2s1_2ch = "/i2s@ff070000"; - i2s2_2ch = "/i2s@ff080000"; - pdm = "/pdm@ff0a0000"; - crypto = "/crypto@ff0b0000"; - rng = "/rng@ff0b0000"; - gic = "/interrupt-controller@ff131000"; - grf = "/syscon@ff140000"; - io_domains = "/syscon@ff140000/io-domains"; - lvds = "/syscon@ff140000/lvds"; - lvds_in_vopb = "/syscon@ff140000/lvds/ports/port@0/endpoint@0"; - rgb = "/syscon@ff140000/rgb"; - rgb_in_vopb = "/syscon@ff140000/rgb/ports/port@0/endpoint@0"; - core_grf = "/syscon@ff148000"; - pvtm = "/syscon@ff148000/pvtm"; - uart1 = "/serial@ff158000"; - uart2 = "/serial@ff160000"; - uart3 = "/serial@ff168000"; - uart4 = "/serial@ff170000"; - uart5 = "/serial@ff178000"; - i2c0 = "/i2c@ff180000"; - rk817 = "/i2c@ff180000/pmic@20"; - pinctrl_rk8xx = "/i2c@ff180000/pmic@20/pinctrl_rk8xx"; - rk817_ts_gpio1 = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_ts_gpio1"; - rk817_gt_gpio2 = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_gt_gpio2"; - rk817_pin_ts = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_pin_ts"; - rk817_pin_gt = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_pin_gt"; - rk817_slppin_null = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_slppin_null"; - rk817_slppin_slp = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_slppin_slp"; - rk817_slppin_pwrdn = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_slppin_pwrdn"; - rk817_slppin_rst = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_slppin_rst"; - vdd_logic = "/i2c@ff180000/pmic@20/regulators/DCDC_REG1"; - vdd_arm = "/i2c@ff180000/pmic@20/regulators/DCDC_REG2"; - vcc_ddr = "/i2c@ff180000/pmic@20/regulators/DCDC_REG3"; - vcc_3v3 = "/i2c@ff180000/pmic@20/regulators/DCDC_REG4"; - vcc_1v0 = "/i2c@ff180000/pmic@20/regulators/LDO_REG1"; - vcc1v8_soc = "/i2c@ff180000/pmic@20/regulators/LDO_REG2"; - vdd1v0_soc = "/i2c@ff180000/pmic@20/regulators/LDO_REG3"; - vcc3v3_pmu = "/i2c@ff180000/pmic@20/regulators/LDO_REG4"; - vccio_sd = "/i2c@ff180000/pmic@20/regulators/LDO_REG5"; - vcc_sd = "/i2c@ff180000/pmic@20/regulators/LDO_REG6"; - vcc_backlight = "/i2c@ff180000/pmic@20/regulators/LDO_REG7"; - vcc_lcd = "/i2c@ff180000/pmic@20/regulators/LDO_REG8"; - dcdc_boost = "/i2c@ff180000/pmic@20/regulators/BOOST"; - otg_switch = "/i2c@ff180000/pmic@20/regulators/OTG_SWITCH"; - rk817_codec = "/i2c@ff180000/pmic@20/codec"; - i2c1 = "/i2c@ff190000"; - i2c2 = "/i2c@ff1a0000"; - i2c3 = "/i2c@ff1b0000"; - spi0 = "/spi@ff1d0000"; - spi1 = "/spi@ff1d8000"; - wdt = "/watchdog@ff1e0000"; - pwm0 = "/pwm@ff200000"; - pwm1 = "/pwm@ff200010"; - pwm2 = "/pwm@ff200020"; - pwm3 = "/pwm@ff200030"; - pwm4 = "/pwm@ff208000"; - pwm5 = "/pwm@ff208010"; - pwm6 = "/pwm@ff208020"; - pwm7 = "/pwm@ff208030"; - rktimer = "/rktimer@ff210000"; - dmac = "/amba/dmac@ff240000"; - thermal_zones = "/thermal-zones"; - soc_thermal = "/thermal-zones/soc-thermal"; - threshold = "/thermal-zones/soc-thermal/trips/trip-point-0"; - target = "/thermal-zones/soc-thermal/trips/trip-point-1"; - soc_crit = "/thermal-zones/soc-thermal/trips/soc-crit"; - gpu_thermal = "/thermal-zones/gpu-thermal"; - tsadc = "/tsadc@ff280000"; - saradc = "/saradc@ff288000"; - otp = "/otp@ff290000"; - otp_id = "/otp@ff290000/id@7"; - cpu_leakage = "/otp@ff290000/cpu-leakage@17"; - performance = "/otp@ff290000/performance@1e"; - cru = "/clock-controller@ff2b0000"; - cpu_boost = "/cpu-boost@ff2b8000"; - pmucru = "/pmu-clock-controller@ff2bc000"; - usb2phy_grf = "/syscon@ff2c0000"; - u2phy = "/syscon@ff2c0000/usb2-phy@100"; - u2phy_host = "/syscon@ff2c0000/usb2-phy@100/host-port"; - u2phy_otg = "/syscon@ff2c0000/usb2-phy@100/otg-port"; - video_phy = "/video-phy@ff2e0000"; - mipi_dphy_rx0 = "/mipi-dphy-rx0@ff2f0000"; - usb20_otg = "/usb@ff300000"; - usb_host0_ehci = "/usb@ff340000"; - usb_host0_ohci = "/usb@ff350000"; - gmac = "/ethernet@ff360000"; - sdmmc = "/dwmmc@ff370000"; - sdio = "/dwmmc@ff380000"; - emmc = "/dwmmc@ff390000"; - nandc0 = "/nandc@ff3b0000"; - sfc = "/sfc@ff3a0000"; - gpu = "/gpu@ff400000"; - gpu_opp_table = "/gpu-opp-table"; - hevc = "/hevc_service@ff440000"; - vpu = "/vpu_service@ff442000"; - vpu_combo = "/vpu_combo"; - hevc_mmu = "/iommu@ff440440"; - vpu_mmu = "/iommu@ff442800"; - dsi = "/dsi@ff450000"; - dsi_in_vopb = "/dsi@ff450000/ports/port@0/endpoint@0"; - timing0 = "/dsi@ff450000/panel@0/display-timings/60Hz"; - timing1 = "/dsi@ff450000/panel@0/display-timings/50Hz"; - timing2 = "/dsi@ff450000/panel@0/display-timings/75Hz"; - vopb = "/vop@ff460000"; - vopb_out = "/vop@ff460000/port"; - vopb_out_lvds = "/vop@ff460000/port/endpoint@0"; - vopb_out_dsi = "/vop@ff460000/port/endpoint@1"; - vopb_out_rgb = "/vop@ff460000/port/endpoint@2"; - vopb_mmu = "/iommu@ff460f00"; - rk_rga = "/rk_rga@ff480000"; - cif = "/cif@ff490000"; - cif_new = "/cif-new@ff490000"; - vip_mmu = "/iommu@ff490800"; - rk_isp = "/rk_isp@ff4a0000"; - rkisp1 = "/rkisp1@ff4a0000"; - isp_mmu = "/iommu@ff4a8000"; - qos_gmac = "/qos@ff518000"; - qos_gpu = "/qos@ff520000"; - qos_sdmmc = "/qos@ff52c000"; - qos_emmc = "/qos@ff538000"; - qos_nand = "/qos@ff538080"; - qos_sdio = "/qos@ff538100"; - qos_sfc = "/qos@ff538180"; - qos_usb_host = "/qos@ff540000"; - qos_usb_otg = "/qos@ff540080"; - qos_isp_128 = "/qos@ff548000"; - qos_isp_rd = "/qos@ff548080"; - qos_isp_wr = "/qos@ff548100"; - qos_isp_m1 = "/qos@ff548180"; - qos_vip = "/qos@ff548200"; - qos_rga_rd = "/qos@ff550000"; - qos_rga_wr = "/qos@ff550080"; - qos_vop_m0 = "/qos@ff550100"; - qos_vop_m1 = "/qos@ff550180"; - qos_vpu = "/qos@ff558000"; - qos_vpu_r128 = "/qos@ff558080"; - dfi = "/dfi@ff610000"; - dmc = "/dmc"; - ddr_power_model = "/dmc/ddr_power_model"; - dmc_opp_table = "/dmc-opp-table"; - rockchip_system_monitor = "/rockchip-system-monitor"; - pinctrl = "/pinctrl"; - gpio0 = "/pinctrl/gpio0@ff040000"; - gpio1 = "/pinctrl/gpio1@ff250000"; - gpio2 = "/pinctrl/gpio2@ff260000"; - gpio3 = "/pinctrl/gpio3@ff270000"; - pcfg_pull_up = "/pinctrl/pcfg-pull-up"; - pcfg_pull_down = "/pinctrl/pcfg-pull-down"; - pcfg_pull_none = "/pinctrl/pcfg-pull-none"; - pcfg_pull_none_2ma = "/pinctrl/pcfg-pull-none-2ma"; - pcfg_pull_up_2ma = "/pinctrl/pcfg-pull-up-2ma"; - pcfg_pull_up_4ma = "/pinctrl/pcfg-pull-up-4ma"; - pcfg_pull_none_4ma = "/pinctrl/pcfg-pull-none-4ma"; - pcfg_pull_down_4ma = "/pinctrl/pcfg-pull-down-4ma"; - pcfg_pull_none_8ma = "/pinctrl/pcfg-pull-none-8ma"; - pcfg_pull_up_8ma = "/pinctrl/pcfg-pull-up-8ma"; - pcfg_pull_none_12ma = "/pinctrl/pcfg-pull-none-12ma"; - pcfg_pull_up_12ma = "/pinctrl/pcfg-pull-up-12ma"; - pcfg_pull_none_smt = "/pinctrl/pcfg-pull-none-smt"; - pcfg_output_high = "/pinctrl/pcfg-output-high"; - pcfg_output_low = "/pinctrl/pcfg-output-low"; - pcfg_input_high = "/pinctrl/pcfg-input-high"; - pcfg_input = "/pinctrl/pcfg-input"; - i2c0_xfer = "/pinctrl/i2c0/i2c0-xfer"; - i2c1_xfer = "/pinctrl/i2c1/i2c1-xfer"; - i2c2_xfer = "/pinctrl/i2c2/i2c2-xfer"; - i2c3_xfer = "/pinctrl/i2c3/i2c3-xfer"; - tsadc_otp_gpio = "/pinctrl/tsadc/tsadc-otp-gpio"; - tsadc_otp_out = "/pinctrl/tsadc/tsadc-otp-out"; - uart0_xfer = "/pinctrl/uart0/uart0-xfer"; - uart0_cts = "/pinctrl/uart0/uart0-cts"; - uart0_rts = "/pinctrl/uart0/uart0-rts"; - uart0_rts_gpio = "/pinctrl/uart0/uart0-rts-gpio"; - uart1_xfer = "/pinctrl/uart1/uart1-xfer"; - uart1_cts = "/pinctrl/uart1/uart1-cts"; - uart1_rts = "/pinctrl/uart1/uart1-rts"; - uart1_rts_gpio = "/pinctrl/uart1/uart1-rts-gpio"; - uart2m0_xfer = "/pinctrl/uart2-m0/uart2m0-xfer"; - uart2m1_xfer = "/pinctrl/uart2-m1/uart2m1-xfer"; - uart3m0_xfer = "/pinctrl/uart3-m0/uart3m0-xfer"; - uart3m0_cts = "/pinctrl/uart3-m0/uart3m0-cts"; - uart3m0_rts = "/pinctrl/uart3-m0/uart3m0-rts"; - uart3m0_rts_gpio = "/pinctrl/uart3-m0/uart3m0-rts-gpio"; - uart3m1_xfer = "/pinctrl/uart3-m1/uart3m1-xfer"; - uart3m1_cts = "/pinctrl/uart3-m1/uart3m1-cts"; - uart3m1_rts = "/pinctrl/uart3-m1/uart3m1-rts"; - uart3m1_rts_gpio = "/pinctrl/uart3-m1/uart3m1-rts-gpio"; - uart4_xfer = "/pinctrl/uart4/uart4-xfer"; - uart4_cts = "/pinctrl/uart4/uart4-cts"; - uart4_rts = "/pinctrl/uart4/uart4-rts"; - uart5_xfer = "/pinctrl/uart5/uart5-xfer"; - uart5_cts = "/pinctrl/uart5/uart5-cts"; - uart5_rts = "/pinctrl/uart5/uart5-rts"; - spi0_clk = "/pinctrl/spi0/spi0-clk"; - spi0_csn = "/pinctrl/spi0/spi0-csn"; - spi0_miso = "/pinctrl/spi0/spi0-miso"; - spi0_mosi = "/pinctrl/spi0/spi0-mosi"; - spi0_clk_hs = "/pinctrl/spi0/spi0-clk-hs"; - spi0_miso_hs = "/pinctrl/spi0/spi0-miso-hs"; - spi0_mosi_hs = "/pinctrl/spi0/spi0-mosi-hs"; - spi1_clk = "/pinctrl/spi1/spi1-clk"; - spi1_csn0 = "/pinctrl/spi1/spi1-csn0"; - spi1_csn1 = "/pinctrl/spi1/spi1-csn1"; - spi1_miso = "/pinctrl/spi1/spi1-miso"; - spi1_mosi = "/pinctrl/spi1/spi1-mosi"; - spi1_clk_hs = "/pinctrl/spi1/spi1-clk-hs"; - spi1_miso_hs = "/pinctrl/spi1/spi1-miso-hs"; - spi1_mosi_hs = "/pinctrl/spi1/spi1-mosi-hs"; - pdm_clk0m0 = "/pinctrl/pdm/pdm-clk0m0"; - pdm_clk0m1 = "/pinctrl/pdm/pdm-clk0m1"; - pdm_clk1 = "/pinctrl/pdm/pdm-clk1"; - pdm_sdi0m0 = "/pinctrl/pdm/pdm-sdi0m0"; - pdm_sdi0m1 = "/pinctrl/pdm/pdm-sdi0m1"; - pdm_sdi1 = "/pinctrl/pdm/pdm-sdi1"; - pdm_sdi2 = "/pinctrl/pdm/pdm-sdi2"; - pdm_sdi3 = "/pinctrl/pdm/pdm-sdi3"; - pdm_clk0m0_sleep = "/pinctrl/pdm/pdm-clk0m0-sleep"; - pdm_clk0m_sleep1 = "/pinctrl/pdm/pdm-clk0m1-sleep"; - pdm_clk1_sleep = "/pinctrl/pdm/pdm-clk1-sleep"; - pdm_sdi0m0_sleep = "/pinctrl/pdm/pdm-sdi0m0-sleep"; - pdm_sdi0m1_sleep = "/pinctrl/pdm/pdm-sdi0m1-sleep"; - pdm_sdi1_sleep = "/pinctrl/pdm/pdm-sdi1-sleep"; - pdm_sdi2_sleep = "/pinctrl/pdm/pdm-sdi2-sleep"; - pdm_sdi3_sleep = "/pinctrl/pdm/pdm-sdi3-sleep"; - i2s0_8ch_mclk = "/pinctrl/i2s0/i2s0-8ch-mclk"; - i2s0_8ch_sclktx = "/pinctrl/i2s0/i2s0-8ch-sclktx"; - i2s0_8ch_sclkrx = "/pinctrl/i2s0/i2s0-8ch-sclkrx"; - i2s0_8ch_lrcktx = "/pinctrl/i2s0/i2s0-8ch-lrcktx"; - i2s0_8ch_lrckrx = "/pinctrl/i2s0/i2s0-8ch-lrckrx"; - i2s0_8ch_sdo0 = "/pinctrl/i2s0/i2s0-8ch-sdo0"; - i2s0_8ch_sdo1 = "/pinctrl/i2s0/i2s0-8ch-sdo1"; - i2s0_8ch_sdo2 = "/pinctrl/i2s0/i2s0-8ch-sdo2"; - i2s0_8ch_sdo3 = "/pinctrl/i2s0/i2s0-8ch-sdo3"; - i2s0_8ch_sdi0 = "/pinctrl/i2s0/i2s0-8ch-sdi0"; - i2s0_8ch_sdi1 = "/pinctrl/i2s0/i2s0-8ch-sdi1"; - i2s0_8ch_sdi2 = "/pinctrl/i2s0/i2s0-8ch-sdi2"; - i2s0_8ch_sdi3 = "/pinctrl/i2s0/i2s0-8ch-sdi3"; - i2s1_2ch_mclk = "/pinctrl/i2s1/i2s1-2ch-mclk"; - i2s1_2ch_sclk = "/pinctrl/i2s1/i2s1-2ch-sclk"; - i2s1_2ch_lrck = "/pinctrl/i2s1/i2s1-2ch-lrck"; - i2s1_2ch_sdi = "/pinctrl/i2s1/i2s1-2ch-sdi"; - i2s1_2ch_sdo = "/pinctrl/i2s1/i2s1-2ch-sdo"; - i2s2_2ch_mclk = "/pinctrl/i2s2/i2s2-2ch-mclk"; - i2s2_2ch_sclk = "/pinctrl/i2s2/i2s2-2ch-sclk"; - i2s2_2ch_lrck = "/pinctrl/i2s2/i2s2-2ch-lrck"; - i2s2_2ch_sdi = "/pinctrl/i2s2/i2s2-2ch-sdi"; - i2s2_2ch_sdo = "/pinctrl/i2s2/i2s2-2ch-sdo"; - sdmmc_clk = "/pinctrl/sdmmc/sdmmc-clk"; - sdmmc_cmd = "/pinctrl/sdmmc/sdmmc-cmd"; - sdmmc_det = "/pinctrl/sdmmc/sdmmc-det"; - sdmmc_bus1 = "/pinctrl/sdmmc/sdmmc-bus1"; - sdmmc_bus4 = "/pinctrl/sdmmc/sdmmc-bus4"; - sdmmc_gpio = "/pinctrl/sdmmc/sdmmc-gpio"; - sdio_clk = "/pinctrl/sdio/sdio-clk"; - sdio_cmd = "/pinctrl/sdio/sdio-cmd"; - sdio_bus4 = "/pinctrl/sdio/sdio-bus4"; - sdio_gpio = "/pinctrl/sdio/sdio-gpio"; - emmc_clk = "/pinctrl/emmc/emmc-clk"; - emmc_cmd = "/pinctrl/emmc/emmc-cmd"; - emmc_pwren = "/pinctrl/emmc/emmc-pwren"; - emmc_rstnout = "/pinctrl/emmc/emmc-rstnout"; - emmc_bus1 = "/pinctrl/emmc/emmc-bus1"; - emmc_bus4 = "/pinctrl/emmc/emmc-bus4"; - emmc_bus8 = "/pinctrl/emmc/emmc-bus8"; - flash_cs0 = "/pinctrl/flash/flash-cs0"; - flash_rdy = "/pinctrl/flash/flash-rdy"; - flash_dqs = "/pinctrl/flash/flash-dqs"; - flash_ale = "/pinctrl/flash/flash-ale"; - flash_cle = "/pinctrl/flash/flash-cle"; - flash_wrn = "/pinctrl/flash/flash-wrn"; - flash_csl = "/pinctrl/flash/flash-csl"; - flash_rdn = "/pinctrl/flash/flash-rdn"; - flash_bus8 = "/pinctrl/flash/flash-bus8"; - lcdc_m0_rgb_pins = "/pinctrl/lcdc/lcdc-m0-rgb-pins"; - lcdc_m0_sleep_pins = "/pinctrl/lcdc/lcdc-m0-sleep-pins"; - lcdc_m1_rgb_pins = "/pinctrl/lcdc/lcdc-m1-rgb-pins"; - lcdc_m1_sleep_pins = "/pinctrl/lcdc/lcdc-m1-sleep-pins"; - pwm0_pin = "/pinctrl/pwm0/pwm0-pin"; - pwm1_pin = "/pinctrl/pwm1/pwm1-pin"; - pwm2_pin = "/pinctrl/pwm2/pwm2-pin"; - pwm3_pin = "/pinctrl/pwm3/pwm3-pin"; - pwm4_pin = "/pinctrl/pwm4/pwm4-pin"; - pwm5_pin = "/pinctrl/pwm5/pwm5-pin"; - pwm6_pin = "/pinctrl/pwm6/pwm6-pin"; - pwm7_pin = "/pinctrl/pwm7/pwm7-pin"; - rmii_pins = "/pinctrl/gmac/rmii-pins"; - mac_refclk_12ma = "/pinctrl/gmac/mac-refclk-12ma"; - mac_refclk = "/pinctrl/gmac/mac-refclk"; - cif_clkout_m0 = "/pinctrl/cif-m0/cif-clkout-m0"; - dvp_d2d9_m0 = "/pinctrl/cif-m0/dvp-d2d9-m0"; - dvp_d0d1_m0 = "/pinctrl/cif-m0/dvp-d0d1-m0"; - dvp_d10d11_m0 = "/pinctrl/cif-m0/d10-d11-m0"; - cif_clkout_m1 = "/pinctrl/cif-m1/cif-clkout-m1"; - dvp_d2d9_m1 = "/pinctrl/cif-m1/dvp-d2d9-m1"; - dvp_d0d1_m1 = "/pinctrl/cif-m1/dvp-d0d1-m1"; - dvp_d10d11_m1 = "/pinctrl/cif-m1/d10-d11-m1"; - isp_prelight = "/pinctrl/isp/isp-prelight"; - pmic_int = "/pinctrl/pmic/pmic_int"; - soc_slppin_gpio = "/pinctrl/pmic/soc_slppin_gpio"; - soc_slppin_slp = "/pinctrl/pmic/soc_slppin_slp"; - soc_slppin_rst = "/pinctrl/pmic/soc_slppin_rst"; - led_pins = "/pinctrl/leds/led-pins"; - btn_pins = "/pinctrl/btns/btn-pins"; - drm_logo = "/reserved-memory/drm-logo@00000000"; - ramoops_mem = "/reserved-memory/region@110000"; - gpio_keys = "/odroidgo3-keys"; - joypad = "/odroidgo3-joypad"; - leds = "/gpio_leds"; - backlight = "/backlight"; - vccsys = "/vccsys"; - }; -}; diff --git a/config/archr-dts/R36S-DTB/DTS/Panel2.dts b/config/archr-dts/R36S-DTB/DTS/Panel2.dts deleted file mode 100644 index 2db0b5a537..0000000000 --- a/config/archr-dts/R36S-DTB/DTS/Panel2.dts +++ /dev/null @@ -1,4063 +0,0 @@ -/dts-v1/; - -/ { - compatible = "rockchip,rk3326-odroidgo3-linux\0rockchip,rk3326"; - interrupt-parent = <0x01>; - #address-cells = <0x02>; - #size-cells = <0x02>; - model = "Game Console R35S/R36S fix by AeolusUX"; - - ddr_timing { - compatible = "rockchip,ddr-timing"; - ddr2_speed_bin = <0x00>; - ddr3_speed_bin = <0x15>; - ddr4_speed_bin = <0x0c>; - pd_idle = <0x0d>; - sr_idle = <0x5d>; - sr_mc_gate_idle = <0x00>; - srpd_lite_idle = <0x00>; - standby_idle = <0x00>; - auto_pd_dis_freq = <0x42a>; - auto_sr_dis_freq = <0x320>; - ddr2_dll_dis_freq = <0x12c>; - ddr3_dll_dis_freq = <0x12c>; - ddr4_dll_dis_freq = <0x271>; - phy_dll_dis_freq = <0x190>; - ddr2_odt_dis_freq = <0x64>; - phy_ddr2_odt_dis_freq = <0x64>; - ddr2_drv = <0x01>; - ddr2_odt = <0x96>; - phy_ddr2_ca_drv = <0x15>; - phy_ddr2_ck_drv = <0x12>; - phy_ddr2_dq_drv = <0x15>; - phy_ddr2_odt = <0x02>; - ddr3_odt_dis_freq = <0x190>; - phy_ddr3_odt_dis_freq = <0x190>; - ddr3_drv = <0x28>; - ddr3_odt = <0x78>; - phy_ddr3_ca_drv = <0x15>; - phy_ddr3_ck_drv = <0x12>; - phy_ddr3_dq_drv = <0x15>; - phy_ddr3_odt = <0x02>; - phy_lpddr2_odt_dis_freq = <0x29a>; - lpddr2_drv = <0x28>; - phy_lpddr2_ca_drv = <0x16>; - phy_lpddr2_ck_drv = <0x13>; - phy_lpddr2_dq_drv = <0x16>; - phy_lpddr2_odt = <0x00>; - lpddr3_odt_dis_freq = <0x190>; - phy_lpddr3_odt_dis_freq = <0x190>; - lpddr3_drv = <0x28>; - lpddr3_odt = <0xf0>; - phy_lpddr3_ca_drv = <0x16>; - phy_lpddr3_ck_drv = <0x13>; - phy_lpddr3_dq_drv = <0x16>; - phy_lpddr3_odt = <0x02>; - lpddr4_odt_dis_freq = <0x320>; - phy_lpddr4_odt_dis_freq = <0x320>; - lpddr4_drv = <0x3c>; - lpddr4_dq_odt = <0x28>; - lpddr4_ca_odt = <0x28>; - phy_lpddr4_ca_drv = <0x14>; - phy_lpddr4_ck_cs_drv = <0x06>; - phy_lpddr4_dq_drv = <0x06>; - phy_lpddr4_odt = <0x10>; - ddr4_odt_dis_freq = <0x29a>; - phy_ddr4_odt_dis_freq = <0x29a>; - ddr4_drv = <0x22>; - ddr4_odt = <0xf0>; - phy_ddr4_ca_drv = <0x16>; - phy_ddr4_ck_drv = <0x13>; - phy_ddr4_dq_drv = <0x16>; - phy_ddr4_odt = <0x02>; - ddr3a1_ddr4a9_de-skew = <0x06>; - ddr3a0_ddr4a10_de-skew = <0x07>; - ddr3a3_ddr4a6_de-skew = <0x07>; - ddr3a2_ddr4a4_de-skew = <0x07>; - ddr3a5_ddr4a8_de-skew = <0x07>; - ddr3a4_ddr4a5_de-skew = <0x07>; - ddr3a7_ddr4a11_de-skew = <0x07>; - ddr3a6_ddr4a7_de-skew = <0x06>; - ddr3a9_ddr4a0_de-skew = <0x07>; - ddr3a8_ddr4a13_de-skew = <0x07>; - ddr3a11_ddr4a3_de-skew = <0x07>; - ddr3a10_ddr4cs0_de-skew = <0x07>; - ddr3a13_ddr4a2_de-skew = <0x07>; - ddr3a12_ddr4ba1_de-skew = <0x07>; - ddr3a15_ddr4odt0_de-skew = <0x07>; - ddr3a14_ddr4a1_de-skew = <0x07>; - ddr3ba1_ddr4a15_de-skew = <0x07>; - ddr3ba0_ddr4bg0_de-skew = <0x07>; - ddr3ras_ddr4cke_de-skew = <0x07>; - ddr3ba2_ddr4ba0_de-skew = <0x07>; - ddr3we_ddr4bg1_de-skew = <0x07>; - ddr3cas_ddr4a12_de-skew = <0x07>; - ddr3ckn_ddr4ckn_de-skew = <0x07>; - ddr3ckp_ddr4ckp_de-skew = <0x07>; - ddr3cke_ddr4a16_de-skew = <0x07>; - ddr3odt0_ddr4a14_de-skew = <0x07>; - ddr3cs0_ddr4act_de-skew = <0x06>; - ddr3reset_ddr4reset_de-skew = <0x07>; - ddr3cs1_ddr4cs1_de-skew = <0x06>; - ddr3odt1_ddr4odt1_de-skew = <0x07>; - cs0_dm0_rx_de-skew = <0x07>; - cs0_dm0_tx_de-skew = <0x07>; - cs0_dq0_rx_de-skew = <0x08>; - cs0_dq0_tx_de-skew = <0x08>; - cs0_dq1_rx_de-skew = <0x09>; - cs0_dq1_tx_de-skew = <0x08>; - cs0_dq2_rx_de-skew = <0x08>; - cs0_dq2_tx_de-skew = <0x08>; - cs0_dq3_rx_de-skew = <0x08>; - cs0_dq3_tx_de-skew = <0x08>; - cs0_dq4_rx_de-skew = <0x09>; - cs0_dq4_tx_de-skew = <0x08>; - cs0_dq5_rx_de-skew = <0x09>; - cs0_dq5_tx_de-skew = <0x08>; - cs0_dq6_rx_de-skew = <0x09>; - cs0_dq6_tx_de-skew = <0x08>; - cs0_dq7_rx_de-skew = <0x08>; - cs0_dq7_tx_de-skew = <0x08>; - cs0_dqs0_rx_de-skew = <0x06>; - cs0_dqs0p_tx_de-skew = <0x09>; - cs0_dqs0n_tx_de-skew = <0x09>; - cs0_dm1_rx_de-skew = <0x07>; - cs0_dm1_tx_de-skew = <0x06>; - cs0_dq8_rx_de-skew = <0x08>; - cs0_dq8_tx_de-skew = <0x07>; - cs0_dq9_rx_de-skew = <0x09>; - cs0_dq9_tx_de-skew = <0x07>; - cs0_dq10_rx_de-skew = <0x08>; - cs0_dq10_tx_de-skew = <0x08>; - cs0_dq11_rx_de-skew = <0x08>; - cs0_dq11_tx_de-skew = <0x07>; - cs0_dq12_rx_de-skew = <0x08>; - cs0_dq12_tx_de-skew = <0x08>; - cs0_dq13_rx_de-skew = <0x09>; - cs0_dq13_tx_de-skew = <0x07>; - cs0_dq14_rx_de-skew = <0x09>; - cs0_dq14_tx_de-skew = <0x08>; - cs0_dq15_rx_de-skew = <0x09>; - cs0_dq15_tx_de-skew = <0x07>; - cs0_dqs1_rx_de-skew = <0x07>; - cs0_dqs1p_tx_de-skew = <0x09>; - cs0_dqs1n_tx_de-skew = <0x09>; - cs0_dm2_rx_de-skew = <0x07>; - cs0_dm2_tx_de-skew = <0x07>; - cs0_dq16_rx_de-skew = <0x09>; - cs0_dq16_tx_de-skew = <0x09>; - cs0_dq17_rx_de-skew = <0x07>; - cs0_dq17_tx_de-skew = <0x09>; - cs0_dq18_rx_de-skew = <0x07>; - cs0_dq18_tx_de-skew = <0x08>; - cs0_dq19_rx_de-skew = <0x07>; - cs0_dq19_tx_de-skew = <0x09>; - cs0_dq20_rx_de-skew = <0x09>; - cs0_dq20_tx_de-skew = <0x09>; - cs0_dq21_rx_de-skew = <0x09>; - cs0_dq21_tx_de-skew = <0x09>; - cs0_dq22_rx_de-skew = <0x08>; - cs0_dq22_tx_de-skew = <0x09>; - cs0_dq23_rx_de-skew = <0x08>; - cs0_dq23_tx_de-skew = <0x09>; - cs0_dqs2_rx_de-skew = <0x06>; - cs0_dqs2p_tx_de-skew = <0x09>; - cs0_dqs2n_tx_de-skew = <0x09>; - cs0_dm3_rx_de-skew = <0x07>; - cs0_dm3_tx_de-skew = <0x07>; - cs0_dq24_rx_de-skew = <0x08>; - cs0_dq24_tx_de-skew = <0x08>; - cs0_dq25_rx_de-skew = <0x09>; - cs0_dq25_tx_de-skew = <0x09>; - cs0_dq26_rx_de-skew = <0x09>; - cs0_dq26_tx_de-skew = <0x08>; - cs0_dq27_rx_de-skew = <0x09>; - cs0_dq27_tx_de-skew = <0x08>; - cs0_dq28_rx_de-skew = <0x09>; - cs0_dq28_tx_de-skew = <0x09>; - cs0_dq29_rx_de-skew = <0x09>; - cs0_dq29_tx_de-skew = <0x09>; - cs0_dq30_rx_de-skew = <0x08>; - cs0_dq30_tx_de-skew = <0x08>; - cs0_dq31_rx_de-skew = <0x08>; - cs0_dq31_tx_de-skew = <0x08>; - cs0_dqs3_rx_de-skew = <0x07>; - cs0_dqs3p_tx_de-skew = <0x09>; - cs0_dqs3n_tx_de-skew = <0x09>; - cs1_dm0_rx_de-skew = <0x07>; - cs1_dm0_tx_de-skew = <0x07>; - cs1_dq0_rx_de-skew = <0x08>; - cs1_dq0_tx_de-skew = <0x08>; - cs1_dq1_rx_de-skew = <0x09>; - cs1_dq1_tx_de-skew = <0x08>; - cs1_dq2_rx_de-skew = <0x08>; - cs1_dq2_tx_de-skew = <0x08>; - cs1_dq3_rx_de-skew = <0x08>; - cs1_dq3_tx_de-skew = <0x08>; - cs1_dq4_rx_de-skew = <0x08>; - cs1_dq4_tx_de-skew = <0x08>; - cs1_dq5_rx_de-skew = <0x09>; - cs1_dq5_tx_de-skew = <0x08>; - cs1_dq6_rx_de-skew = <0x09>; - cs1_dq6_tx_de-skew = <0x08>; - cs1_dq7_rx_de-skew = <0x08>; - cs1_dq7_tx_de-skew = <0x08>; - cs1_dqs0_rx_de-skew = <0x06>; - cs1_dqs0p_tx_de-skew = <0x09>; - cs1_dqs0n_tx_de-skew = <0x09>; - cs1_dm1_rx_de-skew = <0x07>; - cs1_dm1_tx_de-skew = <0x07>; - cs1_dq8_rx_de-skew = <0x08>; - cs1_dq8_tx_de-skew = <0x08>; - cs1_dq9_rx_de-skew = <0x08>; - cs1_dq9_tx_de-skew = <0x07>; - cs1_dq10_rx_de-skew = <0x07>; - cs1_dq10_tx_de-skew = <0x08>; - cs1_dq11_rx_de-skew = <0x08>; - cs1_dq11_tx_de-skew = <0x08>; - cs1_dq12_rx_de-skew = <0x08>; - cs1_dq12_tx_de-skew = <0x07>; - cs1_dq13_rx_de-skew = <0x08>; - cs1_dq13_tx_de-skew = <0x08>; - cs1_dq14_rx_de-skew = <0x08>; - cs1_dq14_tx_de-skew = <0x08>; - cs1_dq15_rx_de-skew = <0x08>; - cs1_dq15_tx_de-skew = <0x07>; - cs1_dqs1_rx_de-skew = <0x07>; - cs1_dqs1p_tx_de-skew = <0x09>; - cs1_dqs1n_tx_de-skew = <0x09>; - cs1_dm2_rx_de-skew = <0x07>; - cs1_dm2_tx_de-skew = <0x08>; - cs1_dq16_rx_de-skew = <0x08>; - cs1_dq16_tx_de-skew = <0x09>; - cs1_dq17_rx_de-skew = <0x08>; - cs1_dq17_tx_de-skew = <0x09>; - cs1_dq18_rx_de-skew = <0x07>; - cs1_dq18_tx_de-skew = <0x08>; - cs1_dq19_rx_de-skew = <0x08>; - cs1_dq19_tx_de-skew = <0x09>; - cs1_dq20_rx_de-skew = <0x09>; - cs1_dq20_tx_de-skew = <0x09>; - cs1_dq21_rx_de-skew = <0x09>; - cs1_dq21_tx_de-skew = <0x09>; - cs1_dq22_rx_de-skew = <0x08>; - cs1_dq22_tx_de-skew = <0x09>; - cs1_dq23_rx_de-skew = <0x08>; - cs1_dq23_tx_de-skew = <0x09>; - cs1_dqs2_rx_de-skew = <0x06>; - cs1_dqs2p_tx_de-skew = <0x09>; - cs1_dqs2n_tx_de-skew = <0x09>; - cs1_dm3_rx_de-skew = <0x07>; - cs1_dm3_tx_de-skew = <0x07>; - cs1_dq24_rx_de-skew = <0x08>; - cs1_dq24_tx_de-skew = <0x09>; - cs1_dq25_rx_de-skew = <0x09>; - cs1_dq25_tx_de-skew = <0x09>; - cs1_dq26_rx_de-skew = <0x09>; - cs1_dq26_tx_de-skew = <0x08>; - cs1_dq27_rx_de-skew = <0x08>; - cs1_dq27_tx_de-skew = <0x08>; - cs1_dq28_rx_de-skew = <0x09>; - cs1_dq28_tx_de-skew = <0x09>; - cs1_dq29_rx_de-skew = <0x09>; - cs1_dq29_tx_de-skew = <0x09>; - cs1_dq30_rx_de-skew = <0x09>; - cs1_dq30_tx_de-skew = <0x08>; - cs1_dq31_rx_de-skew = <0x08>; - cs1_dq31_tx_de-skew = <0x08>; - cs1_dqs3_rx_de-skew = <0x07>; - cs1_dqs3p_tx_de-skew = <0x09>; - cs1_dqs3n_tx_de-skew = <0x09>; - phandle = <0xaf>; - }; - - aliases { - ethernet0 = "/ethernet@ff360000"; - i2c0 = "/i2c@ff180000"; - i2c1 = "/i2c@ff190000"; - i2c2 = "/i2c@ff1a0000"; - i2c3 = "/i2c@ff1b0000"; - serial0 = "/serial@ff030000"; - serial1 = "/serial@ff158000"; - serial2 = "/serial@ff160000"; - serial3 = "/serial@ff168000"; - serial4 = "/serial@ff170000"; - serial5 = "/serial@ff178000"; - spi0 = "/spi@ff1d0000"; - spi1 = "/spi@ff1d8000"; - }; - - cpus { - #address-cells = <0x02>; - #size-cells = <0x00>; - - cpu@0 { - device_type = "cpu"; - compatible = "arm,cortex-a35\0arm,armv8"; - reg = <0x00 0x00>; - enable-method = "psci"; - clocks = <0x02 0x07>; - #cooling-cells = <0x02>; - dynamic-power-coefficient = <0x5a>; - operating-points-v2 = <0x03>; - cpu-idle-states = <0x04 0x05>; - cpu-supply = <0x06>; - phandle = <0x09>; - }; - - cpu@1 { - device_type = "cpu"; - compatible = "arm,cortex-a35\0arm,armv8"; - reg = <0x00 0x01>; - enable-method = "psci"; - operating-points-v2 = <0x03>; - cpu-idle-states = <0x04 0x05>; - phandle = <0x0a>; - }; - - cpu@2 { - device_type = "cpu"; - compatible = "arm,cortex-a35\0arm,armv8"; - reg = <0x00 0x02>; - enable-method = "psci"; - operating-points-v2 = <0x03>; - cpu-idle-states = <0x04 0x05>; - phandle = <0x0b>; - }; - - cpu@3 { - device_type = "cpu"; - compatible = "arm,cortex-a35\0arm,armv8"; - reg = <0x00 0x03>; - enable-method = "psci"; - operating-points-v2 = <0x03>; - cpu-idle-states = <0x04 0x05>; - phandle = <0x0c>; - }; - - idle-states { - entry-method = "psci"; - - cpu-sleep { - compatible = "arm,idle-state"; - local-timer-stop; - arm,psci-suspend-param = <0x10000>; - entry-latency-us = <0x78>; - exit-latency-us = <0xfa>; - min-residency-us = <0x384>; - phandle = <0x04>; - }; - - cluster-sleep { - compatible = "arm,idle-state"; - local-timer-stop; - arm,psci-suspend-param = <0x1010000>; - entry-latency-us = <0x190>; - exit-latency-us = <0x1f4>; - min-residency-us = <0x7d0>; - phandle = <0x05>; - }; - }; - }; - - cpu0-opp-table { - compatible = "operating-points-v2"; - opp-shared; - rockchip,temp-hysteresis = <0x1388>; - rockchip,low-temp = <0x00>; - rockchip,low-temp-min-volt = <0xf4240>; - rockchip,low-temp-adjust-volt = <0x00 0x5e8 0xc350>; - clocks = <0x02 0x01>; - rockchip,avs-scale = <0x04>; - rockchip,max-volt = <0x149970>; - rockchip,evb-irdrop = <0x61a8>; - nvmem-cells = <0x07 0x08>; - nvmem-cell-names = "cpu_leakage\0performance"; - rockchip,bin-scaling-sel = <0x00 0x0d 0x01 0x0d>; - rockchip,pvtm-voltage-sel = <0x00 0xc350 0x00 0xc351 0xd2f0 0x01 0xd2f1 0xea60 0x02 0xea61 0x1869f 0x03>; - rockchip,pvtm-freq = <0x639c0>; - rockchip,pvtm-volt = <0xf4240>; - rockchip,pvtm-ch = <0x00 0x00>; - rockchip,pvtm-sample-time = <0x3e8>; - rockchip,pvtm-number = <0x0a>; - rockchip,pvtm-error = <0x3e8>; - rockchip,pvtm-ref-temp = <0x28>; - rockchip,pvtm-temp-prop = <0xffffffc8 0xffffffc8>; - rockchip,thermal-zone = "soc-thermal"; - rockchip,avs = <0x01>; - phandle = <0x03>; - - opp-1008000000 { - opp-hz = <0x00 0x3c14dc00>; - opp-microvolt = <0x11edd8 0x11edd8 0x149970>; - opp-microvolt-L0 = <0x11edd8 0x11edd8 0x149970>; - opp-microvolt-L1 = <0x112a88 0x112a88 0x149970>; - opp-microvolt-L2 = <0x112a88 0x112a88 0x149970>; - opp-microvolt-L3 = <0x100590 0x100590 0x149970>; - clock-latency-ns = <0x9c40>; - }; - - opp-1200000000 { - opp-hz = <0x00 0x47868c00>; - opp-microvolt = <0x13d620 0x13d620 0x149970>; - opp-microvolt-L0 = <0x13d620 0x13d620 0x149970>; - opp-microvolt-L1 = <0x137478 0x137478 0x149970>; - opp-microvolt-L2 = <0x1312d0 0x1312d0 0x149970>; - opp-microvolt-L3 = <0x124f80 0x124f80 0x149970>; - clock-latency-ns = <0x9c40>; - }; - - opp-1248000000 { - opp-hz = <0x00 0x4a62f800>; - opp-microvolt = <0x149970 0x149970 0x149970>; - opp-microvolt-L0 = <0x149970 0x149970 0x149970>; - opp-microvolt-L1 = <0x13d620 0x13d620 0x149970>; - opp-microvolt-L2 = <0x137478 0x137478 0x149970>; - opp-microvolt-L3 = <0x12b128 0x12b128 0x149970>; - clock-latency-ns = <0x9c40>; - }; - - opp-1296000000 { - opp-hz = <0x00 0x4d3f6400>; - opp-microvolt = <0x149970 0x149970 0x149970>; - opp-microvolt-L0 = <0x149970 0x149970 0x149970>; - opp-microvolt-L1 = <0x149970 0x149970 0x149970>; - opp-microvolt-L2 = <0x13d620 0x13d620 0x149970>; - opp-microvolt-L3 = <0x1312d0 0x1312d0 0x149970>; - clock-latency-ns = <0x9c40>; - }; - - opp-1512000000 { - opp-hz = <0x00 0x5a1f4a00>; - opp-microvolt = <0x149970 0x149970 0x149970>; - opp-microvolt-L0 = <0x149970 0x149970 0x149970>; - opp-microvolt-L1 = <0x149970 0x149970 0x149970>; - opp-microvolt-L2 = <0x13d620 0x13d620 0x149970>; - opp-microvolt-L3 = <0x1312d0 0x1312d0 0x149970>; - clock-latency-ns = <0x9c40>; - }; - }; - - arm-pmu { - compatible = "arm,cortex-a53-pmu"; - interrupts = <0x00 0x64 0x04 0x00 0x65 0x04 0x00 0x66 0x04 0x00 0x67 0x04>; - interrupt-affinity = <0x09 0x0a 0x0b 0x0c>; - }; - - bus-soc { - compatible = "rockchip,px30-bus"; - rockchip,busfreq-policy = "autocs"; - phandle = <0xc4>; - - soc-bus0 { - bus-id = <0x00>; - timer-us = <0x14>; - enable-msk = <0x40f7>; - status = "disabled"; - }; - - soc-bus1 { - bus-id = <0x01>; - timer-us = <0xc8>; - enable-msk = <0x40bf>; - status = "disabled"; - }; - - soc-bus2 { - bus-id = <0x02>; - timer-us = <0xc8>; - enable-msk = <0x4007>; - status = "disabled"; - }; - }; - - bus-apll { - compatible = "rockchip,px30-bus"; - rockchip,busfreq-policy = "clkfreq"; - clocks = <0x02 0x01>; - clock-names = "bus"; - operating-points-v2 = <0x0d>; - status = "okay"; - bus-supply = <0x0e>; - phandle = <0xc5>; - }; - - bus-apll-opp-table { - compatible = "operating-points-v2"; - opp-shared; - phandle = <0x0d>; - - opp-1512000000 { - opp-hz = <0x00 0x5a1f4a00>; - opp-microvolt = <0xf4240>; - }; - - opp-1008000000 { - opp-hz = <0x00 0x3c14dc00>; - opp-microvolt = <0xe7ef0>; - }; - }; - - cpuinfo { - compatible = "rockchip,cpuinfo"; - nvmem-cells = <0x0f>; - nvmem-cell-names = "id"; - }; - - display-subsystem { - compatible = "rockchip,display-subsystem"; - ports = <0x10>; - status = "okay"; - logo-memory-region = <0x11>; - phandle = <0xc6>; - - route { - - route-lvds { - status = "disabled"; - logo,uboot = "logo.gif"; - logo,kernel = "logo_kernel.gif"; - logo,mode = "center"; - charge_logo,mode = "center"; - connect = <0x12>; - phandle = <0xc7>; - }; - - route-dsi { - status = "okay"; - logo,uboot = "logo.gif"; - logo,kernel = "logo_kernel.gif"; - logo,mode = "center"; - charge_logo,mode = "center"; - connect = <0x13>; - phandle = <0xc8>; - }; - - route-rgb { - status = "disabled"; - logo,uboot = "logo.gif"; - logo,kernel = "logo_kernel.gif"; - logo,mode = "center"; - charge_logo,mode = "center"; - connect = <0x14>; - phandle = <0xc9>; - }; - }; - }; - - firmware { - - optee { - compatible = "linaro,optee-tz"; - method = "smc"; - }; - }; - - external-gmac-clock { - compatible = "fixed-clock"; - clock-frequency = <0x2faf080>; - clock-output-names = "gmac_clkin"; - #clock-cells = <0x00>; - phandle = <0xca>; - }; - - psci { - compatible = "arm,psci-1.0"; - method = "smc"; - }; - - rockchip-suspend { - compatible = "rockchip,pm-px30"; - status = "okay"; - rockchip,sleep-debug-en = <0x01>; - rockchip,sleep-mode-config = <0x20702>; - rockchip,wakeup-config = <0x85>; - phandle = <0xcb>; - }; - - timer { - compatible = "arm,armv8-timer"; - interrupts = <0x01 0x0d 0xf04 0x01 0x0e 0xf04 0x01 0x0b 0xf04 0x01 0x0a 0xf04>; - }; - - xin24m { - compatible = "fixed-clock"; - #clock-cells = <0x00>; - clock-frequency = <0x16e3600>; - clock-output-names = "xin24m"; - phandle = <0xcc>; - }; - - xin32k { - compatible = "fixed-clock"; - #clock-cells = <0x00>; - clock-frequency = <0x8000>; - clock-output-names = "xin32k"; - phandle = <0xcd>; - }; - - power-management@ff000000 { - compatible = "rockchip,px30-pmu\0syscon\0simple-mfd"; - reg = <0x00 0xff000000 0x00 0x1000>; - phandle = <0xce>; - - power-controller { - compatible = "rockchip,px30-power-controller"; - #power-domain-cells = <0x01>; - #address-cells = <0x01>; - #size-cells = <0x00>; - phandle = <0x8a>; - - pd_usb@5 { - reg = <0x05>; - clocks = <0x02 0x103 0x02 0x102 0x02 0x3c>; - pm_qos = <0x15 0x16>; - }; - - pd_sdcard@7 { - reg = <0x07>; - clocks = <0x02 0xf7 0x02 0x3b>; - pm_qos = <0x17>; - }; - - pd_gmac@9 { - reg = <0x09>; - clocks = <0x02 0xb2 0x02 0x143 0x02 0x40 0x02 0x3f>; - pm_qos = <0x18>; - }; - - pd_mmc_nand@10 { - reg = <0x0a>; - clocks = <0x02 0xfe 0x02 0x100 0x02 0xff 0x02 0x101 0x02 0x39 0x02 0x37 0x02 0x38 0x02 0x3a>; - pm_qos = <0x19 0x1a 0x1b 0x1c>; - }; - - pd_vpu@11 { - reg = <0x0b>; - clocks = <0x02 0xaf 0x02 0xf4 0x02 0x4b>; - pm_qos = <0x1d 0x1e>; - }; - - pd_vo@12 { - reg = <0x0c>; - clocks = <0x02 0xb7 0x02 0xb5 0x02 0xb6 0x02 0x96 0x02 0x97 0x02 0xfd 0x02 0xfb 0x02 0xfc 0x02 0x144 0x02 0x35 0x02 0x36>; - pm_qos = <0x1f 0x20 0x21 0x22>; - }; - - pd_vi@13 { - reg = <0x0d>; - clocks = <0x02 0xb3 0x02 0xb4 0x02 0xf9 0x02 0xfa 0x02 0x33>; - pm_qos = <0x23 0x24 0x25 0x26 0x27>; - }; - - pd_gpu@14 { - reg = <0x0e>; - clocks = <0x02 0x49>; - pm_qos = <0x28>; - }; - }; - }; - - syscon@ff010000 { - compatible = "rockchip,px30-pmugrf\0syscon\0simple-mfd"; - reg = <0x00 0xff010000 0x00 0x1000>; - #address-cells = <0x01>; - #size-cells = <0x01>; - phandle = <0xac>; - - io-domains { - compatible = "rockchip,px30-pmu-io-voltage-domain"; - status = "okay"; - pmuio1-supply = <0x29>; - pmuio2-supply = <0x29>; - phandle = <0xcf>; - }; - - reboot-mode { - compatible = "syscon-reboot-mode"; - offset = <0x200>; - mode-bootloader = <0x5242c301>; - mode-charge = <0x5242c30b>; - mode-fastboot = <0x5242c309>; - mode-loader = <0x5242c301>; - mode-normal = <0x5242c300>; - mode-recovery = <0x5242c303>; - mode-ums = <0x5242c30c>; - }; - - pmu-pvtm { - compatible = "rockchip,px30-pmu-pvtm"; - clocks = <0x2a 0x07>; - clock-names = "pmu"; - status = "okay"; - phandle = <0xd0>; - }; - }; - - serial@ff030000 { - compatible = "rockchip,px30-uart\0snps,dw-apb-uart"; - reg = <0x00 0xff030000 0x00 0x100>; - interrupts = <0x00 0x0f 0x04>; - clocks = <0x2a 0x06 0x2a 0x15>; - clock-names = "baudclk\0apb_pclk"; - reg-shift = <0x02>; - reg-io-width = <0x04>; - dmas = <0x2b 0x00 0x2b 0x01>; - pinctrl-names = "default"; - pinctrl-0 = <0x2c 0x2d 0x2e>; - status = "disabled"; - phandle = <0xd1>; - }; - - i2s@ff060000 { - compatible = "rockchip,px30-i2s-tdm"; - reg = <0x00 0xff060000 0x00 0x1000>; - interrupts = <0x00 0x0c 0x04>; - clocks = <0x02 0x10 0x02 0x12 0x02 0x106>; - clock-names = "mclk_tx\0mclk_rx\0hclk"; - dmas = <0x2b 0x10 0x2b 0x11>; - dma-names = "tx\0rx"; - resets = <0x02 0x84 0x02 0xbf>; - reset-names = "tx-m\0rx-m"; - rockchip,cru = <0x02>; - rockchip,grf = <0x2f>; - pinctrl-names = "default"; - pinctrl-0 = <0x30 0x31 0x32 0x33 0x34 0x35 0x36 0x37 0x38 0x39 0x3a 0x3b>; - status = "disabled"; - phandle = <0xd2>; - }; - - i2s@ff070000 { - compatible = "rockchip,px30-i2s\0rockchip,rk3066-i2s"; - reg = <0x00 0xff070000 0x00 0x1000>; - interrupts = <0x00 0x0d 0x04>; - clocks = <0x02 0x14 0x02 0x107>; - clock-names = "i2s_clk\0i2s_hclk"; - dmas = <0x2b 0x12 0x2b 0x13>; - dma-names = "tx\0rx"; - resets = <0x02 0x86 0x02 0x85>; - reset-names = "reset-m\0reset-h"; - pinctrl-names = "default"; - pinctrl-0 = <0x3c 0x3d 0x3e 0x3f>; - status = "okay"; - #sound-dai-cells = <0x00>; - phandle = <0xc2>; - }; - - i2s@ff080000 { - compatible = "rockchip,px30-i2s\0rockchip,rk3066-i2s"; - reg = <0x00 0xff080000 0x00 0x1000>; - interrupts = <0x00 0x0e 0x04>; - clocks = <0x02 0x16 0x02 0x108>; - clock-names = "i2s_clk\0i2s_hclk"; - dmas = <0x2b 0x14 0x2b 0x15>; - dma-names = "tx\0rx"; - resets = <0x02 0x88 0x02 0x87>; - reset-names = "reset-m\0reset-h"; - pinctrl-names = "default"; - pinctrl-0 = <0x40 0x41 0x42 0x43>; - status = "disabled"; - phandle = <0xd3>; - }; - - pdm@ff0a0000 { - compatible = "rockchip,px30-pdm\0rockchip,pdm"; - reg = <0x00 0xff0a0000 0x00 0x1000>; - clocks = <0x02 0x0f 0x02 0x105>; - clock-names = "pdm_clk\0pdm_hclk"; - dmas = <0x2b 0x18>; - dma-names = "rx"; - resets = <0x02 0x82>; - reset-names = "pdm-m"; - pinctrl-names = "default"; - pinctrl-0 = <0x44 0x45 0x46 0x47 0x48 0x49>; - status = "disabled"; - phandle = <0xd4>; - }; - - crypto@ff0b0000 { - compatible = "rockchip,px30-crypto"; - reg = <0x00 0xff0b0000 0x00 0x4000>; - interrupts = <0x00 0x52 0x04>; - clocks = <0x02 0xac 0x02 0xf1 0x02 0x30 0x02 0x31>; - clock-names = "aclk\0hclk\0sclk\0apb_pclk"; - resets = <0x02 0x74>; - reset-names = "crypto-rst"; - status = "disabled"; - phandle = <0xd5>; - }; - - rng@ff0b0000 { - compatible = "rockchip,cryptov2-rng"; - reg = <0x00 0xff0b0000 0x00 0x4000>; - clocks = <0x02 0x30 0x02 0x31 0x02 0xac 0x02 0xf1>; - clock-names = "clk_crypto\0clk_crypto_apk\0aclk_crypto\0hclk_crypto"; - assigned-clocks = <0x02 0x30 0x02 0x31 0x02 0xac 0x02 0xf1>; - assigned-clock-rates = <0x8f0d180 0x8f0d180 0xbebc200 0x5f5e100>; - resets = <0x02 0x74>; - reset-names = "reset"; - status = "okay"; - phandle = <0xd6>; - }; - - interrupt-controller@ff131000 { - compatible = "arm,gic-400"; - #interrupt-cells = <0x03>; - #address-cells = <0x00>; - interrupt-controller; - reg = <0x00 0xff131000 0x00 0x1000 0x00 0xff132000 0x00 0x2000 0x00 0xff134000 0x00 0x2000 0x00 0xff136000 0x00 0x2000>; - interrupts = <0x01 0x09 0xf04>; - phandle = <0x01>; - }; - - syscon@ff140000 { - compatible = "rockchip,px30-grf\0syscon\0simple-mfd"; - reg = <0x00 0xff140000 0x00 0x1000>; - #address-cells = <0x01>; - #size-cells = <0x01>; - phandle = <0x2f>; - - io-domains { - compatible = "rockchip,px30-io-voltage-domain"; - status = "okay"; - vccio1-supply = <0x4a>; - vccio2-supply = <0x4a>; - vccio3-supply = <0x4b>; - vccio4-supply = <0x4b>; - vccio5-supply = <0x4b>; - vccio6-supply = <0x4b>; - phandle = <0xd7>; - }; - - lvds { - compatible = "rockchip,px30-lvds"; - phys = <0x4c>; - phy-names = "phy"; - status = "disabled"; - phandle = <0xd8>; - - ports { - #address-cells = <0x01>; - #size-cells = <0x00>; - - port@0 { - reg = <0x00>; - #address-cells = <0x01>; - #size-cells = <0x00>; - - endpoint@0 { - reg = <0x00>; - remote-endpoint = <0x12>; - phandle = <0xa2>; - }; - }; - }; - }; - - rgb { - compatible = "rockchip,px30-rgb"; - pinctrl-names = "default\0sleep"; - pinctrl-0 = <0x4d>; - pinctrl-1 = <0x4e>; - status = "disabled"; - phys = <0x4c>; - phy-names = "phy"; - phandle = <0xd9>; - - ports { - #address-cells = <0x01>; - #size-cells = <0x00>; - - port@0 { - reg = <0x00>; - #address-cells = <0x01>; - #size-cells = <0x00>; - - endpoint@0 { - reg = <0x00>; - remote-endpoint = <0x14>; - phandle = <0xa4>; - }; - }; - }; - }; - }; - - syscon@ff148000 { - compatible = "syscon\0simple-mfd"; - reg = <0x00 0xff148000 0x00 0x1000>; - #address-cells = <0x01>; - #size-cells = <0x01>; - phandle = <0xda>; - - pvtm { - compatible = "rockchip,px30-pvtm"; - clocks = <0x02 0x4a>; - clock-names = "core"; - status = "okay"; - phandle = <0xdb>; - }; - }; - - serial@ff158000 { - compatible = "rockchip,px30-uart\0snps,dw-apb-uart"; - reg = <0x00 0xff158000 0x00 0x100>; - interrupts = <0x00 0x10 0x04>; - clocks = <0x02 0x18 0x02 0x149>; - clock-names = "baudclk\0apb_pclk"; - reg-shift = <0x02>; - reg-io-width = <0x04>; - dmas = <0x2b 0x02 0x2b 0x03>; - pinctrl-names = "default"; - pinctrl-0 = <0x4f 0x50>; - status = "okay"; - phandle = <0xdc>; - }; - - serial@ff160000 { - compatible = "rockchip,px30-uart\0snps,dw-apb-uart"; - reg = <0x00 0xff160000 0x00 0x100>; - interrupts = <0x00 0x11 0x04>; - clocks = <0x02 0x19 0x02 0x14a>; - clock-names = "baudclk\0apb_pclk"; - reg-shift = <0x02>; - reg-io-width = <0x04>; - dmas = <0x2b 0x04 0x2b 0x05>; - pinctrl-names = "default"; - pinctrl-0 = <0x51>; - status = "disabled"; - phandle = <0xdd>; - }; - - serial@ff168000 { - compatible = "rockchip,px30-uart\0snps,dw-apb-uart"; - reg = <0x00 0xff168000 0x00 0x100>; - interrupts = <0x00 0x12 0x04>; - clocks = <0x02 0x1a 0x02 0x14b>; - clock-names = "baudclk\0apb_pclk"; - reg-shift = <0x02>; - reg-io-width = <0x04>; - dmas = <0x2b 0x06 0x2b 0x07>; - pinctrl-names = "default"; - pinctrl-0 = <0x52 0x53 0x54>; - status = "disabled"; - phandle = <0xde>; - }; - - serial@ff170000 { - compatible = "rockchip,px30-uart\0snps,dw-apb-uart"; - reg = <0x00 0xff170000 0x00 0x100>; - interrupts = <0x00 0x13 0x04>; - clocks = <0x02 0x1b 0x02 0x14c>; - clock-names = "baudclk\0apb_pclk"; - reg-shift = <0x02>; - reg-io-width = <0x04>; - dmas = <0x2b 0x08 0x2b 0x09>; - pinctrl-names = "default"; - pinctrl-0 = <0x55 0x56 0x57>; - status = "disabled"; - phandle = <0xdf>; - }; - - serial@ff178000 { - compatible = "rockchip,px30-uart\0snps,dw-apb-uart"; - reg = <0x00 0xff178000 0x00 0x100>; - interrupts = <0x00 0x14 0x04>; - clocks = <0x02 0x1c 0x02 0x14d>; - clock-names = "baudclk\0apb_pclk"; - reg-shift = <0x02>; - reg-io-width = <0x04>; - dmas = <0x2b 0x0a 0x2b 0x0b>; - pinctrl-names = "default"; - pinctrl-0 = <0x58 0x59 0x5a>; - status = "disabled"; - phandle = <0xe0>; - }; - - i2c@ff180000 { - compatible = "rockchip,rk3399-i2c"; - reg = <0x00 0xff180000 0x00 0x1000>; - clocks = <0x02 0x1d 0x02 0x14e>; - clock-names = "i2c\0pclk"; - interrupts = <0x00 0x07 0x04>; - pinctrl-names = "default"; - pinctrl-0 = <0x5b>; - #address-cells = <0x01>; - #size-cells = <0x00>; - status = "okay"; - clock-frequency = <0x61a80>; - i2c-scl-rising-time-ns = <0x118>; - i2c-scl-falling-time-ns = <0x10>; - phandle = <0xe1>; - - pmic@20 { - compatible = "rockchip,rk817"; - reg = <0x20>; - interrupt-parent = <0x5c>; - interrupts = <0x0a 0x08>; - pinctrl-names = "default\0pmic-sleep\0pmic-power-off\0pmic-reset"; - pinctrl-0 = <0x5d>; - pinctrl-1 = <0x5e 0x5f>; - pinctrl-2 = <0x60 0x61>; - pinctrl-3 = <0x62 0x63>; - rockchip,system-power-controller; - wakeup-source; - #clock-cells = <0x01>; - clock-output-names = "rk808-clkout1\0rk808-clkout2"; - pmic-reset-func = <0x01>; - vcc1-supply = <0x64>; - vcc2-supply = <0x64>; - vcc3-supply = <0x64>; - vcc4-supply = <0x64>; - vcc5-supply = <0x64>; - vcc6-supply = <0x64>; - vcc7-supply = <0x64>; - vcc8-supply = <0x64>; - vcc9-supply = <0x65>; - phandle = <0xe2>; - - pwrkey { - status = "okay"; - }; - - pinctrl_rk8xx { - gpio-controller; - #gpio-cells = <0x02>; - phandle = <0xe3>; - - rk817_ts_gpio1 { - pins = "gpio_ts"; - function = "pin_fun1"; - phandle = <0xe4>; - }; - - rk817_gt_gpio2 { - pins = "gpio_gt"; - function = "pin_fun1"; - phandle = <0xe5>; - }; - - rk817_pin_ts { - pins = "gpio_ts"; - function = "pin_fun0"; - phandle = <0xe6>; - }; - - rk817_pin_gt { - pins = "gpio_gt"; - function = "pin_fun0"; - phandle = <0xe7>; - }; - - rk817_slppin_null { - pins = "gpio_slp"; - function = "pin_fun0"; - phandle = <0xe8>; - }; - - rk817_slppin_slp { - pins = "gpio_slp"; - function = "pin_fun1"; - phandle = <0x5f>; - }; - - rk817_slppin_pwrdn { - pins = "gpio_slp"; - function = "pin_fun2"; - phandle = <0x61>; - }; - - rk817_slppin_rst { - pins = "gpio_slp"; - function = "pin_fun3"; - phandle = <0x63>; - }; - }; - - regulators { - - DCDC_REG1 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0xe7ef0>; - regulator-max-microvolt = <0x118c30>; - regulator-ramp-delay = <0x1771>; - regulator-initial-mode = <0x02>; - regulator-name = "vdd_logic"; - phandle = <0x0e>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <0xe7ef0>; - }; - }; - - DCDC_REG2 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0xe7ef0>; - regulator-max-microvolt = <0x149970>; - regulator-ramp-delay = <0x1771>; - regulator-initial-mode = <0x02>; - regulator-name = "vdd_arm"; - phandle = <0x06>; - - regulator-state-mem { - regulator-off-in-suspend; - regulator-suspend-microvolt = <0xe7ef0>; - }; - }; - - DCDC_REG3 { - regulator-always-on; - regulator-boot-on; - regulator-initial-mode = <0x02>; - regulator-name = "vcc_ddr"; - phandle = <0xe9>; - - regulator-state-mem { - regulator-on-in-suspend; - }; - }; - - DCDC_REG4 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0x325aa0>; - regulator-max-microvolt = <0x325aa0>; - regulator-initial-mode = <0x02>; - regulator-name = "vcc_3v3"; - phandle = <0x4b>; - - regulator-state-mem { - regulator-off-in-suspend; - regulator-suspend-microvolt = <0x325aa0>; - }; - }; - - LDO_REG1 { - regulator-min-microvolt = <0xf4240>; - regulator-max-microvolt = <0xf4240>; - regulator-name = "vcc_1v0"; - phandle = <0xea>; - - regulator-state-mem { - regulator-off-in-suspend; - regulator-suspend-microvolt = <0xf4240>; - }; - }; - - LDO_REG2 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0x1b7740>; - regulator-max-microvolt = <0x1b7740>; - regulator-name = "vcc1v8_soc"; - phandle = <0x88>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <0x1b7740>; - }; - }; - - LDO_REG3 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0xf4240>; - regulator-max-microvolt = <0xf4240>; - regulator-name = "vcc1v0_soc"; - phandle = <0xeb>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <0xf4240>; - }; - }; - - LDO_REG4 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0x325aa0>; - regulator-max-microvolt = <0x325aa0>; - regulator-name = "vcc3v3_pmu"; - phandle = <0x29>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <0x325aa0>; - }; - }; - - LDO_REG5 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0x1b7740>; - regulator-max-microvolt = <0x1b7740>; - regulator-name = "vccio_sd"; - phandle = <0x4a>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <0x1b7740>; - }; - }; - - LDO_REG6 { - regulator-min-microvolt = <0x1b7740>; - regulator-max-microvolt = <0x2dc6c0>; - regulator-boot-on; - regulator-name = "vcc_sd"; - phandle = <0x93>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <0x2dc6c0>; - }; - }; - - LDO_REG7 { - regulator-min-microvolt = <0x325aa0>; - regulator-max-microvolt = <0x325aa0>; - regulator-name = "vcc_backlight"; - phandle = <0x9e>; - - regulator-state-mem { - regulator-off-in-suspend; - regulator-suspend-microvolt = <0x325aa0>; - }; - }; - - LDO_REG8 { - regulator-min-microvolt = <0x2ab980>; - regulator-max-microvolt = <0x2ab980>; - regulator-name = "vcc_lcd"; - phandle = <0x9f>; - - regulator-state-mem { - regulator-off-in-suspend; - regulator-suspend-microvolt = <0x2ab980>; - }; - }; - - BOOST { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0x4c4b40>; - regulator-max-microvolt = <0x5265c0>; - regulator-name = "boost"; - phandle = <0x65>; - }; - - OTG_SWITCH { - regulator-boot-on; - regulator-name = "otg_switch"; - phandle = <0xec>; - }; - }; - - battery { - compatible = "rk817,battery"; - ocv_table = <0xc5d 0xc94 0xcd0 0xd02 0xd34 0xd66 0xd98 0xdca 0xdfc 0xe2e 0xe56 0xe7e 0xea6 0xece 0xef6 0xf1e 0xf46 0xf6e 0xf96 0xf9b 0xfa0>; - design_capacity = <0xd34>; - design_qmax = <0xe86>; - bat_res = <0x64>; - sleep_enter_current = <0x12c>; - sleep_exit_current = <0x12c>; - sleep_filter_current = <0x64>; - power_off_thresd = <0xbb8>; - zero_algorithm_vol = <0xf0a>; - max_soc_offset = <0x3c>; - monitor_sec = <0x05>; - virtual_power = <0x00>; - sample_res = <0x0a>; - }; - - charger { - compatible = "rk817,charger"; - min_input_voltage = <0x1194>; - max_input_current = <0x5dc>; - max_chrg_current = <0x7d0>; - max_chrg_voltage = <0x1068>; - chrg_term_mode = <0x00>; - chrg_finish_cur = <0x34>; - virtual_power = <0x00>; - sample_res = <0x0a>; - dc_det_gpio = <0x5c 0x0b 0x00>; - bat_low_gpio = <0x66 0x0d 0x00>; - extcon = <0x67>; - }; - - codec { - #sound-dai-cells = <0x00>; - compatible = "rockchip,rk817-codec"; - clocks = <0x02 0x15>; - clock-names = "mclk"; - pinctrl-names = "default"; - pinctrl-0 = <0x68>; - hp-volume = <0x14>; - spk-volume = <0x03>; - status = "okay"; - phandle = <0xc3>; - }; - }; - }; - - i2c@ff190000 { - compatible = "rockchip,rk3399-i2c"; - reg = <0x00 0xff190000 0x00 0x1000>; - clocks = <0x02 0x1e 0x02 0x14f>; - clock-names = "i2c\0pclk"; - interrupts = <0x00 0x08 0x04>; - pinctrl-names = "default"; - pinctrl-0 = <0x69>; - #address-cells = <0x01>; - #size-cells = <0x00>; - status = "okay"; - clock-frequency = <0x61a80>; - phandle = <0xed>; - }; - - i2c@ff1a0000 { - compatible = "rockchip,rk3399-i2c"; - reg = <0x00 0xff1a0000 0x00 0x1000>; - clocks = <0x02 0x1f 0x02 0x150>; - clock-names = "i2c\0pclk"; - interrupts = <0x00 0x09 0x04>; - pinctrl-names = "default"; - pinctrl-0 = <0x6a>; - #address-cells = <0x01>; - #size-cells = <0x00>; - status = "disabled"; - phandle = <0xee>; - }; - - i2c@ff1b0000 { - compatible = "rockchip,rk3399-i2c"; - reg = <0x00 0xff1b0000 0x00 0x1000>; - clocks = <0x02 0x20 0x02 0x151>; - clock-names = "i2c\0pclk"; - interrupts = <0x00 0x0a 0x04>; - pinctrl-names = "default"; - pinctrl-0 = <0x6b>; - #address-cells = <0x01>; - #size-cells = <0x00>; - status = "disabled"; - phandle = <0xef>; - }; - - spi@ff1d0000 { - compatible = "rockchip,px30-spi\0rockchip,rk3066-spi"; - reg = <0x00 0xff1d0000 0x00 0x1000>; - interrupts = <0x00 0x1a 0x04>; - #address-cells = <0x01>; - #size-cells = <0x00>; - clocks = <0x02 0x24 0x02 0x155>; - clock-names = "spiclk\0apb_pclk"; - dmas = <0x2b 0x0c 0x2b 0x0d>; - dma-names = "tx\0rx"; - pinctrl-names = "default\0high_speed"; - pinctrl-0 = <0x6c 0x6d 0x6e 0x6f>; - pinctrl-1 = <0x70 0x6d 0x71 0x72>; - status = "disabled"; - phandle = <0xf0>; - }; - - spi@ff1d8000 { - compatible = "rockchip,px30-spi\0rockchip,rk3066-spi"; - reg = <0x00 0xff1d8000 0x00 0x1000>; - interrupts = <0x00 0x1b 0x04>; - #address-cells = <0x01>; - #size-cells = <0x00>; - clocks = <0x02 0x25 0x02 0x156>; - clock-names = "spiclk\0apb_pclk"; - dmas = <0x2b 0x0e 0x2b 0x0f>; - dma-names = "tx\0rx"; - pinctrl-names = "default\0high_speed"; - pinctrl-0 = <0x73 0x74 0x75 0x76 0x77>; - pinctrl-1 = <0x78 0x74 0x75 0x79 0x7a>; - status = "disabled"; - phandle = <0xf1>; - }; - - watchdog@ff1e0000 { - compatible = "snps,dw-wdt"; - reg = <0x00 0xff1e0000 0x00 0x100>; - clocks = <0x02 0x15b>; - interrupts = <0x00 0x25 0x04>; - resets = <0x02 0xb5>; - reset-names = "reset"; - status = "disabled"; - phandle = <0xf2>; - }; - - pwm@ff200000 { - compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm"; - reg = <0x00 0xff200000 0x00 0x10>; - #pwm-cells = <0x03>; - pinctrl-names = "active"; - pinctrl-0 = <0x7b>; - clocks = <0x02 0x22 0x02 0x153>; - clock-names = "pwm\0pclk"; - status = "okay"; - phandle = <0xbc>; - }; - - pwm@ff200010 { - compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm"; - reg = <0x00 0xff200010 0x00 0x10>; - #pwm-cells = <0x03>; - pinctrl-names = "active"; - pinctrl-0 = <0x7c>; - clocks = <0x02 0x22 0x02 0x153>; - clock-names = "pwm\0pclk"; - status = "okay"; - phandle = <0xc1>; - }; - - pwm@ff200020 { - compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm"; - reg = <0x00 0xff200020 0x00 0x10>; - #pwm-cells = <0x03>; - pinctrl-names = "active"; - pinctrl-0 = <0x7d>; - clocks = <0x02 0x22 0x02 0x153>; - clock-names = "pwm\0pclk"; - status = "disabled"; - phandle = <0xf3>; - }; - - pwm@ff200030 { - compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm"; - reg = <0x00 0xff200030 0x00 0x10>; - #pwm-cells = <0x03>; - pinctrl-names = "active"; - pinctrl-0 = <0x7e>; - clocks = <0x02 0x22 0x02 0x153>; - clock-names = "pwm\0pclk"; - status = "disabled"; - phandle = <0xf4>; - }; - - pwm@ff208000 { - compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm"; - reg = <0x00 0xff208000 0x00 0x10>; - #pwm-cells = <0x03>; - pinctrl-names = "active"; - pinctrl-0 = <0x7f>; - clocks = <0x02 0x23 0x02 0x154>; - clock-names = "pwm\0pclk"; - status = "disabled"; - phandle = <0xf5>; - }; - - pwm@ff208010 { - compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm"; - reg = <0x00 0xff208010 0x00 0x10>; - #pwm-cells = <0x03>; - pinctrl-names = "active"; - pinctrl-0 = <0x80>; - clocks = <0x02 0x23 0x02 0x154>; - clock-names = "pwm\0pclk"; - status = "disabled"; - phandle = <0xf6>; - }; - - pwm@ff208020 { - compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm"; - reg = <0x00 0xff208020 0x00 0x10>; - #pwm-cells = <0x03>; - pinctrl-names = "active"; - pinctrl-0 = <0x81>; - clocks = <0x02 0x23 0x02 0x154>; - clock-names = "pwm\0pclk"; - status = "disabled"; - phandle = <0xf7>; - }; - - pwm@ff208030 { - compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm"; - reg = <0x00 0xff208030 0x00 0x10>; - #pwm-cells = <0x03>; - pinctrl-names = "active"; - pinctrl-0 = <0x82>; - clocks = <0x02 0x23 0x02 0x154>; - clock-names = "pwm\0pclk"; - status = "disabled"; - phandle = <0xf8>; - }; - - rktimer@ff210000 { - compatible = "rockchip,rk3288-timer"; - reg = <0x00 0xff210000 0x00 0x1000>; - interrupts = <0x00 0x1e 0x04>; - clocks = <0x02 0x159 0x02 0x26>; - clock-names = "pclk\0timer"; - phandle = <0xf9>; - }; - - amba { - compatible = "simple-bus"; - #address-cells = <0x02>; - #size-cells = <0x02>; - ranges; - - dmac@ff240000 { - compatible = "arm,pl330\0arm,primecell"; - reg = <0x00 0xff240000 0x00 0x4000>; - interrupts = <0x00 0x01 0x04 0x00 0x02 0x04>; - clocks = <0x02 0xbb>; - clock-names = "apb_pclk"; - #dma-cells = <0x01>; - peripherals-req-type-burst; - phandle = <0x2b>; - }; - }; - - thermal-zones { - phandle = <0xfa>; - - soc-thermal { - polling-delay-passive = <0x14>; - polling-delay = <0x3e8>; - sustainable-power = <0x2ee>; - thermal-sensors = <0x83 0x00>; - phandle = <0xfb>; - - trips { - - trip-point-0 { - temperature = <0x11170>; - hysteresis = <0x7d0>; - type = "passive"; - phandle = <0xfc>; - }; - - trip-point-1 { - temperature = <0x14c08>; - hysteresis = <0x7d0>; - type = "passive"; - phandle = <0x84>; - }; - - soc-crit { - temperature = <0x1c138>; - hysteresis = <0x7d0>; - type = "critical"; - phandle = <0xfd>; - }; - }; - - cooling-maps { - - map0 { - trip = <0x84>; - cooling-device = <0x09 0xffffffff 0xffffffff>; - contribution = <0x1000>; - }; - - map1 { - trip = <0x84>; - cooling-device = <0x85 0xffffffff 0xffffffff>; - contribution = <0x1000>; - }; - }; - }; - - gpu-thermal { - polling-delay-passive = <0x64>; - polling-delay = <0x3e8>; - thermal-sensors = <0x83 0x01>; - phandle = <0xfe>; - }; - }; - - tsadc@ff280000 { - compatible = "rockchip,px30-tsadc"; - reg = <0x00 0xff280000 0x00 0x100>; - interrupts = <0x00 0x24 0x04>; - rockchip,grf = <0x2f>; - clocks = <0x02 0x2c 0x02 0x158>; - clock-names = "tsadc\0apb_pclk"; - assigned-clocks = <0x02 0x2c>; - assigned-clock-rates = <0xc350>; - resets = <0x02 0xa8>; - reset-names = "tsadc-apb"; - #thermal-sensor-cells = <0x01>; - rockchip,hw-tshut-temp = <0x1d4c0>; - status = "okay"; - pinctrl-names = "gpio\0otpout"; - pinctrl-0 = <0x86>; - pinctrl-1 = <0x87>; - phandle = <0x83>; - }; - - saradc@ff288000 { - compatible = "rockchip,px30-saradc\0rockchip,rk3399-saradc"; - reg = <0x00 0xff288000 0x00 0x100>; - interrupts = <0x00 0x54 0x04>; - #io-channel-cells = <0x01>; - clocks = <0x02 0x2d 0x02 0x157>; - clock-names = "saradc\0apb_pclk"; - resets = <0x02 0xa5>; - reset-names = "saradc-apb"; - status = "okay"; - vref-supply = <0x88>; - phandle = <0xbe>; - }; - - otp@ff290000 { - compatible = "rockchip,px30-otp"; - reg = <0x00 0xff290000 0x00 0x4000>; - #address-cells = <0x01>; - #size-cells = <0x01>; - clocks = <0x02 0x2f 0x02 0x15a 0x02 0x161>; - clock-names = "clk_otp\0pclk_otp\0pclk_otp_phy"; - resets = <0x02 0xb4>; - reset-names = "otp_phy"; - phandle = <0xff>; - - id@7 { - reg = <0x07 0x10>; - phandle = <0x0f>; - }; - - cpu-leakage@17 { - reg = <0x17 0x01>; - phandle = <0x07>; - }; - - performance@1e { - reg = <0x1e 0x01>; - bits = <0x04 0x03>; - phandle = <0x08>; - }; - }; - - clock-controller@ff2b0000 { - compatible = "rockchip,px30-cru"; - reg = <0x00 0xff2b0000 0x00 0x1000>; - rockchip,grf = <0x2f>; - rockchip,boost = <0x89>; - #clock-cells = <0x01>; - #reset-cells = <0x01>; - assigned-clocks = <0x02 0x04>; - assigned-clock-rates = <0x3dfd2400>; - phandle = <0x02>; - }; - - cpu-boost@ff2b8000 { - compatible = "syscon"; - reg = <0x00 0xff2b8000 0x00 0x1000>; - rockchip,boost-low-con0 = <0x1032>; - rockchip,boost-low-con1 = <0x1441>; - rockchip,boost-high-con0 = <0x1036>; - rockchip,boost-high-con1 = <0x1441>; - rockchip,boost-backup-pll = <0x01>; - rockchip,boost-backup-pll-usage = <0x00>; - rockchip,boost-switch-threshold = <0x249f00>; - rockchip,boost-statis-threshold = <0x100>; - rockchip,boost-statis-enable = <0x00>; - rockchip,boost-enable = <0x00>; - phandle = <0x89>; - }; - - pmu-clock-controller@ff2bc000 { - compatible = "rockchip,px30-pmucru"; - reg = <0x00 0xff2bc000 0x00 0x1000>; - rockchip,grf = <0x2f>; - #clock-cells = <0x01>; - #reset-cells = <0x01>; - assigned-clocks = <0x2a 0x01 0x2a 0x08 0x2a 0x05 0x02 0x07 0x02 0xab 0x02 0xb0 0x02 0xf0 0x02 0xf5 0x02 0x140 0x02 0x49>; - assigned-clock-rates = <0x47868c00 0x5f5e100 0x18cba80 0x23c34600 0xbebc200 0xbebc200 0x8f0d180 0x8f0d180 0x5f5e100 0xbebc200>; - phandle = <0x2a>; - }; - - syscon@ff2c0000 { - compatible = "rockchip,px30-usb2phy-grf\0syscon\0simple-mfd"; - reg = <0x00 0xff2c0000 0x00 0x10000>; - #address-cells = <0x01>; - #size-cells = <0x01>; - phandle = <0x100>; - - usb2-phy@100 { - compatible = "rockchip,px30-usb2phy\0rockchip,rk3328-usb2phy"; - reg = <0x100 0x10>; - clocks = <0x2a 0x0a>; - clock-names = "phyclk"; - #clock-cells = <0x00>; - assigned-clocks = <0x02 0x0e 0x02 0x55>; - assigned-clock-parents = <0x67 0x02 0x0e>; - clock-output-names = "usb480m_phy"; - status = "okay"; - phandle = <0x67>; - - host-port { - #phy-cells = <0x00>; - interrupts = <0x00 0x44 0x04>; - interrupt-names = "linestate"; - status = "okay"; - phandle = <0x8c>; - }; - - otg-port { - #phy-cells = <0x00>; - interrupts = <0x00 0x42 0x04 0x00 0x41 0x04 0x00 0x40 0x04>; - interrupt-names = "otg-bvalid\0otg-id\0linestate"; - status = "disabled"; - phandle = <0x8b>; - }; - }; - }; - - video-phy@ff2e0000 { - compatible = "rockchip,px30-video-phy"; - reg = <0x00 0xff2e0000 0x00 0x10000 0x00 0xff450000 0x00 0x10000>; - clocks = <0x2a 0x0b 0x02 0x145 0x02 0x144>; - clock-names = "ref\0pclk_phy\0pclk_host"; - #clock-cells = <0x00>; - resets = <0x02 0x3e>; - reset-names = "rst"; - power-domains = <0x8a 0x0c>; - #phy-cells = <0x00>; - status = "okay"; - phandle = <0x4c>; - }; - - mipi-dphy-rx0@ff2f0000 { - compatible = "rockchip,rk3326-mipi-dphy"; - reg = <0x00 0xff2f0000 0x00 0x4000>; - clocks = <0x02 0x146>; - clock-names = "dphy-ref"; - power-domains = <0x8a 0x0d>; - rockchip,grf = <0x2f>; - status = "okay"; - phandle = <0x101>; - }; - - usb@ff300000 { - compatible = "rockchip,px30-usb\0rockchip,rk3066-usb\0snps,dwc2"; - reg = <0x00 0xff300000 0x00 0x40000>; - interrupts = <0x00 0x3e 0x04>; - clocks = <0x02 0x102>; - clock-names = "otg"; - power-domains = <0x8a 0x05>; - dr_mode = "otg"; - g-np-tx-fifo-size = <0x10>; - g-rx-fifo-size = <0x118>; - g-tx-fifo-size = <0x100 0x80 0x80 0x40 0x20 0x10>; - g-use-dma; - phys = <0x8b>; - phy-names = "usb2-phy"; - status = "okay"; - phandle = <0x102>; - }; - - usb@ff340000 { - compatible = "generic-ehci"; - reg = <0x00 0xff340000 0x00 0x10000>; - interrupts = <0x00 0x3c 0x04>; - clocks = <0x02 0x103 0x67>; - clock-names = "usbhost\0utmi"; - power-domains = <0x8a 0x05>; - phys = <0x8c>; - phy-names = "usb"; - status = "disabled"; - phandle = <0x103>; - }; - - usb@ff350000 { - compatible = "generic-ohci"; - reg = <0x00 0xff350000 0x00 0x10000>; - interrupts = <0x00 0x3d 0x04>; - clocks = <0x02 0x103 0x67>; - clock-names = "usbhost\0utmi"; - power-domains = <0x8a 0x05>; - phys = <0x8c>; - phy-names = "usb"; - status = "disabled"; - phandle = <0x104>; - }; - - ethernet@ff360000 { - compatible = "rockchip,px30-gmac"; - reg = <0x00 0xff360000 0x00 0x10000>; - rockchip,grf = <0x2f>; - interrupts = <0x00 0x2b 0x04>; - interrupt-names = "macirq"; - clocks = <0x02 0x3e 0x02 0x3f 0x02 0x3f 0x02 0x40 0x02 0x41 0x02 0xb2 0x02 0x143 0x02 0x4c>; - clock-names = "stmmaceth\0mac_clk_rx\0mac_clk_tx\0clk_mac_ref\0clk_mac_refout\0aclk_mac\0pclk_mac\0clk_mac_speed"; - phy-mode = "rmii"; - pinctrl-names = "default"; - pinctrl-0 = <0x8d 0x8e>; - resets = <0x02 0x5e>; - reset-names = "stmmaceth"; - power-domains = <0x8a 0x09>; - status = "disabled"; - phandle = <0x105>; - }; - - dwmmc@ff370000 { - compatible = "rockchip,px30-dw-mshc\0rockchip,rk3288-dw-mshc"; - reg = <0x00 0xff370000 0x00 0x4000>; - max-frequency = <0x8f0d180>; - clocks = <0x02 0xf7 0x02 0x3b 0x02 0x43 0x02 0x44>; - clock-names = "biu\0ciu\0ciu-drv\0ciu-sample"; - assigned-clocks = <0x02 0x3b>; - assigned-clock-parents = <0x02 0x57>; - power-domains = <0x8a 0x07>; - fifo-depth = <0x100>; - interrupts = <0x00 0x36 0x04>; - pinctrl-names = "default"; - pinctrl-0 = <0x8f 0x90 0x91 0x92>; - status = "okay"; - bus-width = <0x04>; - cap-mmc-highspeed; - cap-sd-highspeed; - supports-sd; - card-detect-delay = <0x320>; - ignore-pm-notify; - cd-gpios = <0x5c 0x03 0x01>; - sd-uhs-sdr12; - sd-uhs-sdr25; - sd-uhs-sdr50; - sd-uhs-sdr104; - vqmmc-supply = <0x4a>; - vmmc-supply = <0x93>; - phandle = <0x106>; - }; - - dwmmc@ff380000 { - compatible = "rockchip,px30-dw-mshc\0rockchip,rk3288-dw-mshc"; - reg = <0x00 0xff380000 0x00 0x4000>; - max-frequency = <0x8f0d180>; - clocks = <0x02 0xff 0x02 0x38 0x02 0x45 0x02 0x46>; - clock-names = "biu\0ciu\0ciu-drv\0ciu-sample"; - assigned-clocks = <0x02 0x38>; - assigned-clock-parents = <0x02 0x51>; - power-domains = <0x8a 0x0a>; - fifo-depth = <0x100>; - interrupts = <0x00 0x37 0x04>; - pinctrl-names = "default"; - pinctrl-0 = <0x94 0x95 0x96>; - status = "okay"; - bus-width = <0x04>; - cap-mmc-highspeed; - cap-sd-highspeed; - supports-sd; - card-detect-delay = <0x320>; - ignore-pm-notify; - cd-gpios = <0x97 0x0e 0x01>; - sd-uhs-sdr12; - sd-uhs-sdr25; - sd-uhs-sdr50; - sd-uhs-sdr104; - vqmmc-supply = <0x4a>; - vmmc-supply = <0x93>; - phandle = <0x107>; - }; - - dwmmc@ff390000 { - compatible = "rockchip,px30-dw-mshc\0rockchip,rk3288-dw-mshc"; - reg = <0x00 0xff390000 0x00 0x4000>; - max-frequency = <0x8f0d180>; - clocks = <0x02 0x100 0x02 0x39 0x02 0x47 0x02 0x48>; - clock-names = "biu\0ciu\0ciu-drv\0ciu-sample"; - assigned-clocks = <0x02 0x39>; - assigned-clock-parents = <0x02 0x53>; - power-domains = <0x8a 0x0a>; - fifo-depth = <0x100>; - interrupts = <0x00 0x35 0x04>; - status = "disabled"; - phandle = <0x108>; - }; - - nandc@ff3b0000 { - compatible = "rockchip,rk-nandc"; - reg = <0x00 0xff3b0000 0x00 0x4000>; - interrupts = <0x00 0x39 0x04>; - nandc_id = <0x00>; - clocks = <0x02 0x37 0x02 0xfe>; - clock-names = "clk_nandc\0hclk_nandc"; - assigned-clocks = <0x02 0x37>; - assigned-clock-parents = <0x02 0x4f>; - power-domains = <0x8a 0x0a>; - status = "disabled"; - phandle = <0x109>; - }; - - sfc@ff3a0000 { - compatible = "rockchip,sfc"; - reg = <0x00 0xff3a0000 0x00 0x4000>; - interrupts = <0x00 0x38 0x04>; - clocks = <0x02 0x3a 0x02 0x101>; - clock-names = "clk_sfc\0hclk_sfc"; - assigned-clocks = <0x02 0x3a>; - assigned-clock-rates = <0x989680>; - status = "disabled"; - phandle = <0x10a>; - }; - - gpu@ff400000 { - compatible = "arm,malit602\0arm,malit60x\0arm,malit6xx\0arm,mali-midgard"; - reg = <0x00 0xff400000 0x00 0x4000>; - interrupts = <0x00 0x2d 0x04 0x00 0x2e 0x04 0x00 0x2f 0x04>; - interrupt-names = "GPU\0MMU\0JOB"; - clocks = <0x02 0x49>; - clock-names = "clk_mali"; - power-domains = <0x8a 0x0e>; - #cooling-cells = <0x02>; - operating-points-v2 = <0x98>; - status = "okay"; - mali-supply = <0x0e>; - phandle = <0x85>; - - power_model { - compatible = "arm,mali-simple-power-model"; - static-coefficient = <0x64578>; - dynamic-coefficient = <0x2dd>; - ts = <0x7d00 0x125c 0xffffffb0 0x02>; - thermal-zone = "gpu-thermal"; - }; - }; - - gpu-opp-table { - compatible = "operating-points-v2"; - rockchip,thermal-zone = "soc-thermal"; - rockchip,temp-hysteresis = <0x1388>; - rockchip,low-temp = <0x00>; - rockchip,low-temp-min-volt = <0xf4240>; - rockchip,low-temp-adjust-volt = <0x00 0x1e0 0xc350>; - rockchip,max-volt = <0x11edd8>; - rockchip,evb-irdrop = <0x61a8>; - rockchip,pvtm-voltage-sel = <0x00 0xc350 0x00 0xc351 0xd2f0 0x01 0xd2f1 0xea60 0x02 0xea61 0x1869f 0x03>; - rockchip,pvtm-ch = <0x00 0x00>; - phandle = <0x98>; - - opp-400000000 { - opp-hz = <0x00 0x17d78400>; - opp-microvolt = <0x100590>; - opp-microvolt-L0 = <0x100590>; - opp-microvolt-L1 = <0xfa3e8>; - opp-microvolt-L2 = <0xee098>; - opp-microvolt-L3 = <0xe7ef0>; - }; - - opp-480000000 { - opp-hz = <0x00 0x1c9c3800>; - opp-microvolt = <0x112a88>; - opp-microvolt-L0 = <0x112a88>; - opp-microvolt-L1 = <0x10c8e0>; - opp-microvolt-L2 = <0x100590>; - opp-microvolt-L3 = <0xf4240>; - }; - - opp-520000000 { - opp-hz = <0x00 0x1efe9200>; - opp-microvolt = <0x118c30>; - opp-microvolt-L0 = <0x118c30>; - opp-microvolt-L1 = <0x118c30>; - opp-microvolt-L2 = <0x10c8e0>; - opp-microvolt-L3 = <0x100590>; - }; - }; - - hevc_service@ff440000 { - compatible = "rockchip,hevc_sub"; - iommu_enabled = <0x01>; - reg = <0x00 0xff440000 0x00 0x400>; - interrupts = <0x00 0x31 0x04>; - interrupt-names = "irq_dec"; - dev_mode = <0x01>; - iommus = <0x99>; - allocator = <0x01>; - phandle = <0x9c>; - }; - - vpu_service@ff442000 { - compatible = "rockchip,vpu_sub"; - iommu_enabled = <0x01>; - reg = <0x00 0xff442000 0x00 0x800>; - interrupts = <0x00 0x50 0x04 0x00 0x4f 0x04>; - interrupt-names = "irq_enc\0irq_dec"; - dev_mode = <0x00>; - iommus = <0x9a>; - allocator = <0x01>; - phandle = <0x9b>; - }; - - vpu_combo { - compatible = "rockchip,vpu_combo"; - subcnt = <0x02>; - rockchip,grf = <0x2f>; - rockchip,sub = <0x9b 0x9c>; - clocks = <0x02 0xaf 0x02 0xf4 0x02 0x4b>; - clock-names = "aclk_vcodec\0hclk_vcodec\0clk_core"; - resets = <0x02 0x24 0x02 0x26 0x02 0x25 0x02 0x27 0x02 0x3f>; - reset-names = "video_a\0video_h\0niu_a\0niu_h\0video_core"; - power-domains = <0x8a 0x0b>; - mode_bit = <0x0f>; - mode_ctrl = <0x410>; - status = "okay"; - phandle = <0x10b>; - }; - - iommu@ff440440 { - compatible = "rockchip,iommu"; - reg = <0x00 0xff440440 0x00 0x40 0x00 0xff440480 0x00 0x40>; - interrupts = <0x00 0x32 0x04>; - interrupt-names = "hevc_mmu"; - clocks = <0x02 0xaf 0x02 0xf4>; - clock-names = "aclk\0hclk"; - power-domains = <0x8a 0x0b>; - #iommu-cells = <0x00>; - phandle = <0x99>; - }; - - iommu@ff442800 { - compatible = "rockchip,iommu"; - reg = <0x00 0xff442800 0x00 0x100>; - interrupts = <0x00 0x51 0x04>; - interrupt-names = "vpu_mmu"; - clocks = <0x02 0xaf 0x02 0xf4>; - clock-names = "aclk\0hclk"; - power-domains = <0x8a 0x0b>; - #iommu-cells = <0x00>; - phandle = <0x9a>; - }; - - dsi@ff450000 { - compatible = "rockchip,px30-mipi-dsi"; - reg = <0x00 0xff450000 0x00 0x10000>; - interrupts = <0x00 0x4b 0x04>; - clocks = <0x02 0x144 0x4c>; - clock-names = "pclk\0hs_clk"; - resets = <0x02 0x3d>; - reset-names = "apb"; - phys = <0x4c>; - phy-names = "mipi_dphy"; - power-domains = <0x8a 0x0c>; - rockchip,grf = <0x2f>; - #address-cells = <0x01>; - #size-cells = <0x00>; - status = "okay"; - phandle = <0x10c>; - - ports { - #address-cells = <0x01>; - #size-cells = <0x00>; - - port@0 { - reg = <0x00>; - #address-cells = <0x01>; - #size-cells = <0x00>; - - endpoint@0 { - reg = <0x00>; - remote-endpoint = <0x13>; - status = "okay"; - phandle = <0xa3>; - }; - }; - }; - - panel@0 { - compatible = "elida,kd35t133\0simple-panel-dsi"; - reg = <0x00>; - backlight = <0x9d>; - backlight-supply = <0x9e>; - power-supply = <0x9f>; - reset-gpios = <0x97 0x10 0x01>; - reset-delay-ms = <0x96>; - init-delay-ms = <0x14>; - enable-delay-ms = <0x78>; - prepare-delay-ms = <0x14>; - unprepare-delay-ms = <0x14>; - disable-delay-ms = <0x32>; - width-mm = <0x34>; - height-mm = <0x46>; - dsi,flags = <0xa03>; - dsi,format = <0x00>; - dsi,lanes = <0x04>; - panel-init-sequence = [15 00 02 ff 30 15 00 02 ff 52 15 00 02 ff 01 15 00 02 e3 00 15 00 02 40 0a 15 00 02 03 40 15 00 02 04 00 15 00 02 05 03 15 00 02 24 12 15 00 02 25 1e 15 00 02 26 6f 15 00 02 27 52 15 00 02 28 67 15 00 02 29 01 15 00 02 2a df 15 00 02 37 9c 15 00 02 38 a7 15 00 02 39 53 15 00 02 44 00 15 00 02 49 3c 15 00 02 59 fe 15 00 02 5c 00 15 00 02 80 20 15 00 02 91 77 15 00 02 92 77 15 00 02 a0 55 15 00 02 a1 50 15 00 02 a4 9c 15 00 02 a7 02 15 00 02 a8 01 15 00 02 a9 21 15 00 02 aa fc 15 00 02 ab 28 15 00 02 ac 06 15 00 02 ad 06 15 00 02 ae 06 15 00 02 af 03 15 00 02 b0 08 15 00 02 b1 26 15 00 02 b2 28 15 00 02 b3 28 15 00 02 b4 33 15 00 02 b5 08 15 00 02 b6 26 15 00 02 b7 08 15 00 02 b8 26 15 00 02 ff 30 15 00 02 ff 52 15 00 02 ff 02 15 00 02 b0 0b 15 00 02 b1 16 15 00 02 b2 17 15 00 02 b3 2c 15 00 02 b4 32 15 00 02 b5 3b 15 00 02 b6 29 15 00 02 b7 40 15 00 02 b8 0d 15 00 02 b9 05 15 00 02 ba 12 15 00 02 bb 10 15 00 02 bc 12 15 00 02 bd 15 15 00 02 be 19 15 00 02 bf 0e 15 00 02 c0 16 15 00 02 c1 0a 15 00 02 d0 0c 15 00 02 d1 17 15 00 02 d2 14 15 00 02 d3 2e 15 00 02 d4 32 15 00 02 d5 3c 15 00 02 d6 22 15 00 02 d7 3d 15 00 02 d8 0d 15 00 02 d9 07 15 00 02 da 13 15 00 02 db 13 15 00 02 dc 11 15 00 02 dd 15 15 00 02 de 19 15 00 02 df 10 15 00 02 e0 17 15 00 02 e1 0a 15 00 02 ff 30 15 00 02 ff 52 15 00 02 ff 03 15 00 02 00 2a 15 00 02 01 2a 15 00 02 02 2a 15 00 02 03 2a 15 00 02 04 61 15 00 02 05 80 15 00 02 06 c7 15 00 02 07 01 15 00 02 08 82 15 00 02 09 83 15 00 02 30 2a 15 00 02 31 2a 15 00 02 32 2a 15 00 02 33 2a 15 00 02 34 a1 15 00 02 35 c5 15 00 02 36 80 15 00 02 37 23 15 00 02 40 82 15 00 02 41 83 15 00 02 42 80 15 00 02 43 81 15 00 02 44 55 15 00 02 45 e6 15 00 02 46 e5 15 00 02 47 55 15 00 02 48 e8 15 00 02 49 e7 15 00 02 50 02 15 00 02 51 01 15 00 02 52 04 15 00 02 53 03 15 00 02 54 55 15 00 02 55 ea 15 00 02 56 e9 15 00 02 57 55 15 00 02 58 ec 15 00 02 59 eb 15 00 02 7e 02 15 00 02 7f 80 15 00 02 e0 5a 15 00 02 b1 00 15 00 02 b4 0e 15 00 02 b5 0f 15 00 02 b6 04 15 00 02 b7 07 15 00 02 b8 06 15 00 02 b9 05 15 00 02 ba 0f 15 00 02 c7 00 15 00 02 ca 0e 15 00 02 cb 0f 15 00 02 cc 04 15 00 02 cd 07 15 00 02 ce 06 15 00 02 cf 05 15 00 02 d0 0f 15 00 02 81 0f 15 00 02 84 0e 15 00 02 85 0f 15 00 02 86 07 15 00 02 87 04 15 00 02 88 05 15 00 02 89 06 15 00 02 8a 00 15 00 02 97 0f 15 00 02 9a 0e 15 00 02 9b 0f 15 00 02 9c 07 15 00 02 9d 04 15 00 02 9e 05 15 00 02 9f 06 15 00 02 a0 00 15 00 02 ff 30 15 00 02 ff 52 15 00 02 ff 02 15 00 02 01 01 15 00 02 02 da 15 00 02 03 ba 15 00 02 04 a8 15 00 02 05 9a 15 00 02 06 70 15 00 02 07 ff 15 00 02 08 91 15 00 02 09 90 15 00 02 0a ff 15 00 02 0b 8f 15 00 02 0c 60 15 00 02 0d 58 15 00 02 0e 48 15 00 02 0f 38 15 00 02 10 2b 15 00 02 ff 30 15 00 02 ff 52 15 00 02 ff 00 15 00 02 36 02 15 00 02 3a 70 05 c8 01 11 05 14 01 29]; - panel-exit-sequence = <0x5140128 0x50a0110>; - - display-timings { - native-mode = <0xa0>; - - 60Hz { - clock-frequency = <0x1ba8140>; - hactive = <0x280>; - vactive = <0x1e0>; - hfront-porch = <0x2e>; - hsync-len = <0x02>; - hback-porch = <0x2c>; - vfront-porch = <0x10>; - vsync-len = <0x02>; - vback-porch = <0x0e>; - hsync-active = <0x00>; - vsync-active = <0x00>; - de-active = <0x00>; - pixelclk-active = <0x01>; - phandle = <0xa0>; - }; - - 50Hz { - clock-frequency = <0x1ba8140>; - hactive = <0x280>; - vactive = <0x1e0>; - hfront-porch = <0x2e>; - hsync-len = <0x02>; - hback-porch = <0x2c>; - vfront-porch = <0x10>; - vsync-len = <0x02>; - vback-porch = <0x0e>; - hsync-active = <0x00>; - vsync-active = <0x00>; - de-active = <0x00>; - pixelclk-active = <0x01>; - phandle = <0xa00>; - }; - - 75Hz { - clock-frequency = <0x1ba8140>; - hactive = <0x280>; - vactive = <0x1e0>; - hfront-porch = <0x2e>; - hsync-len = <0x02>; - hback-porch = <0x2c>; - vfront-porch = <0x10>; - vsync-len = <0x02>; - vback-porch = <0x0e>; - hsync-active = <0x00>; - vsync-active = <0x00>; - de-active = <0x00>; - pixelclk-active = <0x01>; - phandle = <0xa01>; - }; - }; - }; - }; - - vop@ff460000 { - compatible = "rockchip,px30-vop-big"; - reg = <0x00 0xff460000 0x00 0x1fc 0x00 0xff460a00 0x00 0x400>; - rockchip,grf = <0x2f>; - reg-names = "regs\0gamma_lut"; - interrupts = <0x00 0x4d 0x04>; - clocks = <0x02 0xb5 0x02 0x96 0x02 0xfb>; - clock-names = "aclk_vop\0dclk_vop\0hclk_vop"; - power-domains = <0x8a 0x0c>; - iommus = <0xa1>; - status = "okay"; - phandle = <0x10f>; - - port { - #address-cells = <0x01>; - #size-cells = <0x00>; - phandle = <0x10>; - - endpoint@0 { - reg = <0x00>; - remote-endpoint = <0xa2>; - phandle = <0x12>; - }; - - endpoint@1 { - reg = <0x01>; - remote-endpoint = <0xa3>; - phandle = <0x13>; - }; - - endpoint@2 { - reg = <0x02>; - remote-endpoint = <0xa4>; - phandle = <0x14>; - }; - }; - }; - - iommu@ff460f00 { - compatible = "rockchip,iommu"; - reg = <0x00 0xff460f00 0x00 0x100>; - interrupts = <0x00 0x4d 0x04>; - interrupt-names = "vopb_mmu"; - clocks = <0x02 0xb5 0x02 0xfb>; - clock-names = "aclk\0hclk"; - power-domains = <0x8a 0x0c>; - #iommu-cells = <0x00>; - status = "okay"; - phandle = <0xa1>; - }; - - rk_rga@ff480000 { - compatible = "rockchip,rga2"; - reg = <0x00 0xff480000 0x00 0x1000>; - interrupts = <0x00 0x4c 0x04>; - clocks = <0x02 0xb7 0x02 0xfd 0x02 0x35>; - clock-names = "aclk_rga\0hclk_rga\0clk_rga"; - power-domains = <0x8a 0x0c>; - dma-coherent; - status = "okay"; - phandle = <0x110>; - }; - - cif@ff490000 { - compatible = "rockchip,cif"; - reg = <0x00 0xff490000 0x00 0x200>; - interrupts = <0x00 0x45 0x04>; - clocks = <0x02 0xb3 0x02 0xf9 0x02 0x160 0x02 0x34>; - clock-names = "aclk_cif0\0hclk_cif0\0pclk_cif\0cif0_out"; - resets = <0x02 0x2c 0x02 0x2d 0x02 0x2e>; - reset-names = "rst_cif_a\0rst_cif_h\0rst_cif_pclkin"; - power-domains = <0x8a 0x0d>; - pinctrl-names = "cif_pin_all"; - pinctrl-0 = <0xa5>; - iommus = <0xa6>; - status = "disabled"; - phandle = <0x111>; - }; - - cif-new@ff490000 { - compatible = "rockchip,px30-cif"; - reg = <0x00 0xff490000 0x00 0x200>; - interrupts = <0x00 0x45 0x04>; - clocks = <0x02 0xb3 0x02 0xf9 0x02 0x160 0x02 0x34>; - clock-names = "aclk_cif\0hclk_cif\0pclk_cif\0cif_out"; - resets = <0x02 0x2c 0x02 0x2d 0x02 0x2e>; - reset-names = "rst_cif_a\0rst_cif_h\0rst_cif_pclkin"; - power-domains = <0x8a 0x0d>; - iommus = <0xa6>; - status = "disabled"; - phandle = <0x112>; - }; - - iommu@ff490800 { - compatible = "rockchip,iommu"; - reg = <0x00 0xff490800 0x00 0x100>; - interrupts = <0x00 0x45 0x04>; - interrupt-names = "vip_mmu"; - clocks = <0x02 0xb3 0x02 0xf9>; - clock-names = "aclk\0hclk"; - power-domains = <0x8a 0x0d>; - rk_iommu,disable_reset_quirk; - #iommu-cells = <0x00>; - status = "okay"; - phandle = <0xa6>; - }; - - rk_isp@ff4a0000 { - compatible = "rockchip,px30-isp\0rockchip,isp"; - reg = <0x00 0xff4a0000 0x00 0x8000>; - interrupts = <0x00 0x46 0x04>; - clocks = <0x02 0xb4 0x02 0xfa 0x02 0x33 0x02 0x33 0x02 0x15f 0x02 0x34 0x02 0x34 0x02 0x146>; - clock-names = "aclk_isp\0hclk_isp\0clk_isp\0clk_isp_jpe\0pclkin_isp\0clk_cif_pll\0clk_cif_out\0pclk_dphyrx"; - resets = <0x02 0x2b 0x02 0x2f>; - reset-names = "rst_isp\0rst_mipicsiphy"; - power-domains = <0x8a 0x0d>; - pinctrl-names = "default\0isp_dvp8bit2\0isp_dvp10bit\0isp_dvp12bit"; - pinctrl-0 = <0xa7>; - pinctrl-1 = <0xa5>; - pinctrl-2 = <0xa5 0xa8>; - pinctrl-3 = <0xa9 0xa5 0xa8>; - rockchip,isp,mipiphy = <0x01>; - rockchip,isp,csiphy,reg = <0xff2f0000 0x4000>; - rockchip,grf = <0x2f>; - rockchip,cru = <0x02>; - rockchip,isp,iommu-enable = <0x01>; - iommus = <0xaa>; - status = "disabled"; - phandle = <0x113>; - }; - - rkisp1@ff4a0000 { - compatible = "rockchip,rk3326-rkisp1"; - reg = <0x00 0xff4a0000 0x00 0x8000>; - interrupts = <0x00 0x46 0x04 0x00 0x49 0x04 0x00 0x4a 0x04>; - interrupt-names = "isp_irq\0mi_irq\0mipi_irq"; - clocks = <0x02 0xb4 0x02 0xfa 0x02 0x33 0x02 0x15f>; - clock-names = "aclk_isp\0hclk_isp\0clk_isp\0pclk_isp"; - devfreq = <0xab>; - power-domains = <0x8a 0x0d>; - iommus = <0xaa>; - rockchip,grf = <0x2f>; - status = "okay"; - phandle = <0x114>; - }; - - iommu@ff4a8000 { - compatible = "rockchip,iommu"; - reg = <0x00 0xff4a8000 0x00 0x100>; - interrupts = <0x00 0x46 0x04>; - interrupt-names = "isp_mmu"; - clocks = <0x02 0xb4 0x02 0xfa>; - clock-names = "aclk\0hclk"; - power-domains = <0x8a 0x0d>; - rk_iommu,disable_reset_quirk; - #iommu-cells = <0x00>; - status = "okay"; - phandle = <0xaa>; - }; - - qos@ff518000 { - compatible = "syscon"; - reg = <0x00 0xff518000 0x00 0x20>; - phandle = <0x18>; - }; - - qos@ff520000 { - compatible = "syscon"; - reg = <0x00 0xff520000 0x00 0x20>; - phandle = <0x28>; - }; - - qos@ff52c000 { - compatible = "syscon"; - reg = <0x00 0xff52c000 0x00 0x20>; - phandle = <0x17>; - }; - - qos@ff538000 { - compatible = "syscon"; - reg = <0x00 0xff538000 0x00 0x20>; - phandle = <0x19>; - }; - - qos@ff538080 { - compatible = "syscon"; - reg = <0x00 0xff538080 0x00 0x20>; - phandle = <0x1a>; - }; - - qos@ff538100 { - compatible = "syscon"; - reg = <0x00 0xff538100 0x00 0x20>; - phandle = <0x1b>; - }; - - qos@ff538180 { - compatible = "syscon"; - reg = <0x00 0xff538180 0x00 0x20>; - phandle = <0x1c>; - }; - - qos@ff540000 { - compatible = "syscon"; - reg = <0x00 0xff540000 0x00 0x20>; - phandle = <0x15>; - }; - - qos@ff540080 { - compatible = "syscon"; - reg = <0x00 0xff540080 0x00 0x20>; - phandle = <0x16>; - }; - - qos@ff548000 { - compatible = "syscon"; - reg = <0x00 0xff548000 0x00 0x20>; - phandle = <0x23>; - }; - - qos@ff548080 { - compatible = "syscon"; - reg = <0x00 0xff548080 0x00 0x20>; - phandle = <0x24>; - }; - - qos@ff548100 { - compatible = "syscon"; - reg = <0x00 0xff548100 0x00 0x20>; - phandle = <0x25>; - }; - - qos@ff548180 { - compatible = "syscon"; - reg = <0x00 0xff548180 0x00 0x20>; - phandle = <0x26>; - }; - - qos@ff548200 { - compatible = "syscon"; - reg = <0x00 0xff548200 0x00 0x20>; - phandle = <0x27>; - }; - - qos@ff550000 { - compatible = "syscon"; - reg = <0x00 0xff550000 0x00 0x20>; - phandle = <0x1f>; - }; - - qos@ff550080 { - compatible = "syscon"; - reg = <0x00 0xff550080 0x00 0x20>; - phandle = <0x20>; - }; - - qos@ff550100 { - compatible = "syscon"; - reg = <0x00 0xff550100 0x00 0x20>; - phandle = <0x21>; - }; - - qos@ff550180 { - compatible = "syscon"; - reg = <0x00 0xff550180 0x00 0x20>; - phandle = <0x22>; - }; - - qos@ff558000 { - compatible = "syscon"; - reg = <0x00 0xff558000 0x00 0x20>; - phandle = <0x1d>; - }; - - qos@ff558080 { - compatible = "syscon"; - reg = <0x00 0xff558080 0x00 0x20>; - phandle = <0x1e>; - }; - - dfi@ff610000 { - reg = <0x00 0xff610000 0x00 0x400>; - compatible = "rockchip,px30-dfi"; - rockchip,pmugrf = <0xac>; - status = "okay"; - phandle = <0xad>; - }; - - dmc { - compatible = "rockchip,px30-dmc"; - interrupts = <0x00 0x69 0x04>; - interrupt-names = "complete_irq"; - devfreq-events = <0xad>; - clocks = <0x02 0x54>; - clock-names = "dmc_clk"; - operating-points-v2 = <0xae>; - ddr_timing = <0xaf>; - upthreshold = <0x28>; - downdifferential = <0x14>; - system-status-freq = <0x01 0x80e80 0x08 0x6ddd0 0x02 0x2f5d0 0x20 0x6ddd0 0x1000 0x80e80 0x4000 0xa2990 0x2000 0xa2990>; - auto-min-freq = <0x50140>; - auto-freq-en = <0x01>; - #cooling-cells = <0x02>; - status = "okay"; - center-supply = <0x0e>; - phandle = <0xab>; - - ddr_power_model { - compatible = "ddr_power_model"; - dynamic-power-coefficient = <0x78>; - static-power-coefficient = <0xc8>; - ts = <0x7d00 0x125c 0xffffffb0 0x02>; - thermal-zone = "soc-thermal"; - phandle = <0x115>; - }; - }; - - dmc-opp-table { - compatible = "operating-points-v2"; - rockchip,max-volt = <0x118c30>; - rockchip,evb-irdrop = <0x61a8>; - rockchip,pvtm-voltage-sel = <0x00 0xc350 0x00 0xc351 0xd2f0 0x01 0xd2f1 0xea60 0x02 0xea61 0x1869f 0x03>; - rockchip,pvtm-ch = <0x00 0x00>; - phandle = <0xae>; - - opp-528000000 { - opp-hz = <0x00 0x1f78a400>; - opp-microvolt = <0xee098>; - opp-microvolt-L0 = <0xee098>; - opp-microvolt-L1 = <0xee098>; - opp-microvolt-L2 = <0xe7ef0>; - opp-microvolt-L3 = <0xe7ef0>; - }; - - opp-666000000 { - opp-hz = <0x00 0x27b25a80>; - opp-microvolt = <0x100590>; - opp-microvolt-L0 = <0x100590>; - opp-microvolt-L1 = <0xf4240>; - opp-microvolt-L2 = <0xee098>; - opp-microvolt-L3 = <0xe7ef0>; - }; - - opp-786000000 { - opp-hz = <0x00 0x2ed96880>; - opp-microvolt = <0x10c8e0>; - opp-microvolt-L0 = <0x10c8e0>; - opp-microvolt-L1 = <0x100590>; - opp-microvolt-L2 = <0xfa3e8>; - opp-microvolt-L3 = <0xf4240>; - status = "okay"; - }; - }; - - rockchip-system-monitor { - compatible = "rockchip,system-monitor"; - rockchip,thermal-zone = "soc-thermal"; - rockchip,polling-delay = <0xc8>; - phandle = <0x116>; - }; - - pinctrl { - compatible = "rockchip,px30-pinctrl"; - rockchip,grf = <0x2f>; - rockchip,pmu = <0xac>; - #address-cells = <0x02>; - #size-cells = <0x02>; - ranges; - phandle = <0x117>; - - gpio0@ff040000 { - compatible = "rockchip,gpio-bank"; - reg = <0x00 0xff040000 0x00 0x100>; - interrupts = <0x00 0x03 0x04>; - clocks = <0x2a 0x14>; - gpio-controller; - #gpio-cells = <0x02>; - interrupt-controller; - #interrupt-cells = <0x02>; - phandle = <0x5c>; - }; - - gpio1@ff250000 { - compatible = "rockchip,gpio-bank"; - reg = <0x00 0xff250000 0x00 0x100>; - interrupts = <0x00 0x04 0x04>; - clocks = <0x02 0x15c>; - gpio-controller; - #gpio-cells = <0x02>; - interrupt-controller; - #interrupt-cells = <0x02>; - phandle = <0xbf>; - }; - - gpio2@ff260000 { - compatible = "rockchip,gpio-bank"; - reg = <0x00 0xff260000 0x00 0x100>; - interrupts = <0x00 0x05 0x04>; - clocks = <0x02 0x15d>; - gpio-controller; - #gpio-cells = <0x02>; - interrupt-controller; - #interrupt-cells = <0x02>; - phandle = <0x66>; - }; - - gpio3@ff270000 { - compatible = "rockchip,gpio-bank"; - reg = <0x00 0xff270000 0x00 0x100>; - interrupts = <0x00 0x06 0x04>; - clocks = <0x02 0x15e>; - gpio-controller; - #gpio-cells = <0x02>; - interrupt-controller; - #interrupt-cells = <0x02>; - phandle = <0x97>; - }; - - pcfg-pull-up { - bias-pull-up; - phandle = <0xb2>; - }; - - pcfg-pull-down { - bias-pull-down; - phandle = <0x118>; - }; - - pcfg-pull-none { - bias-disable; - phandle = <0xb1>; - }; - - pcfg-pull-none-2ma { - bias-disable; - drive-strength = <0x02>; - phandle = <0x119>; - }; - - pcfg-pull-up-2ma { - bias-pull-up; - drive-strength = <0x02>; - phandle = <0x11a>; - }; - - pcfg-pull-up-4ma { - bias-pull-up; - drive-strength = <0x04>; - phandle = <0xb3>; - }; - - pcfg-pull-none-4ma { - bias-disable; - drive-strength = <0x04>; - phandle = <0x11b>; - }; - - pcfg-pull-down-4ma { - bias-pull-down; - drive-strength = <0x04>; - phandle = <0x11c>; - }; - - pcfg-pull-none-8ma { - bias-disable; - drive-strength = <0x08>; - phandle = <0xb6>; - }; - - pcfg-pull-up-8ma { - bias-pull-up; - drive-strength = <0x08>; - phandle = <0xb4>; - }; - - pcfg-pull-none-12ma { - bias-disable; - drive-strength = <0x0c>; - phandle = <0xb8>; - }; - - pcfg-pull-up-12ma { - bias-pull-up; - drive-strength = <0x0c>; - phandle = <0xb7>; - }; - - pcfg-pull-none-smt { - bias-disable; - input-schmitt-enable; - phandle = <0xb0>; - }; - - pcfg-output-high { - output-high; - phandle = <0x11d>; - }; - - pcfg-output-low { - output-low; - phandle = <0xb9>; - }; - - pcfg-input-high { - bias-pull-up; - input-enable; - phandle = <0xb5>; - }; - - pcfg-input { - input-enable; - phandle = <0x11e>; - }; - - i2c0 { - - i2c0-xfer { - rockchip,pins = <0x00 0x08 0x01 0xb0 0x00 0x09 0x01 0xb0>; - phandle = <0x5b>; - }; - }; - - i2c1 { - - i2c1-xfer { - rockchip,pins = <0x00 0x12 0x01 0xb0 0x00 0x13 0x01 0xb0>; - phandle = <0x69>; - }; - }; - - i2c2 { - - i2c2-xfer { - rockchip,pins = <0x02 0x0f 0x02 0xb0 0x02 0x10 0x02 0xb0>; - phandle = <0x6a>; - }; - }; - - i2c3 { - - i2c3-xfer { - rockchip,pins = <0x01 0x0c 0x04 0xb0 0x01 0x0d 0x04 0xb0>; - phandle = <0x6b>; - }; - }; - - tsadc { - - tsadc-otp-gpio { - rockchip,pins = <0x00 0x06 0x00 0xb1>; - phandle = <0x86>; - }; - - tsadc-otp-out { - rockchip,pins = <0x00 0x06 0x01 0xb1>; - phandle = <0x87>; - }; - }; - - uart0 { - - uart0-xfer { - rockchip,pins = <0x00 0x0a 0x01 0xb2 0x00 0x0b 0x01 0xb2>; - phandle = <0x2c>; - }; - - uart0-cts { - rockchip,pins = <0x00 0x0c 0x01 0xb1>; - phandle = <0x2d>; - }; - - uart0-rts { - rockchip,pins = <0x00 0x0d 0x01 0xb1>; - phandle = <0x2e>; - }; - - uart0-rts-gpio { - rockchip,pins = <0x00 0x0d 0x00 0xb1>; - phandle = <0x11f>; - }; - }; - - uart1 { - - uart1-xfer { - rockchip,pins = <0x01 0x11 0x01 0xb2 0x01 0x10 0x01 0xb2>; - phandle = <0x4f>; - }; - - uart1-cts { - rockchip,pins = <0x01 0x12 0x01 0xb1>; - phandle = <0x50>; - }; - - uart1-rts { - rockchip,pins = <0x01 0x13 0x01 0xb1>; - phandle = <0x120>; - }; - - uart1-rts-gpio { - rockchip,pins = <0x01 0x13 0x00 0xb1>; - phandle = <0x121>; - }; - }; - - uart2-m0 { - - uart2m0-xfer { - rockchip,pins = <0x01 0x1a 0x02 0xb2 0x01 0x1b 0x02 0xb2>; - phandle = <0x51>; - }; - }; - - uart2-m1 { - - uart2m1-xfer { - rockchip,pins = <0x02 0x0c 0x02 0xb2 0x02 0x0e 0x02 0xb2>; - phandle = <0xba>; - }; - }; - - uart3-m0 { - - uart3m0-xfer { - rockchip,pins = <0x00 0x10 0x02 0xb2 0x00 0x11 0x02 0xb2>; - phandle = <0x122>; - }; - - uart3m0-cts { - rockchip,pins = <0x00 0x12 0x02 0xb1>; - phandle = <0x123>; - }; - - uart3m0-rts { - rockchip,pins = <0x00 0x13 0x02 0xb1>; - phandle = <0x124>; - }; - - uart3m0-rts-gpio { - rockchip,pins = <0x00 0x13 0x00 0xb1>; - phandle = <0x125>; - }; - }; - - uart3-m1 { - - uart3m1-xfer { - rockchip,pins = <0x01 0x0e 0x02 0xb2 0x01 0x0f 0x02 0xb2>; - phandle = <0x52>; - }; - - uart3m1-cts { - rockchip,pins = <0x01 0x0c 0x02 0xb1>; - phandle = <0x53>; - }; - - uart3m1-rts { - rockchip,pins = <0x01 0x0d 0x02 0xb1>; - phandle = <0x54>; - }; - - uart3m1-rts-gpio { - rockchip,pins = <0x01 0x0d 0x00 0xb1>; - phandle = <0x126>; - }; - }; - - uart4 { - - uart4-xfer { - rockchip,pins = <0x01 0x1c 0x02 0xb2 0x01 0x1d 0x02 0xb2>; - phandle = <0x55>; - }; - - uart4-cts { - rockchip,pins = <0x01 0x1e 0x02 0xb1>; - phandle = <0x56>; - }; - - uart4-rts { - rockchip,pins = <0x01 0x1f 0x02 0xb1>; - phandle = <0x57>; - }; - }; - - uart5 { - - uart5-xfer { - rockchip,pins = <0x03 0x02 0x04 0xb2 0x03 0x01 0x04 0xb2>; - phandle = <0x58>; - }; - - uart5-cts { - rockchip,pins = <0x03 0x03 0x04 0xb1>; - phandle = <0x59>; - }; - - uart5-rts { - rockchip,pins = <0x03 0x05 0x04 0xb1>; - phandle = <0x5a>; - }; - }; - - spi0 { - - spi0-clk { - rockchip,pins = <0x01 0x0f 0x03 0xb3>; - phandle = <0x6c>; - }; - - spi0-csn { - rockchip,pins = <0x01 0x0e 0x03 0xb3>; - phandle = <0x6d>; - }; - - spi0-miso { - rockchip,pins = <0x01 0x0d 0x03 0xb3>; - phandle = <0x6e>; - }; - - spi0-mosi { - rockchip,pins = <0x01 0x0c 0x03 0xb3>; - phandle = <0x6f>; - }; - - spi0-clk-hs { - rockchip,pins = <0x01 0x0f 0x03 0xb4>; - phandle = <0x70>; - }; - - spi0-miso-hs { - rockchip,pins = <0x01 0x0d 0x03 0xb4>; - phandle = <0x71>; - }; - - spi0-mosi-hs { - rockchip,pins = <0x01 0x0c 0x03 0xb4>; - phandle = <0x72>; - }; - }; - - spi1 { - - spi1-clk { - rockchip,pins = <0x03 0x0f 0x04 0xb3>; - phandle = <0x73>; - }; - - spi1-csn0 { - rockchip,pins = <0x03 0x09 0x04 0xb3>; - phandle = <0x74>; - }; - - spi1-csn1 { - rockchip,pins = <0x03 0x0a 0x02 0xb3>; - phandle = <0x75>; - }; - - spi1-miso { - rockchip,pins = <0x03 0x0e 0x04 0xb3>; - phandle = <0x76>; - }; - - spi1-mosi { - rockchip,pins = <0x03 0x0c 0x04 0xb3>; - phandle = <0x77>; - }; - - spi1-clk-hs { - rockchip,pins = <0x03 0x0f 0x04 0xb4>; - phandle = <0x78>; - }; - - spi1-miso-hs { - rockchip,pins = <0x03 0x0e 0x04 0xb4>; - phandle = <0x79>; - }; - - spi1-mosi-hs { - rockchip,pins = <0x03 0x0c 0x04 0xb4>; - phandle = <0x7a>; - }; - }; - - pdm { - - pdm-clk0m0 { - rockchip,pins = <0x03 0x16 0x02 0xb1>; - phandle = <0x44>; - }; - - pdm-clk0m1 { - rockchip,pins = <0x02 0x16 0x01 0xb1>; - phandle = <0x127>; - }; - - pdm-clk1 { - rockchip,pins = <0x03 0x17 0x02 0xb1>; - phandle = <0x45>; - }; - - pdm-sdi0m0 { - rockchip,pins = <0x03 0x1b 0x02 0xb1>; - phandle = <0x46>; - }; - - pdm-sdi0m1 { - rockchip,pins = <0x02 0x15 0x02 0xb1>; - phandle = <0x128>; - }; - - pdm-sdi1 { - rockchip,pins = <0x03 0x18 0x02 0xb1>; - phandle = <0x47>; - }; - - pdm-sdi2 { - rockchip,pins = <0x03 0x19 0x02 0xb1>; - phandle = <0x48>; - }; - - pdm-sdi3 { - rockchip,pins = <0x03 0x1a 0x02 0xb1>; - phandle = <0x49>; - }; - - pdm-clk0m0-sleep { - rockchip,pins = <0x03 0x16 0x00 0xb5>; - phandle = <0x129>; - }; - - pdm-clk0m1-sleep { - rockchip,pins = <0x02 0x16 0x00 0xb5>; - phandle = <0x12a>; - }; - - pdm-clk1-sleep { - rockchip,pins = <0x03 0x17 0x00 0xb5>; - phandle = <0x12b>; - }; - - pdm-sdi0m0-sleep { - rockchip,pins = <0x03 0x1b 0x00 0xb5>; - phandle = <0x12c>; - }; - - pdm-sdi0m1-sleep { - rockchip,pins = <0x02 0x15 0x00 0xb5>; - phandle = <0x12d>; - }; - - pdm-sdi1-sleep { - rockchip,pins = <0x03 0x18 0x00 0xb5>; - phandle = <0x12e>; - }; - - pdm-sdi2-sleep { - rockchip,pins = <0x03 0x19 0x00 0xb5>; - phandle = <0x12f>; - }; - - pdm-sdi3-sleep { - rockchip,pins = <0x03 0x1a 0x00 0xb5>; - phandle = <0x130>; - }; - }; - - i2s0 { - - i2s0-8ch-mclk { - rockchip,pins = <0x03 0x11 0x02 0xb1>; - phandle = <0x131>; - }; - - i2s0-8ch-sclktx { - rockchip,pins = <0x03 0x13 0x02 0xb1>; - phandle = <0x30>; - }; - - i2s0-8ch-sclkrx { - rockchip,pins = <0x03 0x0c 0x02 0xb1>; - phandle = <0x31>; - }; - - i2s0-8ch-lrcktx { - rockchip,pins = <0x03 0x12 0x02 0xb1>; - phandle = <0x32>; - }; - - i2s0-8ch-lrckrx { - rockchip,pins = <0x03 0x0d 0x02 0xb1>; - phandle = <0x33>; - }; - - i2s0-8ch-sdo0 { - rockchip,pins = <0x03 0x14 0x02 0xb1>; - phandle = <0x38>; - }; - - i2s0-8ch-sdo1 { - rockchip,pins = <0x03 0x10 0x02 0xb1>; - phandle = <0x39>; - }; - - i2s0-8ch-sdo2 { - rockchip,pins = <0x03 0x0f 0x02 0xb1>; - phandle = <0x3a>; - }; - - i2s0-8ch-sdo3 { - rockchip,pins = <0x03 0x0e 0x02 0xb1>; - phandle = <0x3b>; - }; - - i2s0-8ch-sdi0 { - rockchip,pins = <0x03 0x15 0x02 0xb1>; - phandle = <0x34>; - }; - - i2s0-8ch-sdi1 { - rockchip,pins = <0x03 0x0b 0x02 0xb1>; - phandle = <0x35>; - }; - - i2s0-8ch-sdi2 { - rockchip,pins = <0x03 0x09 0x02 0xb1>; - phandle = <0x36>; - }; - - i2s0-8ch-sdi3 { - rockchip,pins = <0x03 0x08 0x02 0xb1>; - phandle = <0x37>; - }; - }; - - i2s1 { - - i2s1-2ch-mclk { - rockchip,pins = <0x02 0x13 0x01 0xb1>; - phandle = <0x68>; - }; - - i2s1-2ch-sclk { - rockchip,pins = <0x02 0x12 0x01 0xb1>; - phandle = <0x3c>; - }; - - i2s1-2ch-lrck { - rockchip,pins = <0x02 0x11 0x01 0xb1>; - phandle = <0x3d>; - }; - - i2s1-2ch-sdi { - rockchip,pins = <0x02 0x15 0x01 0xb1>; - phandle = <0x3e>; - }; - - i2s1-2ch-sdo { - rockchip,pins = <0x02 0x14 0x01 0xb1>; - phandle = <0x3f>; - }; - }; - - i2s2 { - - i2s2-2ch-mclk { - rockchip,pins = <0x03 0x01 0x02 0xb1>; - phandle = <0x132>; - }; - - i2s2-2ch-sclk { - rockchip,pins = <0x03 0x02 0x02 0xb1>; - phandle = <0x40>; - }; - - i2s2-2ch-lrck { - rockchip,pins = <0x03 0x03 0x02 0xb1>; - phandle = <0x41>; - }; - - i2s2-2ch-sdi { - rockchip,pins = <0x03 0x05 0x02 0xb1>; - phandle = <0x42>; - }; - - i2s2-2ch-sdo { - rockchip,pins = <0x03 0x07 0x02 0xb1>; - phandle = <0x43>; - }; - }; - - sdmmc { - - sdmmc-clk { - rockchip,pins = <0x01 0x1e 0x01 0xb6>; - phandle = <0x8f>; - }; - - sdmmc-cmd { - rockchip,pins = <0x01 0x1f 0x01 0xb4>; - phandle = <0x90>; - }; - - sdmmc-det { - rockchip,pins = <0x00 0x03 0x01 0xb4>; - phandle = <0x91>; - }; - - sdmmc-bus1 { - rockchip,pins = <0x01 0x1a 0x01 0xb4>; - phandle = <0x133>; - }; - - sdmmc-bus4 { - rockchip,pins = <0x01 0x1a 0x01 0xb4 0x01 0x1b 0x01 0xb4 0x01 0x1c 0x01 0xb4 0x01 0x1d 0x01 0xb4>; - phandle = <0x92>; - }; - - sdmmc-gpio { - rockchip,pins = <0x01 0x1a 0x00 0xb3 0x01 0x1b 0x00 0xb3 0x01 0x1c 0x00 0xb3 0x01 0x1d 0x00 0xb3 0x01 0x1e 0x00 0xb3 0x01 0x1f 0x00 0xb3>; - phandle = <0x134>; - }; - }; - - sdio { - - sdio-clk { - rockchip,pins = <0x01 0x15 0x01 0xb1>; - phandle = <0x96>; - }; - - sdio-cmd { - rockchip,pins = <0x01 0x14 0x01 0xb2>; - phandle = <0x95>; - }; - - sdio-bus4 { - rockchip,pins = <0x01 0x16 0x01 0xb2 0x01 0x17 0x01 0xb2 0x01 0x18 0x01 0xb2 0x01 0x19 0x01 0xb2>; - phandle = <0x94>; - }; - - sdio-gpio { - rockchip,pins = <0x01 0x16 0x00 0xb2 0x01 0x17 0x00 0xb2 0x01 0x18 0x00 0xb2 0x01 0x19 0x00 0xb2 0x01 0x14 0x00 0xb2 0x01 0x15 0x00 0xb2>; - phandle = <0x135>; - }; - }; - - emmc { - - emmc-clk { - rockchip,pins = <0x01 0x09 0x02 0xb6>; - phandle = <0x136>; - }; - - emmc-cmd { - rockchip,pins = <0x01 0x0a 0x02 0xb4>; - phandle = <0x137>; - }; - - emmc-pwren { - rockchip,pins = <0x01 0x08 0x02 0xb1>; - phandle = <0x138>; - }; - - emmc-rstnout { - rockchip,pins = <0x01 0x0b 0x02 0xb1>; - phandle = <0x139>; - }; - - emmc-bus1 { - rockchip,pins = <0x01 0x00 0x02 0xb4>; - phandle = <0x13a>; - }; - - emmc-bus4 { - rockchip,pins = <0x01 0x00 0x02 0xb4 0x01 0x01 0x02 0xb4 0x01 0x02 0x02 0xb4 0x01 0x03 0x02 0xb4>; - phandle = <0x13b>; - }; - - emmc-bus8 { - rockchip,pins = <0x01 0x00 0x02 0xb4 0x01 0x01 0x02 0xb4 0x01 0x02 0x02 0xb4 0x01 0x03 0x02 0xb4 0x01 0x04 0x02 0xb4 0x01 0x05 0x02 0xb4 0x01 0x06 0x02 0xb4 0x01 0x07 0x02 0xb4>; - phandle = <0x13c>; - }; - }; - - flash { - - flash-cs0 { - rockchip,pins = <0x01 0x08 0x01 0xb1>; - phandle = <0x13d>; - }; - - flash-rdy { - rockchip,pins = <0x01 0x09 0x01 0xb1>; - phandle = <0x13e>; - }; - - flash-dqs { - rockchip,pins = <0x01 0x0a 0x01 0xb1>; - phandle = <0x13f>; - }; - - flash-ale { - rockchip,pins = <0x01 0x0b 0x01 0xb1>; - phandle = <0x140>; - }; - - flash-cle { - rockchip,pins = <0x01 0x0c 0x01 0xb1>; - phandle = <0x141>; - }; - - flash-wrn { - rockchip,pins = <0x01 0x0d 0x01 0xb1>; - phandle = <0x142>; - }; - - flash-csl { - rockchip,pins = <0x01 0x0e 0x01 0xb1>; - phandle = <0x143>; - }; - - flash-rdn { - rockchip,pins = <0x01 0x0f 0x01 0xb1>; - phandle = <0x144>; - }; - - flash-bus8 { - rockchip,pins = <0x01 0x00 0x01 0xb7 0x01 0x01 0x01 0xb7 0x01 0x02 0x01 0xb7 0x01 0x03 0x01 0xb7 0x01 0x04 0x01 0xb7 0x01 0x05 0x01 0xb7 0x01 0x06 0x01 0xb7 0x01 0x07 0x01 0xb7>; - phandle = <0x145>; - }; - }; - - lcdc { - - lcdc-m0-rgb-pins { - rockchip,pins = <0x03 0x00 0x01 0xb6 0x03 0x01 0x01 0xb6 0x03 0x02 0x01 0xb6 0x03 0x03 0x01 0xb6 0x03 0x04 0x01 0xb6 0x03 0x05 0x01 0xb6 0x03 0x06 0x01 0xb6 0x03 0x07 0x01 0xb6 0x03 0x08 0x01 0xb6 0x03 0x09 0x01 0xb6 0x03 0x0a 0x01 0xb6 0x03 0x0b 0x01 0xb6 0x03 0x0c 0x01 0xb6 0x03 0x0d 0x01 0xb6 0x03 0x0e 0x01 0xb6 0x03 0x0f 0x01 0xb6 0x03 0x10 0x01 0xb6 0x03 0x11 0x01 0xb6 0x03 0x12 0x01 0xb6 0x03 0x13 0x01 0xb6 0x03 0x14 0x01 0xb6 0x03 0x15 0x01 0xb6 0x03 0x16 0x01 0xb6 0x03 0x17 0x01 0xb6 0x03 0x18 0x01 0xb6 0x03 0x19 0x01 0xb6 0x03 0x1a 0x01 0xb6 0x03 0x1b 0x01 0xb6>; - phandle = <0x146>; - }; - - lcdc-m0-sleep-pins { - rockchip,pins = <0x03 0x00 0x00 0xb1 0x03 0x01 0x00 0xb1 0x03 0x02 0x00 0xb1 0x03 0x03 0x00 0xb1 0x03 0x04 0x00 0xb1 0x03 0x05 0x00 0xb1 0x03 0x06 0x00 0xb1 0x03 0x07 0x00 0xb1 0x03 0x08 0x00 0xb1 0x03 0x09 0x00 0xb1 0x03 0x0a 0x00 0xb1 0x03 0x0b 0x00 0xb1 0x03 0x0c 0x00 0xb1 0x03 0x0d 0x00 0xb1 0x03 0x0e 0x00 0xb1 0x03 0x0f 0x00 0xb1 0x03 0x10 0x00 0xb1 0x03 0x11 0x00 0xb1 0x03 0x12 0x00 0xb1 0x03 0x13 0x00 0xb1 0x03 0x14 0x00 0xb1 0x03 0x15 0x00 0xb1 0x03 0x16 0x00 0xb1 0x03 0x17 0x00 0xb1 0x03 0x18 0x00 0xb1 0x03 0x19 0x00 0xb1 0x03 0x1a 0x00 0xb1 0x03 0x1b 0x00 0xb1>; - phandle = <0x147>; - }; - - lcdc-m1-rgb-pins { - rockchip,pins = <0x03 0x00 0x01 0xb6 0x03 0x04 0x01 0xb6 0x03 0x06 0x01 0xb6 0x03 0x0a 0x01 0xb6 0x03 0x0b 0x01 0xb6 0x03 0x0d 0x01 0xb6 0x03 0x10 0x01 0xb6 0x03 0x11 0x01 0xb6 0x03 0x12 0x01 0xb6 0x03 0x13 0x01 0xb6 0x03 0x14 0x01 0xb6 0x03 0x15 0x01 0xb6 0x03 0x16 0x01 0xb6 0x03 0x17 0x01 0xb6 0x03 0x18 0x01 0xb6 0x03 0x19 0x01 0xb6 0x03 0x1a 0x01 0xb6 0x03 0x1b 0x01 0xb6>; - phandle = <0x4d>; - }; - - lcdc-m1-sleep-pins { - rockchip,pins = <0x03 0x00 0x00 0xb1 0x03 0x04 0x00 0xb1 0x03 0x06 0x00 0xb1 0x03 0x0a 0x00 0xb1 0x03 0x0b 0x00 0xb1 0x03 0x0d 0x00 0xb1 0x03 0x10 0x00 0xb1 0x03 0x11 0x00 0xb1 0x03 0x12 0x00 0xb1 0x03 0x13 0x00 0xb1 0x03 0x14 0x00 0xb1 0x03 0x15 0x00 0xb1 0x03 0x16 0x00 0xb1 0x03 0x17 0x00 0xb1 0x03 0x18 0x00 0xb1 0x03 0x19 0x00 0xb1 0x03 0x1a 0x00 0xb1 0x03 0x1b 0x00 0xb1>; - phandle = <0x4e>; - }; - }; - - pwm0 { - - pwm0-pin { - rockchip,pins = <0x00 0x0f 0x01 0xb1>; - phandle = <0x7b>; - }; - }; - - pwm1 { - - pwm1-pin { - rockchip,pins = <0x00 0x10 0x01 0xb1>; - phandle = <0x7c>; - }; - }; - - pwm2 { - - pwm2-pin { - rockchip,pins = <0x02 0x0d 0x01 0xb1>; - phandle = <0x7d>; - }; - }; - - pwm3 { - - pwm3-pin { - rockchip,pins = <0x00 0x11 0x01 0xb1>; - phandle = <0x7e>; - }; - }; - - pwm4 { - - pwm4-pin { - rockchip,pins = <0x03 0x12 0x03 0xb1>; - phandle = <0x7f>; - }; - }; - - pwm5 { - - pwm5-pin { - rockchip,pins = <0x03 0x13 0x03 0xb1>; - phandle = <0x80>; - }; - }; - - pwm6 { - - pwm6-pin { - rockchip,pins = <0x03 0x14 0x03 0xb1>; - phandle = <0x81>; - }; - }; - - pwm7 { - - pwm7-pin { - rockchip,pins = <0x03 0x15 0x03 0xb1>; - phandle = <0x82>; - }; - }; - - gmac { - - rmii-pins { - rockchip,pins = <0x02 0x00 0x02 0xb8 0x02 0x01 0x02 0xb8 0x02 0x02 0x02 0xb8 0x02 0x03 0x02 0xb1 0x02 0x04 0x02 0xb1 0x02 0x05 0x02 0xb1 0x02 0x06 0x02 0xb1 0x02 0x07 0x02 0xb1 0x02 0x09 0x02 0xb1>; - phandle = <0x8d>; - }; - - mac-refclk-12ma { - rockchip,pins = <0x02 0x0a 0x02 0xb8>; - phandle = <0x8e>; - }; - - mac-refclk { - rockchip,pins = <0x02 0x0a 0x02 0xb1>; - phandle = <0x148>; - }; - }; - - cif-m0 { - - cif-clkout-m0 { - rockchip,pins = <0x02 0x0b 0x01 0xb8>; - phandle = <0xa7>; - }; - - dvp-d2d9-m0 { - rockchip,pins = <0x02 0x00 0x01 0xb1 0x02 0x01 0x01 0xb1 0x02 0x02 0x01 0xb1 0x02 0x03 0x01 0xb1 0x02 0x04 0x01 0xb1 0x02 0x05 0x01 0xb1 0x02 0x06 0x01 0xb1 0x02 0x07 0x01 0xb1 0x02 0x08 0x01 0xb1 0x02 0x09 0x01 0xb1 0x02 0x0a 0x01 0xb1 0x02 0x0b 0x01 0xb1>; - phandle = <0xa5>; - }; - - dvp-d0d1-m0 { - rockchip,pins = <0x02 0x0c 0x01 0xb1 0x02 0x0e 0x01 0xb1>; - phandle = <0xa9>; - }; - - d10-d11-m0 { - rockchip,pins = <0x02 0x0f 0x01 0xb1 0x02 0x10 0x01 0xb1>; - phandle = <0xa8>; - }; - }; - - cif-m1 { - - cif-clkout-m1 { - rockchip,pins = <0x03 0x18 0x03 0xb1>; - phandle = <0x149>; - }; - - dvp-d2d9-m1 { - rockchip,pins = <0x03 0x03 0x03 0xb1 0x03 0x05 0x03 0xb1 0x03 0x07 0x03 0xb1 0x03 0x08 0x03 0xb1 0x03 0x09 0x03 0xb1 0x03 0x0c 0x03 0xb1 0x03 0x0e 0x03 0xb1 0x03 0x0f 0x03 0xb1 0x03 0x19 0x03 0xb1 0x03 0x1a 0x03 0xb1 0x03 0x1b 0x03 0xb1 0x03 0x18 0x03 0xb1>; - phandle = <0x14a>; - }; - - dvp-d0d1-m1 { - rockchip,pins = <0x03 0x01 0x03 0xb1 0x03 0x02 0x03 0xb1>; - phandle = <0x14b>; - }; - - d10-d11-m1 { - rockchip,pins = <0x03 0x16 0x03 0xb1 0x03 0x17 0x03 0xb1>; - phandle = <0x14c>; - }; - }; - - isp { - - isp-prelight { - rockchip,pins = <0x03 0x19 0x04 0xb1>; - phandle = <0x14d>; - }; - }; - - pmic { - - pmic_int { - rockchip,pins = <0x00 0x0a 0x00 0xb2 0x00 0x0b 0x00 0xb1>; - phandle = <0x5d>; - }; - - soc_slppin_gpio { - rockchip,pins = <0x00 0x04 0x00 0xb9>; - phandle = <0x60>; - }; - - soc_slppin_slp { - rockchip,pins = <0x00 0x04 0x01 0xb1>; - phandle = <0x5e>; - }; - - soc_slppin_rst { - rockchip,pins = <0x00 0x04 0x02 0xb1>; - phandle = <0x62>; - }; - }; - - leds { - - led-pins { - rockchip,pins = <0x00 0x11 0x00 0xb1>; - phandle = <0xc0>; - }; - }; - - btns { - - btn-pins { - rockchip,pins = <0x01 0x0c 0x00 0xb2 0x01 0x0d 0x00 0xb2 0x01 0x0e 0x00 0xb2 0x01 0x0f 0x00 0xb2 0x01 0x02 0x00 0xb2 0x01 0x05 0x00 0xb2 0x01 0x06 0x00 0xb2 0x01 0x07 0x00 0xb2 0x02 0x00 0x00 0xb2 0x02 0x01 0x00 0xb2 0x02 0x02 0x00 0xb2 0x02 0x03 0x00 0xb2 0x02 0x04 0x00 0xb2 0x02 0x05 0x00 0xb2 0x02 0x06 0x00 0xb2 0x02 0x07 0x00 0xb2 0x03 0x09 0x00 0xb2 0x03 0x0a 0x00 0xb2 0x03 0x0c 0x00 0xb2 0x03 0x0f 0x00 0xb2>; - phandle = <0xbd>; - }; - }; - }; - - chosen { - bootargs = [00]; - }; - - fiq-debugger { - compatible = "rockchip,fiq-debugger"; - rockchip,serial-id = <0x02>; - rockchip,wake-irq = <0x00>; - rockchip,irq-mode-enable = <0x00>; - rockchip,baudrate = <0x1c200>; - interrupts = <0x00 0x7f 0x08>; - pinctrl-names = "default"; - pinctrl-0 = <0xba>; - status = "okay"; - }; - - ramoops { - compatible = "ramoops"; - record-size = <0x00 0x20000>; - console-size = <0x00 0x80000>; - ftrace-size = <0x00 0x00>; - pmsg-size = <0x00 0x00>; - memory-region = <0xbb>; - }; - - reserved-memory { - #address-cells = <0x02>; - #size-cells = <0x02>; - ranges; - - drm-logo@00000000 { - compatible = "rockchip,drm-logo"; - reg = <0x00 0x00 0x00 0x00>; - phandle = <0x11>; - }; - - region@110000 { - reg = <0x00 0x110000 0x00 0xf0000>; - reg-names = "ramoops_mem"; - phandle = <0xbb>; - }; - }; - - odroidgo3-keys { - compatible = "gpio-keys"; - #address-cells = <0x01>; - #size-cells = <0x00>; - autorepeat; - phandle = <0x14e>; - - button@0 { - label = "GPIO BTN-VOLUP"; - linux,code = <0x73>; - gpios = <0x66 0x00 0x01>; - }; - - button@1 { - label = "GPIO BTN-VOLDN"; - linux,code = <0x72>; - gpios = <0x66 0x01 0x01>; - }; - }; - - odroidgo3-joypad { - compatible = "odroidgo3-joypad"; - pwms = <0xbc 0x00 0xbebc200 0x00>; - pwm-names = "enable"; - rumble-boost-weak = <0x00>; - rumble-boost-strong = <0x00>; - joypad-name = "GO-Super Gamepad"; - joypad-product = <0x1100>; - joypad-revision = <0x100>; - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <0xbd>; - pinctrl-1 = <0x7b>; - io-channel-names = "amux_adc"; - io-channels = <0xbe 0x01>; - amux-count = <0x04>; - amux-a-gpios = <0x97 0x0b 0x01>; - amux-b-gpios = <0x97 0x08 0x01>; - amux-en-gpios = <0x97 0x0d 0x01>; - button-adc-scale = <0x02>; - button-adc-deadzone = <0x40>; - button-adc-fuzz = <0x20>; - button-adc-flat = <0x20>; - abs_x-p-tuning = <0xc8>; - abs_x-n-tuning = <0xc8>; - abs_y-p-tuning = <0xc8>; - abs_y-n-tuning = <0xc8>; - abs_rx-p-tuning = <0xc8>; - abs_rx-n-tuning = <0xc8>; - abs_ry-p-tuning = <0xc8>; - abs_ry-n-tuning = <0xc8>; - poll-interval = <0x0a>; - invert-absx; - invert-absy; - phandle = <0x14f>; - - sw1 { - gpios = <0xbf 0x0c 0x01>; - label = "GPIO DPAD-UP"; - linux,code = <0x220>; - }; - - sw2 { - gpios = <0xbf 0x0d 0x01>; - label = "GPIO DPAD-DOWN"; - linux,code = <0x221>; - }; - - sw3 { - gpios = <0xbf 0x0e 0x01>; - label = "GPIO DPAD-LEFT"; - linux,code = <0x222>; - }; - - sw4 { - gpios = <0xbf 0x0f 0x01>; - label = "GPIO DPAD-RIGHT"; - linux,code = <0x223>; - }; - - sw5 { - gpios = <0xbf 0x02 0x01>; - label = "GPIO KEY BTN-A"; - linux,code = <0x131>; - }; - - sw6 { - gpios = <0xbf 0x05 0x01>; - label = "GPIO BTN-B"; - linux,code = <0x130>; - }; - - sw7 { - gpios = <0xbf 0x06 0x01>; - label = "GPIO BTN-Y"; - linux,code = <0x134>; - }; - - sw8 { - gpios = <0xbf 0x07 0x01>; - label = "GPIO BTN-X"; - linux,code = <0x133>; - }; - - sw11 { - gpios = <0x66 0x02 0x01>; - label = "GPIO F3"; - linux,code = <0x2c2>; - }; - - sw12 { - gpios = <0x66 0x03 0x01>; - label = "GPIO F4"; - linux,code = <0x2c3>; - }; - - sw15 { - gpios = <0x66 0x06 0x01>; - label = "GPIO TOP-LEFT"; - linux,code = <0x136>; - }; - - sw16 { - gpios = <0x66 0x07 0x01>; - label = "GPIO TOP-RIGHT"; - linux,code = <0x137>; - }; - - sw19 { - gpios = <0x97 0x09 0x01>; - label = "GPIO F1"; - linux,code = <0x2c0>; - }; - - sw20 { - gpios = <0x97 0x0f 0x01>; - label = "GPIO TOP-RIGHT2"; - linux,code = <0x139>; - }; - - sw21 { - gpios = <0x97 0x0a 0x01>; - label = "GPIO TOP-LEFT2"; - linux,code = <0x138>; - }; - - sw22 { - gpios = <0x97 0x0c 0x01>; - label = "GPIO F2"; - linux,code = <0x2c1>; - }; - - sw13 { - gpios = <0x66 0x04 0x01>; - label = "GPIO F5"; - linux,code = <0x2c4>; - }; - }; - - gpio_leds { - compatible = "gpio-leds"; - pinctrl-names = "led_pins"; - pinctrl-0 = <0xc0>; - phandle = <0x150>; - - heartbeat { - label = "blue:heartbeat"; - gpios = <0x5c 0x11 0x00>; - linux,default-trigger = "heartbeat"; - }; - }; - - backlight { - compatible = "pwm-backlight"; - pwms = <0xc1 0x00 0xf519 0x00>; - brightness-levels = <0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f 0x20 0x21 0x22 0x23 0x24 0x25 0x26 0x27 0x28 0x29 0x2a 0x2b 0x2c 0x2d 0x2e 0x2f 0x30 0x31 0x32 0x33 0x34 0x35 0x36 0x37 0x38 0x39 0x3a 0x3b 0x3c 0x3d 0x3e 0x3f 0x40 0x41 0x42 0x43 0x44 0x45 0x46 0x47 0x48 0x49 0x4a 0x4b 0x4c 0x4d 0x4e 0x4f 0x50 0x51 0x52 0x53 0x54 0x55 0x56 0x57 0x58 0x59 0x5a 0x5b 0x5c 0x5d 0x5e 0x5f 0x60 0x61 0x62 0x63 0x64 0x65 0x66 0x67 0x68 0x69 0x6a 0x6b 0x6c 0x6d 0x6e 0x6f 0x70 0x71 0x72 0x73 0x74 0x75 0x76 0x77 0x78 0x79 0x7a 0x7b 0x7c 0x7d 0x7e 0x7f 0x80 0x81 0x82 0x83 0x84 0x85 0x86 0x87 0x88 0x89 0x8a 0x8b 0x8c 0x8d 0x8e 0x8f 0x90 0x91 0x92 0x93 0x94 0x95 0x96 0x97 0x98 0x99 0x9a 0x9b 0x9c 0x9d 0x9e 0x9f 0xa0>; - default-brightness-level = <0x33>; - phandle = <0x9d>; - }; - - rk817-sound { - compatible = "simple-audio-card"; - simple-audio-card,format = "i2s"; - simple-audio-card,name = "rockchip,rk817-codec"; - simple-audio-card,mclk-fs = <0x100>; - simple-audio-card,widgets = "Microphone\0Mic Jack\0Headphone\0Headphone Jack"; - simple-audio-card,routing = "MIC_IN\0Mic Jack\0Headphone Jack\0HPOL\0Headphone Jack\0HPOR"; - simple-audio-card,hp-det-gpio = <0x66 0x16 0x01>; - simple-audio-card,codec-hp-det = <0x01>; - - simple-audio-card,cpu { - sound-dai = <0xc2>; - }; - - simple-audio-card,codec { - sound-dai = <0xc3>; - }; - }; - - vccsys { - compatible = "regulator-fixed"; - regulator-name = "vcc3v8_sys"; - regulator-always-on; - regulator-min-microvolt = <0x39fbc0>; - regulator-max-microvolt = <0x39fbc0>; - phandle = <0x64>; - }; - - __symbols__ { - ddr_timing = "/ddr_timing"; - cpu0 = "/cpus/cpu@0"; - cpu1 = "/cpus/cpu@1"; - cpu2 = "/cpus/cpu@2"; - cpu3 = "/cpus/cpu@3"; - CPU_SLEEP = "/cpus/idle-states/cpu-sleep"; - CLUSTER_SLEEP = "/cpus/idle-states/cluster-sleep"; - cpu0_opp_table = "/cpu0-opp-table"; - bus_soc = "/bus-soc"; - bus_apll = "/bus-apll"; - bus_apll_opp_table = "/bus-apll-opp-table"; - display_subsystem = "/display-subsystem"; - route_lvds = "/display-subsystem/route/route-lvds"; - route_dsi = "/display-subsystem/route/route-dsi"; - route_rgb = "/display-subsystem/route/route-rgb"; - gmac_clkin = "/external-gmac-clock"; - rockchip_suspend = "/rockchip-suspend"; - xin24m = "/xin24m"; - xin32k = "/xin32k"; - pmu = "/power-management@ff000000"; - power = "/power-management@ff000000/power-controller"; - pmugrf = "/syscon@ff010000"; - pmu_io_domains = "/syscon@ff010000/io-domains"; - pmu_pvtm = "/syscon@ff010000/pmu-pvtm"; - uart0 = "/serial@ff030000"; - i2s0_8ch = "/i2s@ff060000"; - i2s1_2ch = "/i2s@ff070000"; - i2s2_2ch = "/i2s@ff080000"; - pdm = "/pdm@ff0a0000"; - crypto = "/crypto@ff0b0000"; - rng = "/rng@ff0b0000"; - gic = "/interrupt-controller@ff131000"; - grf = "/syscon@ff140000"; - io_domains = "/syscon@ff140000/io-domains"; - lvds = "/syscon@ff140000/lvds"; - lvds_in_vopb = "/syscon@ff140000/lvds/ports/port@0/endpoint@0"; - rgb = "/syscon@ff140000/rgb"; - rgb_in_vopb = "/syscon@ff140000/rgb/ports/port@0/endpoint@0"; - core_grf = "/syscon@ff148000"; - pvtm = "/syscon@ff148000/pvtm"; - uart1 = "/serial@ff158000"; - uart2 = "/serial@ff160000"; - uart3 = "/serial@ff168000"; - uart4 = "/serial@ff170000"; - uart5 = "/serial@ff178000"; - i2c0 = "/i2c@ff180000"; - rk817 = "/i2c@ff180000/pmic@20"; - pinctrl_rk8xx = "/i2c@ff180000/pmic@20/pinctrl_rk8xx"; - rk817_ts_gpio1 = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_ts_gpio1"; - rk817_gt_gpio2 = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_gt_gpio2"; - rk817_pin_ts = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_pin_ts"; - rk817_pin_gt = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_pin_gt"; - rk817_slppin_null = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_slppin_null"; - rk817_slppin_slp = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_slppin_slp"; - rk817_slppin_pwrdn = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_slppin_pwrdn"; - rk817_slppin_rst = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_slppin_rst"; - vdd_logic = "/i2c@ff180000/pmic@20/regulators/DCDC_REG1"; - vdd_arm = "/i2c@ff180000/pmic@20/regulators/DCDC_REG2"; - vcc_ddr = "/i2c@ff180000/pmic@20/regulators/DCDC_REG3"; - vcc_3v3 = "/i2c@ff180000/pmic@20/regulators/DCDC_REG4"; - vcc_1v0 = "/i2c@ff180000/pmic@20/regulators/LDO_REG1"; - vcc1v8_soc = "/i2c@ff180000/pmic@20/regulators/LDO_REG2"; - vdd1v0_soc = "/i2c@ff180000/pmic@20/regulators/LDO_REG3"; - vcc3v3_pmu = "/i2c@ff180000/pmic@20/regulators/LDO_REG4"; - vccio_sd = "/i2c@ff180000/pmic@20/regulators/LDO_REG5"; - vcc_sd = "/i2c@ff180000/pmic@20/regulators/LDO_REG6"; - vcc_backlight = "/i2c@ff180000/pmic@20/regulators/LDO_REG7"; - vcc_lcd = "/i2c@ff180000/pmic@20/regulators/LDO_REG8"; - dcdc_boost = "/i2c@ff180000/pmic@20/regulators/BOOST"; - otg_switch = "/i2c@ff180000/pmic@20/regulators/OTG_SWITCH"; - rk817_codec = "/i2c@ff180000/pmic@20/codec"; - i2c1 = "/i2c@ff190000"; - i2c2 = "/i2c@ff1a0000"; - i2c3 = "/i2c@ff1b0000"; - spi0 = "/spi@ff1d0000"; - spi1 = "/spi@ff1d8000"; - wdt = "/watchdog@ff1e0000"; - pwm0 = "/pwm@ff200000"; - pwm1 = "/pwm@ff200010"; - pwm2 = "/pwm@ff200020"; - pwm3 = "/pwm@ff200030"; - pwm4 = "/pwm@ff208000"; - pwm5 = "/pwm@ff208010"; - pwm6 = "/pwm@ff208020"; - pwm7 = "/pwm@ff208030"; - rktimer = "/rktimer@ff210000"; - dmac = "/amba/dmac@ff240000"; - thermal_zones = "/thermal-zones"; - soc_thermal = "/thermal-zones/soc-thermal"; - threshold = "/thermal-zones/soc-thermal/trips/trip-point-0"; - target = "/thermal-zones/soc-thermal/trips/trip-point-1"; - soc_crit = "/thermal-zones/soc-thermal/trips/soc-crit"; - gpu_thermal = "/thermal-zones/gpu-thermal"; - tsadc = "/tsadc@ff280000"; - saradc = "/saradc@ff288000"; - otp = "/otp@ff290000"; - otp_id = "/otp@ff290000/id@7"; - cpu_leakage = "/otp@ff290000/cpu-leakage@17"; - performance = "/otp@ff290000/performance@1e"; - cru = "/clock-controller@ff2b0000"; - cpu_boost = "/cpu-boost@ff2b8000"; - pmucru = "/pmu-clock-controller@ff2bc000"; - usb2phy_grf = "/syscon@ff2c0000"; - u2phy = "/syscon@ff2c0000/usb2-phy@100"; - u2phy_host = "/syscon@ff2c0000/usb2-phy@100/host-port"; - u2phy_otg = "/syscon@ff2c0000/usb2-phy@100/otg-port"; - video_phy = "/video-phy@ff2e0000"; - mipi_dphy_rx0 = "/mipi-dphy-rx0@ff2f0000"; - usb20_otg = "/usb@ff300000"; - usb_host0_ehci = "/usb@ff340000"; - usb_host0_ohci = "/usb@ff350000"; - gmac = "/ethernet@ff360000"; - sdmmc = "/dwmmc@ff370000"; - sdio = "/dwmmc@ff380000"; - emmc = "/dwmmc@ff390000"; - nandc0 = "/nandc@ff3b0000"; - sfc = "/sfc@ff3a0000"; - gpu = "/gpu@ff400000"; - gpu_opp_table = "/gpu-opp-table"; - hevc = "/hevc_service@ff440000"; - vpu = "/vpu_service@ff442000"; - vpu_combo = "/vpu_combo"; - hevc_mmu = "/iommu@ff440440"; - vpu_mmu = "/iommu@ff442800"; - dsi = "/dsi@ff450000"; - dsi_in_vopb = "/dsi@ff450000/ports/port@0/endpoint@0"; - timing0 = "/dsi@ff450000/panel@0/display-timings/60Hz"; - timing1 = "/dsi@ff450000/panel@0/display-timings/50Hz"; - timing2 = "/dsi@ff450000/panel@0/display-timings/75Hz"; - vopb = "/vop@ff460000"; - vopb_out = "/vop@ff460000/port"; - vopb_out_lvds = "/vop@ff460000/port/endpoint@0"; - vopb_out_dsi = "/vop@ff460000/port/endpoint@1"; - vopb_out_rgb = "/vop@ff460000/port/endpoint@2"; - vopb_mmu = "/iommu@ff460f00"; - rk_rga = "/rk_rga@ff480000"; - cif = "/cif@ff490000"; - cif_new = "/cif-new@ff490000"; - vip_mmu = "/iommu@ff490800"; - rk_isp = "/rk_isp@ff4a0000"; - rkisp1 = "/rkisp1@ff4a0000"; - isp_mmu = "/iommu@ff4a8000"; - qos_gmac = "/qos@ff518000"; - qos_gpu = "/qos@ff520000"; - qos_sdmmc = "/qos@ff52c000"; - qos_emmc = "/qos@ff538000"; - qos_nand = "/qos@ff538080"; - qos_sdio = "/qos@ff538100"; - qos_sfc = "/qos@ff538180"; - qos_usb_host = "/qos@ff540000"; - qos_usb_otg = "/qos@ff540080"; - qos_isp_128 = "/qos@ff548000"; - qos_isp_rd = "/qos@ff548080"; - qos_isp_wr = "/qos@ff548100"; - qos_isp_m1 = "/qos@ff548180"; - qos_vip = "/qos@ff548200"; - qos_rga_rd = "/qos@ff550000"; - qos_rga_wr = "/qos@ff550080"; - qos_vop_m0 = "/qos@ff550100"; - qos_vop_m1 = "/qos@ff550180"; - qos_vpu = "/qos@ff558000"; - qos_vpu_r128 = "/qos@ff558080"; - dfi = "/dfi@ff610000"; - dmc = "/dmc"; - ddr_power_model = "/dmc/ddr_power_model"; - dmc_opp_table = "/dmc-opp-table"; - rockchip_system_monitor = "/rockchip-system-monitor"; - pinctrl = "/pinctrl"; - gpio0 = "/pinctrl/gpio0@ff040000"; - gpio1 = "/pinctrl/gpio1@ff250000"; - gpio2 = "/pinctrl/gpio2@ff260000"; - gpio3 = "/pinctrl/gpio3@ff270000"; - pcfg_pull_up = "/pinctrl/pcfg-pull-up"; - pcfg_pull_down = "/pinctrl/pcfg-pull-down"; - pcfg_pull_none = "/pinctrl/pcfg-pull-none"; - pcfg_pull_none_2ma = "/pinctrl/pcfg-pull-none-2ma"; - pcfg_pull_up_2ma = "/pinctrl/pcfg-pull-up-2ma"; - pcfg_pull_up_4ma = "/pinctrl/pcfg-pull-up-4ma"; - pcfg_pull_none_4ma = "/pinctrl/pcfg-pull-none-4ma"; - pcfg_pull_down_4ma = "/pinctrl/pcfg-pull-down-4ma"; - pcfg_pull_none_8ma = "/pinctrl/pcfg-pull-none-8ma"; - pcfg_pull_up_8ma = "/pinctrl/pcfg-pull-up-8ma"; - pcfg_pull_none_12ma = "/pinctrl/pcfg-pull-none-12ma"; - pcfg_pull_up_12ma = "/pinctrl/pcfg-pull-up-12ma"; - pcfg_pull_none_smt = "/pinctrl/pcfg-pull-none-smt"; - pcfg_output_high = "/pinctrl/pcfg-output-high"; - pcfg_output_low = "/pinctrl/pcfg-output-low"; - pcfg_input_high = "/pinctrl/pcfg-input-high"; - pcfg_input = "/pinctrl/pcfg-input"; - i2c0_xfer = "/pinctrl/i2c0/i2c0-xfer"; - i2c1_xfer = "/pinctrl/i2c1/i2c1-xfer"; - i2c2_xfer = "/pinctrl/i2c2/i2c2-xfer"; - i2c3_xfer = "/pinctrl/i2c3/i2c3-xfer"; - tsadc_otp_gpio = "/pinctrl/tsadc/tsadc-otp-gpio"; - tsadc_otp_out = "/pinctrl/tsadc/tsadc-otp-out"; - uart0_xfer = "/pinctrl/uart0/uart0-xfer"; - uart0_cts = "/pinctrl/uart0/uart0-cts"; - uart0_rts = "/pinctrl/uart0/uart0-rts"; - uart0_rts_gpio = "/pinctrl/uart0/uart0-rts-gpio"; - uart1_xfer = "/pinctrl/uart1/uart1-xfer"; - uart1_cts = "/pinctrl/uart1/uart1-cts"; - uart1_rts = "/pinctrl/uart1/uart1-rts"; - uart1_rts_gpio = "/pinctrl/uart1/uart1-rts-gpio"; - uart2m0_xfer = "/pinctrl/uart2-m0/uart2m0-xfer"; - uart2m1_xfer = "/pinctrl/uart2-m1/uart2m1-xfer"; - uart3m0_xfer = "/pinctrl/uart3-m0/uart3m0-xfer"; - uart3m0_cts = "/pinctrl/uart3-m0/uart3m0-cts"; - uart3m0_rts = "/pinctrl/uart3-m0/uart3m0-rts"; - uart3m0_rts_gpio = "/pinctrl/uart3-m0/uart3m0-rts-gpio"; - uart3m1_xfer = "/pinctrl/uart3-m1/uart3m1-xfer"; - uart3m1_cts = "/pinctrl/uart3-m1/uart3m1-cts"; - uart3m1_rts = "/pinctrl/uart3-m1/uart3m1-rts"; - uart3m1_rts_gpio = "/pinctrl/uart3-m1/uart3m1-rts-gpio"; - uart4_xfer = "/pinctrl/uart4/uart4-xfer"; - uart4_cts = "/pinctrl/uart4/uart4-cts"; - uart4_rts = "/pinctrl/uart4/uart4-rts"; - uart5_xfer = "/pinctrl/uart5/uart5-xfer"; - uart5_cts = "/pinctrl/uart5/uart5-cts"; - uart5_rts = "/pinctrl/uart5/uart5-rts"; - spi0_clk = "/pinctrl/spi0/spi0-clk"; - spi0_csn = "/pinctrl/spi0/spi0-csn"; - spi0_miso = "/pinctrl/spi0/spi0-miso"; - spi0_mosi = "/pinctrl/spi0/spi0-mosi"; - spi0_clk_hs = "/pinctrl/spi0/spi0-clk-hs"; - spi0_miso_hs = "/pinctrl/spi0/spi0-miso-hs"; - spi0_mosi_hs = "/pinctrl/spi0/spi0-mosi-hs"; - spi1_clk = "/pinctrl/spi1/spi1-clk"; - spi1_csn0 = "/pinctrl/spi1/spi1-csn0"; - spi1_csn1 = "/pinctrl/spi1/spi1-csn1"; - spi1_miso = "/pinctrl/spi1/spi1-miso"; - spi1_mosi = "/pinctrl/spi1/spi1-mosi"; - spi1_clk_hs = "/pinctrl/spi1/spi1-clk-hs"; - spi1_miso_hs = "/pinctrl/spi1/spi1-miso-hs"; - spi1_mosi_hs = "/pinctrl/spi1/spi1-mosi-hs"; - pdm_clk0m0 = "/pinctrl/pdm/pdm-clk0m0"; - pdm_clk0m1 = "/pinctrl/pdm/pdm-clk0m1"; - pdm_clk1 = "/pinctrl/pdm/pdm-clk1"; - pdm_sdi0m0 = "/pinctrl/pdm/pdm-sdi0m0"; - pdm_sdi0m1 = "/pinctrl/pdm/pdm-sdi0m1"; - pdm_sdi1 = "/pinctrl/pdm/pdm-sdi1"; - pdm_sdi2 = "/pinctrl/pdm/pdm-sdi2"; - pdm_sdi3 = "/pinctrl/pdm/pdm-sdi3"; - pdm_clk0m0_sleep = "/pinctrl/pdm/pdm-clk0m0-sleep"; - pdm_clk0m_sleep1 = "/pinctrl/pdm/pdm-clk0m1-sleep"; - pdm_clk1_sleep = "/pinctrl/pdm/pdm-clk1-sleep"; - pdm_sdi0m0_sleep = "/pinctrl/pdm/pdm-sdi0m0-sleep"; - pdm_sdi0m1_sleep = "/pinctrl/pdm/pdm-sdi0m1-sleep"; - pdm_sdi1_sleep = "/pinctrl/pdm/pdm-sdi1-sleep"; - pdm_sdi2_sleep = "/pinctrl/pdm/pdm-sdi2-sleep"; - pdm_sdi3_sleep = "/pinctrl/pdm/pdm-sdi3-sleep"; - i2s0_8ch_mclk = "/pinctrl/i2s0/i2s0-8ch-mclk"; - i2s0_8ch_sclktx = "/pinctrl/i2s0/i2s0-8ch-sclktx"; - i2s0_8ch_sclkrx = "/pinctrl/i2s0/i2s0-8ch-sclkrx"; - i2s0_8ch_lrcktx = "/pinctrl/i2s0/i2s0-8ch-lrcktx"; - i2s0_8ch_lrckrx = "/pinctrl/i2s0/i2s0-8ch-lrckrx"; - i2s0_8ch_sdo0 = "/pinctrl/i2s0/i2s0-8ch-sdo0"; - i2s0_8ch_sdo1 = "/pinctrl/i2s0/i2s0-8ch-sdo1"; - i2s0_8ch_sdo2 = "/pinctrl/i2s0/i2s0-8ch-sdo2"; - i2s0_8ch_sdo3 = "/pinctrl/i2s0/i2s0-8ch-sdo3"; - i2s0_8ch_sdi0 = "/pinctrl/i2s0/i2s0-8ch-sdi0"; - i2s0_8ch_sdi1 = "/pinctrl/i2s0/i2s0-8ch-sdi1"; - i2s0_8ch_sdi2 = "/pinctrl/i2s0/i2s0-8ch-sdi2"; - i2s0_8ch_sdi3 = "/pinctrl/i2s0/i2s0-8ch-sdi3"; - i2s1_2ch_mclk = "/pinctrl/i2s1/i2s1-2ch-mclk"; - i2s1_2ch_sclk = "/pinctrl/i2s1/i2s1-2ch-sclk"; - i2s1_2ch_lrck = "/pinctrl/i2s1/i2s1-2ch-lrck"; - i2s1_2ch_sdi = "/pinctrl/i2s1/i2s1-2ch-sdi"; - i2s1_2ch_sdo = "/pinctrl/i2s1/i2s1-2ch-sdo"; - i2s2_2ch_mclk = "/pinctrl/i2s2/i2s2-2ch-mclk"; - i2s2_2ch_sclk = "/pinctrl/i2s2/i2s2-2ch-sclk"; - i2s2_2ch_lrck = "/pinctrl/i2s2/i2s2-2ch-lrck"; - i2s2_2ch_sdi = "/pinctrl/i2s2/i2s2-2ch-sdi"; - i2s2_2ch_sdo = "/pinctrl/i2s2/i2s2-2ch-sdo"; - sdmmc_clk = "/pinctrl/sdmmc/sdmmc-clk"; - sdmmc_cmd = "/pinctrl/sdmmc/sdmmc-cmd"; - sdmmc_det = "/pinctrl/sdmmc/sdmmc-det"; - sdmmc_bus1 = "/pinctrl/sdmmc/sdmmc-bus1"; - sdmmc_bus4 = "/pinctrl/sdmmc/sdmmc-bus4"; - sdmmc_gpio = "/pinctrl/sdmmc/sdmmc-gpio"; - sdio_clk = "/pinctrl/sdio/sdio-clk"; - sdio_cmd = "/pinctrl/sdio/sdio-cmd"; - sdio_bus4 = "/pinctrl/sdio/sdio-bus4"; - sdio_gpio = "/pinctrl/sdio/sdio-gpio"; - emmc_clk = "/pinctrl/emmc/emmc-clk"; - emmc_cmd = "/pinctrl/emmc/emmc-cmd"; - emmc_pwren = "/pinctrl/emmc/emmc-pwren"; - emmc_rstnout = "/pinctrl/emmc/emmc-rstnout"; - emmc_bus1 = "/pinctrl/emmc/emmc-bus1"; - emmc_bus4 = "/pinctrl/emmc/emmc-bus4"; - emmc_bus8 = "/pinctrl/emmc/emmc-bus8"; - flash_cs0 = "/pinctrl/flash/flash-cs0"; - flash_rdy = "/pinctrl/flash/flash-rdy"; - flash_dqs = "/pinctrl/flash/flash-dqs"; - flash_ale = "/pinctrl/flash/flash-ale"; - flash_cle = "/pinctrl/flash/flash-cle"; - flash_wrn = "/pinctrl/flash/flash-wrn"; - flash_csl = "/pinctrl/flash/flash-csl"; - flash_rdn = "/pinctrl/flash/flash-rdn"; - flash_bus8 = "/pinctrl/flash/flash-bus8"; - lcdc_m0_rgb_pins = "/pinctrl/lcdc/lcdc-m0-rgb-pins"; - lcdc_m0_sleep_pins = "/pinctrl/lcdc/lcdc-m0-sleep-pins"; - lcdc_m1_rgb_pins = "/pinctrl/lcdc/lcdc-m1-rgb-pins"; - lcdc_m1_sleep_pins = "/pinctrl/lcdc/lcdc-m1-sleep-pins"; - pwm0_pin = "/pinctrl/pwm0/pwm0-pin"; - pwm1_pin = "/pinctrl/pwm1/pwm1-pin"; - pwm2_pin = "/pinctrl/pwm2/pwm2-pin"; - pwm3_pin = "/pinctrl/pwm3/pwm3-pin"; - pwm4_pin = "/pinctrl/pwm4/pwm4-pin"; - pwm5_pin = "/pinctrl/pwm5/pwm5-pin"; - pwm6_pin = "/pinctrl/pwm6/pwm6-pin"; - pwm7_pin = "/pinctrl/pwm7/pwm7-pin"; - rmii_pins = "/pinctrl/gmac/rmii-pins"; - mac_refclk_12ma = "/pinctrl/gmac/mac-refclk-12ma"; - mac_refclk = "/pinctrl/gmac/mac-refclk"; - cif_clkout_m0 = "/pinctrl/cif-m0/cif-clkout-m0"; - dvp_d2d9_m0 = "/pinctrl/cif-m0/dvp-d2d9-m0"; - dvp_d0d1_m0 = "/pinctrl/cif-m0/dvp-d0d1-m0"; - dvp_d10d11_m0 = "/pinctrl/cif-m0/d10-d11-m0"; - cif_clkout_m1 = "/pinctrl/cif-m1/cif-clkout-m1"; - dvp_d2d9_m1 = "/pinctrl/cif-m1/dvp-d2d9-m1"; - dvp_d0d1_m1 = "/pinctrl/cif-m1/dvp-d0d1-m1"; - dvp_d10d11_m1 = "/pinctrl/cif-m1/d10-d11-m1"; - isp_prelight = "/pinctrl/isp/isp-prelight"; - pmic_int = "/pinctrl/pmic/pmic_int"; - soc_slppin_gpio = "/pinctrl/pmic/soc_slppin_gpio"; - soc_slppin_slp = "/pinctrl/pmic/soc_slppin_slp"; - soc_slppin_rst = "/pinctrl/pmic/soc_slppin_rst"; - led_pins = "/pinctrl/leds/led-pins"; - btn_pins = "/pinctrl/btns/btn-pins"; - drm_logo = "/reserved-memory/drm-logo@00000000"; - ramoops_mem = "/reserved-memory/region@110000"; - gpio_keys = "/odroidgo3-keys"; - joypad = "/odroidgo3-joypad"; - leds = "/gpio_leds"; - backlight = "/backlight"; - vccsys = "/vccsys"; - }; -}; diff --git a/config/archr-dts/R36S-DTB/DTS/Panel3.dts b/config/archr-dts/R36S-DTB/DTS/Panel3.dts deleted file mode 100644 index 6fd4f4e74a..0000000000 --- a/config/archr-dts/R36S-DTB/DTS/Panel3.dts +++ /dev/null @@ -1,4063 +0,0 @@ -/dts-v1/; - -/ { - compatible = "rockchip,rk3326-odroidgo3-linux\0rockchip,rk3326"; - interrupt-parent = <0x01>; - #address-cells = <0x02>; - #size-cells = <0x02>; - model = "Game Console R35S/R36S fix by AeolusUX"; - - ddr_timing { - compatible = "rockchip,ddr-timing"; - ddr2_speed_bin = <0x00>; - ddr3_speed_bin = <0x15>; - ddr4_speed_bin = <0x0c>; - pd_idle = <0x0d>; - sr_idle = <0x5d>; - sr_mc_gate_idle = <0x00>; - srpd_lite_idle = <0x00>; - standby_idle = <0x00>; - auto_pd_dis_freq = <0x42a>; - auto_sr_dis_freq = <0x320>; - ddr2_dll_dis_freq = <0x12c>; - ddr3_dll_dis_freq = <0x12c>; - ddr4_dll_dis_freq = <0x271>; - phy_dll_dis_freq = <0x190>; - ddr2_odt_dis_freq = <0x64>; - phy_ddr2_odt_dis_freq = <0x64>; - ddr2_drv = <0x01>; - ddr2_odt = <0x96>; - phy_ddr2_ca_drv = <0x15>; - phy_ddr2_ck_drv = <0x12>; - phy_ddr2_dq_drv = <0x15>; - phy_ddr2_odt = <0x02>; - ddr3_odt_dis_freq = <0x190>; - phy_ddr3_odt_dis_freq = <0x190>; - ddr3_drv = <0x28>; - ddr3_odt = <0x78>; - phy_ddr3_ca_drv = <0x15>; - phy_ddr3_ck_drv = <0x12>; - phy_ddr3_dq_drv = <0x15>; - phy_ddr3_odt = <0x02>; - phy_lpddr2_odt_dis_freq = <0x29a>; - lpddr2_drv = <0x28>; - phy_lpddr2_ca_drv = <0x16>; - phy_lpddr2_ck_drv = <0x13>; - phy_lpddr2_dq_drv = <0x16>; - phy_lpddr2_odt = <0x00>; - lpddr3_odt_dis_freq = <0x190>; - phy_lpddr3_odt_dis_freq = <0x190>; - lpddr3_drv = <0x28>; - lpddr3_odt = <0xf0>; - phy_lpddr3_ca_drv = <0x16>; - phy_lpddr3_ck_drv = <0x13>; - phy_lpddr3_dq_drv = <0x16>; - phy_lpddr3_odt = <0x02>; - lpddr4_odt_dis_freq = <0x320>; - phy_lpddr4_odt_dis_freq = <0x320>; - lpddr4_drv = <0x3c>; - lpddr4_dq_odt = <0x28>; - lpddr4_ca_odt = <0x28>; - phy_lpddr4_ca_drv = <0x14>; - phy_lpddr4_ck_cs_drv = <0x06>; - phy_lpddr4_dq_drv = <0x06>; - phy_lpddr4_odt = <0x10>; - ddr4_odt_dis_freq = <0x29a>; - phy_ddr4_odt_dis_freq = <0x29a>; - ddr4_drv = <0x22>; - ddr4_odt = <0xf0>; - phy_ddr4_ca_drv = <0x16>; - phy_ddr4_ck_drv = <0x13>; - phy_ddr4_dq_drv = <0x16>; - phy_ddr4_odt = <0x02>; - ddr3a1_ddr4a9_de-skew = <0x06>; - ddr3a0_ddr4a10_de-skew = <0x07>; - ddr3a3_ddr4a6_de-skew = <0x07>; - ddr3a2_ddr4a4_de-skew = <0x07>; - ddr3a5_ddr4a8_de-skew = <0x07>; - ddr3a4_ddr4a5_de-skew = <0x07>; - ddr3a7_ddr4a11_de-skew = <0x07>; - ddr3a6_ddr4a7_de-skew = <0x06>; - ddr3a9_ddr4a0_de-skew = <0x07>; - ddr3a8_ddr4a13_de-skew = <0x07>; - ddr3a11_ddr4a3_de-skew = <0x07>; - ddr3a10_ddr4cs0_de-skew = <0x07>; - ddr3a13_ddr4a2_de-skew = <0x07>; - ddr3a12_ddr4ba1_de-skew = <0x07>; - ddr3a15_ddr4odt0_de-skew = <0x07>; - ddr3a14_ddr4a1_de-skew = <0x07>; - ddr3ba1_ddr4a15_de-skew = <0x07>; - ddr3ba0_ddr4bg0_de-skew = <0x07>; - ddr3ras_ddr4cke_de-skew = <0x07>; - ddr3ba2_ddr4ba0_de-skew = <0x07>; - ddr3we_ddr4bg1_de-skew = <0x07>; - ddr3cas_ddr4a12_de-skew = <0x07>; - ddr3ckn_ddr4ckn_de-skew = <0x07>; - ddr3ckp_ddr4ckp_de-skew = <0x07>; - ddr3cke_ddr4a16_de-skew = <0x07>; - ddr3odt0_ddr4a14_de-skew = <0x07>; - ddr3cs0_ddr4act_de-skew = <0x06>; - ddr3reset_ddr4reset_de-skew = <0x07>; - ddr3cs1_ddr4cs1_de-skew = <0x06>; - ddr3odt1_ddr4odt1_de-skew = <0x07>; - cs0_dm0_rx_de-skew = <0x07>; - cs0_dm0_tx_de-skew = <0x07>; - cs0_dq0_rx_de-skew = <0x08>; - cs0_dq0_tx_de-skew = <0x08>; - cs0_dq1_rx_de-skew = <0x09>; - cs0_dq1_tx_de-skew = <0x08>; - cs0_dq2_rx_de-skew = <0x08>; - cs0_dq2_tx_de-skew = <0x08>; - cs0_dq3_rx_de-skew = <0x08>; - cs0_dq3_tx_de-skew = <0x08>; - cs0_dq4_rx_de-skew = <0x09>; - cs0_dq4_tx_de-skew = <0x08>; - cs0_dq5_rx_de-skew = <0x09>; - cs0_dq5_tx_de-skew = <0x08>; - cs0_dq6_rx_de-skew = <0x09>; - cs0_dq6_tx_de-skew = <0x08>; - cs0_dq7_rx_de-skew = <0x08>; - cs0_dq7_tx_de-skew = <0x08>; - cs0_dqs0_rx_de-skew = <0x06>; - cs0_dqs0p_tx_de-skew = <0x09>; - cs0_dqs0n_tx_de-skew = <0x09>; - cs0_dm1_rx_de-skew = <0x07>; - cs0_dm1_tx_de-skew = <0x06>; - cs0_dq8_rx_de-skew = <0x08>; - cs0_dq8_tx_de-skew = <0x07>; - cs0_dq9_rx_de-skew = <0x09>; - cs0_dq9_tx_de-skew = <0x07>; - cs0_dq10_rx_de-skew = <0x08>; - cs0_dq10_tx_de-skew = <0x08>; - cs0_dq11_rx_de-skew = <0x08>; - cs0_dq11_tx_de-skew = <0x07>; - cs0_dq12_rx_de-skew = <0x08>; - cs0_dq12_tx_de-skew = <0x08>; - cs0_dq13_rx_de-skew = <0x09>; - cs0_dq13_tx_de-skew = <0x07>; - cs0_dq14_rx_de-skew = <0x09>; - cs0_dq14_tx_de-skew = <0x08>; - cs0_dq15_rx_de-skew = <0x09>; - cs0_dq15_tx_de-skew = <0x07>; - cs0_dqs1_rx_de-skew = <0x07>; - cs0_dqs1p_tx_de-skew = <0x09>; - cs0_dqs1n_tx_de-skew = <0x09>; - cs0_dm2_rx_de-skew = <0x07>; - cs0_dm2_tx_de-skew = <0x07>; - cs0_dq16_rx_de-skew = <0x09>; - cs0_dq16_tx_de-skew = <0x09>; - cs0_dq17_rx_de-skew = <0x07>; - cs0_dq17_tx_de-skew = <0x09>; - cs0_dq18_rx_de-skew = <0x07>; - cs0_dq18_tx_de-skew = <0x08>; - cs0_dq19_rx_de-skew = <0x07>; - cs0_dq19_tx_de-skew = <0x09>; - cs0_dq20_rx_de-skew = <0x09>; - cs0_dq20_tx_de-skew = <0x09>; - cs0_dq21_rx_de-skew = <0x09>; - cs0_dq21_tx_de-skew = <0x09>; - cs0_dq22_rx_de-skew = <0x08>; - cs0_dq22_tx_de-skew = <0x09>; - cs0_dq23_rx_de-skew = <0x08>; - cs0_dq23_tx_de-skew = <0x09>; - cs0_dqs2_rx_de-skew = <0x06>; - cs0_dqs2p_tx_de-skew = <0x09>; - cs0_dqs2n_tx_de-skew = <0x09>; - cs0_dm3_rx_de-skew = <0x07>; - cs0_dm3_tx_de-skew = <0x07>; - cs0_dq24_rx_de-skew = <0x08>; - cs0_dq24_tx_de-skew = <0x08>; - cs0_dq25_rx_de-skew = <0x09>; - cs0_dq25_tx_de-skew = <0x09>; - cs0_dq26_rx_de-skew = <0x09>; - cs0_dq26_tx_de-skew = <0x08>; - cs0_dq27_rx_de-skew = <0x09>; - cs0_dq27_tx_de-skew = <0x08>; - cs0_dq28_rx_de-skew = <0x09>; - cs0_dq28_tx_de-skew = <0x09>; - cs0_dq29_rx_de-skew = <0x09>; - cs0_dq29_tx_de-skew = <0x09>; - cs0_dq30_rx_de-skew = <0x08>; - cs0_dq30_tx_de-skew = <0x08>; - cs0_dq31_rx_de-skew = <0x08>; - cs0_dq31_tx_de-skew = <0x08>; - cs0_dqs3_rx_de-skew = <0x07>; - cs0_dqs3p_tx_de-skew = <0x09>; - cs0_dqs3n_tx_de-skew = <0x09>; - cs1_dm0_rx_de-skew = <0x07>; - cs1_dm0_tx_de-skew = <0x07>; - cs1_dq0_rx_de-skew = <0x08>; - cs1_dq0_tx_de-skew = <0x08>; - cs1_dq1_rx_de-skew = <0x09>; - cs1_dq1_tx_de-skew = <0x08>; - cs1_dq2_rx_de-skew = <0x08>; - cs1_dq2_tx_de-skew = <0x08>; - cs1_dq3_rx_de-skew = <0x08>; - cs1_dq3_tx_de-skew = <0x08>; - cs1_dq4_rx_de-skew = <0x08>; - cs1_dq4_tx_de-skew = <0x08>; - cs1_dq5_rx_de-skew = <0x09>; - cs1_dq5_tx_de-skew = <0x08>; - cs1_dq6_rx_de-skew = <0x09>; - cs1_dq6_tx_de-skew = <0x08>; - cs1_dq7_rx_de-skew = <0x08>; - cs1_dq7_tx_de-skew = <0x08>; - cs1_dqs0_rx_de-skew = <0x06>; - cs1_dqs0p_tx_de-skew = <0x09>; - cs1_dqs0n_tx_de-skew = <0x09>; - cs1_dm1_rx_de-skew = <0x07>; - cs1_dm1_tx_de-skew = <0x07>; - cs1_dq8_rx_de-skew = <0x08>; - cs1_dq8_tx_de-skew = <0x08>; - cs1_dq9_rx_de-skew = <0x08>; - cs1_dq9_tx_de-skew = <0x07>; - cs1_dq10_rx_de-skew = <0x07>; - cs1_dq10_tx_de-skew = <0x08>; - cs1_dq11_rx_de-skew = <0x08>; - cs1_dq11_tx_de-skew = <0x08>; - cs1_dq12_rx_de-skew = <0x08>; - cs1_dq12_tx_de-skew = <0x07>; - cs1_dq13_rx_de-skew = <0x08>; - cs1_dq13_tx_de-skew = <0x08>; - cs1_dq14_rx_de-skew = <0x08>; - cs1_dq14_tx_de-skew = <0x08>; - cs1_dq15_rx_de-skew = <0x08>; - cs1_dq15_tx_de-skew = <0x07>; - cs1_dqs1_rx_de-skew = <0x07>; - cs1_dqs1p_tx_de-skew = <0x09>; - cs1_dqs1n_tx_de-skew = <0x09>; - cs1_dm2_rx_de-skew = <0x07>; - cs1_dm2_tx_de-skew = <0x08>; - cs1_dq16_rx_de-skew = <0x08>; - cs1_dq16_tx_de-skew = <0x09>; - cs1_dq17_rx_de-skew = <0x08>; - cs1_dq17_tx_de-skew = <0x09>; - cs1_dq18_rx_de-skew = <0x07>; - cs1_dq18_tx_de-skew = <0x08>; - cs1_dq19_rx_de-skew = <0x08>; - cs1_dq19_tx_de-skew = <0x09>; - cs1_dq20_rx_de-skew = <0x09>; - cs1_dq20_tx_de-skew = <0x09>; - cs1_dq21_rx_de-skew = <0x09>; - cs1_dq21_tx_de-skew = <0x09>; - cs1_dq22_rx_de-skew = <0x08>; - cs1_dq22_tx_de-skew = <0x09>; - cs1_dq23_rx_de-skew = <0x08>; - cs1_dq23_tx_de-skew = <0x09>; - cs1_dqs2_rx_de-skew = <0x06>; - cs1_dqs2p_tx_de-skew = <0x09>; - cs1_dqs2n_tx_de-skew = <0x09>; - cs1_dm3_rx_de-skew = <0x07>; - cs1_dm3_tx_de-skew = <0x07>; - cs1_dq24_rx_de-skew = <0x08>; - cs1_dq24_tx_de-skew = <0x09>; - cs1_dq25_rx_de-skew = <0x09>; - cs1_dq25_tx_de-skew = <0x09>; - cs1_dq26_rx_de-skew = <0x09>; - cs1_dq26_tx_de-skew = <0x08>; - cs1_dq27_rx_de-skew = <0x08>; - cs1_dq27_tx_de-skew = <0x08>; - cs1_dq28_rx_de-skew = <0x09>; - cs1_dq28_tx_de-skew = <0x09>; - cs1_dq29_rx_de-skew = <0x09>; - cs1_dq29_tx_de-skew = <0x09>; - cs1_dq30_rx_de-skew = <0x09>; - cs1_dq30_tx_de-skew = <0x08>; - cs1_dq31_rx_de-skew = <0x08>; - cs1_dq31_tx_de-skew = <0x08>; - cs1_dqs3_rx_de-skew = <0x07>; - cs1_dqs3p_tx_de-skew = <0x09>; - cs1_dqs3n_tx_de-skew = <0x09>; - phandle = <0xaf>; - }; - - aliases { - ethernet0 = "/ethernet@ff360000"; - i2c0 = "/i2c@ff180000"; - i2c1 = "/i2c@ff190000"; - i2c2 = "/i2c@ff1a0000"; - i2c3 = "/i2c@ff1b0000"; - serial0 = "/serial@ff030000"; - serial1 = "/serial@ff158000"; - serial2 = "/serial@ff160000"; - serial3 = "/serial@ff168000"; - serial4 = "/serial@ff170000"; - serial5 = "/serial@ff178000"; - spi0 = "/spi@ff1d0000"; - spi1 = "/spi@ff1d8000"; - }; - - cpus { - #address-cells = <0x02>; - #size-cells = <0x00>; - - cpu@0 { - device_type = "cpu"; - compatible = "arm,cortex-a35\0arm,armv8"; - reg = <0x00 0x00>; - enable-method = "psci"; - clocks = <0x02 0x07>; - #cooling-cells = <0x02>; - dynamic-power-coefficient = <0x5a>; - operating-points-v2 = <0x03>; - cpu-idle-states = <0x04 0x05>; - cpu-supply = <0x06>; - phandle = <0x09>; - }; - - cpu@1 { - device_type = "cpu"; - compatible = "arm,cortex-a35\0arm,armv8"; - reg = <0x00 0x01>; - enable-method = "psci"; - operating-points-v2 = <0x03>; - cpu-idle-states = <0x04 0x05>; - phandle = <0x0a>; - }; - - cpu@2 { - device_type = "cpu"; - compatible = "arm,cortex-a35\0arm,armv8"; - reg = <0x00 0x02>; - enable-method = "psci"; - operating-points-v2 = <0x03>; - cpu-idle-states = <0x04 0x05>; - phandle = <0x0b>; - }; - - cpu@3 { - device_type = "cpu"; - compatible = "arm,cortex-a35\0arm,armv8"; - reg = <0x00 0x03>; - enable-method = "psci"; - operating-points-v2 = <0x03>; - cpu-idle-states = <0x04 0x05>; - phandle = <0x0c>; - }; - - idle-states { - entry-method = "psci"; - - cpu-sleep { - compatible = "arm,idle-state"; - local-timer-stop; - arm,psci-suspend-param = <0x10000>; - entry-latency-us = <0x78>; - exit-latency-us = <0xfa>; - min-residency-us = <0x384>; - phandle = <0x04>; - }; - - cluster-sleep { - compatible = "arm,idle-state"; - local-timer-stop; - arm,psci-suspend-param = <0x1010000>; - entry-latency-us = <0x190>; - exit-latency-us = <0x1f4>; - min-residency-us = <0x7d0>; - phandle = <0x05>; - }; - }; - }; - - cpu0-opp-table { - compatible = "operating-points-v2"; - opp-shared; - rockchip,temp-hysteresis = <0x1388>; - rockchip,low-temp = <0x00>; - rockchip,low-temp-min-volt = <0xf4240>; - rockchip,low-temp-adjust-volt = <0x00 0x5e8 0xc350>; - clocks = <0x02 0x01>; - rockchip,avs-scale = <0x04>; - rockchip,max-volt = <0x149970>; - rockchip,evb-irdrop = <0x61a8>; - nvmem-cells = <0x07 0x08>; - nvmem-cell-names = "cpu_leakage\0performance"; - rockchip,bin-scaling-sel = <0x00 0x0d 0x01 0x0d>; - rockchip,pvtm-voltage-sel = <0x00 0xc350 0x00 0xc351 0xd2f0 0x01 0xd2f1 0xea60 0x02 0xea61 0x1869f 0x03>; - rockchip,pvtm-freq = <0x639c0>; - rockchip,pvtm-volt = <0xf4240>; - rockchip,pvtm-ch = <0x00 0x00>; - rockchip,pvtm-sample-time = <0x3e8>; - rockchip,pvtm-number = <0x0a>; - rockchip,pvtm-error = <0x3e8>; - rockchip,pvtm-ref-temp = <0x28>; - rockchip,pvtm-temp-prop = <0xffffffc8 0xffffffc8>; - rockchip,thermal-zone = "soc-thermal"; - rockchip,avs = <0x01>; - phandle = <0x03>; - - opp-1008000000 { - opp-hz = <0x00 0x3c14dc00>; - opp-microvolt = <0x11edd8 0x11edd8 0x149970>; - opp-microvolt-L0 = <0x11edd8 0x11edd8 0x149970>; - opp-microvolt-L1 = <0x112a88 0x112a88 0x149970>; - opp-microvolt-L2 = <0x112a88 0x112a88 0x149970>; - opp-microvolt-L3 = <0x100590 0x100590 0x149970>; - clock-latency-ns = <0x9c40>; - }; - - opp-1200000000 { - opp-hz = <0x00 0x47868c00>; - opp-microvolt = <0x13d620 0x13d620 0x149970>; - opp-microvolt-L0 = <0x13d620 0x13d620 0x149970>; - opp-microvolt-L1 = <0x137478 0x137478 0x149970>; - opp-microvolt-L2 = <0x1312d0 0x1312d0 0x149970>; - opp-microvolt-L3 = <0x124f80 0x124f80 0x149970>; - clock-latency-ns = <0x9c40>; - }; - - opp-1248000000 { - opp-hz = <0x00 0x4a62f800>; - opp-microvolt = <0x149970 0x149970 0x149970>; - opp-microvolt-L0 = <0x149970 0x149970 0x149970>; - opp-microvolt-L1 = <0x13d620 0x13d620 0x149970>; - opp-microvolt-L2 = <0x137478 0x137478 0x149970>; - opp-microvolt-L3 = <0x12b128 0x12b128 0x149970>; - clock-latency-ns = <0x9c40>; - }; - - opp-1296000000 { - opp-hz = <0x00 0x4d3f6400>; - opp-microvolt = <0x149970 0x149970 0x149970>; - opp-microvolt-L0 = <0x149970 0x149970 0x149970>; - opp-microvolt-L1 = <0x149970 0x149970 0x149970>; - opp-microvolt-L2 = <0x13d620 0x13d620 0x149970>; - opp-microvolt-L3 = <0x1312d0 0x1312d0 0x149970>; - clock-latency-ns = <0x9c40>; - }; - - opp-1512000000 { - opp-hz = <0x00 0x5a1f4a00>; - opp-microvolt = <0x149970 0x149970 0x149970>; - opp-microvolt-L0 = <0x149970 0x149970 0x149970>; - opp-microvolt-L1 = <0x149970 0x149970 0x149970>; - opp-microvolt-L2 = <0x13d620 0x13d620 0x149970>; - opp-microvolt-L3 = <0x1312d0 0x1312d0 0x149970>; - clock-latency-ns = <0x9c40>; - }; - }; - - arm-pmu { - compatible = "arm,cortex-a53-pmu"; - interrupts = <0x00 0x64 0x04 0x00 0x65 0x04 0x00 0x66 0x04 0x00 0x67 0x04>; - interrupt-affinity = <0x09 0x0a 0x0b 0x0c>; - }; - - bus-soc { - compatible = "rockchip,px30-bus"; - rockchip,busfreq-policy = "autocs"; - phandle = <0xc4>; - - soc-bus0 { - bus-id = <0x00>; - timer-us = <0x14>; - enable-msk = <0x40f7>; - status = "disabled"; - }; - - soc-bus1 { - bus-id = <0x01>; - timer-us = <0xc8>; - enable-msk = <0x40bf>; - status = "disabled"; - }; - - soc-bus2 { - bus-id = <0x02>; - timer-us = <0xc8>; - enable-msk = <0x4007>; - status = "disabled"; - }; - }; - - bus-apll { - compatible = "rockchip,px30-bus"; - rockchip,busfreq-policy = "clkfreq"; - clocks = <0x02 0x01>; - clock-names = "bus"; - operating-points-v2 = <0x0d>; - status = "okay"; - bus-supply = <0x0e>; - phandle = <0xc5>; - }; - - bus-apll-opp-table { - compatible = "operating-points-v2"; - opp-shared; - phandle = <0x0d>; - - opp-1512000000 { - opp-hz = <0x00 0x5a1f4a00>; - opp-microvolt = <0xf4240>; - }; - - opp-1008000000 { - opp-hz = <0x00 0x3c14dc00>; - opp-microvolt = <0xe7ef0>; - }; - }; - - cpuinfo { - compatible = "rockchip,cpuinfo"; - nvmem-cells = <0x0f>; - nvmem-cell-names = "id"; - }; - - display-subsystem { - compatible = "rockchip,display-subsystem"; - ports = <0x10>; - status = "okay"; - logo-memory-region = <0x11>; - phandle = <0xc6>; - - route { - - route-lvds { - status = "disabled"; - logo,uboot = "logo.gif"; - logo,kernel = "logo_kernel.gif"; - logo,mode = "center"; - charge_logo,mode = "center"; - connect = <0x12>; - phandle = <0xc7>; - }; - - route-dsi { - status = "okay"; - logo,uboot = "logo.gif"; - logo,kernel = "logo_kernel.gif"; - logo,mode = "center"; - charge_logo,mode = "center"; - connect = <0x13>; - phandle = <0xc8>; - }; - - route-rgb { - status = "disabled"; - logo,uboot = "logo.gif"; - logo,kernel = "logo_kernel.gif"; - logo,mode = "center"; - charge_logo,mode = "center"; - connect = <0x14>; - phandle = <0xc9>; - }; - }; - }; - - firmware { - - optee { - compatible = "linaro,optee-tz"; - method = "smc"; - }; - }; - - external-gmac-clock { - compatible = "fixed-clock"; - clock-frequency = <0x2faf080>; - clock-output-names = "gmac_clkin"; - #clock-cells = <0x00>; - phandle = <0xca>; - }; - - psci { - compatible = "arm,psci-1.0"; - method = "smc"; - }; - - rockchip-suspend { - compatible = "rockchip,pm-px30"; - status = "okay"; - rockchip,sleep-debug-en = <0x01>; - rockchip,sleep-mode-config = <0x20702>; - rockchip,wakeup-config = <0x85>; - phandle = <0xcb>; - }; - - timer { - compatible = "arm,armv8-timer"; - interrupts = <0x01 0x0d 0xf04 0x01 0x0e 0xf04 0x01 0x0b 0xf04 0x01 0x0a 0xf04>; - }; - - xin24m { - compatible = "fixed-clock"; - #clock-cells = <0x00>; - clock-frequency = <0x16e3600>; - clock-output-names = "xin24m"; - phandle = <0xcc>; - }; - - xin32k { - compatible = "fixed-clock"; - #clock-cells = <0x00>; - clock-frequency = <0x8000>; - clock-output-names = "xin32k"; - phandle = <0xcd>; - }; - - power-management@ff000000 { - compatible = "rockchip,px30-pmu\0syscon\0simple-mfd"; - reg = <0x00 0xff000000 0x00 0x1000>; - phandle = <0xce>; - - power-controller { - compatible = "rockchip,px30-power-controller"; - #power-domain-cells = <0x01>; - #address-cells = <0x01>; - #size-cells = <0x00>; - phandle = <0x8a>; - - pd_usb@5 { - reg = <0x05>; - clocks = <0x02 0x103 0x02 0x102 0x02 0x3c>; - pm_qos = <0x15 0x16>; - }; - - pd_sdcard@7 { - reg = <0x07>; - clocks = <0x02 0xf7 0x02 0x3b>; - pm_qos = <0x17>; - }; - - pd_gmac@9 { - reg = <0x09>; - clocks = <0x02 0xb2 0x02 0x143 0x02 0x40 0x02 0x3f>; - pm_qos = <0x18>; - }; - - pd_mmc_nand@10 { - reg = <0x0a>; - clocks = <0x02 0xfe 0x02 0x100 0x02 0xff 0x02 0x101 0x02 0x39 0x02 0x37 0x02 0x38 0x02 0x3a>; - pm_qos = <0x19 0x1a 0x1b 0x1c>; - }; - - pd_vpu@11 { - reg = <0x0b>; - clocks = <0x02 0xaf 0x02 0xf4 0x02 0x4b>; - pm_qos = <0x1d 0x1e>; - }; - - pd_vo@12 { - reg = <0x0c>; - clocks = <0x02 0xb7 0x02 0xb5 0x02 0xb6 0x02 0x96 0x02 0x97 0x02 0xfd 0x02 0xfb 0x02 0xfc 0x02 0x144 0x02 0x35 0x02 0x36>; - pm_qos = <0x1f 0x20 0x21 0x22>; - }; - - pd_vi@13 { - reg = <0x0d>; - clocks = <0x02 0xb3 0x02 0xb4 0x02 0xf9 0x02 0xfa 0x02 0x33>; - pm_qos = <0x23 0x24 0x25 0x26 0x27>; - }; - - pd_gpu@14 { - reg = <0x0e>; - clocks = <0x02 0x49>; - pm_qos = <0x28>; - }; - }; - }; - - syscon@ff010000 { - compatible = "rockchip,px30-pmugrf\0syscon\0simple-mfd"; - reg = <0x00 0xff010000 0x00 0x1000>; - #address-cells = <0x01>; - #size-cells = <0x01>; - phandle = <0xac>; - - io-domains { - compatible = "rockchip,px30-pmu-io-voltage-domain"; - status = "okay"; - pmuio1-supply = <0x29>; - pmuio2-supply = <0x29>; - phandle = <0xcf>; - }; - - reboot-mode { - compatible = "syscon-reboot-mode"; - offset = <0x200>; - mode-bootloader = <0x5242c301>; - mode-charge = <0x5242c30b>; - mode-fastboot = <0x5242c309>; - mode-loader = <0x5242c301>; - mode-normal = <0x5242c300>; - mode-recovery = <0x5242c303>; - mode-ums = <0x5242c30c>; - }; - - pmu-pvtm { - compatible = "rockchip,px30-pmu-pvtm"; - clocks = <0x2a 0x07>; - clock-names = "pmu"; - status = "okay"; - phandle = <0xd0>; - }; - }; - - serial@ff030000 { - compatible = "rockchip,px30-uart\0snps,dw-apb-uart"; - reg = <0x00 0xff030000 0x00 0x100>; - interrupts = <0x00 0x0f 0x04>; - clocks = <0x2a 0x06 0x2a 0x15>; - clock-names = "baudclk\0apb_pclk"; - reg-shift = <0x02>; - reg-io-width = <0x04>; - dmas = <0x2b 0x00 0x2b 0x01>; - pinctrl-names = "default"; - pinctrl-0 = <0x2c 0x2d 0x2e>; - status = "disabled"; - phandle = <0xd1>; - }; - - i2s@ff060000 { - compatible = "rockchip,px30-i2s-tdm"; - reg = <0x00 0xff060000 0x00 0x1000>; - interrupts = <0x00 0x0c 0x04>; - clocks = <0x02 0x10 0x02 0x12 0x02 0x106>; - clock-names = "mclk_tx\0mclk_rx\0hclk"; - dmas = <0x2b 0x10 0x2b 0x11>; - dma-names = "tx\0rx"; - resets = <0x02 0x84 0x02 0xbf>; - reset-names = "tx-m\0rx-m"; - rockchip,cru = <0x02>; - rockchip,grf = <0x2f>; - pinctrl-names = "default"; - pinctrl-0 = <0x30 0x31 0x32 0x33 0x34 0x35 0x36 0x37 0x38 0x39 0x3a 0x3b>; - status = "disabled"; - phandle = <0xd2>; - }; - - i2s@ff070000 { - compatible = "rockchip,px30-i2s\0rockchip,rk3066-i2s"; - reg = <0x00 0xff070000 0x00 0x1000>; - interrupts = <0x00 0x0d 0x04>; - clocks = <0x02 0x14 0x02 0x107>; - clock-names = "i2s_clk\0i2s_hclk"; - dmas = <0x2b 0x12 0x2b 0x13>; - dma-names = "tx\0rx"; - resets = <0x02 0x86 0x02 0x85>; - reset-names = "reset-m\0reset-h"; - pinctrl-names = "default"; - pinctrl-0 = <0x3c 0x3d 0x3e 0x3f>; - status = "okay"; - #sound-dai-cells = <0x00>; - phandle = <0xc2>; - }; - - i2s@ff080000 { - compatible = "rockchip,px30-i2s\0rockchip,rk3066-i2s"; - reg = <0x00 0xff080000 0x00 0x1000>; - interrupts = <0x00 0x0e 0x04>; - clocks = <0x02 0x16 0x02 0x108>; - clock-names = "i2s_clk\0i2s_hclk"; - dmas = <0x2b 0x14 0x2b 0x15>; - dma-names = "tx\0rx"; - resets = <0x02 0x88 0x02 0x87>; - reset-names = "reset-m\0reset-h"; - pinctrl-names = "default"; - pinctrl-0 = <0x40 0x41 0x42 0x43>; - status = "disabled"; - phandle = <0xd3>; - }; - - pdm@ff0a0000 { - compatible = "rockchip,px30-pdm\0rockchip,pdm"; - reg = <0x00 0xff0a0000 0x00 0x1000>; - clocks = <0x02 0x0f 0x02 0x105>; - clock-names = "pdm_clk\0pdm_hclk"; - dmas = <0x2b 0x18>; - dma-names = "rx"; - resets = <0x02 0x82>; - reset-names = "pdm-m"; - pinctrl-names = "default"; - pinctrl-0 = <0x44 0x45 0x46 0x47 0x48 0x49>; - status = "disabled"; - phandle = <0xd4>; - }; - - crypto@ff0b0000 { - compatible = "rockchip,px30-crypto"; - reg = <0x00 0xff0b0000 0x00 0x4000>; - interrupts = <0x00 0x52 0x04>; - clocks = <0x02 0xac 0x02 0xf1 0x02 0x30 0x02 0x31>; - clock-names = "aclk\0hclk\0sclk\0apb_pclk"; - resets = <0x02 0x74>; - reset-names = "crypto-rst"; - status = "disabled"; - phandle = <0xd5>; - }; - - rng@ff0b0000 { - compatible = "rockchip,cryptov2-rng"; - reg = <0x00 0xff0b0000 0x00 0x4000>; - clocks = <0x02 0x30 0x02 0x31 0x02 0xac 0x02 0xf1>; - clock-names = "clk_crypto\0clk_crypto_apk\0aclk_crypto\0hclk_crypto"; - assigned-clocks = <0x02 0x30 0x02 0x31 0x02 0xac 0x02 0xf1>; - assigned-clock-rates = <0x8f0d180 0x8f0d180 0xbebc200 0x5f5e100>; - resets = <0x02 0x74>; - reset-names = "reset"; - status = "okay"; - phandle = <0xd6>; - }; - - interrupt-controller@ff131000 { - compatible = "arm,gic-400"; - #interrupt-cells = <0x03>; - #address-cells = <0x00>; - interrupt-controller; - reg = <0x00 0xff131000 0x00 0x1000 0x00 0xff132000 0x00 0x2000 0x00 0xff134000 0x00 0x2000 0x00 0xff136000 0x00 0x2000>; - interrupts = <0x01 0x09 0xf04>; - phandle = <0x01>; - }; - - syscon@ff140000 { - compatible = "rockchip,px30-grf\0syscon\0simple-mfd"; - reg = <0x00 0xff140000 0x00 0x1000>; - #address-cells = <0x01>; - #size-cells = <0x01>; - phandle = <0x2f>; - - io-domains { - compatible = "rockchip,px30-io-voltage-domain"; - status = "okay"; - vccio1-supply = <0x4a>; - vccio2-supply = <0x4a>; - vccio3-supply = <0x4b>; - vccio4-supply = <0x4b>; - vccio5-supply = <0x4b>; - vccio6-supply = <0x4b>; - phandle = <0xd7>; - }; - - lvds { - compatible = "rockchip,px30-lvds"; - phys = <0x4c>; - phy-names = "phy"; - status = "disabled"; - phandle = <0xd8>; - - ports { - #address-cells = <0x01>; - #size-cells = <0x00>; - - port@0 { - reg = <0x00>; - #address-cells = <0x01>; - #size-cells = <0x00>; - - endpoint@0 { - reg = <0x00>; - remote-endpoint = <0x12>; - phandle = <0xa2>; - }; - }; - }; - }; - - rgb { - compatible = "rockchip,px30-rgb"; - pinctrl-names = "default\0sleep"; - pinctrl-0 = <0x4d>; - pinctrl-1 = <0x4e>; - status = "disabled"; - phys = <0x4c>; - phy-names = "phy"; - phandle = <0xd9>; - - ports { - #address-cells = <0x01>; - #size-cells = <0x00>; - - port@0 { - reg = <0x00>; - #address-cells = <0x01>; - #size-cells = <0x00>; - - endpoint@0 { - reg = <0x00>; - remote-endpoint = <0x14>; - phandle = <0xa4>; - }; - }; - }; - }; - }; - - syscon@ff148000 { - compatible = "syscon\0simple-mfd"; - reg = <0x00 0xff148000 0x00 0x1000>; - #address-cells = <0x01>; - #size-cells = <0x01>; - phandle = <0xda>; - - pvtm { - compatible = "rockchip,px30-pvtm"; - clocks = <0x02 0x4a>; - clock-names = "core"; - status = "okay"; - phandle = <0xdb>; - }; - }; - - serial@ff158000 { - compatible = "rockchip,px30-uart\0snps,dw-apb-uart"; - reg = <0x00 0xff158000 0x00 0x100>; - interrupts = <0x00 0x10 0x04>; - clocks = <0x02 0x18 0x02 0x149>; - clock-names = "baudclk\0apb_pclk"; - reg-shift = <0x02>; - reg-io-width = <0x04>; - dmas = <0x2b 0x02 0x2b 0x03>; - pinctrl-names = "default"; - pinctrl-0 = <0x4f 0x50>; - status = "okay"; - phandle = <0xdc>; - }; - - serial@ff160000 { - compatible = "rockchip,px30-uart\0snps,dw-apb-uart"; - reg = <0x00 0xff160000 0x00 0x100>; - interrupts = <0x00 0x11 0x04>; - clocks = <0x02 0x19 0x02 0x14a>; - clock-names = "baudclk\0apb_pclk"; - reg-shift = <0x02>; - reg-io-width = <0x04>; - dmas = <0x2b 0x04 0x2b 0x05>; - pinctrl-names = "default"; - pinctrl-0 = <0x51>; - status = "disabled"; - phandle = <0xdd>; - }; - - serial@ff168000 { - compatible = "rockchip,px30-uart\0snps,dw-apb-uart"; - reg = <0x00 0xff168000 0x00 0x100>; - interrupts = <0x00 0x12 0x04>; - clocks = <0x02 0x1a 0x02 0x14b>; - clock-names = "baudclk\0apb_pclk"; - reg-shift = <0x02>; - reg-io-width = <0x04>; - dmas = <0x2b 0x06 0x2b 0x07>; - pinctrl-names = "default"; - pinctrl-0 = <0x52 0x53 0x54>; - status = "disabled"; - phandle = <0xde>; - }; - - serial@ff170000 { - compatible = "rockchip,px30-uart\0snps,dw-apb-uart"; - reg = <0x00 0xff170000 0x00 0x100>; - interrupts = <0x00 0x13 0x04>; - clocks = <0x02 0x1b 0x02 0x14c>; - clock-names = "baudclk\0apb_pclk"; - reg-shift = <0x02>; - reg-io-width = <0x04>; - dmas = <0x2b 0x08 0x2b 0x09>; - pinctrl-names = "default"; - pinctrl-0 = <0x55 0x56 0x57>; - status = "disabled"; - phandle = <0xdf>; - }; - - serial@ff178000 { - compatible = "rockchip,px30-uart\0snps,dw-apb-uart"; - reg = <0x00 0xff178000 0x00 0x100>; - interrupts = <0x00 0x14 0x04>; - clocks = <0x02 0x1c 0x02 0x14d>; - clock-names = "baudclk\0apb_pclk"; - reg-shift = <0x02>; - reg-io-width = <0x04>; - dmas = <0x2b 0x0a 0x2b 0x0b>; - pinctrl-names = "default"; - pinctrl-0 = <0x58 0x59 0x5a>; - status = "disabled"; - phandle = <0xe0>; - }; - - i2c@ff180000 { - compatible = "rockchip,rk3399-i2c"; - reg = <0x00 0xff180000 0x00 0x1000>; - clocks = <0x02 0x1d 0x02 0x14e>; - clock-names = "i2c\0pclk"; - interrupts = <0x00 0x07 0x04>; - pinctrl-names = "default"; - pinctrl-0 = <0x5b>; - #address-cells = <0x01>; - #size-cells = <0x00>; - status = "okay"; - clock-frequency = <0x61a80>; - i2c-scl-rising-time-ns = <0x118>; - i2c-scl-falling-time-ns = <0x10>; - phandle = <0xe1>; - - pmic@20 { - compatible = "rockchip,rk817"; - reg = <0x20>; - interrupt-parent = <0x5c>; - interrupts = <0x0a 0x08>; - pinctrl-names = "default\0pmic-sleep\0pmic-power-off\0pmic-reset"; - pinctrl-0 = <0x5d>; - pinctrl-1 = <0x5e 0x5f>; - pinctrl-2 = <0x60 0x61>; - pinctrl-3 = <0x62 0x63>; - rockchip,system-power-controller; - wakeup-source; - #clock-cells = <0x01>; - clock-output-names = "rk808-clkout1\0rk808-clkout2"; - pmic-reset-func = <0x01>; - vcc1-supply = <0x64>; - vcc2-supply = <0x64>; - vcc3-supply = <0x64>; - vcc4-supply = <0x64>; - vcc5-supply = <0x64>; - vcc6-supply = <0x64>; - vcc7-supply = <0x64>; - vcc8-supply = <0x64>; - vcc9-supply = <0x65>; - phandle = <0xe2>; - - pwrkey { - status = "okay"; - }; - - pinctrl_rk8xx { - gpio-controller; - #gpio-cells = <0x02>; - phandle = <0xe3>; - - rk817_ts_gpio1 { - pins = "gpio_ts"; - function = "pin_fun1"; - phandle = <0xe4>; - }; - - rk817_gt_gpio2 { - pins = "gpio_gt"; - function = "pin_fun1"; - phandle = <0xe5>; - }; - - rk817_pin_ts { - pins = "gpio_ts"; - function = "pin_fun0"; - phandle = <0xe6>; - }; - - rk817_pin_gt { - pins = "gpio_gt"; - function = "pin_fun0"; - phandle = <0xe7>; - }; - - rk817_slppin_null { - pins = "gpio_slp"; - function = "pin_fun0"; - phandle = <0xe8>; - }; - - rk817_slppin_slp { - pins = "gpio_slp"; - function = "pin_fun1"; - phandle = <0x5f>; - }; - - rk817_slppin_pwrdn { - pins = "gpio_slp"; - function = "pin_fun2"; - phandle = <0x61>; - }; - - rk817_slppin_rst { - pins = "gpio_slp"; - function = "pin_fun3"; - phandle = <0x63>; - }; - }; - - regulators { - - DCDC_REG1 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0xe7ef0>; - regulator-max-microvolt = <0x118c30>; - regulator-ramp-delay = <0x1771>; - regulator-initial-mode = <0x02>; - regulator-name = "vdd_logic"; - phandle = <0x0e>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <0xe7ef0>; - }; - }; - - DCDC_REG2 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0xe7ef0>; - regulator-max-microvolt = <0x149970>; - regulator-ramp-delay = <0x1771>; - regulator-initial-mode = <0x02>; - regulator-name = "vdd_arm"; - phandle = <0x06>; - - regulator-state-mem { - regulator-off-in-suspend; - regulator-suspend-microvolt = <0xe7ef0>; - }; - }; - - DCDC_REG3 { - regulator-always-on; - regulator-boot-on; - regulator-initial-mode = <0x02>; - regulator-name = "vcc_ddr"; - phandle = <0xe9>; - - regulator-state-mem { - regulator-on-in-suspend; - }; - }; - - DCDC_REG4 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0x325aa0>; - regulator-max-microvolt = <0x325aa0>; - regulator-initial-mode = <0x02>; - regulator-name = "vcc_3v3"; - phandle = <0x4b>; - - regulator-state-mem { - regulator-off-in-suspend; - regulator-suspend-microvolt = <0x325aa0>; - }; - }; - - LDO_REG1 { - regulator-min-microvolt = <0xf4240>; - regulator-max-microvolt = <0xf4240>; - regulator-name = "vcc_1v0"; - phandle = <0xea>; - - regulator-state-mem { - regulator-off-in-suspend; - regulator-suspend-microvolt = <0xf4240>; - }; - }; - - LDO_REG2 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0x1b7740>; - regulator-max-microvolt = <0x1b7740>; - regulator-name = "vcc1v8_soc"; - phandle = <0x88>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <0x1b7740>; - }; - }; - - LDO_REG3 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0xf4240>; - regulator-max-microvolt = <0xf4240>; - regulator-name = "vcc1v0_soc"; - phandle = <0xeb>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <0xf4240>; - }; - }; - - LDO_REG4 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0x325aa0>; - regulator-max-microvolt = <0x325aa0>; - regulator-name = "vcc3v3_pmu"; - phandle = <0x29>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <0x325aa0>; - }; - }; - - LDO_REG5 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0x1b7740>; - regulator-max-microvolt = <0x1b7740>; - regulator-name = "vccio_sd"; - phandle = <0x4a>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <0x1b7740>; - }; - }; - - LDO_REG6 { - regulator-min-microvolt = <0x1b7740>; - regulator-max-microvolt = <0x2dc6c0>; - regulator-boot-on; - regulator-name = "vcc_sd"; - phandle = <0x93>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <0x2dc6c0>; - }; - }; - - LDO_REG7 { - regulator-min-microvolt = <0x325aa0>; - regulator-max-microvolt = <0x325aa0>; - regulator-name = "vcc_backlight"; - phandle = <0x9e>; - - regulator-state-mem { - regulator-off-in-suspend; - regulator-suspend-microvolt = <0x325aa0>; - }; - }; - - LDO_REG8 { - regulator-min-microvolt = <0x2ab980>; - regulator-max-microvolt = <0x2ab980>; - regulator-name = "vcc_lcd"; - phandle = <0x9f>; - - regulator-state-mem { - regulator-off-in-suspend; - regulator-suspend-microvolt = <0x2ab980>; - }; - }; - - BOOST { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0x4c4b40>; - regulator-max-microvolt = <0x5265c0>; - regulator-name = "boost"; - phandle = <0x65>; - }; - - OTG_SWITCH { - regulator-boot-on; - regulator-name = "otg_switch"; - phandle = <0xec>; - }; - }; - - battery { - compatible = "rk817,battery"; - ocv_table = <0xc5d 0xc94 0xcd0 0xd02 0xd34 0xd66 0xd98 0xdca 0xdfc 0xe2e 0xe56 0xe7e 0xea6 0xece 0xef6 0xf1e 0xf46 0xf6e 0xf96 0xf9b 0xfa0>; - design_capacity = <0xd34>; - design_qmax = <0xe86>; - bat_res = <0x64>; - sleep_enter_current = <0x12c>; - sleep_exit_current = <0x12c>; - sleep_filter_current = <0x64>; - power_off_thresd = <0xbb8>; - zero_algorithm_vol = <0xf0a>; - max_soc_offset = <0x3c>; - monitor_sec = <0x05>; - virtual_power = <0x00>; - sample_res = <0x0a>; - }; - - charger { - compatible = "rk817,charger"; - min_input_voltage = <0x1194>; - max_input_current = <0x5dc>; - max_chrg_current = <0x7d0>; - max_chrg_voltage = <0x1068>; - chrg_term_mode = <0x00>; - chrg_finish_cur = <0x34>; - virtual_power = <0x00>; - sample_res = <0x0a>; - dc_det_gpio = <0x5c 0x0b 0x00>; - bat_low_gpio = <0x66 0x0d 0x00>; - extcon = <0x67>; - }; - - codec { - #sound-dai-cells = <0x00>; - compatible = "rockchip,rk817-codec"; - clocks = <0x02 0x15>; - clock-names = "mclk"; - pinctrl-names = "default"; - pinctrl-0 = <0x68>; - hp-volume = <0x14>; - spk-volume = <0x03>; - status = "okay"; - phandle = <0xc3>; - }; - }; - }; - - i2c@ff190000 { - compatible = "rockchip,rk3399-i2c"; - reg = <0x00 0xff190000 0x00 0x1000>; - clocks = <0x02 0x1e 0x02 0x14f>; - clock-names = "i2c\0pclk"; - interrupts = <0x00 0x08 0x04>; - pinctrl-names = "default"; - pinctrl-0 = <0x69>; - #address-cells = <0x01>; - #size-cells = <0x00>; - status = "okay"; - clock-frequency = <0x61a80>; - phandle = <0xed>; - }; - - i2c@ff1a0000 { - compatible = "rockchip,rk3399-i2c"; - reg = <0x00 0xff1a0000 0x00 0x1000>; - clocks = <0x02 0x1f 0x02 0x150>; - clock-names = "i2c\0pclk"; - interrupts = <0x00 0x09 0x04>; - pinctrl-names = "default"; - pinctrl-0 = <0x6a>; - #address-cells = <0x01>; - #size-cells = <0x00>; - status = "disabled"; - phandle = <0xee>; - }; - - i2c@ff1b0000 { - compatible = "rockchip,rk3399-i2c"; - reg = <0x00 0xff1b0000 0x00 0x1000>; - clocks = <0x02 0x20 0x02 0x151>; - clock-names = "i2c\0pclk"; - interrupts = <0x00 0x0a 0x04>; - pinctrl-names = "default"; - pinctrl-0 = <0x6b>; - #address-cells = <0x01>; - #size-cells = <0x00>; - status = "disabled"; - phandle = <0xef>; - }; - - spi@ff1d0000 { - compatible = "rockchip,px30-spi\0rockchip,rk3066-spi"; - reg = <0x00 0xff1d0000 0x00 0x1000>; - interrupts = <0x00 0x1a 0x04>; - #address-cells = <0x01>; - #size-cells = <0x00>; - clocks = <0x02 0x24 0x02 0x155>; - clock-names = "spiclk\0apb_pclk"; - dmas = <0x2b 0x0c 0x2b 0x0d>; - dma-names = "tx\0rx"; - pinctrl-names = "default\0high_speed"; - pinctrl-0 = <0x6c 0x6d 0x6e 0x6f>; - pinctrl-1 = <0x70 0x6d 0x71 0x72>; - status = "disabled"; - phandle = <0xf0>; - }; - - spi@ff1d8000 { - compatible = "rockchip,px30-spi\0rockchip,rk3066-spi"; - reg = <0x00 0xff1d8000 0x00 0x1000>; - interrupts = <0x00 0x1b 0x04>; - #address-cells = <0x01>; - #size-cells = <0x00>; - clocks = <0x02 0x25 0x02 0x156>; - clock-names = "spiclk\0apb_pclk"; - dmas = <0x2b 0x0e 0x2b 0x0f>; - dma-names = "tx\0rx"; - pinctrl-names = "default\0high_speed"; - pinctrl-0 = <0x73 0x74 0x75 0x76 0x77>; - pinctrl-1 = <0x78 0x74 0x75 0x79 0x7a>; - status = "disabled"; - phandle = <0xf1>; - }; - - watchdog@ff1e0000 { - compatible = "snps,dw-wdt"; - reg = <0x00 0xff1e0000 0x00 0x100>; - clocks = <0x02 0x15b>; - interrupts = <0x00 0x25 0x04>; - resets = <0x02 0xb5>; - reset-names = "reset"; - status = "disabled"; - phandle = <0xf2>; - }; - - pwm@ff200000 { - compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm"; - reg = <0x00 0xff200000 0x00 0x10>; - #pwm-cells = <0x03>; - pinctrl-names = "active"; - pinctrl-0 = <0x7b>; - clocks = <0x02 0x22 0x02 0x153>; - clock-names = "pwm\0pclk"; - status = "okay"; - phandle = <0xbc>; - }; - - pwm@ff200010 { - compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm"; - reg = <0x00 0xff200010 0x00 0x10>; - #pwm-cells = <0x03>; - pinctrl-names = "active"; - pinctrl-0 = <0x7c>; - clocks = <0x02 0x22 0x02 0x153>; - clock-names = "pwm\0pclk"; - status = "okay"; - phandle = <0xc1>; - }; - - pwm@ff200020 { - compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm"; - reg = <0x00 0xff200020 0x00 0x10>; - #pwm-cells = <0x03>; - pinctrl-names = "active"; - pinctrl-0 = <0x7d>; - clocks = <0x02 0x22 0x02 0x153>; - clock-names = "pwm\0pclk"; - status = "disabled"; - phandle = <0xf3>; - }; - - pwm@ff200030 { - compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm"; - reg = <0x00 0xff200030 0x00 0x10>; - #pwm-cells = <0x03>; - pinctrl-names = "active"; - pinctrl-0 = <0x7e>; - clocks = <0x02 0x22 0x02 0x153>; - clock-names = "pwm\0pclk"; - status = "disabled"; - phandle = <0xf4>; - }; - - pwm@ff208000 { - compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm"; - reg = <0x00 0xff208000 0x00 0x10>; - #pwm-cells = <0x03>; - pinctrl-names = "active"; - pinctrl-0 = <0x7f>; - clocks = <0x02 0x23 0x02 0x154>; - clock-names = "pwm\0pclk"; - status = "disabled"; - phandle = <0xf5>; - }; - - pwm@ff208010 { - compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm"; - reg = <0x00 0xff208010 0x00 0x10>; - #pwm-cells = <0x03>; - pinctrl-names = "active"; - pinctrl-0 = <0x80>; - clocks = <0x02 0x23 0x02 0x154>; - clock-names = "pwm\0pclk"; - status = "disabled"; - phandle = <0xf6>; - }; - - pwm@ff208020 { - compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm"; - reg = <0x00 0xff208020 0x00 0x10>; - #pwm-cells = <0x03>; - pinctrl-names = "active"; - pinctrl-0 = <0x81>; - clocks = <0x02 0x23 0x02 0x154>; - clock-names = "pwm\0pclk"; - status = "disabled"; - phandle = <0xf7>; - }; - - pwm@ff208030 { - compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm"; - reg = <0x00 0xff208030 0x00 0x10>; - #pwm-cells = <0x03>; - pinctrl-names = "active"; - pinctrl-0 = <0x82>; - clocks = <0x02 0x23 0x02 0x154>; - clock-names = "pwm\0pclk"; - status = "disabled"; - phandle = <0xf8>; - }; - - rktimer@ff210000 { - compatible = "rockchip,rk3288-timer"; - reg = <0x00 0xff210000 0x00 0x1000>; - interrupts = <0x00 0x1e 0x04>; - clocks = <0x02 0x159 0x02 0x26>; - clock-names = "pclk\0timer"; - phandle = <0xf9>; - }; - - amba { - compatible = "simple-bus"; - #address-cells = <0x02>; - #size-cells = <0x02>; - ranges; - - dmac@ff240000 { - compatible = "arm,pl330\0arm,primecell"; - reg = <0x00 0xff240000 0x00 0x4000>; - interrupts = <0x00 0x01 0x04 0x00 0x02 0x04>; - clocks = <0x02 0xbb>; - clock-names = "apb_pclk"; - #dma-cells = <0x01>; - peripherals-req-type-burst; - phandle = <0x2b>; - }; - }; - - thermal-zones { - phandle = <0xfa>; - - soc-thermal { - polling-delay-passive = <0x14>; - polling-delay = <0x3e8>; - sustainable-power = <0x2ee>; - thermal-sensors = <0x83 0x00>; - phandle = <0xfb>; - - trips { - - trip-point-0 { - temperature = <0x11170>; - hysteresis = <0x7d0>; - type = "passive"; - phandle = <0xfc>; - }; - - trip-point-1 { - temperature = <0x14c08>; - hysteresis = <0x7d0>; - type = "passive"; - phandle = <0x84>; - }; - - soc-crit { - temperature = <0x1c138>; - hysteresis = <0x7d0>; - type = "critical"; - phandle = <0xfd>; - }; - }; - - cooling-maps { - - map0 { - trip = <0x84>; - cooling-device = <0x09 0xffffffff 0xffffffff>; - contribution = <0x1000>; - }; - - map1 { - trip = <0x84>; - cooling-device = <0x85 0xffffffff 0xffffffff>; - contribution = <0x1000>; - }; - }; - }; - - gpu-thermal { - polling-delay-passive = <0x64>; - polling-delay = <0x3e8>; - thermal-sensors = <0x83 0x01>; - phandle = <0xfe>; - }; - }; - - tsadc@ff280000 { - compatible = "rockchip,px30-tsadc"; - reg = <0x00 0xff280000 0x00 0x100>; - interrupts = <0x00 0x24 0x04>; - rockchip,grf = <0x2f>; - clocks = <0x02 0x2c 0x02 0x158>; - clock-names = "tsadc\0apb_pclk"; - assigned-clocks = <0x02 0x2c>; - assigned-clock-rates = <0xc350>; - resets = <0x02 0xa8>; - reset-names = "tsadc-apb"; - #thermal-sensor-cells = <0x01>; - rockchip,hw-tshut-temp = <0x1d4c0>; - status = "okay"; - pinctrl-names = "gpio\0otpout"; - pinctrl-0 = <0x86>; - pinctrl-1 = <0x87>; - phandle = <0x83>; - }; - - saradc@ff288000 { - compatible = "rockchip,px30-saradc\0rockchip,rk3399-saradc"; - reg = <0x00 0xff288000 0x00 0x100>; - interrupts = <0x00 0x54 0x04>; - #io-channel-cells = <0x01>; - clocks = <0x02 0x2d 0x02 0x157>; - clock-names = "saradc\0apb_pclk"; - resets = <0x02 0xa5>; - reset-names = "saradc-apb"; - status = "okay"; - vref-supply = <0x88>; - phandle = <0xbe>; - }; - - otp@ff290000 { - compatible = "rockchip,px30-otp"; - reg = <0x00 0xff290000 0x00 0x4000>; - #address-cells = <0x01>; - #size-cells = <0x01>; - clocks = <0x02 0x2f 0x02 0x15a 0x02 0x161>; - clock-names = "clk_otp\0pclk_otp\0pclk_otp_phy"; - resets = <0x02 0xb4>; - reset-names = "otp_phy"; - phandle = <0xff>; - - id@7 { - reg = <0x07 0x10>; - phandle = <0x0f>; - }; - - cpu-leakage@17 { - reg = <0x17 0x01>; - phandle = <0x07>; - }; - - performance@1e { - reg = <0x1e 0x01>; - bits = <0x04 0x03>; - phandle = <0x08>; - }; - }; - - clock-controller@ff2b0000 { - compatible = "rockchip,px30-cru"; - reg = <0x00 0xff2b0000 0x00 0x1000>; - rockchip,grf = <0x2f>; - rockchip,boost = <0x89>; - #clock-cells = <0x01>; - #reset-cells = <0x01>; - assigned-clocks = <0x02 0x04>; - assigned-clock-rates = <0x3dfd2400>; - phandle = <0x02>; - }; - - cpu-boost@ff2b8000 { - compatible = "syscon"; - reg = <0x00 0xff2b8000 0x00 0x1000>; - rockchip,boost-low-con0 = <0x1032>; - rockchip,boost-low-con1 = <0x1441>; - rockchip,boost-high-con0 = <0x1036>; - rockchip,boost-high-con1 = <0x1441>; - rockchip,boost-backup-pll = <0x01>; - rockchip,boost-backup-pll-usage = <0x00>; - rockchip,boost-switch-threshold = <0x249f00>; - rockchip,boost-statis-threshold = <0x100>; - rockchip,boost-statis-enable = <0x00>; - rockchip,boost-enable = <0x00>; - phandle = <0x89>; - }; - - pmu-clock-controller@ff2bc000 { - compatible = "rockchip,px30-pmucru"; - reg = <0x00 0xff2bc000 0x00 0x1000>; - rockchip,grf = <0x2f>; - #clock-cells = <0x01>; - #reset-cells = <0x01>; - assigned-clocks = <0x2a 0x01 0x2a 0x08 0x2a 0x05 0x02 0x07 0x02 0xab 0x02 0xb0 0x02 0xf0 0x02 0xf5 0x02 0x140 0x02 0x49>; - assigned-clock-rates = <0x47868c00 0x5f5e100 0x18cba80 0x23c34600 0xbebc200 0xbebc200 0x8f0d180 0x8f0d180 0x5f5e100 0xbebc200>; - phandle = <0x2a>; - }; - - syscon@ff2c0000 { - compatible = "rockchip,px30-usb2phy-grf\0syscon\0simple-mfd"; - reg = <0x00 0xff2c0000 0x00 0x10000>; - #address-cells = <0x01>; - #size-cells = <0x01>; - phandle = <0x100>; - - usb2-phy@100 { - compatible = "rockchip,px30-usb2phy\0rockchip,rk3328-usb2phy"; - reg = <0x100 0x10>; - clocks = <0x2a 0x0a>; - clock-names = "phyclk"; - #clock-cells = <0x00>; - assigned-clocks = <0x02 0x0e 0x02 0x55>; - assigned-clock-parents = <0x67 0x02 0x0e>; - clock-output-names = "usb480m_phy"; - status = "okay"; - phandle = <0x67>; - - host-port { - #phy-cells = <0x00>; - interrupts = <0x00 0x44 0x04>; - interrupt-names = "linestate"; - status = "okay"; - phandle = <0x8c>; - }; - - otg-port { - #phy-cells = <0x00>; - interrupts = <0x00 0x42 0x04 0x00 0x41 0x04 0x00 0x40 0x04>; - interrupt-names = "otg-bvalid\0otg-id\0linestate"; - status = "disabled"; - phandle = <0x8b>; - }; - }; - }; - - video-phy@ff2e0000 { - compatible = "rockchip,px30-video-phy"; - reg = <0x00 0xff2e0000 0x00 0x10000 0x00 0xff450000 0x00 0x10000>; - clocks = <0x2a 0x0b 0x02 0x145 0x02 0x144>; - clock-names = "ref\0pclk_phy\0pclk_host"; - #clock-cells = <0x00>; - resets = <0x02 0x3e>; - reset-names = "rst"; - power-domains = <0x8a 0x0c>; - #phy-cells = <0x00>; - status = "okay"; - phandle = <0x4c>; - }; - - mipi-dphy-rx0@ff2f0000 { - compatible = "rockchip,rk3326-mipi-dphy"; - reg = <0x00 0xff2f0000 0x00 0x4000>; - clocks = <0x02 0x146>; - clock-names = "dphy-ref"; - power-domains = <0x8a 0x0d>; - rockchip,grf = <0x2f>; - status = "okay"; - phandle = <0x101>; - }; - - usb@ff300000 { - compatible = "rockchip,px30-usb\0rockchip,rk3066-usb\0snps,dwc2"; - reg = <0x00 0xff300000 0x00 0x40000>; - interrupts = <0x00 0x3e 0x04>; - clocks = <0x02 0x102>; - clock-names = "otg"; - power-domains = <0x8a 0x05>; - dr_mode = "otg"; - g-np-tx-fifo-size = <0x10>; - g-rx-fifo-size = <0x118>; - g-tx-fifo-size = <0x100 0x80 0x80 0x40 0x20 0x10>; - g-use-dma; - phys = <0x8b>; - phy-names = "usb2-phy"; - status = "okay"; - phandle = <0x102>; - }; - - usb@ff340000 { - compatible = "generic-ehci"; - reg = <0x00 0xff340000 0x00 0x10000>; - interrupts = <0x00 0x3c 0x04>; - clocks = <0x02 0x103 0x67>; - clock-names = "usbhost\0utmi"; - power-domains = <0x8a 0x05>; - phys = <0x8c>; - phy-names = "usb"; - status = "disabled"; - phandle = <0x103>; - }; - - usb@ff350000 { - compatible = "generic-ohci"; - reg = <0x00 0xff350000 0x00 0x10000>; - interrupts = <0x00 0x3d 0x04>; - clocks = <0x02 0x103 0x67>; - clock-names = "usbhost\0utmi"; - power-domains = <0x8a 0x05>; - phys = <0x8c>; - phy-names = "usb"; - status = "disabled"; - phandle = <0x104>; - }; - - ethernet@ff360000 { - compatible = "rockchip,px30-gmac"; - reg = <0x00 0xff360000 0x00 0x10000>; - rockchip,grf = <0x2f>; - interrupts = <0x00 0x2b 0x04>; - interrupt-names = "macirq"; - clocks = <0x02 0x3e 0x02 0x3f 0x02 0x3f 0x02 0x40 0x02 0x41 0x02 0xb2 0x02 0x143 0x02 0x4c>; - clock-names = "stmmaceth\0mac_clk_rx\0mac_clk_tx\0clk_mac_ref\0clk_mac_refout\0aclk_mac\0pclk_mac\0clk_mac_speed"; - phy-mode = "rmii"; - pinctrl-names = "default"; - pinctrl-0 = <0x8d 0x8e>; - resets = <0x02 0x5e>; - reset-names = "stmmaceth"; - power-domains = <0x8a 0x09>; - status = "disabled"; - phandle = <0x105>; - }; - - dwmmc@ff370000 { - compatible = "rockchip,px30-dw-mshc\0rockchip,rk3288-dw-mshc"; - reg = <0x00 0xff370000 0x00 0x4000>; - max-frequency = <0x8f0d180>; - clocks = <0x02 0xf7 0x02 0x3b 0x02 0x43 0x02 0x44>; - clock-names = "biu\0ciu\0ciu-drv\0ciu-sample"; - assigned-clocks = <0x02 0x3b>; - assigned-clock-parents = <0x02 0x57>; - power-domains = <0x8a 0x07>; - fifo-depth = <0x100>; - interrupts = <0x00 0x36 0x04>; - pinctrl-names = "default"; - pinctrl-0 = <0x8f 0x90 0x91 0x92>; - status = "okay"; - bus-width = <0x04>; - cap-mmc-highspeed; - cap-sd-highspeed; - supports-sd; - card-detect-delay = <0x320>; - ignore-pm-notify; - cd-gpios = <0x5c 0x03 0x01>; - sd-uhs-sdr12; - sd-uhs-sdr25; - sd-uhs-sdr50; - sd-uhs-sdr104; - vqmmc-supply = <0x4a>; - vmmc-supply = <0x93>; - phandle = <0x106>; - }; - - dwmmc@ff380000 { - compatible = "rockchip,px30-dw-mshc\0rockchip,rk3288-dw-mshc"; - reg = <0x00 0xff380000 0x00 0x4000>; - max-frequency = <0x8f0d180>; - clocks = <0x02 0xff 0x02 0x38 0x02 0x45 0x02 0x46>; - clock-names = "biu\0ciu\0ciu-drv\0ciu-sample"; - assigned-clocks = <0x02 0x38>; - assigned-clock-parents = <0x02 0x51>; - power-domains = <0x8a 0x0a>; - fifo-depth = <0x100>; - interrupts = <0x00 0x37 0x04>; - pinctrl-names = "default"; - pinctrl-0 = <0x94 0x95 0x96>; - status = "okay"; - bus-width = <0x04>; - cap-mmc-highspeed; - cap-sd-highspeed; - supports-sd; - card-detect-delay = <0x320>; - ignore-pm-notify; - cd-gpios = <0x97 0x0e 0x01>; - sd-uhs-sdr12; - sd-uhs-sdr25; - sd-uhs-sdr50; - sd-uhs-sdr104; - vqmmc-supply = <0x4a>; - vmmc-supply = <0x93>; - phandle = <0x107>; - }; - - dwmmc@ff390000 { - compatible = "rockchip,px30-dw-mshc\0rockchip,rk3288-dw-mshc"; - reg = <0x00 0xff390000 0x00 0x4000>; - max-frequency = <0x8f0d180>; - clocks = <0x02 0x100 0x02 0x39 0x02 0x47 0x02 0x48>; - clock-names = "biu\0ciu\0ciu-drv\0ciu-sample"; - assigned-clocks = <0x02 0x39>; - assigned-clock-parents = <0x02 0x53>; - power-domains = <0x8a 0x0a>; - fifo-depth = <0x100>; - interrupts = <0x00 0x35 0x04>; - status = "disabled"; - phandle = <0x108>; - }; - - nandc@ff3b0000 { - compatible = "rockchip,rk-nandc"; - reg = <0x00 0xff3b0000 0x00 0x4000>; - interrupts = <0x00 0x39 0x04>; - nandc_id = <0x00>; - clocks = <0x02 0x37 0x02 0xfe>; - clock-names = "clk_nandc\0hclk_nandc"; - assigned-clocks = <0x02 0x37>; - assigned-clock-parents = <0x02 0x4f>; - power-domains = <0x8a 0x0a>; - status = "disabled"; - phandle = <0x109>; - }; - - sfc@ff3a0000 { - compatible = "rockchip,sfc"; - reg = <0x00 0xff3a0000 0x00 0x4000>; - interrupts = <0x00 0x38 0x04>; - clocks = <0x02 0x3a 0x02 0x101>; - clock-names = "clk_sfc\0hclk_sfc"; - assigned-clocks = <0x02 0x3a>; - assigned-clock-rates = <0x989680>; - status = "disabled"; - phandle = <0x10a>; - }; - - gpu@ff400000 { - compatible = "arm,malit602\0arm,malit60x\0arm,malit6xx\0arm,mali-midgard"; - reg = <0x00 0xff400000 0x00 0x4000>; - interrupts = <0x00 0x2d 0x04 0x00 0x2e 0x04 0x00 0x2f 0x04>; - interrupt-names = "GPU\0MMU\0JOB"; - clocks = <0x02 0x49>; - clock-names = "clk_mali"; - power-domains = <0x8a 0x0e>; - #cooling-cells = <0x02>; - operating-points-v2 = <0x98>; - status = "okay"; - mali-supply = <0x0e>; - phandle = <0x85>; - - power_model { - compatible = "arm,mali-simple-power-model"; - static-coefficient = <0x64578>; - dynamic-coefficient = <0x2dd>; - ts = <0x7d00 0x125c 0xffffffb0 0x02>; - thermal-zone = "gpu-thermal"; - }; - }; - - gpu-opp-table { - compatible = "operating-points-v2"; - rockchip,thermal-zone = "soc-thermal"; - rockchip,temp-hysteresis = <0x1388>; - rockchip,low-temp = <0x00>; - rockchip,low-temp-min-volt = <0xf4240>; - rockchip,low-temp-adjust-volt = <0x00 0x1e0 0xc350>; - rockchip,max-volt = <0x11edd8>; - rockchip,evb-irdrop = <0x61a8>; - rockchip,pvtm-voltage-sel = <0x00 0xc350 0x00 0xc351 0xd2f0 0x01 0xd2f1 0xea60 0x02 0xea61 0x1869f 0x03>; - rockchip,pvtm-ch = <0x00 0x00>; - phandle = <0x98>; - - opp-400000000 { - opp-hz = <0x00 0x17d78400>; - opp-microvolt = <0x100590>; - opp-microvolt-L0 = <0x100590>; - opp-microvolt-L1 = <0xfa3e8>; - opp-microvolt-L2 = <0xee098>; - opp-microvolt-L3 = <0xe7ef0>; - }; - - opp-480000000 { - opp-hz = <0x00 0x1c9c3800>; - opp-microvolt = <0x112a88>; - opp-microvolt-L0 = <0x112a88>; - opp-microvolt-L1 = <0x10c8e0>; - opp-microvolt-L2 = <0x100590>; - opp-microvolt-L3 = <0xf4240>; - }; - - opp-520000000 { - opp-hz = <0x00 0x1efe9200>; - opp-microvolt = <0x118c30>; - opp-microvolt-L0 = <0x118c30>; - opp-microvolt-L1 = <0x118c30>; - opp-microvolt-L2 = <0x10c8e0>; - opp-microvolt-L3 = <0x100590>; - }; - }; - - hevc_service@ff440000 { - compatible = "rockchip,hevc_sub"; - iommu_enabled = <0x01>; - reg = <0x00 0xff440000 0x00 0x400>; - interrupts = <0x00 0x31 0x04>; - interrupt-names = "irq_dec"; - dev_mode = <0x01>; - iommus = <0x99>; - allocator = <0x01>; - phandle = <0x9c>; - }; - - vpu_service@ff442000 { - compatible = "rockchip,vpu_sub"; - iommu_enabled = <0x01>; - reg = <0x00 0xff442000 0x00 0x800>; - interrupts = <0x00 0x50 0x04 0x00 0x4f 0x04>; - interrupt-names = "irq_enc\0irq_dec"; - dev_mode = <0x00>; - iommus = <0x9a>; - allocator = <0x01>; - phandle = <0x9b>; - }; - - vpu_combo { - compatible = "rockchip,vpu_combo"; - subcnt = <0x02>; - rockchip,grf = <0x2f>; - rockchip,sub = <0x9b 0x9c>; - clocks = <0x02 0xaf 0x02 0xf4 0x02 0x4b>; - clock-names = "aclk_vcodec\0hclk_vcodec\0clk_core"; - resets = <0x02 0x24 0x02 0x26 0x02 0x25 0x02 0x27 0x02 0x3f>; - reset-names = "video_a\0video_h\0niu_a\0niu_h\0video_core"; - power-domains = <0x8a 0x0b>; - mode_bit = <0x0f>; - mode_ctrl = <0x410>; - status = "okay"; - phandle = <0x10b>; - }; - - iommu@ff440440 { - compatible = "rockchip,iommu"; - reg = <0x00 0xff440440 0x00 0x40 0x00 0xff440480 0x00 0x40>; - interrupts = <0x00 0x32 0x04>; - interrupt-names = "hevc_mmu"; - clocks = <0x02 0xaf 0x02 0xf4>; - clock-names = "aclk\0hclk"; - power-domains = <0x8a 0x0b>; - #iommu-cells = <0x00>; - phandle = <0x99>; - }; - - iommu@ff442800 { - compatible = "rockchip,iommu"; - reg = <0x00 0xff442800 0x00 0x100>; - interrupts = <0x00 0x51 0x04>; - interrupt-names = "vpu_mmu"; - clocks = <0x02 0xaf 0x02 0xf4>; - clock-names = "aclk\0hclk"; - power-domains = <0x8a 0x0b>; - #iommu-cells = <0x00>; - phandle = <0x9a>; - }; - - dsi@ff450000 { - compatible = "rockchip,px30-mipi-dsi"; - reg = <0x00 0xff450000 0x00 0x10000>; - interrupts = <0x00 0x4b 0x04>; - clocks = <0x02 0x144 0x4c>; - clock-names = "pclk\0hs_clk"; - resets = <0x02 0x3d>; - reset-names = "apb"; - phys = <0x4c>; - phy-names = "mipi_dphy"; - power-domains = <0x8a 0x0c>; - rockchip,grf = <0x2f>; - #address-cells = <0x01>; - #size-cells = <0x00>; - status = "okay"; - phandle = <0x10c>; - - ports { - #address-cells = <0x01>; - #size-cells = <0x00>; - - port@0 { - reg = <0x00>; - #address-cells = <0x01>; - #size-cells = <0x00>; - - endpoint@0 { - reg = <0x00>; - remote-endpoint = <0x13>; - status = "okay"; - phandle = <0xa3>; - }; - }; - }; - - panel@0 { - compatible = "elida,kd35t133\0simple-panel-dsi"; - reg = <0x00>; - backlight = <0x9d>; - backlight-supply = <0x9e>; - power-supply = <0x9f>; - reset-gpios = <0x97 0x10 0x01>; - reset-delay-ms = <0x96>; - init-delay-ms = <0x14>; - enable-delay-ms = <0x78>; - prepare-delay-ms = <0x14>; - unprepare-delay-ms = <0x14>; - disable-delay-ms = <0x32>; - width-mm = <0x34>; - height-mm = <0x46>; - dsi,flags = <0xa03>; - dsi,format = <0x00>; - dsi,lanes = <0x04>; - panel-init-sequence = [15 00 02 ff 30 15 00 02 ff 52 15 00 02 ff 01 15 00 02 e3 00 15 00 02 04 00 15 00 02 05 03 15 00 02 24 12 15 00 02 25 1e 15 00 02 26 6f 15 00 02 27 52 15 00 02 28 67 15 00 02 29 01 15 00 02 2a df 15 00 02 37 9c 15 00 02 38 a7 15 00 02 39 53 15 00 02 44 00 15 00 02 49 3c 15 00 02 59 fe 15 00 02 5c 00 15 00 02 80 20 15 00 02 91 77 15 00 02 92 77 15 00 02 a0 55 15 00 02 a1 50 15 00 02 a4 9c 15 00 02 a7 02 15 00 02 a8 01 15 00 02 a9 21 15 00 02 aa fc 15 00 02 ab 28 15 00 02 ac 06 15 00 02 ad 06 15 00 02 ae 06 15 00 02 af 03 15 00 02 b0 08 15 00 02 b1 26 15 00 02 b2 28 15 00 02 b3 28 15 00 02 b4 33 15 00 02 b5 08 15 00 02 b6 26 15 00 02 b7 08 15 00 02 b8 26 15 00 02 c0 00 15 00 02 c1 00 15 00 02 c2 00 15 00 02 ff 30 15 00 02 ff 52 15 00 02 ff 02 15 00 02 b0 0b 15 00 02 b1 16 15 00 02 b2 17 15 00 02 b3 2c 15 00 02 b4 32 15 00 02 b5 3b 15 00 02 b6 29 15 00 02 b7 40 15 00 02 b8 0d 15 00 02 b9 05 15 00 02 ba 12 15 00 02 bb 10 15 00 02 bc 12 15 00 02 bd 15 15 00 02 be 19 15 00 02 bf 0e 15 00 02 c0 16 15 00 02 c1 0a 15 00 02 d0 0c 15 00 02 d1 17 15 00 02 d2 14 15 00 02 d3 2e 15 00 02 d4 32 15 00 02 d5 3c 15 00 02 d6 22 15 00 02 d7 3d 15 00 02 d8 0d 15 00 02 d9 07 15 00 02 da 13 15 00 02 db 13 15 00 02 dc 11 15 00 02 dd 15 15 00 02 de 19 15 00 02 df 10 15 00 02 e0 17 15 00 02 e1 0a 15 00 02 ff 30 15 00 02 ff 52 15 00 02 ff 03 15 00 02 00 2a 15 00 02 01 2a 15 00 02 02 2a 15 00 02 03 2a 15 00 02 04 61 15 00 02 05 80 15 00 02 06 c7 15 00 02 07 01 15 00 02 08 82 15 00 02 09 83 15 00 02 30 2a 15 00 02 31 2a 15 00 02 32 2a 15 00 02 33 2a 15 00 02 34 a1 15 00 02 35 c5 15 00 02 36 80 15 00 02 37 23 15 00 02 40 82 15 00 02 41 83 15 00 02 42 80 15 00 02 43 81 15 00 02 44 55 15 00 02 45 e6 15 00 02 46 e5 15 00 02 47 55 15 00 02 48 e8 15 00 02 49 e7 15 00 02 50 02 15 00 02 51 01 15 00 02 52 04 15 00 02 53 03 15 00 02 54 55 15 00 02 55 ea 15 00 02 56 e9 15 00 02 57 55 15 00 02 58 ec 15 00 02 59 eb 15 00 02 7e 02 15 00 02 7f 80 15 00 02 e0 5a 15 00 02 b1 00 15 00 02 b4 0e 15 00 02 b5 0f 15 00 02 b6 04 15 00 02 b7 07 15 00 02 b8 06 15 00 02 b9 05 15 00 02 ba 0f 15 00 02 c7 00 15 00 02 ca 0e 15 00 02 cb 0f 15 00 02 cc 04 15 00 02 cd 07 15 00 02 ce 06 15 00 02 cf 05 15 00 02 d0 0f 15 00 02 81 0f 15 00 02 84 0e 15 00 02 85 0f 15 00 02 86 07 15 00 02 87 04 15 00 02 88 05 15 00 02 89 06 15 00 02 8a 00 15 00 02 97 0f 15 00 02 9a 0e 15 00 02 9b 0f 15 00 02 9c 07 15 00 02 9d 04 15 00 02 9e 05 15 00 02 9f 06 15 00 02 a0 00 15 00 02 ff 30 15 00 02 ff 52 15 00 02 ff 02 15 00 02 01 01 15 00 02 02 da 15 00 02 03 ba 15 00 02 04 a8 15 00 02 05 9a 15 00 02 06 70 15 00 02 07 ff 15 00 02 08 91 15 00 02 09 90 15 00 02 0a ff 15 00 02 0b 8f 15 00 02 0c 60 15 00 02 0d 58 15 00 02 0e 48 15 00 02 0f 38 15 00 02 10 2b 15 00 02 ff 30 15 00 02 ff 52 15 00 02 ff 00 15 00 02 36 02 15 00 02 3a 70 05 c8 01 11 05 14 01 29]; - panel-exit-sequence = <0x5140128 0x50a0110>; - - display-timings { - native-mode = <0xa0>; - - 60Hz { - clock-frequency = <0x1ba8140>; - hactive = <0x280>; - vactive = <0x1e0>; - hfront-porch = <0x2e>; - hsync-len = <0x02>; - hback-porch = <0x2c>; - vfront-porch = <0x10>; - vsync-len = <0x02>; - vback-porch = <0x0e>; - hsync-active = <0x00>; - vsync-active = <0x00>; - de-active = <0x00>; - pixelclk-active = <0x01>; - phandle = <0xa0>; - }; - - 50Hz { - clock-frequency = <0x1ba8140>; - hactive = <0x280>; - vactive = <0x1e0>; - hfront-porch = <0x2e>; - hsync-len = <0x02>; - hback-porch = <0x2c>; - vfront-porch = <0x10>; - vsync-len = <0x02>; - vback-porch = <0x0e>; - hsync-active = <0x00>; - vsync-active = <0x00>; - de-active = <0x00>; - pixelclk-active = <0x01>; - phandle = <0xa00>; - }; - - 75Hz { - clock-frequency = <0x1ba8140>; - hactive = <0x280>; - vactive = <0x1e0>; - hfront-porch = <0x2e>; - hsync-len = <0x02>; - hback-porch = <0x2c>; - vfront-porch = <0x10>; - vsync-len = <0x02>; - vback-porch = <0x0e>; - hsync-active = <0x00>; - vsync-active = <0x00>; - de-active = <0x00>; - pixelclk-active = <0x01>; - phandle = <0xa01>; - }; - }; - }; - }; - - vop@ff460000 { - compatible = "rockchip,px30-vop-big"; - reg = <0x00 0xff460000 0x00 0x1fc 0x00 0xff460a00 0x00 0x400>; - rockchip,grf = <0x2f>; - reg-names = "regs\0gamma_lut"; - interrupts = <0x00 0x4d 0x04>; - clocks = <0x02 0xb5 0x02 0x96 0x02 0xfb>; - clock-names = "aclk_vop\0dclk_vop\0hclk_vop"; - power-domains = <0x8a 0x0c>; - iommus = <0xa1>; - status = "okay"; - phandle = <0x10f>; - - port { - #address-cells = <0x01>; - #size-cells = <0x00>; - phandle = <0x10>; - - endpoint@0 { - reg = <0x00>; - remote-endpoint = <0xa2>; - phandle = <0x12>; - }; - - endpoint@1 { - reg = <0x01>; - remote-endpoint = <0xa3>; - phandle = <0x13>; - }; - - endpoint@2 { - reg = <0x02>; - remote-endpoint = <0xa4>; - phandle = <0x14>; - }; - }; - }; - - iommu@ff460f00 { - compatible = "rockchip,iommu"; - reg = <0x00 0xff460f00 0x00 0x100>; - interrupts = <0x00 0x4d 0x04>; - interrupt-names = "vopb_mmu"; - clocks = <0x02 0xb5 0x02 0xfb>; - clock-names = "aclk\0hclk"; - power-domains = <0x8a 0x0c>; - #iommu-cells = <0x00>; - status = "okay"; - phandle = <0xa1>; - }; - - rk_rga@ff480000 { - compatible = "rockchip,rga2"; - reg = <0x00 0xff480000 0x00 0x1000>; - interrupts = <0x00 0x4c 0x04>; - clocks = <0x02 0xb7 0x02 0xfd 0x02 0x35>; - clock-names = "aclk_rga\0hclk_rga\0clk_rga"; - power-domains = <0x8a 0x0c>; - dma-coherent; - status = "okay"; - phandle = <0x110>; - }; - - cif@ff490000 { - compatible = "rockchip,cif"; - reg = <0x00 0xff490000 0x00 0x200>; - interrupts = <0x00 0x45 0x04>; - clocks = <0x02 0xb3 0x02 0xf9 0x02 0x160 0x02 0x34>; - clock-names = "aclk_cif0\0hclk_cif0\0pclk_cif\0cif0_out"; - resets = <0x02 0x2c 0x02 0x2d 0x02 0x2e>; - reset-names = "rst_cif_a\0rst_cif_h\0rst_cif_pclkin"; - power-domains = <0x8a 0x0d>; - pinctrl-names = "cif_pin_all"; - pinctrl-0 = <0xa5>; - iommus = <0xa6>; - status = "disabled"; - phandle = <0x111>; - }; - - cif-new@ff490000 { - compatible = "rockchip,px30-cif"; - reg = <0x00 0xff490000 0x00 0x200>; - interrupts = <0x00 0x45 0x04>; - clocks = <0x02 0xb3 0x02 0xf9 0x02 0x160 0x02 0x34>; - clock-names = "aclk_cif\0hclk_cif\0pclk_cif\0cif_out"; - resets = <0x02 0x2c 0x02 0x2d 0x02 0x2e>; - reset-names = "rst_cif_a\0rst_cif_h\0rst_cif_pclkin"; - power-domains = <0x8a 0x0d>; - iommus = <0xa6>; - status = "disabled"; - phandle = <0x112>; - }; - - iommu@ff490800 { - compatible = "rockchip,iommu"; - reg = <0x00 0xff490800 0x00 0x100>; - interrupts = <0x00 0x45 0x04>; - interrupt-names = "vip_mmu"; - clocks = <0x02 0xb3 0x02 0xf9>; - clock-names = "aclk\0hclk"; - power-domains = <0x8a 0x0d>; - rk_iommu,disable_reset_quirk; - #iommu-cells = <0x00>; - status = "okay"; - phandle = <0xa6>; - }; - - rk_isp@ff4a0000 { - compatible = "rockchip,px30-isp\0rockchip,isp"; - reg = <0x00 0xff4a0000 0x00 0x8000>; - interrupts = <0x00 0x46 0x04>; - clocks = <0x02 0xb4 0x02 0xfa 0x02 0x33 0x02 0x33 0x02 0x15f 0x02 0x34 0x02 0x34 0x02 0x146>; - clock-names = "aclk_isp\0hclk_isp\0clk_isp\0clk_isp_jpe\0pclkin_isp\0clk_cif_pll\0clk_cif_out\0pclk_dphyrx"; - resets = <0x02 0x2b 0x02 0x2f>; - reset-names = "rst_isp\0rst_mipicsiphy"; - power-domains = <0x8a 0x0d>; - pinctrl-names = "default\0isp_dvp8bit2\0isp_dvp10bit\0isp_dvp12bit"; - pinctrl-0 = <0xa7>; - pinctrl-1 = <0xa5>; - pinctrl-2 = <0xa5 0xa8>; - pinctrl-3 = <0xa9 0xa5 0xa8>; - rockchip,isp,mipiphy = <0x01>; - rockchip,isp,csiphy,reg = <0xff2f0000 0x4000>; - rockchip,grf = <0x2f>; - rockchip,cru = <0x02>; - rockchip,isp,iommu-enable = <0x01>; - iommus = <0xaa>; - status = "disabled"; - phandle = <0x113>; - }; - - rkisp1@ff4a0000 { - compatible = "rockchip,rk3326-rkisp1"; - reg = <0x00 0xff4a0000 0x00 0x8000>; - interrupts = <0x00 0x46 0x04 0x00 0x49 0x04 0x00 0x4a 0x04>; - interrupt-names = "isp_irq\0mi_irq\0mipi_irq"; - clocks = <0x02 0xb4 0x02 0xfa 0x02 0x33 0x02 0x15f>; - clock-names = "aclk_isp\0hclk_isp\0clk_isp\0pclk_isp"; - devfreq = <0xab>; - power-domains = <0x8a 0x0d>; - iommus = <0xaa>; - rockchip,grf = <0x2f>; - status = "okay"; - phandle = <0x114>; - }; - - iommu@ff4a8000 { - compatible = "rockchip,iommu"; - reg = <0x00 0xff4a8000 0x00 0x100>; - interrupts = <0x00 0x46 0x04>; - interrupt-names = "isp_mmu"; - clocks = <0x02 0xb4 0x02 0xfa>; - clock-names = "aclk\0hclk"; - power-domains = <0x8a 0x0d>; - rk_iommu,disable_reset_quirk; - #iommu-cells = <0x00>; - status = "okay"; - phandle = <0xaa>; - }; - - qos@ff518000 { - compatible = "syscon"; - reg = <0x00 0xff518000 0x00 0x20>; - phandle = <0x18>; - }; - - qos@ff520000 { - compatible = "syscon"; - reg = <0x00 0xff520000 0x00 0x20>; - phandle = <0x28>; - }; - - qos@ff52c000 { - compatible = "syscon"; - reg = <0x00 0xff52c000 0x00 0x20>; - phandle = <0x17>; - }; - - qos@ff538000 { - compatible = "syscon"; - reg = <0x00 0xff538000 0x00 0x20>; - phandle = <0x19>; - }; - - qos@ff538080 { - compatible = "syscon"; - reg = <0x00 0xff538080 0x00 0x20>; - phandle = <0x1a>; - }; - - qos@ff538100 { - compatible = "syscon"; - reg = <0x00 0xff538100 0x00 0x20>; - phandle = <0x1b>; - }; - - qos@ff538180 { - compatible = "syscon"; - reg = <0x00 0xff538180 0x00 0x20>; - phandle = <0x1c>; - }; - - qos@ff540000 { - compatible = "syscon"; - reg = <0x00 0xff540000 0x00 0x20>; - phandle = <0x15>; - }; - - qos@ff540080 { - compatible = "syscon"; - reg = <0x00 0xff540080 0x00 0x20>; - phandle = <0x16>; - }; - - qos@ff548000 { - compatible = "syscon"; - reg = <0x00 0xff548000 0x00 0x20>; - phandle = <0x23>; - }; - - qos@ff548080 { - compatible = "syscon"; - reg = <0x00 0xff548080 0x00 0x20>; - phandle = <0x24>; - }; - - qos@ff548100 { - compatible = "syscon"; - reg = <0x00 0xff548100 0x00 0x20>; - phandle = <0x25>; - }; - - qos@ff548180 { - compatible = "syscon"; - reg = <0x00 0xff548180 0x00 0x20>; - phandle = <0x26>; - }; - - qos@ff548200 { - compatible = "syscon"; - reg = <0x00 0xff548200 0x00 0x20>; - phandle = <0x27>; - }; - - qos@ff550000 { - compatible = "syscon"; - reg = <0x00 0xff550000 0x00 0x20>; - phandle = <0x1f>; - }; - - qos@ff550080 { - compatible = "syscon"; - reg = <0x00 0xff550080 0x00 0x20>; - phandle = <0x20>; - }; - - qos@ff550100 { - compatible = "syscon"; - reg = <0x00 0xff550100 0x00 0x20>; - phandle = <0x21>; - }; - - qos@ff550180 { - compatible = "syscon"; - reg = <0x00 0xff550180 0x00 0x20>; - phandle = <0x22>; - }; - - qos@ff558000 { - compatible = "syscon"; - reg = <0x00 0xff558000 0x00 0x20>; - phandle = <0x1d>; - }; - - qos@ff558080 { - compatible = "syscon"; - reg = <0x00 0xff558080 0x00 0x20>; - phandle = <0x1e>; - }; - - dfi@ff610000 { - reg = <0x00 0xff610000 0x00 0x400>; - compatible = "rockchip,px30-dfi"; - rockchip,pmugrf = <0xac>; - status = "okay"; - phandle = <0xad>; - }; - - dmc { - compatible = "rockchip,px30-dmc"; - interrupts = <0x00 0x69 0x04>; - interrupt-names = "complete_irq"; - devfreq-events = <0xad>; - clocks = <0x02 0x54>; - clock-names = "dmc_clk"; - operating-points-v2 = <0xae>; - ddr_timing = <0xaf>; - upthreshold = <0x28>; - downdifferential = <0x14>; - system-status-freq = <0x01 0x80e80 0x08 0x6ddd0 0x02 0x2f5d0 0x20 0x6ddd0 0x1000 0x80e80 0x4000 0xa2990 0x2000 0xa2990>; - auto-min-freq = <0x50140>; - auto-freq-en = <0x01>; - #cooling-cells = <0x02>; - status = "okay"; - center-supply = <0x0e>; - phandle = <0xab>; - - ddr_power_model { - compatible = "ddr_power_model"; - dynamic-power-coefficient = <0x78>; - static-power-coefficient = <0xc8>; - ts = <0x7d00 0x125c 0xffffffb0 0x02>; - thermal-zone = "soc-thermal"; - phandle = <0x115>; - }; - }; - - dmc-opp-table { - compatible = "operating-points-v2"; - rockchip,max-volt = <0x118c30>; - rockchip,evb-irdrop = <0x61a8>; - rockchip,pvtm-voltage-sel = <0x00 0xc350 0x00 0xc351 0xd2f0 0x01 0xd2f1 0xea60 0x02 0xea61 0x1869f 0x03>; - rockchip,pvtm-ch = <0x00 0x00>; - phandle = <0xae>; - - opp-528000000 { - opp-hz = <0x00 0x1f78a400>; - opp-microvolt = <0xee098>; - opp-microvolt-L0 = <0xee098>; - opp-microvolt-L1 = <0xee098>; - opp-microvolt-L2 = <0xe7ef0>; - opp-microvolt-L3 = <0xe7ef0>; - }; - - opp-666000000 { - opp-hz = <0x00 0x27b25a80>; - opp-microvolt = <0x100590>; - opp-microvolt-L0 = <0x100590>; - opp-microvolt-L1 = <0xf4240>; - opp-microvolt-L2 = <0xee098>; - opp-microvolt-L3 = <0xe7ef0>; - }; - - opp-786000000 { - opp-hz = <0x00 0x2ed96880>; - opp-microvolt = <0x10c8e0>; - opp-microvolt-L0 = <0x10c8e0>; - opp-microvolt-L1 = <0x100590>; - opp-microvolt-L2 = <0xfa3e8>; - opp-microvolt-L3 = <0xf4240>; - status = "okay"; - }; - }; - - rockchip-system-monitor { - compatible = "rockchip,system-monitor"; - rockchip,thermal-zone = "soc-thermal"; - rockchip,polling-delay = <0xc8>; - phandle = <0x116>; - }; - - pinctrl { - compatible = "rockchip,px30-pinctrl"; - rockchip,grf = <0x2f>; - rockchip,pmu = <0xac>; - #address-cells = <0x02>; - #size-cells = <0x02>; - ranges; - phandle = <0x117>; - - gpio0@ff040000 { - compatible = "rockchip,gpio-bank"; - reg = <0x00 0xff040000 0x00 0x100>; - interrupts = <0x00 0x03 0x04>; - clocks = <0x2a 0x14>; - gpio-controller; - #gpio-cells = <0x02>; - interrupt-controller; - #interrupt-cells = <0x02>; - phandle = <0x5c>; - }; - - gpio1@ff250000 { - compatible = "rockchip,gpio-bank"; - reg = <0x00 0xff250000 0x00 0x100>; - interrupts = <0x00 0x04 0x04>; - clocks = <0x02 0x15c>; - gpio-controller; - #gpio-cells = <0x02>; - interrupt-controller; - #interrupt-cells = <0x02>; - phandle = <0xbf>; - }; - - gpio2@ff260000 { - compatible = "rockchip,gpio-bank"; - reg = <0x00 0xff260000 0x00 0x100>; - interrupts = <0x00 0x05 0x04>; - clocks = <0x02 0x15d>; - gpio-controller; - #gpio-cells = <0x02>; - interrupt-controller; - #interrupt-cells = <0x02>; - phandle = <0x66>; - }; - - gpio3@ff270000 { - compatible = "rockchip,gpio-bank"; - reg = <0x00 0xff270000 0x00 0x100>; - interrupts = <0x00 0x06 0x04>; - clocks = <0x02 0x15e>; - gpio-controller; - #gpio-cells = <0x02>; - interrupt-controller; - #interrupt-cells = <0x02>; - phandle = <0x97>; - }; - - pcfg-pull-up { - bias-pull-up; - phandle = <0xb2>; - }; - - pcfg-pull-down { - bias-pull-down; - phandle = <0x118>; - }; - - pcfg-pull-none { - bias-disable; - phandle = <0xb1>; - }; - - pcfg-pull-none-2ma { - bias-disable; - drive-strength = <0x02>; - phandle = <0x119>; - }; - - pcfg-pull-up-2ma { - bias-pull-up; - drive-strength = <0x02>; - phandle = <0x11a>; - }; - - pcfg-pull-up-4ma { - bias-pull-up; - drive-strength = <0x04>; - phandle = <0xb3>; - }; - - pcfg-pull-none-4ma { - bias-disable; - drive-strength = <0x04>; - phandle = <0x11b>; - }; - - pcfg-pull-down-4ma { - bias-pull-down; - drive-strength = <0x04>; - phandle = <0x11c>; - }; - - pcfg-pull-none-8ma { - bias-disable; - drive-strength = <0x08>; - phandle = <0xb6>; - }; - - pcfg-pull-up-8ma { - bias-pull-up; - drive-strength = <0x08>; - phandle = <0xb4>; - }; - - pcfg-pull-none-12ma { - bias-disable; - drive-strength = <0x0c>; - phandle = <0xb8>; - }; - - pcfg-pull-up-12ma { - bias-pull-up; - drive-strength = <0x0c>; - phandle = <0xb7>; - }; - - pcfg-pull-none-smt { - bias-disable; - input-schmitt-enable; - phandle = <0xb0>; - }; - - pcfg-output-high { - output-high; - phandle = <0x11d>; - }; - - pcfg-output-low { - output-low; - phandle = <0xb9>; - }; - - pcfg-input-high { - bias-pull-up; - input-enable; - phandle = <0xb5>; - }; - - pcfg-input { - input-enable; - phandle = <0x11e>; - }; - - i2c0 { - - i2c0-xfer { - rockchip,pins = <0x00 0x08 0x01 0xb0 0x00 0x09 0x01 0xb0>; - phandle = <0x5b>; - }; - }; - - i2c1 { - - i2c1-xfer { - rockchip,pins = <0x00 0x12 0x01 0xb0 0x00 0x13 0x01 0xb0>; - phandle = <0x69>; - }; - }; - - i2c2 { - - i2c2-xfer { - rockchip,pins = <0x02 0x0f 0x02 0xb0 0x02 0x10 0x02 0xb0>; - phandle = <0x6a>; - }; - }; - - i2c3 { - - i2c3-xfer { - rockchip,pins = <0x01 0x0c 0x04 0xb0 0x01 0x0d 0x04 0xb0>; - phandle = <0x6b>; - }; - }; - - tsadc { - - tsadc-otp-gpio { - rockchip,pins = <0x00 0x06 0x00 0xb1>; - phandle = <0x86>; - }; - - tsadc-otp-out { - rockchip,pins = <0x00 0x06 0x01 0xb1>; - phandle = <0x87>; - }; - }; - - uart0 { - - uart0-xfer { - rockchip,pins = <0x00 0x0a 0x01 0xb2 0x00 0x0b 0x01 0xb2>; - phandle = <0x2c>; - }; - - uart0-cts { - rockchip,pins = <0x00 0x0c 0x01 0xb1>; - phandle = <0x2d>; - }; - - uart0-rts { - rockchip,pins = <0x00 0x0d 0x01 0xb1>; - phandle = <0x2e>; - }; - - uart0-rts-gpio { - rockchip,pins = <0x00 0x0d 0x00 0xb1>; - phandle = <0x11f>; - }; - }; - - uart1 { - - uart1-xfer { - rockchip,pins = <0x01 0x11 0x01 0xb2 0x01 0x10 0x01 0xb2>; - phandle = <0x4f>; - }; - - uart1-cts { - rockchip,pins = <0x01 0x12 0x01 0xb1>; - phandle = <0x50>; - }; - - uart1-rts { - rockchip,pins = <0x01 0x13 0x01 0xb1>; - phandle = <0x120>; - }; - - uart1-rts-gpio { - rockchip,pins = <0x01 0x13 0x00 0xb1>; - phandle = <0x121>; - }; - }; - - uart2-m0 { - - uart2m0-xfer { - rockchip,pins = <0x01 0x1a 0x02 0xb2 0x01 0x1b 0x02 0xb2>; - phandle = <0x51>; - }; - }; - - uart2-m1 { - - uart2m1-xfer { - rockchip,pins = <0x02 0x0c 0x02 0xb2 0x02 0x0e 0x02 0xb2>; - phandle = <0xba>; - }; - }; - - uart3-m0 { - - uart3m0-xfer { - rockchip,pins = <0x00 0x10 0x02 0xb2 0x00 0x11 0x02 0xb2>; - phandle = <0x122>; - }; - - uart3m0-cts { - rockchip,pins = <0x00 0x12 0x02 0xb1>; - phandle = <0x123>; - }; - - uart3m0-rts { - rockchip,pins = <0x00 0x13 0x02 0xb1>; - phandle = <0x124>; - }; - - uart3m0-rts-gpio { - rockchip,pins = <0x00 0x13 0x00 0xb1>; - phandle = <0x125>; - }; - }; - - uart3-m1 { - - uart3m1-xfer { - rockchip,pins = <0x01 0x0e 0x02 0xb2 0x01 0x0f 0x02 0xb2>; - phandle = <0x52>; - }; - - uart3m1-cts { - rockchip,pins = <0x01 0x0c 0x02 0xb1>; - phandle = <0x53>; - }; - - uart3m1-rts { - rockchip,pins = <0x01 0x0d 0x02 0xb1>; - phandle = <0x54>; - }; - - uart3m1-rts-gpio { - rockchip,pins = <0x01 0x0d 0x00 0xb1>; - phandle = <0x126>; - }; - }; - - uart4 { - - uart4-xfer { - rockchip,pins = <0x01 0x1c 0x02 0xb2 0x01 0x1d 0x02 0xb2>; - phandle = <0x55>; - }; - - uart4-cts { - rockchip,pins = <0x01 0x1e 0x02 0xb1>; - phandle = <0x56>; - }; - - uart4-rts { - rockchip,pins = <0x01 0x1f 0x02 0xb1>; - phandle = <0x57>; - }; - }; - - uart5 { - - uart5-xfer { - rockchip,pins = <0x03 0x02 0x04 0xb2 0x03 0x01 0x04 0xb2>; - phandle = <0x58>; - }; - - uart5-cts { - rockchip,pins = <0x03 0x03 0x04 0xb1>; - phandle = <0x59>; - }; - - uart5-rts { - rockchip,pins = <0x03 0x05 0x04 0xb1>; - phandle = <0x5a>; - }; - }; - - spi0 { - - spi0-clk { - rockchip,pins = <0x01 0x0f 0x03 0xb3>; - phandle = <0x6c>; - }; - - spi0-csn { - rockchip,pins = <0x01 0x0e 0x03 0xb3>; - phandle = <0x6d>; - }; - - spi0-miso { - rockchip,pins = <0x01 0x0d 0x03 0xb3>; - phandle = <0x6e>; - }; - - spi0-mosi { - rockchip,pins = <0x01 0x0c 0x03 0xb3>; - phandle = <0x6f>; - }; - - spi0-clk-hs { - rockchip,pins = <0x01 0x0f 0x03 0xb4>; - phandle = <0x70>; - }; - - spi0-miso-hs { - rockchip,pins = <0x01 0x0d 0x03 0xb4>; - phandle = <0x71>; - }; - - spi0-mosi-hs { - rockchip,pins = <0x01 0x0c 0x03 0xb4>; - phandle = <0x72>; - }; - }; - - spi1 { - - spi1-clk { - rockchip,pins = <0x03 0x0f 0x04 0xb3>; - phandle = <0x73>; - }; - - spi1-csn0 { - rockchip,pins = <0x03 0x09 0x04 0xb3>; - phandle = <0x74>; - }; - - spi1-csn1 { - rockchip,pins = <0x03 0x0a 0x02 0xb3>; - phandle = <0x75>; - }; - - spi1-miso { - rockchip,pins = <0x03 0x0e 0x04 0xb3>; - phandle = <0x76>; - }; - - spi1-mosi { - rockchip,pins = <0x03 0x0c 0x04 0xb3>; - phandle = <0x77>; - }; - - spi1-clk-hs { - rockchip,pins = <0x03 0x0f 0x04 0xb4>; - phandle = <0x78>; - }; - - spi1-miso-hs { - rockchip,pins = <0x03 0x0e 0x04 0xb4>; - phandle = <0x79>; - }; - - spi1-mosi-hs { - rockchip,pins = <0x03 0x0c 0x04 0xb4>; - phandle = <0x7a>; - }; - }; - - pdm { - - pdm-clk0m0 { - rockchip,pins = <0x03 0x16 0x02 0xb1>; - phandle = <0x44>; - }; - - pdm-clk0m1 { - rockchip,pins = <0x02 0x16 0x01 0xb1>; - phandle = <0x127>; - }; - - pdm-clk1 { - rockchip,pins = <0x03 0x17 0x02 0xb1>; - phandle = <0x45>; - }; - - pdm-sdi0m0 { - rockchip,pins = <0x03 0x1b 0x02 0xb1>; - phandle = <0x46>; - }; - - pdm-sdi0m1 { - rockchip,pins = <0x02 0x15 0x02 0xb1>; - phandle = <0x128>; - }; - - pdm-sdi1 { - rockchip,pins = <0x03 0x18 0x02 0xb1>; - phandle = <0x47>; - }; - - pdm-sdi2 { - rockchip,pins = <0x03 0x19 0x02 0xb1>; - phandle = <0x48>; - }; - - pdm-sdi3 { - rockchip,pins = <0x03 0x1a 0x02 0xb1>; - phandle = <0x49>; - }; - - pdm-clk0m0-sleep { - rockchip,pins = <0x03 0x16 0x00 0xb5>; - phandle = <0x129>; - }; - - pdm-clk0m1-sleep { - rockchip,pins = <0x02 0x16 0x00 0xb5>; - phandle = <0x12a>; - }; - - pdm-clk1-sleep { - rockchip,pins = <0x03 0x17 0x00 0xb5>; - phandle = <0x12b>; - }; - - pdm-sdi0m0-sleep { - rockchip,pins = <0x03 0x1b 0x00 0xb5>; - phandle = <0x12c>; - }; - - pdm-sdi0m1-sleep { - rockchip,pins = <0x02 0x15 0x00 0xb5>; - phandle = <0x12d>; - }; - - pdm-sdi1-sleep { - rockchip,pins = <0x03 0x18 0x00 0xb5>; - phandle = <0x12e>; - }; - - pdm-sdi2-sleep { - rockchip,pins = <0x03 0x19 0x00 0xb5>; - phandle = <0x12f>; - }; - - pdm-sdi3-sleep { - rockchip,pins = <0x03 0x1a 0x00 0xb5>; - phandle = <0x130>; - }; - }; - - i2s0 { - - i2s0-8ch-mclk { - rockchip,pins = <0x03 0x11 0x02 0xb1>; - phandle = <0x131>; - }; - - i2s0-8ch-sclktx { - rockchip,pins = <0x03 0x13 0x02 0xb1>; - phandle = <0x30>; - }; - - i2s0-8ch-sclkrx { - rockchip,pins = <0x03 0x0c 0x02 0xb1>; - phandle = <0x31>; - }; - - i2s0-8ch-lrcktx { - rockchip,pins = <0x03 0x12 0x02 0xb1>; - phandle = <0x32>; - }; - - i2s0-8ch-lrckrx { - rockchip,pins = <0x03 0x0d 0x02 0xb1>; - phandle = <0x33>; - }; - - i2s0-8ch-sdo0 { - rockchip,pins = <0x03 0x14 0x02 0xb1>; - phandle = <0x38>; - }; - - i2s0-8ch-sdo1 { - rockchip,pins = <0x03 0x10 0x02 0xb1>; - phandle = <0x39>; - }; - - i2s0-8ch-sdo2 { - rockchip,pins = <0x03 0x0f 0x02 0xb1>; - phandle = <0x3a>; - }; - - i2s0-8ch-sdo3 { - rockchip,pins = <0x03 0x0e 0x02 0xb1>; - phandle = <0x3b>; - }; - - i2s0-8ch-sdi0 { - rockchip,pins = <0x03 0x15 0x02 0xb1>; - phandle = <0x34>; - }; - - i2s0-8ch-sdi1 { - rockchip,pins = <0x03 0x0b 0x02 0xb1>; - phandle = <0x35>; - }; - - i2s0-8ch-sdi2 { - rockchip,pins = <0x03 0x09 0x02 0xb1>; - phandle = <0x36>; - }; - - i2s0-8ch-sdi3 { - rockchip,pins = <0x03 0x08 0x02 0xb1>; - phandle = <0x37>; - }; - }; - - i2s1 { - - i2s1-2ch-mclk { - rockchip,pins = <0x02 0x13 0x01 0xb1>; - phandle = <0x68>; - }; - - i2s1-2ch-sclk { - rockchip,pins = <0x02 0x12 0x01 0xb1>; - phandle = <0x3c>; - }; - - i2s1-2ch-lrck { - rockchip,pins = <0x02 0x11 0x01 0xb1>; - phandle = <0x3d>; - }; - - i2s1-2ch-sdi { - rockchip,pins = <0x02 0x15 0x01 0xb1>; - phandle = <0x3e>; - }; - - i2s1-2ch-sdo { - rockchip,pins = <0x02 0x14 0x01 0xb1>; - phandle = <0x3f>; - }; - }; - - i2s2 { - - i2s2-2ch-mclk { - rockchip,pins = <0x03 0x01 0x02 0xb1>; - phandle = <0x132>; - }; - - i2s2-2ch-sclk { - rockchip,pins = <0x03 0x02 0x02 0xb1>; - phandle = <0x40>; - }; - - i2s2-2ch-lrck { - rockchip,pins = <0x03 0x03 0x02 0xb1>; - phandle = <0x41>; - }; - - i2s2-2ch-sdi { - rockchip,pins = <0x03 0x05 0x02 0xb1>; - phandle = <0x42>; - }; - - i2s2-2ch-sdo { - rockchip,pins = <0x03 0x07 0x02 0xb1>; - phandle = <0x43>; - }; - }; - - sdmmc { - - sdmmc-clk { - rockchip,pins = <0x01 0x1e 0x01 0xb6>; - phandle = <0x8f>; - }; - - sdmmc-cmd { - rockchip,pins = <0x01 0x1f 0x01 0xb4>; - phandle = <0x90>; - }; - - sdmmc-det { - rockchip,pins = <0x00 0x03 0x01 0xb4>; - phandle = <0x91>; - }; - - sdmmc-bus1 { - rockchip,pins = <0x01 0x1a 0x01 0xb4>; - phandle = <0x133>; - }; - - sdmmc-bus4 { - rockchip,pins = <0x01 0x1a 0x01 0xb4 0x01 0x1b 0x01 0xb4 0x01 0x1c 0x01 0xb4 0x01 0x1d 0x01 0xb4>; - phandle = <0x92>; - }; - - sdmmc-gpio { - rockchip,pins = <0x01 0x1a 0x00 0xb3 0x01 0x1b 0x00 0xb3 0x01 0x1c 0x00 0xb3 0x01 0x1d 0x00 0xb3 0x01 0x1e 0x00 0xb3 0x01 0x1f 0x00 0xb3>; - phandle = <0x134>; - }; - }; - - sdio { - - sdio-clk { - rockchip,pins = <0x01 0x15 0x01 0xb1>; - phandle = <0x96>; - }; - - sdio-cmd { - rockchip,pins = <0x01 0x14 0x01 0xb2>; - phandle = <0x95>; - }; - - sdio-bus4 { - rockchip,pins = <0x01 0x16 0x01 0xb2 0x01 0x17 0x01 0xb2 0x01 0x18 0x01 0xb2 0x01 0x19 0x01 0xb2>; - phandle = <0x94>; - }; - - sdio-gpio { - rockchip,pins = <0x01 0x16 0x00 0xb2 0x01 0x17 0x00 0xb2 0x01 0x18 0x00 0xb2 0x01 0x19 0x00 0xb2 0x01 0x14 0x00 0xb2 0x01 0x15 0x00 0xb2>; - phandle = <0x135>; - }; - }; - - emmc { - - emmc-clk { - rockchip,pins = <0x01 0x09 0x02 0xb6>; - phandle = <0x136>; - }; - - emmc-cmd { - rockchip,pins = <0x01 0x0a 0x02 0xb4>; - phandle = <0x137>; - }; - - emmc-pwren { - rockchip,pins = <0x01 0x08 0x02 0xb1>; - phandle = <0x138>; - }; - - emmc-rstnout { - rockchip,pins = <0x01 0x0b 0x02 0xb1>; - phandle = <0x139>; - }; - - emmc-bus1 { - rockchip,pins = <0x01 0x00 0x02 0xb4>; - phandle = <0x13a>; - }; - - emmc-bus4 { - rockchip,pins = <0x01 0x00 0x02 0xb4 0x01 0x01 0x02 0xb4 0x01 0x02 0x02 0xb4 0x01 0x03 0x02 0xb4>; - phandle = <0x13b>; - }; - - emmc-bus8 { - rockchip,pins = <0x01 0x00 0x02 0xb4 0x01 0x01 0x02 0xb4 0x01 0x02 0x02 0xb4 0x01 0x03 0x02 0xb4 0x01 0x04 0x02 0xb4 0x01 0x05 0x02 0xb4 0x01 0x06 0x02 0xb4 0x01 0x07 0x02 0xb4>; - phandle = <0x13c>; - }; - }; - - flash { - - flash-cs0 { - rockchip,pins = <0x01 0x08 0x01 0xb1>; - phandle = <0x13d>; - }; - - flash-rdy { - rockchip,pins = <0x01 0x09 0x01 0xb1>; - phandle = <0x13e>; - }; - - flash-dqs { - rockchip,pins = <0x01 0x0a 0x01 0xb1>; - phandle = <0x13f>; - }; - - flash-ale { - rockchip,pins = <0x01 0x0b 0x01 0xb1>; - phandle = <0x140>; - }; - - flash-cle { - rockchip,pins = <0x01 0x0c 0x01 0xb1>; - phandle = <0x141>; - }; - - flash-wrn { - rockchip,pins = <0x01 0x0d 0x01 0xb1>; - phandle = <0x142>; - }; - - flash-csl { - rockchip,pins = <0x01 0x0e 0x01 0xb1>; - phandle = <0x143>; - }; - - flash-rdn { - rockchip,pins = <0x01 0x0f 0x01 0xb1>; - phandle = <0x144>; - }; - - flash-bus8 { - rockchip,pins = <0x01 0x00 0x01 0xb7 0x01 0x01 0x01 0xb7 0x01 0x02 0x01 0xb7 0x01 0x03 0x01 0xb7 0x01 0x04 0x01 0xb7 0x01 0x05 0x01 0xb7 0x01 0x06 0x01 0xb7 0x01 0x07 0x01 0xb7>; - phandle = <0x145>; - }; - }; - - lcdc { - - lcdc-m0-rgb-pins { - rockchip,pins = <0x03 0x00 0x01 0xb6 0x03 0x01 0x01 0xb6 0x03 0x02 0x01 0xb6 0x03 0x03 0x01 0xb6 0x03 0x04 0x01 0xb6 0x03 0x05 0x01 0xb6 0x03 0x06 0x01 0xb6 0x03 0x07 0x01 0xb6 0x03 0x08 0x01 0xb6 0x03 0x09 0x01 0xb6 0x03 0x0a 0x01 0xb6 0x03 0x0b 0x01 0xb6 0x03 0x0c 0x01 0xb6 0x03 0x0d 0x01 0xb6 0x03 0x0e 0x01 0xb6 0x03 0x0f 0x01 0xb6 0x03 0x10 0x01 0xb6 0x03 0x11 0x01 0xb6 0x03 0x12 0x01 0xb6 0x03 0x13 0x01 0xb6 0x03 0x14 0x01 0xb6 0x03 0x15 0x01 0xb6 0x03 0x16 0x01 0xb6 0x03 0x17 0x01 0xb6 0x03 0x18 0x01 0xb6 0x03 0x19 0x01 0xb6 0x03 0x1a 0x01 0xb6 0x03 0x1b 0x01 0xb6>; - phandle = <0x146>; - }; - - lcdc-m0-sleep-pins { - rockchip,pins = <0x03 0x00 0x00 0xb1 0x03 0x01 0x00 0xb1 0x03 0x02 0x00 0xb1 0x03 0x03 0x00 0xb1 0x03 0x04 0x00 0xb1 0x03 0x05 0x00 0xb1 0x03 0x06 0x00 0xb1 0x03 0x07 0x00 0xb1 0x03 0x08 0x00 0xb1 0x03 0x09 0x00 0xb1 0x03 0x0a 0x00 0xb1 0x03 0x0b 0x00 0xb1 0x03 0x0c 0x00 0xb1 0x03 0x0d 0x00 0xb1 0x03 0x0e 0x00 0xb1 0x03 0x0f 0x00 0xb1 0x03 0x10 0x00 0xb1 0x03 0x11 0x00 0xb1 0x03 0x12 0x00 0xb1 0x03 0x13 0x00 0xb1 0x03 0x14 0x00 0xb1 0x03 0x15 0x00 0xb1 0x03 0x16 0x00 0xb1 0x03 0x17 0x00 0xb1 0x03 0x18 0x00 0xb1 0x03 0x19 0x00 0xb1 0x03 0x1a 0x00 0xb1 0x03 0x1b 0x00 0xb1>; - phandle = <0x147>; - }; - - lcdc-m1-rgb-pins { - rockchip,pins = <0x03 0x00 0x01 0xb6 0x03 0x04 0x01 0xb6 0x03 0x06 0x01 0xb6 0x03 0x0a 0x01 0xb6 0x03 0x0b 0x01 0xb6 0x03 0x0d 0x01 0xb6 0x03 0x10 0x01 0xb6 0x03 0x11 0x01 0xb6 0x03 0x12 0x01 0xb6 0x03 0x13 0x01 0xb6 0x03 0x14 0x01 0xb6 0x03 0x15 0x01 0xb6 0x03 0x16 0x01 0xb6 0x03 0x17 0x01 0xb6 0x03 0x18 0x01 0xb6 0x03 0x19 0x01 0xb6 0x03 0x1a 0x01 0xb6 0x03 0x1b 0x01 0xb6>; - phandle = <0x4d>; - }; - - lcdc-m1-sleep-pins { - rockchip,pins = <0x03 0x00 0x00 0xb1 0x03 0x04 0x00 0xb1 0x03 0x06 0x00 0xb1 0x03 0x0a 0x00 0xb1 0x03 0x0b 0x00 0xb1 0x03 0x0d 0x00 0xb1 0x03 0x10 0x00 0xb1 0x03 0x11 0x00 0xb1 0x03 0x12 0x00 0xb1 0x03 0x13 0x00 0xb1 0x03 0x14 0x00 0xb1 0x03 0x15 0x00 0xb1 0x03 0x16 0x00 0xb1 0x03 0x17 0x00 0xb1 0x03 0x18 0x00 0xb1 0x03 0x19 0x00 0xb1 0x03 0x1a 0x00 0xb1 0x03 0x1b 0x00 0xb1>; - phandle = <0x4e>; - }; - }; - - pwm0 { - - pwm0-pin { - rockchip,pins = <0x00 0x0f 0x01 0xb1>; - phandle = <0x7b>; - }; - }; - - pwm1 { - - pwm1-pin { - rockchip,pins = <0x00 0x10 0x01 0xb1>; - phandle = <0x7c>; - }; - }; - - pwm2 { - - pwm2-pin { - rockchip,pins = <0x02 0x0d 0x01 0xb1>; - phandle = <0x7d>; - }; - }; - - pwm3 { - - pwm3-pin { - rockchip,pins = <0x00 0x11 0x01 0xb1>; - phandle = <0x7e>; - }; - }; - - pwm4 { - - pwm4-pin { - rockchip,pins = <0x03 0x12 0x03 0xb1>; - phandle = <0x7f>; - }; - }; - - pwm5 { - - pwm5-pin { - rockchip,pins = <0x03 0x13 0x03 0xb1>; - phandle = <0x80>; - }; - }; - - pwm6 { - - pwm6-pin { - rockchip,pins = <0x03 0x14 0x03 0xb1>; - phandle = <0x81>; - }; - }; - - pwm7 { - - pwm7-pin { - rockchip,pins = <0x03 0x15 0x03 0xb1>; - phandle = <0x82>; - }; - }; - - gmac { - - rmii-pins { - rockchip,pins = <0x02 0x00 0x02 0xb8 0x02 0x01 0x02 0xb8 0x02 0x02 0x02 0xb8 0x02 0x03 0x02 0xb1 0x02 0x04 0x02 0xb1 0x02 0x05 0x02 0xb1 0x02 0x06 0x02 0xb1 0x02 0x07 0x02 0xb1 0x02 0x09 0x02 0xb1>; - phandle = <0x8d>; - }; - - mac-refclk-12ma { - rockchip,pins = <0x02 0x0a 0x02 0xb8>; - phandle = <0x8e>; - }; - - mac-refclk { - rockchip,pins = <0x02 0x0a 0x02 0xb1>; - phandle = <0x148>; - }; - }; - - cif-m0 { - - cif-clkout-m0 { - rockchip,pins = <0x02 0x0b 0x01 0xb8>; - phandle = <0xa7>; - }; - - dvp-d2d9-m0 { - rockchip,pins = <0x02 0x00 0x01 0xb1 0x02 0x01 0x01 0xb1 0x02 0x02 0x01 0xb1 0x02 0x03 0x01 0xb1 0x02 0x04 0x01 0xb1 0x02 0x05 0x01 0xb1 0x02 0x06 0x01 0xb1 0x02 0x07 0x01 0xb1 0x02 0x08 0x01 0xb1 0x02 0x09 0x01 0xb1 0x02 0x0a 0x01 0xb1 0x02 0x0b 0x01 0xb1>; - phandle = <0xa5>; - }; - - dvp-d0d1-m0 { - rockchip,pins = <0x02 0x0c 0x01 0xb1 0x02 0x0e 0x01 0xb1>; - phandle = <0xa9>; - }; - - d10-d11-m0 { - rockchip,pins = <0x02 0x0f 0x01 0xb1 0x02 0x10 0x01 0xb1>; - phandle = <0xa8>; - }; - }; - - cif-m1 { - - cif-clkout-m1 { - rockchip,pins = <0x03 0x18 0x03 0xb1>; - phandle = <0x149>; - }; - - dvp-d2d9-m1 { - rockchip,pins = <0x03 0x03 0x03 0xb1 0x03 0x05 0x03 0xb1 0x03 0x07 0x03 0xb1 0x03 0x08 0x03 0xb1 0x03 0x09 0x03 0xb1 0x03 0x0c 0x03 0xb1 0x03 0x0e 0x03 0xb1 0x03 0x0f 0x03 0xb1 0x03 0x19 0x03 0xb1 0x03 0x1a 0x03 0xb1 0x03 0x1b 0x03 0xb1 0x03 0x18 0x03 0xb1>; - phandle = <0x14a>; - }; - - dvp-d0d1-m1 { - rockchip,pins = <0x03 0x01 0x03 0xb1 0x03 0x02 0x03 0xb1>; - phandle = <0x14b>; - }; - - d10-d11-m1 { - rockchip,pins = <0x03 0x16 0x03 0xb1 0x03 0x17 0x03 0xb1>; - phandle = <0x14c>; - }; - }; - - isp { - - isp-prelight { - rockchip,pins = <0x03 0x19 0x04 0xb1>; - phandle = <0x14d>; - }; - }; - - pmic { - - pmic_int { - rockchip,pins = <0x00 0x0a 0x00 0xb2 0x00 0x0b 0x00 0xb1>; - phandle = <0x5d>; - }; - - soc_slppin_gpio { - rockchip,pins = <0x00 0x04 0x00 0xb9>; - phandle = <0x60>; - }; - - soc_slppin_slp { - rockchip,pins = <0x00 0x04 0x01 0xb1>; - phandle = <0x5e>; - }; - - soc_slppin_rst { - rockchip,pins = <0x00 0x04 0x02 0xb1>; - phandle = <0x62>; - }; - }; - - leds { - - led-pins { - rockchip,pins = <0x00 0x11 0x00 0xb1>; - phandle = <0xc0>; - }; - }; - - btns { - - btn-pins { - rockchip,pins = <0x01 0x0c 0x00 0xb2 0x01 0x0d 0x00 0xb2 0x01 0x0e 0x00 0xb2 0x01 0x0f 0x00 0xb2 0x01 0x02 0x00 0xb2 0x01 0x05 0x00 0xb2 0x01 0x06 0x00 0xb2 0x01 0x07 0x00 0xb2 0x02 0x00 0x00 0xb2 0x02 0x01 0x00 0xb2 0x02 0x02 0x00 0xb2 0x02 0x03 0x00 0xb2 0x02 0x04 0x00 0xb2 0x02 0x05 0x00 0xb2 0x02 0x06 0x00 0xb2 0x02 0x07 0x00 0xb2 0x03 0x09 0x00 0xb2 0x03 0x0a 0x00 0xb2 0x03 0x0c 0x00 0xb2 0x03 0x0f 0x00 0xb2>; - phandle = <0xbd>; - }; - }; - }; - - chosen { - bootargs = [00]; - }; - - fiq-debugger { - compatible = "rockchip,fiq-debugger"; - rockchip,serial-id = <0x02>; - rockchip,wake-irq = <0x00>; - rockchip,irq-mode-enable = <0x00>; - rockchip,baudrate = <0x1c200>; - interrupts = <0x00 0x7f 0x08>; - pinctrl-names = "default"; - pinctrl-0 = <0xba>; - status = "okay"; - }; - - ramoops { - compatible = "ramoops"; - record-size = <0x00 0x20000>; - console-size = <0x00 0x80000>; - ftrace-size = <0x00 0x00>; - pmsg-size = <0x00 0x00>; - memory-region = <0xbb>; - }; - - reserved-memory { - #address-cells = <0x02>; - #size-cells = <0x02>; - ranges; - - drm-logo@00000000 { - compatible = "rockchip,drm-logo"; - reg = <0x00 0x00 0x00 0x00>; - phandle = <0x11>; - }; - - region@110000 { - reg = <0x00 0x110000 0x00 0xf0000>; - reg-names = "ramoops_mem"; - phandle = <0xbb>; - }; - }; - - odroidgo3-keys { - compatible = "gpio-keys"; - #address-cells = <0x01>; - #size-cells = <0x00>; - autorepeat; - phandle = <0x14e>; - - button@0 { - label = "GPIO BTN-VOLUP"; - linux,code = <0x73>; - gpios = <0x66 0x00 0x01>; - }; - - button@1 { - label = "GPIO BTN-VOLDN"; - linux,code = <0x72>; - gpios = <0x66 0x01 0x01>; - }; - }; - - odroidgo3-joypad { - compatible = "odroidgo3-joypad"; - pwms = <0xbc 0x00 0xbebc200 0x00>; - pwm-names = "enable"; - rumble-boost-weak = <0x00>; - rumble-boost-strong = <0x00>; - joypad-name = "GO-Super Gamepad"; - joypad-product = <0x1100>; - joypad-revision = <0x100>; - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <0xbd>; - pinctrl-1 = <0x7b>; - io-channel-names = "amux_adc"; - io-channels = <0xbe 0x01>; - amux-count = <0x04>; - amux-a-gpios = <0x97 0x0b 0x01>; - amux-b-gpios = <0x97 0x08 0x01>; - amux-en-gpios = <0x97 0x0d 0x01>; - button-adc-scale = <0x02>; - button-adc-deadzone = <0x40>; - button-adc-fuzz = <0x20>; - button-adc-flat = <0x20>; - abs_x-p-tuning = <0xc8>; - abs_x-n-tuning = <0xc8>; - abs_y-p-tuning = <0xc8>; - abs_y-n-tuning = <0xc8>; - abs_rx-p-tuning = <0xc8>; - abs_rx-n-tuning = <0xc8>; - abs_ry-p-tuning = <0xc8>; - abs_ry-n-tuning = <0xc8>; - poll-interval = <0x0a>; - invert-absx; - invert-absy; - phandle = <0x14f>; - - sw1 { - gpios = <0xbf 0x0c 0x01>; - label = "GPIO DPAD-UP"; - linux,code = <0x220>; - }; - - sw2 { - gpios = <0xbf 0x0d 0x01>; - label = "GPIO DPAD-DOWN"; - linux,code = <0x221>; - }; - - sw3 { - gpios = <0xbf 0x0e 0x01>; - label = "GPIO DPAD-LEFT"; - linux,code = <0x222>; - }; - - sw4 { - gpios = <0xbf 0x0f 0x01>; - label = "GPIO DPAD-RIGHT"; - linux,code = <0x223>; - }; - - sw5 { - gpios = <0xbf 0x02 0x01>; - label = "GPIO KEY BTN-A"; - linux,code = <0x131>; - }; - - sw6 { - gpios = <0xbf 0x05 0x01>; - label = "GPIO BTN-B"; - linux,code = <0x130>; - }; - - sw7 { - gpios = <0xbf 0x06 0x01>; - label = "GPIO BTN-Y"; - linux,code = <0x134>; - }; - - sw8 { - gpios = <0xbf 0x07 0x01>; - label = "GPIO BTN-X"; - linux,code = <0x133>; - }; - - sw11 { - gpios = <0x66 0x02 0x01>; - label = "GPIO F3"; - linux,code = <0x2c2>; - }; - - sw12 { - gpios = <0x66 0x03 0x01>; - label = "GPIO F4"; - linux,code = <0x2c3>; - }; - - sw15 { - gpios = <0x66 0x06 0x01>; - label = "GPIO TOP-LEFT"; - linux,code = <0x136>; - }; - - sw16 { - gpios = <0x66 0x07 0x01>; - label = "GPIO TOP-RIGHT"; - linux,code = <0x137>; - }; - - sw19 { - gpios = <0x97 0x09 0x01>; - label = "GPIO F1"; - linux,code = <0x2c0>; - }; - - sw20 { - gpios = <0x97 0x0f 0x01>; - label = "GPIO TOP-RIGHT2"; - linux,code = <0x139>; - }; - - sw21 { - gpios = <0x97 0x0a 0x01>; - label = "GPIO TOP-LEFT2"; - linux,code = <0x138>; - }; - - sw22 { - gpios = <0x97 0x0c 0x01>; - label = "GPIO F2"; - linux,code = <0x2c1>; - }; - - sw13 { - gpios = <0x66 0x04 0x01>; - label = "GPIO F5"; - linux,code = <0x2c4>; - }; - }; - - gpio_leds { - compatible = "gpio-leds"; - pinctrl-names = "led_pins"; - pinctrl-0 = <0xc0>; - phandle = <0x150>; - - heartbeat { - label = "blue:heartbeat"; - gpios = <0x5c 0x11 0x00>; - linux,default-trigger = "heartbeat"; - }; - }; - - backlight { - compatible = "pwm-backlight"; - pwms = <0xc1 0x00 0xf519 0x00>; - brightness-levels = <0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f 0x20 0x21 0x22 0x23 0x24 0x25 0x26 0x27 0x28 0x29 0x2a 0x2b 0x2c 0x2d 0x2e 0x2f 0x30 0x31 0x32 0x33 0x34 0x35 0x36 0x37 0x38 0x39 0x3a 0x3b 0x3c 0x3d 0x3e 0x3f 0x40 0x41 0x42 0x43 0x44 0x45 0x46 0x47 0x48 0x49 0x4a 0x4b 0x4c 0x4d 0x4e 0x4f 0x50 0x51 0x52 0x53 0x54 0x55 0x56 0x57 0x58 0x59 0x5a 0x5b 0x5c 0x5d 0x5e 0x5f 0x60 0x61 0x62 0x63 0x64 0x65 0x66 0x67 0x68 0x69 0x6a 0x6b 0x6c 0x6d 0x6e 0x6f 0x70 0x71 0x72 0x73 0x74 0x75 0x76 0x77 0x78 0x79 0x7a 0x7b 0x7c 0x7d 0x7e 0x7f 0x80 0x81 0x82 0x83 0x84 0x85 0x86 0x87 0x88 0x89 0x8a 0x8b 0x8c 0x8d 0x8e 0x8f 0x90 0x91 0x92 0x93 0x94 0x95 0x96 0x97 0x98 0x99 0x9a 0x9b 0x9c 0x9d 0x9e 0x9f 0xa0>; - default-brightness-level = <0x33>; - phandle = <0x9d>; - }; - - rk817-sound { - compatible = "simple-audio-card"; - simple-audio-card,format = "i2s"; - simple-audio-card,name = "rockchip,rk817-codec"; - simple-audio-card,mclk-fs = <0x100>; - simple-audio-card,widgets = "Microphone\0Mic Jack\0Headphone\0Headphone Jack"; - simple-audio-card,routing = "MIC_IN\0Mic Jack\0Headphone Jack\0HPOL\0Headphone Jack\0HPOR"; - simple-audio-card,hp-det-gpio = <0x66 0x16 0x01>; - simple-audio-card,codec-hp-det = <0x01>; - - simple-audio-card,cpu { - sound-dai = <0xc2>; - }; - - simple-audio-card,codec { - sound-dai = <0xc3>; - }; - }; - - vccsys { - compatible = "regulator-fixed"; - regulator-name = "vcc3v8_sys"; - regulator-always-on; - regulator-min-microvolt = <0x39fbc0>; - regulator-max-microvolt = <0x39fbc0>; - phandle = <0x64>; - }; - - __symbols__ { - ddr_timing = "/ddr_timing"; - cpu0 = "/cpus/cpu@0"; - cpu1 = "/cpus/cpu@1"; - cpu2 = "/cpus/cpu@2"; - cpu3 = "/cpus/cpu@3"; - CPU_SLEEP = "/cpus/idle-states/cpu-sleep"; - CLUSTER_SLEEP = "/cpus/idle-states/cluster-sleep"; - cpu0_opp_table = "/cpu0-opp-table"; - bus_soc = "/bus-soc"; - bus_apll = "/bus-apll"; - bus_apll_opp_table = "/bus-apll-opp-table"; - display_subsystem = "/display-subsystem"; - route_lvds = "/display-subsystem/route/route-lvds"; - route_dsi = "/display-subsystem/route/route-dsi"; - route_rgb = "/display-subsystem/route/route-rgb"; - gmac_clkin = "/external-gmac-clock"; - rockchip_suspend = "/rockchip-suspend"; - xin24m = "/xin24m"; - xin32k = "/xin32k"; - pmu = "/power-management@ff000000"; - power = "/power-management@ff000000/power-controller"; - pmugrf = "/syscon@ff010000"; - pmu_io_domains = "/syscon@ff010000/io-domains"; - pmu_pvtm = "/syscon@ff010000/pmu-pvtm"; - uart0 = "/serial@ff030000"; - i2s0_8ch = "/i2s@ff060000"; - i2s1_2ch = "/i2s@ff070000"; - i2s2_2ch = "/i2s@ff080000"; - pdm = "/pdm@ff0a0000"; - crypto = "/crypto@ff0b0000"; - rng = "/rng@ff0b0000"; - gic = "/interrupt-controller@ff131000"; - grf = "/syscon@ff140000"; - io_domains = "/syscon@ff140000/io-domains"; - lvds = "/syscon@ff140000/lvds"; - lvds_in_vopb = "/syscon@ff140000/lvds/ports/port@0/endpoint@0"; - rgb = "/syscon@ff140000/rgb"; - rgb_in_vopb = "/syscon@ff140000/rgb/ports/port@0/endpoint@0"; - core_grf = "/syscon@ff148000"; - pvtm = "/syscon@ff148000/pvtm"; - uart1 = "/serial@ff158000"; - uart2 = "/serial@ff160000"; - uart3 = "/serial@ff168000"; - uart4 = "/serial@ff170000"; - uart5 = "/serial@ff178000"; - i2c0 = "/i2c@ff180000"; - rk817 = "/i2c@ff180000/pmic@20"; - pinctrl_rk8xx = "/i2c@ff180000/pmic@20/pinctrl_rk8xx"; - rk817_ts_gpio1 = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_ts_gpio1"; - rk817_gt_gpio2 = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_gt_gpio2"; - rk817_pin_ts = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_pin_ts"; - rk817_pin_gt = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_pin_gt"; - rk817_slppin_null = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_slppin_null"; - rk817_slppin_slp = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_slppin_slp"; - rk817_slppin_pwrdn = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_slppin_pwrdn"; - rk817_slppin_rst = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_slppin_rst"; - vdd_logic = "/i2c@ff180000/pmic@20/regulators/DCDC_REG1"; - vdd_arm = "/i2c@ff180000/pmic@20/regulators/DCDC_REG2"; - vcc_ddr = "/i2c@ff180000/pmic@20/regulators/DCDC_REG3"; - vcc_3v3 = "/i2c@ff180000/pmic@20/regulators/DCDC_REG4"; - vcc_1v0 = "/i2c@ff180000/pmic@20/regulators/LDO_REG1"; - vcc1v8_soc = "/i2c@ff180000/pmic@20/regulators/LDO_REG2"; - vdd1v0_soc = "/i2c@ff180000/pmic@20/regulators/LDO_REG3"; - vcc3v3_pmu = "/i2c@ff180000/pmic@20/regulators/LDO_REG4"; - vccio_sd = "/i2c@ff180000/pmic@20/regulators/LDO_REG5"; - vcc_sd = "/i2c@ff180000/pmic@20/regulators/LDO_REG6"; - vcc_backlight = "/i2c@ff180000/pmic@20/regulators/LDO_REG7"; - vcc_lcd = "/i2c@ff180000/pmic@20/regulators/LDO_REG8"; - dcdc_boost = "/i2c@ff180000/pmic@20/regulators/BOOST"; - otg_switch = "/i2c@ff180000/pmic@20/regulators/OTG_SWITCH"; - rk817_codec = "/i2c@ff180000/pmic@20/codec"; - i2c1 = "/i2c@ff190000"; - i2c2 = "/i2c@ff1a0000"; - i2c3 = "/i2c@ff1b0000"; - spi0 = "/spi@ff1d0000"; - spi1 = "/spi@ff1d8000"; - wdt = "/watchdog@ff1e0000"; - pwm0 = "/pwm@ff200000"; - pwm1 = "/pwm@ff200010"; - pwm2 = "/pwm@ff200020"; - pwm3 = "/pwm@ff200030"; - pwm4 = "/pwm@ff208000"; - pwm5 = "/pwm@ff208010"; - pwm6 = "/pwm@ff208020"; - pwm7 = "/pwm@ff208030"; - rktimer = "/rktimer@ff210000"; - dmac = "/amba/dmac@ff240000"; - thermal_zones = "/thermal-zones"; - soc_thermal = "/thermal-zones/soc-thermal"; - threshold = "/thermal-zones/soc-thermal/trips/trip-point-0"; - target = "/thermal-zones/soc-thermal/trips/trip-point-1"; - soc_crit = "/thermal-zones/soc-thermal/trips/soc-crit"; - gpu_thermal = "/thermal-zones/gpu-thermal"; - tsadc = "/tsadc@ff280000"; - saradc = "/saradc@ff288000"; - otp = "/otp@ff290000"; - otp_id = "/otp@ff290000/id@7"; - cpu_leakage = "/otp@ff290000/cpu-leakage@17"; - performance = "/otp@ff290000/performance@1e"; - cru = "/clock-controller@ff2b0000"; - cpu_boost = "/cpu-boost@ff2b8000"; - pmucru = "/pmu-clock-controller@ff2bc000"; - usb2phy_grf = "/syscon@ff2c0000"; - u2phy = "/syscon@ff2c0000/usb2-phy@100"; - u2phy_host = "/syscon@ff2c0000/usb2-phy@100/host-port"; - u2phy_otg = "/syscon@ff2c0000/usb2-phy@100/otg-port"; - video_phy = "/video-phy@ff2e0000"; - mipi_dphy_rx0 = "/mipi-dphy-rx0@ff2f0000"; - usb20_otg = "/usb@ff300000"; - usb_host0_ehci = "/usb@ff340000"; - usb_host0_ohci = "/usb@ff350000"; - gmac = "/ethernet@ff360000"; - sdmmc = "/dwmmc@ff370000"; - sdio = "/dwmmc@ff380000"; - emmc = "/dwmmc@ff390000"; - nandc0 = "/nandc@ff3b0000"; - sfc = "/sfc@ff3a0000"; - gpu = "/gpu@ff400000"; - gpu_opp_table = "/gpu-opp-table"; - hevc = "/hevc_service@ff440000"; - vpu = "/vpu_service@ff442000"; - vpu_combo = "/vpu_combo"; - hevc_mmu = "/iommu@ff440440"; - vpu_mmu = "/iommu@ff442800"; - dsi = "/dsi@ff450000"; - dsi_in_vopb = "/dsi@ff450000/ports/port@0/endpoint@0"; - timing0 = "/dsi@ff450000/panel@0/display-timings/60Hz"; - timing1 = "/dsi@ff450000/panel@0/display-timings/50Hz"; - timing2 = "/dsi@ff450000/panel@0/display-timings/75Hz"; - vopb = "/vop@ff460000"; - vopb_out = "/vop@ff460000/port"; - vopb_out_lvds = "/vop@ff460000/port/endpoint@0"; - vopb_out_dsi = "/vop@ff460000/port/endpoint@1"; - vopb_out_rgb = "/vop@ff460000/port/endpoint@2"; - vopb_mmu = "/iommu@ff460f00"; - rk_rga = "/rk_rga@ff480000"; - cif = "/cif@ff490000"; - cif_new = "/cif-new@ff490000"; - vip_mmu = "/iommu@ff490800"; - rk_isp = "/rk_isp@ff4a0000"; - rkisp1 = "/rkisp1@ff4a0000"; - isp_mmu = "/iommu@ff4a8000"; - qos_gmac = "/qos@ff518000"; - qos_gpu = "/qos@ff520000"; - qos_sdmmc = "/qos@ff52c000"; - qos_emmc = "/qos@ff538000"; - qos_nand = "/qos@ff538080"; - qos_sdio = "/qos@ff538100"; - qos_sfc = "/qos@ff538180"; - qos_usb_host = "/qos@ff540000"; - qos_usb_otg = "/qos@ff540080"; - qos_isp_128 = "/qos@ff548000"; - qos_isp_rd = "/qos@ff548080"; - qos_isp_wr = "/qos@ff548100"; - qos_isp_m1 = "/qos@ff548180"; - qos_vip = "/qos@ff548200"; - qos_rga_rd = "/qos@ff550000"; - qos_rga_wr = "/qos@ff550080"; - qos_vop_m0 = "/qos@ff550100"; - qos_vop_m1 = "/qos@ff550180"; - qos_vpu = "/qos@ff558000"; - qos_vpu_r128 = "/qos@ff558080"; - dfi = "/dfi@ff610000"; - dmc = "/dmc"; - ddr_power_model = "/dmc/ddr_power_model"; - dmc_opp_table = "/dmc-opp-table"; - rockchip_system_monitor = "/rockchip-system-monitor"; - pinctrl = "/pinctrl"; - gpio0 = "/pinctrl/gpio0@ff040000"; - gpio1 = "/pinctrl/gpio1@ff250000"; - gpio2 = "/pinctrl/gpio2@ff260000"; - gpio3 = "/pinctrl/gpio3@ff270000"; - pcfg_pull_up = "/pinctrl/pcfg-pull-up"; - pcfg_pull_down = "/pinctrl/pcfg-pull-down"; - pcfg_pull_none = "/pinctrl/pcfg-pull-none"; - pcfg_pull_none_2ma = "/pinctrl/pcfg-pull-none-2ma"; - pcfg_pull_up_2ma = "/pinctrl/pcfg-pull-up-2ma"; - pcfg_pull_up_4ma = "/pinctrl/pcfg-pull-up-4ma"; - pcfg_pull_none_4ma = "/pinctrl/pcfg-pull-none-4ma"; - pcfg_pull_down_4ma = "/pinctrl/pcfg-pull-down-4ma"; - pcfg_pull_none_8ma = "/pinctrl/pcfg-pull-none-8ma"; - pcfg_pull_up_8ma = "/pinctrl/pcfg-pull-up-8ma"; - pcfg_pull_none_12ma = "/pinctrl/pcfg-pull-none-12ma"; - pcfg_pull_up_12ma = "/pinctrl/pcfg-pull-up-12ma"; - pcfg_pull_none_smt = "/pinctrl/pcfg-pull-none-smt"; - pcfg_output_high = "/pinctrl/pcfg-output-high"; - pcfg_output_low = "/pinctrl/pcfg-output-low"; - pcfg_input_high = "/pinctrl/pcfg-input-high"; - pcfg_input = "/pinctrl/pcfg-input"; - i2c0_xfer = "/pinctrl/i2c0/i2c0-xfer"; - i2c1_xfer = "/pinctrl/i2c1/i2c1-xfer"; - i2c2_xfer = "/pinctrl/i2c2/i2c2-xfer"; - i2c3_xfer = "/pinctrl/i2c3/i2c3-xfer"; - tsadc_otp_gpio = "/pinctrl/tsadc/tsadc-otp-gpio"; - tsadc_otp_out = "/pinctrl/tsadc/tsadc-otp-out"; - uart0_xfer = "/pinctrl/uart0/uart0-xfer"; - uart0_cts = "/pinctrl/uart0/uart0-cts"; - uart0_rts = "/pinctrl/uart0/uart0-rts"; - uart0_rts_gpio = "/pinctrl/uart0/uart0-rts-gpio"; - uart1_xfer = "/pinctrl/uart1/uart1-xfer"; - uart1_cts = "/pinctrl/uart1/uart1-cts"; - uart1_rts = "/pinctrl/uart1/uart1-rts"; - uart1_rts_gpio = "/pinctrl/uart1/uart1-rts-gpio"; - uart2m0_xfer = "/pinctrl/uart2-m0/uart2m0-xfer"; - uart2m1_xfer = "/pinctrl/uart2-m1/uart2m1-xfer"; - uart3m0_xfer = "/pinctrl/uart3-m0/uart3m0-xfer"; - uart3m0_cts = "/pinctrl/uart3-m0/uart3m0-cts"; - uart3m0_rts = "/pinctrl/uart3-m0/uart3m0-rts"; - uart3m0_rts_gpio = "/pinctrl/uart3-m0/uart3m0-rts-gpio"; - uart3m1_xfer = "/pinctrl/uart3-m1/uart3m1-xfer"; - uart3m1_cts = "/pinctrl/uart3-m1/uart3m1-cts"; - uart3m1_rts = "/pinctrl/uart3-m1/uart3m1-rts"; - uart3m1_rts_gpio = "/pinctrl/uart3-m1/uart3m1-rts-gpio"; - uart4_xfer = "/pinctrl/uart4/uart4-xfer"; - uart4_cts = "/pinctrl/uart4/uart4-cts"; - uart4_rts = "/pinctrl/uart4/uart4-rts"; - uart5_xfer = "/pinctrl/uart5/uart5-xfer"; - uart5_cts = "/pinctrl/uart5/uart5-cts"; - uart5_rts = "/pinctrl/uart5/uart5-rts"; - spi0_clk = "/pinctrl/spi0/spi0-clk"; - spi0_csn = "/pinctrl/spi0/spi0-csn"; - spi0_miso = "/pinctrl/spi0/spi0-miso"; - spi0_mosi = "/pinctrl/spi0/spi0-mosi"; - spi0_clk_hs = "/pinctrl/spi0/spi0-clk-hs"; - spi0_miso_hs = "/pinctrl/spi0/spi0-miso-hs"; - spi0_mosi_hs = "/pinctrl/spi0/spi0-mosi-hs"; - spi1_clk = "/pinctrl/spi1/spi1-clk"; - spi1_csn0 = "/pinctrl/spi1/spi1-csn0"; - spi1_csn1 = "/pinctrl/spi1/spi1-csn1"; - spi1_miso = "/pinctrl/spi1/spi1-miso"; - spi1_mosi = "/pinctrl/spi1/spi1-mosi"; - spi1_clk_hs = "/pinctrl/spi1/spi1-clk-hs"; - spi1_miso_hs = "/pinctrl/spi1/spi1-miso-hs"; - spi1_mosi_hs = "/pinctrl/spi1/spi1-mosi-hs"; - pdm_clk0m0 = "/pinctrl/pdm/pdm-clk0m0"; - pdm_clk0m1 = "/pinctrl/pdm/pdm-clk0m1"; - pdm_clk1 = "/pinctrl/pdm/pdm-clk1"; - pdm_sdi0m0 = "/pinctrl/pdm/pdm-sdi0m0"; - pdm_sdi0m1 = "/pinctrl/pdm/pdm-sdi0m1"; - pdm_sdi1 = "/pinctrl/pdm/pdm-sdi1"; - pdm_sdi2 = "/pinctrl/pdm/pdm-sdi2"; - pdm_sdi3 = "/pinctrl/pdm/pdm-sdi3"; - pdm_clk0m0_sleep = "/pinctrl/pdm/pdm-clk0m0-sleep"; - pdm_clk0m_sleep1 = "/pinctrl/pdm/pdm-clk0m1-sleep"; - pdm_clk1_sleep = "/pinctrl/pdm/pdm-clk1-sleep"; - pdm_sdi0m0_sleep = "/pinctrl/pdm/pdm-sdi0m0-sleep"; - pdm_sdi0m1_sleep = "/pinctrl/pdm/pdm-sdi0m1-sleep"; - pdm_sdi1_sleep = "/pinctrl/pdm/pdm-sdi1-sleep"; - pdm_sdi2_sleep = "/pinctrl/pdm/pdm-sdi2-sleep"; - pdm_sdi3_sleep = "/pinctrl/pdm/pdm-sdi3-sleep"; - i2s0_8ch_mclk = "/pinctrl/i2s0/i2s0-8ch-mclk"; - i2s0_8ch_sclktx = "/pinctrl/i2s0/i2s0-8ch-sclktx"; - i2s0_8ch_sclkrx = "/pinctrl/i2s0/i2s0-8ch-sclkrx"; - i2s0_8ch_lrcktx = "/pinctrl/i2s0/i2s0-8ch-lrcktx"; - i2s0_8ch_lrckrx = "/pinctrl/i2s0/i2s0-8ch-lrckrx"; - i2s0_8ch_sdo0 = "/pinctrl/i2s0/i2s0-8ch-sdo0"; - i2s0_8ch_sdo1 = "/pinctrl/i2s0/i2s0-8ch-sdo1"; - i2s0_8ch_sdo2 = "/pinctrl/i2s0/i2s0-8ch-sdo2"; - i2s0_8ch_sdo3 = "/pinctrl/i2s0/i2s0-8ch-sdo3"; - i2s0_8ch_sdi0 = "/pinctrl/i2s0/i2s0-8ch-sdi0"; - i2s0_8ch_sdi1 = "/pinctrl/i2s0/i2s0-8ch-sdi1"; - i2s0_8ch_sdi2 = "/pinctrl/i2s0/i2s0-8ch-sdi2"; - i2s0_8ch_sdi3 = "/pinctrl/i2s0/i2s0-8ch-sdi3"; - i2s1_2ch_mclk = "/pinctrl/i2s1/i2s1-2ch-mclk"; - i2s1_2ch_sclk = "/pinctrl/i2s1/i2s1-2ch-sclk"; - i2s1_2ch_lrck = "/pinctrl/i2s1/i2s1-2ch-lrck"; - i2s1_2ch_sdi = "/pinctrl/i2s1/i2s1-2ch-sdi"; - i2s1_2ch_sdo = "/pinctrl/i2s1/i2s1-2ch-sdo"; - i2s2_2ch_mclk = "/pinctrl/i2s2/i2s2-2ch-mclk"; - i2s2_2ch_sclk = "/pinctrl/i2s2/i2s2-2ch-sclk"; - i2s2_2ch_lrck = "/pinctrl/i2s2/i2s2-2ch-lrck"; - i2s2_2ch_sdi = "/pinctrl/i2s2/i2s2-2ch-sdi"; - i2s2_2ch_sdo = "/pinctrl/i2s2/i2s2-2ch-sdo"; - sdmmc_clk = "/pinctrl/sdmmc/sdmmc-clk"; - sdmmc_cmd = "/pinctrl/sdmmc/sdmmc-cmd"; - sdmmc_det = "/pinctrl/sdmmc/sdmmc-det"; - sdmmc_bus1 = "/pinctrl/sdmmc/sdmmc-bus1"; - sdmmc_bus4 = "/pinctrl/sdmmc/sdmmc-bus4"; - sdmmc_gpio = "/pinctrl/sdmmc/sdmmc-gpio"; - sdio_clk = "/pinctrl/sdio/sdio-clk"; - sdio_cmd = "/pinctrl/sdio/sdio-cmd"; - sdio_bus4 = "/pinctrl/sdio/sdio-bus4"; - sdio_gpio = "/pinctrl/sdio/sdio-gpio"; - emmc_clk = "/pinctrl/emmc/emmc-clk"; - emmc_cmd = "/pinctrl/emmc/emmc-cmd"; - emmc_pwren = "/pinctrl/emmc/emmc-pwren"; - emmc_rstnout = "/pinctrl/emmc/emmc-rstnout"; - emmc_bus1 = "/pinctrl/emmc/emmc-bus1"; - emmc_bus4 = "/pinctrl/emmc/emmc-bus4"; - emmc_bus8 = "/pinctrl/emmc/emmc-bus8"; - flash_cs0 = "/pinctrl/flash/flash-cs0"; - flash_rdy = "/pinctrl/flash/flash-rdy"; - flash_dqs = "/pinctrl/flash/flash-dqs"; - flash_ale = "/pinctrl/flash/flash-ale"; - flash_cle = "/pinctrl/flash/flash-cle"; - flash_wrn = "/pinctrl/flash/flash-wrn"; - flash_csl = "/pinctrl/flash/flash-csl"; - flash_rdn = "/pinctrl/flash/flash-rdn"; - flash_bus8 = "/pinctrl/flash/flash-bus8"; - lcdc_m0_rgb_pins = "/pinctrl/lcdc/lcdc-m0-rgb-pins"; - lcdc_m0_sleep_pins = "/pinctrl/lcdc/lcdc-m0-sleep-pins"; - lcdc_m1_rgb_pins = "/pinctrl/lcdc/lcdc-m1-rgb-pins"; - lcdc_m1_sleep_pins = "/pinctrl/lcdc/lcdc-m1-sleep-pins"; - pwm0_pin = "/pinctrl/pwm0/pwm0-pin"; - pwm1_pin = "/pinctrl/pwm1/pwm1-pin"; - pwm2_pin = "/pinctrl/pwm2/pwm2-pin"; - pwm3_pin = "/pinctrl/pwm3/pwm3-pin"; - pwm4_pin = "/pinctrl/pwm4/pwm4-pin"; - pwm5_pin = "/pinctrl/pwm5/pwm5-pin"; - pwm6_pin = "/pinctrl/pwm6/pwm6-pin"; - pwm7_pin = "/pinctrl/pwm7/pwm7-pin"; - rmii_pins = "/pinctrl/gmac/rmii-pins"; - mac_refclk_12ma = "/pinctrl/gmac/mac-refclk-12ma"; - mac_refclk = "/pinctrl/gmac/mac-refclk"; - cif_clkout_m0 = "/pinctrl/cif-m0/cif-clkout-m0"; - dvp_d2d9_m0 = "/pinctrl/cif-m0/dvp-d2d9-m0"; - dvp_d0d1_m0 = "/pinctrl/cif-m0/dvp-d0d1-m0"; - dvp_d10d11_m0 = "/pinctrl/cif-m0/d10-d11-m0"; - cif_clkout_m1 = "/pinctrl/cif-m1/cif-clkout-m1"; - dvp_d2d9_m1 = "/pinctrl/cif-m1/dvp-d2d9-m1"; - dvp_d0d1_m1 = "/pinctrl/cif-m1/dvp-d0d1-m1"; - dvp_d10d11_m1 = "/pinctrl/cif-m1/d10-d11-m1"; - isp_prelight = "/pinctrl/isp/isp-prelight"; - pmic_int = "/pinctrl/pmic/pmic_int"; - soc_slppin_gpio = "/pinctrl/pmic/soc_slppin_gpio"; - soc_slppin_slp = "/pinctrl/pmic/soc_slppin_slp"; - soc_slppin_rst = "/pinctrl/pmic/soc_slppin_rst"; - led_pins = "/pinctrl/leds/led-pins"; - btn_pins = "/pinctrl/btns/btn-pins"; - drm_logo = "/reserved-memory/drm-logo@00000000"; - ramoops_mem = "/reserved-memory/region@110000"; - gpio_keys = "/odroidgo3-keys"; - joypad = "/odroidgo3-joypad"; - leds = "/gpio_leds"; - backlight = "/backlight"; - vccsys = "/vccsys"; - }; -}; diff --git a/config/archr-dts/R36S-DTB/DTS/Panel4-V22.dts b/config/archr-dts/R36S-DTB/DTS/Panel4-V22.dts deleted file mode 100644 index dd9948e821..0000000000 --- a/config/archr-dts/R36S-DTB/DTS/Panel4-V22.dts +++ /dev/null @@ -1,4075 +0,0 @@ - -/dts-v1/; - -/ { - compatible = "rockchip,rk3326-odroidgo3-linux\0rockchip,rk3326"; - interrupt-parent = <0x01>; - #address-cells = <0x02>; - #size-cells = <0x02>; - model = "Game Console R36S V22"; - - - ddr_timing { - compatible = "rockchip,ddr-timing"; - ddr2_speed_bin = <0x00>; - ddr3_speed_bin = <0x15>; - ddr4_speed_bin = <0x0c>; - pd_idle = <0x0d>; - sr_idle = <0x5d>; - sr_mc_gate_idle = <0x00>; - srpd_lite_idle = <0x00>; - standby_idle = <0x00>; - auto_pd_dis_freq = <0x42a>; - auto_sr_dis_freq = <0x320>; - ddr2_dll_dis_freq = <0x12c>; - ddr3_dll_dis_freq = <0x12c>; - ddr4_dll_dis_freq = <0x271>; - phy_dll_dis_freq = <0x190>; - ddr2_odt_dis_freq = <0x64>; - phy_ddr2_odt_dis_freq = <0x64>; - ddr2_drv = <0x01>; - ddr2_odt = <0x96>; - phy_ddr2_ca_drv = <0x15>; - phy_ddr2_ck_drv = <0x12>; - phy_ddr2_dq_drv = <0x15>; - phy_ddr2_odt = <0x02>; - ddr3_odt_dis_freq = <0x190>; - phy_ddr3_odt_dis_freq = <0x190>; - ddr3_drv = <0x28>; - ddr3_odt = <0x78>; - phy_ddr3_ca_drv = <0x15>; - phy_ddr3_ck_drv = <0x12>; - phy_ddr3_dq_drv = <0x15>; - phy_ddr3_odt = <0x02>; - phy_lpddr2_odt_dis_freq = <0x29a>; - lpddr2_drv = <0x28>; - phy_lpddr2_ca_drv = <0x16>; - phy_lpddr2_ck_drv = <0x13>; - phy_lpddr2_dq_drv = <0x16>; - phy_lpddr2_odt = <0x00>; - lpddr3_odt_dis_freq = <0x190>; - phy_lpddr3_odt_dis_freq = <0x190>; - lpddr3_drv = <0x28>; - lpddr3_odt = <0xf0>; - phy_lpddr3_ca_drv = <0x16>; - phy_lpddr3_ck_drv = <0x13>; - phy_lpddr3_dq_drv = <0x16>; - phy_lpddr3_odt = <0x02>; - lpddr4_odt_dis_freq = <0x320>; - phy_lpddr4_odt_dis_freq = <0x320>; - lpddr4_drv = <0x3c>; - lpddr4_dq_odt = <0x28>; - lpddr4_ca_odt = <0x28>; - phy_lpddr4_ca_drv = <0x14>; - phy_lpddr4_ck_cs_drv = <0x06>; - phy_lpddr4_dq_drv = <0x06>; - phy_lpddr4_odt = <0x10>; - ddr4_odt_dis_freq = <0x29a>; - phy_ddr4_odt_dis_freq = <0x29a>; - ddr4_drv = <0x22>; - ddr4_odt = <0xf0>; - phy_ddr4_ca_drv = <0x16>; - phy_ddr4_ck_drv = <0x13>; - phy_ddr4_dq_drv = <0x16>; - phy_ddr4_odt = <0x02>; - ddr3a1_ddr4a9_de-skew = <0x06>; - ddr3a0_ddr4a10_de-skew = <0x07>; - ddr3a3_ddr4a6_de-skew = <0x07>; - ddr3a2_ddr4a4_de-skew = <0x07>; - ddr3a5_ddr4a8_de-skew = <0x07>; - ddr3a4_ddr4a5_de-skew = <0x07>; - ddr3a7_ddr4a11_de-skew = <0x07>; - ddr3a6_ddr4a7_de-skew = <0x06>; - ddr3a9_ddr4a0_de-skew = <0x07>; - ddr3a8_ddr4a13_de-skew = <0x07>; - ddr3a11_ddr4a3_de-skew = <0x07>; - ddr3a10_ddr4cs0_de-skew = <0x07>; - ddr3a13_ddr4a2_de-skew = <0x07>; - ddr3a12_ddr4ba1_de-skew = <0x07>; - ddr3a15_ddr4odt0_de-skew = <0x07>; - ddr3a14_ddr4a1_de-skew = <0x07>; - ddr3ba1_ddr4a15_de-skew = <0x07>; - ddr3ba0_ddr4bg0_de-skew = <0x07>; - ddr3ras_ddr4cke_de-skew = <0x07>; - ddr3ba2_ddr4ba0_de-skew = <0x07>; - ddr3we_ddr4bg1_de-skew = <0x07>; - ddr3cas_ddr4a12_de-skew = <0x07>; - ddr3ckn_ddr4ckn_de-skew = <0x07>; - ddr3ckp_ddr4ckp_de-skew = <0x07>; - ddr3cke_ddr4a16_de-skew = <0x07>; - ddr3odt0_ddr4a14_de-skew = <0x07>; - ddr3cs0_ddr4act_de-skew = <0x06>; - ddr3reset_ddr4reset_de-skew = <0x07>; - ddr3cs1_ddr4cs1_de-skew = <0x06>; - ddr3odt1_ddr4odt1_de-skew = <0x07>; - cs0_dm0_rx_de-skew = <0x07>; - cs0_dm0_tx_de-skew = <0x07>; - cs0_dq0_rx_de-skew = <0x08>; - cs0_dq0_tx_de-skew = <0x08>; - cs0_dq1_rx_de-skew = <0x09>; - cs0_dq1_tx_de-skew = <0x08>; - cs0_dq2_rx_de-skew = <0x08>; - cs0_dq2_tx_de-skew = <0x08>; - cs0_dq3_rx_de-skew = <0x08>; - cs0_dq3_tx_de-skew = <0x08>; - cs0_dq4_rx_de-skew = <0x09>; - cs0_dq4_tx_de-skew = <0x08>; - cs0_dq5_rx_de-skew = <0x09>; - cs0_dq5_tx_de-skew = <0x08>; - cs0_dq6_rx_de-skew = <0x09>; - cs0_dq6_tx_de-skew = <0x08>; - cs0_dq7_rx_de-skew = <0x08>; - cs0_dq7_tx_de-skew = <0x08>; - cs0_dqs0_rx_de-skew = <0x06>; - cs0_dqs0p_tx_de-skew = <0x09>; - cs0_dqs0n_tx_de-skew = <0x09>; - cs0_dm1_rx_de-skew = <0x07>; - cs0_dm1_tx_de-skew = <0x06>; - cs0_dq8_rx_de-skew = <0x08>; - cs0_dq8_tx_de-skew = <0x07>; - cs0_dq9_rx_de-skew = <0x09>; - cs0_dq9_tx_de-skew = <0x07>; - cs0_dq10_rx_de-skew = <0x08>; - cs0_dq10_tx_de-skew = <0x08>; - cs0_dq11_rx_de-skew = <0x08>; - cs0_dq11_tx_de-skew = <0x07>; - cs0_dq12_rx_de-skew = <0x08>; - cs0_dq12_tx_de-skew = <0x08>; - cs0_dq13_rx_de-skew = <0x09>; - cs0_dq13_tx_de-skew = <0x07>; - cs0_dq14_rx_de-skew = <0x09>; - cs0_dq14_tx_de-skew = <0x08>; - cs0_dq15_rx_de-skew = <0x09>; - cs0_dq15_tx_de-skew = <0x07>; - cs0_dqs1_rx_de-skew = <0x07>; - cs0_dqs1p_tx_de-skew = <0x09>; - cs0_dqs1n_tx_de-skew = <0x09>; - cs0_dm2_rx_de-skew = <0x07>; - cs0_dm2_tx_de-skew = <0x07>; - cs0_dq16_rx_de-skew = <0x09>; - cs0_dq16_tx_de-skew = <0x09>; - cs0_dq17_rx_de-skew = <0x07>; - cs0_dq17_tx_de-skew = <0x09>; - cs0_dq18_rx_de-skew = <0x07>; - cs0_dq18_tx_de-skew = <0x08>; - cs0_dq19_rx_de-skew = <0x07>; - cs0_dq19_tx_de-skew = <0x09>; - cs0_dq20_rx_de-skew = <0x09>; - cs0_dq20_tx_de-skew = <0x09>; - cs0_dq21_rx_de-skew = <0x09>; - cs0_dq21_tx_de-skew = <0x09>; - cs0_dq22_rx_de-skew = <0x08>; - cs0_dq22_tx_de-skew = <0x09>; - cs0_dq23_rx_de-skew = <0x08>; - cs0_dq23_tx_de-skew = <0x09>; - cs0_dqs2_rx_de-skew = <0x06>; - cs0_dqs2p_tx_de-skew = <0x09>; - cs0_dqs2n_tx_de-skew = <0x09>; - cs0_dm3_rx_de-skew = <0x07>; - cs0_dm3_tx_de-skew = <0x07>; - cs0_dq24_rx_de-skew = <0x08>; - cs0_dq24_tx_de-skew = <0x08>; - cs0_dq25_rx_de-skew = <0x09>; - cs0_dq25_tx_de-skew = <0x09>; - cs0_dq26_rx_de-skew = <0x09>; - cs0_dq26_tx_de-skew = <0x08>; - cs0_dq27_rx_de-skew = <0x09>; - cs0_dq27_tx_de-skew = <0x08>; - cs0_dq28_rx_de-skew = <0x09>; - cs0_dq28_tx_de-skew = <0x09>; - cs0_dq29_rx_de-skew = <0x09>; - cs0_dq29_tx_de-skew = <0x09>; - cs0_dq30_rx_de-skew = <0x08>; - cs0_dq30_tx_de-skew = <0x08>; - cs0_dq31_rx_de-skew = <0x08>; - cs0_dq31_tx_de-skew = <0x08>; - cs0_dqs3_rx_de-skew = <0x07>; - cs0_dqs3p_tx_de-skew = <0x09>; - cs0_dqs3n_tx_de-skew = <0x09>; - cs1_dm0_rx_de-skew = <0x07>; - cs1_dm0_tx_de-skew = <0x07>; - cs1_dq0_rx_de-skew = <0x08>; - cs1_dq0_tx_de-skew = <0x08>; - cs1_dq1_rx_de-skew = <0x09>; - cs1_dq1_tx_de-skew = <0x08>; - cs1_dq2_rx_de-skew = <0x08>; - cs1_dq2_tx_de-skew = <0x08>; - cs1_dq3_rx_de-skew = <0x08>; - cs1_dq3_tx_de-skew = <0x08>; - cs1_dq4_rx_de-skew = <0x08>; - cs1_dq4_tx_de-skew = <0x08>; - cs1_dq5_rx_de-skew = <0x09>; - cs1_dq5_tx_de-skew = <0x08>; - cs1_dq6_rx_de-skew = <0x09>; - cs1_dq6_tx_de-skew = <0x08>; - cs1_dq7_rx_de-skew = <0x08>; - cs1_dq7_tx_de-skew = <0x08>; - cs1_dqs0_rx_de-skew = <0x06>; - cs1_dqs0p_tx_de-skew = <0x09>; - cs1_dqs0n_tx_de-skew = <0x09>; - cs1_dm1_rx_de-skew = <0x07>; - cs1_dm1_tx_de-skew = <0x07>; - cs1_dq8_rx_de-skew = <0x08>; - cs1_dq8_tx_de-skew = <0x08>; - cs1_dq9_rx_de-skew = <0x08>; - cs1_dq9_tx_de-skew = <0x07>; - cs1_dq10_rx_de-skew = <0x07>; - cs1_dq10_tx_de-skew = <0x08>; - cs1_dq11_rx_de-skew = <0x08>; - cs1_dq11_tx_de-skew = <0x08>; - cs1_dq12_rx_de-skew = <0x08>; - cs1_dq12_tx_de-skew = <0x07>; - cs1_dq13_rx_de-skew = <0x08>; - cs1_dq13_tx_de-skew = <0x08>; - cs1_dq14_rx_de-skew = <0x08>; - cs1_dq14_tx_de-skew = <0x08>; - cs1_dq15_rx_de-skew = <0x08>; - cs1_dq15_tx_de-skew = <0x07>; - cs1_dqs1_rx_de-skew = <0x07>; - cs1_dqs1p_tx_de-skew = <0x09>; - cs1_dqs1n_tx_de-skew = <0x09>; - cs1_dm2_rx_de-skew = <0x07>; - cs1_dm2_tx_de-skew = <0x08>; - cs1_dq16_rx_de-skew = <0x08>; - cs1_dq16_tx_de-skew = <0x09>; - cs1_dq17_rx_de-skew = <0x08>; - cs1_dq17_tx_de-skew = <0x09>; - cs1_dq18_rx_de-skew = <0x07>; - cs1_dq18_tx_de-skew = <0x08>; - cs1_dq19_rx_de-skew = <0x08>; - cs1_dq19_tx_de-skew = <0x09>; - cs1_dq20_rx_de-skew = <0x09>; - cs1_dq20_tx_de-skew = <0x09>; - cs1_dq21_rx_de-skew = <0x09>; - cs1_dq21_tx_de-skew = <0x09>; - cs1_dq22_rx_de-skew = <0x08>; - cs1_dq22_tx_de-skew = <0x09>; - cs1_dq23_rx_de-skew = <0x08>; - cs1_dq23_tx_de-skew = <0x09>; - cs1_dqs2_rx_de-skew = <0x06>; - cs1_dqs2p_tx_de-skew = <0x09>; - cs1_dqs2n_tx_de-skew = <0x09>; - cs1_dm3_rx_de-skew = <0x07>; - cs1_dm3_tx_de-skew = <0x07>; - cs1_dq24_rx_de-skew = <0x08>; - cs1_dq24_tx_de-skew = <0x09>; - cs1_dq25_rx_de-skew = <0x09>; - cs1_dq25_tx_de-skew = <0x09>; - cs1_dq26_rx_de-skew = <0x09>; - cs1_dq26_tx_de-skew = <0x08>; - cs1_dq27_rx_de-skew = <0x08>; - cs1_dq27_tx_de-skew = <0x08>; - cs1_dq28_rx_de-skew = <0x09>; - cs1_dq28_tx_de-skew = <0x09>; - cs1_dq29_rx_de-skew = <0x09>; - cs1_dq29_tx_de-skew = <0x09>; - cs1_dq30_rx_de-skew = <0x09>; - cs1_dq30_tx_de-skew = <0x08>; - cs1_dq31_rx_de-skew = <0x08>; - cs1_dq31_tx_de-skew = <0x08>; - cs1_dqs3_rx_de-skew = <0x07>; - cs1_dqs3p_tx_de-skew = <0x09>; - cs1_dqs3n_tx_de-skew = <0x09>; - phandle = <0xaf>; - }; - - aliases { - ethernet0 = "/ethernet@ff360000"; - i2c0 = "/i2c@ff180000"; - i2c1 = "/i2c@ff190000"; - i2c2 = "/i2c@ff1a0000"; - i2c3 = "/i2c@ff1b0000"; - serial0 = "/serial@ff030000"; - serial1 = "/serial@ff158000"; - serial2 = "/serial@ff160000"; - serial3 = "/serial@ff168000"; - serial4 = "/serial@ff170000"; - serial5 = "/serial@ff178000"; - spi0 = "/spi@ff1d0000"; - spi1 = "/spi@ff1d8000"; - }; - - cpus { - #address-cells = <0x02>; - #size-cells = <0x00>; - - cpu@0 { - device_type = "cpu"; - compatible = "arm,cortex-a35\0arm,armv8"; - reg = <0x00 0x00>; - enable-method = "psci"; - clocks = <0x02 0x07>; - #cooling-cells = <0x02>; - dynamic-power-coefficient = <0x5a>; - operating-points-v2 = <0x03>; - cpu-idle-states = <0x04 0x05>; - cpu-supply = <0x06>; - phandle = <0x09>; - }; - - cpu@1 { - device_type = "cpu"; - compatible = "arm,cortex-a35\0arm,armv8"; - reg = <0x00 0x01>; - enable-method = "psci"; - operating-points-v2 = <0x03>; - cpu-idle-states = <0x04 0x05>; - phandle = <0x0a>; - }; - - cpu@2 { - device_type = "cpu"; - compatible = "arm,cortex-a35\0arm,armv8"; - reg = <0x00 0x02>; - enable-method = "psci"; - operating-points-v2 = <0x03>; - cpu-idle-states = <0x04 0x05>; - phandle = <0x0b>; - }; - - cpu@3 { - device_type = "cpu"; - compatible = "arm,cortex-a35\0arm,armv8"; - reg = <0x00 0x03>; - enable-method = "psci"; - operating-points-v2 = <0x03>; - cpu-idle-states = <0x04 0x05>; - phandle = <0x0c>; - }; - - idle-states { - entry-method = "psci"; - - cpu-sleep { - compatible = "arm,idle-state"; - local-timer-stop; - arm,psci-suspend-param = <0x10000>; - entry-latency-us = <0x78>; - exit-latency-us = <0xfa>; - min-residency-us = <0x384>; - phandle = <0x04>; - }; - - cluster-sleep { - compatible = "arm,idle-state"; - local-timer-stop; - arm,psci-suspend-param = <0x1010000>; - entry-latency-us = <0x190>; - exit-latency-us = <0x1f4>; - min-residency-us = <0x7d0>; - phandle = <0x05>; - }; - }; - }; - - cpu0-opp-table { - compatible = "operating-points-v2"; - opp-shared; - rockchip,temp-hysteresis = <0x1388>; - rockchip,low-temp = <0x00>; - rockchip,low-temp-min-volt = <0xf4240>; - rockchip,low-temp-adjust-volt = <0x00 0x5e8 0xc350>; - clocks = <0x02 0x01>; - rockchip,avs-scale = <0x04>; - rockchip,max-volt = <0x149970>; - rockchip,evb-irdrop = <0x61a8>; - nvmem-cells = <0x07 0x08>; - nvmem-cell-names = "cpu_leakage\0performance"; - rockchip,bin-scaling-sel = <0x00 0x0d 0x01 0x0d>; - rockchip,pvtm-voltage-sel = <0x00 0xc350 0x00 0xc351 0xd2f0 0x01 0xd2f1 0xea60 0x02 0xea61 0x1869f 0x03>; - rockchip,pvtm-freq = <0x639c0>; - rockchip,pvtm-volt = <0xf4240>; - rockchip,pvtm-ch = <0x00 0x00>; - rockchip,pvtm-sample-time = <0x3e8>; - rockchip,pvtm-number = <0x0a>; - rockchip,pvtm-error = <0x3e8>; - rockchip,pvtm-ref-temp = <0x28>; - rockchip,pvtm-temp-prop = <0xffffffc8 0xffffffc8>; - rockchip,thermal-zone = "soc-thermal"; - rockchip,avs = <0x01>; - phandle = <0x03>; - - opp-1008000000 { - opp-hz = <0x00 0x3c14dc00>; - opp-microvolt = <0x11edd8 0x11edd8 0x149970>; - opp-microvolt-L0 = <0x11edd8 0x11edd8 0x149970>; - opp-microvolt-L1 = <0x112a88 0x112a88 0x149970>; - opp-microvolt-L2 = <0x112a88 0x112a88 0x149970>; - opp-microvolt-L3 = <0x100590 0x100590 0x149970>; - clock-latency-ns = <0x9c40>; - }; - - opp-1200000000 { - opp-hz = <0x00 0x47868c00>; - opp-microvolt = <0x13d620 0x13d620 0x149970>; - opp-microvolt-L0 = <0x13d620 0x13d620 0x149970>; - opp-microvolt-L1 = <0x137478 0x137478 0x149970>; - opp-microvolt-L2 = <0x1312d0 0x1312d0 0x149970>; - opp-microvolt-L3 = <0x124f80 0x124f80 0x149970>; - clock-latency-ns = <0x9c40>; - }; - - opp-1248000000 { - opp-hz = <0x00 0x4a62f800>; - opp-microvolt = <0x149970 0x149970 0x149970>; - opp-microvolt-L0 = <0x149970 0x149970 0x149970>; - opp-microvolt-L1 = <0x13d620 0x13d620 0x149970>; - opp-microvolt-L2 = <0x137478 0x137478 0x149970>; - opp-microvolt-L3 = <0x12b128 0x12b128 0x149970>; - clock-latency-ns = <0x9c40>; - }; - - opp-1296000000 { - opp-hz = <0x00 0x4d3f6400>; - opp-microvolt = <0x149970 0x149970 0x149970>; - opp-microvolt-L0 = <0x149970 0x149970 0x149970>; - opp-microvolt-L1 = <0x149970 0x149970 0x149970>; - opp-microvolt-L2 = <0x13d620 0x13d620 0x149970>; - opp-microvolt-L3 = <0x1312d0 0x1312d0 0x149970>; - clock-latency-ns = <0x9c40>; - }; - - opp-1512000000 { - opp-hz = <0x00 0x5a1f4a00>; - opp-microvolt = <0x149970 0x149970 0x149970>; - opp-microvolt-L0 = <0x149970 0x149970 0x149970>; - opp-microvolt-L1 = <0x149970 0x149970 0x149970>; - opp-microvolt-L2 = <0x13d620 0x13d620 0x149970>; - opp-microvolt-L3 = <0x1312d0 0x1312d0 0x149970>; - clock-latency-ns = <0x9c40>; - }; - }; - - arm-pmu { - compatible = "arm,cortex-a53-pmu"; - interrupts = <0x00 0x64 0x04 0x00 0x65 0x04 0x00 0x66 0x04 0x00 0x67 0x04>; - interrupt-affinity = <0x09 0x0a 0x0b 0x0c>; - }; - - bus-soc { - compatible = "rockchip,px30-bus"; - rockchip,busfreq-policy = "autocs"; - phandle = <0xc4>; - - soc-bus0 { - bus-id = <0x00>; - timer-us = <0x14>; - enable-msk = <0x40f7>; - status = "disabled"; - }; - - soc-bus1 { - bus-id = <0x01>; - timer-us = <0xc8>; - enable-msk = <0x40bf>; - status = "disabled"; - }; - - soc-bus2 { - bus-id = <0x02>; - timer-us = <0xc8>; - enable-msk = <0x4007>; - status = "disabled"; - }; - }; - - bus-apll { - compatible = "rockchip,px30-bus"; - rockchip,busfreq-policy = "clkfreq"; - clocks = <0x02 0x01>; - clock-names = "bus"; - operating-points-v2 = <0x0d>; - status = "okay"; - bus-supply = <0x0e>; - phandle = <0xc5>; - }; - - bus-apll-opp-table { - compatible = "operating-points-v2"; - opp-shared; - phandle = <0x0d>; - - opp-1512000000 { - opp-hz = <0x00 0x5a1f4a00>; - opp-microvolt = <0xf4240>; - }; - - opp-1008000000 { - opp-hz = <0x00 0x3c14dc00>; - opp-microvolt = <0xe7ef0>; - }; - }; - - cpuinfo { - compatible = "rockchip,cpuinfo"; - nvmem-cells = <0x0f>; - nvmem-cell-names = "id"; - }; - - display-subsystem { - compatible = "rockchip,display-subsystem"; - ports = <0x10>; - status = "okay"; - logo-memory-region = <0x11>; - phandle = <0xc6>; - - route { - - route-lvds { - status = "disabled"; - logo,uboot = "logo.gif"; - logo,kernel = "logo_kernel.gif"; - logo,mode = "center"; - charge_logo,mode = "center"; - connect = <0x12>; - phandle = <0xc7>; - }; - - route-dsi { - status = "okay"; - logo,uboot = "logo.gif"; - logo,kernel = "logo_kernel.gif"; - logo,mode = "center"; - charge_logo,mode = "center"; - connect = <0x13>; - phandle = <0xc8>; - }; - - route-rgb { - status = "disabled"; - logo,uboot = "logo.gif"; - logo,kernel = "logo_kernel.gif"; - logo,mode = "center"; - charge_logo,mode = "center"; - connect = <0x14>; - phandle = <0xc9>; - }; - }; - }; - - firmware { - - optee { - compatible = "linaro,optee-tz"; - method = "smc"; - }; - }; - - external-gmac-clock { - compatible = "fixed-clock"; - clock-frequency = <0x2faf080>; - clock-output-names = "gmac_clkin"; - #clock-cells = <0x00>; - phandle = <0xca>; - }; - - psci { - compatible = "arm,psci-1.0"; - method = "smc"; - }; - - rockchip-suspend { - compatible = "rockchip,pm-px30"; - status = "okay"; - rockchip,sleep-debug-en = <0x01>; - rockchip,sleep-mode-config = <0x20702>; - rockchip,wakeup-config = <0x85>; - phandle = <0xcb>; - }; - - timer { - compatible = "arm,armv8-timer"; - interrupts = <0x01 0x0d 0xf04 0x01 0x0e 0xf04 0x01 0x0b 0xf04 0x01 0x0a 0xf04>; - }; - - xin24m { - compatible = "fixed-clock"; - #clock-cells = <0x00>; - clock-frequency = <0x16e3600>; - clock-output-names = "xin24m"; - phandle = <0xcc>; - }; - - xin32k { - compatible = "fixed-clock"; - #clock-cells = <0x00>; - clock-frequency = <0x8000>; - clock-output-names = "xin32k"; - phandle = <0xcd>; - }; - - power-management@ff000000 { - compatible = "rockchip,px30-pmu\0syscon\0simple-mfd"; - reg = <0x00 0xff000000 0x00 0x1000>; - phandle = <0xce>; - - power-controller { - compatible = "rockchip,px30-power-controller"; - #power-domain-cells = <0x01>; - #address-cells = <0x01>; - #size-cells = <0x00>; - phandle = <0x8a>; - - pd_usb@5 { - reg = <0x05>; - clocks = <0x02 0x103 0x02 0x102 0x02 0x3c>; - pm_qos = <0x15 0x16>; - }; - - pd_sdcard@7 { - reg = <0x07>; - clocks = <0x02 0xf7 0x02 0x3b>; - pm_qos = <0x17>; - }; - - pd_gmac@9 { - reg = <0x09>; - clocks = <0x02 0xb2 0x02 0x143 0x02 0x40 0x02 0x3f>; - pm_qos = <0x18>; - }; - - pd_mmc_nand@10 { - reg = <0x0a>; - clocks = <0x02 0xfe 0x02 0x100 0x02 0xff 0x02 0x101 0x02 0x39 0x02 0x37 0x02 0x38 0x02 0x3a>; - pm_qos = <0x19 0x1a 0x1b 0x1c>; - }; - - pd_vpu@11 { - reg = <0x0b>; - clocks = <0x02 0xaf 0x02 0xf4 0x02 0x4b>; - pm_qos = <0x1d 0x1e>; - }; - - pd_vo@12 { - reg = <0x0c>; - clocks = <0x02 0xb7 0x02 0xb5 0x02 0xb6 0x02 0x96 0x02 0x97 0x02 0xfd 0x02 0xfb 0x02 0xfc 0x02 0x144 0x02 0x35 0x02 0x36>; - pm_qos = <0x1f 0x20 0x21 0x22>; - }; - - pd_vi@13 { - reg = <0x0d>; - clocks = <0x02 0xb3 0x02 0xb4 0x02 0xf9 0x02 0xfa 0x02 0x33>; - pm_qos = <0x23 0x24 0x25 0x26 0x27>; - }; - - pd_gpu@14 { - reg = <0x0e>; - clocks = <0x02 0x49>; - pm_qos = <0x28>; - }; - }; - }; - - syscon@ff010000 { - compatible = "rockchip,px30-pmugrf\0syscon\0simple-mfd"; - reg = <0x00 0xff010000 0x00 0x1000>; - #address-cells = <0x01>; - #size-cells = <0x01>; - phandle = <0xac>; - - io-domains { - compatible = "rockchip,px30-pmu-io-voltage-domain"; - status = "okay"; - pmuio1-supply = <0x29>; - pmuio2-supply = <0x29>; - phandle = <0xcf>; - }; - - reboot-mode { - compatible = "syscon-reboot-mode"; - offset = <0x200>; - mode-bootloader = <0x5242c301>; - mode-charge = <0x5242c30b>; - mode-fastboot = <0x5242c309>; - mode-loader = <0x5242c301>; - mode-normal = <0x5242c300>; - mode-recovery = <0x5242c303>; - mode-ums = <0x5242c30c>; - }; - - pmu-pvtm { - compatible = "rockchip,px30-pmu-pvtm"; - clocks = <0x2a 0x07>; - clock-names = "pmu"; - status = "okay"; - phandle = <0xd0>; - }; - }; - - serial@ff030000 { - compatible = "rockchip,px30-uart\0snps,dw-apb-uart"; - reg = <0x00 0xff030000 0x00 0x100>; - interrupts = <0x00 0x0f 0x04>; - clocks = <0x2a 0x06 0x2a 0x15>; - clock-names = "baudclk\0apb_pclk"; - reg-shift = <0x02>; - reg-io-width = <0x04>; - dmas = <0x2b 0x00 0x2b 0x01>; - pinctrl-names = "default"; - pinctrl-0 = <0x2c 0x2d 0x2e>; - status = "disabled"; - phandle = <0xd1>; - }; - - i2s@ff060000 { - compatible = "rockchip,px30-i2s-tdm"; - reg = <0x00 0xff060000 0x00 0x1000>; - interrupts = <0x00 0x0c 0x04>; - clocks = <0x02 0x10 0x02 0x12 0x02 0x106>; - clock-names = "mclk_tx\0mclk_rx\0hclk"; - dmas = <0x2b 0x10 0x2b 0x11>; - dma-names = "tx\0rx"; - resets = <0x02 0x84 0x02 0xbf>; - reset-names = "tx-m\0rx-m"; - rockchip,cru = <0x02>; - rockchip,grf = <0x2f>; - pinctrl-names = "default"; - pinctrl-0 = <0x30 0x31 0x32 0x33 0x34 0x35 0x36 0x37 0x38 0x39 0x3a 0x3b>; - status = "disabled"; - phandle = <0xd2>; - }; - - i2s@ff070000 { - compatible = "rockchip,px30-i2s\0rockchip,rk3066-i2s"; - reg = <0x00 0xff070000 0x00 0x1000>; - interrupts = <0x00 0x0d 0x04>; - clocks = <0x02 0x14 0x02 0x107>; - clock-names = "i2s_clk\0i2s_hclk"; - dmas = <0x2b 0x12 0x2b 0x13>; - dma-names = "tx\0rx"; - resets = <0x02 0x86 0x02 0x85>; - reset-names = "reset-m\0reset-h"; - pinctrl-names = "default"; - pinctrl-0 = <0x3c 0x3d 0x3e 0x3f>; - status = "okay"; - #sound-dai-cells = <0x00>; - phandle = <0xc2>; - }; - - i2s@ff080000 { - compatible = "rockchip,px30-i2s\0rockchip,rk3066-i2s"; - reg = <0x00 0xff080000 0x00 0x1000>; - interrupts = <0x00 0x0e 0x04>; - clocks = <0x02 0x16 0x02 0x108>; - clock-names = "i2s_clk\0i2s_hclk"; - dmas = <0x2b 0x14 0x2b 0x15>; - dma-names = "tx\0rx"; - resets = <0x02 0x88 0x02 0x87>; - reset-names = "reset-m\0reset-h"; - pinctrl-names = "default"; - pinctrl-0 = <0x40 0x41 0x42 0x43>; - status = "disabled"; - phandle = <0xd3>; - }; - - pdm@ff0a0000 { - compatible = "rockchip,px30-pdm\0rockchip,pdm"; - reg = <0x00 0xff0a0000 0x00 0x1000>; - clocks = <0x02 0x0f 0x02 0x105>; - clock-names = "pdm_clk\0pdm_hclk"; - dmas = <0x2b 0x18>; - dma-names = "rx"; - resets = <0x02 0x82>; - reset-names = "pdm-m"; - pinctrl-names = "default"; - pinctrl-0 = <0x44 0x45 0x46 0x47 0x48 0x49>; - status = "disabled"; - phandle = <0xd4>; - }; - - crypto@ff0b0000 { - compatible = "rockchip,px30-crypto"; - reg = <0x00 0xff0b0000 0x00 0x4000>; - interrupts = <0x00 0x52 0x04>; - clocks = <0x02 0xac 0x02 0xf1 0x02 0x30 0x02 0x31>; - clock-names = "aclk\0hclk\0sclk\0apb_pclk"; - resets = <0x02 0x74>; - reset-names = "crypto-rst"; - status = "disabled"; - phandle = <0xd5>; - }; - - rng@ff0b0000 { - compatible = "rockchip,cryptov2-rng"; - reg = <0x00 0xff0b0000 0x00 0x4000>; - clocks = <0x02 0x30 0x02 0x31 0x02 0xac 0x02 0xf1>; - clock-names = "clk_crypto\0clk_crypto_apk\0aclk_crypto\0hclk_crypto"; - assigned-clocks = <0x02 0x30 0x02 0x31 0x02 0xac 0x02 0xf1>; - assigned-clock-rates = <0x8f0d180 0x8f0d180 0xbebc200 0x5f5e100>; - resets = <0x02 0x74>; - reset-names = "reset"; - status = "okay"; - phandle = <0xd6>; - }; - - interrupt-controller@ff131000 { - compatible = "arm,gic-400"; - #interrupt-cells = <0x03>; - #address-cells = <0x00>; - interrupt-controller; - reg = <0x00 0xff131000 0x00 0x1000 0x00 0xff132000 0x00 0x2000 0x00 0xff134000 0x00 0x2000 0x00 0xff136000 0x00 0x2000>; - interrupts = <0x01 0x09 0xf04>; - phandle = <0x01>; - }; - - syscon@ff140000 { - compatible = "rockchip,px30-grf\0syscon\0simple-mfd"; - reg = <0x00 0xff140000 0x00 0x1000>; - #address-cells = <0x01>; - #size-cells = <0x01>; - phandle = <0x2f>; - - io-domains { - compatible = "rockchip,px30-io-voltage-domain"; - status = "okay"; - vccio1-supply = <0x4a>; - vccio2-supply = <0x4a>; - vccio3-supply = <0x4b>; - vccio4-supply = <0x4b>; - vccio5-supply = <0x4b>; - vccio6-supply = <0x4b>; - phandle = <0xd7>; - }; - - lvds { - compatible = "rockchip,px30-lvds"; - phys = <0x4c>; - phy-names = "phy"; - status = "disabled"; - phandle = <0xd8>; - - ports { - #address-cells = <0x01>; - #size-cells = <0x00>; - - port@0 { - reg = <0x00>; - #address-cells = <0x01>; - #size-cells = <0x00>; - - endpoint@0 { - reg = <0x00>; - remote-endpoint = <0x12>; - phandle = <0xa2>; - }; - }; - }; - }; - - rgb { - compatible = "rockchip,px30-rgb"; - pinctrl-names = "default\0sleep"; - pinctrl-0 = <0x4d>; - pinctrl-1 = <0x4e>; - status = "disabled"; - phys = <0x4c>; - phy-names = "phy"; - phandle = <0xd9>; - - ports { - #address-cells = <0x01>; - #size-cells = <0x00>; - - port@0 { - reg = <0x00>; - #address-cells = <0x01>; - #size-cells = <0x00>; - - endpoint@0 { - reg = <0x00>; - remote-endpoint = <0x14>; - phandle = <0xa4>; - }; - }; - }; - }; - }; - - syscon@ff148000 { - compatible = "syscon\0simple-mfd"; - reg = <0x00 0xff148000 0x00 0x1000>; - #address-cells = <0x01>; - #size-cells = <0x01>; - phandle = <0xda>; - - pvtm { - compatible = "rockchip,px30-pvtm"; - clocks = <0x02 0x4a>; - clock-names = "core"; - status = "okay"; - phandle = <0xdb>; - }; - }; - - serial@ff158000 { - compatible = "rockchip,px30-uart\0snps,dw-apb-uart"; - reg = <0x00 0xff158000 0x00 0x100>; - interrupts = <0x00 0x10 0x04>; - clocks = <0x02 0x18 0x02 0x149>; - clock-names = "baudclk\0apb_pclk"; - reg-shift = <0x02>; - reg-io-width = <0x04>; - dmas = <0x2b 0x02 0x2b 0x03>; - pinctrl-names = "default"; - pinctrl-0 = <0x4f 0x50>; - status = "okay"; - phandle = <0xdc>; - }; - - serial@ff160000 { - compatible = "rockchip,px30-uart\0snps,dw-apb-uart"; - reg = <0x00 0xff160000 0x00 0x100>; - interrupts = <0x00 0x11 0x04>; - clocks = <0x02 0x19 0x02 0x14a>; - clock-names = "baudclk\0apb_pclk"; - reg-shift = <0x02>; - reg-io-width = <0x04>; - dmas = <0x2b 0x04 0x2b 0x05>; - pinctrl-names = "default"; - pinctrl-0 = <0x51>; - status = "disabled"; - phandle = <0xdd>; - }; - - serial@ff168000 { - compatible = "rockchip,px30-uart\0snps,dw-apb-uart"; - reg = <0x00 0xff168000 0x00 0x100>; - interrupts = <0x00 0x12 0x04>; - clocks = <0x02 0x1a 0x02 0x14b>; - clock-names = "baudclk\0apb_pclk"; - reg-shift = <0x02>; - reg-io-width = <0x04>; - dmas = <0x2b 0x06 0x2b 0x07>; - pinctrl-names = "default"; - pinctrl-0 = <0x52 0x53 0x54>; - status = "disabled"; - phandle = <0xde>; - }; - - serial@ff170000 { - compatible = "rockchip,px30-uart\0snps,dw-apb-uart"; - reg = <0x00 0xff170000 0x00 0x100>; - interrupts = <0x00 0x13 0x04>; - clocks = <0x02 0x1b 0x02 0x14c>; - clock-names = "baudclk\0apb_pclk"; - reg-shift = <0x02>; - reg-io-width = <0x04>; - dmas = <0x2b 0x08 0x2b 0x09>; - pinctrl-names = "default"; - pinctrl-0 = <0x55 0x56 0x57>; - status = "disabled"; - phandle = <0xdf>; - }; - - serial@ff178000 { - compatible = "rockchip,px30-uart\0snps,dw-apb-uart"; - reg = <0x00 0xff178000 0x00 0x100>; - interrupts = <0x00 0x14 0x04>; - clocks = <0x02 0x1c 0x02 0x14d>; - clock-names = "baudclk\0apb_pclk"; - reg-shift = <0x02>; - reg-io-width = <0x04>; - dmas = <0x2b 0x0a 0x2b 0x0b>; - pinctrl-names = "default"; - pinctrl-0 = <0x58 0x59 0x5a>; - status = "disabled"; - phandle = <0xe0>; - }; - - i2c@ff180000 { - compatible = "rockchip,rk3399-i2c"; - reg = <0x00 0xff180000 0x00 0x1000>; - clocks = <0x02 0x1d 0x02 0x14e>; - clock-names = "i2c\0pclk"; - interrupts = <0x00 0x07 0x04>; - pinctrl-names = "default"; - pinctrl-0 = <0x5b>; - #address-cells = <0x01>; - #size-cells = <0x00>; - status = "okay"; - clock-frequency = <0x61a80>; - i2c-scl-rising-time-ns = <0x118>; - i2c-scl-falling-time-ns = <0x10>; - phandle = <0xe1>; - - pmic@20 { - compatible = "rockchip,rk817"; - reg = <0x20>; - interrupt-parent = <0x5c>; - interrupts = <0x0a 0x08>; - pinctrl-names = "default\0pmic-sleep\0pmic-power-off\0pmic-reset"; - pinctrl-0 = <0x5d>; - pinctrl-1 = <0x5e 0x5f>; - pinctrl-2 = <0x60 0x61>; - pinctrl-3 = <0x62 0x63>; - rockchip,system-power-controller; - wakeup-source; - #clock-cells = <0x01>; - clock-output-names = "rk808-clkout1\0rk808-clkout2"; - pmic-reset-func = <0x01>; - vcc1-supply = <0x64>; - vcc2-supply = <0x64>; - vcc3-supply = <0x64>; - vcc4-supply = <0x64>; - vcc5-supply = <0x64>; - vcc6-supply = <0x64>; - vcc7-supply = <0x64>; - vcc8-supply = <0x64>; - vcc9-supply = <0x65>; - phandle = <0xe2>; - - pwrkey { - status = "okay"; - }; - - pinctrl_rk8xx { - gpio-controller; - #gpio-cells = <0x02>; - phandle = <0xe3>; - - rk817_ts_gpio1 { - pins = "gpio_ts"; - function = "pin_fun1"; - phandle = <0xe4>; - }; - - rk817_gt_gpio2 { - pins = "gpio_gt"; - function = "pin_fun1"; - phandle = <0xe5>; - }; - - rk817_pin_ts { - pins = "gpio_ts"; - function = "pin_fun0"; - phandle = <0xe6>; - }; - - rk817_pin_gt { - pins = "gpio_gt"; - function = "pin_fun0"; - phandle = <0xe7>; - }; - - rk817_slppin_null { - pins = "gpio_slp"; - function = "pin_fun0"; - phandle = <0xe8>; - }; - - rk817_slppin_slp { - pins = "gpio_slp"; - function = "pin_fun1"; - phandle = <0x5f>; - }; - - rk817_slppin_pwrdn { - pins = "gpio_slp"; - function = "pin_fun2"; - phandle = <0x61>; - }; - - rk817_slppin_rst { - pins = "gpio_slp"; - function = "pin_fun3"; - phandle = <0x63>; - }; - }; - - regulators { - - DCDC_REG1 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0xe7ef0>; - regulator-max-microvolt = <0x118c30>; - regulator-ramp-delay = <0x1771>; - regulator-initial-mode = <0x02>; - regulator-name = "vdd_logic"; - phandle = <0x0e>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <0xe7ef0>; - }; - }; - - DCDC_REG2 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0xe7ef0>; - regulator-max-microvolt = <0x149970>; - regulator-ramp-delay = <0x1771>; - regulator-initial-mode = <0x02>; - regulator-name = "vdd_arm"; - phandle = <0x06>; - - regulator-state-mem { - regulator-off-in-suspend; - regulator-suspend-microvolt = <0xe7ef0>; - }; - }; - - DCDC_REG3 { - regulator-always-on; - regulator-boot-on; - regulator-initial-mode = <0x02>; - regulator-name = "vcc_ddr"; - phandle = <0xe9>; - - regulator-state-mem { - regulator-on-in-suspend; - }; - }; - - DCDC_REG4 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0x325aa0>; - regulator-max-microvolt = <0x325aa0>; - regulator-initial-mode = <0x02>; - regulator-name = "vcc_3v3"; - phandle = <0x4b>; - - regulator-state-mem { - regulator-off-in-suspend; - regulator-suspend-microvolt = <0x325aa0>; - }; - }; - - LDO_REG1 { - regulator-min-microvolt = <0xf4240>; - regulator-max-microvolt = <0xf4240>; - regulator-name = "vcc_1v0"; - phandle = <0xea>; - - regulator-state-mem { - regulator-off-in-suspend; - regulator-suspend-microvolt = <0xf4240>; - }; - }; - - LDO_REG2 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0x1b7740>; - regulator-max-microvolt = <0x1b7740>; - regulator-name = "vcc1v8_soc"; - phandle = <0x88>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <0x1b7740>; - }; - }; - - LDO_REG3 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0xf4240>; - regulator-max-microvolt = <0xf4240>; - regulator-name = "vcc1v0_soc"; - phandle = <0xeb>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <0xf4240>; - }; - }; - - LDO_REG4 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0x325aa0>; - regulator-max-microvolt = <0x325aa0>; - regulator-name = "vcc3v3_pmu"; - phandle = <0x29>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <0x325aa0>; - }; - }; - - LDO_REG5 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0x1b7740>; - regulator-max-microvolt = <0x1b7740>; - regulator-name = "vccio_sd"; - phandle = <0x4a>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <0x1b7740>; - }; - }; - - LDO_REG6 { - regulator-min-microvolt = <0x1b7740>; - regulator-max-microvolt = <0x2dc6c0>; - regulator-boot-on; - regulator-name = "vcc_sd"; - phandle = <0x93>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <0x2dc6c0>; - }; - }; - - LDO_REG7 { - regulator-min-microvolt = <0x325aa0>; - regulator-max-microvolt = <0x325aa0>; - regulator-name = "vcc_backlight"; - phandle = <0x9e>; - - regulator-state-mem { - regulator-off-in-suspend; - regulator-suspend-microvolt = <0x325aa0>; - }; - }; - - LDO_REG8 { - regulator-min-microvolt = <0x2ab980>; - regulator-max-microvolt = <0x2ab980>; - regulator-name = "vcc_lcd"; - phandle = <0x9f>; - - regulator-state-mem { - regulator-off-in-suspend; - regulator-suspend-microvolt = <0x2ab980>; - }; - }; - - BOOST { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0x4c4b40>; - regulator-max-microvolt = <0x5265c0>; - regulator-name = "boost"; - phandle = <0x65>; - }; - - OTG_SWITCH { - regulator-boot-on; - regulator-name = "otg_switch"; - phandle = <0xec>; - }; - }; - - battery { - compatible = "rk817,battery"; - ocv_table = <0xc5d 0xc94 0xcd0 0xd02 0xd34 0xd66 0xd98 0xdca 0xdfc 0xe2e 0xe56 0xe7e 0xea6 0xece 0xef6 0xf1e 0xf46 0xf6e 0xf96 0xf9b 0xfa0>; - design_capacity = <0xd34>; - design_qmax = <0xe86>; - bat_res = <0x64>; - sleep_enter_current = <0x12c>; - sleep_exit_current = <0x12c>; - sleep_filter_current = <0x64>; - power_off_thresd = <0xbb8>; - zero_algorithm_vol = <0xf0a>; - max_soc_offset = <0x3c>; - monitor_sec = <0x05>; - virtual_power = <0x00>; - sample_res = <0x0a>; - }; - - charger { - compatible = "rk817,charger"; - min_input_voltage = <0x1194>; - max_input_current = <0x5dc>; - max_chrg_current = <0x7d0>; - max_chrg_voltage = <0x1068>; - chrg_term_mode = <0x00>; - chrg_finish_cur = <0x34>; - virtual_power = <0x00>; - sample_res = <0x0a>; - dc_det_gpio = <0x5c 0x0b 0x00>; - bat_low_gpio = <0x66 0x0d 0x00>; - extcon = <0x67>; - }; - - codec { - #sound-dai-cells = <0x00>; - compatible = "rockchip,rk817-codec"; - clocks = <0x02 0x15>; - clock-names = "mclk"; - pinctrl-names = "default"; - pinctrl-0 = <0x68>; - hp-volume = <0x14>; - spk-volume = <0x03>; - status = "okay"; - phandle = <0xc3>; - }; - }; - }; - - i2c@ff190000 { - compatible = "rockchip,rk3399-i2c"; - reg = <0x00 0xff190000 0x00 0x1000>; - clocks = <0x02 0x1e 0x02 0x14f>; - clock-names = "i2c\0pclk"; - interrupts = <0x00 0x08 0x04>; - pinctrl-names = "default"; - pinctrl-0 = <0x69>; - #address-cells = <0x01>; - #size-cells = <0x00>; - status = "okay"; - clock-frequency = <0x61a80>; - phandle = <0xed>; - }; - - i2c@ff1a0000 { - compatible = "rockchip,rk3399-i2c"; - reg = <0x00 0xff1a0000 0x00 0x1000>; - clocks = <0x02 0x1f 0x02 0x150>; - clock-names = "i2c\0pclk"; - interrupts = <0x00 0x09 0x04>; - pinctrl-names = "default"; - pinctrl-0 = <0x6a>; - #address-cells = <0x01>; - #size-cells = <0x00>; - status = "disabled"; - phandle = <0xee>; - }; - - i2c@ff1b0000 { - compatible = "rockchip,rk3399-i2c"; - reg = <0x00 0xff1b0000 0x00 0x1000>; - clocks = <0x02 0x20 0x02 0x151>; - clock-names = "i2c\0pclk"; - interrupts = <0x00 0x0a 0x04>; - pinctrl-names = "default"; - pinctrl-0 = <0x6b>; - #address-cells = <0x01>; - #size-cells = <0x00>; - status = "disabled"; - phandle = <0xef>; - }; - - spi@ff1d0000 { - compatible = "rockchip,px30-spi\0rockchip,rk3066-spi"; - reg = <0x00 0xff1d0000 0x00 0x1000>; - interrupts = <0x00 0x1a 0x04>; - #address-cells = <0x01>; - #size-cells = <0x00>; - clocks = <0x02 0x24 0x02 0x155>; - clock-names = "spiclk\0apb_pclk"; - dmas = <0x2b 0x0c 0x2b 0x0d>; - dma-names = "tx\0rx"; - pinctrl-names = "default\0high_speed"; - pinctrl-0 = <0x6c 0x6d 0x6e 0x6f>; - pinctrl-1 = <0x70 0x6d 0x71 0x72>; - status = "disabled"; - phandle = <0xf0>; - }; - - spi@ff1d8000 { - compatible = "rockchip,px30-spi\0rockchip,rk3066-spi"; - reg = <0x00 0xff1d8000 0x00 0x1000>; - interrupts = <0x00 0x1b 0x04>; - #address-cells = <0x01>; - #size-cells = <0x00>; - clocks = <0x02 0x25 0x02 0x156>; - clock-names = "spiclk\0apb_pclk"; - dmas = <0x2b 0x0e 0x2b 0x0f>; - dma-names = "tx\0rx"; - pinctrl-names = "default\0high_speed"; - pinctrl-0 = <0x73 0x74 0x75 0x76 0x77>; - pinctrl-1 = <0x78 0x74 0x75 0x79 0x7a>; - status = "disabled"; - phandle = <0xf1>; - }; - - watchdog@ff1e0000 { - compatible = "snps,dw-wdt"; - reg = <0x00 0xff1e0000 0x00 0x100>; - clocks = <0x02 0x15b>; - interrupts = <0x00 0x25 0x04>; - resets = <0x02 0xb5>; - reset-names = "reset"; - status = "disabled"; - phandle = <0xf2>; - }; - - pwm@ff200000 { - compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm"; - reg = <0x00 0xff200000 0x00 0x10>; - #pwm-cells = <0x03>; - pinctrl-names = "active"; - pinctrl-0 = <0x7b>; - clocks = <0x02 0x22 0x02 0x153>; - clock-names = "pwm\0pclk"; - status = "okay"; - phandle = <0xbc>; - }; - - pwm@ff200010 { - compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm"; - reg = <0x00 0xff200010 0x00 0x10>; - #pwm-cells = <0x03>; - pinctrl-names = "active"; - pinctrl-0 = <0x7c>; - clocks = <0x02 0x22 0x02 0x153>; - clock-names = "pwm\0pclk"; - status = "okay"; - phandle = <0xc1>; - }; - - pwm@ff200020 { - compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm"; - reg = <0x00 0xff200020 0x00 0x10>; - #pwm-cells = <0x03>; - pinctrl-names = "active"; - pinctrl-0 = <0x7d>; - clocks = <0x02 0x22 0x02 0x153>; - clock-names = "pwm\0pclk"; - status = "disabled"; - phandle = <0xf3>; - }; - - pwm@ff200030 { - compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm"; - reg = <0x00 0xff200030 0x00 0x10>; - #pwm-cells = <0x03>; - pinctrl-names = "active"; - pinctrl-0 = <0x7e>; - clocks = <0x02 0x22 0x02 0x153>; - clock-names = "pwm\0pclk"; - status = "disabled"; - phandle = <0xf4>; - }; - - pwm@ff208000 { - compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm"; - reg = <0x00 0xff208000 0x00 0x10>; - #pwm-cells = <0x03>; - pinctrl-names = "active"; - pinctrl-0 = <0x7f>; - clocks = <0x02 0x23 0x02 0x154>; - clock-names = "pwm\0pclk"; - status = "disabled"; - phandle = <0xf5>; - }; - - pwm@ff208010 { - compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm"; - reg = <0x00 0xff208010 0x00 0x10>; - #pwm-cells = <0x03>; - pinctrl-names = "active"; - pinctrl-0 = <0x80>; - clocks = <0x02 0x23 0x02 0x154>; - clock-names = "pwm\0pclk"; - status = "disabled"; - phandle = <0xf6>; - }; - - pwm@ff208020 { - compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm"; - reg = <0x00 0xff208020 0x00 0x10>; - #pwm-cells = <0x03>; - pinctrl-names = "active"; - pinctrl-0 = <0x81>; - clocks = <0x02 0x23 0x02 0x154>; - clock-names = "pwm\0pclk"; - status = "disabled"; - phandle = <0xf7>; - }; - - pwm@ff208030 { - compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm"; - reg = <0x00 0xff208030 0x00 0x10>; - #pwm-cells = <0x03>; - pinctrl-names = "active"; - pinctrl-0 = <0x82>; - clocks = <0x02 0x23 0x02 0x154>; - clock-names = "pwm\0pclk"; - status = "disabled"; - phandle = <0xf8>; - }; - - rktimer@ff210000 { - compatible = "rockchip,rk3288-timer"; - reg = <0x00 0xff210000 0x00 0x1000>; - interrupts = <0x00 0x1e 0x04>; - clocks = <0x02 0x159 0x02 0x26>; - clock-names = "pclk\0timer"; - phandle = <0xf9>; - }; - - amba { - compatible = "simple-bus"; - #address-cells = <0x02>; - #size-cells = <0x02>; - ranges; - - dmac@ff240000 { - compatible = "arm,pl330\0arm,primecell"; - reg = <0x00 0xff240000 0x00 0x4000>; - interrupts = <0x00 0x01 0x04 0x00 0x02 0x04>; - clocks = <0x02 0xbb>; - clock-names = "apb_pclk"; - #dma-cells = <0x01>; - peripherals-req-type-burst; - phandle = <0x2b>; - }; - }; - - thermal-zones { - phandle = <0xfa>; - - soc-thermal { - polling-delay-passive = <0x14>; - polling-delay = <0x3e8>; - sustainable-power = <0x2ee>; - thermal-sensors = <0x83 0x00>; - phandle = <0xfb>; - - trips { - - trip-point-0 { - temperature = <0x11170>; - hysteresis = <0x7d0>; - type = "passive"; - phandle = <0xfc>; - }; - - trip-point-1 { - temperature = <0x14c08>; - hysteresis = <0x7d0>; - type = "passive"; - phandle = <0x84>; - }; - - soc-crit { - temperature = <0x1c138>; - hysteresis = <0x7d0>; - type = "critical"; - phandle = <0xfd>; - }; - }; - - cooling-maps { - - map0 { - trip = <0x84>; - cooling-device = <0x09 0xffffffff 0xffffffff>; - contribution = <0x1000>; - }; - - map1 { - trip = <0x84>; - cooling-device = <0x85 0xffffffff 0xffffffff>; - contribution = <0x1000>; - }; - }; - }; - - gpu-thermal { - polling-delay-passive = <0x64>; - polling-delay = <0x3e8>; - thermal-sensors = <0x83 0x01>; - phandle = <0xfe>; - }; - }; - - tsadc@ff280000 { - compatible = "rockchip,px30-tsadc"; - reg = <0x00 0xff280000 0x00 0x100>; - interrupts = <0x00 0x24 0x04>; - rockchip,grf = <0x2f>; - clocks = <0x02 0x2c 0x02 0x158>; - clock-names = "tsadc\0apb_pclk"; - assigned-clocks = <0x02 0x2c>; - assigned-clock-rates = <0xc350>; - resets = <0x02 0xa8>; - reset-names = "tsadc-apb"; - #thermal-sensor-cells = <0x01>; - rockchip,hw-tshut-temp = <0x1d4c0>; - status = "okay"; - pinctrl-names = "gpio\0otpout"; - pinctrl-0 = <0x86>; - pinctrl-1 = <0x87>; - phandle = <0x83>; - }; - - saradc@ff288000 { - compatible = "rockchip,px30-saradc\0rockchip,rk3399-saradc"; - reg = <0x00 0xff288000 0x00 0x100>; - interrupts = <0x00 0x54 0x04>; - #io-channel-cells = <0x01>; - clocks = <0x02 0x2d 0x02 0x157>; - clock-names = "saradc\0apb_pclk"; - resets = <0x02 0xa5>; - reset-names = "saradc-apb"; - status = "okay"; - vref-supply = <0x88>; - phandle = <0xbe>; - }; - - otp@ff290000 { - compatible = "rockchip,px30-otp"; - reg = <0x00 0xff290000 0x00 0x4000>; - #address-cells = <0x01>; - #size-cells = <0x01>; - clocks = <0x02 0x2f 0x02 0x15a 0x02 0x161>; - clock-names = "clk_otp\0pclk_otp\0pclk_otp_phy"; - resets = <0x02 0xb4>; - reset-names = "otp_phy"; - phandle = <0xff>; - - id@7 { - reg = <0x07 0x10>; - phandle = <0x0f>; - }; - - cpu-leakage@17 { - reg = <0x17 0x01>; - phandle = <0x07>; - }; - - performance@1e { - reg = <0x1e 0x01>; - bits = <0x04 0x03>; - phandle = <0x08>; - }; - }; - - clock-controller@ff2b0000 { - compatible = "rockchip,px30-cru"; - reg = <0x00 0xff2b0000 0x00 0x1000>; - rockchip,grf = <0x2f>; - rockchip,boost = <0x89>; - #clock-cells = <0x01>; - #reset-cells = <0x01>; - assigned-clocks = <0x02 0x04>; - assigned-clock-rates = <0x3dfd2400>; - phandle = <0x02>; - }; - - cpu-boost@ff2b8000 { - compatible = "syscon"; - reg = <0x00 0xff2b8000 0x00 0x1000>; - rockchip,boost-low-con0 = <0x1032>; - rockchip,boost-low-con1 = <0x1441>; - rockchip,boost-high-con0 = <0x1036>; - rockchip,boost-high-con1 = <0x1441>; - rockchip,boost-backup-pll = <0x01>; - rockchip,boost-backup-pll-usage = <0x00>; - rockchip,boost-switch-threshold = <0x249f00>; - rockchip,boost-statis-threshold = <0x100>; - rockchip,boost-statis-enable = <0x00>; - rockchip,boost-enable = <0x00>; - phandle = <0x89>; - }; - - pmu-clock-controller@ff2bc000 { - compatible = "rockchip,px30-pmucru"; - reg = <0x00 0xff2bc000 0x00 0x1000>; - rockchip,grf = <0x2f>; - #clock-cells = <0x01>; - #reset-cells = <0x01>; - assigned-clocks = <0x2a 0x01 0x2a 0x08 0x2a 0x05 0x02 0x07 0x02 0xab 0x02 0xb0 0x02 0xf0 0x02 0xf5 0x02 0x140 0x02 0x49>; - assigned-clock-rates = <0x47868c00 0x5f5e100 0x18cba80 0x23c34600 0xbebc200 0xbebc200 0x8f0d180 0x8f0d180 0x5f5e100 0xbebc200>; - phandle = <0x2a>; - }; - - syscon@ff2c0000 { - compatible = "rockchip,px30-usb2phy-grf\0syscon\0simple-mfd"; - reg = <0x00 0xff2c0000 0x00 0x10000>; - #address-cells = <0x01>; - #size-cells = <0x01>; - phandle = <0x100>; - - usb2-phy@100 { - compatible = "rockchip,px30-usb2phy\0rockchip,rk3328-usb2phy"; - reg = <0x100 0x10>; - clocks = <0x2a 0x0a>; - clock-names = "phyclk"; - #clock-cells = <0x00>; - assigned-clocks = <0x02 0x0e 0x02 0x55>; - assigned-clock-parents = <0x67 0x02 0x0e>; - clock-output-names = "usb480m_phy"; - status = "okay"; - phandle = <0x67>; - - host-port { - #phy-cells = <0x00>; - interrupts = <0x00 0x44 0x04>; - interrupt-names = "linestate"; - status = "okay"; - phandle = <0x8c>; - }; - - otg-port { - #phy-cells = <0x00>; - interrupts = <0x00 0x42 0x04 0x00 0x41 0x04 0x00 0x40 0x04>; - interrupt-names = "otg-bvalid\0otg-id\0linestate"; - status = "disabled"; - phandle = <0x8b>; - }; - }; - }; - - video-phy@ff2e0000 { - compatible = "rockchip,px30-video-phy"; - reg = <0x00 0xff2e0000 0x00 0x10000 0x00 0xff450000 0x00 0x10000>; - clocks = <0x2a 0x0b 0x02 0x145 0x02 0x144>; - clock-names = "ref\0pclk_phy\0pclk_host"; - #clock-cells = <0x00>; - resets = <0x02 0x3e>; - reset-names = "rst"; - power-domains = <0x8a 0x0c>; - #phy-cells = <0x00>; - status = "okay"; - phandle = <0x4c>; - }; - - mipi-dphy-rx0@ff2f0000 { - compatible = "rockchip,rk3326-mipi-dphy"; - reg = <0x00 0xff2f0000 0x00 0x4000>; - clocks = <0x02 0x146>; - clock-names = "dphy-ref"; - power-domains = <0x8a 0x0d>; - rockchip,grf = <0x2f>; - status = "okay"; - phandle = <0x101>; - }; - - usb@ff300000 { - compatible = "rockchip,px30-usb\0rockchip,rk3066-usb\0snps,dwc2"; - reg = <0x00 0xff300000 0x00 0x40000>; - interrupts = <0x00 0x3e 0x04>; - clocks = <0x02 0x102>; - clock-names = "otg"; - power-domains = <0x8a 0x05>; - dr_mode = "otg"; - g-np-tx-fifo-size = <0x10>; - g-rx-fifo-size = <0x118>; - g-tx-fifo-size = <0x100 0x80 0x80 0x40 0x20 0x10>; - g-use-dma; - phys = <0x8b>; - phy-names = "usb2-phy"; - status = "okay"; - phandle = <0x102>; - vbus-supply = <&vcc_host>; - }; - - usb@ff340000 { - compatible = "generic-ehci"; - reg = <0x00 0xff340000 0x00 0x10000>; - interrupts = <0x00 0x3c 0x04>; - clocks = <0x02 0x103 0x67>; - clock-names = "usbhost\0utmi"; - power-domains = <0x8a 0x05>; - phys = <0x8c>; - phy-names = "usb"; - status = "disabled"; - phandle = <0x103>; - }; - - usb@ff350000 { - compatible = "generic-ohci"; - reg = <0x00 0xff350000 0x00 0x10000>; - interrupts = <0x00 0x3d 0x04>; - clocks = <0x02 0x103 0x67>; - clock-names = "usbhost\0utmi"; - power-domains = <0x8a 0x05>; - phys = <0x8c>; - phy-names = "usb"; - status = "disabled"; - phandle = <0x104>; - }; - - ethernet@ff360000 { - compatible = "rockchip,px30-gmac"; - reg = <0x00 0xff360000 0x00 0x10000>; - rockchip,grf = <0x2f>; - interrupts = <0x00 0x2b 0x04>; - interrupt-names = "macirq"; - clocks = <0x02 0x3e 0x02 0x3f 0x02 0x3f 0x02 0x40 0x02 0x41 0x02 0xb2 0x02 0x143 0x02 0x4c>; - clock-names = "stmmaceth\0mac_clk_rx\0mac_clk_tx\0clk_mac_ref\0clk_mac_refout\0aclk_mac\0pclk_mac\0clk_mac_speed"; - phy-mode = "rmii"; - pinctrl-names = "default"; - pinctrl-0 = <0x8d 0x8e>; - resets = <0x02 0x5e>; - reset-names = "stmmaceth"; - power-domains = <0x8a 0x09>; - status = "disabled"; - phandle = <0x105>; - }; - - dwmmc@ff370000 { - compatible = "rockchip,px30-dw-mshc\0rockchip,rk3288-dw-mshc"; - reg = <0x00 0xff370000 0x00 0x4000>; - max-frequency = <0x8f0d180>; - clocks = <0x02 0xf7 0x02 0x3b 0x02 0x43 0x02 0x44>; - clock-names = "biu\0ciu\0ciu-drv\0ciu-sample"; - assigned-clocks = <0x02 0x3b>; - assigned-clock-parents = <0x02 0x57>; - power-domains = <0x8a 0x07>; - fifo-depth = <0x100>; - interrupts = <0x00 0x36 0x04>; - pinctrl-names = "default"; - pinctrl-0 = <0x8f 0x90 0x91 0x92>; - status = "okay"; - bus-width = <0x04>; - cap-mmc-highspeed; - cap-sd-highspeed; - supports-sd; - card-detect-delay = <0x320>; - ignore-pm-notify; - cd-gpios = <0x5c 0x03 0x01>; - sd-uhs-sdr12; - sd-uhs-sdr25; - sd-uhs-sdr50; - sd-uhs-sdr104; - vqmmc-supply = <0x4a>; - vmmc-supply = <0x93>; - phandle = <0x106>; - }; - - dwmmc@ff380000 { - compatible = "rockchip,px30-dw-mshc\0rockchip,rk3288-dw-mshc"; - reg = <0x00 0xff380000 0x00 0x4000>; - max-frequency = <0x8f0d180>; - clocks = <0x02 0xff 0x02 0x38 0x02 0x45 0x02 0x46>; - clock-names = "biu\0ciu\0ciu-drv\0ciu-sample"; - assigned-clocks = <0x02 0x38>; - assigned-clock-parents = <0x02 0x51>; - power-domains = <0x8a 0x0a>; - fifo-depth = <0x100>; - interrupts = <0x00 0x37 0x04>; - pinctrl-names = "default"; - pinctrl-0 = <0x94 0x95 0x96>; - status = "okay"; - bus-width = <0x04>; - cap-mmc-highspeed; - cap-sd-highspeed; - supports-sd; - card-detect-delay = <0x320>; - ignore-pm-notify; - cd-gpios = <0x97 0x0e 0x01>; - sd-uhs-sdr12; - sd-uhs-sdr25; - sd-uhs-sdr50; - sd-uhs-sdr104; - vqmmc-supply = <0x4a>; - vmmc-supply = <0x93>; - phandle = <0x107>; - }; - - dwmmc@ff390000 { - compatible = "rockchip,px30-dw-mshc\0rockchip,rk3288-dw-mshc"; - reg = <0x00 0xff390000 0x00 0x4000>; - max-frequency = <0x8f0d180>; - clocks = <0x02 0x100 0x02 0x39 0x02 0x47 0x02 0x48>; - clock-names = "biu\0ciu\0ciu-drv\0ciu-sample"; - assigned-clocks = <0x02 0x39>; - assigned-clock-parents = <0x02 0x53>; - power-domains = <0x8a 0x0a>; - fifo-depth = <0x100>; - interrupts = <0x00 0x35 0x04>; - status = "disabled"; - phandle = <0x108>; - }; - - nandc@ff3b0000 { - compatible = "rockchip,rk-nandc"; - reg = <0x00 0xff3b0000 0x00 0x4000>; - interrupts = <0x00 0x39 0x04>; - nandc_id = <0x00>; - clocks = <0x02 0x37 0x02 0xfe>; - clock-names = "clk_nandc\0hclk_nandc"; - assigned-clocks = <0x02 0x37>; - assigned-clock-parents = <0x02 0x4f>; - power-domains = <0x8a 0x0a>; - status = "disabled"; - phandle = <0x109>; - }; - - sfc@ff3a0000 { - compatible = "rockchip,sfc"; - reg = <0x00 0xff3a0000 0x00 0x4000>; - interrupts = <0x00 0x38 0x04>; - clocks = <0x02 0x3a 0x02 0x101>; - clock-names = "clk_sfc\0hclk_sfc"; - assigned-clocks = <0x02 0x3a>; - assigned-clock-rates = <0x989680>; - status = "disabled"; - phandle = <0x10a>; - }; - - gpu@ff400000 { - compatible = "arm,malit602\0arm,malit60x\0arm,malit6xx\0arm,mali-midgard"; - reg = <0x00 0xff400000 0x00 0x4000>; - interrupts = <0x00 0x2d 0x04 0x00 0x2e 0x04 0x00 0x2f 0x04>; - interrupt-names = "GPU\0MMU\0JOB"; - clocks = <0x02 0x49>; - clock-names = "clk_mali"; - power-domains = <0x8a 0x0e>; - #cooling-cells = <0x02>; - operating-points-v2 = <0x98>; - status = "okay"; - mali-supply = <0x0e>; - phandle = <0x85>; - - power_model { - compatible = "arm,mali-simple-power-model"; - static-coefficient = <0x64578>; - dynamic-coefficient = <0x2dd>; - ts = <0x7d00 0x125c 0xffffffb0 0x02>; - thermal-zone = "gpu-thermal"; - }; - }; - - gpu-opp-table { - compatible = "operating-points-v2"; - rockchip,thermal-zone = "soc-thermal"; - rockchip,temp-hysteresis = <0x1388>; - rockchip,low-temp = <0x00>; - rockchip,low-temp-min-volt = <0xf4240>; - rockchip,low-temp-adjust-volt = <0x00 0x1e0 0xc350>; - rockchip,max-volt = <0x11edd8>; - rockchip,evb-irdrop = <0x61a8>; - rockchip,pvtm-voltage-sel = <0x00 0xc350 0x00 0xc351 0xd2f0 0x01 0xd2f1 0xea60 0x02 0xea61 0x1869f 0x03>; - rockchip,pvtm-ch = <0x00 0x00>; - phandle = <0x98>; - - opp-400000000 { - opp-hz = <0x00 0x17d78400>; - opp-microvolt = <0x100590>; - opp-microvolt-L0 = <0x100590>; - opp-microvolt-L1 = <0xfa3e8>; - opp-microvolt-L2 = <0xee098>; - opp-microvolt-L3 = <0xe7ef0>; - }; - - opp-480000000 { - opp-hz = <0x00 0x1c9c3800>; - opp-microvolt = <0x112a88>; - opp-microvolt-L0 = <0x112a88>; - opp-microvolt-L1 = <0x10c8e0>; - opp-microvolt-L2 = <0x100590>; - opp-microvolt-L3 = <0xf4240>; - }; - - opp-520000000 { - opp-hz = <0x00 0x1efe9200>; - opp-microvolt = <0x118c30>; - opp-microvolt-L0 = <0x118c30>; - opp-microvolt-L1 = <0x118c30>; - opp-microvolt-L2 = <0x10c8e0>; - opp-microvolt-L3 = <0x100590>; - }; - }; - - hevc_service@ff440000 { - compatible = "rockchip,hevc_sub"; - iommu_enabled = <0x01>; - reg = <0x00 0xff440000 0x00 0x400>; - interrupts = <0x00 0x31 0x04>; - interrupt-names = "irq_dec"; - dev_mode = <0x01>; - iommus = <0x99>; - allocator = <0x01>; - phandle = <0x9c>; - }; - - vpu_service@ff442000 { - compatible = "rockchip,vpu_sub"; - iommu_enabled = <0x01>; - reg = <0x00 0xff442000 0x00 0x800>; - interrupts = <0x00 0x50 0x04 0x00 0x4f 0x04>; - interrupt-names = "irq_enc\0irq_dec"; - dev_mode = <0x00>; - iommus = <0x9a>; - allocator = <0x01>; - phandle = <0x9b>; - }; - - vpu_combo { - compatible = "rockchip,vpu_combo"; - subcnt = <0x02>; - rockchip,grf = <0x2f>; - rockchip,sub = <0x9b 0x9c>; - clocks = <0x02 0xaf 0x02 0xf4 0x02 0x4b>; - clock-names = "aclk_vcodec\0hclk_vcodec\0clk_core"; - resets = <0x02 0x24 0x02 0x26 0x02 0x25 0x02 0x27 0x02 0x3f>; - reset-names = "video_a\0video_h\0niu_a\0niu_h\0video_core"; - power-domains = <0x8a 0x0b>; - mode_bit = <0x0f>; - mode_ctrl = <0x410>; - status = "okay"; - phandle = <0x10b>; - }; - - iommu@ff440440 { - compatible = "rockchip,iommu"; - reg = <0x00 0xff440440 0x00 0x40 0x00 0xff440480 0x00 0x40>; - interrupts = <0x00 0x32 0x04>; - interrupt-names = "hevc_mmu"; - clocks = <0x02 0xaf 0x02 0xf4>; - clock-names = "aclk\0hclk"; - power-domains = <0x8a 0x0b>; - #iommu-cells = <0x00>; - phandle = <0x99>; - }; - - iommu@ff442800 { - compatible = "rockchip,iommu"; - reg = <0x00 0xff442800 0x00 0x100>; - interrupts = <0x00 0x51 0x04>; - interrupt-names = "vpu_mmu"; - clocks = <0x02 0xaf 0x02 0xf4>; - clock-names = "aclk\0hclk"; - power-domains = <0x8a 0x0b>; - #iommu-cells = <0x00>; - phandle = <0x9a>; - }; - - dsi@ff450000 { - compatible = "rockchip,px30-mipi-dsi"; - reg = <0x00 0xff450000 0x00 0x10000>; - interrupts = <0x00 0x4b 0x04>; - clocks = <0x02 0x144 0x4c>; - clock-names = "pclk\0hs_clk"; - resets = <0x02 0x3d>; - reset-names = "apb"; - phys = <0x4c>; - phy-names = "mipi_dphy"; - power-domains = <0x8a 0x0c>; - rockchip,grf = <0x2f>; - #address-cells = <0x01>; - #size-cells = <0x00>; - status = "okay"; - phandle = <0x10c>; - - ports { - #address-cells = <0x01>; - #size-cells = <0x00>; - - port@0 { - reg = <0x00>; - #address-cells = <0x01>; - #size-cells = <0x00>; - - endpoint@0 { - reg = <0x00>; - remote-endpoint = <0x13>; - status = "okay"; - phandle = <0xa3>; - }; - }; - }; - - panel@0 { - compatible = "elida,kd35t133\0simple-panel-dsi"; - reg = <0x00>; - backlight = <0x9d>; - backlight-supply = <0x9e>; - power-supply = <0x9f>; - reset-gpios = <0x97 0x10 0x01>; - reset-delay-ms = <0x96>; - init-delay-ms = <0x14>; - enable-delay-ms = <0x78>; - prepare-delay-ms = <0x14>; - unprepare-delay-ms = <0x14>; - disable-delay-ms = <0x32>; - width-mm = <0x34>; - height-mm = <0x46>; - dsi,flags = <0xa03>; - dsi,format = <0x00>; - dsi,lanes = <0x04>; - panel-init-sequence = [15 00 02 ff 30 15 00 02 ff 52 15 00 02 ff 01 15 00 02 e3 00 15 00 02 25 10 15 00 02 28 6f 15 00 02 29 01 15 00 02 2a df 15 00 02 2c 22 15 00 02 c3 0f 15 00 02 37 9c 15 00 02 38 a7 15 00 02 39 41 15 00 02 80 20 15 00 02 91 67 15 00 02 92 67 15 00 02 a0 55 15 00 02 a1 50 15 00 02 a3 58 15 00 02 a4 9c 15 00 02 a7 02 15 00 02 a8 01 15 00 02 a9 21 15 00 02 aa fc 15 00 02 ab 28 15 00 02 ac 06 15 00 02 ad 06 15 00 02 ae 06 15 00 02 af 03 15 00 02 b0 08 15 00 02 b1 26 15 00 02 b2 28 15 00 02 b3 28 15 00 02 b4 03 15 00 02 b5 08 15 00 02 b6 26 15 00 02 b7 08 15 00 02 b8 26 15 00 02 2c 22 15 00 02 5c 40 15 00 02 c0 00 15 00 02 c1 00 15 00 02 c2 00 15 00 02 ff 30 15 00 02 ff 52 15 00 02 ff 02 15 00 02 b0 02 15 00 02 d0 02 15 00 02 b1 0f 15 00 02 d1 10 15 00 02 b2 11 15 00 02 d2 12 15 00 02 b3 32 15 00 02 d3 33 15 00 02 b4 36 15 00 02 d4 36 15 00 02 b5 3c 15 00 02 d5 3c 15 00 02 b6 20 15 00 02 d6 20 15 00 02 b7 3e 15 00 02 d7 3e 15 00 02 b8 0e 15 00 02 d8 0d 15 00 02 b9 05 15 00 02 d9 05 15 00 02 ba 11 15 00 02 da 12 15 00 02 bb 11 15 00 02 db 11 15 00 02 bc 13 15 00 02 dc 14 15 00 02 bd 14 15 00 02 dd 14 15 00 02 be 16 15 00 02 de 18 15 00 02 bf 0e 15 00 02 df 0f 15 00 02 c0 17 15 00 02 e0 17 15 00 02 c1 07 15 00 02 e1 08 15 00 02 ff 30 15 00 02 ff 52 15 00 02 ff 03 15 00 02 08 8a 15 00 02 09 8b 15 00 02 30 00 15 00 02 31 00 15 00 02 32 00 15 00 02 33 00 15 00 02 34 61 15 00 02 35 d4 15 00 02 36 24 15 00 02 37 03 15 00 02 40 86 15 00 02 41 87 15 00 02 42 84 15 00 02 43 85 15 00 02 44 11 15 00 02 45 de 15 00 02 46 dd 15 00 02 47 11 15 00 02 48 e0 15 00 02 49 df 15 00 02 50 82 15 00 02 51 83 15 00 02 52 80 15 00 02 53 81 15 00 02 54 11 15 00 02 55 e2 15 00 02 56 e1 15 00 02 57 11 15 00 02 58 e4 15 00 02 59 e3 15 00 02 82 0f 15 00 02 83 0f 15 00 02 84 00 15 00 02 85 0f 15 00 02 86 0f 15 00 02 87 0e 15 00 02 88 0e 15 00 02 89 06 15 00 02 8a 06 15 00 02 8b 07 15 00 02 8c 07 15 00 02 8d 04 15 00 02 8e 04 15 00 02 8f 05 15 00 02 90 05 15 00 02 98 0f 15 00 02 99 0f 15 00 02 9a 00 15 00 02 9b 0f 15 00 02 9c 0f 15 00 02 9d 0e 15 00 02 9e 0e 15 00 02 9f 06 15 00 02 a0 06 15 00 02 a1 07 15 00 02 a2 07 15 00 02 a3 04 15 00 02 a4 04 15 00 02 a5 05 15 00 02 a6 05 15 00 02 e0 02 15 00 02 e1 52 15 00 02 ff 30 15 00 02 ff 52 15 00 02 ff 00 15 00 02 36 02 05 c8 01 11 05 14 01 29]; - panel-exit-sequence = <0x5140128 0x50a0110>; - - display-timings { - native-mode = <0xa0>; - - 60Hz { - clock-frequency = <0x3750280>; - hactive = <0x280>; - vactive = <0x1e0>; - hfront-porch = <0x12c>; - hsync-len = <0xc8>; - hback-porch = <0x12c>; - vfront-porch = <0x11>; - vsync-len = <0x05>; - vback-porch = <0x0d>; - hsync-active = <0x00>; - vsync-active = <0x00>; - de-active = <0x00>; - pixelclk-active = <0x01>; - phandle = <0xa0>; - }; - - 50Hz { - clock-frequency = <0x3750280>; - hactive = <0x280>; - vactive = <0x1e0>; - hfront-porch = <0x12c>; - hsync-len = <0xc8>; - hback-porch = <0x12c>; - vfront-porch = <0x11>; - vsync-len = <0x05>; - vback-porch = <0x0d>; - hsync-active = <0x00>; - vsync-active = <0x00>; - de-active = <0x00>; - pixelclk-active = <0x01>; - phandle = <0xa00>; - }; - - 75Hz { - clock-frequency = <0x3750280>; - hactive = <0x280>; - vactive = <0x1e0>; - hfront-porch = <0x12c>; - hsync-len = <0xc8>; - hback-porch = <0x12c>; - vfront-porch = <0x11>; - vsync-len = <0x05>; - vback-porch = <0x0d>; - hsync-active = <0x00>; - vsync-active = <0x00>; - de-active = <0x00>; - pixelclk-active = <0x01>; - phandle = <0xa01>; - }; - }; - }; - }; - - vop@ff460000 { - compatible = "rockchip,px30-vop-big"; - reg = <0x00 0xff460000 0x00 0x1fc 0x00 0xff460a00 0x00 0x400>; - rockchip,grf = <0x2f>; - reg-names = "regs\0gamma_lut"; - interrupts = <0x00 0x4d 0x04>; - clocks = <0x02 0xb5 0x02 0x96 0x02 0xfb>; - clock-names = "aclk_vop\0dclk_vop\0hclk_vop"; - power-domains = <0x8a 0x0c>; - iommus = <0xa1>; - status = "okay"; - phandle = <0x10f>; - - port { - #address-cells = <0x01>; - #size-cells = <0x00>; - phandle = <0x10>; - - endpoint@0 { - reg = <0x00>; - remote-endpoint = <0xa2>; - phandle = <0x12>; - }; - - endpoint@1 { - reg = <0x01>; - remote-endpoint = <0xa3>; - phandle = <0x13>; - }; - - endpoint@2 { - reg = <0x02>; - remote-endpoint = <0xa4>; - phandle = <0x14>; - }; - }; - }; - - iommu@ff460f00 { - compatible = "rockchip,iommu"; - reg = <0x00 0xff460f00 0x00 0x100>; - interrupts = <0x00 0x4d 0x04>; - interrupt-names = "vopb_mmu"; - clocks = <0x02 0xb5 0x02 0xfb>; - clock-names = "aclk\0hclk"; - power-domains = <0x8a 0x0c>; - #iommu-cells = <0x00>; - status = "okay"; - phandle = <0xa1>; - }; - - rk_rga@ff480000 { - compatible = "rockchip,rga2"; - reg = <0x00 0xff480000 0x00 0x1000>; - interrupts = <0x00 0x4c 0x04>; - clocks = <0x02 0xb7 0x02 0xfd 0x02 0x35>; - clock-names = "aclk_rga\0hclk_rga\0clk_rga"; - power-domains = <0x8a 0x0c>; - dma-coherent; - status = "okay"; - phandle = <0x110>; - }; - - cif@ff490000 { - compatible = "rockchip,cif"; - reg = <0x00 0xff490000 0x00 0x200>; - interrupts = <0x00 0x45 0x04>; - clocks = <0x02 0xb3 0x02 0xf9 0x02 0x160 0x02 0x34>; - clock-names = "aclk_cif0\0hclk_cif0\0pclk_cif\0cif0_out"; - resets = <0x02 0x2c 0x02 0x2d 0x02 0x2e>; - reset-names = "rst_cif_a\0rst_cif_h\0rst_cif_pclkin"; - power-domains = <0x8a 0x0d>; - pinctrl-names = "cif_pin_all"; - pinctrl-0 = <0xa5>; - iommus = <0xa6>; - status = "disabled"; - phandle = <0x111>; - }; - - cif-new@ff490000 { - compatible = "rockchip,px30-cif"; - reg = <0x00 0xff490000 0x00 0x200>; - interrupts = <0x00 0x45 0x04>; - clocks = <0x02 0xb3 0x02 0xf9 0x02 0x160 0x02 0x34>; - clock-names = "aclk_cif\0hclk_cif\0pclk_cif\0cif_out"; - resets = <0x02 0x2c 0x02 0x2d 0x02 0x2e>; - reset-names = "rst_cif_a\0rst_cif_h\0rst_cif_pclkin"; - power-domains = <0x8a 0x0d>; - iommus = <0xa6>; - status = "disabled"; - phandle = <0x112>; - }; - - iommu@ff490800 { - compatible = "rockchip,iommu"; - reg = <0x00 0xff490800 0x00 0x100>; - interrupts = <0x00 0x45 0x04>; - interrupt-names = "vip_mmu"; - clocks = <0x02 0xb3 0x02 0xf9>; - clock-names = "aclk\0hclk"; - power-domains = <0x8a 0x0d>; - rk_iommu,disable_reset_quirk; - #iommu-cells = <0x00>; - status = "okay"; - phandle = <0xa6>; - }; - - rk_isp@ff4a0000 { - compatible = "rockchip,px30-isp\0rockchip,isp"; - reg = <0x00 0xff4a0000 0x00 0x8000>; - interrupts = <0x00 0x46 0x04>; - clocks = <0x02 0xb4 0x02 0xfa 0x02 0x33 0x02 0x33 0x02 0x15f 0x02 0x34 0x02 0x34 0x02 0x146>; - clock-names = "aclk_isp\0hclk_isp\0clk_isp\0clk_isp_jpe\0pclkin_isp\0clk_cif_pll\0clk_cif_out\0pclk_dphyrx"; - resets = <0x02 0x2b 0x02 0x2f>; - reset-names = "rst_isp\0rst_mipicsiphy"; - power-domains = <0x8a 0x0d>; - pinctrl-names = "default\0isp_dvp8bit2\0isp_dvp10bit\0isp_dvp12bit"; - pinctrl-0 = <0xa7>; - pinctrl-1 = <0xa5>; - pinctrl-2 = <0xa5 0xa8>; - pinctrl-3 = <0xa9 0xa5 0xa8>; - rockchip,isp,mipiphy = <0x01>; - rockchip,isp,csiphy,reg = <0xff2f0000 0x4000>; - rockchip,grf = <0x2f>; - rockchip,cru = <0x02>; - rockchip,isp,iommu-enable = <0x01>; - iommus = <0xaa>; - status = "disabled"; - phandle = <0x113>; - }; - - rkisp1@ff4a0000 { - compatible = "rockchip,rk3326-rkisp1"; - reg = <0x00 0xff4a0000 0x00 0x8000>; - interrupts = <0x00 0x46 0x04 0x00 0x49 0x04 0x00 0x4a 0x04>; - interrupt-names = "isp_irq\0mi_irq\0mipi_irq"; - clocks = <0x02 0xb4 0x02 0xfa 0x02 0x33 0x02 0x15f>; - clock-names = "aclk_isp\0hclk_isp\0clk_isp\0pclk_isp"; - devfreq = <0xab>; - power-domains = <0x8a 0x0d>; - iommus = <0xaa>; - rockchip,grf = <0x2f>; - status = "okay"; - phandle = <0x114>; - }; - - iommu@ff4a8000 { - compatible = "rockchip,iommu"; - reg = <0x00 0xff4a8000 0x00 0x100>; - interrupts = <0x00 0x46 0x04>; - interrupt-names = "isp_mmu"; - clocks = <0x02 0xb4 0x02 0xfa>; - clock-names = "aclk\0hclk"; - power-domains = <0x8a 0x0d>; - rk_iommu,disable_reset_quirk; - #iommu-cells = <0x00>; - status = "okay"; - phandle = <0xaa>; - }; - - qos@ff518000 { - compatible = "syscon"; - reg = <0x00 0xff518000 0x00 0x20>; - phandle = <0x18>; - }; - - qos@ff520000 { - compatible = "syscon"; - reg = <0x00 0xff520000 0x00 0x20>; - phandle = <0x28>; - }; - - qos@ff52c000 { - compatible = "syscon"; - reg = <0x00 0xff52c000 0x00 0x20>; - phandle = <0x17>; - }; - - qos@ff538000 { - compatible = "syscon"; - reg = <0x00 0xff538000 0x00 0x20>; - phandle = <0x19>; - }; - - qos@ff538080 { - compatible = "syscon"; - reg = <0x00 0xff538080 0x00 0x20>; - phandle = <0x1a>; - }; - - qos@ff538100 { - compatible = "syscon"; - reg = <0x00 0xff538100 0x00 0x20>; - phandle = <0x1b>; - }; - - qos@ff538180 { - compatible = "syscon"; - reg = <0x00 0xff538180 0x00 0x20>; - phandle = <0x1c>; - }; - - qos@ff540000 { - compatible = "syscon"; - reg = <0x00 0xff540000 0x00 0x20>; - phandle = <0x15>; - }; - - qos@ff540080 { - compatible = "syscon"; - reg = <0x00 0xff540080 0x00 0x20>; - phandle = <0x16>; - }; - - qos@ff548000 { - compatible = "syscon"; - reg = <0x00 0xff548000 0x00 0x20>; - phandle = <0x23>; - }; - - qos@ff548080 { - compatible = "syscon"; - reg = <0x00 0xff548080 0x00 0x20>; - phandle = <0x24>; - }; - - qos@ff548100 { - compatible = "syscon"; - reg = <0x00 0xff548100 0x00 0x20>; - phandle = <0x25>; - }; - - qos@ff548180 { - compatible = "syscon"; - reg = <0x00 0xff548180 0x00 0x20>; - phandle = <0x26>; - }; - - qos@ff548200 { - compatible = "syscon"; - reg = <0x00 0xff548200 0x00 0x20>; - phandle = <0x27>; - }; - - qos@ff550000 { - compatible = "syscon"; - reg = <0x00 0xff550000 0x00 0x20>; - phandle = <0x1f>; - }; - - qos@ff550080 { - compatible = "syscon"; - reg = <0x00 0xff550080 0x00 0x20>; - phandle = <0x20>; - }; - - qos@ff550100 { - compatible = "syscon"; - reg = <0x00 0xff550100 0x00 0x20>; - phandle = <0x21>; - }; - - qos@ff550180 { - compatible = "syscon"; - reg = <0x00 0xff550180 0x00 0x20>; - phandle = <0x22>; - }; - - qos@ff558000 { - compatible = "syscon"; - reg = <0x00 0xff558000 0x00 0x20>; - phandle = <0x1d>; - }; - - qos@ff558080 { - compatible = "syscon"; - reg = <0x00 0xff558080 0x00 0x20>; - phandle = <0x1e>; - }; - - dfi@ff610000 { - reg = <0x00 0xff610000 0x00 0x400>; - compatible = "rockchip,px30-dfi"; - rockchip,pmugrf = <0xac>; - status = "okay"; - phandle = <0xad>; - }; - - dmc { - compatible = "rockchip,px30-dmc"; - interrupts = <0x00 0x69 0x04>; - interrupt-names = "complete_irq"; - devfreq-events = <0xad>; - clocks = <0x02 0x54>; - clock-names = "dmc_clk"; - operating-points-v2 = <0xae>; - ddr_timing = <0xaf>; - upthreshold = <0x28>; - downdifferential = <0x14>; - system-status-freq = <0x01 0x80e80 0x08 0x6ddd0 0x02 0x2f5d0 0x20 0x6ddd0 0x1000 0x80e80 0x4000 0xa2990 0x2000 0xa2990>; - auto-min-freq = <0x50140>; - auto-freq-en = <0x01>; - #cooling-cells = <0x02>; - status = "okay"; - center-supply = <0x0e>; - phandle = <0xab>; - - ddr_power_model { - compatible = "ddr_power_model"; - dynamic-power-coefficient = <0x78>; - static-power-coefficient = <0xc8>; - ts = <0x7d00 0x125c 0xffffffb0 0x02>; - thermal-zone = "soc-thermal"; - phandle = <0x115>; - }; - }; - - dmc-opp-table { - compatible = "operating-points-v2"; - rockchip,max-volt = <0x118c30>; - rockchip,evb-irdrop = <0x61a8>; - rockchip,pvtm-voltage-sel = <0x00 0xc350 0x00 0xc351 0xd2f0 0x01 0xd2f1 0xea60 0x02 0xea61 0x1869f 0x03>; - rockchip,pvtm-ch = <0x00 0x00>; - phandle = <0xae>; - - opp-528000000 { - opp-hz = <0x00 0x1f78a400>; - opp-microvolt = <0xee098>; - opp-microvolt-L0 = <0xee098>; - opp-microvolt-L1 = <0xee098>; - opp-microvolt-L2 = <0xe7ef0>; - opp-microvolt-L3 = <0xe7ef0>; - }; - - opp-666000000 { - opp-hz = <0x00 0x27b25a80>; - opp-microvolt = <0x100590>; - opp-microvolt-L0 = <0x100590>; - opp-microvolt-L1 = <0xf4240>; - opp-microvolt-L2 = <0xee098>; - opp-microvolt-L3 = <0xe7ef0>; - }; - - opp-786000000 { - opp-hz = <0x00 0x2ed96880>; - opp-microvolt = <0x10c8e0>; - opp-microvolt-L0 = <0x10c8e0>; - opp-microvolt-L1 = <0x100590>; - opp-microvolt-L2 = <0xfa3e8>; - opp-microvolt-L3 = <0xf4240>; - status = "okay"; - }; - }; - - rockchip-system-monitor { - compatible = "rockchip,system-monitor"; - rockchip,thermal-zone = "soc-thermal"; - rockchip,polling-delay = <0xc8>; - phandle = <0x116>; - }; - - pinctrl { - compatible = "rockchip,px30-pinctrl"; - rockchip,grf = <0x2f>; - rockchip,pmu = <0xac>; - #address-cells = <0x02>; - #size-cells = <0x02>; - ranges; - phandle = <0x117>; - - gpio0@ff040000 { - compatible = "rockchip,gpio-bank"; - reg = <0x00 0xff040000 0x00 0x100>; - interrupts = <0x00 0x03 0x04>; - clocks = <0x2a 0x14>; - gpio-controller; - #gpio-cells = <0x02>; - interrupt-controller; - #interrupt-cells = <0x02>; - phandle = <0x5c>; - }; - - gpio1@ff250000 { - compatible = "rockchip,gpio-bank"; - reg = <0x00 0xff250000 0x00 0x100>; - interrupts = <0x00 0x04 0x04>; - clocks = <0x02 0x15c>; - gpio-controller; - #gpio-cells = <0x02>; - interrupt-controller; - #interrupt-cells = <0x02>; - phandle = <0xbf>; - }; - - gpio2@ff260000 { - compatible = "rockchip,gpio-bank"; - reg = <0x00 0xff260000 0x00 0x100>; - interrupts = <0x00 0x05 0x04>; - clocks = <0x02 0x15d>; - gpio-controller; - #gpio-cells = <0x02>; - interrupt-controller; - #interrupt-cells = <0x02>; - phandle = <0x66>; - }; - - gpio3@ff270000 { - compatible = "rockchip,gpio-bank"; - reg = <0x00 0xff270000 0x00 0x100>; - interrupts = <0x00 0x06 0x04>; - clocks = <0x02 0x15e>; - gpio-controller; - #gpio-cells = <0x02>; - interrupt-controller; - #interrupt-cells = <0x02>; - phandle = <0x97>; - }; - - pcfg-pull-up { - bias-pull-up; - phandle = <0xb2>; - }; - - pcfg-pull-down { - bias-pull-down; - phandle = <0x118>; - }; - - pcfg-pull-none { - bias-disable; - phandle = <0xb1>; - }; - - pcfg-pull-none-2ma { - bias-disable; - drive-strength = <0x02>; - phandle = <0x119>; - }; - - pcfg-pull-up-2ma { - bias-pull-up; - drive-strength = <0x02>; - phandle = <0x11a>; - }; - - pcfg-pull-up-4ma { - bias-pull-up; - drive-strength = <0x04>; - phandle = <0xb3>; - }; - - pcfg-pull-none-4ma { - bias-disable; - drive-strength = <0x04>; - phandle = <0x11b>; - }; - - pcfg-pull-down-4ma { - bias-pull-down; - drive-strength = <0x04>; - phandle = <0x11c>; - }; - - pcfg-pull-none-8ma { - bias-disable; - drive-strength = <0x08>; - phandle = <0xb6>; - }; - - pcfg-pull-up-8ma { - bias-pull-up; - drive-strength = <0x08>; - phandle = <0xb4>; - }; - - pcfg-pull-none-12ma { - bias-disable; - drive-strength = <0x0c>; - phandle = <0xb8>; - }; - - pcfg-pull-up-12ma { - bias-pull-up; - drive-strength = <0x0c>; - phandle = <0xb7>; - }; - - pcfg-pull-none-smt { - bias-disable; - input-schmitt-enable; - phandle = <0xb0>; - }; - - pcfg-output-high { - output-high; - phandle = <0x11d>; - }; - - pcfg-output-low { - output-low; - phandle = <0xb9>; - }; - - pcfg-input-high { - bias-pull-up; - input-enable; - phandle = <0xb5>; - }; - - pcfg-input { - input-enable; - phandle = <0x11e>; - }; - - i2c0 { - - i2c0-xfer { - rockchip,pins = <0x00 0x08 0x01 0xb0 0x00 0x09 0x01 0xb0>; - phandle = <0x5b>; - }; - }; - - i2c1 { - - i2c1-xfer { - rockchip,pins = <0x00 0x12 0x01 0xb0 0x00 0x13 0x01 0xb0>; - phandle = <0x69>; - }; - }; - - i2c2 { - - i2c2-xfer { - rockchip,pins = <0x02 0x0f 0x02 0xb0 0x02 0x10 0x02 0xb0>; - phandle = <0x6a>; - }; - }; - - i2c3 { - - i2c3-xfer { - rockchip,pins = <0x01 0x0c 0x04 0xb0 0x01 0x0d 0x04 0xb0>; - phandle = <0x6b>; - }; - }; - - tsadc { - - tsadc-otp-gpio { - rockchip,pins = <0x00 0x06 0x00 0xb1>; - phandle = <0x86>; - }; - - tsadc-otp-out { - rockchip,pins = <0x00 0x06 0x01 0xb1>; - phandle = <0x87>; - }; - }; - - uart0 { - - uart0-xfer { - rockchip,pins = <0x00 0x0a 0x01 0xb2 0x00 0x0b 0x01 0xb2>; - phandle = <0x2c>; - }; - - uart0-cts { - rockchip,pins = <0x00 0x0c 0x01 0xb1>; - phandle = <0x2d>; - }; - - uart0-rts { - rockchip,pins = <0x00 0x0d 0x01 0xb1>; - phandle = <0x2e>; - }; - - uart0-rts-gpio { - rockchip,pins = <0x00 0x0d 0x00 0xb1>; - phandle = <0x11f>; - }; - }; - - uart1 { - - uart1-xfer { - rockchip,pins = <0x01 0x11 0x01 0xb2 0x01 0x10 0x01 0xb2>; - phandle = <0x4f>; - }; - - uart1-cts { - rockchip,pins = <0x01 0x12 0x01 0xb1>; - phandle = <0x50>; - }; - - uart1-rts { - rockchip,pins = <0x01 0x13 0x01 0xb1>; - phandle = <0x120>; - }; - - uart1-rts-gpio { - rockchip,pins = <0x01 0x13 0x00 0xb1>; - phandle = <0x121>; - }; - }; - - uart2-m0 { - - uart2m0-xfer { - rockchip,pins = <0x01 0x1a 0x02 0xb2 0x01 0x1b 0x02 0xb2>; - phandle = <0x51>; - }; - }; - - uart2-m1 { - - uart2m1-xfer { - rockchip,pins = <0x02 0x0c 0x02 0xb2 0x02 0x0e 0x02 0xb2>; - phandle = <0xba>; - }; - }; - - uart3-m0 { - - uart3m0-xfer { - rockchip,pins = <0x00 0x10 0x02 0xb2 0x00 0x11 0x02 0xb2>; - phandle = <0x122>; - }; - - uart3m0-cts { - rockchip,pins = <0x00 0x12 0x02 0xb1>; - phandle = <0x123>; - }; - - uart3m0-rts { - rockchip,pins = <0x00 0x13 0x02 0xb1>; - phandle = <0x124>; - }; - - uart3m0-rts-gpio { - rockchip,pins = <0x00 0x13 0x00 0xb1>; - phandle = <0x125>; - }; - }; - - uart3-m1 { - - uart3m1-xfer { - rockchip,pins = <0x01 0x0e 0x02 0xb2 0x01 0x0f 0x02 0xb2>; - phandle = <0x52>; - }; - - uart3m1-cts { - rockchip,pins = <0x01 0x0c 0x02 0xb1>; - phandle = <0x53>; - }; - - uart3m1-rts { - rockchip,pins = <0x01 0x0d 0x02 0xb1>; - phandle = <0x54>; - }; - - uart3m1-rts-gpio { - rockchip,pins = <0x01 0x0d 0x00 0xb1>; - phandle = <0x126>; - }; - }; - - uart4 { - - uart4-xfer { - rockchip,pins = <0x01 0x1c 0x02 0xb2 0x01 0x1d 0x02 0xb2>; - phandle = <0x55>; - }; - - uart4-cts { - rockchip,pins = <0x01 0x1e 0x02 0xb1>; - phandle = <0x56>; - }; - - uart4-rts { - rockchip,pins = <0x01 0x1f 0x02 0xb1>; - phandle = <0x57>; - }; - }; - - uart5 { - - uart5-xfer { - rockchip,pins = <0x03 0x02 0x04 0xb2 0x03 0x01 0x04 0xb2>; - phandle = <0x58>; - }; - - uart5-cts { - rockchip,pins = <0x03 0x03 0x04 0xb1>; - phandle = <0x59>; - }; - - uart5-rts { - rockchip,pins = <0x03 0x05 0x04 0xb1>; - phandle = <0x5a>; - }; - }; - - spi0 { - - spi0-clk { - rockchip,pins = <0x01 0x0f 0x03 0xb3>; - phandle = <0x6c>; - }; - - spi0-csn { - rockchip,pins = <0x01 0x0e 0x03 0xb3>; - phandle = <0x6d>; - }; - - spi0-miso { - rockchip,pins = <0x01 0x0d 0x03 0xb3>; - phandle = <0x6e>; - }; - - spi0-mosi { - rockchip,pins = <0x01 0x0c 0x03 0xb3>; - phandle = <0x6f>; - }; - - spi0-clk-hs { - rockchip,pins = <0x01 0x0f 0x03 0xb4>; - phandle = <0x70>; - }; - - spi0-miso-hs { - rockchip,pins = <0x01 0x0d 0x03 0xb4>; - phandle = <0x71>; - }; - - spi0-mosi-hs { - rockchip,pins = <0x01 0x0c 0x03 0xb4>; - phandle = <0x72>; - }; - }; - - spi1 { - - spi1-clk { - rockchip,pins = <0x03 0x0f 0x04 0xb3>; - phandle = <0x73>; - }; - - spi1-csn0 { - rockchip,pins = <0x03 0x09 0x04 0xb3>; - phandle = <0x74>; - }; - - spi1-csn1 { - rockchip,pins = <0x03 0x0a 0x02 0xb3>; - phandle = <0x75>; - }; - - spi1-miso { - rockchip,pins = <0x03 0x0e 0x04 0xb3>; - phandle = <0x76>; - }; - - spi1-mosi { - rockchip,pins = <0x03 0x0c 0x04 0xb3>; - phandle = <0x77>; - }; - - spi1-clk-hs { - rockchip,pins = <0x03 0x0f 0x04 0xb4>; - phandle = <0x78>; - }; - - spi1-miso-hs { - rockchip,pins = <0x03 0x0e 0x04 0xb4>; - phandle = <0x79>; - }; - - spi1-mosi-hs { - rockchip,pins = <0x03 0x0c 0x04 0xb4>; - phandle = <0x7a>; - }; - }; - - pdm { - - pdm-clk0m0 { - rockchip,pins = <0x03 0x16 0x02 0xb1>; - phandle = <0x44>; - }; - - pdm-clk0m1 { - rockchip,pins = <0x02 0x16 0x01 0xb1>; - phandle = <0x127>; - }; - - pdm-clk1 { - rockchip,pins = <0x03 0x17 0x02 0xb1>; - phandle = <0x45>; - }; - - pdm-sdi0m0 { - rockchip,pins = <0x03 0x1b 0x02 0xb1>; - phandle = <0x46>; - }; - - pdm-sdi0m1 { - rockchip,pins = <0x02 0x15 0x02 0xb1>; - phandle = <0x128>; - }; - - pdm-sdi1 { - rockchip,pins = <0x03 0x18 0x02 0xb1>; - phandle = <0x47>; - }; - - pdm-sdi2 { - rockchip,pins = <0x03 0x19 0x02 0xb1>; - phandle = <0x48>; - }; - - pdm-sdi3 { - rockchip,pins = <0x03 0x1a 0x02 0xb1>; - phandle = <0x49>; - }; - - pdm-clk0m0-sleep { - rockchip,pins = <0x03 0x16 0x00 0xb5>; - phandle = <0x129>; - }; - - pdm-clk0m1-sleep { - rockchip,pins = <0x02 0x16 0x00 0xb5>; - phandle = <0x12a>; - }; - - pdm-clk1-sleep { - rockchip,pins = <0x03 0x17 0x00 0xb5>; - phandle = <0x12b>; - }; - - pdm-sdi0m0-sleep { - rockchip,pins = <0x03 0x1b 0x00 0xb5>; - phandle = <0x12c>; - }; - - pdm-sdi0m1-sleep { - rockchip,pins = <0x02 0x15 0x00 0xb5>; - phandle = <0x12d>; - }; - - pdm-sdi1-sleep { - rockchip,pins = <0x03 0x18 0x00 0xb5>; - phandle = <0x12e>; - }; - - pdm-sdi2-sleep { - rockchip,pins = <0x03 0x19 0x00 0xb5>; - phandle = <0x12f>; - }; - - pdm-sdi3-sleep { - rockchip,pins = <0x03 0x1a 0x00 0xb5>; - phandle = <0x130>; - }; - }; - - i2s0 { - - i2s0-8ch-mclk { - rockchip,pins = <0x03 0x11 0x02 0xb1>; - phandle = <0x131>; - }; - - i2s0-8ch-sclktx { - rockchip,pins = <0x03 0x13 0x02 0xb1>; - phandle = <0x30>; - }; - - i2s0-8ch-sclkrx { - rockchip,pins = <0x03 0x0c 0x02 0xb1>; - phandle = <0x31>; - }; - - i2s0-8ch-lrcktx { - rockchip,pins = <0x03 0x12 0x02 0xb1>; - phandle = <0x32>; - }; - - i2s0-8ch-lrckrx { - rockchip,pins = <0x03 0x0d 0x02 0xb1>; - phandle = <0x33>; - }; - - i2s0-8ch-sdo0 { - rockchip,pins = <0x03 0x14 0x02 0xb1>; - phandle = <0x38>; - }; - - i2s0-8ch-sdo1 { - rockchip,pins = <0x03 0x10 0x02 0xb1>; - phandle = <0x39>; - }; - - i2s0-8ch-sdo2 { - rockchip,pins = <0x03 0x0f 0x02 0xb1>; - phandle = <0x3a>; - }; - - i2s0-8ch-sdo3 { - rockchip,pins = <0x03 0x0e 0x02 0xb1>; - phandle = <0x3b>; - }; - - i2s0-8ch-sdi0 { - rockchip,pins = <0x03 0x15 0x02 0xb1>; - phandle = <0x34>; - }; - - i2s0-8ch-sdi1 { - rockchip,pins = <0x03 0x0b 0x02 0xb1>; - phandle = <0x35>; - }; - - i2s0-8ch-sdi2 { - rockchip,pins = <0x03 0x09 0x02 0xb1>; - phandle = <0x36>; - }; - - i2s0-8ch-sdi3 { - rockchip,pins = <0x03 0x08 0x02 0xb1>; - phandle = <0x37>; - }; - }; - - i2s1 { - - i2s1-2ch-mclk { - rockchip,pins = <0x02 0x13 0x01 0xb1>; - phandle = <0x68>; - }; - - i2s1-2ch-sclk { - rockchip,pins = <0x02 0x12 0x01 0xb1>; - phandle = <0x3c>; - }; - - i2s1-2ch-lrck { - rockchip,pins = <0x02 0x11 0x01 0xb1>; - phandle = <0x3d>; - }; - - i2s1-2ch-sdi { - rockchip,pins = <0x02 0x15 0x01 0xb1>; - phandle = <0x3e>; - }; - - i2s1-2ch-sdo { - rockchip,pins = <0x02 0x14 0x01 0xb1>; - phandle = <0x3f>; - }; - }; - - i2s2 { - - i2s2-2ch-mclk { - rockchip,pins = <0x03 0x01 0x02 0xb1>; - phandle = <0x132>; - }; - - i2s2-2ch-sclk { - rockchip,pins = <0x03 0x02 0x02 0xb1>; - phandle = <0x40>; - }; - - i2s2-2ch-lrck { - rockchip,pins = <0x03 0x03 0x02 0xb1>; - phandle = <0x41>; - }; - - i2s2-2ch-sdi { - rockchip,pins = <0x03 0x05 0x02 0xb1>; - phandle = <0x42>; - }; - - i2s2-2ch-sdo { - rockchip,pins = <0x03 0x07 0x02 0xb1>; - phandle = <0x43>; - }; - }; - - sdmmc { - - sdmmc-clk { - rockchip,pins = <0x01 0x1e 0x01 0xb6>; - phandle = <0x8f>; - }; - - sdmmc-cmd { - rockchip,pins = <0x01 0x1f 0x01 0xb4>; - phandle = <0x90>; - }; - - sdmmc-det { - rockchip,pins = <0x00 0x03 0x01 0xb4>; - phandle = <0x91>; - }; - - sdmmc-bus1 { - rockchip,pins = <0x01 0x1a 0x01 0xb4>; - phandle = <0x133>; - }; - - sdmmc-bus4 { - rockchip,pins = <0x01 0x1a 0x01 0xb4 0x01 0x1b 0x01 0xb4 0x01 0x1c 0x01 0xb4 0x01 0x1d 0x01 0xb4>; - phandle = <0x92>; - }; - - sdmmc-gpio { - rockchip,pins = <0x01 0x1a 0x00 0xb3 0x01 0x1b 0x00 0xb3 0x01 0x1c 0x00 0xb3 0x01 0x1d 0x00 0xb3 0x01 0x1e 0x00 0xb3 0x01 0x1f 0x00 0xb3>; - phandle = <0x134>; - }; - }; - - sdio { - - sdio-clk { - rockchip,pins = <0x01 0x15 0x01 0xb1>; - phandle = <0x96>; - }; - - sdio-cmd { - rockchip,pins = <0x01 0x14 0x01 0xb2>; - phandle = <0x95>; - }; - - sdio-bus4 { - rockchip,pins = <0x01 0x16 0x01 0xb2 0x01 0x17 0x01 0xb2 0x01 0x18 0x01 0xb2 0x01 0x19 0x01 0xb2>; - phandle = <0x94>; - }; - - sdio-gpio { - rockchip,pins = <0x01 0x16 0x00 0xb2 0x01 0x17 0x00 0xb2 0x01 0x18 0x00 0xb2 0x01 0x19 0x00 0xb2 0x01 0x14 0x00 0xb2 0x01 0x15 0x00 0xb2>; - phandle = <0x135>; - }; - }; - - emmc { - - emmc-clk { - rockchip,pins = <0x01 0x09 0x02 0xb6>; - phandle = <0x136>; - }; - - emmc-cmd { - rockchip,pins = <0x01 0x0a 0x02 0xb4>; - phandle = <0x137>; - }; - - emmc-pwren { - rockchip,pins = <0x01 0x08 0x02 0xb1>; - phandle = <0x138>; - }; - - emmc-rstnout { - rockchip,pins = <0x01 0x0b 0x02 0xb1>; - phandle = <0x139>; - }; - - emmc-bus1 { - rockchip,pins = <0x01 0x00 0x02 0xb4>; - phandle = <0x13a>; - }; - - emmc-bus4 { - rockchip,pins = <0x01 0x00 0x02 0xb4 0x01 0x01 0x02 0xb4 0x01 0x02 0x02 0xb4 0x01 0x03 0x02 0xb4>; - phandle = <0x13b>; - }; - - emmc-bus8 { - rockchip,pins = <0x01 0x00 0x02 0xb4 0x01 0x01 0x02 0xb4 0x01 0x02 0x02 0xb4 0x01 0x03 0x02 0xb4 0x01 0x04 0x02 0xb4 0x01 0x05 0x02 0xb4 0x01 0x06 0x02 0xb4 0x01 0x07 0x02 0xb4>; - phandle = <0x13c>; - }; - }; - - flash { - - flash-cs0 { - rockchip,pins = <0x01 0x08 0x01 0xb1>; - phandle = <0x13d>; - }; - - flash-rdy { - rockchip,pins = <0x01 0x09 0x01 0xb1>; - phandle = <0x13e>; - }; - - flash-dqs { - rockchip,pins = <0x01 0x0a 0x01 0xb1>; - phandle = <0x13f>; - }; - - flash-ale { - rockchip,pins = <0x01 0x0b 0x01 0xb1>; - phandle = <0x140>; - }; - - flash-cle { - rockchip,pins = <0x01 0x0c 0x01 0xb1>; - phandle = <0x141>; - }; - - flash-wrn { - rockchip,pins = <0x01 0x0d 0x01 0xb1>; - phandle = <0x142>; - }; - - flash-csl { - rockchip,pins = <0x01 0x0e 0x01 0xb1>; - phandle = <0x143>; - }; - - flash-rdn { - rockchip,pins = <0x01 0x0f 0x01 0xb1>; - phandle = <0x144>; - }; - - flash-bus8 { - rockchip,pins = <0x01 0x00 0x01 0xb7 0x01 0x01 0x01 0xb7 0x01 0x02 0x01 0xb7 0x01 0x03 0x01 0xb7 0x01 0x04 0x01 0xb7 0x01 0x05 0x01 0xb7 0x01 0x06 0x01 0xb7 0x01 0x07 0x01 0xb7>; - phandle = <0x145>; - }; - }; - - lcdc { - - lcdc-m0-rgb-pins { - rockchip,pins = <0x03 0x00 0x01 0xb6 0x03 0x01 0x01 0xb6 0x03 0x02 0x01 0xb6 0x03 0x03 0x01 0xb6 0x03 0x04 0x01 0xb6 0x03 0x05 0x01 0xb6 0x03 0x06 0x01 0xb6 0x03 0x07 0x01 0xb6 0x03 0x08 0x01 0xb6 0x03 0x09 0x01 0xb6 0x03 0x0a 0x01 0xb6 0x03 0x0b 0x01 0xb6 0x03 0x0c 0x01 0xb6 0x03 0x0d 0x01 0xb6 0x03 0x0e 0x01 0xb6 0x03 0x0f 0x01 0xb6 0x03 0x10 0x01 0xb6 0x03 0x11 0x01 0xb6 0x03 0x12 0x01 0xb6 0x03 0x13 0x01 0xb6 0x03 0x14 0x01 0xb6 0x03 0x15 0x01 0xb6 0x03 0x16 0x01 0xb6 0x03 0x17 0x01 0xb6 0x03 0x18 0x01 0xb6 0x03 0x19 0x01 0xb6 0x03 0x1a 0x01 0xb6 0x03 0x1b 0x01 0xb6>; - phandle = <0x146>; - }; - - lcdc-m0-sleep-pins { - rockchip,pins = <0x03 0x00 0x00 0xb1 0x03 0x01 0x00 0xb1 0x03 0x02 0x00 0xb1 0x03 0x03 0x00 0xb1 0x03 0x04 0x00 0xb1 0x03 0x05 0x00 0xb1 0x03 0x06 0x00 0xb1 0x03 0x07 0x00 0xb1 0x03 0x08 0x00 0xb1 0x03 0x09 0x00 0xb1 0x03 0x0a 0x00 0xb1 0x03 0x0b 0x00 0xb1 0x03 0x0c 0x00 0xb1 0x03 0x0d 0x00 0xb1 0x03 0x0e 0x00 0xb1 0x03 0x0f 0x00 0xb1 0x03 0x10 0x00 0xb1 0x03 0x11 0x00 0xb1 0x03 0x12 0x00 0xb1 0x03 0x13 0x00 0xb1 0x03 0x14 0x00 0xb1 0x03 0x15 0x00 0xb1 0x03 0x16 0x00 0xb1 0x03 0x17 0x00 0xb1 0x03 0x18 0x00 0xb1 0x03 0x19 0x00 0xb1 0x03 0x1a 0x00 0xb1 0x03 0x1b 0x00 0xb1>; - phandle = <0x147>; - }; - - lcdc-m1-rgb-pins { - rockchip,pins = <0x03 0x00 0x01 0xb6 0x03 0x04 0x01 0xb6 0x03 0x06 0x01 0xb6 0x03 0x0a 0x01 0xb6 0x03 0x0b 0x01 0xb6 0x03 0x0d 0x01 0xb6 0x03 0x10 0x01 0xb6 0x03 0x11 0x01 0xb6 0x03 0x12 0x01 0xb6 0x03 0x13 0x01 0xb6 0x03 0x14 0x01 0xb6 0x03 0x15 0x01 0xb6 0x03 0x16 0x01 0xb6 0x03 0x17 0x01 0xb6 0x03 0x18 0x01 0xb6 0x03 0x19 0x01 0xb6 0x03 0x1a 0x01 0xb6 0x03 0x1b 0x01 0xb6>; - phandle = <0x4d>; - }; - - lcdc-m1-sleep-pins { - rockchip,pins = <0x03 0x00 0x00 0xb1 0x03 0x04 0x00 0xb1 0x03 0x06 0x00 0xb1 0x03 0x0a 0x00 0xb1 0x03 0x0b 0x00 0xb1 0x03 0x0d 0x00 0xb1 0x03 0x10 0x00 0xb1 0x03 0x11 0x00 0xb1 0x03 0x12 0x00 0xb1 0x03 0x13 0x00 0xb1 0x03 0x14 0x00 0xb1 0x03 0x15 0x00 0xb1 0x03 0x16 0x00 0xb1 0x03 0x17 0x00 0xb1 0x03 0x18 0x00 0xb1 0x03 0x19 0x00 0xb1 0x03 0x1a 0x00 0xb1 0x03 0x1b 0x00 0xb1>; - phandle = <0x4e>; - }; - }; - - pwm0 { - - pwm0-pin { - rockchip,pins = <0x00 0x0f 0x01 0xb1>; - phandle = <0x7b>; - }; - }; - - pwm1 { - - pwm1-pin { - rockchip,pins = <0x00 0x10 0x01 0xb1>; - phandle = <0x7c>; - }; - }; - - pwm2 { - - pwm2-pin { - rockchip,pins = <0x02 0x0d 0x01 0xb1>; - phandle = <0x7d>; - }; - }; - - pwm3 { - - pwm3-pin { - rockchip,pins = <0x00 0x11 0x01 0xb1>; - phandle = <0x7e>; - }; - }; - - pwm4 { - - pwm4-pin { - rockchip,pins = <0x03 0x12 0x03 0xb1>; - phandle = <0x7f>; - }; - }; - - pwm5 { - - pwm5-pin { - rockchip,pins = <0x03 0x13 0x03 0xb1>; - phandle = <0x80>; - }; - }; - - pwm6 { - - pwm6-pin { - rockchip,pins = <0x03 0x14 0x03 0xb1>; - phandle = <0x81>; - }; - }; - - pwm7 { - - pwm7-pin { - rockchip,pins = <0x03 0x15 0x03 0xb1>; - phandle = <0x82>; - }; - }; - - gmac { - - rmii-pins { - rockchip,pins = <0x02 0x00 0x02 0xb8 0x02 0x01 0x02 0xb8 0x02 0x02 0x02 0xb8 0x02 0x03 0x02 0xb1 0x02 0x04 0x02 0xb1 0x02 0x05 0x02 0xb1 0x02 0x06 0x02 0xb1 0x02 0x07 0x02 0xb1 0x02 0x09 0x02 0xb1>; - phandle = <0x8d>; - }; - - mac-refclk-12ma { - rockchip,pins = <0x02 0x0a 0x02 0xb8>; - phandle = <0x8e>; - }; - - mac-refclk { - rockchip,pins = <0x02 0x0a 0x02 0xb1>; - phandle = <0x148>; - }; - }; - - cif-m0 { - - cif-clkout-m0 { - rockchip,pins = <0x02 0x0b 0x01 0xb8>; - phandle = <0xa7>; - }; - - dvp-d2d9-m0 { - rockchip,pins = <0x02 0x00 0x01 0xb1 0x02 0x01 0x01 0xb1 0x02 0x02 0x01 0xb1 0x02 0x03 0x01 0xb1 0x02 0x04 0x01 0xb1 0x02 0x05 0x01 0xb1 0x02 0x06 0x01 0xb1 0x02 0x07 0x01 0xb1 0x02 0x08 0x01 0xb1 0x02 0x09 0x01 0xb1 0x02 0x0a 0x01 0xb1 0x02 0x0b 0x01 0xb1>; - phandle = <0xa5>; - }; - - dvp-d0d1-m0 { - rockchip,pins = <0x02 0x0c 0x01 0xb1 0x02 0x0e 0x01 0xb1>; - phandle = <0xa9>; - }; - - d10-d11-m0 { - rockchip,pins = <0x02 0x0f 0x01 0xb1 0x02 0x10 0x01 0xb1>; - phandle = <0xa8>; - }; - }; - - cif-m1 { - - cif-clkout-m1 { - rockchip,pins = <0x03 0x18 0x03 0xb1>; - phandle = <0x149>; - }; - - dvp-d2d9-m1 { - rockchip,pins = <0x03 0x03 0x03 0xb1 0x03 0x05 0x03 0xb1 0x03 0x07 0x03 0xb1 0x03 0x08 0x03 0xb1 0x03 0x09 0x03 0xb1 0x03 0x0c 0x03 0xb1 0x03 0x0e 0x03 0xb1 0x03 0x0f 0x03 0xb1 0x03 0x19 0x03 0xb1 0x03 0x1a 0x03 0xb1 0x03 0x1b 0x03 0xb1 0x03 0x18 0x03 0xb1>; - phandle = <0x14a>; - }; - - dvp-d0d1-m1 { - rockchip,pins = <0x03 0x01 0x03 0xb1 0x03 0x02 0x03 0xb1>; - phandle = <0x14b>; - }; - - d10-d11-m1 { - rockchip,pins = <0x03 0x16 0x03 0xb1 0x03 0x17 0x03 0xb1>; - phandle = <0x14c>; - }; - }; - - isp { - - isp-prelight { - rockchip,pins = <0x03 0x19 0x04 0xb1>; - phandle = <0x14d>; - }; - }; - - pmic { - - pmic_int { - rockchip,pins = <0x00 0x0a 0x00 0xb2 0x00 0x0b 0x00 0xb1>; - phandle = <0x5d>; - }; - - soc_slppin_gpio { - rockchip,pins = <0x00 0x04 0x00 0xb9>; - phandle = <0x60>; - }; - - soc_slppin_slp { - rockchip,pins = <0x00 0x04 0x01 0xb1>; - phandle = <0x5e>; - }; - - soc_slppin_rst { - rockchip,pins = <0x00 0x04 0x02 0xb1>; - phandle = <0x62>; - }; - }; - - leds { - - led-pins { - rockchip,pins = <0x00 0x11 0x00 0xb1>; - phandle = <0xc0>; - }; - }; - - btns { - - btn-pins { - rockchip,pins = <0x01 0x0c 0x00 0xb2 0x01 0x0d 0x00 0xb2 0x01 0x0e 0x00 0xb2 0x01 0x0f 0x00 0xb2 0x01 0x02 0x00 0xb2 0x01 0x05 0x00 0xb2 0x01 0x06 0x00 0xb2 0x01 0x07 0x00 0xb2 0x02 0x00 0x00 0xb2 0x02 0x01 0x00 0xb2 0x02 0x02 0x00 0xb2 0x02 0x03 0x00 0xb2 0x02 0x04 0x00 0xb2 0x02 0x05 0x00 0xb2 0x02 0x06 0x00 0xb2 0x02 0x07 0x00 0xb2 0x03 0x09 0x00 0xb2 0x03 0x0a 0x00 0xb2 0x03 0x0c 0x00 0xb2 0x03 0x0f 0x00 0xb2>; - phandle = <0xbd>; - }; - }; - }; - - chosen { - bootargs = [00]; - }; - - fiq-debugger { - compatible = "rockchip,fiq-debugger"; - rockchip,serial-id = <0x02>; - rockchip,wake-irq = <0x00>; - rockchip,irq-mode-enable = <0x00>; - rockchip,baudrate = <0x1c200>; - interrupts = <0x00 0x7f 0x08>; - pinctrl-names = "default"; - pinctrl-0 = <0xba>; - status = "okay"; - }; - - ramoops { - compatible = "ramoops"; - record-size = <0x00 0x20000>; - console-size = <0x00 0x80000>; - ftrace-size = <0x00 0x00>; - pmsg-size = <0x00 0x00>; - memory-region = <0xbb>; - }; - - reserved-memory { - #address-cells = <0x02>; - #size-cells = <0x02>; - ranges; - - drm-logo@00000000 { - compatible = "rockchip,drm-logo"; - reg = <0x00 0x00 0x00 0x00>; - phandle = <0x11>; - }; - - region@110000 { - reg = <0x00 0x110000 0x00 0xf0000>; - reg-names = "ramoops_mem"; - phandle = <0xbb>; - }; - }; - - odroidgo3-keys { - compatible = "gpio-keys"; - #address-cells = <0x01>; - #size-cells = <0x00>; - autorepeat; - phandle = <0x14e>; - - button@0 { - label = "GPIO BTN-VOLUP"; - linux,code = <0x73>; - gpios = <0x66 0x00 0x01>; - }; - - button@1 { - label = "GPIO BTN-VOLDN"; - linux,code = <0x72>; - gpios = <0x66 0x01 0x01>; - }; - }; - - odroidgo3-joypad { - compatible = "odroidgo3-joypad"; - pwms = <0xbc 0x00 0xbebc200 0x00>; - pwm-names = "enable"; - rumble-boost-weak = <0x00>; - rumble-boost-strong = <0x00>; - joypad-name = "GO-Super Gamepad"; - joypad-product = <0x1100>; - joypad-revision = <0x100>; - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <0xbd>; - pinctrl-1 = <0x7b>; - io-channel-names = "amux_adc"; - io-channels = <0xbe 0x01>; - amux-count = <0x04>; - amux-a-gpios = <0x97 0x0b 0x01>; - amux-b-gpios = <0x97 0x08 0x01>; - amux-en-gpios = <0x97 0x0d 0x01>; - button-adc-scale = <0x02>; - button-adc-deadzone = <0x40>; - button-adc-fuzz = <0x20>; - button-adc-flat = <0x20>; - abs_x-p-tuning = <0xc8>; - abs_x-n-tuning = <0xc8>; - abs_y-p-tuning = <0xc8>; - abs_y-n-tuning = <0xc8>; - abs_rx-p-tuning = <0xc8>; - abs_rx-n-tuning = <0xc8>; - abs_ry-p-tuning = <0xc8>; - abs_ry-n-tuning = <0xc8>; - poll-interval = <0x0a>; - invert-absx; - invert-absy; - phandle = <0x14f>; - - sw1 { - gpios = <0xbf 0x0c 0x01>; - label = "GPIO DPAD-UP"; - linux,code = <0x220>; - }; - - sw2 { - gpios = <0xbf 0x0d 0x01>; - label = "GPIO DPAD-DOWN"; - linux,code = <0x221>; - }; - - sw3 { - gpios = <0xbf 0x0e 0x01>; - label = "GPIO DPAD-LEFT"; - linux,code = <0x222>; - }; - - sw4 { - gpios = <0xbf 0x0f 0x01>; - label = "GPIO DPAD-RIGHT"; - linux,code = <0x223>; - }; - - sw5 { - gpios = <0xbf 0x02 0x01>; - label = "GPIO KEY BTN-A"; - linux,code = <0x131>; - }; - - sw6 { - gpios = <0xbf 0x05 0x01>; - label = "GPIO BTN-B"; - linux,code = <0x130>; - }; - - sw7 { - gpios = <0xbf 0x06 0x01>; - label = "GPIO BTN-Y"; - linux,code = <0x134>; - }; - - sw8 { - gpios = <0xbf 0x07 0x01>; - label = "GPIO BTN-X"; - linux,code = <0x133>; - }; - - sw11 { - gpios = <0x66 0x02 0x01>; - label = "GPIO F3"; - linux,code = <0x2c2>; - }; - - sw12 { - gpios = <0x66 0x03 0x01>; - label = "GPIO F4"; - linux,code = <0x2c3>; - }; - - sw15 { - gpios = <0x66 0x06 0x01>; - label = "GPIO TOP-LEFT"; - linux,code = <0x136>; - }; - - sw16 { - gpios = <0x66 0x07 0x01>; - label = "GPIO TOP-RIGHT"; - linux,code = <0x137>; - }; - - sw19 { - gpios = <0x97 0x09 0x01>; - label = "GPIO F1"; - linux,code = <0x2c0>; - }; - - sw20 { - gpios = <0x97 0x0f 0x01>; - label = "GPIO TOP-RIGHT2"; - linux,code = <0x139>; - }; - - sw21 { - gpios = <0x97 0x0a 0x01>; - label = "GPIO TOP-LEFT2"; - linux,code = <0x138>; - }; - - sw22 { - gpios = <0x97 0x0c 0x01>; - label = "GPIO F2"; - linux,code = <0x2c1>; - }; - - sw13 { - gpios = <0x66 0x04 0x01>; - label = "GPIO F5"; - linux,code = <0x2c4>; - }; - }; - - gpio_leds { - compatible = "gpio-leds"; - pinctrl-names = "led_pins"; - pinctrl-0 = <0xc0>; - phandle = <0x150>; - - heartbeat { - label = "blue:heartbeat"; - gpios = <0x5c 0x11 0x00>; - linux,default-trigger = "heartbeat"; - }; - }; - - backlight { - compatible = "pwm-backlight"; - pwms = <0xc1 0x00 0xf519 0x00>; - brightness-levels = <0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f 0x20 0x21 0x22 0x23 0x24 0x25 0x26 0x27 0x28 0x29 0x2a 0x2b 0x2c 0x2d 0x2e 0x2f 0x30 0x31 0x32 0x33 0x34 0x35 0x36 0x37 0x38 0x39 0x3a 0x3b 0x3c 0x3d 0x3e 0x3f 0x40 0x41 0x42 0x43 0x44 0x45 0x46 0x47 0x48 0x49 0x4a 0x4b 0x4c 0x4d 0x4e 0x4f 0x50 0x51 0x52 0x53 0x54 0x55 0x56 0x57 0x58 0x59 0x5a 0x5b 0x5c 0x5d 0x5e 0x5f 0x60 0x61 0x62 0x63 0x64 0x65 0x66 0x67 0x68 0x69 0x6a 0x6b 0x6c 0x6d 0x6e 0x6f 0x70 0x71 0x72 0x73 0x74 0x75 0x76 0x77 0x78 0x79 0x7a 0x7b 0x7c 0x7d 0x7e 0x7f 0x80 0x81 0x82 0x83 0x84 0x85 0x86 0x87 0x88 0x89 0x8a 0x8b 0x8c 0x8d 0x8e 0x8f 0x90 0x91 0x92 0x93 0x94 0x95 0x96 0x97 0x98 0x99 0x9a 0x9b 0x9c 0x9d 0x9e 0x9f 0xa0>; - default-brightness-level = <0x33>; - phandle = <0x9d>; - }; - - rk817-sound { - compatible = "simple-audio-card"; - simple-audio-card,format = "i2s"; - simple-audio-card,name = "rockchip,rk817-codec"; - simple-audio-card,mclk-fs = <0x100>; - simple-audio-card,widgets = "Microphone\0Mic Jack\0Headphone\0Headphone Jack"; - simple-audio-card,routing = "MIC_IN\0Mic Jack\0Headphone Jack\0HPOL\0Headphone Jack\0HPOR"; - simple-audio-card,hp-det-gpio = <0x66 0x16 0x01>; - simple-audio-card,codec-hp-det = <0x01>; - - simple-audio-card,cpu { - sound-dai = <0xc2>; - }; - - simple-audio-card,codec { - sound-dai = <0xc3>; - }; - }; - - vccsys { - compatible = "regulator-fixed"; - regulator-name = "vcc3v8_sys"; - regulator-always-on; - regulator-min-microvolt = <0x39fbc0>; - regulator-max-microvolt = <0x39fbc0>; - phandle = <0x64>; - }; - - vcc_host: vcc_host { - compatible = "regulator-fixed"; - regulator-name = "vcc-host"; - gpio = <0x5c 0x0f 0x00>; - enable-active-high; - regulator-always-on; - vin-supply = <0x64>; - }; - - __symbols__ { - ddr_timing = "/ddr_timing"; - cpu0 = "/cpus/cpu@0"; - cpu1 = "/cpus/cpu@1"; - cpu2 = "/cpus/cpu@2"; - cpu3 = "/cpus/cpu@3"; - CPU_SLEEP = "/cpus/idle-states/cpu-sleep"; - CLUSTER_SLEEP = "/cpus/idle-states/cluster-sleep"; - cpu0_opp_table = "/cpu0-opp-table"; - bus_soc = "/bus-soc"; - bus_apll = "/bus-apll"; - bus_apll_opp_table = "/bus-apll-opp-table"; - display_subsystem = "/display-subsystem"; - route_lvds = "/display-subsystem/route/route-lvds"; - route_dsi = "/display-subsystem/route/route-dsi"; - route_rgb = "/display-subsystem/route/route-rgb"; - gmac_clkin = "/external-gmac-clock"; - rockchip_suspend = "/rockchip-suspend"; - xin24m = "/xin24m"; - xin32k = "/xin32k"; - pmu = "/power-management@ff000000"; - power = "/power-management@ff000000/power-controller"; - pmugrf = "/syscon@ff010000"; - pmu_io_domains = "/syscon@ff010000/io-domains"; - pmu_pvtm = "/syscon@ff010000/pmu-pvtm"; - uart0 = "/serial@ff030000"; - i2s0_8ch = "/i2s@ff060000"; - i2s1_2ch = "/i2s@ff070000"; - i2s2_2ch = "/i2s@ff080000"; - pdm = "/pdm@ff0a0000"; - crypto = "/crypto@ff0b0000"; - rng = "/rng@ff0b0000"; - gic = "/interrupt-controller@ff131000"; - grf = "/syscon@ff140000"; - io_domains = "/syscon@ff140000/io-domains"; - lvds = "/syscon@ff140000/lvds"; - lvds_in_vopb = "/syscon@ff140000/lvds/ports/port@0/endpoint@0"; - rgb = "/syscon@ff140000/rgb"; - rgb_in_vopb = "/syscon@ff140000/rgb/ports/port@0/endpoint@0"; - core_grf = "/syscon@ff148000"; - pvtm = "/syscon@ff148000/pvtm"; - uart1 = "/serial@ff158000"; - uart2 = "/serial@ff160000"; - uart3 = "/serial@ff168000"; - uart4 = "/serial@ff170000"; - uart5 = "/serial@ff178000"; - i2c0 = "/i2c@ff180000"; - rk817 = "/i2c@ff180000/pmic@20"; - pinctrl_rk8xx = "/i2c@ff180000/pmic@20/pinctrl_rk8xx"; - rk817_ts_gpio1 = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_ts_gpio1"; - rk817_gt_gpio2 = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_gt_gpio2"; - rk817_pin_ts = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_pin_ts"; - rk817_pin_gt = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_pin_gt"; - rk817_slppin_null = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_slppin_null"; - rk817_slppin_slp = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_slppin_slp"; - rk817_slppin_pwrdn = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_slppin_pwrdn"; - rk817_slppin_rst = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_slppin_rst"; - vdd_logic = "/i2c@ff180000/pmic@20/regulators/DCDC_REG1"; - vdd_arm = "/i2c@ff180000/pmic@20/regulators/DCDC_REG2"; - vcc_ddr = "/i2c@ff180000/pmic@20/regulators/DCDC_REG3"; - vcc_3v3 = "/i2c@ff180000/pmic@20/regulators/DCDC_REG4"; - vcc_1v0 = "/i2c@ff180000/pmic@20/regulators/LDO_REG1"; - vcc1v8_soc = "/i2c@ff180000/pmic@20/regulators/LDO_REG2"; - vdd1v0_soc = "/i2c@ff180000/pmic@20/regulators/LDO_REG3"; - vcc3v3_pmu = "/i2c@ff180000/pmic@20/regulators/LDO_REG4"; - vccio_sd = "/i2c@ff180000/pmic@20/regulators/LDO_REG5"; - vcc_sd = "/i2c@ff180000/pmic@20/regulators/LDO_REG6"; - vcc_backlight = "/i2c@ff180000/pmic@20/regulators/LDO_REG7"; - vcc_lcd = "/i2c@ff180000/pmic@20/regulators/LDO_REG8"; - dcdc_boost = "/i2c@ff180000/pmic@20/regulators/BOOST"; - otg_switch = "/i2c@ff180000/pmic@20/regulators/OTG_SWITCH"; - rk817_codec = "/i2c@ff180000/pmic@20/codec"; - i2c1 = "/i2c@ff190000"; - i2c2 = "/i2c@ff1a0000"; - i2c3 = "/i2c@ff1b0000"; - spi0 = "/spi@ff1d0000"; - spi1 = "/spi@ff1d8000"; - wdt = "/watchdog@ff1e0000"; - pwm0 = "/pwm@ff200000"; - pwm1 = "/pwm@ff200010"; - pwm2 = "/pwm@ff200020"; - pwm3 = "/pwm@ff200030"; - pwm4 = "/pwm@ff208000"; - pwm5 = "/pwm@ff208010"; - pwm6 = "/pwm@ff208020"; - pwm7 = "/pwm@ff208030"; - rktimer = "/rktimer@ff210000"; - dmac = "/amba/dmac@ff240000"; - thermal_zones = "/thermal-zones"; - soc_thermal = "/thermal-zones/soc-thermal"; - threshold = "/thermal-zones/soc-thermal/trips/trip-point-0"; - target = "/thermal-zones/soc-thermal/trips/trip-point-1"; - soc_crit = "/thermal-zones/soc-thermal/trips/soc-crit"; - gpu_thermal = "/thermal-zones/gpu-thermal"; - tsadc = "/tsadc@ff280000"; - saradc = "/saradc@ff288000"; - otp = "/otp@ff290000"; - otp_id = "/otp@ff290000/id@7"; - cpu_leakage = "/otp@ff290000/cpu-leakage@17"; - performance = "/otp@ff290000/performance@1e"; - cru = "/clock-controller@ff2b0000"; - cpu_boost = "/cpu-boost@ff2b8000"; - pmucru = "/pmu-clock-controller@ff2bc000"; - usb2phy_grf = "/syscon@ff2c0000"; - u2phy = "/syscon@ff2c0000/usb2-phy@100"; - u2phy_host = "/syscon@ff2c0000/usb2-phy@100/host-port"; - u2phy_otg = "/syscon@ff2c0000/usb2-phy@100/otg-port"; - video_phy = "/video-phy@ff2e0000"; - mipi_dphy_rx0 = "/mipi-dphy-rx0@ff2f0000"; - usb20_otg = "/usb@ff300000"; - usb_host0_ehci = "/usb@ff340000"; - usb_host0_ohci = "/usb@ff350000"; - gmac = "/ethernet@ff360000"; - sdmmc = "/dwmmc@ff370000"; - sdio = "/dwmmc@ff380000"; - emmc = "/dwmmc@ff390000"; - nandc0 = "/nandc@ff3b0000"; - sfc = "/sfc@ff3a0000"; - gpu = "/gpu@ff400000"; - gpu_opp_table = "/gpu-opp-table"; - hevc = "/hevc_service@ff440000"; - vpu = "/vpu_service@ff442000"; - vpu_combo = "/vpu_combo"; - hevc_mmu = "/iommu@ff440440"; - vpu_mmu = "/iommu@ff442800"; - dsi = "/dsi@ff450000"; - dsi_in_vopb = "/dsi@ff450000/ports/port@0/endpoint@0"; - timing0 = "/dsi@ff450000/panel@0/display-timings/60Hz"; - timing1 = "/dsi@ff450000/panel@0/display-timings/50Hz"; - timing2 = "/dsi@ff450000/panel@0/display-timings/75Hz"; - vopb = "/vop@ff460000"; - vopb_out = "/vop@ff460000/port"; - vopb_out_lvds = "/vop@ff460000/port/endpoint@0"; - vopb_out_dsi = "/vop@ff460000/port/endpoint@1"; - vopb_out_rgb = "/vop@ff460000/port/endpoint@2"; - vopb_mmu = "/iommu@ff460f00"; - rk_rga = "/rk_rga@ff480000"; - cif = "/cif@ff490000"; - cif_new = "/cif-new@ff490000"; - vip_mmu = "/iommu@ff490800"; - rk_isp = "/rk_isp@ff4a0000"; - rkisp1 = "/rkisp1@ff4a0000"; - isp_mmu = "/iommu@ff4a8000"; - qos_gmac = "/qos@ff518000"; - qos_gpu = "/qos@ff520000"; - qos_sdmmc = "/qos@ff52c000"; - qos_emmc = "/qos@ff538000"; - qos_nand = "/qos@ff538080"; - qos_sdio = "/qos@ff538100"; - qos_sfc = "/qos@ff538180"; - qos_usb_host = "/qos@ff540000"; - qos_usb_otg = "/qos@ff540080"; - qos_isp_128 = "/qos@ff548000"; - qos_isp_rd = "/qos@ff548080"; - qos_isp_wr = "/qos@ff548100"; - qos_isp_m1 = "/qos@ff548180"; - qos_vip = "/qos@ff548200"; - qos_rga_rd = "/qos@ff550000"; - qos_rga_wr = "/qos@ff550080"; - qos_vop_m0 = "/qos@ff550100"; - qos_vop_m1 = "/qos@ff550180"; - qos_vpu = "/qos@ff558000"; - qos_vpu_r128 = "/qos@ff558080"; - dfi = "/dfi@ff610000"; - dmc = "/dmc"; - ddr_power_model = "/dmc/ddr_power_model"; - dmc_opp_table = "/dmc-opp-table"; - rockchip_system_monitor = "/rockchip-system-monitor"; - pinctrl = "/pinctrl"; - gpio0 = "/pinctrl/gpio0@ff040000"; - gpio1 = "/pinctrl/gpio1@ff250000"; - gpio2 = "/pinctrl/gpio2@ff260000"; - gpio3 = "/pinctrl/gpio3@ff270000"; - pcfg_pull_up = "/pinctrl/pcfg-pull-up"; - pcfg_pull_down = "/pinctrl/pcfg-pull-down"; - pcfg_pull_none = "/pinctrl/pcfg-pull-none"; - pcfg_pull_none_2ma = "/pinctrl/pcfg-pull-none-2ma"; - pcfg_pull_up_2ma = "/pinctrl/pcfg-pull-up-2ma"; - pcfg_pull_up_4ma = "/pinctrl/pcfg-pull-up-4ma"; - pcfg_pull_none_4ma = "/pinctrl/pcfg-pull-none-4ma"; - pcfg_pull_down_4ma = "/pinctrl/pcfg-pull-down-4ma"; - pcfg_pull_none_8ma = "/pinctrl/pcfg-pull-none-8ma"; - pcfg_pull_up_8ma = "/pinctrl/pcfg-pull-up-8ma"; - pcfg_pull_none_12ma = "/pinctrl/pcfg-pull-none-12ma"; - pcfg_pull_up_12ma = "/pinctrl/pcfg-pull-up-12ma"; - pcfg_pull_none_smt = "/pinctrl/pcfg-pull-none-smt"; - pcfg_output_high = "/pinctrl/pcfg-output-high"; - pcfg_output_low = "/pinctrl/pcfg-output-low"; - pcfg_input_high = "/pinctrl/pcfg-input-high"; - pcfg_input = "/pinctrl/pcfg-input"; - i2c0_xfer = "/pinctrl/i2c0/i2c0-xfer"; - i2c1_xfer = "/pinctrl/i2c1/i2c1-xfer"; - i2c2_xfer = "/pinctrl/i2c2/i2c2-xfer"; - i2c3_xfer = "/pinctrl/i2c3/i2c3-xfer"; - tsadc_otp_gpio = "/pinctrl/tsadc/tsadc-otp-gpio"; - tsadc_otp_out = "/pinctrl/tsadc/tsadc-otp-out"; - uart0_xfer = "/pinctrl/uart0/uart0-xfer"; - uart0_cts = "/pinctrl/uart0/uart0-cts"; - uart0_rts = "/pinctrl/uart0/uart0-rts"; - uart0_rts_gpio = "/pinctrl/uart0/uart0-rts-gpio"; - uart1_xfer = "/pinctrl/uart1/uart1-xfer"; - uart1_cts = "/pinctrl/uart1/uart1-cts"; - uart1_rts = "/pinctrl/uart1/uart1-rts"; - uart1_rts_gpio = "/pinctrl/uart1/uart1-rts-gpio"; - uart2m0_xfer = "/pinctrl/uart2-m0/uart2m0-xfer"; - uart2m1_xfer = "/pinctrl/uart2-m1/uart2m1-xfer"; - uart3m0_xfer = "/pinctrl/uart3-m0/uart3m0-xfer"; - uart3m0_cts = "/pinctrl/uart3-m0/uart3m0-cts"; - uart3m0_rts = "/pinctrl/uart3-m0/uart3m0-rts"; - uart3m0_rts_gpio = "/pinctrl/uart3-m0/uart3m0-rts-gpio"; - uart3m1_xfer = "/pinctrl/uart3-m1/uart3m1-xfer"; - uart3m1_cts = "/pinctrl/uart3-m1/uart3m1-cts"; - uart3m1_rts = "/pinctrl/uart3-m1/uart3m1-rts"; - uart3m1_rts_gpio = "/pinctrl/uart3-m1/uart3m1-rts-gpio"; - uart4_xfer = "/pinctrl/uart4/uart4-xfer"; - uart4_cts = "/pinctrl/uart4/uart4-cts"; - uart4_rts = "/pinctrl/uart4/uart4-rts"; - uart5_xfer = "/pinctrl/uart5/uart5-xfer"; - uart5_cts = "/pinctrl/uart5/uart5-cts"; - uart5_rts = "/pinctrl/uart5/uart5-rts"; - spi0_clk = "/pinctrl/spi0/spi0-clk"; - spi0_csn = "/pinctrl/spi0/spi0-csn"; - spi0_miso = "/pinctrl/spi0/spi0-miso"; - spi0_mosi = "/pinctrl/spi0/spi0-mosi"; - spi0_clk_hs = "/pinctrl/spi0/spi0-clk-hs"; - spi0_miso_hs = "/pinctrl/spi0/spi0-miso-hs"; - spi0_mosi_hs = "/pinctrl/spi0/spi0-mosi-hs"; - spi1_clk = "/pinctrl/spi1/spi1-clk"; - spi1_csn0 = "/pinctrl/spi1/spi1-csn0"; - spi1_csn1 = "/pinctrl/spi1/spi1-csn1"; - spi1_miso = "/pinctrl/spi1/spi1-miso"; - spi1_mosi = "/pinctrl/spi1/spi1-mosi"; - spi1_clk_hs = "/pinctrl/spi1/spi1-clk-hs"; - spi1_miso_hs = "/pinctrl/spi1/spi1-miso-hs"; - spi1_mosi_hs = "/pinctrl/spi1/spi1-mosi-hs"; - pdm_clk0m0 = "/pinctrl/pdm/pdm-clk0m0"; - pdm_clk0m1 = "/pinctrl/pdm/pdm-clk0m1"; - pdm_clk1 = "/pinctrl/pdm/pdm-clk1"; - pdm_sdi0m0 = "/pinctrl/pdm/pdm-sdi0m0"; - pdm_sdi0m1 = "/pinctrl/pdm/pdm-sdi0m1"; - pdm_sdi1 = "/pinctrl/pdm/pdm-sdi1"; - pdm_sdi2 = "/pinctrl/pdm/pdm-sdi2"; - pdm_sdi3 = "/pinctrl/pdm/pdm-sdi3"; - pdm_clk0m0_sleep = "/pinctrl/pdm/pdm-clk0m0-sleep"; - pdm_clk0m_sleep1 = "/pinctrl/pdm/pdm-clk0m1-sleep"; - pdm_clk1_sleep = "/pinctrl/pdm/pdm-clk1-sleep"; - pdm_sdi0m0_sleep = "/pinctrl/pdm/pdm-sdi0m0-sleep"; - pdm_sdi0m1_sleep = "/pinctrl/pdm/pdm-sdi0m1-sleep"; - pdm_sdi1_sleep = "/pinctrl/pdm/pdm-sdi1-sleep"; - pdm_sdi2_sleep = "/pinctrl/pdm/pdm-sdi2-sleep"; - pdm_sdi3_sleep = "/pinctrl/pdm/pdm-sdi3-sleep"; - i2s0_8ch_mclk = "/pinctrl/i2s0/i2s0-8ch-mclk"; - i2s0_8ch_sclktx = "/pinctrl/i2s0/i2s0-8ch-sclktx"; - i2s0_8ch_sclkrx = "/pinctrl/i2s0/i2s0-8ch-sclkrx"; - i2s0_8ch_lrcktx = "/pinctrl/i2s0/i2s0-8ch-lrcktx"; - i2s0_8ch_lrckrx = "/pinctrl/i2s0/i2s0-8ch-lrckrx"; - i2s0_8ch_sdo0 = "/pinctrl/i2s0/i2s0-8ch-sdo0"; - i2s0_8ch_sdo1 = "/pinctrl/i2s0/i2s0-8ch-sdo1"; - i2s0_8ch_sdo2 = "/pinctrl/i2s0/i2s0-8ch-sdo2"; - i2s0_8ch_sdo3 = "/pinctrl/i2s0/i2s0-8ch-sdo3"; - i2s0_8ch_sdi0 = "/pinctrl/i2s0/i2s0-8ch-sdi0"; - i2s0_8ch_sdi1 = "/pinctrl/i2s0/i2s0-8ch-sdi1"; - i2s0_8ch_sdi2 = "/pinctrl/i2s0/i2s0-8ch-sdi2"; - i2s0_8ch_sdi3 = "/pinctrl/i2s0/i2s0-8ch-sdi3"; - i2s1_2ch_mclk = "/pinctrl/i2s1/i2s1-2ch-mclk"; - i2s1_2ch_sclk = "/pinctrl/i2s1/i2s1-2ch-sclk"; - i2s1_2ch_lrck = "/pinctrl/i2s1/i2s1-2ch-lrck"; - i2s1_2ch_sdi = "/pinctrl/i2s1/i2s1-2ch-sdi"; - i2s1_2ch_sdo = "/pinctrl/i2s1/i2s1-2ch-sdo"; - i2s2_2ch_mclk = "/pinctrl/i2s2/i2s2-2ch-mclk"; - i2s2_2ch_sclk = "/pinctrl/i2s2/i2s2-2ch-sclk"; - i2s2_2ch_lrck = "/pinctrl/i2s2/i2s2-2ch-lrck"; - i2s2_2ch_sdi = "/pinctrl/i2s2/i2s2-2ch-sdi"; - i2s2_2ch_sdo = "/pinctrl/i2s2/i2s2-2ch-sdo"; - sdmmc_clk = "/pinctrl/sdmmc/sdmmc-clk"; - sdmmc_cmd = "/pinctrl/sdmmc/sdmmc-cmd"; - sdmmc_det = "/pinctrl/sdmmc/sdmmc-det"; - sdmmc_bus1 = "/pinctrl/sdmmc/sdmmc-bus1"; - sdmmc_bus4 = "/pinctrl/sdmmc/sdmmc-bus4"; - sdmmc_gpio = "/pinctrl/sdmmc/sdmmc-gpio"; - sdio_clk = "/pinctrl/sdio/sdio-clk"; - sdio_cmd = "/pinctrl/sdio/sdio-cmd"; - sdio_bus4 = "/pinctrl/sdio/sdio-bus4"; - sdio_gpio = "/pinctrl/sdio/sdio-gpio"; - emmc_clk = "/pinctrl/emmc/emmc-clk"; - emmc_cmd = "/pinctrl/emmc/emmc-cmd"; - emmc_pwren = "/pinctrl/emmc/emmc-pwren"; - emmc_rstnout = "/pinctrl/emmc/emmc-rstnout"; - emmc_bus1 = "/pinctrl/emmc/emmc-bus1"; - emmc_bus4 = "/pinctrl/emmc/emmc-bus4"; - emmc_bus8 = "/pinctrl/emmc/emmc-bus8"; - flash_cs0 = "/pinctrl/flash/flash-cs0"; - flash_rdy = "/pinctrl/flash/flash-rdy"; - flash_dqs = "/pinctrl/flash/flash-dqs"; - flash_ale = "/pinctrl/flash/flash-ale"; - flash_cle = "/pinctrl/flash/flash-cle"; - flash_wrn = "/pinctrl/flash/flash-wrn"; - flash_csl = "/pinctrl/flash/flash-csl"; - flash_rdn = "/pinctrl/flash/flash-rdn"; - flash_bus8 = "/pinctrl/flash/flash-bus8"; - lcdc_m0_rgb_pins = "/pinctrl/lcdc/lcdc-m0-rgb-pins"; - lcdc_m0_sleep_pins = "/pinctrl/lcdc/lcdc-m0-sleep-pins"; - lcdc_m1_rgb_pins = "/pinctrl/lcdc/lcdc-m1-rgb-pins"; - lcdc_m1_sleep_pins = "/pinctrl/lcdc/lcdc-m1-sleep-pins"; - pwm0_pin = "/pinctrl/pwm0/pwm0-pin"; - pwm1_pin = "/pinctrl/pwm1/pwm1-pin"; - pwm2_pin = "/pinctrl/pwm2/pwm2-pin"; - pwm3_pin = "/pinctrl/pwm3/pwm3-pin"; - pwm4_pin = "/pinctrl/pwm4/pwm4-pin"; - pwm5_pin = "/pinctrl/pwm5/pwm5-pin"; - pwm6_pin = "/pinctrl/pwm6/pwm6-pin"; - pwm7_pin = "/pinctrl/pwm7/pwm7-pin"; - rmii_pins = "/pinctrl/gmac/rmii-pins"; - mac_refclk_12ma = "/pinctrl/gmac/mac-refclk-12ma"; - mac_refclk = "/pinctrl/gmac/mac-refclk"; - cif_clkout_m0 = "/pinctrl/cif-m0/cif-clkout-m0"; - dvp_d2d9_m0 = "/pinctrl/cif-m0/dvp-d2d9-m0"; - dvp_d0d1_m0 = "/pinctrl/cif-m0/dvp-d0d1-m0"; - dvp_d10d11_m0 = "/pinctrl/cif-m0/d10-d11-m0"; - cif_clkout_m1 = "/pinctrl/cif-m1/cif-clkout-m1"; - dvp_d2d9_m1 = "/pinctrl/cif-m1/dvp-d2d9-m1"; - dvp_d0d1_m1 = "/pinctrl/cif-m1/dvp-d0d1-m1"; - dvp_d10d11_m1 = "/pinctrl/cif-m1/d10-d11-m1"; - isp_prelight = "/pinctrl/isp/isp-prelight"; - pmic_int = "/pinctrl/pmic/pmic_int"; - soc_slppin_gpio = "/pinctrl/pmic/soc_slppin_gpio"; - soc_slppin_slp = "/pinctrl/pmic/soc_slppin_slp"; - soc_slppin_rst = "/pinctrl/pmic/soc_slppin_rst"; - led_pins = "/pinctrl/leds/led-pins"; - btn_pins = "/pinctrl/btns/btn-pins"; - drm_logo = "/reserved-memory/drm-logo@00000000"; - ramoops_mem = "/reserved-memory/region@110000"; - gpio_keys = "/odroidgo3-keys"; - joypad = "/odroidgo3-joypad"; - leds = "/gpio_leds"; - backlight = "/backlight"; - vccsys = "/vccsys"; - }; -}; diff --git a/config/archr-dts/R36S-DTB/DTS/Panel4.dts b/config/archr-dts/R36S-DTB/DTS/Panel4.dts deleted file mode 100644 index c45f3e1efe..0000000000 --- a/config/archr-dts/R36S-DTB/DTS/Panel4.dts +++ /dev/null @@ -1,4063 +0,0 @@ -/dts-v1/; - -/ { - compatible = "rockchip,rk3326-odroidgo3-linux\0rockchip,rk3326"; - interrupt-parent = <0x01>; - #address-cells = <0x02>; - #size-cells = <0x02>; - model = "Game Console R35S/R36S fix by lxc"; - - ddr_timing { - compatible = "rockchip,ddr-timing"; - ddr2_speed_bin = <0x00>; - ddr3_speed_bin = <0x15>; - ddr4_speed_bin = <0x0c>; - pd_idle = <0x0d>; - sr_idle = <0x5d>; - sr_mc_gate_idle = <0x00>; - srpd_lite_idle = <0x00>; - standby_idle = <0x00>; - auto_pd_dis_freq = <0x42a>; - auto_sr_dis_freq = <0x320>; - ddr2_dll_dis_freq = <0x12c>; - ddr3_dll_dis_freq = <0x12c>; - ddr4_dll_dis_freq = <0x271>; - phy_dll_dis_freq = <0x190>; - ddr2_odt_dis_freq = <0x64>; - phy_ddr2_odt_dis_freq = <0x64>; - ddr2_drv = <0x01>; - ddr2_odt = <0x96>; - phy_ddr2_ca_drv = <0x15>; - phy_ddr2_ck_drv = <0x12>; - phy_ddr2_dq_drv = <0x15>; - phy_ddr2_odt = <0x02>; - ddr3_odt_dis_freq = <0x190>; - phy_ddr3_odt_dis_freq = <0x190>; - ddr3_drv = <0x28>; - ddr3_odt = <0x78>; - phy_ddr3_ca_drv = <0x15>; - phy_ddr3_ck_drv = <0x12>; - phy_ddr3_dq_drv = <0x15>; - phy_ddr3_odt = <0x02>; - phy_lpddr2_odt_dis_freq = <0x29a>; - lpddr2_drv = <0x28>; - phy_lpddr2_ca_drv = <0x16>; - phy_lpddr2_ck_drv = <0x13>; - phy_lpddr2_dq_drv = <0x16>; - phy_lpddr2_odt = <0x00>; - lpddr3_odt_dis_freq = <0x190>; - phy_lpddr3_odt_dis_freq = <0x190>; - lpddr3_drv = <0x28>; - lpddr3_odt = <0xf0>; - phy_lpddr3_ca_drv = <0x16>; - phy_lpddr3_ck_drv = <0x13>; - phy_lpddr3_dq_drv = <0x16>; - phy_lpddr3_odt = <0x02>; - lpddr4_odt_dis_freq = <0x320>; - phy_lpddr4_odt_dis_freq = <0x320>; - lpddr4_drv = <0x3c>; - lpddr4_dq_odt = <0x28>; - lpddr4_ca_odt = <0x28>; - phy_lpddr4_ca_drv = <0x14>; - phy_lpddr4_ck_cs_drv = <0x06>; - phy_lpddr4_dq_drv = <0x06>; - phy_lpddr4_odt = <0x10>; - ddr4_odt_dis_freq = <0x29a>; - phy_ddr4_odt_dis_freq = <0x29a>; - ddr4_drv = <0x22>; - ddr4_odt = <0xf0>; - phy_ddr4_ca_drv = <0x16>; - phy_ddr4_ck_drv = <0x13>; - phy_ddr4_dq_drv = <0x16>; - phy_ddr4_odt = <0x02>; - ddr3a1_ddr4a9_de-skew = <0x06>; - ddr3a0_ddr4a10_de-skew = <0x07>; - ddr3a3_ddr4a6_de-skew = <0x07>; - ddr3a2_ddr4a4_de-skew = <0x07>; - ddr3a5_ddr4a8_de-skew = <0x07>; - ddr3a4_ddr4a5_de-skew = <0x07>; - ddr3a7_ddr4a11_de-skew = <0x07>; - ddr3a6_ddr4a7_de-skew = <0x06>; - ddr3a9_ddr4a0_de-skew = <0x07>; - ddr3a8_ddr4a13_de-skew = <0x07>; - ddr3a11_ddr4a3_de-skew = <0x07>; - ddr3a10_ddr4cs0_de-skew = <0x07>; - ddr3a13_ddr4a2_de-skew = <0x07>; - ddr3a12_ddr4ba1_de-skew = <0x07>; - ddr3a15_ddr4odt0_de-skew = <0x07>; - ddr3a14_ddr4a1_de-skew = <0x07>; - ddr3ba1_ddr4a15_de-skew = <0x07>; - ddr3ba0_ddr4bg0_de-skew = <0x07>; - ddr3ras_ddr4cke_de-skew = <0x07>; - ddr3ba2_ddr4ba0_de-skew = <0x07>; - ddr3we_ddr4bg1_de-skew = <0x07>; - ddr3cas_ddr4a12_de-skew = <0x07>; - ddr3ckn_ddr4ckn_de-skew = <0x07>; - ddr3ckp_ddr4ckp_de-skew = <0x07>; - ddr3cke_ddr4a16_de-skew = <0x07>; - ddr3odt0_ddr4a14_de-skew = <0x07>; - ddr3cs0_ddr4act_de-skew = <0x06>; - ddr3reset_ddr4reset_de-skew = <0x07>; - ddr3cs1_ddr4cs1_de-skew = <0x06>; - ddr3odt1_ddr4odt1_de-skew = <0x07>; - cs0_dm0_rx_de-skew = <0x07>; - cs0_dm0_tx_de-skew = <0x07>; - cs0_dq0_rx_de-skew = <0x08>; - cs0_dq0_tx_de-skew = <0x08>; - cs0_dq1_rx_de-skew = <0x09>; - cs0_dq1_tx_de-skew = <0x08>; - cs0_dq2_rx_de-skew = <0x08>; - cs0_dq2_tx_de-skew = <0x08>; - cs0_dq3_rx_de-skew = <0x08>; - cs0_dq3_tx_de-skew = <0x08>; - cs0_dq4_rx_de-skew = <0x09>; - cs0_dq4_tx_de-skew = <0x08>; - cs0_dq5_rx_de-skew = <0x09>; - cs0_dq5_tx_de-skew = <0x08>; - cs0_dq6_rx_de-skew = <0x09>; - cs0_dq6_tx_de-skew = <0x08>; - cs0_dq7_rx_de-skew = <0x08>; - cs0_dq7_tx_de-skew = <0x08>; - cs0_dqs0_rx_de-skew = <0x06>; - cs0_dqs0p_tx_de-skew = <0x09>; - cs0_dqs0n_tx_de-skew = <0x09>; - cs0_dm1_rx_de-skew = <0x07>; - cs0_dm1_tx_de-skew = <0x06>; - cs0_dq8_rx_de-skew = <0x08>; - cs0_dq8_tx_de-skew = <0x07>; - cs0_dq9_rx_de-skew = <0x09>; - cs0_dq9_tx_de-skew = <0x07>; - cs0_dq10_rx_de-skew = <0x08>; - cs0_dq10_tx_de-skew = <0x08>; - cs0_dq11_rx_de-skew = <0x08>; - cs0_dq11_tx_de-skew = <0x07>; - cs0_dq12_rx_de-skew = <0x08>; - cs0_dq12_tx_de-skew = <0x08>; - cs0_dq13_rx_de-skew = <0x09>; - cs0_dq13_tx_de-skew = <0x07>; - cs0_dq14_rx_de-skew = <0x09>; - cs0_dq14_tx_de-skew = <0x08>; - cs0_dq15_rx_de-skew = <0x09>; - cs0_dq15_tx_de-skew = <0x07>; - cs0_dqs1_rx_de-skew = <0x07>; - cs0_dqs1p_tx_de-skew = <0x09>; - cs0_dqs1n_tx_de-skew = <0x09>; - cs0_dm2_rx_de-skew = <0x07>; - cs0_dm2_tx_de-skew = <0x07>; - cs0_dq16_rx_de-skew = <0x09>; - cs0_dq16_tx_de-skew = <0x09>; - cs0_dq17_rx_de-skew = <0x07>; - cs0_dq17_tx_de-skew = <0x09>; - cs0_dq18_rx_de-skew = <0x07>; - cs0_dq18_tx_de-skew = <0x08>; - cs0_dq19_rx_de-skew = <0x07>; - cs0_dq19_tx_de-skew = <0x09>; - cs0_dq20_rx_de-skew = <0x09>; - cs0_dq20_tx_de-skew = <0x09>; - cs0_dq21_rx_de-skew = <0x09>; - cs0_dq21_tx_de-skew = <0x09>; - cs0_dq22_rx_de-skew = <0x08>; - cs0_dq22_tx_de-skew = <0x09>; - cs0_dq23_rx_de-skew = <0x08>; - cs0_dq23_tx_de-skew = <0x09>; - cs0_dqs2_rx_de-skew = <0x06>; - cs0_dqs2p_tx_de-skew = <0x09>; - cs0_dqs2n_tx_de-skew = <0x09>; - cs0_dm3_rx_de-skew = <0x07>; - cs0_dm3_tx_de-skew = <0x07>; - cs0_dq24_rx_de-skew = <0x08>; - cs0_dq24_tx_de-skew = <0x08>; - cs0_dq25_rx_de-skew = <0x09>; - cs0_dq25_tx_de-skew = <0x09>; - cs0_dq26_rx_de-skew = <0x09>; - cs0_dq26_tx_de-skew = <0x08>; - cs0_dq27_rx_de-skew = <0x09>; - cs0_dq27_tx_de-skew = <0x08>; - cs0_dq28_rx_de-skew = <0x09>; - cs0_dq28_tx_de-skew = <0x09>; - cs0_dq29_rx_de-skew = <0x09>; - cs0_dq29_tx_de-skew = <0x09>; - cs0_dq30_rx_de-skew = <0x08>; - cs0_dq30_tx_de-skew = <0x08>; - cs0_dq31_rx_de-skew = <0x08>; - cs0_dq31_tx_de-skew = <0x08>; - cs0_dqs3_rx_de-skew = <0x07>; - cs0_dqs3p_tx_de-skew = <0x09>; - cs0_dqs3n_tx_de-skew = <0x09>; - cs1_dm0_rx_de-skew = <0x07>; - cs1_dm0_tx_de-skew = <0x07>; - cs1_dq0_rx_de-skew = <0x08>; - cs1_dq0_tx_de-skew = <0x08>; - cs1_dq1_rx_de-skew = <0x09>; - cs1_dq1_tx_de-skew = <0x08>; - cs1_dq2_rx_de-skew = <0x08>; - cs1_dq2_tx_de-skew = <0x08>; - cs1_dq3_rx_de-skew = <0x08>; - cs1_dq3_tx_de-skew = <0x08>; - cs1_dq4_rx_de-skew = <0x08>; - cs1_dq4_tx_de-skew = <0x08>; - cs1_dq5_rx_de-skew = <0x09>; - cs1_dq5_tx_de-skew = <0x08>; - cs1_dq6_rx_de-skew = <0x09>; - cs1_dq6_tx_de-skew = <0x08>; - cs1_dq7_rx_de-skew = <0x08>; - cs1_dq7_tx_de-skew = <0x08>; - cs1_dqs0_rx_de-skew = <0x06>; - cs1_dqs0p_tx_de-skew = <0x09>; - cs1_dqs0n_tx_de-skew = <0x09>; - cs1_dm1_rx_de-skew = <0x07>; - cs1_dm1_tx_de-skew = <0x07>; - cs1_dq8_rx_de-skew = <0x08>; - cs1_dq8_tx_de-skew = <0x08>; - cs1_dq9_rx_de-skew = <0x08>; - cs1_dq9_tx_de-skew = <0x07>; - cs1_dq10_rx_de-skew = <0x07>; - cs1_dq10_tx_de-skew = <0x08>; - cs1_dq11_rx_de-skew = <0x08>; - cs1_dq11_tx_de-skew = <0x08>; - cs1_dq12_rx_de-skew = <0x08>; - cs1_dq12_tx_de-skew = <0x07>; - cs1_dq13_rx_de-skew = <0x08>; - cs1_dq13_tx_de-skew = <0x08>; - cs1_dq14_rx_de-skew = <0x08>; - cs1_dq14_tx_de-skew = <0x08>; - cs1_dq15_rx_de-skew = <0x08>; - cs1_dq15_tx_de-skew = <0x07>; - cs1_dqs1_rx_de-skew = <0x07>; - cs1_dqs1p_tx_de-skew = <0x09>; - cs1_dqs1n_tx_de-skew = <0x09>; - cs1_dm2_rx_de-skew = <0x07>; - cs1_dm2_tx_de-skew = <0x08>; - cs1_dq16_rx_de-skew = <0x08>; - cs1_dq16_tx_de-skew = <0x09>; - cs1_dq17_rx_de-skew = <0x08>; - cs1_dq17_tx_de-skew = <0x09>; - cs1_dq18_rx_de-skew = <0x07>; - cs1_dq18_tx_de-skew = <0x08>; - cs1_dq19_rx_de-skew = <0x08>; - cs1_dq19_tx_de-skew = <0x09>; - cs1_dq20_rx_de-skew = <0x09>; - cs1_dq20_tx_de-skew = <0x09>; - cs1_dq21_rx_de-skew = <0x09>; - cs1_dq21_tx_de-skew = <0x09>; - cs1_dq22_rx_de-skew = <0x08>; - cs1_dq22_tx_de-skew = <0x09>; - cs1_dq23_rx_de-skew = <0x08>; - cs1_dq23_tx_de-skew = <0x09>; - cs1_dqs2_rx_de-skew = <0x06>; - cs1_dqs2p_tx_de-skew = <0x09>; - cs1_dqs2n_tx_de-skew = <0x09>; - cs1_dm3_rx_de-skew = <0x07>; - cs1_dm3_tx_de-skew = <0x07>; - cs1_dq24_rx_de-skew = <0x08>; - cs1_dq24_tx_de-skew = <0x09>; - cs1_dq25_rx_de-skew = <0x09>; - cs1_dq25_tx_de-skew = <0x09>; - cs1_dq26_rx_de-skew = <0x09>; - cs1_dq26_tx_de-skew = <0x08>; - cs1_dq27_rx_de-skew = <0x08>; - cs1_dq27_tx_de-skew = <0x08>; - cs1_dq28_rx_de-skew = <0x09>; - cs1_dq28_tx_de-skew = <0x09>; - cs1_dq29_rx_de-skew = <0x09>; - cs1_dq29_tx_de-skew = <0x09>; - cs1_dq30_rx_de-skew = <0x09>; - cs1_dq30_tx_de-skew = <0x08>; - cs1_dq31_rx_de-skew = <0x08>; - cs1_dq31_tx_de-skew = <0x08>; - cs1_dqs3_rx_de-skew = <0x07>; - cs1_dqs3p_tx_de-skew = <0x09>; - cs1_dqs3n_tx_de-skew = <0x09>; - phandle = <0xaf>; - }; - - aliases { - ethernet0 = "/ethernet@ff360000"; - i2c0 = "/i2c@ff180000"; - i2c1 = "/i2c@ff190000"; - i2c2 = "/i2c@ff1a0000"; - i2c3 = "/i2c@ff1b0000"; - serial0 = "/serial@ff030000"; - serial1 = "/serial@ff158000"; - serial2 = "/serial@ff160000"; - serial3 = "/serial@ff168000"; - serial4 = "/serial@ff170000"; - serial5 = "/serial@ff178000"; - spi0 = "/spi@ff1d0000"; - spi1 = "/spi@ff1d8000"; - }; - - cpus { - #address-cells = <0x02>; - #size-cells = <0x00>; - - cpu@0 { - device_type = "cpu"; - compatible = "arm,cortex-a35\0arm,armv8"; - reg = <0x00 0x00>; - enable-method = "psci"; - clocks = <0x02 0x07>; - #cooling-cells = <0x02>; - dynamic-power-coefficient = <0x5a>; - operating-points-v2 = <0x03>; - cpu-idle-states = <0x04 0x05>; - cpu-supply = <0x06>; - phandle = <0x09>; - }; - - cpu@1 { - device_type = "cpu"; - compatible = "arm,cortex-a35\0arm,armv8"; - reg = <0x00 0x01>; - enable-method = "psci"; - operating-points-v2 = <0x03>; - cpu-idle-states = <0x04 0x05>; - phandle = <0x0a>; - }; - - cpu@2 { - device_type = "cpu"; - compatible = "arm,cortex-a35\0arm,armv8"; - reg = <0x00 0x02>; - enable-method = "psci"; - operating-points-v2 = <0x03>; - cpu-idle-states = <0x04 0x05>; - phandle = <0x0b>; - }; - - cpu@3 { - device_type = "cpu"; - compatible = "arm,cortex-a35\0arm,armv8"; - reg = <0x00 0x03>; - enable-method = "psci"; - operating-points-v2 = <0x03>; - cpu-idle-states = <0x04 0x05>; - phandle = <0x0c>; - }; - - idle-states { - entry-method = "psci"; - - cpu-sleep { - compatible = "arm,idle-state"; - local-timer-stop; - arm,psci-suspend-param = <0x10000>; - entry-latency-us = <0x78>; - exit-latency-us = <0xfa>; - min-residency-us = <0x384>; - phandle = <0x04>; - }; - - cluster-sleep { - compatible = "arm,idle-state"; - local-timer-stop; - arm,psci-suspend-param = <0x1010000>; - entry-latency-us = <0x190>; - exit-latency-us = <0x1f4>; - min-residency-us = <0x7d0>; - phandle = <0x05>; - }; - }; - }; - - cpu0-opp-table { - compatible = "operating-points-v2"; - opp-shared; - rockchip,temp-hysteresis = <0x1388>; - rockchip,low-temp = <0x00>; - rockchip,low-temp-min-volt = <0xf4240>; - rockchip,low-temp-adjust-volt = <0x00 0x5e8 0xc350>; - clocks = <0x02 0x01>; - rockchip,avs-scale = <0x04>; - rockchip,max-volt = <0x149970>; - rockchip,evb-irdrop = <0x61a8>; - nvmem-cells = <0x07 0x08>; - nvmem-cell-names = "cpu_leakage\0performance"; - rockchip,bin-scaling-sel = <0x00 0x0d 0x01 0x0d>; - rockchip,pvtm-voltage-sel = <0x00 0xc350 0x00 0xc351 0xd2f0 0x01 0xd2f1 0xea60 0x02 0xea61 0x1869f 0x03>; - rockchip,pvtm-freq = <0x639c0>; - rockchip,pvtm-volt = <0xf4240>; - rockchip,pvtm-ch = <0x00 0x00>; - rockchip,pvtm-sample-time = <0x3e8>; - rockchip,pvtm-number = <0x0a>; - rockchip,pvtm-error = <0x3e8>; - rockchip,pvtm-ref-temp = <0x28>; - rockchip,pvtm-temp-prop = <0xffffffc8 0xffffffc8>; - rockchip,thermal-zone = "soc-thermal"; - rockchip,avs = <0x01>; - phandle = <0x03>; - - opp-1008000000 { - opp-hz = <0x00 0x3c14dc00>; - opp-microvolt = <0x11edd8 0x11edd8 0x149970>; - opp-microvolt-L0 = <0x11edd8 0x11edd8 0x149970>; - opp-microvolt-L1 = <0x112a88 0x112a88 0x149970>; - opp-microvolt-L2 = <0x112a88 0x112a88 0x149970>; - opp-microvolt-L3 = <0x100590 0x100590 0x149970>; - clock-latency-ns = <0x9c40>; - }; - - opp-1200000000 { - opp-hz = <0x00 0x47868c00>; - opp-microvolt = <0x13d620 0x13d620 0x149970>; - opp-microvolt-L0 = <0x13d620 0x13d620 0x149970>; - opp-microvolt-L1 = <0x137478 0x137478 0x149970>; - opp-microvolt-L2 = <0x1312d0 0x1312d0 0x149970>; - opp-microvolt-L3 = <0x124f80 0x124f80 0x149970>; - clock-latency-ns = <0x9c40>; - }; - - opp-1248000000 { - opp-hz = <0x00 0x4a62f800>; - opp-microvolt = <0x149970 0x149970 0x149970>; - opp-microvolt-L0 = <0x149970 0x149970 0x149970>; - opp-microvolt-L1 = <0x13d620 0x13d620 0x149970>; - opp-microvolt-L2 = <0x137478 0x137478 0x149970>; - opp-microvolt-L3 = <0x12b128 0x12b128 0x149970>; - clock-latency-ns = <0x9c40>; - }; - - opp-1296000000 { - opp-hz = <0x00 0x4d3f6400>; - opp-microvolt = <0x149970 0x149970 0x149970>; - opp-microvolt-L0 = <0x149970 0x149970 0x149970>; - opp-microvolt-L1 = <0x149970 0x149970 0x149970>; - opp-microvolt-L2 = <0x13d620 0x13d620 0x149970>; - opp-microvolt-L3 = <0x1312d0 0x1312d0 0x149970>; - clock-latency-ns = <0x9c40>; - }; - - opp-1512000000 { - opp-hz = <0x00 0x5a1f4a00>; - opp-microvolt = <0x149970 0x149970 0x149970>; - opp-microvolt-L0 = <0x149970 0x149970 0x149970>; - opp-microvolt-L1 = <0x149970 0x149970 0x149970>; - opp-microvolt-L2 = <0x13d620 0x13d620 0x149970>; - opp-microvolt-L3 = <0x1312d0 0x1312d0 0x149970>; - clock-latency-ns = <0x9c40>; - }; - }; - - arm-pmu { - compatible = "arm,cortex-a53-pmu"; - interrupts = <0x00 0x64 0x04 0x00 0x65 0x04 0x00 0x66 0x04 0x00 0x67 0x04>; - interrupt-affinity = <0x09 0x0a 0x0b 0x0c>; - }; - - bus-soc { - compatible = "rockchip,px30-bus"; - rockchip,busfreq-policy = "autocs"; - phandle = <0xc4>; - - soc-bus0 { - bus-id = <0x00>; - timer-us = <0x14>; - enable-msk = <0x40f7>; - status = "disabled"; - }; - - soc-bus1 { - bus-id = <0x01>; - timer-us = <0xc8>; - enable-msk = <0x40bf>; - status = "disabled"; - }; - - soc-bus2 { - bus-id = <0x02>; - timer-us = <0xc8>; - enable-msk = <0x4007>; - status = "disabled"; - }; - }; - - bus-apll { - compatible = "rockchip,px30-bus"; - rockchip,busfreq-policy = "clkfreq"; - clocks = <0x02 0x01>; - clock-names = "bus"; - operating-points-v2 = <0x0d>; - status = "okay"; - bus-supply = <0x0e>; - phandle = <0xc5>; - }; - - bus-apll-opp-table { - compatible = "operating-points-v2"; - opp-shared; - phandle = <0x0d>; - - opp-1512000000 { - opp-hz = <0x00 0x5a1f4a00>; - opp-microvolt = <0xf4240>; - }; - - opp-1008000000 { - opp-hz = <0x00 0x3c14dc00>; - opp-microvolt = <0xe7ef0>; - }; - }; - - cpuinfo { - compatible = "rockchip,cpuinfo"; - nvmem-cells = <0x0f>; - nvmem-cell-names = "id"; - }; - - display-subsystem { - compatible = "rockchip,display-subsystem"; - ports = <0x10>; - status = "okay"; - logo-memory-region = <0x11>; - phandle = <0xc6>; - - route { - - route-lvds { - status = "disabled"; - logo,uboot = "logo.gif"; - logo,kernel = "logo_kernel.gif"; - logo,mode = "center"; - charge_logo,mode = "center"; - connect = <0x12>; - phandle = <0xc7>; - }; - - route-dsi { - status = "okay"; - logo,uboot = "logo.gif"; - logo,kernel = "logo_kernel.gif"; - logo,mode = "center"; - charge_logo,mode = "center"; - connect = <0x13>; - phandle = <0xc8>; - }; - - route-rgb { - status = "disabled"; - logo,uboot = "logo.gif"; - logo,kernel = "logo_kernel.gif"; - logo,mode = "center"; - charge_logo,mode = "center"; - connect = <0x14>; - phandle = <0xc9>; - }; - }; - }; - - firmware { - - optee { - compatible = "linaro,optee-tz"; - method = "smc"; - }; - }; - - external-gmac-clock { - compatible = "fixed-clock"; - clock-frequency = <0x2faf080>; - clock-output-names = "gmac_clkin"; - #clock-cells = <0x00>; - phandle = <0xca>; - }; - - psci { - compatible = "arm,psci-1.0"; - method = "smc"; - }; - - rockchip-suspend { - compatible = "rockchip,pm-px30"; - status = "okay"; - rockchip,sleep-debug-en = <0x01>; - rockchip,sleep-mode-config = <0x20702>; - rockchip,wakeup-config = <0x85>; - phandle = <0xcb>; - }; - - timer { - compatible = "arm,armv8-timer"; - interrupts = <0x01 0x0d 0xf04 0x01 0x0e 0xf04 0x01 0x0b 0xf04 0x01 0x0a 0xf04>; - }; - - xin24m { - compatible = "fixed-clock"; - #clock-cells = <0x00>; - clock-frequency = <0x16e3600>; - clock-output-names = "xin24m"; - phandle = <0xcc>; - }; - - xin32k { - compatible = "fixed-clock"; - #clock-cells = <0x00>; - clock-frequency = <0x8000>; - clock-output-names = "xin32k"; - phandle = <0xcd>; - }; - - power-management@ff000000 { - compatible = "rockchip,px30-pmu\0syscon\0simple-mfd"; - reg = <0x00 0xff000000 0x00 0x1000>; - phandle = <0xce>; - - power-controller { - compatible = "rockchip,px30-power-controller"; - #power-domain-cells = <0x01>; - #address-cells = <0x01>; - #size-cells = <0x00>; - phandle = <0x8a>; - - pd_usb@5 { - reg = <0x05>; - clocks = <0x02 0x103 0x02 0x102 0x02 0x3c>; - pm_qos = <0x15 0x16>; - }; - - pd_sdcard@7 { - reg = <0x07>; - clocks = <0x02 0xf7 0x02 0x3b>; - pm_qos = <0x17>; - }; - - pd_gmac@9 { - reg = <0x09>; - clocks = <0x02 0xb2 0x02 0x143 0x02 0x40 0x02 0x3f>; - pm_qos = <0x18>; - }; - - pd_mmc_nand@10 { - reg = <0x0a>; - clocks = <0x02 0xfe 0x02 0x100 0x02 0xff 0x02 0x101 0x02 0x39 0x02 0x37 0x02 0x38 0x02 0x3a>; - pm_qos = <0x19 0x1a 0x1b 0x1c>; - }; - - pd_vpu@11 { - reg = <0x0b>; - clocks = <0x02 0xaf 0x02 0xf4 0x02 0x4b>; - pm_qos = <0x1d 0x1e>; - }; - - pd_vo@12 { - reg = <0x0c>; - clocks = <0x02 0xb7 0x02 0xb5 0x02 0xb6 0x02 0x96 0x02 0x97 0x02 0xfd 0x02 0xfb 0x02 0xfc 0x02 0x144 0x02 0x35 0x02 0x36>; - pm_qos = <0x1f 0x20 0x21 0x22>; - }; - - pd_vi@13 { - reg = <0x0d>; - clocks = <0x02 0xb3 0x02 0xb4 0x02 0xf9 0x02 0xfa 0x02 0x33>; - pm_qos = <0x23 0x24 0x25 0x26 0x27>; - }; - - pd_gpu@14 { - reg = <0x0e>; - clocks = <0x02 0x49>; - pm_qos = <0x28>; - }; - }; - }; - - syscon@ff010000 { - compatible = "rockchip,px30-pmugrf\0syscon\0simple-mfd"; - reg = <0x00 0xff010000 0x00 0x1000>; - #address-cells = <0x01>; - #size-cells = <0x01>; - phandle = <0xac>; - - io-domains { - compatible = "rockchip,px30-pmu-io-voltage-domain"; - status = "okay"; - pmuio1-supply = <0x29>; - pmuio2-supply = <0x29>; - phandle = <0xcf>; - }; - - reboot-mode { - compatible = "syscon-reboot-mode"; - offset = <0x200>; - mode-bootloader = <0x5242c301>; - mode-charge = <0x5242c30b>; - mode-fastboot = <0x5242c309>; - mode-loader = <0x5242c301>; - mode-normal = <0x5242c300>; - mode-recovery = <0x5242c303>; - mode-ums = <0x5242c30c>; - }; - - pmu-pvtm { - compatible = "rockchip,px30-pmu-pvtm"; - clocks = <0x2a 0x07>; - clock-names = "pmu"; - status = "okay"; - phandle = <0xd0>; - }; - }; - - serial@ff030000 { - compatible = "rockchip,px30-uart\0snps,dw-apb-uart"; - reg = <0x00 0xff030000 0x00 0x100>; - interrupts = <0x00 0x0f 0x04>; - clocks = <0x2a 0x06 0x2a 0x15>; - clock-names = "baudclk\0apb_pclk"; - reg-shift = <0x02>; - reg-io-width = <0x04>; - dmas = <0x2b 0x00 0x2b 0x01>; - pinctrl-names = "default"; - pinctrl-0 = <0x2c 0x2d 0x2e>; - status = "disabled"; - phandle = <0xd1>; - }; - - i2s@ff060000 { - compatible = "rockchip,px30-i2s-tdm"; - reg = <0x00 0xff060000 0x00 0x1000>; - interrupts = <0x00 0x0c 0x04>; - clocks = <0x02 0x10 0x02 0x12 0x02 0x106>; - clock-names = "mclk_tx\0mclk_rx\0hclk"; - dmas = <0x2b 0x10 0x2b 0x11>; - dma-names = "tx\0rx"; - resets = <0x02 0x84 0x02 0xbf>; - reset-names = "tx-m\0rx-m"; - rockchip,cru = <0x02>; - rockchip,grf = <0x2f>; - pinctrl-names = "default"; - pinctrl-0 = <0x30 0x31 0x32 0x33 0x34 0x35 0x36 0x37 0x38 0x39 0x3a 0x3b>; - status = "disabled"; - phandle = <0xd2>; - }; - - i2s@ff070000 { - compatible = "rockchip,px30-i2s\0rockchip,rk3066-i2s"; - reg = <0x00 0xff070000 0x00 0x1000>; - interrupts = <0x00 0x0d 0x04>; - clocks = <0x02 0x14 0x02 0x107>; - clock-names = "i2s_clk\0i2s_hclk"; - dmas = <0x2b 0x12 0x2b 0x13>; - dma-names = "tx\0rx"; - resets = <0x02 0x86 0x02 0x85>; - reset-names = "reset-m\0reset-h"; - pinctrl-names = "default"; - pinctrl-0 = <0x3c 0x3d 0x3e 0x3f>; - status = "okay"; - #sound-dai-cells = <0x00>; - phandle = <0xc2>; - }; - - i2s@ff080000 { - compatible = "rockchip,px30-i2s\0rockchip,rk3066-i2s"; - reg = <0x00 0xff080000 0x00 0x1000>; - interrupts = <0x00 0x0e 0x04>; - clocks = <0x02 0x16 0x02 0x108>; - clock-names = "i2s_clk\0i2s_hclk"; - dmas = <0x2b 0x14 0x2b 0x15>; - dma-names = "tx\0rx"; - resets = <0x02 0x88 0x02 0x87>; - reset-names = "reset-m\0reset-h"; - pinctrl-names = "default"; - pinctrl-0 = <0x40 0x41 0x42 0x43>; - status = "disabled"; - phandle = <0xd3>; - }; - - pdm@ff0a0000 { - compatible = "rockchip,px30-pdm\0rockchip,pdm"; - reg = <0x00 0xff0a0000 0x00 0x1000>; - clocks = <0x02 0x0f 0x02 0x105>; - clock-names = "pdm_clk\0pdm_hclk"; - dmas = <0x2b 0x18>; - dma-names = "rx"; - resets = <0x02 0x82>; - reset-names = "pdm-m"; - pinctrl-names = "default"; - pinctrl-0 = <0x44 0x45 0x46 0x47 0x48 0x49>; - status = "disabled"; - phandle = <0xd4>; - }; - - crypto@ff0b0000 { - compatible = "rockchip,px30-crypto"; - reg = <0x00 0xff0b0000 0x00 0x4000>; - interrupts = <0x00 0x52 0x04>; - clocks = <0x02 0xac 0x02 0xf1 0x02 0x30 0x02 0x31>; - clock-names = "aclk\0hclk\0sclk\0apb_pclk"; - resets = <0x02 0x74>; - reset-names = "crypto-rst"; - status = "disabled"; - phandle = <0xd5>; - }; - - rng@ff0b0000 { - compatible = "rockchip,cryptov2-rng"; - reg = <0x00 0xff0b0000 0x00 0x4000>; - clocks = <0x02 0x30 0x02 0x31 0x02 0xac 0x02 0xf1>; - clock-names = "clk_crypto\0clk_crypto_apk\0aclk_crypto\0hclk_crypto"; - assigned-clocks = <0x02 0x30 0x02 0x31 0x02 0xac 0x02 0xf1>; - assigned-clock-rates = <0x8f0d180 0x8f0d180 0xbebc200 0x5f5e100>; - resets = <0x02 0x74>; - reset-names = "reset"; - status = "okay"; - phandle = <0xd6>; - }; - - interrupt-controller@ff131000 { - compatible = "arm,gic-400"; - #interrupt-cells = <0x03>; - #address-cells = <0x00>; - interrupt-controller; - reg = <0x00 0xff131000 0x00 0x1000 0x00 0xff132000 0x00 0x2000 0x00 0xff134000 0x00 0x2000 0x00 0xff136000 0x00 0x2000>; - interrupts = <0x01 0x09 0xf04>; - phandle = <0x01>; - }; - - syscon@ff140000 { - compatible = "rockchip,px30-grf\0syscon\0simple-mfd"; - reg = <0x00 0xff140000 0x00 0x1000>; - #address-cells = <0x01>; - #size-cells = <0x01>; - phandle = <0x2f>; - - io-domains { - compatible = "rockchip,px30-io-voltage-domain"; - status = "okay"; - vccio1-supply = <0x4a>; - vccio2-supply = <0x4a>; - vccio3-supply = <0x4b>; - vccio4-supply = <0x4b>; - vccio5-supply = <0x4b>; - vccio6-supply = <0x4b>; - phandle = <0xd7>; - }; - - lvds { - compatible = "rockchip,px30-lvds"; - phys = <0x4c>; - phy-names = "phy"; - status = "disabled"; - phandle = <0xd8>; - - ports { - #address-cells = <0x01>; - #size-cells = <0x00>; - - port@0 { - reg = <0x00>; - #address-cells = <0x01>; - #size-cells = <0x00>; - - endpoint@0 { - reg = <0x00>; - remote-endpoint = <0x12>; - phandle = <0xa2>; - }; - }; - }; - }; - - rgb { - compatible = "rockchip,px30-rgb"; - pinctrl-names = "default\0sleep"; - pinctrl-0 = <0x4d>; - pinctrl-1 = <0x4e>; - status = "disabled"; - phys = <0x4c>; - phy-names = "phy"; - phandle = <0xd9>; - - ports { - #address-cells = <0x01>; - #size-cells = <0x00>; - - port@0 { - reg = <0x00>; - #address-cells = <0x01>; - #size-cells = <0x00>; - - endpoint@0 { - reg = <0x00>; - remote-endpoint = <0x14>; - phandle = <0xa4>; - }; - }; - }; - }; - }; - - syscon@ff148000 { - compatible = "syscon\0simple-mfd"; - reg = <0x00 0xff148000 0x00 0x1000>; - #address-cells = <0x01>; - #size-cells = <0x01>; - phandle = <0xda>; - - pvtm { - compatible = "rockchip,px30-pvtm"; - clocks = <0x02 0x4a>; - clock-names = "core"; - status = "okay"; - phandle = <0xdb>; - }; - }; - - serial@ff158000 { - compatible = "rockchip,px30-uart\0snps,dw-apb-uart"; - reg = <0x00 0xff158000 0x00 0x100>; - interrupts = <0x00 0x10 0x04>; - clocks = <0x02 0x18 0x02 0x149>; - clock-names = "baudclk\0apb_pclk"; - reg-shift = <0x02>; - reg-io-width = <0x04>; - dmas = <0x2b 0x02 0x2b 0x03>; - pinctrl-names = "default"; - pinctrl-0 = <0x4f 0x50>; - status = "okay"; - phandle = <0xdc>; - }; - - serial@ff160000 { - compatible = "rockchip,px30-uart\0snps,dw-apb-uart"; - reg = <0x00 0xff160000 0x00 0x100>; - interrupts = <0x00 0x11 0x04>; - clocks = <0x02 0x19 0x02 0x14a>; - clock-names = "baudclk\0apb_pclk"; - reg-shift = <0x02>; - reg-io-width = <0x04>; - dmas = <0x2b 0x04 0x2b 0x05>; - pinctrl-names = "default"; - pinctrl-0 = <0x51>; - status = "disabled"; - phandle = <0xdd>; - }; - - serial@ff168000 { - compatible = "rockchip,px30-uart\0snps,dw-apb-uart"; - reg = <0x00 0xff168000 0x00 0x100>; - interrupts = <0x00 0x12 0x04>; - clocks = <0x02 0x1a 0x02 0x14b>; - clock-names = "baudclk\0apb_pclk"; - reg-shift = <0x02>; - reg-io-width = <0x04>; - dmas = <0x2b 0x06 0x2b 0x07>; - pinctrl-names = "default"; - pinctrl-0 = <0x52 0x53 0x54>; - status = "disabled"; - phandle = <0xde>; - }; - - serial@ff170000 { - compatible = "rockchip,px30-uart\0snps,dw-apb-uart"; - reg = <0x00 0xff170000 0x00 0x100>; - interrupts = <0x00 0x13 0x04>; - clocks = <0x02 0x1b 0x02 0x14c>; - clock-names = "baudclk\0apb_pclk"; - reg-shift = <0x02>; - reg-io-width = <0x04>; - dmas = <0x2b 0x08 0x2b 0x09>; - pinctrl-names = "default"; - pinctrl-0 = <0x55 0x56 0x57>; - status = "disabled"; - phandle = <0xdf>; - }; - - serial@ff178000 { - compatible = "rockchip,px30-uart\0snps,dw-apb-uart"; - reg = <0x00 0xff178000 0x00 0x100>; - interrupts = <0x00 0x14 0x04>; - clocks = <0x02 0x1c 0x02 0x14d>; - clock-names = "baudclk\0apb_pclk"; - reg-shift = <0x02>; - reg-io-width = <0x04>; - dmas = <0x2b 0x0a 0x2b 0x0b>; - pinctrl-names = "default"; - pinctrl-0 = <0x58 0x59 0x5a>; - status = "disabled"; - phandle = <0xe0>; - }; - - i2c@ff180000 { - compatible = "rockchip,rk3399-i2c"; - reg = <0x00 0xff180000 0x00 0x1000>; - clocks = <0x02 0x1d 0x02 0x14e>; - clock-names = "i2c\0pclk"; - interrupts = <0x00 0x07 0x04>; - pinctrl-names = "default"; - pinctrl-0 = <0x5b>; - #address-cells = <0x01>; - #size-cells = <0x00>; - status = "okay"; - clock-frequency = <0x61a80>; - i2c-scl-rising-time-ns = <0x118>; - i2c-scl-falling-time-ns = <0x10>; - phandle = <0xe1>; - - pmic@20 { - compatible = "rockchip,rk817"; - reg = <0x20>; - interrupt-parent = <0x5c>; - interrupts = <0x0a 0x08>; - pinctrl-names = "default\0pmic-sleep\0pmic-power-off\0pmic-reset"; - pinctrl-0 = <0x5d>; - pinctrl-1 = <0x5e 0x5f>; - pinctrl-2 = <0x60 0x61>; - pinctrl-3 = <0x62 0x63>; - rockchip,system-power-controller; - wakeup-source; - #clock-cells = <0x01>; - clock-output-names = "rk808-clkout1\0rk808-clkout2"; - pmic-reset-func = <0x01>; - vcc1-supply = <0x64>; - vcc2-supply = <0x64>; - vcc3-supply = <0x64>; - vcc4-supply = <0x64>; - vcc5-supply = <0x64>; - vcc6-supply = <0x64>; - vcc7-supply = <0x64>; - vcc8-supply = <0x64>; - vcc9-supply = <0x65>; - phandle = <0xe2>; - - pwrkey { - status = "okay"; - }; - - pinctrl_rk8xx { - gpio-controller; - #gpio-cells = <0x02>; - phandle = <0xe3>; - - rk817_ts_gpio1 { - pins = "gpio_ts"; - function = "pin_fun1"; - phandle = <0xe4>; - }; - - rk817_gt_gpio2 { - pins = "gpio_gt"; - function = "pin_fun1"; - phandle = <0xe5>; - }; - - rk817_pin_ts { - pins = "gpio_ts"; - function = "pin_fun0"; - phandle = <0xe6>; - }; - - rk817_pin_gt { - pins = "gpio_gt"; - function = "pin_fun0"; - phandle = <0xe7>; - }; - - rk817_slppin_null { - pins = "gpio_slp"; - function = "pin_fun0"; - phandle = <0xe8>; - }; - - rk817_slppin_slp { - pins = "gpio_slp"; - function = "pin_fun1"; - phandle = <0x5f>; - }; - - rk817_slppin_pwrdn { - pins = "gpio_slp"; - function = "pin_fun2"; - phandle = <0x61>; - }; - - rk817_slppin_rst { - pins = "gpio_slp"; - function = "pin_fun3"; - phandle = <0x63>; - }; - }; - - regulators { - - DCDC_REG1 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0xe7ef0>; - regulator-max-microvolt = <0x118c30>; - regulator-ramp-delay = <0x1771>; - regulator-initial-mode = <0x02>; - regulator-name = "vdd_logic"; - phandle = <0x0e>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <0xe7ef0>; - }; - }; - - DCDC_REG2 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0xe7ef0>; - regulator-max-microvolt = <0x149970>; - regulator-ramp-delay = <0x1771>; - regulator-initial-mode = <0x02>; - regulator-name = "vdd_arm"; - phandle = <0x06>; - - regulator-state-mem { - regulator-off-in-suspend; - regulator-suspend-microvolt = <0xe7ef0>; - }; - }; - - DCDC_REG3 { - regulator-always-on; - regulator-boot-on; - regulator-initial-mode = <0x02>; - regulator-name = "vcc_ddr"; - phandle = <0xe9>; - - regulator-state-mem { - regulator-on-in-suspend; - }; - }; - - DCDC_REG4 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0x325aa0>; - regulator-max-microvolt = <0x325aa0>; - regulator-initial-mode = <0x02>; - regulator-name = "vcc_3v3"; - phandle = <0x4b>; - - regulator-state-mem { - regulator-off-in-suspend; - regulator-suspend-microvolt = <0x325aa0>; - }; - }; - - LDO_REG1 { - regulator-min-microvolt = <0xf4240>; - regulator-max-microvolt = <0xf4240>; - regulator-name = "vcc_1v0"; - phandle = <0xea>; - - regulator-state-mem { - regulator-off-in-suspend; - regulator-suspend-microvolt = <0xf4240>; - }; - }; - - LDO_REG2 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0x1b7740>; - regulator-max-microvolt = <0x1b7740>; - regulator-name = "vcc1v8_soc"; - phandle = <0x88>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <0x1b7740>; - }; - }; - - LDO_REG3 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0xf4240>; - regulator-max-microvolt = <0xf4240>; - regulator-name = "vcc1v0_soc"; - phandle = <0xeb>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <0xf4240>; - }; - }; - - LDO_REG4 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0x325aa0>; - regulator-max-microvolt = <0x325aa0>; - regulator-name = "vcc3v3_pmu"; - phandle = <0x29>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <0x325aa0>; - }; - }; - - LDO_REG5 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0x1b7740>; - regulator-max-microvolt = <0x1b7740>; - regulator-name = "vccio_sd"; - phandle = <0x4a>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <0x1b7740>; - }; - }; - - LDO_REG6 { - regulator-min-microvolt = <0x1b7740>; - regulator-max-microvolt = <0x2dc6c0>; - regulator-boot-on; - regulator-name = "vcc_sd"; - phandle = <0x93>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <0x2dc6c0>; - }; - }; - - LDO_REG7 { - regulator-min-microvolt = <0x325aa0>; - regulator-max-microvolt = <0x325aa0>; - regulator-name = "vcc_backlight"; - phandle = <0x9e>; - - regulator-state-mem { - regulator-off-in-suspend; - regulator-suspend-microvolt = <0x325aa0>; - }; - }; - - LDO_REG8 { - regulator-min-microvolt = <0x2ab980>; - regulator-max-microvolt = <0x2ab980>; - regulator-name = "vcc_lcd"; - phandle = <0x9f>; - - regulator-state-mem { - regulator-off-in-suspend; - regulator-suspend-microvolt = <0x2ab980>; - }; - }; - - BOOST { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0x4c4b40>; - regulator-max-microvolt = <0x5265c0>; - regulator-name = "boost"; - phandle = <0x65>; - }; - - OTG_SWITCH { - regulator-boot-on; - regulator-name = "otg_switch"; - phandle = <0xec>; - }; - }; - - battery { - compatible = "rk817,battery"; - ocv_table = <0xc5d 0xc94 0xcd0 0xd02 0xd34 0xd66 0xd98 0xdca 0xdfc 0xe2e 0xe56 0xe7e 0xea6 0xece 0xef6 0xf1e 0xf46 0xf6e 0xf96 0xf9b 0xfa0>; - design_capacity = <0xd34>; - design_qmax = <0xe86>; - bat_res = <0x64>; - sleep_enter_current = <0x12c>; - sleep_exit_current = <0x12c>; - sleep_filter_current = <0x64>; - power_off_thresd = <0xbb8>; - zero_algorithm_vol = <0xf0a>; - max_soc_offset = <0x3c>; - monitor_sec = <0x05>; - virtual_power = <0x00>; - sample_res = <0x0a>; - }; - - charger { - compatible = "rk817,charger"; - min_input_voltage = <0x1194>; - max_input_current = <0x5dc>; - max_chrg_current = <0x7d0>; - max_chrg_voltage = <0x1068>; - chrg_term_mode = <0x00>; - chrg_finish_cur = <0x34>; - virtual_power = <0x00>; - sample_res = <0x0a>; - dc_det_gpio = <0x5c 0x0b 0x00>; - bat_low_gpio = <0x66 0x0d 0x00>; - extcon = <0x67>; - }; - - codec { - #sound-dai-cells = <0x00>; - compatible = "rockchip,rk817-codec"; - clocks = <0x02 0x15>; - clock-names = "mclk"; - pinctrl-names = "default"; - pinctrl-0 = <0x68>; - hp-volume = <0x14>; - spk-volume = <0x03>; - status = "okay"; - phandle = <0xc3>; - }; - }; - }; - - i2c@ff190000 { - compatible = "rockchip,rk3399-i2c"; - reg = <0x00 0xff190000 0x00 0x1000>; - clocks = <0x02 0x1e 0x02 0x14f>; - clock-names = "i2c\0pclk"; - interrupts = <0x00 0x08 0x04>; - pinctrl-names = "default"; - pinctrl-0 = <0x69>; - #address-cells = <0x01>; - #size-cells = <0x00>; - status = "okay"; - clock-frequency = <0x61a80>; - phandle = <0xed>; - }; - - i2c@ff1a0000 { - compatible = "rockchip,rk3399-i2c"; - reg = <0x00 0xff1a0000 0x00 0x1000>; - clocks = <0x02 0x1f 0x02 0x150>; - clock-names = "i2c\0pclk"; - interrupts = <0x00 0x09 0x04>; - pinctrl-names = "default"; - pinctrl-0 = <0x6a>; - #address-cells = <0x01>; - #size-cells = <0x00>; - status = "disabled"; - phandle = <0xee>; - }; - - i2c@ff1b0000 { - compatible = "rockchip,rk3399-i2c"; - reg = <0x00 0xff1b0000 0x00 0x1000>; - clocks = <0x02 0x20 0x02 0x151>; - clock-names = "i2c\0pclk"; - interrupts = <0x00 0x0a 0x04>; - pinctrl-names = "default"; - pinctrl-0 = <0x6b>; - #address-cells = <0x01>; - #size-cells = <0x00>; - status = "disabled"; - phandle = <0xef>; - }; - - spi@ff1d0000 { - compatible = "rockchip,px30-spi\0rockchip,rk3066-spi"; - reg = <0x00 0xff1d0000 0x00 0x1000>; - interrupts = <0x00 0x1a 0x04>; - #address-cells = <0x01>; - #size-cells = <0x00>; - clocks = <0x02 0x24 0x02 0x155>; - clock-names = "spiclk\0apb_pclk"; - dmas = <0x2b 0x0c 0x2b 0x0d>; - dma-names = "tx\0rx"; - pinctrl-names = "default\0high_speed"; - pinctrl-0 = <0x6c 0x6d 0x6e 0x6f>; - pinctrl-1 = <0x70 0x6d 0x71 0x72>; - status = "disabled"; - phandle = <0xf0>; - }; - - spi@ff1d8000 { - compatible = "rockchip,px30-spi\0rockchip,rk3066-spi"; - reg = <0x00 0xff1d8000 0x00 0x1000>; - interrupts = <0x00 0x1b 0x04>; - #address-cells = <0x01>; - #size-cells = <0x00>; - clocks = <0x02 0x25 0x02 0x156>; - clock-names = "spiclk\0apb_pclk"; - dmas = <0x2b 0x0e 0x2b 0x0f>; - dma-names = "tx\0rx"; - pinctrl-names = "default\0high_speed"; - pinctrl-0 = <0x73 0x74 0x75 0x76 0x77>; - pinctrl-1 = <0x78 0x74 0x75 0x79 0x7a>; - status = "disabled"; - phandle = <0xf1>; - }; - - watchdog@ff1e0000 { - compatible = "snps,dw-wdt"; - reg = <0x00 0xff1e0000 0x00 0x100>; - clocks = <0x02 0x15b>; - interrupts = <0x00 0x25 0x04>; - resets = <0x02 0xb5>; - reset-names = "reset"; - status = "disabled"; - phandle = <0xf2>; - }; - - pwm@ff200000 { - compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm"; - reg = <0x00 0xff200000 0x00 0x10>; - #pwm-cells = <0x03>; - pinctrl-names = "active"; - pinctrl-0 = <0x7b>; - clocks = <0x02 0x22 0x02 0x153>; - clock-names = "pwm\0pclk"; - status = "okay"; - phandle = <0xbc>; - }; - - pwm@ff200010 { - compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm"; - reg = <0x00 0xff200010 0x00 0x10>; - #pwm-cells = <0x03>; - pinctrl-names = "active"; - pinctrl-0 = <0x7c>; - clocks = <0x02 0x22 0x02 0x153>; - clock-names = "pwm\0pclk"; - status = "okay"; - phandle = <0xc1>; - }; - - pwm@ff200020 { - compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm"; - reg = <0x00 0xff200020 0x00 0x10>; - #pwm-cells = <0x03>; - pinctrl-names = "active"; - pinctrl-0 = <0x7d>; - clocks = <0x02 0x22 0x02 0x153>; - clock-names = "pwm\0pclk"; - status = "disabled"; - phandle = <0xf3>; - }; - - pwm@ff200030 { - compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm"; - reg = <0x00 0xff200030 0x00 0x10>; - #pwm-cells = <0x03>; - pinctrl-names = "active"; - pinctrl-0 = <0x7e>; - clocks = <0x02 0x22 0x02 0x153>; - clock-names = "pwm\0pclk"; - status = "disabled"; - phandle = <0xf4>; - }; - - pwm@ff208000 { - compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm"; - reg = <0x00 0xff208000 0x00 0x10>; - #pwm-cells = <0x03>; - pinctrl-names = "active"; - pinctrl-0 = <0x7f>; - clocks = <0x02 0x23 0x02 0x154>; - clock-names = "pwm\0pclk"; - status = "disabled"; - phandle = <0xf5>; - }; - - pwm@ff208010 { - compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm"; - reg = <0x00 0xff208010 0x00 0x10>; - #pwm-cells = <0x03>; - pinctrl-names = "active"; - pinctrl-0 = <0x80>; - clocks = <0x02 0x23 0x02 0x154>; - clock-names = "pwm\0pclk"; - status = "disabled"; - phandle = <0xf6>; - }; - - pwm@ff208020 { - compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm"; - reg = <0x00 0xff208020 0x00 0x10>; - #pwm-cells = <0x03>; - pinctrl-names = "active"; - pinctrl-0 = <0x81>; - clocks = <0x02 0x23 0x02 0x154>; - clock-names = "pwm\0pclk"; - status = "disabled"; - phandle = <0xf7>; - }; - - pwm@ff208030 { - compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm"; - reg = <0x00 0xff208030 0x00 0x10>; - #pwm-cells = <0x03>; - pinctrl-names = "active"; - pinctrl-0 = <0x82>; - clocks = <0x02 0x23 0x02 0x154>; - clock-names = "pwm\0pclk"; - status = "disabled"; - phandle = <0xf8>; - }; - - rktimer@ff210000 { - compatible = "rockchip,rk3288-timer"; - reg = <0x00 0xff210000 0x00 0x1000>; - interrupts = <0x00 0x1e 0x04>; - clocks = <0x02 0x159 0x02 0x26>; - clock-names = "pclk\0timer"; - phandle = <0xf9>; - }; - - amba { - compatible = "simple-bus"; - #address-cells = <0x02>; - #size-cells = <0x02>; - ranges; - - dmac@ff240000 { - compatible = "arm,pl330\0arm,primecell"; - reg = <0x00 0xff240000 0x00 0x4000>; - interrupts = <0x00 0x01 0x04 0x00 0x02 0x04>; - clocks = <0x02 0xbb>; - clock-names = "apb_pclk"; - #dma-cells = <0x01>; - peripherals-req-type-burst; - phandle = <0x2b>; - }; - }; - - thermal-zones { - phandle = <0xfa>; - - soc-thermal { - polling-delay-passive = <0x14>; - polling-delay = <0x3e8>; - sustainable-power = <0x2ee>; - thermal-sensors = <0x83 0x00>; - phandle = <0xfb>; - - trips { - - trip-point-0 { - temperature = <0x11170>; - hysteresis = <0x7d0>; - type = "passive"; - phandle = <0xfc>; - }; - - trip-point-1 { - temperature = <0x14c08>; - hysteresis = <0x7d0>; - type = "passive"; - phandle = <0x84>; - }; - - soc-crit { - temperature = <0x1c138>; - hysteresis = <0x7d0>; - type = "critical"; - phandle = <0xfd>; - }; - }; - - cooling-maps { - - map0 { - trip = <0x84>; - cooling-device = <0x09 0xffffffff 0xffffffff>; - contribution = <0x1000>; - }; - - map1 { - trip = <0x84>; - cooling-device = <0x85 0xffffffff 0xffffffff>; - contribution = <0x1000>; - }; - }; - }; - - gpu-thermal { - polling-delay-passive = <0x64>; - polling-delay = <0x3e8>; - thermal-sensors = <0x83 0x01>; - phandle = <0xfe>; - }; - }; - - tsadc@ff280000 { - compatible = "rockchip,px30-tsadc"; - reg = <0x00 0xff280000 0x00 0x100>; - interrupts = <0x00 0x24 0x04>; - rockchip,grf = <0x2f>; - clocks = <0x02 0x2c 0x02 0x158>; - clock-names = "tsadc\0apb_pclk"; - assigned-clocks = <0x02 0x2c>; - assigned-clock-rates = <0xc350>; - resets = <0x02 0xa8>; - reset-names = "tsadc-apb"; - #thermal-sensor-cells = <0x01>; - rockchip,hw-tshut-temp = <0x1d4c0>; - status = "okay"; - pinctrl-names = "gpio\0otpout"; - pinctrl-0 = <0x86>; - pinctrl-1 = <0x87>; - phandle = <0x83>; - }; - - saradc@ff288000 { - compatible = "rockchip,px30-saradc\0rockchip,rk3399-saradc"; - reg = <0x00 0xff288000 0x00 0x100>; - interrupts = <0x00 0x54 0x04>; - #io-channel-cells = <0x01>; - clocks = <0x02 0x2d 0x02 0x157>; - clock-names = "saradc\0apb_pclk"; - resets = <0x02 0xa5>; - reset-names = "saradc-apb"; - status = "okay"; - vref-supply = <0x88>; - phandle = <0xbe>; - }; - - otp@ff290000 { - compatible = "rockchip,px30-otp"; - reg = <0x00 0xff290000 0x00 0x4000>; - #address-cells = <0x01>; - #size-cells = <0x01>; - clocks = <0x02 0x2f 0x02 0x15a 0x02 0x161>; - clock-names = "clk_otp\0pclk_otp\0pclk_otp_phy"; - resets = <0x02 0xb4>; - reset-names = "otp_phy"; - phandle = <0xff>; - - id@7 { - reg = <0x07 0x10>; - phandle = <0x0f>; - }; - - cpu-leakage@17 { - reg = <0x17 0x01>; - phandle = <0x07>; - }; - - performance@1e { - reg = <0x1e 0x01>; - bits = <0x04 0x03>; - phandle = <0x08>; - }; - }; - - clock-controller@ff2b0000 { - compatible = "rockchip,px30-cru"; - reg = <0x00 0xff2b0000 0x00 0x1000>; - rockchip,grf = <0x2f>; - rockchip,boost = <0x89>; - #clock-cells = <0x01>; - #reset-cells = <0x01>; - assigned-clocks = <0x02 0x04>; - assigned-clock-rates = <0x3dfd2400>; - phandle = <0x02>; - }; - - cpu-boost@ff2b8000 { - compatible = "syscon"; - reg = <0x00 0xff2b8000 0x00 0x1000>; - rockchip,boost-low-con0 = <0x1032>; - rockchip,boost-low-con1 = <0x1441>; - rockchip,boost-high-con0 = <0x1036>; - rockchip,boost-high-con1 = <0x1441>; - rockchip,boost-backup-pll = <0x01>; - rockchip,boost-backup-pll-usage = <0x00>; - rockchip,boost-switch-threshold = <0x249f00>; - rockchip,boost-statis-threshold = <0x100>; - rockchip,boost-statis-enable = <0x00>; - rockchip,boost-enable = <0x00>; - phandle = <0x89>; - }; - - pmu-clock-controller@ff2bc000 { - compatible = "rockchip,px30-pmucru"; - reg = <0x00 0xff2bc000 0x00 0x1000>; - rockchip,grf = <0x2f>; - #clock-cells = <0x01>; - #reset-cells = <0x01>; - assigned-clocks = <0x2a 0x01 0x2a 0x08 0x2a 0x05 0x02 0x07 0x02 0xab 0x02 0xb0 0x02 0xf0 0x02 0xf5 0x02 0x140 0x02 0x49>; - assigned-clock-rates = <0x47868c00 0x5f5e100 0x18cba80 0x23c34600 0xbebc200 0xbebc200 0x8f0d180 0x8f0d180 0x5f5e100 0xbebc200>; - phandle = <0x2a>; - }; - - syscon@ff2c0000 { - compatible = "rockchip,px30-usb2phy-grf\0syscon\0simple-mfd"; - reg = <0x00 0xff2c0000 0x00 0x10000>; - #address-cells = <0x01>; - #size-cells = <0x01>; - phandle = <0x100>; - - usb2-phy@100 { - compatible = "rockchip,px30-usb2phy\0rockchip,rk3328-usb2phy"; - reg = <0x100 0x10>; - clocks = <0x2a 0x0a>; - clock-names = "phyclk"; - #clock-cells = <0x00>; - assigned-clocks = <0x02 0x0e 0x02 0x55>; - assigned-clock-parents = <0x67 0x02 0x0e>; - clock-output-names = "usb480m_phy"; - status = "okay"; - phandle = <0x67>; - - host-port { - #phy-cells = <0x00>; - interrupts = <0x00 0x44 0x04>; - interrupt-names = "linestate"; - status = "okay"; - phandle = <0x8c>; - }; - - otg-port { - #phy-cells = <0x00>; - interrupts = <0x00 0x42 0x04 0x00 0x41 0x04 0x00 0x40 0x04>; - interrupt-names = "otg-bvalid\0otg-id\0linestate"; - status = "disabled"; - phandle = <0x8b>; - }; - }; - }; - - video-phy@ff2e0000 { - compatible = "rockchip,px30-video-phy"; - reg = <0x00 0xff2e0000 0x00 0x10000 0x00 0xff450000 0x00 0x10000>; - clocks = <0x2a 0x0b 0x02 0x145 0x02 0x144>; - clock-names = "ref\0pclk_phy\0pclk_host"; - #clock-cells = <0x00>; - resets = <0x02 0x3e>; - reset-names = "rst"; - power-domains = <0x8a 0x0c>; - #phy-cells = <0x00>; - status = "okay"; - phandle = <0x4c>; - }; - - mipi-dphy-rx0@ff2f0000 { - compatible = "rockchip,rk3326-mipi-dphy"; - reg = <0x00 0xff2f0000 0x00 0x4000>; - clocks = <0x02 0x146>; - clock-names = "dphy-ref"; - power-domains = <0x8a 0x0d>; - rockchip,grf = <0x2f>; - status = "okay"; - phandle = <0x101>; - }; - - usb@ff300000 { - compatible = "rockchip,px30-usb\0rockchip,rk3066-usb\0snps,dwc2"; - reg = <0x00 0xff300000 0x00 0x40000>; - interrupts = <0x00 0x3e 0x04>; - clocks = <0x02 0x102>; - clock-names = "otg"; - power-domains = <0x8a 0x05>; - dr_mode = "otg"; - g-np-tx-fifo-size = <0x10>; - g-rx-fifo-size = <0x118>; - g-tx-fifo-size = <0x100 0x80 0x80 0x40 0x20 0x10>; - g-use-dma; - phys = <0x8b>; - phy-names = "usb2-phy"; - status = "okay"; - phandle = <0x102>; - }; - - usb@ff340000 { - compatible = "generic-ehci"; - reg = <0x00 0xff340000 0x00 0x10000>; - interrupts = <0x00 0x3c 0x04>; - clocks = <0x02 0x103 0x67>; - clock-names = "usbhost\0utmi"; - power-domains = <0x8a 0x05>; - phys = <0x8c>; - phy-names = "usb"; - status = "disabled"; - phandle = <0x103>; - }; - - usb@ff350000 { - compatible = "generic-ohci"; - reg = <0x00 0xff350000 0x00 0x10000>; - interrupts = <0x00 0x3d 0x04>; - clocks = <0x02 0x103 0x67>; - clock-names = "usbhost\0utmi"; - power-domains = <0x8a 0x05>; - phys = <0x8c>; - phy-names = "usb"; - status = "disabled"; - phandle = <0x104>; - }; - - ethernet@ff360000 { - compatible = "rockchip,px30-gmac"; - reg = <0x00 0xff360000 0x00 0x10000>; - rockchip,grf = <0x2f>; - interrupts = <0x00 0x2b 0x04>; - interrupt-names = "macirq"; - clocks = <0x02 0x3e 0x02 0x3f 0x02 0x3f 0x02 0x40 0x02 0x41 0x02 0xb2 0x02 0x143 0x02 0x4c>; - clock-names = "stmmaceth\0mac_clk_rx\0mac_clk_tx\0clk_mac_ref\0clk_mac_refout\0aclk_mac\0pclk_mac\0clk_mac_speed"; - phy-mode = "rmii"; - pinctrl-names = "default"; - pinctrl-0 = <0x8d 0x8e>; - resets = <0x02 0x5e>; - reset-names = "stmmaceth"; - power-domains = <0x8a 0x09>; - status = "disabled"; - phandle = <0x105>; - }; - - dwmmc@ff370000 { - compatible = "rockchip,px30-dw-mshc\0rockchip,rk3288-dw-mshc"; - reg = <0x00 0xff370000 0x00 0x4000>; - max-frequency = <0x8f0d180>; - clocks = <0x02 0xf7 0x02 0x3b 0x02 0x43 0x02 0x44>; - clock-names = "biu\0ciu\0ciu-drv\0ciu-sample"; - assigned-clocks = <0x02 0x3b>; - assigned-clock-parents = <0x02 0x57>; - power-domains = <0x8a 0x07>; - fifo-depth = <0x100>; - interrupts = <0x00 0x36 0x04>; - pinctrl-names = "default"; - pinctrl-0 = <0x8f 0x90 0x91 0x92>; - status = "okay"; - bus-width = <0x04>; - cap-mmc-highspeed; - cap-sd-highspeed; - supports-sd; - card-detect-delay = <0x320>; - ignore-pm-notify; - cd-gpios = <0x5c 0x03 0x01>; - sd-uhs-sdr12; - sd-uhs-sdr25; - sd-uhs-sdr50; - sd-uhs-sdr104; - vqmmc-supply = <0x4a>; - vmmc-supply = <0x93>; - phandle = <0x106>; - }; - - dwmmc@ff380000 { - compatible = "rockchip,px30-dw-mshc\0rockchip,rk3288-dw-mshc"; - reg = <0x00 0xff380000 0x00 0x4000>; - max-frequency = <0x8f0d180>; - clocks = <0x02 0xff 0x02 0x38 0x02 0x45 0x02 0x46>; - clock-names = "biu\0ciu\0ciu-drv\0ciu-sample"; - assigned-clocks = <0x02 0x38>; - assigned-clock-parents = <0x02 0x51>; - power-domains = <0x8a 0x0a>; - fifo-depth = <0x100>; - interrupts = <0x00 0x37 0x04>; - pinctrl-names = "default"; - pinctrl-0 = <0x94 0x95 0x96>; - status = "okay"; - bus-width = <0x04>; - cap-mmc-highspeed; - cap-sd-highspeed; - supports-sd; - card-detect-delay = <0x320>; - ignore-pm-notify; - cd-gpios = <0x97 0x0e 0x01>; - sd-uhs-sdr12; - sd-uhs-sdr25; - sd-uhs-sdr50; - sd-uhs-sdr104; - vqmmc-supply = <0x4a>; - vmmc-supply = <0x93>; - phandle = <0x107>; - }; - - dwmmc@ff390000 { - compatible = "rockchip,px30-dw-mshc\0rockchip,rk3288-dw-mshc"; - reg = <0x00 0xff390000 0x00 0x4000>; - max-frequency = <0x8f0d180>; - clocks = <0x02 0x100 0x02 0x39 0x02 0x47 0x02 0x48>; - clock-names = "biu\0ciu\0ciu-drv\0ciu-sample"; - assigned-clocks = <0x02 0x39>; - assigned-clock-parents = <0x02 0x53>; - power-domains = <0x8a 0x0a>; - fifo-depth = <0x100>; - interrupts = <0x00 0x35 0x04>; - status = "disabled"; - phandle = <0x108>; - }; - - nandc@ff3b0000 { - compatible = "rockchip,rk-nandc"; - reg = <0x00 0xff3b0000 0x00 0x4000>; - interrupts = <0x00 0x39 0x04>; - nandc_id = <0x00>; - clocks = <0x02 0x37 0x02 0xfe>; - clock-names = "clk_nandc\0hclk_nandc"; - assigned-clocks = <0x02 0x37>; - assigned-clock-parents = <0x02 0x4f>; - power-domains = <0x8a 0x0a>; - status = "disabled"; - phandle = <0x109>; - }; - - sfc@ff3a0000 { - compatible = "rockchip,sfc"; - reg = <0x00 0xff3a0000 0x00 0x4000>; - interrupts = <0x00 0x38 0x04>; - clocks = <0x02 0x3a 0x02 0x101>; - clock-names = "clk_sfc\0hclk_sfc"; - assigned-clocks = <0x02 0x3a>; - assigned-clock-rates = <0x989680>; - status = "disabled"; - phandle = <0x10a>; - }; - - gpu@ff400000 { - compatible = "arm,malit602\0arm,malit60x\0arm,malit6xx\0arm,mali-midgard"; - reg = <0x00 0xff400000 0x00 0x4000>; - interrupts = <0x00 0x2d 0x04 0x00 0x2e 0x04 0x00 0x2f 0x04>; - interrupt-names = "GPU\0MMU\0JOB"; - clocks = <0x02 0x49>; - clock-names = "clk_mali"; - power-domains = <0x8a 0x0e>; - #cooling-cells = <0x02>; - operating-points-v2 = <0x98>; - status = "okay"; - mali-supply = <0x0e>; - phandle = <0x85>; - - power_model { - compatible = "arm,mali-simple-power-model"; - static-coefficient = <0x64578>; - dynamic-coefficient = <0x2dd>; - ts = <0x7d00 0x125c 0xffffffb0 0x02>; - thermal-zone = "gpu-thermal"; - }; - }; - - gpu-opp-table { - compatible = "operating-points-v2"; - rockchip,thermal-zone = "soc-thermal"; - rockchip,temp-hysteresis = <0x1388>; - rockchip,low-temp = <0x00>; - rockchip,low-temp-min-volt = <0xf4240>; - rockchip,low-temp-adjust-volt = <0x00 0x1e0 0xc350>; - rockchip,max-volt = <0x11edd8>; - rockchip,evb-irdrop = <0x61a8>; - rockchip,pvtm-voltage-sel = <0x00 0xc350 0x00 0xc351 0xd2f0 0x01 0xd2f1 0xea60 0x02 0xea61 0x1869f 0x03>; - rockchip,pvtm-ch = <0x00 0x00>; - phandle = <0x98>; - - opp-400000000 { - opp-hz = <0x00 0x17d78400>; - opp-microvolt = <0x100590>; - opp-microvolt-L0 = <0x100590>; - opp-microvolt-L1 = <0xfa3e8>; - opp-microvolt-L2 = <0xee098>; - opp-microvolt-L3 = <0xe7ef0>; - }; - - opp-480000000 { - opp-hz = <0x00 0x1c9c3800>; - opp-microvolt = <0x112a88>; - opp-microvolt-L0 = <0x112a88>; - opp-microvolt-L1 = <0x10c8e0>; - opp-microvolt-L2 = <0x100590>; - opp-microvolt-L3 = <0xf4240>; - }; - - opp-520000000 { - opp-hz = <0x00 0x1efe9200>; - opp-microvolt = <0x118c30>; - opp-microvolt-L0 = <0x118c30>; - opp-microvolt-L1 = <0x118c30>; - opp-microvolt-L2 = <0x10c8e0>; - opp-microvolt-L3 = <0x100590>; - }; - }; - - hevc_service@ff440000 { - compatible = "rockchip,hevc_sub"; - iommu_enabled = <0x01>; - reg = <0x00 0xff440000 0x00 0x400>; - interrupts = <0x00 0x31 0x04>; - interrupt-names = "irq_dec"; - dev_mode = <0x01>; - iommus = <0x99>; - allocator = <0x01>; - phandle = <0x9c>; - }; - - vpu_service@ff442000 { - compatible = "rockchip,vpu_sub"; - iommu_enabled = <0x01>; - reg = <0x00 0xff442000 0x00 0x800>; - interrupts = <0x00 0x50 0x04 0x00 0x4f 0x04>; - interrupt-names = "irq_enc\0irq_dec"; - dev_mode = <0x00>; - iommus = <0x9a>; - allocator = <0x01>; - phandle = <0x9b>; - }; - - vpu_combo { - compatible = "rockchip,vpu_combo"; - subcnt = <0x02>; - rockchip,grf = <0x2f>; - rockchip,sub = <0x9b 0x9c>; - clocks = <0x02 0xaf 0x02 0xf4 0x02 0x4b>; - clock-names = "aclk_vcodec\0hclk_vcodec\0clk_core"; - resets = <0x02 0x24 0x02 0x26 0x02 0x25 0x02 0x27 0x02 0x3f>; - reset-names = "video_a\0video_h\0niu_a\0niu_h\0video_core"; - power-domains = <0x8a 0x0b>; - mode_bit = <0x0f>; - mode_ctrl = <0x410>; - status = "okay"; - phandle = <0x10b>; - }; - - iommu@ff440440 { - compatible = "rockchip,iommu"; - reg = <0x00 0xff440440 0x00 0x40 0x00 0xff440480 0x00 0x40>; - interrupts = <0x00 0x32 0x04>; - interrupt-names = "hevc_mmu"; - clocks = <0x02 0xaf 0x02 0xf4>; - clock-names = "aclk\0hclk"; - power-domains = <0x8a 0x0b>; - #iommu-cells = <0x00>; - phandle = <0x99>; - }; - - iommu@ff442800 { - compatible = "rockchip,iommu"; - reg = <0x00 0xff442800 0x00 0x100>; - interrupts = <0x00 0x51 0x04>; - interrupt-names = "vpu_mmu"; - clocks = <0x02 0xaf 0x02 0xf4>; - clock-names = "aclk\0hclk"; - power-domains = <0x8a 0x0b>; - #iommu-cells = <0x00>; - phandle = <0x9a>; - }; - - dsi@ff450000 { - compatible = "rockchip,px30-mipi-dsi"; - reg = <0x00 0xff450000 0x00 0x10000>; - interrupts = <0x00 0x4b 0x04>; - clocks = <0x02 0x144 0x4c>; - clock-names = "pclk\0hs_clk"; - resets = <0x02 0x3d>; - reset-names = "apb"; - phys = <0x4c>; - phy-names = "mipi_dphy"; - power-domains = <0x8a 0x0c>; - rockchip,grf = <0x2f>; - #address-cells = <0x01>; - #size-cells = <0x00>; - status = "okay"; - phandle = <0x10c>; - - ports { - #address-cells = <0x01>; - #size-cells = <0x00>; - - port@0 { - reg = <0x00>; - #address-cells = <0x01>; - #size-cells = <0x00>; - - endpoint@0 { - reg = <0x00>; - remote-endpoint = <0x13>; - status = "okay"; - phandle = <0xa3>; - }; - }; - }; - - panel@0 { - compatible = "elida,kd35t133\0simple-panel-dsi"; - reg = <0x00>; - backlight = <0x9d>; - backlight-supply = <0x9e>; - power-supply = <0x9f>; - reset-gpios = <0x97 0x10 0x01>; - reset-delay-ms = <0x96>; - init-delay-ms = <0x14>; - enable-delay-ms = <0x78>; - prepare-delay-ms = <0x14>; - unprepare-delay-ms = <0x14>; - disable-delay-ms = <0x32>; - width-mm = <0x34>; - height-mm = <0x46>; - dsi,flags = <0xa03>; - dsi,format = <0x00>; - dsi,lanes = <0x04>; - panel-init-sequence = [15 00 02 ff 30 15 00 02 ff 52 15 00 02 ff 01 15 00 02 e3 00 15 00 02 25 10 15 00 02 28 6f 15 00 02 29 01 15 00 02 2a df 15 00 02 2c 22 15 00 02 c3 0f 15 00 02 37 9c 15 00 02 38 a7 15 00 02 39 41 15 00 02 80 20 15 00 02 91 67 15 00 02 92 67 15 00 02 a0 55 15 00 02 a1 50 15 00 02 a3 58 15 00 02 a4 9c 15 00 02 a7 02 15 00 02 a8 01 15 00 02 a9 21 15 00 02 aa fc 15 00 02 ab 28 15 00 02 ac 06 15 00 02 ad 06 15 00 02 ae 06 15 00 02 af 03 15 00 02 b0 08 15 00 02 b1 26 15 00 02 b2 28 15 00 02 b3 28 15 00 02 b4 03 15 00 02 b5 08 15 00 02 b6 26 15 00 02 b7 08 15 00 02 b8 26 15 00 02 2c 22 15 00 02 5c 40 15 00 02 c0 00 15 00 02 c1 00 15 00 02 c2 00 15 00 02 ff 30 15 00 02 ff 52 15 00 02 ff 02 15 00 02 b0 02 15 00 02 d0 02 15 00 02 b1 0f 15 00 02 d1 10 15 00 02 b2 11 15 00 02 d2 12 15 00 02 b3 32 15 00 02 d3 33 15 00 02 b4 36 15 00 02 d4 36 15 00 02 b5 3c 15 00 02 d5 3c 15 00 02 b6 20 15 00 02 d6 20 15 00 02 b7 3e 15 00 02 d7 3e 15 00 02 b8 0e 15 00 02 d8 0d 15 00 02 b9 05 15 00 02 d9 05 15 00 02 ba 11 15 00 02 da 12 15 00 02 bb 11 15 00 02 db 11 15 00 02 bc 13 15 00 02 dc 14 15 00 02 bd 14 15 00 02 dd 14 15 00 02 be 16 15 00 02 de 18 15 00 02 bf 0e 15 00 02 df 0f 15 00 02 c0 17 15 00 02 e0 17 15 00 02 c1 07 15 00 02 e1 08 15 00 02 ff 30 15 00 02 ff 52 15 00 02 ff 03 15 00 02 08 8a 15 00 02 09 8b 15 00 02 30 00 15 00 02 31 00 15 00 02 32 00 15 00 02 33 00 15 00 02 34 61 15 00 02 35 d4 15 00 02 36 24 15 00 02 37 03 15 00 02 40 86 15 00 02 41 87 15 00 02 42 84 15 00 02 43 85 15 00 02 44 11 15 00 02 45 de 15 00 02 46 dd 15 00 02 47 11 15 00 02 48 e0 15 00 02 49 df 15 00 02 50 82 15 00 02 51 83 15 00 02 52 80 15 00 02 53 81 15 00 02 54 11 15 00 02 55 e2 15 00 02 56 e1 15 00 02 57 11 15 00 02 58 e4 15 00 02 59 e3 15 00 02 82 0f 15 00 02 83 0f 15 00 02 84 00 15 00 02 85 0f 15 00 02 86 0f 15 00 02 87 0e 15 00 02 88 0e 15 00 02 89 06 15 00 02 8a 06 15 00 02 8b 07 15 00 02 8c 07 15 00 02 8d 04 15 00 02 8e 04 15 00 02 8f 05 15 00 02 90 05 15 00 02 98 0f 15 00 02 99 0f 15 00 02 9a 00 15 00 02 9b 0f 15 00 02 9c 0f 15 00 02 9d 0e 15 00 02 9e 0e 15 00 02 9f 06 15 00 02 a0 06 15 00 02 a1 07 15 00 02 a2 07 15 00 02 a3 04 15 00 02 a4 04 15 00 02 a5 05 15 00 02 a6 05 15 00 02 e0 02 15 00 02 e1 52 15 00 02 ff 30 15 00 02 ff 52 15 00 02 ff 00 15 00 02 36 02 15 00 02 11 00 15 00 02 29 00 05 c8 01 11 05 14 01 29]; - panel-exit-sequence = <0x5140128 0x50a0110>; - - display-timings { - native-mode = <0xa0>; - - 60Hz { - clock-frequency = <0x1ba8140>; - hactive = <0x280>; - vactive = <0x1e0>; - hfront-porch = <0x2e>; - hsync-len = <0x02>; - hback-porch = <0x2c>; - vfront-porch = <0xa5>; - vsync-len = <0x02>; - vback-porch = <0x0e>; - hsync-active = <0x00>; - vsync-active = <0x00>; - de-active = <0x00>; - pixelclk-active = <0x01>; - phandle = <0xaa1>; - }; - - 50Hz { - clock-frequency = <0x1ba8140>; - hactive = <0x280>; - vactive = <0x1e0>; - hfront-porch = <0x2e>; - hsync-len = <0x02>; - hback-porch = <0x2c>; - vfront-porch = <0x10>; - vsync-len = <0x02>; - vback-porch = <0x0e>; - hsync-active = <0x00>; - vsync-active = <0x00>; - de-active = <0x00>; - pixelclk-active = <0x01>; - phandle = <0xa00>; - }; - - 75Hz { - clock-frequency = <0x1ba8140>; - hactive = <0x280>; - vactive = <0x1e0>; - hfront-porch = <0x2e>; - hsync-len = <0x02>; - hback-porch = <0x2c>; - vfront-porch = <0x10>; - vsync-len = <0x02>; - vback-porch = <0x0e>; - hsync-active = <0x00>; - vsync-active = <0x00>; - de-active = <0x00>; - pixelclk-active = <0x01>; - phandle = <0xa01>; - }; - }; - }; - }; - - vop@ff460000 { - compatible = "rockchip,px30-vop-big"; - reg = <0x00 0xff460000 0x00 0x1fc 0x00 0xff460a00 0x00 0x400>; - rockchip,grf = <0x2f>; - reg-names = "regs\0gamma_lut"; - interrupts = <0x00 0x4d 0x04>; - clocks = <0x02 0xb5 0x02 0x96 0x02 0xfb>; - clock-names = "aclk_vop\0dclk_vop\0hclk_vop"; - power-domains = <0x8a 0x0c>; - iommus = <0xa1>; - status = "okay"; - phandle = <0x10f>; - - port { - #address-cells = <0x01>; - #size-cells = <0x00>; - phandle = <0x10>; - - endpoint@0 { - reg = <0x00>; - remote-endpoint = <0xa2>; - phandle = <0x12>; - }; - - endpoint@1 { - reg = <0x01>; - remote-endpoint = <0xa3>; - phandle = <0x13>; - }; - - endpoint@2 { - reg = <0x02>; - remote-endpoint = <0xa4>; - phandle = <0x14>; - }; - }; - }; - - iommu@ff460f00 { - compatible = "rockchip,iommu"; - reg = <0x00 0xff460f00 0x00 0x100>; - interrupts = <0x00 0x4d 0x04>; - interrupt-names = "vopb_mmu"; - clocks = <0x02 0xb5 0x02 0xfb>; - clock-names = "aclk\0hclk"; - power-domains = <0x8a 0x0c>; - #iommu-cells = <0x00>; - status = "okay"; - phandle = <0xa1>; - }; - - rk_rga@ff480000 { - compatible = "rockchip,rga2"; - reg = <0x00 0xff480000 0x00 0x1000>; - interrupts = <0x00 0x4c 0x04>; - clocks = <0x02 0xb7 0x02 0xfd 0x02 0x35>; - clock-names = "aclk_rga\0hclk_rga\0clk_rga"; - power-domains = <0x8a 0x0c>; - dma-coherent; - status = "okay"; - phandle = <0x110>; - }; - - cif@ff490000 { - compatible = "rockchip,cif"; - reg = <0x00 0xff490000 0x00 0x200>; - interrupts = <0x00 0x45 0x04>; - clocks = <0x02 0xb3 0x02 0xf9 0x02 0x160 0x02 0x34>; - clock-names = "aclk_cif0\0hclk_cif0\0pclk_cif\0cif0_out"; - resets = <0x02 0x2c 0x02 0x2d 0x02 0x2e>; - reset-names = "rst_cif_a\0rst_cif_h\0rst_cif_pclkin"; - power-domains = <0x8a 0x0d>; - pinctrl-names = "cif_pin_all"; - pinctrl-0 = <0xa5>; - iommus = <0xa6>; - status = "disabled"; - phandle = <0x111>; - }; - - cif-new@ff490000 { - compatible = "rockchip,px30-cif"; - reg = <0x00 0xff490000 0x00 0x200>; - interrupts = <0x00 0x45 0x04>; - clocks = <0x02 0xb3 0x02 0xf9 0x02 0x160 0x02 0x34>; - clock-names = "aclk_cif\0hclk_cif\0pclk_cif\0cif_out"; - resets = <0x02 0x2c 0x02 0x2d 0x02 0x2e>; - reset-names = "rst_cif_a\0rst_cif_h\0rst_cif_pclkin"; - power-domains = <0x8a 0x0d>; - iommus = <0xa6>; - status = "disabled"; - phandle = <0x112>; - }; - - iommu@ff490800 { - compatible = "rockchip,iommu"; - reg = <0x00 0xff490800 0x00 0x100>; - interrupts = <0x00 0x45 0x04>; - interrupt-names = "vip_mmu"; - clocks = <0x02 0xb3 0x02 0xf9>; - clock-names = "aclk\0hclk"; - power-domains = <0x8a 0x0d>; - rk_iommu,disable_reset_quirk; - #iommu-cells = <0x00>; - status = "okay"; - phandle = <0xa6>; - }; - - rk_isp@ff4a0000 { - compatible = "rockchip,px30-isp\0rockchip,isp"; - reg = <0x00 0xff4a0000 0x00 0x8000>; - interrupts = <0x00 0x46 0x04>; - clocks = <0x02 0xb4 0x02 0xfa 0x02 0x33 0x02 0x33 0x02 0x15f 0x02 0x34 0x02 0x34 0x02 0x146>; - clock-names = "aclk_isp\0hclk_isp\0clk_isp\0clk_isp_jpe\0pclkin_isp\0clk_cif_pll\0clk_cif_out\0pclk_dphyrx"; - resets = <0x02 0x2b 0x02 0x2f>; - reset-names = "rst_isp\0rst_mipicsiphy"; - power-domains = <0x8a 0x0d>; - pinctrl-names = "default\0isp_dvp8bit2\0isp_dvp10bit\0isp_dvp12bit"; - pinctrl-0 = <0xa7>; - pinctrl-1 = <0xa5>; - pinctrl-2 = <0xa5 0xa8>; - pinctrl-3 = <0xa9 0xa5 0xa8>; - rockchip,isp,mipiphy = <0x01>; - rockchip,isp,csiphy,reg = <0xff2f0000 0x4000>; - rockchip,grf = <0x2f>; - rockchip,cru = <0x02>; - rockchip,isp,iommu-enable = <0x01>; - iommus = <0xaa>; - status = "disabled"; - phandle = <0x113>; - }; - - rkisp1@ff4a0000 { - compatible = "rockchip,rk3326-rkisp1"; - reg = <0x00 0xff4a0000 0x00 0x8000>; - interrupts = <0x00 0x46 0x04 0x00 0x49 0x04 0x00 0x4a 0x04>; - interrupt-names = "isp_irq\0mi_irq\0mipi_irq"; - clocks = <0x02 0xb4 0x02 0xfa 0x02 0x33 0x02 0x15f>; - clock-names = "aclk_isp\0hclk_isp\0clk_isp\0pclk_isp"; - devfreq = <0xab>; - power-domains = <0x8a 0x0d>; - iommus = <0xaa>; - rockchip,grf = <0x2f>; - status = "okay"; - phandle = <0x114>; - }; - - iommu@ff4a8000 { - compatible = "rockchip,iommu"; - reg = <0x00 0xff4a8000 0x00 0x100>; - interrupts = <0x00 0x46 0x04>; - interrupt-names = "isp_mmu"; - clocks = <0x02 0xb4 0x02 0xfa>; - clock-names = "aclk\0hclk"; - power-domains = <0x8a 0x0d>; - rk_iommu,disable_reset_quirk; - #iommu-cells = <0x00>; - status = "okay"; - phandle = <0xaa>; - }; - - qos@ff518000 { - compatible = "syscon"; - reg = <0x00 0xff518000 0x00 0x20>; - phandle = <0x18>; - }; - - qos@ff520000 { - compatible = "syscon"; - reg = <0x00 0xff520000 0x00 0x20>; - phandle = <0x28>; - }; - - qos@ff52c000 { - compatible = "syscon"; - reg = <0x00 0xff52c000 0x00 0x20>; - phandle = <0x17>; - }; - - qos@ff538000 { - compatible = "syscon"; - reg = <0x00 0xff538000 0x00 0x20>; - phandle = <0x19>; - }; - - qos@ff538080 { - compatible = "syscon"; - reg = <0x00 0xff538080 0x00 0x20>; - phandle = <0x1a>; - }; - - qos@ff538100 { - compatible = "syscon"; - reg = <0x00 0xff538100 0x00 0x20>; - phandle = <0x1b>; - }; - - qos@ff538180 { - compatible = "syscon"; - reg = <0x00 0xff538180 0x00 0x20>; - phandle = <0x1c>; - }; - - qos@ff540000 { - compatible = "syscon"; - reg = <0x00 0xff540000 0x00 0x20>; - phandle = <0x15>; - }; - - qos@ff540080 { - compatible = "syscon"; - reg = <0x00 0xff540080 0x00 0x20>; - phandle = <0x16>; - }; - - qos@ff548000 { - compatible = "syscon"; - reg = <0x00 0xff548000 0x00 0x20>; - phandle = <0x23>; - }; - - qos@ff548080 { - compatible = "syscon"; - reg = <0x00 0xff548080 0x00 0x20>; - phandle = <0x24>; - }; - - qos@ff548100 { - compatible = "syscon"; - reg = <0x00 0xff548100 0x00 0x20>; - phandle = <0x25>; - }; - - qos@ff548180 { - compatible = "syscon"; - reg = <0x00 0xff548180 0x00 0x20>; - phandle = <0x26>; - }; - - qos@ff548200 { - compatible = "syscon"; - reg = <0x00 0xff548200 0x00 0x20>; - phandle = <0x27>; - }; - - qos@ff550000 { - compatible = "syscon"; - reg = <0x00 0xff550000 0x00 0x20>; - phandle = <0x1f>; - }; - - qos@ff550080 { - compatible = "syscon"; - reg = <0x00 0xff550080 0x00 0x20>; - phandle = <0x20>; - }; - - qos@ff550100 { - compatible = "syscon"; - reg = <0x00 0xff550100 0x00 0x20>; - phandle = <0x21>; - }; - - qos@ff550180 { - compatible = "syscon"; - reg = <0x00 0xff550180 0x00 0x20>; - phandle = <0x22>; - }; - - qos@ff558000 { - compatible = "syscon"; - reg = <0x00 0xff558000 0x00 0x20>; - phandle = <0x1d>; - }; - - qos@ff558080 { - compatible = "syscon"; - reg = <0x00 0xff558080 0x00 0x20>; - phandle = <0x1e>; - }; - - dfi@ff610000 { - reg = <0x00 0xff610000 0x00 0x400>; - compatible = "rockchip,px30-dfi"; - rockchip,pmugrf = <0xac>; - status = "okay"; - phandle = <0xad>; - }; - - dmc { - compatible = "rockchip,px30-dmc"; - interrupts = <0x00 0x69 0x04>; - interrupt-names = "complete_irq"; - devfreq-events = <0xad>; - clocks = <0x02 0x54>; - clock-names = "dmc_clk"; - operating-points-v2 = <0xae>; - ddr_timing = <0xaf>; - upthreshold = <0x28>; - downdifferential = <0x14>; - system-status-freq = <0x01 0x80e80 0x08 0x6ddd0 0x02 0x2f5d0 0x20 0x6ddd0 0x1000 0x80e80 0x4000 0xa2990 0x2000 0xa2990>; - auto-min-freq = <0x50140>; - auto-freq-en = <0x01>; - #cooling-cells = <0x02>; - status = "okay"; - center-supply = <0x0e>; - phandle = <0xab>; - - ddr_power_model { - compatible = "ddr_power_model"; - dynamic-power-coefficient = <0x78>; - static-power-coefficient = <0xc8>; - ts = <0x7d00 0x125c 0xffffffb0 0x02>; - thermal-zone = "soc-thermal"; - phandle = <0x115>; - }; - }; - - dmc-opp-table { - compatible = "operating-points-v2"; - rockchip,max-volt = <0x118c30>; - rockchip,evb-irdrop = <0x61a8>; - rockchip,pvtm-voltage-sel = <0x00 0xc350 0x00 0xc351 0xd2f0 0x01 0xd2f1 0xea60 0x02 0xea61 0x1869f 0x03>; - rockchip,pvtm-ch = <0x00 0x00>; - phandle = <0xae>; - - opp-528000000 { - opp-hz = <0x00 0x1f78a400>; - opp-microvolt = <0xee098>; - opp-microvolt-L0 = <0xee098>; - opp-microvolt-L1 = <0xee098>; - opp-microvolt-L2 = <0xe7ef0>; - opp-microvolt-L3 = <0xe7ef0>; - }; - - opp-666000000 { - opp-hz = <0x00 0x27b25a80>; - opp-microvolt = <0x100590>; - opp-microvolt-L0 = <0x100590>; - opp-microvolt-L1 = <0xf4240>; - opp-microvolt-L2 = <0xee098>; - opp-microvolt-L3 = <0xe7ef0>; - }; - - opp-786000000 { - opp-hz = <0x00 0x2ed96880>; - opp-microvolt = <0x10c8e0>; - opp-microvolt-L0 = <0x10c8e0>; - opp-microvolt-L1 = <0x100590>; - opp-microvolt-L2 = <0xfa3e8>; - opp-microvolt-L3 = <0xf4240>; - status = "okay"; - }; - }; - - rockchip-system-monitor { - compatible = "rockchip,system-monitor"; - rockchip,thermal-zone = "soc-thermal"; - rockchip,polling-delay = <0xc8>; - phandle = <0x116>; - }; - - pinctrl { - compatible = "rockchip,px30-pinctrl"; - rockchip,grf = <0x2f>; - rockchip,pmu = <0xac>; - #address-cells = <0x02>; - #size-cells = <0x02>; - ranges; - phandle = <0x117>; - - gpio0@ff040000 { - compatible = "rockchip,gpio-bank"; - reg = <0x00 0xff040000 0x00 0x100>; - interrupts = <0x00 0x03 0x04>; - clocks = <0x2a 0x14>; - gpio-controller; - #gpio-cells = <0x02>; - interrupt-controller; - #interrupt-cells = <0x02>; - phandle = <0x5c>; - }; - - gpio1@ff250000 { - compatible = "rockchip,gpio-bank"; - reg = <0x00 0xff250000 0x00 0x100>; - interrupts = <0x00 0x04 0x04>; - clocks = <0x02 0x15c>; - gpio-controller; - #gpio-cells = <0x02>; - interrupt-controller; - #interrupt-cells = <0x02>; - phandle = <0xbf>; - }; - - gpio2@ff260000 { - compatible = "rockchip,gpio-bank"; - reg = <0x00 0xff260000 0x00 0x100>; - interrupts = <0x00 0x05 0x04>; - clocks = <0x02 0x15d>; - gpio-controller; - #gpio-cells = <0x02>; - interrupt-controller; - #interrupt-cells = <0x02>; - phandle = <0x66>; - }; - - gpio3@ff270000 { - compatible = "rockchip,gpio-bank"; - reg = <0x00 0xff270000 0x00 0x100>; - interrupts = <0x00 0x06 0x04>; - clocks = <0x02 0x15e>; - gpio-controller; - #gpio-cells = <0x02>; - interrupt-controller; - #interrupt-cells = <0x02>; - phandle = <0x97>; - }; - - pcfg-pull-up { - bias-pull-up; - phandle = <0xb2>; - }; - - pcfg-pull-down { - bias-pull-down; - phandle = <0x118>; - }; - - pcfg-pull-none { - bias-disable; - phandle = <0xb1>; - }; - - pcfg-pull-none-2ma { - bias-disable; - drive-strength = <0x02>; - phandle = <0x119>; - }; - - pcfg-pull-up-2ma { - bias-pull-up; - drive-strength = <0x02>; - phandle = <0x11a>; - }; - - pcfg-pull-up-4ma { - bias-pull-up; - drive-strength = <0x04>; - phandle = <0xb3>; - }; - - pcfg-pull-none-4ma { - bias-disable; - drive-strength = <0x04>; - phandle = <0x11b>; - }; - - pcfg-pull-down-4ma { - bias-pull-down; - drive-strength = <0x04>; - phandle = <0x11c>; - }; - - pcfg-pull-none-8ma { - bias-disable; - drive-strength = <0x08>; - phandle = <0xb6>; - }; - - pcfg-pull-up-8ma { - bias-pull-up; - drive-strength = <0x08>; - phandle = <0xb4>; - }; - - pcfg-pull-none-12ma { - bias-disable; - drive-strength = <0x0c>; - phandle = <0xb8>; - }; - - pcfg-pull-up-12ma { - bias-pull-up; - drive-strength = <0x0c>; - phandle = <0xb7>; - }; - - pcfg-pull-none-smt { - bias-disable; - input-schmitt-enable; - phandle = <0xb0>; - }; - - pcfg-output-high { - output-high; - phandle = <0x11d>; - }; - - pcfg-output-low { - output-low; - phandle = <0xb9>; - }; - - pcfg-input-high { - bias-pull-up; - input-enable; - phandle = <0xb5>; - }; - - pcfg-input { - input-enable; - phandle = <0x11e>; - }; - - i2c0 { - - i2c0-xfer { - rockchip,pins = <0x00 0x08 0x01 0xb0 0x00 0x09 0x01 0xb0>; - phandle = <0x5b>; - }; - }; - - i2c1 { - - i2c1-xfer { - rockchip,pins = <0x00 0x12 0x01 0xb0 0x00 0x13 0x01 0xb0>; - phandle = <0x69>; - }; - }; - - i2c2 { - - i2c2-xfer { - rockchip,pins = <0x02 0x0f 0x02 0xb0 0x02 0x10 0x02 0xb0>; - phandle = <0x6a>; - }; - }; - - i2c3 { - - i2c3-xfer { - rockchip,pins = <0x01 0x0c 0x04 0xb0 0x01 0x0d 0x04 0xb0>; - phandle = <0x6b>; - }; - }; - - tsadc { - - tsadc-otp-gpio { - rockchip,pins = <0x00 0x06 0x00 0xb1>; - phandle = <0x86>; - }; - - tsadc-otp-out { - rockchip,pins = <0x00 0x06 0x01 0xb1>; - phandle = <0x87>; - }; - }; - - uart0 { - - uart0-xfer { - rockchip,pins = <0x00 0x0a 0x01 0xb2 0x00 0x0b 0x01 0xb2>; - phandle = <0x2c>; - }; - - uart0-cts { - rockchip,pins = <0x00 0x0c 0x01 0xb1>; - phandle = <0x2d>; - }; - - uart0-rts { - rockchip,pins = <0x00 0x0d 0x01 0xb1>; - phandle = <0x2e>; - }; - - uart0-rts-gpio { - rockchip,pins = <0x00 0x0d 0x00 0xb1>; - phandle = <0x11f>; - }; - }; - - uart1 { - - uart1-xfer { - rockchip,pins = <0x01 0x11 0x01 0xb2 0x01 0x10 0x01 0xb2>; - phandle = <0x4f>; - }; - - uart1-cts { - rockchip,pins = <0x01 0x12 0x01 0xb1>; - phandle = <0x50>; - }; - - uart1-rts { - rockchip,pins = <0x01 0x13 0x01 0xb1>; - phandle = <0x120>; - }; - - uart1-rts-gpio { - rockchip,pins = <0x01 0x13 0x00 0xb1>; - phandle = <0x121>; - }; - }; - - uart2-m0 { - - uart2m0-xfer { - rockchip,pins = <0x01 0x1a 0x02 0xb2 0x01 0x1b 0x02 0xb2>; - phandle = <0x51>; - }; - }; - - uart2-m1 { - - uart2m1-xfer { - rockchip,pins = <0x02 0x0c 0x02 0xb2 0x02 0x0e 0x02 0xb2>; - phandle = <0xba>; - }; - }; - - uart3-m0 { - - uart3m0-xfer { - rockchip,pins = <0x00 0x10 0x02 0xb2 0x00 0x11 0x02 0xb2>; - phandle = <0x122>; - }; - - uart3m0-cts { - rockchip,pins = <0x00 0x12 0x02 0xb1>; - phandle = <0x123>; - }; - - uart3m0-rts { - rockchip,pins = <0x00 0x13 0x02 0xb1>; - phandle = <0x124>; - }; - - uart3m0-rts-gpio { - rockchip,pins = <0x00 0x13 0x00 0xb1>; - phandle = <0x125>; - }; - }; - - uart3-m1 { - - uart3m1-xfer { - rockchip,pins = <0x01 0x0e 0x02 0xb2 0x01 0x0f 0x02 0xb2>; - phandle = <0x52>; - }; - - uart3m1-cts { - rockchip,pins = <0x01 0x0c 0x02 0xb1>; - phandle = <0x53>; - }; - - uart3m1-rts { - rockchip,pins = <0x01 0x0d 0x02 0xb1>; - phandle = <0x54>; - }; - - uart3m1-rts-gpio { - rockchip,pins = <0x01 0x0d 0x00 0xb1>; - phandle = <0x126>; - }; - }; - - uart4 { - - uart4-xfer { - rockchip,pins = <0x01 0x1c 0x02 0xb2 0x01 0x1d 0x02 0xb2>; - phandle = <0x55>; - }; - - uart4-cts { - rockchip,pins = <0x01 0x1e 0x02 0xb1>; - phandle = <0x56>; - }; - - uart4-rts { - rockchip,pins = <0x01 0x1f 0x02 0xb1>; - phandle = <0x57>; - }; - }; - - uart5 { - - uart5-xfer { - rockchip,pins = <0x03 0x02 0x04 0xb2 0x03 0x01 0x04 0xb2>; - phandle = <0x58>; - }; - - uart5-cts { - rockchip,pins = <0x03 0x03 0x04 0xb1>; - phandle = <0x59>; - }; - - uart5-rts { - rockchip,pins = <0x03 0x05 0x04 0xb1>; - phandle = <0x5a>; - }; - }; - - spi0 { - - spi0-clk { - rockchip,pins = <0x01 0x0f 0x03 0xb3>; - phandle = <0x6c>; - }; - - spi0-csn { - rockchip,pins = <0x01 0x0e 0x03 0xb3>; - phandle = <0x6d>; - }; - - spi0-miso { - rockchip,pins = <0x01 0x0d 0x03 0xb3>; - phandle = <0x6e>; - }; - - spi0-mosi { - rockchip,pins = <0x01 0x0c 0x03 0xb3>; - phandle = <0x6f>; - }; - - spi0-clk-hs { - rockchip,pins = <0x01 0x0f 0x03 0xb4>; - phandle = <0x70>; - }; - - spi0-miso-hs { - rockchip,pins = <0x01 0x0d 0x03 0xb4>; - phandle = <0x71>; - }; - - spi0-mosi-hs { - rockchip,pins = <0x01 0x0c 0x03 0xb4>; - phandle = <0x72>; - }; - }; - - spi1 { - - spi1-clk { - rockchip,pins = <0x03 0x0f 0x04 0xb3>; - phandle = <0x73>; - }; - - spi1-csn0 { - rockchip,pins = <0x03 0x09 0x04 0xb3>; - phandle = <0x74>; - }; - - spi1-csn1 { - rockchip,pins = <0x03 0x0a 0x02 0xb3>; - phandle = <0x75>; - }; - - spi1-miso { - rockchip,pins = <0x03 0x0e 0x04 0xb3>; - phandle = <0x76>; - }; - - spi1-mosi { - rockchip,pins = <0x03 0x0c 0x04 0xb3>; - phandle = <0x77>; - }; - - spi1-clk-hs { - rockchip,pins = <0x03 0x0f 0x04 0xb4>; - phandle = <0x78>; - }; - - spi1-miso-hs { - rockchip,pins = <0x03 0x0e 0x04 0xb4>; - phandle = <0x79>; - }; - - spi1-mosi-hs { - rockchip,pins = <0x03 0x0c 0x04 0xb4>; - phandle = <0x7a>; - }; - }; - - pdm { - - pdm-clk0m0 { - rockchip,pins = <0x03 0x16 0x02 0xb1>; - phandle = <0x44>; - }; - - pdm-clk0m1 { - rockchip,pins = <0x02 0x16 0x01 0xb1>; - phandle = <0x127>; - }; - - pdm-clk1 { - rockchip,pins = <0x03 0x17 0x02 0xb1>; - phandle = <0x45>; - }; - - pdm-sdi0m0 { - rockchip,pins = <0x03 0x1b 0x02 0xb1>; - phandle = <0x46>; - }; - - pdm-sdi0m1 { - rockchip,pins = <0x02 0x15 0x02 0xb1>; - phandle = <0x128>; - }; - - pdm-sdi1 { - rockchip,pins = <0x03 0x18 0x02 0xb1>; - phandle = <0x47>; - }; - - pdm-sdi2 { - rockchip,pins = <0x03 0x19 0x02 0xb1>; - phandle = <0x48>; - }; - - pdm-sdi3 { - rockchip,pins = <0x03 0x1a 0x02 0xb1>; - phandle = <0x49>; - }; - - pdm-clk0m0-sleep { - rockchip,pins = <0x03 0x16 0x00 0xb5>; - phandle = <0x129>; - }; - - pdm-clk0m1-sleep { - rockchip,pins = <0x02 0x16 0x00 0xb5>; - phandle = <0x12a>; - }; - - pdm-clk1-sleep { - rockchip,pins = <0x03 0x17 0x00 0xb5>; - phandle = <0x12b>; - }; - - pdm-sdi0m0-sleep { - rockchip,pins = <0x03 0x1b 0x00 0xb5>; - phandle = <0x12c>; - }; - - pdm-sdi0m1-sleep { - rockchip,pins = <0x02 0x15 0x00 0xb5>; - phandle = <0x12d>; - }; - - pdm-sdi1-sleep { - rockchip,pins = <0x03 0x18 0x00 0xb5>; - phandle = <0x12e>; - }; - - pdm-sdi2-sleep { - rockchip,pins = <0x03 0x19 0x00 0xb5>; - phandle = <0x12f>; - }; - - pdm-sdi3-sleep { - rockchip,pins = <0x03 0x1a 0x00 0xb5>; - phandle = <0x130>; - }; - }; - - i2s0 { - - i2s0-8ch-mclk { - rockchip,pins = <0x03 0x11 0x02 0xb1>; - phandle = <0x131>; - }; - - i2s0-8ch-sclktx { - rockchip,pins = <0x03 0x13 0x02 0xb1>; - phandle = <0x30>; - }; - - i2s0-8ch-sclkrx { - rockchip,pins = <0x03 0x0c 0x02 0xb1>; - phandle = <0x31>; - }; - - i2s0-8ch-lrcktx { - rockchip,pins = <0x03 0x12 0x02 0xb1>; - phandle = <0x32>; - }; - - i2s0-8ch-lrckrx { - rockchip,pins = <0x03 0x0d 0x02 0xb1>; - phandle = <0x33>; - }; - - i2s0-8ch-sdo0 { - rockchip,pins = <0x03 0x14 0x02 0xb1>; - phandle = <0x38>; - }; - - i2s0-8ch-sdo1 { - rockchip,pins = <0x03 0x10 0x02 0xb1>; - phandle = <0x39>; - }; - - i2s0-8ch-sdo2 { - rockchip,pins = <0x03 0x0f 0x02 0xb1>; - phandle = <0x3a>; - }; - - i2s0-8ch-sdo3 { - rockchip,pins = <0x03 0x0e 0x02 0xb1>; - phandle = <0x3b>; - }; - - i2s0-8ch-sdi0 { - rockchip,pins = <0x03 0x15 0x02 0xb1>; - phandle = <0x34>; - }; - - i2s0-8ch-sdi1 { - rockchip,pins = <0x03 0x0b 0x02 0xb1>; - phandle = <0x35>; - }; - - i2s0-8ch-sdi2 { - rockchip,pins = <0x03 0x09 0x02 0xb1>; - phandle = <0x36>; - }; - - i2s0-8ch-sdi3 { - rockchip,pins = <0x03 0x08 0x02 0xb1>; - phandle = <0x37>; - }; - }; - - i2s1 { - - i2s1-2ch-mclk { - rockchip,pins = <0x02 0x13 0x01 0xb1>; - phandle = <0x68>; - }; - - i2s1-2ch-sclk { - rockchip,pins = <0x02 0x12 0x01 0xb1>; - phandle = <0x3c>; - }; - - i2s1-2ch-lrck { - rockchip,pins = <0x02 0x11 0x01 0xb1>; - phandle = <0x3d>; - }; - - i2s1-2ch-sdi { - rockchip,pins = <0x02 0x15 0x01 0xb1>; - phandle = <0x3e>; - }; - - i2s1-2ch-sdo { - rockchip,pins = <0x02 0x14 0x01 0xb1>; - phandle = <0x3f>; - }; - }; - - i2s2 { - - i2s2-2ch-mclk { - rockchip,pins = <0x03 0x01 0x02 0xb1>; - phandle = <0x132>; - }; - - i2s2-2ch-sclk { - rockchip,pins = <0x03 0x02 0x02 0xb1>; - phandle = <0x40>; - }; - - i2s2-2ch-lrck { - rockchip,pins = <0x03 0x03 0x02 0xb1>; - phandle = <0x41>; - }; - - i2s2-2ch-sdi { - rockchip,pins = <0x03 0x05 0x02 0xb1>; - phandle = <0x42>; - }; - - i2s2-2ch-sdo { - rockchip,pins = <0x03 0x07 0x02 0xb1>; - phandle = <0x43>; - }; - }; - - sdmmc { - - sdmmc-clk { - rockchip,pins = <0x01 0x1e 0x01 0xb6>; - phandle = <0x8f>; - }; - - sdmmc-cmd { - rockchip,pins = <0x01 0x1f 0x01 0xb4>; - phandle = <0x90>; - }; - - sdmmc-det { - rockchip,pins = <0x00 0x03 0x01 0xb4>; - phandle = <0x91>; - }; - - sdmmc-bus1 { - rockchip,pins = <0x01 0x1a 0x01 0xb4>; - phandle = <0x133>; - }; - - sdmmc-bus4 { - rockchip,pins = <0x01 0x1a 0x01 0xb4 0x01 0x1b 0x01 0xb4 0x01 0x1c 0x01 0xb4 0x01 0x1d 0x01 0xb4>; - phandle = <0x92>; - }; - - sdmmc-gpio { - rockchip,pins = <0x01 0x1a 0x00 0xb3 0x01 0x1b 0x00 0xb3 0x01 0x1c 0x00 0xb3 0x01 0x1d 0x00 0xb3 0x01 0x1e 0x00 0xb3 0x01 0x1f 0x00 0xb3>; - phandle = <0x134>; - }; - }; - - sdio { - - sdio-clk { - rockchip,pins = <0x01 0x15 0x01 0xb1>; - phandle = <0x96>; - }; - - sdio-cmd { - rockchip,pins = <0x01 0x14 0x01 0xb2>; - phandle = <0x95>; - }; - - sdio-bus4 { - rockchip,pins = <0x01 0x16 0x01 0xb2 0x01 0x17 0x01 0xb2 0x01 0x18 0x01 0xb2 0x01 0x19 0x01 0xb2>; - phandle = <0x94>; - }; - - sdio-gpio { - rockchip,pins = <0x01 0x16 0x00 0xb2 0x01 0x17 0x00 0xb2 0x01 0x18 0x00 0xb2 0x01 0x19 0x00 0xb2 0x01 0x14 0x00 0xb2 0x01 0x15 0x00 0xb2>; - phandle = <0x135>; - }; - }; - - emmc { - - emmc-clk { - rockchip,pins = <0x01 0x09 0x02 0xb6>; - phandle = <0x136>; - }; - - emmc-cmd { - rockchip,pins = <0x01 0x0a 0x02 0xb4>; - phandle = <0x137>; - }; - - emmc-pwren { - rockchip,pins = <0x01 0x08 0x02 0xb1>; - phandle = <0x138>; - }; - - emmc-rstnout { - rockchip,pins = <0x01 0x0b 0x02 0xb1>; - phandle = <0x139>; - }; - - emmc-bus1 { - rockchip,pins = <0x01 0x00 0x02 0xb4>; - phandle = <0x13a>; - }; - - emmc-bus4 { - rockchip,pins = <0x01 0x00 0x02 0xb4 0x01 0x01 0x02 0xb4 0x01 0x02 0x02 0xb4 0x01 0x03 0x02 0xb4>; - phandle = <0x13b>; - }; - - emmc-bus8 { - rockchip,pins = <0x01 0x00 0x02 0xb4 0x01 0x01 0x02 0xb4 0x01 0x02 0x02 0xb4 0x01 0x03 0x02 0xb4 0x01 0x04 0x02 0xb4 0x01 0x05 0x02 0xb4 0x01 0x06 0x02 0xb4 0x01 0x07 0x02 0xb4>; - phandle = <0x13c>; - }; - }; - - flash { - - flash-cs0 { - rockchip,pins = <0x01 0x08 0x01 0xb1>; - phandle = <0x13d>; - }; - - flash-rdy { - rockchip,pins = <0x01 0x09 0x01 0xb1>; - phandle = <0x13e>; - }; - - flash-dqs { - rockchip,pins = <0x01 0x0a 0x01 0xb1>; - phandle = <0x13f>; - }; - - flash-ale { - rockchip,pins = <0x01 0x0b 0x01 0xb1>; - phandle = <0x140>; - }; - - flash-cle { - rockchip,pins = <0x01 0x0c 0x01 0xb1>; - phandle = <0x141>; - }; - - flash-wrn { - rockchip,pins = <0x01 0x0d 0x01 0xb1>; - phandle = <0x142>; - }; - - flash-csl { - rockchip,pins = <0x01 0x0e 0x01 0xb1>; - phandle = <0x143>; - }; - - flash-rdn { - rockchip,pins = <0x01 0x0f 0x01 0xb1>; - phandle = <0x144>; - }; - - flash-bus8 { - rockchip,pins = <0x01 0x00 0x01 0xb7 0x01 0x01 0x01 0xb7 0x01 0x02 0x01 0xb7 0x01 0x03 0x01 0xb7 0x01 0x04 0x01 0xb7 0x01 0x05 0x01 0xb7 0x01 0x06 0x01 0xb7 0x01 0x07 0x01 0xb7>; - phandle = <0x145>; - }; - }; - - lcdc { - - lcdc-m0-rgb-pins { - rockchip,pins = <0x03 0x00 0x01 0xb6 0x03 0x01 0x01 0xb6 0x03 0x02 0x01 0xb6 0x03 0x03 0x01 0xb6 0x03 0x04 0x01 0xb6 0x03 0x05 0x01 0xb6 0x03 0x06 0x01 0xb6 0x03 0x07 0x01 0xb6 0x03 0x08 0x01 0xb6 0x03 0x09 0x01 0xb6 0x03 0x0a 0x01 0xb6 0x03 0x0b 0x01 0xb6 0x03 0x0c 0x01 0xb6 0x03 0x0d 0x01 0xb6 0x03 0x0e 0x01 0xb6 0x03 0x0f 0x01 0xb6 0x03 0x10 0x01 0xb6 0x03 0x11 0x01 0xb6 0x03 0x12 0x01 0xb6 0x03 0x13 0x01 0xb6 0x03 0x14 0x01 0xb6 0x03 0x15 0x01 0xb6 0x03 0x16 0x01 0xb6 0x03 0x17 0x01 0xb6 0x03 0x18 0x01 0xb6 0x03 0x19 0x01 0xb6 0x03 0x1a 0x01 0xb6 0x03 0x1b 0x01 0xb6>; - phandle = <0x146>; - }; - - lcdc-m0-sleep-pins { - rockchip,pins = <0x03 0x00 0x00 0xb1 0x03 0x01 0x00 0xb1 0x03 0x02 0x00 0xb1 0x03 0x03 0x00 0xb1 0x03 0x04 0x00 0xb1 0x03 0x05 0x00 0xb1 0x03 0x06 0x00 0xb1 0x03 0x07 0x00 0xb1 0x03 0x08 0x00 0xb1 0x03 0x09 0x00 0xb1 0x03 0x0a 0x00 0xb1 0x03 0x0b 0x00 0xb1 0x03 0x0c 0x00 0xb1 0x03 0x0d 0x00 0xb1 0x03 0x0e 0x00 0xb1 0x03 0x0f 0x00 0xb1 0x03 0x10 0x00 0xb1 0x03 0x11 0x00 0xb1 0x03 0x12 0x00 0xb1 0x03 0x13 0x00 0xb1 0x03 0x14 0x00 0xb1 0x03 0x15 0x00 0xb1 0x03 0x16 0x00 0xb1 0x03 0x17 0x00 0xb1 0x03 0x18 0x00 0xb1 0x03 0x19 0x00 0xb1 0x03 0x1a 0x00 0xb1 0x03 0x1b 0x00 0xb1>; - phandle = <0x147>; - }; - - lcdc-m1-rgb-pins { - rockchip,pins = <0x03 0x00 0x01 0xb6 0x03 0x04 0x01 0xb6 0x03 0x06 0x01 0xb6 0x03 0x0a 0x01 0xb6 0x03 0x0b 0x01 0xb6 0x03 0x0d 0x01 0xb6 0x03 0x10 0x01 0xb6 0x03 0x11 0x01 0xb6 0x03 0x12 0x01 0xb6 0x03 0x13 0x01 0xb6 0x03 0x14 0x01 0xb6 0x03 0x15 0x01 0xb6 0x03 0x16 0x01 0xb6 0x03 0x17 0x01 0xb6 0x03 0x18 0x01 0xb6 0x03 0x19 0x01 0xb6 0x03 0x1a 0x01 0xb6 0x03 0x1b 0x01 0xb6>; - phandle = <0x4d>; - }; - - lcdc-m1-sleep-pins { - rockchip,pins = <0x03 0x00 0x00 0xb1 0x03 0x04 0x00 0xb1 0x03 0x06 0x00 0xb1 0x03 0x0a 0x00 0xb1 0x03 0x0b 0x00 0xb1 0x03 0x0d 0x00 0xb1 0x03 0x10 0x00 0xb1 0x03 0x11 0x00 0xb1 0x03 0x12 0x00 0xb1 0x03 0x13 0x00 0xb1 0x03 0x14 0x00 0xb1 0x03 0x15 0x00 0xb1 0x03 0x16 0x00 0xb1 0x03 0x17 0x00 0xb1 0x03 0x18 0x00 0xb1 0x03 0x19 0x00 0xb1 0x03 0x1a 0x00 0xb1 0x03 0x1b 0x00 0xb1>; - phandle = <0x4e>; - }; - }; - - pwm0 { - - pwm0-pin { - rockchip,pins = <0x00 0x0f 0x01 0xb1>; - phandle = <0x7b>; - }; - }; - - pwm1 { - - pwm1-pin { - rockchip,pins = <0x00 0x10 0x01 0xb1>; - phandle = <0x7c>; - }; - }; - - pwm2 { - - pwm2-pin { - rockchip,pins = <0x02 0x0d 0x01 0xb1>; - phandle = <0x7d>; - }; - }; - - pwm3 { - - pwm3-pin { - rockchip,pins = <0x00 0x11 0x01 0xb1>; - phandle = <0x7e>; - }; - }; - - pwm4 { - - pwm4-pin { - rockchip,pins = <0x03 0x12 0x03 0xb1>; - phandle = <0x7f>; - }; - }; - - pwm5 { - - pwm5-pin { - rockchip,pins = <0x03 0x13 0x03 0xb1>; - phandle = <0x80>; - }; - }; - - pwm6 { - - pwm6-pin { - rockchip,pins = <0x03 0x14 0x03 0xb1>; - phandle = <0x81>; - }; - }; - - pwm7 { - - pwm7-pin { - rockchip,pins = <0x03 0x15 0x03 0xb1>; - phandle = <0x82>; - }; - }; - - gmac { - - rmii-pins { - rockchip,pins = <0x02 0x00 0x02 0xb8 0x02 0x01 0x02 0xb8 0x02 0x02 0x02 0xb8 0x02 0x03 0x02 0xb1 0x02 0x04 0x02 0xb1 0x02 0x05 0x02 0xb1 0x02 0x06 0x02 0xb1 0x02 0x07 0x02 0xb1 0x02 0x09 0x02 0xb1>; - phandle = <0x8d>; - }; - - mac-refclk-12ma { - rockchip,pins = <0x02 0x0a 0x02 0xb8>; - phandle = <0x8e>; - }; - - mac-refclk { - rockchip,pins = <0x02 0x0a 0x02 0xb1>; - phandle = <0x148>; - }; - }; - - cif-m0 { - - cif-clkout-m0 { - rockchip,pins = <0x02 0x0b 0x01 0xb8>; - phandle = <0xa7>; - }; - - dvp-d2d9-m0 { - rockchip,pins = <0x02 0x00 0x01 0xb1 0x02 0x01 0x01 0xb1 0x02 0x02 0x01 0xb1 0x02 0x03 0x01 0xb1 0x02 0x04 0x01 0xb1 0x02 0x05 0x01 0xb1 0x02 0x06 0x01 0xb1 0x02 0x07 0x01 0xb1 0x02 0x08 0x01 0xb1 0x02 0x09 0x01 0xb1 0x02 0x0a 0x01 0xb1 0x02 0x0b 0x01 0xb1>; - phandle = <0xa5>; - }; - - dvp-d0d1-m0 { - rockchip,pins = <0x02 0x0c 0x01 0xb1 0x02 0x0e 0x01 0xb1>; - phandle = <0xa9>; - }; - - d10-d11-m0 { - rockchip,pins = <0x02 0x0f 0x01 0xb1 0x02 0x10 0x01 0xb1>; - phandle = <0xa8>; - }; - }; - - cif-m1 { - - cif-clkout-m1 { - rockchip,pins = <0x03 0x18 0x03 0xb1>; - phandle = <0x149>; - }; - - dvp-d2d9-m1 { - rockchip,pins = <0x03 0x03 0x03 0xb1 0x03 0x05 0x03 0xb1 0x03 0x07 0x03 0xb1 0x03 0x08 0x03 0xb1 0x03 0x09 0x03 0xb1 0x03 0x0c 0x03 0xb1 0x03 0x0e 0x03 0xb1 0x03 0x0f 0x03 0xb1 0x03 0x19 0x03 0xb1 0x03 0x1a 0x03 0xb1 0x03 0x1b 0x03 0xb1 0x03 0x18 0x03 0xb1>; - phandle = <0x14a>; - }; - - dvp-d0d1-m1 { - rockchip,pins = <0x03 0x01 0x03 0xb1 0x03 0x02 0x03 0xb1>; - phandle = <0x14b>; - }; - - d10-d11-m1 { - rockchip,pins = <0x03 0x16 0x03 0xb1 0x03 0x17 0x03 0xb1>; - phandle = <0x14c>; - }; - }; - - isp { - - isp-prelight { - rockchip,pins = <0x03 0x19 0x04 0xb1>; - phandle = <0x14d>; - }; - }; - - pmic { - - pmic_int { - rockchip,pins = <0x00 0x0a 0x00 0xb2 0x00 0x0b 0x00 0xb1>; - phandle = <0x5d>; - }; - - soc_slppin_gpio { - rockchip,pins = <0x00 0x04 0x00 0xb9>; - phandle = <0x60>; - }; - - soc_slppin_slp { - rockchip,pins = <0x00 0x04 0x01 0xb1>; - phandle = <0x5e>; - }; - - soc_slppin_rst { - rockchip,pins = <0x00 0x04 0x02 0xb1>; - phandle = <0x62>; - }; - }; - - leds { - - led-pins { - rockchip,pins = <0x00 0x11 0x00 0xb1>; - phandle = <0xc0>; - }; - }; - - btns { - - btn-pins { - rockchip,pins = <0x01 0x0c 0x00 0xb2 0x01 0x0d 0x00 0xb2 0x01 0x0e 0x00 0xb2 0x01 0x0f 0x00 0xb2 0x01 0x02 0x00 0xb2 0x01 0x05 0x00 0xb2 0x01 0x06 0x00 0xb2 0x01 0x07 0x00 0xb2 0x02 0x00 0x00 0xb2 0x02 0x01 0x00 0xb2 0x02 0x02 0x00 0xb2 0x02 0x03 0x00 0xb2 0x02 0x04 0x00 0xb2 0x02 0x05 0x00 0xb2 0x02 0x06 0x00 0xb2 0x02 0x07 0x00 0xb2 0x03 0x09 0x00 0xb2 0x03 0x0a 0x00 0xb2 0x03 0x0c 0x00 0xb2 0x03 0x0f 0x00 0xb2>; - phandle = <0xbd>; - }; - }; - }; - - chosen { - bootargs = [00]; - }; - - fiq-debugger { - compatible = "rockchip,fiq-debugger"; - rockchip,serial-id = <0x02>; - rockchip,wake-irq = <0x00>; - rockchip,irq-mode-enable = <0x00>; - rockchip,baudrate = <0x1c200>; - interrupts = <0x00 0x7f 0x08>; - pinctrl-names = "default"; - pinctrl-0 = <0xba>; - status = "okay"; - }; - - ramoops { - compatible = "ramoops"; - record-size = <0x00 0x20000>; - console-size = <0x00 0x80000>; - ftrace-size = <0x00 0x00>; - pmsg-size = <0x00 0x00>; - memory-region = <0xbb>; - }; - - reserved-memory { - #address-cells = <0x02>; - #size-cells = <0x02>; - ranges; - - drm-logo@00000000 { - compatible = "rockchip,drm-logo"; - reg = <0x00 0x00 0x00 0x00>; - phandle = <0x11>; - }; - - region@110000 { - reg = <0x00 0x110000 0x00 0xf0000>; - reg-names = "ramoops_mem"; - phandle = <0xbb>; - }; - }; - - odroidgo3-keys { - compatible = "gpio-keys"; - #address-cells = <0x01>; - #size-cells = <0x00>; - autorepeat; - phandle = <0x14e>; - - button@0 { - label = "GPIO BTN-VOLUP"; - linux,code = <0x73>; - gpios = <0x66 0x00 0x01>; - }; - - button@1 { - label = "GPIO BTN-VOLDN"; - linux,code = <0x72>; - gpios = <0x66 0x01 0x01>; - }; - }; - - odroidgo3-joypad { - compatible = "odroidgo3-joypad"; - pwms = <0xbc 0x00 0xbebc200 0x00>; - pwm-names = "enable"; - rumble-boost-weak = <0x00>; - rumble-boost-strong = <0x00>; - joypad-name = "GO-Super Gamepad"; - joypad-product = <0x1100>; - joypad-revision = <0x100>; - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <0xbd>; - pinctrl-1 = <0x7b>; - io-channel-names = "amux_adc"; - io-channels = <0xbe 0x01>; - amux-count = <0x04>; - amux-a-gpios = <0x97 0x0b 0x01>; - amux-b-gpios = <0x97 0x08 0x01>; - amux-en-gpios = <0x97 0x0d 0x01>; - button-adc-scale = <0x02>; - button-adc-deadzone = <0x40>; - button-adc-fuzz = <0x20>; - button-adc-flat = <0x20>; - abs_x-p-tuning = <0xc8>; - abs_x-n-tuning = <0xc8>; - abs_y-p-tuning = <0xc8>; - abs_y-n-tuning = <0xc8>; - abs_rx-p-tuning = <0xc8>; - abs_rx-n-tuning = <0xc8>; - abs_ry-p-tuning = <0xc8>; - abs_ry-n-tuning = <0xc8>; - poll-interval = <0x0a>; - invert-absx; - invert-absy; - phandle = <0x14f>; - - sw1 { - gpios = <0xbf 0x0c 0x01>; - label = "GPIO DPAD-UP"; - linux,code = <0x220>; - }; - - sw2 { - gpios = <0xbf 0x0d 0x01>; - label = "GPIO DPAD-DOWN"; - linux,code = <0x221>; - }; - - sw3 { - gpios = <0xbf 0x0e 0x01>; - label = "GPIO DPAD-LEFT"; - linux,code = <0x222>; - }; - - sw4 { - gpios = <0xbf 0x0f 0x01>; - label = "GPIO DPAD-RIGHT"; - linux,code = <0x223>; - }; - - sw5 { - gpios = <0xbf 0x02 0x01>; - label = "GPIO KEY BTN-A"; - linux,code = <0x131>; - }; - - sw6 { - gpios = <0xbf 0x05 0x01>; - label = "GPIO BTN-B"; - linux,code = <0x130>; - }; - - sw7 { - gpios = <0xbf 0x06 0x01>; - label = "GPIO BTN-Y"; - linux,code = <0x134>; - }; - - sw8 { - gpios = <0xbf 0x07 0x01>; - label = "GPIO BTN-X"; - linux,code = <0x133>; - }; - - sw11 { - gpios = <0x66 0x02 0x01>; - label = "GPIO F3"; - linux,code = <0x2c2>; - }; - - sw12 { - gpios = <0x66 0x03 0x01>; - label = "GPIO F4"; - linux,code = <0x2c3>; - }; - - sw15 { - gpios = <0x66 0x06 0x01>; - label = "GPIO TOP-LEFT"; - linux,code = <0x136>; - }; - - sw16 { - gpios = <0x66 0x07 0x01>; - label = "GPIO TOP-RIGHT"; - linux,code = <0x137>; - }; - - sw19 { - gpios = <0x97 0x09 0x01>; - label = "GPIO F1"; - linux,code = <0x2c0>; - }; - - sw20 { - gpios = <0x97 0x0f 0x01>; - label = "GPIO TOP-RIGHT2"; - linux,code = <0x139>; - }; - - sw21 { - gpios = <0x97 0x0a 0x01>; - label = "GPIO TOP-LEFT2"; - linux,code = <0x138>; - }; - - sw22 { - gpios = <0x97 0x0c 0x01>; - label = "GPIO F2"; - linux,code = <0x2c1>; - }; - - sw13 { - gpios = <0x66 0x04 0x01>; - label = "GPIO F5"; - linux,code = <0x2c4>; - }; - }; - - gpio_leds { - compatible = "gpio-leds"; - pinctrl-names = "led_pins"; - pinctrl-0 = <0xc0>; - phandle = <0x150>; - - heartbeat { - label = "blue:heartbeat"; - gpios = <0x5c 0x11 0x00>; - linux,default-trigger = "heartbeat"; - }; - }; - - backlight { - compatible = "pwm-backlight"; - pwms = <0xc1 0x00 0xf519 0x00>; - brightness-levels = <0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f 0x20 0x21 0x22 0x23 0x24 0x25 0x26 0x27 0x28 0x29 0x2a 0x2b 0x2c 0x2d 0x2e 0x2f 0x30 0x31 0x32 0x33 0x34 0x35 0x36 0x37 0x38 0x39 0x3a 0x3b 0x3c 0x3d 0x3e 0x3f 0x40 0x41 0x42 0x43 0x44 0x45 0x46 0x47 0x48 0x49 0x4a 0x4b 0x4c 0x4d 0x4e 0x4f 0x50 0x51 0x52 0x53 0x54 0x55 0x56 0x57 0x58 0x59 0x5a 0x5b 0x5c 0x5d 0x5e 0x5f 0x60 0x61 0x62 0x63 0x64 0x65 0x66 0x67 0x68 0x69 0x6a 0x6b 0x6c 0x6d 0x6e 0x6f 0x70 0x71 0x72 0x73 0x74 0x75 0x76 0x77 0x78 0x79 0x7a 0x7b 0x7c 0x7d 0x7e 0x7f 0x80 0x81 0x82 0x83 0x84 0x85 0x86 0x87 0x88 0x89 0x8a 0x8b 0x8c 0x8d 0x8e 0x8f 0x90 0x91 0x92 0x93 0x94 0x95 0x96 0x97 0x98 0x99 0x9a 0x9b 0x9c 0x9d 0x9e 0x9f 0xa0>; - default-brightness-level = <0x33>; - phandle = <0x9d>; - }; - - rk817-sound { - compatible = "simple-audio-card"; - simple-audio-card,format = "i2s"; - simple-audio-card,name = "rockchip,rk817-codec"; - simple-audio-card,mclk-fs = <0x100>; - simple-audio-card,widgets = "Microphone\0Mic Jack\0Headphone\0Headphone Jack"; - simple-audio-card,routing = "MIC_IN\0Mic Jack\0Headphone Jack\0HPOL\0Headphone Jack\0HPOR"; - simple-audio-card,hp-det-gpio = <0x66 0x16 0x01>; - simple-audio-card,codec-hp-det = <0x01>; - - simple-audio-card,cpu { - sound-dai = <0xc2>; - }; - - simple-audio-card,codec { - sound-dai = <0xc3>; - }; - }; - - vccsys { - compatible = "regulator-fixed"; - regulator-name = "vcc3v8_sys"; - regulator-always-on; - regulator-min-microvolt = <0x39fbc0>; - regulator-max-microvolt = <0x39fbc0>; - phandle = <0x64>; - }; - - __symbols__ { - ddr_timing = "/ddr_timing"; - cpu0 = "/cpus/cpu@0"; - cpu1 = "/cpus/cpu@1"; - cpu2 = "/cpus/cpu@2"; - cpu3 = "/cpus/cpu@3"; - CPU_SLEEP = "/cpus/idle-states/cpu-sleep"; - CLUSTER_SLEEP = "/cpus/idle-states/cluster-sleep"; - cpu0_opp_table = "/cpu0-opp-table"; - bus_soc = "/bus-soc"; - bus_apll = "/bus-apll"; - bus_apll_opp_table = "/bus-apll-opp-table"; - display_subsystem = "/display-subsystem"; - route_lvds = "/display-subsystem/route/route-lvds"; - route_dsi = "/display-subsystem/route/route-dsi"; - route_rgb = "/display-subsystem/route/route-rgb"; - gmac_clkin = "/external-gmac-clock"; - rockchip_suspend = "/rockchip-suspend"; - xin24m = "/xin24m"; - xin32k = "/xin32k"; - pmu = "/power-management@ff000000"; - power = "/power-management@ff000000/power-controller"; - pmugrf = "/syscon@ff010000"; - pmu_io_domains = "/syscon@ff010000/io-domains"; - pmu_pvtm = "/syscon@ff010000/pmu-pvtm"; - uart0 = "/serial@ff030000"; - i2s0_8ch = "/i2s@ff060000"; - i2s1_2ch = "/i2s@ff070000"; - i2s2_2ch = "/i2s@ff080000"; - pdm = "/pdm@ff0a0000"; - crypto = "/crypto@ff0b0000"; - rng = "/rng@ff0b0000"; - gic = "/interrupt-controller@ff131000"; - grf = "/syscon@ff140000"; - io_domains = "/syscon@ff140000/io-domains"; - lvds = "/syscon@ff140000/lvds"; - lvds_in_vopb = "/syscon@ff140000/lvds/ports/port@0/endpoint@0"; - rgb = "/syscon@ff140000/rgb"; - rgb_in_vopb = "/syscon@ff140000/rgb/ports/port@0/endpoint@0"; - core_grf = "/syscon@ff148000"; - pvtm = "/syscon@ff148000/pvtm"; - uart1 = "/serial@ff158000"; - uart2 = "/serial@ff160000"; - uart3 = "/serial@ff168000"; - uart4 = "/serial@ff170000"; - uart5 = "/serial@ff178000"; - i2c0 = "/i2c@ff180000"; - rk817 = "/i2c@ff180000/pmic@20"; - pinctrl_rk8xx = "/i2c@ff180000/pmic@20/pinctrl_rk8xx"; - rk817_ts_gpio1 = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_ts_gpio1"; - rk817_gt_gpio2 = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_gt_gpio2"; - rk817_pin_ts = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_pin_ts"; - rk817_pin_gt = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_pin_gt"; - rk817_slppin_null = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_slppin_null"; - rk817_slppin_slp = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_slppin_slp"; - rk817_slppin_pwrdn = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_slppin_pwrdn"; - rk817_slppin_rst = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_slppin_rst"; - vdd_logic = "/i2c@ff180000/pmic@20/regulators/DCDC_REG1"; - vdd_arm = "/i2c@ff180000/pmic@20/regulators/DCDC_REG2"; - vcc_ddr = "/i2c@ff180000/pmic@20/regulators/DCDC_REG3"; - vcc_3v3 = "/i2c@ff180000/pmic@20/regulators/DCDC_REG4"; - vcc_1v0 = "/i2c@ff180000/pmic@20/regulators/LDO_REG1"; - vcc1v8_soc = "/i2c@ff180000/pmic@20/regulators/LDO_REG2"; - vdd1v0_soc = "/i2c@ff180000/pmic@20/regulators/LDO_REG3"; - vcc3v3_pmu = "/i2c@ff180000/pmic@20/regulators/LDO_REG4"; - vccio_sd = "/i2c@ff180000/pmic@20/regulators/LDO_REG5"; - vcc_sd = "/i2c@ff180000/pmic@20/regulators/LDO_REG6"; - vcc_backlight = "/i2c@ff180000/pmic@20/regulators/LDO_REG7"; - vcc_lcd = "/i2c@ff180000/pmic@20/regulators/LDO_REG8"; - dcdc_boost = "/i2c@ff180000/pmic@20/regulators/BOOST"; - otg_switch = "/i2c@ff180000/pmic@20/regulators/OTG_SWITCH"; - rk817_codec = "/i2c@ff180000/pmic@20/codec"; - i2c1 = "/i2c@ff190000"; - i2c2 = "/i2c@ff1a0000"; - i2c3 = "/i2c@ff1b0000"; - spi0 = "/spi@ff1d0000"; - spi1 = "/spi@ff1d8000"; - wdt = "/watchdog@ff1e0000"; - pwm0 = "/pwm@ff200000"; - pwm1 = "/pwm@ff200010"; - pwm2 = "/pwm@ff200020"; - pwm3 = "/pwm@ff200030"; - pwm4 = "/pwm@ff208000"; - pwm5 = "/pwm@ff208010"; - pwm6 = "/pwm@ff208020"; - pwm7 = "/pwm@ff208030"; - rktimer = "/rktimer@ff210000"; - dmac = "/amba/dmac@ff240000"; - thermal_zones = "/thermal-zones"; - soc_thermal = "/thermal-zones/soc-thermal"; - threshold = "/thermal-zones/soc-thermal/trips/trip-point-0"; - target = "/thermal-zones/soc-thermal/trips/trip-point-1"; - soc_crit = "/thermal-zones/soc-thermal/trips/soc-crit"; - gpu_thermal = "/thermal-zones/gpu-thermal"; - tsadc = "/tsadc@ff280000"; - saradc = "/saradc@ff288000"; - otp = "/otp@ff290000"; - otp_id = "/otp@ff290000/id@7"; - cpu_leakage = "/otp@ff290000/cpu-leakage@17"; - performance = "/otp@ff290000/performance@1e"; - cru = "/clock-controller@ff2b0000"; - cpu_boost = "/cpu-boost@ff2b8000"; - pmucru = "/pmu-clock-controller@ff2bc000"; - usb2phy_grf = "/syscon@ff2c0000"; - u2phy = "/syscon@ff2c0000/usb2-phy@100"; - u2phy_host = "/syscon@ff2c0000/usb2-phy@100/host-port"; - u2phy_otg = "/syscon@ff2c0000/usb2-phy@100/otg-port"; - video_phy = "/video-phy@ff2e0000"; - mipi_dphy_rx0 = "/mipi-dphy-rx0@ff2f0000"; - usb20_otg = "/usb@ff300000"; - usb_host0_ehci = "/usb@ff340000"; - usb_host0_ohci = "/usb@ff350000"; - gmac = "/ethernet@ff360000"; - sdmmc = "/dwmmc@ff370000"; - sdio = "/dwmmc@ff380000"; - emmc = "/dwmmc@ff390000"; - nandc0 = "/nandc@ff3b0000"; - sfc = "/sfc@ff3a0000"; - gpu = "/gpu@ff400000"; - gpu_opp_table = "/gpu-opp-table"; - hevc = "/hevc_service@ff440000"; - vpu = "/vpu_service@ff442000"; - vpu_combo = "/vpu_combo"; - hevc_mmu = "/iommu@ff440440"; - vpu_mmu = "/iommu@ff442800"; - dsi = "/dsi@ff450000"; - dsi_in_vopb = "/dsi@ff450000/ports/port@0/endpoint@0"; - timing0 = "/dsi@ff450000/panel@0/display-timings/60Hz"; - timing1 = "/dsi@ff450000/panel@0/display-timings/50Hz"; - timing2 = "/dsi@ff450000/panel@0/display-timings/75Hz"; - vopb = "/vop@ff460000"; - vopb_out = "/vop@ff460000/port"; - vopb_out_lvds = "/vop@ff460000/port/endpoint@0"; - vopb_out_dsi = "/vop@ff460000/port/endpoint@1"; - vopb_out_rgb = "/vop@ff460000/port/endpoint@2"; - vopb_mmu = "/iommu@ff460f00"; - rk_rga = "/rk_rga@ff480000"; - cif = "/cif@ff490000"; - cif_new = "/cif-new@ff490000"; - vip_mmu = "/iommu@ff490800"; - rk_isp = "/rk_isp@ff4a0000"; - rkisp1 = "/rkisp1@ff4a0000"; - isp_mmu = "/iommu@ff4a8000"; - qos_gmac = "/qos@ff518000"; - qos_gpu = "/qos@ff520000"; - qos_sdmmc = "/qos@ff52c000"; - qos_emmc = "/qos@ff538000"; - qos_nand = "/qos@ff538080"; - qos_sdio = "/qos@ff538100"; - qos_sfc = "/qos@ff538180"; - qos_usb_host = "/qos@ff540000"; - qos_usb_otg = "/qos@ff540080"; - qos_isp_128 = "/qos@ff548000"; - qos_isp_rd = "/qos@ff548080"; - qos_isp_wr = "/qos@ff548100"; - qos_isp_m1 = "/qos@ff548180"; - qos_vip = "/qos@ff548200"; - qos_rga_rd = "/qos@ff550000"; - qos_rga_wr = "/qos@ff550080"; - qos_vop_m0 = "/qos@ff550100"; - qos_vop_m1 = "/qos@ff550180"; - qos_vpu = "/qos@ff558000"; - qos_vpu_r128 = "/qos@ff558080"; - dfi = "/dfi@ff610000"; - dmc = "/dmc"; - ddr_power_model = "/dmc/ddr_power_model"; - dmc_opp_table = "/dmc-opp-table"; - rockchip_system_monitor = "/rockchip-system-monitor"; - pinctrl = "/pinctrl"; - gpio0 = "/pinctrl/gpio0@ff040000"; - gpio1 = "/pinctrl/gpio1@ff250000"; - gpio2 = "/pinctrl/gpio2@ff260000"; - gpio3 = "/pinctrl/gpio3@ff270000"; - pcfg_pull_up = "/pinctrl/pcfg-pull-up"; - pcfg_pull_down = "/pinctrl/pcfg-pull-down"; - pcfg_pull_none = "/pinctrl/pcfg-pull-none"; - pcfg_pull_none_2ma = "/pinctrl/pcfg-pull-none-2ma"; - pcfg_pull_up_2ma = "/pinctrl/pcfg-pull-up-2ma"; - pcfg_pull_up_4ma = "/pinctrl/pcfg-pull-up-4ma"; - pcfg_pull_none_4ma = "/pinctrl/pcfg-pull-none-4ma"; - pcfg_pull_down_4ma = "/pinctrl/pcfg-pull-down-4ma"; - pcfg_pull_none_8ma = "/pinctrl/pcfg-pull-none-8ma"; - pcfg_pull_up_8ma = "/pinctrl/pcfg-pull-up-8ma"; - pcfg_pull_none_12ma = "/pinctrl/pcfg-pull-none-12ma"; - pcfg_pull_up_12ma = "/pinctrl/pcfg-pull-up-12ma"; - pcfg_pull_none_smt = "/pinctrl/pcfg-pull-none-smt"; - pcfg_output_high = "/pinctrl/pcfg-output-high"; - pcfg_output_low = "/pinctrl/pcfg-output-low"; - pcfg_input_high = "/pinctrl/pcfg-input-high"; - pcfg_input = "/pinctrl/pcfg-input"; - i2c0_xfer = "/pinctrl/i2c0/i2c0-xfer"; - i2c1_xfer = "/pinctrl/i2c1/i2c1-xfer"; - i2c2_xfer = "/pinctrl/i2c2/i2c2-xfer"; - i2c3_xfer = "/pinctrl/i2c3/i2c3-xfer"; - tsadc_otp_gpio = "/pinctrl/tsadc/tsadc-otp-gpio"; - tsadc_otp_out = "/pinctrl/tsadc/tsadc-otp-out"; - uart0_xfer = "/pinctrl/uart0/uart0-xfer"; - uart0_cts = "/pinctrl/uart0/uart0-cts"; - uart0_rts = "/pinctrl/uart0/uart0-rts"; - uart0_rts_gpio = "/pinctrl/uart0/uart0-rts-gpio"; - uart1_xfer = "/pinctrl/uart1/uart1-xfer"; - uart1_cts = "/pinctrl/uart1/uart1-cts"; - uart1_rts = "/pinctrl/uart1/uart1-rts"; - uart1_rts_gpio = "/pinctrl/uart1/uart1-rts-gpio"; - uart2m0_xfer = "/pinctrl/uart2-m0/uart2m0-xfer"; - uart2m1_xfer = "/pinctrl/uart2-m1/uart2m1-xfer"; - uart3m0_xfer = "/pinctrl/uart3-m0/uart3m0-xfer"; - uart3m0_cts = "/pinctrl/uart3-m0/uart3m0-cts"; - uart3m0_rts = "/pinctrl/uart3-m0/uart3m0-rts"; - uart3m0_rts_gpio = "/pinctrl/uart3-m0/uart3m0-rts-gpio"; - uart3m1_xfer = "/pinctrl/uart3-m1/uart3m1-xfer"; - uart3m1_cts = "/pinctrl/uart3-m1/uart3m1-cts"; - uart3m1_rts = "/pinctrl/uart3-m1/uart3m1-rts"; - uart3m1_rts_gpio = "/pinctrl/uart3-m1/uart3m1-rts-gpio"; - uart4_xfer = "/pinctrl/uart4/uart4-xfer"; - uart4_cts = "/pinctrl/uart4/uart4-cts"; - uart4_rts = "/pinctrl/uart4/uart4-rts"; - uart5_xfer = "/pinctrl/uart5/uart5-xfer"; - uart5_cts = "/pinctrl/uart5/uart5-cts"; - uart5_rts = "/pinctrl/uart5/uart5-rts"; - spi0_clk = "/pinctrl/spi0/spi0-clk"; - spi0_csn = "/pinctrl/spi0/spi0-csn"; - spi0_miso = "/pinctrl/spi0/spi0-miso"; - spi0_mosi = "/pinctrl/spi0/spi0-mosi"; - spi0_clk_hs = "/pinctrl/spi0/spi0-clk-hs"; - spi0_miso_hs = "/pinctrl/spi0/spi0-miso-hs"; - spi0_mosi_hs = "/pinctrl/spi0/spi0-mosi-hs"; - spi1_clk = "/pinctrl/spi1/spi1-clk"; - spi1_csn0 = "/pinctrl/spi1/spi1-csn0"; - spi1_csn1 = "/pinctrl/spi1/spi1-csn1"; - spi1_miso = "/pinctrl/spi1/spi1-miso"; - spi1_mosi = "/pinctrl/spi1/spi1-mosi"; - spi1_clk_hs = "/pinctrl/spi1/spi1-clk-hs"; - spi1_miso_hs = "/pinctrl/spi1/spi1-miso-hs"; - spi1_mosi_hs = "/pinctrl/spi1/spi1-mosi-hs"; - pdm_clk0m0 = "/pinctrl/pdm/pdm-clk0m0"; - pdm_clk0m1 = "/pinctrl/pdm/pdm-clk0m1"; - pdm_clk1 = "/pinctrl/pdm/pdm-clk1"; - pdm_sdi0m0 = "/pinctrl/pdm/pdm-sdi0m0"; - pdm_sdi0m1 = "/pinctrl/pdm/pdm-sdi0m1"; - pdm_sdi1 = "/pinctrl/pdm/pdm-sdi1"; - pdm_sdi2 = "/pinctrl/pdm/pdm-sdi2"; - pdm_sdi3 = "/pinctrl/pdm/pdm-sdi3"; - pdm_clk0m0_sleep = "/pinctrl/pdm/pdm-clk0m0-sleep"; - pdm_clk0m_sleep1 = "/pinctrl/pdm/pdm-clk0m1-sleep"; - pdm_clk1_sleep = "/pinctrl/pdm/pdm-clk1-sleep"; - pdm_sdi0m0_sleep = "/pinctrl/pdm/pdm-sdi0m0-sleep"; - pdm_sdi0m1_sleep = "/pinctrl/pdm/pdm-sdi0m1-sleep"; - pdm_sdi1_sleep = "/pinctrl/pdm/pdm-sdi1-sleep"; - pdm_sdi2_sleep = "/pinctrl/pdm/pdm-sdi2-sleep"; - pdm_sdi3_sleep = "/pinctrl/pdm/pdm-sdi3-sleep"; - i2s0_8ch_mclk = "/pinctrl/i2s0/i2s0-8ch-mclk"; - i2s0_8ch_sclktx = "/pinctrl/i2s0/i2s0-8ch-sclktx"; - i2s0_8ch_sclkrx = "/pinctrl/i2s0/i2s0-8ch-sclkrx"; - i2s0_8ch_lrcktx = "/pinctrl/i2s0/i2s0-8ch-lrcktx"; - i2s0_8ch_lrckrx = "/pinctrl/i2s0/i2s0-8ch-lrckrx"; - i2s0_8ch_sdo0 = "/pinctrl/i2s0/i2s0-8ch-sdo0"; - i2s0_8ch_sdo1 = "/pinctrl/i2s0/i2s0-8ch-sdo1"; - i2s0_8ch_sdo2 = "/pinctrl/i2s0/i2s0-8ch-sdo2"; - i2s0_8ch_sdo3 = "/pinctrl/i2s0/i2s0-8ch-sdo3"; - i2s0_8ch_sdi0 = "/pinctrl/i2s0/i2s0-8ch-sdi0"; - i2s0_8ch_sdi1 = "/pinctrl/i2s0/i2s0-8ch-sdi1"; - i2s0_8ch_sdi2 = "/pinctrl/i2s0/i2s0-8ch-sdi2"; - i2s0_8ch_sdi3 = "/pinctrl/i2s0/i2s0-8ch-sdi3"; - i2s1_2ch_mclk = "/pinctrl/i2s1/i2s1-2ch-mclk"; - i2s1_2ch_sclk = "/pinctrl/i2s1/i2s1-2ch-sclk"; - i2s1_2ch_lrck = "/pinctrl/i2s1/i2s1-2ch-lrck"; - i2s1_2ch_sdi = "/pinctrl/i2s1/i2s1-2ch-sdi"; - i2s1_2ch_sdo = "/pinctrl/i2s1/i2s1-2ch-sdo"; - i2s2_2ch_mclk = "/pinctrl/i2s2/i2s2-2ch-mclk"; - i2s2_2ch_sclk = "/pinctrl/i2s2/i2s2-2ch-sclk"; - i2s2_2ch_lrck = "/pinctrl/i2s2/i2s2-2ch-lrck"; - i2s2_2ch_sdi = "/pinctrl/i2s2/i2s2-2ch-sdi"; - i2s2_2ch_sdo = "/pinctrl/i2s2/i2s2-2ch-sdo"; - sdmmc_clk = "/pinctrl/sdmmc/sdmmc-clk"; - sdmmc_cmd = "/pinctrl/sdmmc/sdmmc-cmd"; - sdmmc_det = "/pinctrl/sdmmc/sdmmc-det"; - sdmmc_bus1 = "/pinctrl/sdmmc/sdmmc-bus1"; - sdmmc_bus4 = "/pinctrl/sdmmc/sdmmc-bus4"; - sdmmc_gpio = "/pinctrl/sdmmc/sdmmc-gpio"; - sdio_clk = "/pinctrl/sdio/sdio-clk"; - sdio_cmd = "/pinctrl/sdio/sdio-cmd"; - sdio_bus4 = "/pinctrl/sdio/sdio-bus4"; - sdio_gpio = "/pinctrl/sdio/sdio-gpio"; - emmc_clk = "/pinctrl/emmc/emmc-clk"; - emmc_cmd = "/pinctrl/emmc/emmc-cmd"; - emmc_pwren = "/pinctrl/emmc/emmc-pwren"; - emmc_rstnout = "/pinctrl/emmc/emmc-rstnout"; - emmc_bus1 = "/pinctrl/emmc/emmc-bus1"; - emmc_bus4 = "/pinctrl/emmc/emmc-bus4"; - emmc_bus8 = "/pinctrl/emmc/emmc-bus8"; - flash_cs0 = "/pinctrl/flash/flash-cs0"; - flash_rdy = "/pinctrl/flash/flash-rdy"; - flash_dqs = "/pinctrl/flash/flash-dqs"; - flash_ale = "/pinctrl/flash/flash-ale"; - flash_cle = "/pinctrl/flash/flash-cle"; - flash_wrn = "/pinctrl/flash/flash-wrn"; - flash_csl = "/pinctrl/flash/flash-csl"; - flash_rdn = "/pinctrl/flash/flash-rdn"; - flash_bus8 = "/pinctrl/flash/flash-bus8"; - lcdc_m0_rgb_pins = "/pinctrl/lcdc/lcdc-m0-rgb-pins"; - lcdc_m0_sleep_pins = "/pinctrl/lcdc/lcdc-m0-sleep-pins"; - lcdc_m1_rgb_pins = "/pinctrl/lcdc/lcdc-m1-rgb-pins"; - lcdc_m1_sleep_pins = "/pinctrl/lcdc/lcdc-m1-sleep-pins"; - pwm0_pin = "/pinctrl/pwm0/pwm0-pin"; - pwm1_pin = "/pinctrl/pwm1/pwm1-pin"; - pwm2_pin = "/pinctrl/pwm2/pwm2-pin"; - pwm3_pin = "/pinctrl/pwm3/pwm3-pin"; - pwm4_pin = "/pinctrl/pwm4/pwm4-pin"; - pwm5_pin = "/pinctrl/pwm5/pwm5-pin"; - pwm6_pin = "/pinctrl/pwm6/pwm6-pin"; - pwm7_pin = "/pinctrl/pwm7/pwm7-pin"; - rmii_pins = "/pinctrl/gmac/rmii-pins"; - mac_refclk_12ma = "/pinctrl/gmac/mac-refclk-12ma"; - mac_refclk = "/pinctrl/gmac/mac-refclk"; - cif_clkout_m0 = "/pinctrl/cif-m0/cif-clkout-m0"; - dvp_d2d9_m0 = "/pinctrl/cif-m0/dvp-d2d9-m0"; - dvp_d0d1_m0 = "/pinctrl/cif-m0/dvp-d0d1-m0"; - dvp_d10d11_m0 = "/pinctrl/cif-m0/d10-d11-m0"; - cif_clkout_m1 = "/pinctrl/cif-m1/cif-clkout-m1"; - dvp_d2d9_m1 = "/pinctrl/cif-m1/dvp-d2d9-m1"; - dvp_d0d1_m1 = "/pinctrl/cif-m1/dvp-d0d1-m1"; - dvp_d10d11_m1 = "/pinctrl/cif-m1/d10-d11-m1"; - isp_prelight = "/pinctrl/isp/isp-prelight"; - pmic_int = "/pinctrl/pmic/pmic_int"; - soc_slppin_gpio = "/pinctrl/pmic/soc_slppin_gpio"; - soc_slppin_slp = "/pinctrl/pmic/soc_slppin_slp"; - soc_slppin_rst = "/pinctrl/pmic/soc_slppin_rst"; - led_pins = "/pinctrl/leds/led-pins"; - btn_pins = "/pinctrl/btns/btn-pins"; - drm_logo = "/reserved-memory/drm-logo@00000000"; - ramoops_mem = "/reserved-memory/region@110000"; - gpio_keys = "/odroidgo3-keys"; - joypad = "/odroidgo3-joypad"; - leds = "/gpio_leds"; - backlight = "/backlight"; - vccsys = "/vccsys"; - }; -}; diff --git a/config/archr-dts/R36S-DTB/DTS/Panel5.dts b/config/archr-dts/R36S-DTB/DTS/Panel5.dts deleted file mode 100644 index 6d5b540b37..0000000000 --- a/config/archr-dts/R36S-DTB/DTS/Panel5.dts +++ /dev/null @@ -1,4079 +0,0 @@ -/dts-v1/; - -/ { - compatible = "rockchip,rk3326-odroidgo3-linux\0rockchip,rk3326"; - interrupt-parent = <0x01>; - #address-cells = <0x02>; - #size-cells = <0x02>; - model = "Rockchip RK3326"; - - ddr_timing { - compatible = "rockchip,ddr-timing"; - ddr2_speed_bin = <0x00>; - ddr3_speed_bin = <0x15>; - ddr4_speed_bin = <0x0c>; - pd_idle = <0x0d>; - sr_idle = <0x5d>; - sr_mc_gate_idle = <0x00>; - srpd_lite_idle = <0x00>; - standby_idle = <0x00>; - auto_pd_dis_freq = <0x42a>; - auto_sr_dis_freq = <0x320>; - ddr2_dll_dis_freq = <0x12c>; - ddr3_dll_dis_freq = <0x12c>; - ddr4_dll_dis_freq = <0x271>; - phy_dll_dis_freq = <0x190>; - ddr2_odt_dis_freq = <0x64>; - phy_ddr2_odt_dis_freq = <0x64>; - ddr2_drv = <0x01>; - ddr2_odt = <0x96>; - phy_ddr2_ca_drv = <0x15>; - phy_ddr2_ck_drv = <0x12>; - phy_ddr2_dq_drv = <0x15>; - phy_ddr2_odt = <0x02>; - ddr3_odt_dis_freq = <0x190>; - phy_ddr3_odt_dis_freq = <0x190>; - ddr3_drv = <0x28>; - ddr3_odt = <0x78>; - phy_ddr3_ca_drv = <0x15>; - phy_ddr3_ck_drv = <0x12>; - phy_ddr3_dq_drv = <0x15>; - phy_ddr3_odt = <0x02>; - phy_lpddr2_odt_dis_freq = <0x29a>; - lpddr2_drv = <0x28>; - phy_lpddr2_ca_drv = <0x16>; - phy_lpddr2_ck_drv = <0x13>; - phy_lpddr2_dq_drv = <0x16>; - phy_lpddr2_odt = <0x00>; - lpddr3_odt_dis_freq = <0x190>; - phy_lpddr3_odt_dis_freq = <0x190>; - lpddr3_drv = <0x28>; - lpddr3_odt = <0xf0>; - phy_lpddr3_ca_drv = <0x16>; - phy_lpddr3_ck_drv = <0x13>; - phy_lpddr3_dq_drv = <0x16>; - phy_lpddr3_odt = <0x02>; - lpddr4_odt_dis_freq = <0x320>; - phy_lpddr4_odt_dis_freq = <0x320>; - lpddr4_drv = <0x3c>; - lpddr4_dq_odt = <0x28>; - lpddr4_ca_odt = <0x28>; - phy_lpddr4_ca_drv = <0x14>; - phy_lpddr4_ck_cs_drv = <0x06>; - phy_lpddr4_dq_drv = <0x06>; - phy_lpddr4_odt = <0x10>; - ddr4_odt_dis_freq = <0x29a>; - phy_ddr4_odt_dis_freq = <0x29a>; - ddr4_drv = <0x22>; - ddr4_odt = <0xf0>; - phy_ddr4_ca_drv = <0x16>; - phy_ddr4_ck_drv = <0x13>; - phy_ddr4_dq_drv = <0x16>; - phy_ddr4_odt = <0x02>; - ddr3a1_ddr4a9_de-skew = <0x06>; - ddr3a0_ddr4a10_de-skew = <0x07>; - ddr3a3_ddr4a6_de-skew = <0x07>; - ddr3a2_ddr4a4_de-skew = <0x07>; - ddr3a5_ddr4a8_de-skew = <0x07>; - ddr3a4_ddr4a5_de-skew = <0x07>; - ddr3a7_ddr4a11_de-skew = <0x07>; - ddr3a6_ddr4a7_de-skew = <0x06>; - ddr3a9_ddr4a0_de-skew = <0x07>; - ddr3a8_ddr4a13_de-skew = <0x07>; - ddr3a11_ddr4a3_de-skew = <0x07>; - ddr3a10_ddr4cs0_de-skew = <0x07>; - ddr3a13_ddr4a2_de-skew = <0x07>; - ddr3a12_ddr4ba1_de-skew = <0x07>; - ddr3a15_ddr4odt0_de-skew = <0x07>; - ddr3a14_ddr4a1_de-skew = <0x07>; - ddr3ba1_ddr4a15_de-skew = <0x07>; - ddr3ba0_ddr4bg0_de-skew = <0x07>; - ddr3ras_ddr4cke_de-skew = <0x07>; - ddr3ba2_ddr4ba0_de-skew = <0x07>; - ddr3we_ddr4bg1_de-skew = <0x07>; - ddr3cas_ddr4a12_de-skew = <0x07>; - ddr3ckn_ddr4ckn_de-skew = <0x07>; - ddr3ckp_ddr4ckp_de-skew = <0x07>; - ddr3cke_ddr4a16_de-skew = <0x07>; - ddr3odt0_ddr4a14_de-skew = <0x07>; - ddr3cs0_ddr4act_de-skew = <0x06>; - ddr3reset_ddr4reset_de-skew = <0x07>; - ddr3cs1_ddr4cs1_de-skew = <0x06>; - ddr3odt1_ddr4odt1_de-skew = <0x07>; - cs0_dm0_rx_de-skew = <0x07>; - cs0_dm0_tx_de-skew = <0x07>; - cs0_dq0_rx_de-skew = <0x08>; - cs0_dq0_tx_de-skew = <0x08>; - cs0_dq1_rx_de-skew = <0x09>; - cs0_dq1_tx_de-skew = <0x08>; - cs0_dq2_rx_de-skew = <0x08>; - cs0_dq2_tx_de-skew = <0x08>; - cs0_dq3_rx_de-skew = <0x08>; - cs0_dq3_tx_de-skew = <0x08>; - cs0_dq4_rx_de-skew = <0x09>; - cs0_dq4_tx_de-skew = <0x08>; - cs0_dq5_rx_de-skew = <0x09>; - cs0_dq5_tx_de-skew = <0x08>; - cs0_dq6_rx_de-skew = <0x09>; - cs0_dq6_tx_de-skew = <0x08>; - cs0_dq7_rx_de-skew = <0x08>; - cs0_dq7_tx_de-skew = <0x08>; - cs0_dqs0_rx_de-skew = <0x06>; - cs0_dqs0p_tx_de-skew = <0x09>; - cs0_dqs0n_tx_de-skew = <0x09>; - cs0_dm1_rx_de-skew = <0x07>; - cs0_dm1_tx_de-skew = <0x06>; - cs0_dq8_rx_de-skew = <0x08>; - cs0_dq8_tx_de-skew = <0x07>; - cs0_dq9_rx_de-skew = <0x09>; - cs0_dq9_tx_de-skew = <0x07>; - cs0_dq10_rx_de-skew = <0x08>; - cs0_dq10_tx_de-skew = <0x08>; - cs0_dq11_rx_de-skew = <0x08>; - cs0_dq11_tx_de-skew = <0x07>; - cs0_dq12_rx_de-skew = <0x08>; - cs0_dq12_tx_de-skew = <0x08>; - cs0_dq13_rx_de-skew = <0x09>; - cs0_dq13_tx_de-skew = <0x07>; - cs0_dq14_rx_de-skew = <0x09>; - cs0_dq14_tx_de-skew = <0x08>; - cs0_dq15_rx_de-skew = <0x09>; - cs0_dq15_tx_de-skew = <0x07>; - cs0_dqs1_rx_de-skew = <0x07>; - cs0_dqs1p_tx_de-skew = <0x09>; - cs0_dqs1n_tx_de-skew = <0x09>; - cs0_dm2_rx_de-skew = <0x07>; - cs0_dm2_tx_de-skew = <0x07>; - cs0_dq16_rx_de-skew = <0x09>; - cs0_dq16_tx_de-skew = <0x09>; - cs0_dq17_rx_de-skew = <0x07>; - cs0_dq17_tx_de-skew = <0x09>; - cs0_dq18_rx_de-skew = <0x07>; - cs0_dq18_tx_de-skew = <0x08>; - cs0_dq19_rx_de-skew = <0x07>; - cs0_dq19_tx_de-skew = <0x09>; - cs0_dq20_rx_de-skew = <0x09>; - cs0_dq20_tx_de-skew = <0x09>; - cs0_dq21_rx_de-skew = <0x09>; - cs0_dq21_tx_de-skew = <0x09>; - cs0_dq22_rx_de-skew = <0x08>; - cs0_dq22_tx_de-skew = <0x09>; - cs0_dq23_rx_de-skew = <0x08>; - cs0_dq23_tx_de-skew = <0x09>; - cs0_dqs2_rx_de-skew = <0x06>; - cs0_dqs2p_tx_de-skew = <0x09>; - cs0_dqs2n_tx_de-skew = <0x09>; - cs0_dm3_rx_de-skew = <0x07>; - cs0_dm3_tx_de-skew = <0x07>; - cs0_dq24_rx_de-skew = <0x08>; - cs0_dq24_tx_de-skew = <0x08>; - cs0_dq25_rx_de-skew = <0x09>; - cs0_dq25_tx_de-skew = <0x09>; - cs0_dq26_rx_de-skew = <0x09>; - cs0_dq26_tx_de-skew = <0x08>; - cs0_dq27_rx_de-skew = <0x09>; - cs0_dq27_tx_de-skew = <0x08>; - cs0_dq28_rx_de-skew = <0x09>; - cs0_dq28_tx_de-skew = <0x09>; - cs0_dq29_rx_de-skew = <0x09>; - cs0_dq29_tx_de-skew = <0x09>; - cs0_dq30_rx_de-skew = <0x08>; - cs0_dq30_tx_de-skew = <0x08>; - cs0_dq31_rx_de-skew = <0x08>; - cs0_dq31_tx_de-skew = <0x08>; - cs0_dqs3_rx_de-skew = <0x07>; - cs0_dqs3p_tx_de-skew = <0x09>; - cs0_dqs3n_tx_de-skew = <0x09>; - cs1_dm0_rx_de-skew = <0x07>; - cs1_dm0_tx_de-skew = <0x07>; - cs1_dq0_rx_de-skew = <0x08>; - cs1_dq0_tx_de-skew = <0x08>; - cs1_dq1_rx_de-skew = <0x09>; - cs1_dq1_tx_de-skew = <0x08>; - cs1_dq2_rx_de-skew = <0x08>; - cs1_dq2_tx_de-skew = <0x08>; - cs1_dq3_rx_de-skew = <0x08>; - cs1_dq3_tx_de-skew = <0x08>; - cs1_dq4_rx_de-skew = <0x08>; - cs1_dq4_tx_de-skew = <0x08>; - cs1_dq5_rx_de-skew = <0x09>; - cs1_dq5_tx_de-skew = <0x08>; - cs1_dq6_rx_de-skew = <0x09>; - cs1_dq6_tx_de-skew = <0x08>; - cs1_dq7_rx_de-skew = <0x08>; - cs1_dq7_tx_de-skew = <0x08>; - cs1_dqs0_rx_de-skew = <0x06>; - cs1_dqs0p_tx_de-skew = <0x09>; - cs1_dqs0n_tx_de-skew = <0x09>; - cs1_dm1_rx_de-skew = <0x07>; - cs1_dm1_tx_de-skew = <0x07>; - cs1_dq8_rx_de-skew = <0x08>; - cs1_dq8_tx_de-skew = <0x08>; - cs1_dq9_rx_de-skew = <0x08>; - cs1_dq9_tx_de-skew = <0x07>; - cs1_dq10_rx_de-skew = <0x07>; - cs1_dq10_tx_de-skew = <0x08>; - cs1_dq11_rx_de-skew = <0x08>; - cs1_dq11_tx_de-skew = <0x08>; - cs1_dq12_rx_de-skew = <0x08>; - cs1_dq12_tx_de-skew = <0x07>; - cs1_dq13_rx_de-skew = <0x08>; - cs1_dq13_tx_de-skew = <0x08>; - cs1_dq14_rx_de-skew = <0x08>; - cs1_dq14_tx_de-skew = <0x08>; - cs1_dq15_rx_de-skew = <0x08>; - cs1_dq15_tx_de-skew = <0x07>; - cs1_dqs1_rx_de-skew = <0x07>; - cs1_dqs1p_tx_de-skew = <0x09>; - cs1_dqs1n_tx_de-skew = <0x09>; - cs1_dm2_rx_de-skew = <0x07>; - cs1_dm2_tx_de-skew = <0x08>; - cs1_dq16_rx_de-skew = <0x08>; - cs1_dq16_tx_de-skew = <0x09>; - cs1_dq17_rx_de-skew = <0x08>; - cs1_dq17_tx_de-skew = <0x09>; - cs1_dq18_rx_de-skew = <0x07>; - cs1_dq18_tx_de-skew = <0x08>; - cs1_dq19_rx_de-skew = <0x08>; - cs1_dq19_tx_de-skew = <0x09>; - cs1_dq20_rx_de-skew = <0x09>; - cs1_dq20_tx_de-skew = <0x09>; - cs1_dq21_rx_de-skew = <0x09>; - cs1_dq21_tx_de-skew = <0x09>; - cs1_dq22_rx_de-skew = <0x08>; - cs1_dq22_tx_de-skew = <0x09>; - cs1_dq23_rx_de-skew = <0x08>; - cs1_dq23_tx_de-skew = <0x09>; - cs1_dqs2_rx_de-skew = <0x06>; - cs1_dqs2p_tx_de-skew = <0x09>; - cs1_dqs2n_tx_de-skew = <0x09>; - cs1_dm3_rx_de-skew = <0x07>; - cs1_dm3_tx_de-skew = <0x07>; - cs1_dq24_rx_de-skew = <0x08>; - cs1_dq24_tx_de-skew = <0x09>; - cs1_dq25_rx_de-skew = <0x09>; - cs1_dq25_tx_de-skew = <0x09>; - cs1_dq26_rx_de-skew = <0x09>; - cs1_dq26_tx_de-skew = <0x08>; - cs1_dq27_rx_de-skew = <0x08>; - cs1_dq27_tx_de-skew = <0x08>; - cs1_dq28_rx_de-skew = <0x09>; - cs1_dq28_tx_de-skew = <0x09>; - cs1_dq29_rx_de-skew = <0x09>; - cs1_dq29_tx_de-skew = <0x09>; - cs1_dq30_rx_de-skew = <0x09>; - cs1_dq30_tx_de-skew = <0x08>; - cs1_dq31_rx_de-skew = <0x08>; - cs1_dq31_tx_de-skew = <0x08>; - cs1_dqs3_rx_de-skew = <0x07>; - cs1_dqs3p_tx_de-skew = <0x09>; - cs1_dqs3n_tx_de-skew = <0x09>; - phandle = <0xab>; - }; - - aliases { - ethernet0 = "/ethernet@ff360000"; - i2c0 = "/i2c@ff180000"; - i2c1 = "/i2c@ff190000"; - i2c2 = "/i2c@ff1a0000"; - i2c3 = "/i2c@ff1b0000"; - serial0 = "/serial@ff030000"; - serial1 = "/serial@ff158000"; - serial2 = "/serial@ff160000"; - serial3 = "/serial@ff168000"; - serial4 = "/serial@ff170000"; - serial5 = "/serial@ff178000"; - spi0 = "/spi@ff1d0000"; - spi1 = "/spi@ff1d8000"; - }; - - cpus { - #address-cells = <0x02>; - #size-cells = <0x00>; - - cpu@0 { - device_type = "cpu"; - compatible = "arm,cortex-a35\0arm,armv8"; - reg = <0x00 0x00>; - enable-method = "psci"; - clocks = <0x02 0x07>; - #cooling-cells = <0x02>; - dynamic-power-coefficient = <0x5a>; - operating-points-v2 = <0x03>; - cpu-idle-states = <0x04 0x05>; - cpu-supply = <0x06>; - phandle = <0x09>; - }; - - cpu@1 { - device_type = "cpu"; - compatible = "arm,cortex-a35\0arm,armv8"; - reg = <0x00 0x01>; - enable-method = "psci"; - operating-points-v2 = <0x03>; - cpu-idle-states = <0x04 0x05>; - phandle = <0x0a>; - }; - - cpu@2 { - device_type = "cpu"; - compatible = "arm,cortex-a35\0arm,armv8"; - reg = <0x00 0x02>; - enable-method = "psci"; - operating-points-v2 = <0x03>; - cpu-idle-states = <0x04 0x05>; - phandle = <0x0b>; - }; - - cpu@3 { - device_type = "cpu"; - compatible = "arm,cortex-a35\0arm,armv8"; - reg = <0x00 0x03>; - enable-method = "psci"; - operating-points-v2 = <0x03>; - cpu-idle-states = <0x04 0x05>; - phandle = <0x0c>; - }; - - idle-states { - entry-method = "psci"; - - cpu-sleep { - compatible = "arm,idle-state"; - local-timer-stop; - arm,psci-suspend-param = <0x10000>; - entry-latency-us = <0x78>; - exit-latency-us = <0xfa>; - min-residency-us = <0x384>; - phandle = <0x04>; - }; - - cluster-sleep { - compatible = "arm,idle-state"; - local-timer-stop; - arm,psci-suspend-param = <0x1010000>; - entry-latency-us = <0x190>; - exit-latency-us = <0x1f4>; - min-residency-us = <0x7d0>; - phandle = <0x05>; - }; - }; - }; - - cpu0-opp-table { - compatible = "operating-points-v2"; - opp-shared; - rockchip,temp-hysteresis = <0x1388>; - rockchip,low-temp = <0x00>; - rockchip,low-temp-min-volt = <0xf4240>; - rockchip,low-temp-adjust-volt = <0x00 0x5e8 0xc350>; - clocks = <0x02 0x01>; - rockchip,avs-scale = <0x04>; - rockchip,max-volt = <0x149970>; - rockchip,evb-irdrop = <0x61a8>; - nvmem-cells = <0x07 0x08>; - nvmem-cell-names = "cpu_leakage\0performance"; - rockchip,bin-scaling-sel = <0x00 0x0d 0x01 0x0d>; - rockchip,pvtm-voltage-sel = <0x00 0xc350 0x00 0xc351 0xd2f0 0x01 0xd2f1 0xea60 0x02 0xea61 0x1869f 0x03>; - rockchip,pvtm-freq = <0x639c0>; - rockchip,pvtm-volt = <0xf4240>; - rockchip,pvtm-ch = <0x00 0x00>; - rockchip,pvtm-sample-time = <0x3e8>; - rockchip,pvtm-number = <0x0a>; - rockchip,pvtm-error = <0x3e8>; - rockchip,pvtm-ref-temp = <0x28>; - rockchip,pvtm-temp-prop = <0xffffffc8 0xffffffc8>; - rockchip,thermal-zone = "soc-thermal"; - rockchip,avs = <0x01>; - phandle = <0x03>; - - opp-1008000000 { - opp-hz = <0x00 0x3c14dc00>; - opp-microvolt = <0x11edd8 0x11edd8 0x149970>; - opp-microvolt-L0 = <0x11edd8 0x11edd8 0x149970>; - opp-microvolt-L1 = <0x112a88 0x112a88 0x149970>; - opp-microvolt-L2 = <0x112a88 0x112a88 0x149970>; - opp-microvolt-L3 = <0x100590 0x100590 0x149970>; - clock-latency-ns = <0x9c40>; - }; - - opp-1200000000 { - opp-hz = <0x00 0x47868c00>; - opp-microvolt = <0x13d620 0x13d620 0x149970>; - opp-microvolt-L0 = <0x13d620 0x13d620 0x149970>; - opp-microvolt-L1 = <0x137478 0x137478 0x149970>; - opp-microvolt-L2 = <0x1312d0 0x1312d0 0x149970>; - opp-microvolt-L3 = <0x124f80 0x124f80 0x149970>; - clock-latency-ns = <0x9c40>; - }; - - opp-1248000000 { - opp-hz = <0x00 0x4a62f800>; - opp-microvolt = <0x149970 0x149970 0x149970>; - opp-microvolt-L0 = <0x149970 0x149970 0x149970>; - opp-microvolt-L1 = <0x13d620 0x13d620 0x149970>; - opp-microvolt-L2 = <0x137478 0x137478 0x149970>; - opp-microvolt-L3 = <0x12b128 0x12b128 0x149970>; - clock-latency-ns = <0x9c40>; - }; - - opp-1296000000 { - opp-hz = <0x00 0x4d3f6400>; - opp-microvolt = <0x149970 0x149970 0x149970>; - opp-microvolt-L0 = <0x149970 0x149970 0x149970>; - opp-microvolt-L1 = <0x149970 0x149970 0x149970>; - opp-microvolt-L2 = <0x13d620 0x13d620 0x149970>; - opp-microvolt-L3 = <0x1312d0 0x1312d0 0x149970>; - clock-latency-ns = <0x9c40>; - }; - }; - - arm-pmu { - compatible = "arm,cortex-a53-pmu"; - interrupts = <0x00 0x64 0x04 0x00 0x65 0x04 0x00 0x66 0x04 0x00 0x67 0x04>; - interrupt-affinity = <0x09 0x0a 0x0b 0x0c>; - }; - - bus-soc { - compatible = "rockchip,px30-bus"; - rockchip,busfreq-policy = "autocs"; - phandle = <0xc1>; - - soc-bus0 { - bus-id = <0x00>; - timer-us = <0x14>; - enable-msk = <0x40f7>; - status = "disabled"; - }; - - soc-bus1 { - bus-id = <0x01>; - timer-us = <0xc8>; - enable-msk = <0x40bf>; - status = "disabled"; - }; - - soc-bus2 { - bus-id = <0x02>; - timer-us = <0xc8>; - enable-msk = <0x4007>; - status = "disabled"; - }; - }; - - bus-apll { - compatible = "rockchip,px30-bus"; - rockchip,busfreq-policy = "clkfreq"; - clocks = <0x02 0x01>; - clock-names = "bus"; - operating-points-v2 = <0x0d>; - status = "okay"; - bus-supply = <0x0e>; - phandle = <0xc2>; - }; - - bus-apll-opp-table { - compatible = "operating-points-v2"; - opp-shared; - phandle = <0x0d>; - - opp-1512000000 { - opp-hz = <0x00 0x5a1f4a00>; - opp-microvolt = <0xf4240>; - }; - - opp-1008000000 { - opp-hz = <0x00 0x3c14dc00>; - opp-microvolt = <0xe7ef0>; - }; - }; - - cpuinfo { - compatible = "rockchip,cpuinfo"; - nvmem-cells = <0x0f>; - nvmem-cell-names = "id"; - }; - - display-subsystem { - compatible = "rockchip,display-subsystem"; - ports = <0x10>; - status = "okay"; - logo-memory-region = <0x11>; - phandle = <0xc3>; - - route { - - route-lvds { - status = "disabled"; - logo,uboot = "logo.bmp"; - logo,kernel = "logo_kernel.bmp"; - logo,mode = "center"; - charge_logo,mode = "center"; - connect = <0x12>; - phandle = <0xc4>; - }; - - route-dsi { - status = "okay"; - logo,uboot = "logo.bmp"; - logo,kernel = "logo_kernel.bmp"; - logo,mode = "center"; - charge_logo,mode = "center"; - connect = <0x13>; - phandle = <0xc5>; - }; - - route-rgb { - status = "disabled"; - logo,uboot = "logo.bmp"; - logo,kernel = "logo_kernel.bmp"; - logo,mode = "center"; - charge_logo,mode = "center"; - connect = <0x14>; - phandle = <0xc6>; - }; - }; - }; - - firmware { - - optee { - compatible = "linaro,optee-tz"; - method = "smc"; - }; - }; - - external-gmac-clock { - compatible = "fixed-clock"; - clock-frequency = <0x2faf080>; - clock-output-names = "gmac_clkin"; - #clock-cells = <0x00>; - phandle = <0xc7>; - }; - - psci { - compatible = "arm,psci-1.0"; - method = "smc"; - }; - - rockchip-suspend { - compatible = "rockchip,pm-px30"; - status = "okay"; - rockchip,sleep-debug-en = <0x01>; - rockchip,sleep-mode-config = <0x20702>; - rockchip,wakeup-config = <0x85>; - phandle = <0xc8>; - }; - - timer { - compatible = "arm,armv8-timer"; - interrupts = <0x01 0x0d 0xf04 0x01 0x0e 0xf04 0x01 0x0b 0xf04 0x01 0x0a 0xf04>; - }; - - xin24m { - compatible = "fixed-clock"; - #clock-cells = <0x00>; - clock-frequency = <0x16e3600>; - clock-output-names = "xin24m"; - phandle = <0xc9>; - }; - - xin32k { - compatible = "fixed-clock"; - #clock-cells = <0x00>; - clock-frequency = <0x8000>; - clock-output-names = "xin32k"; - phandle = <0xca>; - }; - - power-management@ff000000 { - compatible = "rockchip,px30-pmu\0syscon\0simple-mfd"; - reg = <0x00 0xff000000 0x00 0x1000>; - phandle = <0xcb>; - - power-controller { - compatible = "rockchip,px30-power-controller"; - #power-domain-cells = <0x01>; - #address-cells = <0x01>; - #size-cells = <0x00>; - phandle = <0x87>; - - pd_usb@5 { - reg = <0x05>; - clocks = <0x02 0x103 0x02 0x102 0x02 0x3c>; - pm_qos = <0x15 0x16>; - }; - - pd_sdcard@7 { - reg = <0x07>; - clocks = <0x02 0xf7 0x02 0x3b>; - pm_qos = <0x17>; - }; - - pd_gmac@9 { - reg = <0x09>; - clocks = <0x02 0xb2 0x02 0x143 0x02 0x40 0x02 0x3f>; - pm_qos = <0x18>; - }; - - pd_mmc_nand@10 { - reg = <0x0a>; - clocks = <0x02 0xfe 0x02 0x100 0x02 0xff 0x02 0x101 0x02 0x39 0x02 0x37 0x02 0x38 0x02 0x3a>; - pm_qos = <0x19 0x1a 0x1b 0x1c>; - }; - - pd_vpu@11 { - reg = <0x0b>; - clocks = <0x02 0xaf 0x02 0xf4 0x02 0x4b>; - pm_qos = <0x1d 0x1e>; - }; - - pd_vo@12 { - reg = <0x0c>; - clocks = <0x02 0xb7 0x02 0xb5 0x02 0xb6 0x02 0x96 0x02 0x97 0x02 0xfd 0x02 0xfb 0x02 0xfc 0x02 0x144 0x02 0x35 0x02 0x36>; - pm_qos = <0x1f 0x20 0x21 0x22>; - }; - - pd_vi@13 { - reg = <0x0d>; - clocks = <0x02 0xb3 0x02 0xb4 0x02 0xf9 0x02 0xfa 0x02 0x33>; - pm_qos = <0x23 0x24 0x25 0x26 0x27>; - }; - - pd_gpu@14 { - reg = <0x0e>; - clocks = <0x02 0x49>; - pm_qos = <0x28>; - }; - }; - }; - - syscon@ff010000 { - compatible = "rockchip,px30-pmugrf\0syscon\0simple-mfd"; - reg = <0x00 0xff010000 0x00 0x1000>; - #address-cells = <0x01>; - #size-cells = <0x01>; - phandle = <0xa8>; - - io-domains { - compatible = "rockchip,px30-pmu-io-voltage-domain"; - status = "okay"; - pmuio1-supply = <0x29>; - pmuio2-supply = <0x29>; - phandle = <0xcc>; - }; - - reboot-mode { - compatible = "syscon-reboot-mode"; - offset = <0x200>; - mode-bootloader = <0x5242c301>; - mode-charge = <0x5242c30b>; - mode-fastboot = <0x5242c309>; - mode-loader = <0x5242c301>; - mode-normal = <0x5242c300>; - mode-recovery = <0x5242c303>; - mode-ums = <0x5242c30c>; - }; - - pmu-pvtm { - compatible = "rockchip,px30-pmu-pvtm"; - clocks = <0x2a 0x07>; - clock-names = "pmu"; - status = "okay"; - phandle = <0xcd>; - }; - }; - - serial@ff030000 { - compatible = "rockchip,px30-uart\0snps,dw-apb-uart"; - reg = <0x00 0xff030000 0x00 0x100>; - interrupts = <0x00 0x0f 0x04>; - clocks = <0x2a 0x06 0x2a 0x15>; - clock-names = "baudclk\0apb_pclk"; - reg-shift = <0x02>; - reg-io-width = <0x04>; - dmas = <0x2b 0x00 0x2b 0x01>; - pinctrl-names = "default"; - pinctrl-0 = <0x2c 0x2d 0x2e>; - status = "disabled"; - phandle = <0xce>; - }; - - i2s@ff060000 { - compatible = "rockchip,px30-i2s-tdm"; - reg = <0x00 0xff060000 0x00 0x1000>; - interrupts = <0x00 0x0c 0x04>; - clocks = <0x02 0x10 0x02 0x12 0x02 0x106>; - clock-names = "mclk_tx\0mclk_rx\0hclk"; - dmas = <0x2b 0x10 0x2b 0x11>; - dma-names = "tx\0rx"; - resets = <0x02 0x84 0x02 0xbf>; - reset-names = "tx-m\0rx-m"; - rockchip,cru = <0x02>; - rockchip,grf = <0x2f>; - pinctrl-names = "default"; - pinctrl-0 = <0x30 0x31 0x32 0x33 0x34 0x35 0x36 0x37 0x38 0x39 0x3a 0x3b>; - status = "disabled"; - phandle = <0xcf>; - }; - - i2s@ff070000 { - compatible = "rockchip,px30-i2s\0rockchip,rk3066-i2s"; - reg = <0x00 0xff070000 0x00 0x1000>; - interrupts = <0x00 0x0d 0x04>; - clocks = <0x02 0x14 0x02 0x107>; - clock-names = "i2s_clk\0i2s_hclk"; - dmas = <0x2b 0x12 0x2b 0x13>; - dma-names = "tx\0rx"; - resets = <0x02 0x86 0x02 0x85>; - reset-names = "reset-m\0reset-h"; - pinctrl-names = "default"; - pinctrl-0 = <0x3c 0x3d 0x3e 0x3f>; - status = "okay"; - #sound-dai-cells = <0x00>; - phandle = <0xbd>; - }; - - i2s@ff080000 { - compatible = "rockchip,px30-i2s\0rockchip,rk3066-i2s"; - reg = <0x00 0xff080000 0x00 0x1000>; - interrupts = <0x00 0x0e 0x04>; - clocks = <0x02 0x16 0x02 0x108>; - clock-names = "i2s_clk\0i2s_hclk"; - dmas = <0x2b 0x14 0x2b 0x15>; - dma-names = "tx\0rx"; - resets = <0x02 0x88 0x02 0x87>; - reset-names = "reset-m\0reset-h"; - pinctrl-names = "default"; - pinctrl-0 = <0x40 0x41 0x42 0x43>; - status = "disabled"; - phandle = <0xd0>; - }; - - pdm@ff0a0000 { - compatible = "rockchip,px30-pdm\0rockchip,pdm"; - reg = <0x00 0xff0a0000 0x00 0x1000>; - clocks = <0x02 0x0f 0x02 0x105>; - clock-names = "pdm_clk\0pdm_hclk"; - dmas = <0x2b 0x18>; - dma-names = "rx"; - resets = <0x02 0x82>; - reset-names = "pdm-m"; - pinctrl-names = "default"; - pinctrl-0 = <0x44 0x45 0x46 0x47 0x48>; - status = "disabled"; - phandle = <0xd1>; - }; - - crypto@ff0b0000 { - compatible = "rockchip,px30-crypto"; - reg = <0x00 0xff0b0000 0x00 0x4000>; - interrupts = <0x00 0x52 0x04>; - clocks = <0x02 0xac 0x02 0xf1 0x02 0x30 0x02 0x31>; - clock-names = "aclk\0hclk\0sclk\0apb_pclk"; - resets = <0x02 0x74>; - reset-names = "crypto-rst"; - status = "disabled"; - phandle = <0xd2>; - }; - - rng@ff0b0000 { - compatible = "rockchip,cryptov2-rng"; - reg = <0x00 0xff0b0000 0x00 0x4000>; - clocks = <0x02 0x30 0x02 0x31 0x02 0xac 0x02 0xf1>; - clock-names = "clk_crypto\0clk_crypto_apk\0aclk_crypto\0hclk_crypto"; - assigned-clocks = <0x02 0x30 0x02 0x31 0x02 0xac 0x02 0xf1>; - assigned-clock-rates = <0x8f0d180 0x8f0d180 0xbebc200 0x5f5e100>; - resets = <0x02 0x74>; - reset-names = "reset"; - status = "okay"; - phandle = <0xd3>; - }; - - interrupt-controller@ff131000 { - compatible = "arm,gic-400"; - #interrupt-cells = <0x03>; - #address-cells = <0x00>; - interrupt-controller; - reg = <0x00 0xff131000 0x00 0x1000 0x00 0xff132000 0x00 0x2000 0x00 0xff134000 0x00 0x2000 0x00 0xff136000 0x00 0x2000>; - interrupts = <0x01 0x09 0xf04>; - phandle = <0x01>; - }; - - syscon@ff140000 { - compatible = "rockchip,px30-grf\0syscon\0simple-mfd"; - reg = <0x00 0xff140000 0x00 0x1000>; - #address-cells = <0x01>; - #size-cells = <0x01>; - phandle = <0x2f>; - - io-domains { - compatible = "rockchip,px30-io-voltage-domain"; - status = "okay"; - vccio1-supply = <0x49>; - vccio2-supply = <0x49>; - vccio3-supply = <0x4a>; - vccio4-supply = <0x4a>; - vccio5-supply = <0x4a>; - vccio6-supply = <0x4a>; - phandle = <0xd4>; - }; - - lvds { - compatible = "rockchip,px30-lvds"; - phys = <0x4b>; - phy-names = "phy"; - status = "disabled"; - phandle = <0xd5>; - - ports { - #address-cells = <0x01>; - #size-cells = <0x00>; - - port@0 { - reg = <0x00>; - #address-cells = <0x01>; - #size-cells = <0x00>; - - endpoint@0 { - reg = <0x00>; - remote-endpoint = <0x12>; - phandle = <0x9e>; - }; - }; - }; - }; - - rgb { - compatible = "rockchip,px30-rgb"; - pinctrl-names = "default\0sleep"; - pinctrl-0 = <0x4c>; - pinctrl-1 = <0x4d>; - status = "disabled"; - phys = <0x4b>; - phy-names = "phy"; - phandle = <0xd6>; - - ports { - #address-cells = <0x01>; - #size-cells = <0x00>; - - port@0 { - reg = <0x00>; - #address-cells = <0x01>; - #size-cells = <0x00>; - - endpoint@0 { - reg = <0x00>; - remote-endpoint = <0x14>; - phandle = <0xa0>; - }; - }; - }; - }; - }; - - syscon@ff148000 { - compatible = "syscon\0simple-mfd"; - reg = <0x00 0xff148000 0x00 0x1000>; - #address-cells = <0x01>; - #size-cells = <0x01>; - phandle = <0xd7>; - - pvtm { - compatible = "rockchip,px30-pvtm"; - clocks = <0x02 0x4a>; - clock-names = "core"; - status = "okay"; - phandle = <0xd8>; - }; - }; - - serial@ff158000 { - compatible = "rockchip,px30-uart\0snps,dw-apb-uart"; - reg = <0x00 0xff158000 0x00 0x100>; - interrupts = <0x00 0x10 0x04>; - clocks = <0x02 0x18 0x02 0x149>; - clock-names = "baudclk\0apb_pclk"; - reg-shift = <0x02>; - reg-io-width = <0x04>; - dmas = <0x2b 0x02 0x2b 0x03>; - pinctrl-names = "default"; - status = "disabled"; - phandle = <0xd9>; - }; - - serial@ff160000 { - compatible = "rockchip,px30-uart\0snps,dw-apb-uart"; - reg = <0x00 0xff160000 0x00 0x100>; - interrupts = <0x00 0x11 0x04>; - clocks = <0x02 0x19 0x02 0x14a>; - clock-names = "baudclk\0apb_pclk"; - reg-shift = <0x02>; - reg-io-width = <0x04>; - dmas = <0x2b 0x04 0x2b 0x05>; - pinctrl-names = "default"; - pinctrl-0 = <0x4e>; - status = "disabled"; - phandle = <0xda>; - }; - - serial@ff168000 { - compatible = "rockchip,px30-uart\0snps,dw-apb-uart"; - reg = <0x00 0xff168000 0x00 0x100>; - interrupts = <0x00 0x12 0x04>; - clocks = <0x02 0x1a 0x02 0x14b>; - clock-names = "baudclk\0apb_pclk"; - reg-shift = <0x02>; - reg-io-width = <0x04>; - dmas = <0x2b 0x06 0x2b 0x07>; - pinctrl-names = "default"; - pinctrl-0 = <0x4f 0x50 0x51>; - status = "disabled"; - phandle = <0xdb>; - }; - - serial@ff170000 { - compatible = "rockchip,px30-uart\0snps,dw-apb-uart"; - reg = <0x00 0xff170000 0x00 0x100>; - interrupts = <0x00 0x13 0x04>; - clocks = <0x02 0x1b 0x02 0x14c>; - clock-names = "baudclk\0apb_pclk"; - reg-shift = <0x02>; - reg-io-width = <0x04>; - dmas = <0x2b 0x08 0x2b 0x09>; - pinctrl-names = "default"; - pinctrl-0 = <0x52 0x53 0x54>; - status = "disabled"; - phandle = <0xdc>; - }; - - serial@ff178000 { - compatible = "rockchip,px30-uart\0snps,dw-apb-uart"; - reg = <0x00 0xff178000 0x00 0x100>; - interrupts = <0x00 0x14 0x04>; - clocks = <0x02 0x1c 0x02 0x14d>; - clock-names = "baudclk\0apb_pclk"; - reg-shift = <0x02>; - reg-io-width = <0x04>; - dmas = <0x2b 0x0a 0x2b 0x0b>; - pinctrl-names = "default"; - pinctrl-0 = <0x55 0x56 0x57>; - status = "disabled"; - phandle = <0xdd>; - }; - - i2c@ff180000 { - compatible = "rockchip,rk3399-i2c"; - reg = <0x00 0xff180000 0x00 0x1000>; - clocks = <0x02 0x1d 0x02 0x14e>; - clock-names = "i2c\0pclk"; - interrupts = <0x00 0x07 0x04>; - pinctrl-names = "default"; - pinctrl-0 = <0x58>; - #address-cells = <0x01>; - #size-cells = <0x00>; - status = "okay"; - clock-frequency = <0x61a80>; - i2c-scl-rising-time-ns = <0x118>; - i2c-scl-falling-time-ns = <0x10>; - phandle = <0xde>; - - pmic@20 { - compatible = "rockchip,rk817"; - reg = <0x20>; - interrupt-parent = <0x59>; - interrupts = <0x07 0x08>; - pinctrl-names = "default\0pmic-sleep\0pmic-power-off\0pmic-reset"; - pinctrl-0 = <0x5a>; - pinctrl-1 = <0x5b 0x5c>; - pinctrl-2 = <0x5d 0x5e>; - pinctrl-3 = <0x5f 0x60>; - rockchip,system-power-controller; - wakeup-source; - #clock-cells = <0x01>; - clock-output-names = "rk808-clkout1\0rk808-clkout2"; - pmic-reset-func = <0x01>; - vcc1-supply = <0x61>; - vcc2-supply = <0x61>; - vcc3-supply = <0x61>; - vcc4-supply = <0x61>; - vcc5-supply = <0x61>; - vcc6-supply = <0x61>; - vcc7-supply = <0x61>; - vcc8-supply = <0x61>; - vcc9-supply = <0x62>; - phandle = <0xdf>; - - pwrkey { - status = "okay"; - }; - - pinctrl_rk8xx { - gpio-controller; - #gpio-cells = <0x02>; - phandle = <0xe0>; - - rk817_ts_gpio1 { - pins = "gpio_ts"; - function = "pin_fun1"; - phandle = <0xe1>; - }; - - rk817_gt_gpio2 { - pins = "gpio_gt"; - function = "pin_fun1"; - phandle = <0xe2>; - }; - - rk817_pin_ts { - pins = "gpio_ts"; - function = "pin_fun0"; - phandle = <0xe3>; - }; - - rk817_pin_gt { - pins = "gpio_gt"; - function = "pin_fun0"; - phandle = <0xe4>; - }; - - rk817_slppin_null { - pins = "gpio_slp"; - function = "pin_fun0"; - phandle = <0xe5>; - }; - - rk817_slppin_slp { - pins = "gpio_slp"; - function = "pin_fun1"; - phandle = <0x5c>; - }; - - rk817_slppin_pwrdn { - pins = "gpio_slp"; - function = "pin_fun2"; - phandle = <0x5e>; - }; - - rk817_slppin_rst { - pins = "gpio_slp"; - function = "pin_fun3"; - phandle = <0x60>; - }; - }; - - regulators { - - DCDC_REG1 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0xe7ef0>; - regulator-max-microvolt = <0x149970>; - regulator-ramp-delay = <0x1771>; - regulator-initial-mode = <0x02>; - regulator-name = "vdd_logic"; - phandle = <0x0e>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <0xe7ef0>; - }; - }; - - DCDC_REG2 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0xe7ef0>; - regulator-max-microvolt = <0x149970>; - regulator-ramp-delay = <0x1771>; - regulator-initial-mode = <0x02>; - regulator-name = "vdd_arm"; - phandle = <0x06>; - - regulator-state-mem { - regulator-off-in-suspend; - regulator-suspend-microvolt = <0xe7ef0>; - }; - }; - - DCDC_REG3 { - regulator-always-on; - regulator-boot-on; - regulator-initial-mode = <0x02>; - regulator-name = "vcc_ddr"; - phandle = <0xe6>; - - regulator-state-mem { - regulator-on-in-suspend; - }; - }; - - DCDC_REG4 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0x325aa0>; - regulator-max-microvolt = <0x325aa0>; - regulator-initial-mode = <0x02>; - regulator-name = "vcc_3v3"; - phandle = <0x4a>; - - regulator-state-mem { - regulator-off-in-suspend; - regulator-suspend-microvolt = <0x325aa0>; - }; - }; - - LDO_REG1 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0xf4240>; - regulator-max-microvolt = <0xf4240>; - regulator-name = "vcc_1v0"; - phandle = <0xe7>; - - regulator-state-mem { - regulator-off-in-suspend; - regulator-suspend-microvolt = <0xf4240>; - }; - }; - - LDO_REG2 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0x1b7740>; - regulator-max-microvolt = <0x1b7740>; - regulator-name = "vcc1v8_soc"; - phandle = <0x85>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <0x1b7740>; - }; - }; - - LDO_REG3 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0xf4240>; - regulator-max-microvolt = <0xf4240>; - regulator-name = "vcc1v0_soc"; - phandle = <0xe8>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <0xf4240>; - }; - }; - - LDO_REG4 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0x2dc6c0>; - regulator-max-microvolt = <0x2dc6c0>; - regulator-name = "vcc3v3_pmu"; - phandle = <0x29>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <0x2dc6c0>; - }; - }; - - LDO_REG5 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0x1b7740>; - regulator-max-microvolt = <0x325aa0>; - regulator-name = "vccio_sd"; - phandle = <0x49>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <0x325aa0>; - }; - }; - - LDO_REG6 { - regulator-min-microvolt = <0x325aa0>; - regulator-max-microvolt = <0x325aa0>; - regulator-name = "vcc_sd"; - phandle = <0x90>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <0x325aa0>; - }; - }; - - LDO_REG7 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0x325aa0>; - regulator-max-microvolt = <0x325aa0>; - regulator-name = "vcc2v8_dvp"; - phandle = <0xe9>; - - regulator-state-mem { - regulator-off-in-suspend; - regulator-suspend-microvolt = <0x325aa0>; - }; - }; - - LDO_REG8 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0x325aa0>; - regulator-max-microvolt = <0x325aa0>; - regulator-name = "vcc_lcd"; - phandle = <0x9a>; - - regulator-state-mem { - regulator-off-in-suspend; - regulator-suspend-microvolt = <0x325aa0>; - }; - }; - - LDO_REG9 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0x10c8e0>; - regulator-max-microvolt = <0x10c8e0>; - regulator-name = "vdd_11"; - phandle = <0xea>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <0x10c8e0>; - }; - }; - - BOOST { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0x47b760>; - regulator-max-microvolt = <0x5265c0>; - regulator-name = "boost"; - phandle = <0x62>; - }; - - OTG_SWITCH { - regulator-boot-on; - regulator-name = "otg_switch"; - phandle = <0xeb>; - }; - }; - - battery { - compatible = "rk817,battery"; - ocv_table = <0xd48 0xd6e 0xd9e 0xdc1 0xdde 0xdf3 0xe02 0xe0f 0xe1c 0xe2c 0xe47 0xe69 0xe87 0xeaa 0xed2 0xefe 0xf2f 0xf66 0xfa5 0xff7 0x1051>; - design_capacity = <0xc54>; - design_qmax = <0xd8f>; - bat_res = <0x84>; - sleep_enter_current = <0x12c>; - sleep_exit_current = <0x12c>; - sleep_filter_current = <0x64>; - power_off_thresd = <0xce4>; - zero_algorithm_vol = <0xf0a>; - max_soc_offset = <0x3c>; - monitor_sec = <0x05>; - virtual_power = <0x00>; - sample_res = <0x0a>; - }; - - charger { - compatible = "rk817,charger"; - min_input_voltage = <0x1194>; - max_input_current = <0x5dc>; - max_chrg_current = <0x7d0>; - max_chrg_voltage = <0x1068>; - chrg_term_mode = <0x00>; - chrg_finish_cur = <0x34>; - virtual_power = <0x00>; - sample_res = <0x0a>; - dc_det_gpio = <0x63 0x17 0x00>; - chg_led_gpio = <0x59 0x01 0x00>; - extcon = <0x64>; - }; - - codec { - #sound-dai-cells = <0x00>; - compatible = "rockchip,rk817-codec"; - clocks = <0x02 0x15>; - clock-names = "mclk"; - pinctrl-names = "default"; - pinctrl-0 = <0x65>; - spk-ctl-gpios = <0x63 0x14 0x00>; - hp-volume = <0x14>; - spk-volume = <0x01>; - status = "okay"; - phandle = <0xbe>; - }; - }; - }; - - i2c@ff190000 { - compatible = "rockchip,rk3399-i2c"; - reg = <0x00 0xff190000 0x00 0x1000>; - clocks = <0x02 0x1e 0x02 0x14f>; - clock-names = "i2c\0pclk"; - interrupts = <0x00 0x08 0x04>; - pinctrl-names = "default"; - pinctrl-0 = <0x66>; - #address-cells = <0x01>; - #size-cells = <0x00>; - status = "okay"; - clock-frequency = <0x61a80>; - phandle = <0xec>; - }; - - i2c@ff1a0000 { - compatible = "rockchip,rk3399-i2c"; - reg = <0x00 0xff1a0000 0x00 0x1000>; - clocks = <0x02 0x1f 0x02 0x150>; - clock-names = "i2c\0pclk"; - interrupts = <0x00 0x09 0x04>; - pinctrl-names = "default"; - pinctrl-0 = <0x67>; - #address-cells = <0x01>; - #size-cells = <0x00>; - status = "disabled"; - phandle = <0xed>; - }; - - i2c@ff1b0000 { - compatible = "rockchip,rk3399-i2c"; - reg = <0x00 0xff1b0000 0x00 0x1000>; - clocks = <0x02 0x20 0x02 0x151>; - clock-names = "i2c\0pclk"; - interrupts = <0x00 0x0a 0x04>; - pinctrl-names = "default"; - pinctrl-0 = <0x68>; - #address-cells = <0x01>; - #size-cells = <0x00>; - status = "disabled"; - phandle = <0xee>; - }; - - spi@ff1d0000 { - compatible = "rockchip,px30-spi\0rockchip,rk3066-spi"; - reg = <0x00 0xff1d0000 0x00 0x1000>; - interrupts = <0x00 0x1a 0x04>; - #address-cells = <0x01>; - #size-cells = <0x00>; - clocks = <0x02 0x24 0x02 0x155>; - clock-names = "spiclk\0apb_pclk"; - dmas = <0x2b 0x0c 0x2b 0x0d>; - dma-names = "tx\0rx"; - pinctrl-names = "default\0high_speed"; - pinctrl-0 = <0x69 0x6a 0x6b 0x6c>; - pinctrl-1 = <0x6d 0x6a 0x6e 0x6f>; - status = "disabled"; - phandle = <0xef>; - }; - - spi@ff1d8000 { - compatible = "rockchip,px30-spi\0rockchip,rk3066-spi"; - reg = <0x00 0xff1d8000 0x00 0x1000>; - interrupts = <0x00 0x1b 0x04>; - #address-cells = <0x01>; - #size-cells = <0x00>; - clocks = <0x02 0x25 0x02 0x156>; - clock-names = "spiclk\0apb_pclk"; - dmas = <0x2b 0x0e 0x2b 0x0f>; - dma-names = "tx\0rx"; - pinctrl-names = "default\0high_speed"; - pinctrl-0 = <0x70 0x71 0x72 0x73 0x74>; - pinctrl-1 = <0x75 0x71 0x72 0x76 0x77>; - status = "disabled"; - phandle = <0xf0>; - }; - - watchdog@ff1e0000 { - compatible = "snps,dw-wdt"; - reg = <0x00 0xff1e0000 0x00 0x100>; - clocks = <0x02 0x15b>; - interrupts = <0x00 0x25 0x04>; - resets = <0x02 0xb5>; - reset-names = "reset"; - status = "disabled"; - phandle = <0xf1>; - }; - - pwm@ff200000 { - compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm"; - reg = <0x00 0xff200000 0x00 0x10>; - #pwm-cells = <0x03>; - pinctrl-names = "active"; - pinctrl-0 = <0x78>; - clocks = <0x02 0x22 0x02 0x153>; - clock-names = "pwm\0pclk"; - status = "okay"; - phandle = <0xb8>; - }; - - pwm@ff200010 { - compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm"; - reg = <0x00 0xff200010 0x00 0x10>; - #pwm-cells = <0x03>; - pinctrl-names = "active"; - pinctrl-0 = <0x79>; - clocks = <0x02 0x22 0x02 0x153>; - clock-names = "pwm\0pclk"; - status = "okay"; - phandle = <0xbc>; - }; - - pwm@ff200020 { - compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm"; - reg = <0x00 0xff200020 0x00 0x10>; - #pwm-cells = <0x03>; - pinctrl-names = "active"; - pinctrl-0 = <0x7a>; - clocks = <0x02 0x22 0x02 0x153>; - clock-names = "pwm\0pclk"; - status = "disabled"; - phandle = <0xf2>; - }; - - pwm@ff200030 { - compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm"; - reg = <0x00 0xff200030 0x00 0x10>; - #pwm-cells = <0x03>; - pinctrl-names = "active"; - pinctrl-0 = <0x7b>; - clocks = <0x02 0x22 0x02 0x153>; - clock-names = "pwm\0pclk"; - status = "disabled"; - phandle = <0xf3>; - }; - - pwm@ff208000 { - compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm"; - reg = <0x00 0xff208000 0x00 0x10>; - #pwm-cells = <0x03>; - pinctrl-names = "active"; - pinctrl-0 = <0x7c>; - clocks = <0x02 0x23 0x02 0x154>; - clock-names = "pwm\0pclk"; - status = "disabled"; - phandle = <0xf4>; - }; - - pwm@ff208010 { - compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm"; - reg = <0x00 0xff208010 0x00 0x10>; - #pwm-cells = <0x03>; - pinctrl-names = "active"; - pinctrl-0 = <0x7d>; - clocks = <0x02 0x23 0x02 0x154>; - clock-names = "pwm\0pclk"; - status = "disabled"; - phandle = <0xf5>; - }; - - pwm@ff208020 { - compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm"; - reg = <0x00 0xff208020 0x00 0x10>; - #pwm-cells = <0x03>; - pinctrl-names = "active"; - pinctrl-0 = <0x7e>; - clocks = <0x02 0x23 0x02 0x154>; - clock-names = "pwm\0pclk"; - status = "disabled"; - phandle = <0xf6>; - }; - - pwm@ff208030 { - compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm"; - reg = <0x00 0xff208030 0x00 0x10>; - #pwm-cells = <0x03>; - pinctrl-names = "active"; - pinctrl-0 = <0x7f>; - clocks = <0x02 0x23 0x02 0x154>; - clock-names = "pwm\0pclk"; - status = "disabled"; - phandle = <0xf7>; - }; - - rktimer@ff210000 { - compatible = "rockchip,rk3288-timer"; - reg = <0x00 0xff210000 0x00 0x1000>; - interrupts = <0x00 0x1e 0x04>; - clocks = <0x02 0x159 0x02 0x26>; - clock-names = "pclk\0timer"; - phandle = <0xf8>; - }; - - amba { - compatible = "simple-bus"; - #address-cells = <0x02>; - #size-cells = <0x02>; - ranges; - - dmac@ff240000 { - compatible = "arm,pl330\0arm,primecell"; - reg = <0x00 0xff240000 0x00 0x4000>; - interrupts = <0x00 0x01 0x04 0x00 0x02 0x04>; - clocks = <0x02 0xbb>; - clock-names = "apb_pclk"; - #dma-cells = <0x01>; - peripherals-req-type-burst; - phandle = <0x2b>; - }; - }; - - thermal-zones { - phandle = <0xf9>; - - soc-thermal { - polling-delay-passive = <0x14>; - polling-delay = <0x3e8>; - sustainable-power = <0x2ee>; - thermal-sensors = <0x80 0x00>; - phandle = <0xfa>; - - trips { - - trip-point-0 { - temperature = <0x11170>; - hysteresis = <0x7d0>; - type = "passive"; - phandle = <0xfb>; - }; - - trip-point-1 { - temperature = <0x14c08>; - hysteresis = <0x7d0>; - type = "passive"; - phandle = <0x81>; - }; - - soc-crit { - temperature = <0x1c138>; - hysteresis = <0x7d0>; - type = "critical"; - phandle = <0xfc>; - }; - }; - - cooling-maps { - - map0 { - trip = <0x81>; - cooling-device = <0x09 0xffffffff 0xffffffff>; - contribution = <0x1000>; - }; - - map1 { - trip = <0x81>; - cooling-device = <0x82 0xffffffff 0xffffffff>; - contribution = <0x1000>; - }; - }; - }; - - gpu-thermal { - polling-delay-passive = <0x64>; - polling-delay = <0x3e8>; - thermal-sensors = <0x80 0x01>; - phandle = <0xfd>; - }; - }; - - tsadc@ff280000 { - compatible = "rockchip,px30-tsadc"; - reg = <0x00 0xff280000 0x00 0x100>; - interrupts = <0x00 0x24 0x04>; - rockchip,grf = <0x2f>; - clocks = <0x02 0x2c 0x02 0x158>; - clock-names = "tsadc\0apb_pclk"; - assigned-clocks = <0x02 0x2c>; - assigned-clock-rates = <0xc350>; - resets = <0x02 0xa8>; - reset-names = "tsadc-apb"; - #thermal-sensor-cells = <0x01>; - rockchip,hw-tshut-temp = <0x1d4c0>; - status = "okay"; - pinctrl-names = "gpio\0otpout"; - pinctrl-0 = <0x83>; - pinctrl-1 = <0x84>; - phandle = <0x80>; - }; - - saradc@ff288000 { - compatible = "rockchip,px30-saradc\0rockchip,rk3399-saradc"; - reg = <0x00 0xff288000 0x00 0x100>; - interrupts = <0x00 0x54 0x04>; - #io-channel-cells = <0x01>; - clocks = <0x02 0x2d 0x02 0x157>; - clock-names = "saradc\0apb_pclk"; - resets = <0x02 0xa5>; - reset-names = "saradc-apb"; - status = "okay"; - vref-supply = <0x85>; - phandle = <0xba>; - }; - - otp@ff290000 { - compatible = "rockchip,px30-otp"; - reg = <0x00 0xff290000 0x00 0x4000>; - #address-cells = <0x01>; - #size-cells = <0x01>; - clocks = <0x02 0x2f 0x02 0x15a 0x02 0x161>; - clock-names = "clk_otp\0pclk_otp\0pclk_otp_phy"; - resets = <0x02 0xb4>; - reset-names = "otp_phy"; - phandle = <0xfe>; - - id@7 { - reg = <0x07 0x10>; - phandle = <0x0f>; - }; - - cpu-leakage@17 { - reg = <0x17 0x01>; - phandle = <0x07>; - }; - - performance@1e { - reg = <0x1e 0x01>; - bits = <0x04 0x03>; - phandle = <0x08>; - }; - }; - - clock-controller@ff2b0000 { - compatible = "rockchip,px30-cru"; - reg = <0x00 0xff2b0000 0x00 0x1000>; - rockchip,grf = <0x2f>; - rockchip,boost = <0x86>; - #clock-cells = <0x01>; - #reset-cells = <0x01>; - assigned-clocks = <0x02 0x04>; - assigned-clock-rates = <0x3dfd2400>; - phandle = <0x02>; - }; - - cpu-boost@ff2b8000 { - compatible = "syscon"; - reg = <0x00 0xff2b8000 0x00 0x1000>; - rockchip,boost-low-con0 = <0x1032>; - rockchip,boost-low-con1 = <0x1441>; - rockchip,boost-high-con0 = <0x1036>; - rockchip,boost-high-con1 = <0x1441>; - rockchip,boost-backup-pll = <0x01>; - rockchip,boost-backup-pll-usage = <0x00>; - rockchip,boost-switch-threshold = <0x249f00>; - rockchip,boost-statis-threshold = <0x100>; - rockchip,boost-statis-enable = <0x00>; - rockchip,boost-enable = <0x00>; - phandle = <0x86>; - }; - - pmu-clock-controller@ff2bc000 { - compatible = "rockchip,px30-pmucru"; - reg = <0x00 0xff2bc000 0x00 0x1000>; - rockchip,grf = <0x2f>; - #clock-cells = <0x01>; - #reset-cells = <0x01>; - assigned-clocks = <0x2a 0x01 0x2a 0x08 0x2a 0x05 0x02 0x07 0x02 0xab 0x02 0xb0 0x02 0xf0 0x02 0xf5 0x02 0x140 0x02 0x49>; - assigned-clock-rates = <0x47868c00 0x5f5e100 0x18cba80 0x23c34600 0xbebc200 0xbebc200 0x8f0d180 0x8f0d180 0x5f5e100 0xbebc200>; - phandle = <0x2a>; - }; - - syscon@ff2c0000 { - compatible = "rockchip,px30-usb2phy-grf\0syscon\0simple-mfd"; - reg = <0x00 0xff2c0000 0x00 0x10000>; - #address-cells = <0x01>; - #size-cells = <0x01>; - phandle = <0xff>; - - usb2-phy@100 { - compatible = "rockchip,px30-usb2phy\0rockchip,rk3328-usb2phy"; - reg = <0x100 0x10>; - clocks = <0x2a 0x0a>; - clock-names = "phyclk"; - #clock-cells = <0x00>; - assigned-clocks = <0x02 0x0e 0x02 0x55>; - assigned-clock-parents = <0x64 0x02 0x0e>; - clock-output-names = "usb480m_phy"; - status = "okay"; - phandle = <0x64>; - - host-port { - #phy-cells = <0x00>; - interrupts = <0x00 0x44 0x04>; - interrupt-names = "linestate"; - status = "okay"; - phandle = <0x89>; - }; - - otg-port { - #phy-cells = <0x00>; - interrupts = <0x00 0x42 0x04 0x00 0x41 0x04 0x00 0x40 0x04>; - interrupt-names = "otg-bvalid\0otg-id\0linestate"; - status = "disabled"; - phandle = <0x88>; - }; - }; - }; - - video-phy@ff2e0000 { - compatible = "rockchip,px30-video-phy"; - reg = <0x00 0xff2e0000 0x00 0x10000 0x00 0xff450000 0x00 0x10000>; - clocks = <0x2a 0x0b 0x02 0x145 0x02 0x144>; - clock-names = "ref\0pclk_phy\0pclk_host"; - #clock-cells = <0x00>; - resets = <0x02 0x3e>; - reset-names = "rst"; - power-domains = <0x87 0x0c>; - #phy-cells = <0x00>; - status = "okay"; - phandle = <0x4b>; - }; - - mipi-dphy-rx0@ff2f0000 { - compatible = "rockchip,rk3326-mipi-dphy"; - reg = <0x00 0xff2f0000 0x00 0x4000>; - clocks = <0x02 0x146>; - clock-names = "dphy-ref"; - power-domains = <0x87 0x0d>; - rockchip,grf = <0x2f>; - status = "okay"; - phandle = <0x100>; - }; - - usb@ff300000 { - compatible = "rockchip,px30-usb\0rockchip,rk3066-usb\0snps,dwc2"; - reg = <0x00 0xff300000 0x00 0x40000>; - interrupts = <0x00 0x3e 0x04>; - clocks = <0x02 0x102>; - clock-names = "otg"; - power-domains = <0x87 0x05>; - dr_mode = "otg"; - g-np-tx-fifo-size = <0x10>; - g-rx-fifo-size = <0x118>; - g-tx-fifo-size = <0x100 0x80 0x80 0x40 0x20 0x10>; - g-use-dma; - phys = <0x88>; - phy-names = "usb2-phy"; - status = "okay"; - phandle = <0x101>; - }; - - usb@ff340000 { - compatible = "generic-ehci"; - reg = <0x00 0xff340000 0x00 0x10000>; - interrupts = <0x00 0x3c 0x04>; - clocks = <0x02 0x103 0x64>; - clock-names = "usbhost\0utmi"; - power-domains = <0x87 0x05>; - phys = <0x89>; - phy-names = "usb"; - status = "disabled"; - phandle = <0x102>; - }; - - usb@ff350000 { - compatible = "generic-ohci"; - reg = <0x00 0xff350000 0x00 0x10000>; - interrupts = <0x00 0x3d 0x04>; - clocks = <0x02 0x103 0x64>; - clock-names = "usbhost\0utmi"; - power-domains = <0x87 0x05>; - phys = <0x89>; - phy-names = "usb"; - status = "disabled"; - phandle = <0x103>; - }; - - ethernet@ff360000 { - compatible = "rockchip,px30-gmac"; - reg = <0x00 0xff360000 0x00 0x10000>; - rockchip,grf = <0x2f>; - interrupts = <0x00 0x2b 0x04>; - interrupt-names = "macirq"; - clocks = <0x02 0x3e 0x02 0x3f 0x02 0x3f 0x02 0x40 0x02 0x41 0x02 0xb2 0x02 0x143 0x02 0x4c>; - clock-names = "stmmaceth\0mac_clk_rx\0mac_clk_tx\0clk_mac_ref\0clk_mac_refout\0aclk_mac\0pclk_mac\0clk_mac_speed"; - phy-mode = "rmii"; - pinctrl-names = "default"; - pinctrl-0 = <0x8a 0x8b>; - resets = <0x02 0x5e>; - reset-names = "stmmaceth"; - power-domains = <0x87 0x09>; - status = "disabled"; - phandle = <0x104>; - }; - - dwmmc@ff370000 { - compatible = "rockchip,px30-dw-mshc\0rockchip,rk3288-dw-mshc"; - reg = <0x00 0xff370000 0x00 0x4000>; - max-frequency = <0x8f0d180>; - clocks = <0x02 0xf7 0x02 0x3b 0x02 0x43 0x02 0x44>; - clock-names = "biu\0ciu\0ciu-drv\0ciu-sample"; - assigned-clocks = <0x02 0x3b>; - assigned-clock-parents = <0x02 0x57>; - power-domains = <0x87 0x07>; - fifo-depth = <0x100>; - interrupts = <0x00 0x36 0x04>; - pinctrl-names = "default"; - pinctrl-0 = <0x8c 0x8d 0x8e 0x8f>; - status = "okay"; - bus-width = <0x04>; - cap-mmc-highspeed; - cap-sd-highspeed; - supports-sd; - card-detect-delay = <0x320>; - ignore-pm-notify; - cd-gpios = <0x59 0x03 0x01>; - sd-uhs-sdr12; - sd-uhs-sdr25; - sd-uhs-sdr50; - sd-uhs-sdr104; - vqmmc-supply = <0x49>; - vmmc-supply = <0x90>; - phandle = <0x105>; - }; - - dwmmc@ff380000 { - compatible = "rockchip,px30-dw-mshc\0rockchip,rk3288-dw-mshc"; - reg = <0x00 0xff380000 0x00 0x4000>; - max-frequency = <0x8f0d180>; - clocks = <0x02 0xff 0x02 0x38 0x02 0x45 0x02 0x46>; - clock-names = "biu\0ciu\0ciu-drv\0ciu-sample"; - assigned-clocks = <0x02 0x38>; - assigned-clock-parents = <0x02 0x51>; - power-domains = <0x87 0x0a>; - fifo-depth = <0x100>; - interrupts = <0x00 0x37 0x04>; - pinctrl-names = "default"; - pinctrl-0 = <0x91 0x92 0x93>; - status = "okay"; - bus-width = <0x04>; - cap-mmc-highspeed; - cap-sd-highspeed; - supports-sd; - card-detect-delay = <0x320>; - ignore-pm-notify; - cd-gpios = <0x59 0x0a 0x01>; - sd-uhs-sdr12; - sd-uhs-sdr25; - sd-uhs-sdr50; - sd-uhs-sdr104; - vqmmc-supply = <0x49>; - vmmc-supply = <0x90>; - phandle = <0x106>; - }; - - dwmmc@ff390000 { - compatible = "rockchip,px30-dw-mshc\0rockchip,rk3288-dw-mshc"; - reg = <0x00 0xff390000 0x00 0x4000>; - max-frequency = <0x8f0d180>; - clocks = <0x02 0x100 0x02 0x39 0x02 0x47 0x02 0x48>; - clock-names = "biu\0ciu\0ciu-drv\0ciu-sample"; - assigned-clocks = <0x02 0x39>; - assigned-clock-parents = <0x02 0x53>; - power-domains = <0x87 0x0a>; - fifo-depth = <0x100>; - interrupts = <0x00 0x35 0x04>; - status = "okay"; - phandle = <0x107>; - }; - - nandc@ff3b0000 { - compatible = "rockchip,rk-nandc"; - reg = <0x00 0xff3b0000 0x00 0x4000>; - interrupts = <0x00 0x39 0x04>; - nandc_id = <0x00>; - clocks = <0x02 0x37 0x02 0xfe>; - clock-names = "clk_nandc\0hclk_nandc"; - assigned-clocks = <0x02 0x37>; - assigned-clock-parents = <0x02 0x4f>; - power-domains = <0x87 0x0a>; - status = "disabled"; - phandle = <0x108>; - }; - - sfc@ff3a0000 { - compatible = "rockchip,sfc"; - reg = <0x00 0xff3a0000 0x00 0x4000>; - interrupts = <0x00 0x38 0x04>; - clocks = <0x02 0x3a 0x02 0x101>; - clock-names = "clk_sfc\0hclk_sfc"; - assigned-clocks = <0x02 0x3a>; - assigned-clock-rates = <0x989680>; - status = "disabled"; - phandle = <0x109>; - }; - - gpu@ff400000 { - compatible = "arm,malit602\0arm,malit60x\0arm,malit6xx\0arm,mali-midgard"; - reg = <0x00 0xff400000 0x00 0x4000>; - interrupts = <0x00 0x2d 0x04 0x00 0x2e 0x04 0x00 0x2f 0x04>; - interrupt-names = "GPU\0MMU\0JOB"; - clocks = <0x02 0x49>; - clock-names = "clk_mali"; - power-domains = <0x87 0x0e>; - #cooling-cells = <0x02>; - operating-points-v2 = <0x94>; - status = "okay"; - mali-supply = <0x0e>; - phandle = <0x82>; - - power_model { - compatible = "arm,mali-simple-power-model"; - static-coefficient = <0x64578>; - dynamic-coefficient = <0x2dd>; - ts = <0x7d00 0x125c 0xffffffb0 0x02>; - thermal-zone = "gpu-thermal"; - }; - }; - - gpu-opp-table { - compatible = "operating-points-v2"; - rockchip,thermal-zone = "soc-thermal"; - rockchip,temp-hysteresis = <0x1388>; - rockchip,low-temp = <0x00>; - rockchip,low-temp-min-volt = <0xf4240>; - rockchip,low-temp-adjust-volt = <0x00 0x1e0 0xc350>; - rockchip,max-volt = <0x11edd8>; - rockchip,evb-irdrop = <0x61a8>; - rockchip,pvtm-voltage-sel = <0x00 0xc350 0x00 0xc351 0xd2f0 0x01 0xd2f1 0xea60 0x02 0xea61 0x1869f 0x03>; - rockchip,pvtm-ch = <0x00 0x00>; - phandle = <0x94>; - - opp-400000000 { - opp-hz = <0x00 0x17d78400>; - opp-microvolt = <0x100590>; - opp-microvolt-L0 = <0x100590>; - opp-microvolt-L1 = <0xfa3e8>; - opp-microvolt-L2 = <0xee098>; - opp-microvolt-L3 = <0xe7ef0>; - }; - - opp-480000000 { - opp-hz = <0x00 0x1c9c3800>; - opp-microvolt = <0x112a88>; - opp-microvolt-L0 = <0x112a88>; - opp-microvolt-L1 = <0x10c8e0>; - opp-microvolt-L2 = <0x100590>; - opp-microvolt-L3 = <0xf4240>; - }; - - opp-520000000 { - opp-hz = <0x00 0x1efe9200>; - opp-microvolt = <0x118c30>; - opp-microvolt-L0 = <0x118c30>; - opp-microvolt-L1 = <0x118c30>; - opp-microvolt-L2 = <0x10c8e0>; - opp-microvolt-L3 = <0x100590>; - }; - }; - - hevc_service@ff440000 { - compatible = "rockchip,hevc_sub"; - iommu_enabled = <0x01>; - reg = <0x00 0xff440000 0x00 0x400>; - interrupts = <0x00 0x31 0x04>; - interrupt-names = "irq_dec"; - dev_mode = <0x01>; - iommus = <0x95>; - allocator = <0x01>; - phandle = <0x98>; - }; - - vpu_service@ff442000 { - compatible = "rockchip,vpu_sub"; - iommu_enabled = <0x01>; - reg = <0x00 0xff442000 0x00 0x800>; - interrupts = <0x00 0x50 0x04 0x00 0x4f 0x04>; - interrupt-names = "irq_enc\0irq_dec"; - dev_mode = <0x00>; - iommus = <0x96>; - allocator = <0x01>; - phandle = <0x97>; - }; - - vpu_combo { - compatible = "rockchip,vpu_combo"; - subcnt = <0x02>; - rockchip,grf = <0x2f>; - rockchip,sub = <0x97 0x98>; - clocks = <0x02 0xaf 0x02 0xf4 0x02 0x4b>; - clock-names = "aclk_vcodec\0hclk_vcodec\0clk_core"; - resets = <0x02 0x24 0x02 0x26 0x02 0x25 0x02 0x27 0x02 0x3f>; - reset-names = "video_a\0video_h\0niu_a\0niu_h\0video_core"; - power-domains = <0x87 0x0b>; - mode_bit = <0x0f>; - mode_ctrl = <0x410>; - status = "okay"; - phandle = <0x10a>; - }; - - iommu@ff440440 { - compatible = "rockchip,iommu"; - reg = <0x00 0xff440440 0x00 0x40 0x00 0xff440480 0x00 0x40>; - interrupts = <0x00 0x32 0x04>; - interrupt-names = "hevc_mmu"; - clocks = <0x02 0xaf 0x02 0xf4>; - clock-names = "aclk\0hclk"; - power-domains = <0x87 0x0b>; - #iommu-cells = <0x00>; - phandle = <0x95>; - }; - - iommu@ff442800 { - compatible = "rockchip,iommu"; - reg = <0x00 0xff442800 0x00 0x100>; - interrupts = <0x00 0x51 0x04>; - interrupt-names = "vpu_mmu"; - clocks = <0x02 0xaf 0x02 0xf4>; - clock-names = "aclk\0hclk"; - power-domains = <0x87 0x0b>; - #iommu-cells = <0x00>; - phandle = <0x96>; - }; - - dsi@ff450000 { - compatible = "rockchip,px30-mipi-dsi"; - reg = <0x00 0xff450000 0x00 0x10000>; - interrupts = <0x00 0x4b 0x04>; - clocks = <0x02 0x144 0x4b>; - clock-names = "pclk\0hs_clk"; - resets = <0x02 0x3d>; - reset-names = "apb"; - phys = <0x4b>; - phy-names = "mipi_dphy"; - power-domains = <0x87 0x0c>; - rockchip,grf = <0x2f>; - #address-cells = <0x01>; - #size-cells = <0x00>; - status = "okay"; - phandle = <0x10b>; - - ports { - #address-cells = <0x01>; - #size-cells = <0x00>; - - port@0 { - reg = <0x00>; - #address-cells = <0x01>; - #size-cells = <0x00>; - - endpoint@0 { - reg = <0x00>; - remote-endpoint = <0x13>; - status = "okay"; - phandle = <0x9f>; - }; - }; - }; - - panel@0 { - compatible = "elida,kd35t133\0simple-panel-dsi"; - reg = <0x00>; - backlight = <0x99>; - power-supply = <0x9a>; - enable-gpios = <0x9b 0x12 0x01>; - reset-gpios = <0x63 0x10 0x01>; - led-red-gpios = <0x59 0x05 0x00>; - led-blue1-gpios = <0x59 0x00 0x00>; - prepare-delay-ms = <0x64>; - reset-delay-ms = <0x32>; - init-delay-ms = <0x14>; - enable-delay-ms = <0xc8>; - disable-delay-ms = <0x32>; - unprepare-delay-ms = <0x14>; - width-mm = <0x47>; - height-mm = <0x47>; - dsi,flags = <0xa03>; - dsi,format = <0x00>; - dsi,lanes = <0x04>; - panel-init-sequence = [39 00 04 b9 f1 12 83 39 00 1c ba 33 81 05 f9 0e 0e 20 00 00 00 00 00 00 00 44 25 00 91 0a 00 00 02 4f d1 00 00 37 15 00 02 b8 25 39 00 04 bf 02 11 00 39 00 0b b3 0c 10 0a 50 03 ff 00 00 00 00 39 00 0a c0 73 73 50 50 00 00 08 70 00 15 00 02 bc 46 15 00 02 cc 0b 15 00 02 b4 80 39 00 04 b2 00 13 f0 39 00 0f e3 07 07 0b 0b 03 0b 00 00 00 00 ff 00 c0 10 39 00 0d c1 53 00 1e 1e 77 e1 cc dd 67 77 33 33 39 00 03 b5 10 10 39 00 03 b6 6c 7c 39 00 40 e9 08 00 0e 00 00 b0 b1 11 31 23 28 10 b0 b1 27 08 00 04 02 00 00 00 00 04 02 00 00 00 88 88 ba 60 24 08 88 88 88 88 88 88 88 ba 71 35 18 88 88 88 88 88 00 00 00 01 00 00 00 00 00 00 00 00 00 39 00 3e ea 97 0a 82 02 13 07 00 00 00 00 00 00 80 88 ba 17 53 88 88 88 88 88 88 81 88 ba 06 42 88 88 88 88 88 88 23 10 00 02 80 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 39 00 23 e0 00 07 0b 27 2d 3f 3b 37 05 0a 0b 0f 11 0f 12 12 18 00 07 0b 27 2d 3f 3b 37 05 0a 0b 0f 11 0f 12 12 18 05 96 01 11 05 32 01 29]; - panel-exit-sequence = <0x5140128 0x50a0110>; - - display-timings { - native-mode = <0x9c>; - - 60Hz { - clock-frequency = <0x2625a00>; - hactive = <0x280>; - vactive = <0x1e0>; - hback-porch = <0x78>; - hfront-porch = <0x78>; - vback-porch = <0x0d>; - vfront-porch = <0x11>; - hsync-len = <0x78>; - vsync-len = <0x05>; - hsync-active = <0x00>; - vsync-active = <0x00>; - de-active = <0x00>; - pixelclk-active = <0x00>; - phandle = <0x9c>; - }; - - 50Hz { - clock-frequency = <0x1851960>; - hactive = <0x280>; - vactive = <0x1e0>; - hfront-porch = <0xbc>; - hsync-len = <0x02>; - hback-porch = <0xbe>; - vfront-porch = <0x0d>; - vsync-len = <0x02>; - vback-porch = <0x05>; - hsync-active = <0x00>; - vsync-active = <0x00>; - de-active = <0x00>; - pixelclk-active = <0x00>; - phandle = <0x10c>; - }; - - 75Hz { - clock-frequency = <0x1d2eb40>; - hactive = <0x280>; - vactive = <0x1e0>; - hfront-porch = <0x57>; - hsync-len = <0x02>; - hback-porch = <0x57>; - vfront-porch = <0x0d>; - vsync-len = <0x02>; - vback-porch = <0x05>; - hsync-active = <0x00>; - vsync-active = <0x00>; - de-active = <0x00>; - pixelclk-active = <0x00>; - phandle = <0x10d>; - }; - }; - }; - }; - - vop@ff460000 { - compatible = "rockchip,px30-vop-big"; - reg = <0x00 0xff460000 0x00 0x1fc 0x00 0xff460a00 0x00 0x400>; - rockchip,grf = <0x2f>; - reg-names = "regs\0gamma_lut"; - interrupts = <0x00 0x4d 0x04>; - clocks = <0x02 0xb5 0x02 0x96 0x02 0xfb>; - clock-names = "aclk_vop\0dclk_vop\0hclk_vop"; - power-domains = <0x87 0x0c>; - iommus = <0x9d>; - status = "okay"; - phandle = <0x10e>; - - port { - #address-cells = <0x01>; - #size-cells = <0x00>; - phandle = <0x10>; - - endpoint@0 { - reg = <0x00>; - remote-endpoint = <0x9e>; - phandle = <0x12>; - }; - - endpoint@1 { - reg = <0x01>; - remote-endpoint = <0x9f>; - phandle = <0x13>; - }; - - endpoint@2 { - reg = <0x02>; - remote-endpoint = <0xa0>; - phandle = <0x14>; - }; - }; - }; - - iommu@ff460f00 { - compatible = "rockchip,iommu"; - reg = <0x00 0xff460f00 0x00 0x100>; - interrupts = <0x00 0x4d 0x04>; - interrupt-names = "vopb_mmu"; - clocks = <0x02 0xb5 0x02 0xfb>; - clock-names = "aclk\0hclk"; - power-domains = <0x87 0x0c>; - #iommu-cells = <0x00>; - status = "okay"; - phandle = <0x9d>; - }; - - rk_rga@ff480000 { - compatible = "rockchip,rga2"; - reg = <0x00 0xff480000 0x00 0x1000>; - interrupts = <0x00 0x4c 0x04>; - clocks = <0x02 0xb7 0x02 0xfd 0x02 0x35>; - clock-names = "aclk_rga\0hclk_rga\0clk_rga"; - power-domains = <0x87 0x0c>; - dma-coherent; - status = "okay"; - phandle = <0x10f>; - }; - - cif@ff490000 { - compatible = "rockchip,cif"; - reg = <0x00 0xff490000 0x00 0x200>; - interrupts = <0x00 0x45 0x04>; - clocks = <0x02 0xb3 0x02 0xf9 0x02 0x160 0x02 0x34>; - clock-names = "aclk_cif0\0hclk_cif0\0pclk_cif\0cif0_out"; - resets = <0x02 0x2c 0x02 0x2d 0x02 0x2e>; - reset-names = "rst_cif_a\0rst_cif_h\0rst_cif_pclkin"; - power-domains = <0x87 0x0d>; - pinctrl-names = "cif_pin_all"; - pinctrl-0 = <0xa1>; - iommus = <0xa2>; - status = "disabled"; - phandle = <0x110>; - }; - - cif-new@ff490000 { - compatible = "rockchip,px30-cif"; - reg = <0x00 0xff490000 0x00 0x200>; - interrupts = <0x00 0x45 0x04>; - clocks = <0x02 0xb3 0x02 0xf9 0x02 0x160 0x02 0x34>; - clock-names = "aclk_cif\0hclk_cif\0pclk_cif\0cif_out"; - resets = <0x02 0x2c 0x02 0x2d 0x02 0x2e>; - reset-names = "rst_cif_a\0rst_cif_h\0rst_cif_pclkin"; - power-domains = <0x87 0x0d>; - iommus = <0xa2>; - status = "disabled"; - phandle = <0x111>; - }; - - iommu@ff490800 { - compatible = "rockchip,iommu"; - reg = <0x00 0xff490800 0x00 0x100>; - interrupts = <0x00 0x45 0x04>; - interrupt-names = "vip_mmu"; - clocks = <0x02 0xb3 0x02 0xf9>; - clock-names = "aclk\0hclk"; - power-domains = <0x87 0x0d>; - rk_iommu,disable_reset_quirk; - #iommu-cells = <0x00>; - status = "okay"; - phandle = <0xa2>; - }; - - rk_isp@ff4a0000 { - compatible = "rockchip,px30-isp\0rockchip,isp"; - reg = <0x00 0xff4a0000 0x00 0x8000>; - interrupts = <0x00 0x46 0x04>; - clocks = <0x02 0xb4 0x02 0xfa 0x02 0x33 0x02 0x33 0x02 0x15f 0x02 0x34 0x02 0x34 0x02 0x146>; - clock-names = "aclk_isp\0hclk_isp\0clk_isp\0clk_isp_jpe\0pclkin_isp\0clk_cif_pll\0clk_cif_out\0pclk_dphyrx"; - resets = <0x02 0x2b 0x02 0x2f>; - reset-names = "rst_isp\0rst_mipicsiphy"; - power-domains = <0x87 0x0d>; - pinctrl-names = "default\0isp_dvp8bit2\0isp_dvp10bit\0isp_dvp12bit"; - pinctrl-0 = <0xa3>; - pinctrl-1 = <0xa1>; - pinctrl-2 = <0xa1 0xa4>; - pinctrl-3 = <0xa5 0xa1 0xa4>; - rockchip,isp,mipiphy = <0x01>; - rockchip,isp,csiphy,reg = <0xff2f0000 0x4000>; - rockchip,grf = <0x2f>; - rockchip,cru = <0x02>; - rockchip,isp,iommu-enable = <0x01>; - iommus = <0xa6>; - status = "disabled"; - phandle = <0x112>; - }; - - rkisp1@ff4a0000 { - compatible = "rockchip,rk3326-rkisp1"; - reg = <0x00 0xff4a0000 0x00 0x8000>; - interrupts = <0x00 0x46 0x04 0x00 0x49 0x04 0x00 0x4a 0x04>; - interrupt-names = "isp_irq\0mi_irq\0mipi_irq"; - clocks = <0x02 0xb4 0x02 0xfa 0x02 0x33 0x02 0x15f>; - clock-names = "aclk_isp\0hclk_isp\0clk_isp\0pclk_isp"; - devfreq = <0xa7>; - power-domains = <0x87 0x0d>; - iommus = <0xa6>; - rockchip,grf = <0x2f>; - status = "okay"; - phandle = <0x113>; - }; - - iommu@ff4a8000 { - compatible = "rockchip,iommu"; - reg = <0x00 0xff4a8000 0x00 0x100>; - interrupts = <0x00 0x46 0x04>; - interrupt-names = "isp_mmu"; - clocks = <0x02 0xb4 0x02 0xfa>; - clock-names = "aclk\0hclk"; - power-domains = <0x87 0x0d>; - rk_iommu,disable_reset_quirk; - #iommu-cells = <0x00>; - status = "okay"; - phandle = <0xa6>; - }; - - qos@ff518000 { - compatible = "syscon"; - reg = <0x00 0xff518000 0x00 0x20>; - phandle = <0x18>; - }; - - qos@ff520000 { - compatible = "syscon"; - reg = <0x00 0xff520000 0x00 0x20>; - phandle = <0x28>; - }; - - qos@ff52c000 { - compatible = "syscon"; - reg = <0x00 0xff52c000 0x00 0x20>; - phandle = <0x17>; - }; - - qos@ff538000 { - compatible = "syscon"; - reg = <0x00 0xff538000 0x00 0x20>; - phandle = <0x19>; - }; - - qos@ff538080 { - compatible = "syscon"; - reg = <0x00 0xff538080 0x00 0x20>; - phandle = <0x1a>; - }; - - qos@ff538100 { - compatible = "syscon"; - reg = <0x00 0xff538100 0x00 0x20>; - phandle = <0x1b>; - }; - - qos@ff538180 { - compatible = "syscon"; - reg = <0x00 0xff538180 0x00 0x20>; - phandle = <0x1c>; - }; - - qos@ff540000 { - compatible = "syscon"; - reg = <0x00 0xff540000 0x00 0x20>; - phandle = <0x15>; - }; - - qos@ff540080 { - compatible = "syscon"; - reg = <0x00 0xff540080 0x00 0x20>; - phandle = <0x16>; - }; - - qos@ff548000 { - compatible = "syscon"; - reg = <0x00 0xff548000 0x00 0x20>; - phandle = <0x23>; - }; - - qos@ff548080 { - compatible = "syscon"; - reg = <0x00 0xff548080 0x00 0x20>; - phandle = <0x24>; - }; - - qos@ff548100 { - compatible = "syscon"; - reg = <0x00 0xff548100 0x00 0x20>; - phandle = <0x25>; - }; - - qos@ff548180 { - compatible = "syscon"; - reg = <0x00 0xff548180 0x00 0x20>; - phandle = <0x26>; - }; - - qos@ff548200 { - compatible = "syscon"; - reg = <0x00 0xff548200 0x00 0x20>; - phandle = <0x27>; - }; - - qos@ff550000 { - compatible = "syscon"; - reg = <0x00 0xff550000 0x00 0x20>; - phandle = <0x1f>; - }; - - qos@ff550080 { - compatible = "syscon"; - reg = <0x00 0xff550080 0x00 0x20>; - phandle = <0x20>; - }; - - qos@ff550100 { - compatible = "syscon"; - reg = <0x00 0xff550100 0x00 0x20>; - phandle = <0x21>; - }; - - qos@ff550180 { - compatible = "syscon"; - reg = <0x00 0xff550180 0x00 0x20>; - phandle = <0x22>; - }; - - qos@ff558000 { - compatible = "syscon"; - reg = <0x00 0xff558000 0x00 0x20>; - phandle = <0x1d>; - }; - - qos@ff558080 { - compatible = "syscon"; - reg = <0x00 0xff558080 0x00 0x20>; - phandle = <0x1e>; - }; - - dfi@ff610000 { - reg = <0x00 0xff610000 0x00 0x400>; - compatible = "rockchip,px30-dfi"; - rockchip,pmugrf = <0xa8>; - status = "disabled"; - phandle = <0xa9>; - }; - - dmc { - compatible = "rockchip,px30-dmc"; - interrupts = <0x00 0x69 0x04>; - interrupt-names = "complete_irq"; - devfreq-events = <0xa9>; - clocks = <0x02 0x54>; - clock-names = "dmc_clk"; - operating-points-v2 = <0xaa>; - ddr_timing = <0xab>; - upthreshold = <0x28>; - downdifferential = <0x14>; - system-status-freq = <0x01 0x80e80 0x08 0x6ddd0 0x02 0x2f5d0 0x20 0x6ddd0 0x1000 0x80e80 0x4000 0xa2990 0x2000 0xa2990>; - auto-min-freq = <0x50140>; - auto-freq-en = <0x01>; - #cooling-cells = <0x02>; - status = "disabled"; - center-supply = <0x0e>; - phandle = <0xa7>; - - ddr_power_model { - compatible = "ddr_power_model"; - dynamic-power-coefficient = <0x78>; - static-power-coefficient = <0xc8>; - ts = <0x7d00 0x125c 0xffffffb0 0x02>; - thermal-zone = "soc-thermal"; - phandle = <0x114>; - }; - }; - - dmc-opp-table { - compatible = "operating-points-v2"; - rockchip,max-volt = <0x118c30>; - rockchip,evb-irdrop = <0x61a8>; - rockchip,pvtm-voltage-sel = <0x00 0xc350 0x00 0xc351 0xd2f0 0x01 0xd2f1 0xea60 0x02 0xea61 0x1869f 0x03>; - rockchip,pvtm-ch = <0x00 0x00>; - phandle = <0xaa>; - - opp-528000000 { - opp-hz = <0x00 0x1f78a400>; - opp-microvolt = <0xee098>; - opp-microvolt-L0 = <0xee098>; - opp-microvolt-L1 = <0xee098>; - opp-microvolt-L2 = <0xe7ef0>; - opp-microvolt-L3 = <0xe7ef0>; - }; - - opp-666000000 { - opp-hz = <0x00 0x27b25a80>; - opp-microvolt = <0x100590>; - opp-microvolt-L0 = <0x100590>; - opp-microvolt-L1 = <0xf4240>; - opp-microvolt-L2 = <0xee098>; - opp-microvolt-L3 = <0xe7ef0>; - }; - - opp-786000000 { - opp-hz = <0x00 0x2ed96880>; - opp-microvolt = <0x10c8e0>; - opp-microvolt-L0 = <0x10c8e0>; - opp-microvolt-L1 = <0x100590>; - opp-microvolt-L2 = <0xfa3e8>; - opp-microvolt-L3 = <0xf4240>; - status = "okay"; - }; - }; - - rockchip-system-monitor { - compatible = "rockchip,system-monitor"; - rockchip,thermal-zone = "soc-thermal"; - rockchip,polling-delay = <0xc8>; - phandle = <0x115>; - }; - - pinctrl { - compatible = "rockchip,px30-pinctrl"; - rockchip,grf = <0x2f>; - rockchip,pmu = <0xa8>; - #address-cells = <0x02>; - #size-cells = <0x02>; - ranges; - phandle = <0x116>; - - gpio0@ff040000 { - compatible = "rockchip,gpio-bank"; - reg = <0x00 0xff040000 0x00 0x100>; - interrupts = <0x00 0x03 0x04>; - clocks = <0x2a 0x14>; - gpio-controller; - #gpio-cells = <0x02>; - interrupt-controller; - #interrupt-cells = <0x02>; - phandle = <0x59>; - }; - - gpio1@ff250000 { - compatible = "rockchip,gpio-bank"; - reg = <0x00 0xff250000 0x00 0x100>; - interrupts = <0x00 0x04 0x04>; - clocks = <0x02 0x15c>; - gpio-controller; - #gpio-cells = <0x02>; - interrupt-controller; - #interrupt-cells = <0x02>; - phandle = <0x9b>; - }; - - gpio2@ff260000 { - compatible = "rockchip,gpio-bank"; - reg = <0x00 0xff260000 0x00 0x100>; - interrupts = <0x00 0x05 0x04>; - clocks = <0x02 0x15d>; - gpio-controller; - #gpio-cells = <0x02>; - interrupt-controller; - #interrupt-cells = <0x02>; - phandle = <0xbf>; - }; - - gpio3@ff270000 { - compatible = "rockchip,gpio-bank"; - reg = <0x00 0xff270000 0x00 0x100>; - interrupts = <0x00 0x06 0x04>; - clocks = <0x02 0x15e>; - gpio-controller; - #gpio-cells = <0x02>; - interrupt-controller; - #interrupt-cells = <0x02>; - phandle = <0x63>; - }; - - pcfg-pull-up { - bias-pull-up; - phandle = <0xae>; - }; - - pcfg-pull-down { - bias-pull-down; - phandle = <0x117>; - }; - - pcfg-pull-none { - bias-disable; - phandle = <0xad>; - }; - - pcfg-pull-none-2ma { - bias-disable; - drive-strength = <0x02>; - phandle = <0x118>; - }; - - pcfg-pull-up-2ma { - bias-pull-up; - drive-strength = <0x02>; - phandle = <0x119>; - }; - - pcfg-pull-up-4ma { - bias-pull-up; - drive-strength = <0x04>; - phandle = <0xaf>; - }; - - pcfg-pull-none-4ma { - bias-disable; - drive-strength = <0x04>; - phandle = <0x11a>; - }; - - pcfg-pull-down-4ma { - bias-pull-down; - drive-strength = <0x04>; - phandle = <0x11b>; - }; - - pcfg-pull-none-8ma { - bias-disable; - drive-strength = <0x08>; - phandle = <0xb2>; - }; - - pcfg-pull-up-8ma { - bias-pull-up; - drive-strength = <0x08>; - phandle = <0xb0>; - }; - - pcfg-pull-none-12ma { - bias-disable; - drive-strength = <0x0c>; - phandle = <0xb4>; - }; - - pcfg-pull-up-12ma { - bias-pull-up; - drive-strength = <0x0c>; - phandle = <0xb3>; - }; - - pcfg-pull-none-smt { - bias-disable; - input-schmitt-enable; - phandle = <0xac>; - }; - - pcfg-output-high { - output-high; - phandle = <0x11c>; - }; - - pcfg-output-low { - output-low; - phandle = <0xb5>; - }; - - pcfg-input-high { - bias-pull-up; - input-enable; - phandle = <0xb1>; - }; - - pcfg-input { - input-enable; - phandle = <0x11d>; - }; - - i2c0 { - - i2c0-xfer { - rockchip,pins = <0x00 0x08 0x01 0xac 0x00 0x09 0x01 0xac>; - phandle = <0x58>; - }; - }; - - i2c1 { - - i2c1-xfer { - rockchip,pins = <0x00 0x12 0x01 0xac 0x00 0x13 0x01 0xac>; - phandle = <0x66>; - }; - }; - - i2c2 { - - i2c2-xfer { - rockchip,pins = <0x02 0x0f 0x02 0xac 0x02 0x10 0x02 0xac>; - phandle = <0x67>; - }; - }; - - i2c3 { - - i2c3-xfer { - rockchip,pins = <0x01 0x0c 0x04 0xac 0x01 0x0d 0x04 0xac>; - phandle = <0x68>; - }; - }; - - tsadc { - - tsadc-otp-gpio { - rockchip,pins = <0x00 0x06 0x00 0xad>; - phandle = <0x83>; - }; - - tsadc-otp-out { - rockchip,pins = <0x00 0x06 0x01 0xad>; - phandle = <0x84>; - }; - }; - - uart0 { - - uart0-xfer { - rockchip,pins = <0x00 0x0a 0x01 0xae 0x00 0x0b 0x01 0xae>; - phandle = <0x2c>; - }; - - uart0-cts { - rockchip,pins = <0x00 0x0c 0x01 0xad>; - phandle = <0x2d>; - }; - - uart0-rts { - rockchip,pins = <0x00 0x0d 0x01 0xad>; - phandle = <0x2e>; - }; - - uart0-rts-gpio { - rockchip,pins = <0x00 0x0d 0x00 0xad>; - phandle = <0x11e>; - }; - }; - - uart1 { - - uart1-xfer { - rockchip,pins = <0x01 0x11 0x01 0xae 0x01 0x10 0x01 0xae>; - phandle = <0x11f>; - }; - - uart1-cts { - rockchip,pins = <0x01 0x12 0x01 0xad>; - phandle = <0x120>; - }; - - uart1-rts { - rockchip,pins = <0x01 0x13 0x01 0xad>; - phandle = <0x121>; - }; - - uart1-rts-gpio { - rockchip,pins = <0x01 0x13 0x00 0xad>; - phandle = <0x122>; - }; - }; - - uart2-m0 { - - uart2m0-xfer { - rockchip,pins = <0x01 0x1a 0x02 0xae 0x01 0x1b 0x02 0xae>; - phandle = <0x4e>; - }; - }; - - uart2-m1 { - - uart2m1-xfer { - rockchip,pins = <0x02 0x0c 0x02 0xae 0x02 0x0e 0x02 0xae>; - phandle = <0xb6>; - }; - }; - - uart3-m0 { - - uart3m0-xfer { - rockchip,pins = <0x00 0x10 0x02 0xae 0x00 0x11 0x02 0xae>; - phandle = <0x123>; - }; - - uart3m0-cts { - rockchip,pins = <0x00 0x12 0x02 0xad>; - phandle = <0x124>; - }; - - uart3m0-rts { - rockchip,pins = <0x00 0x13 0x02 0xad>; - phandle = <0x125>; - }; - - uart3m0-rts-gpio { - rockchip,pins = <0x00 0x13 0x00 0xad>; - phandle = <0x126>; - }; - }; - - uart3-m1 { - - uart3m1-xfer { - rockchip,pins = <0x01 0x0e 0x02 0xae 0x01 0x0f 0x02 0xae>; - phandle = <0x4f>; - }; - - uart3m1-cts { - rockchip,pins = <0x01 0x0c 0x02 0xad>; - phandle = <0x50>; - }; - - uart3m1-rts { - rockchip,pins = <0x01 0x0d 0x02 0xad>; - phandle = <0x51>; - }; - - uart3m1-rts-gpio { - rockchip,pins = <0x01 0x0d 0x00 0xad>; - phandle = <0x127>; - }; - }; - - uart4 { - - uart4-xfer { - rockchip,pins = <0x01 0x1c 0x02 0xae 0x01 0x1d 0x02 0xae>; - phandle = <0x52>; - }; - - uart4-cts { - rockchip,pins = <0x01 0x1e 0x02 0xad>; - phandle = <0x53>; - }; - - uart4-rts { - rockchip,pins = <0x01 0x1f 0x02 0xad>; - phandle = <0x54>; - }; - }; - - uart5 { - - uart5-xfer { - rockchip,pins = <0x03 0x02 0x04 0xae 0x03 0x01 0x04 0xae>; - phandle = <0x55>; - }; - - uart5-cts { - rockchip,pins = <0x03 0x03 0x04 0xad>; - phandle = <0x56>; - }; - - uart5-rts { - rockchip,pins = <0x03 0x05 0x04 0xad>; - phandle = <0x57>; - }; - }; - - spi0 { - - spi0-clk { - rockchip,pins = <0x01 0x0f 0x03 0xaf>; - phandle = <0x69>; - }; - - spi0-csn { - rockchip,pins = <0x01 0x0e 0x03 0xaf>; - phandle = <0x6a>; - }; - - spi0-miso { - rockchip,pins = <0x01 0x0d 0x03 0xaf>; - phandle = <0x6b>; - }; - - spi0-mosi { - rockchip,pins = <0x01 0x0c 0x03 0xaf>; - phandle = <0x6c>; - }; - - spi0-clk-hs { - rockchip,pins = <0x01 0x0f 0x03 0xb0>; - phandle = <0x6d>; - }; - - spi0-miso-hs { - rockchip,pins = <0x01 0x0d 0x03 0xb0>; - phandle = <0x6e>; - }; - - spi0-mosi-hs { - rockchip,pins = <0x01 0x0c 0x03 0xb0>; - phandle = <0x6f>; - }; - }; - - spi1 { - - spi1-clk { - rockchip,pins = <0x03 0x0f 0x04 0xaf>; - phandle = <0x70>; - }; - - spi1-csn0 { - rockchip,pins = <0x03 0x09 0x04 0xaf>; - phandle = <0x71>; - }; - - spi1-csn1 { - rockchip,pins = <0x03 0x0a 0x02 0xaf>; - phandle = <0x72>; - }; - - spi1-miso { - rockchip,pins = <0x03 0x0e 0x04 0xaf>; - phandle = <0x73>; - }; - - spi1-mosi { - rockchip,pins = <0x03 0x0c 0x04 0xaf>; - phandle = <0x74>; - }; - - spi1-clk-hs { - rockchip,pins = <0x03 0x0f 0x04 0xb0>; - phandle = <0x75>; - }; - - spi1-miso-hs { - rockchip,pins = <0x03 0x0e 0x04 0xb0>; - phandle = <0x76>; - }; - - spi1-mosi-hs { - rockchip,pins = <0x03 0x0c 0x04 0xb0>; - phandle = <0x77>; - }; - }; - - pdm { - - pdm-clk0m1 { - rockchip,pins = <0x02 0x16 0x01 0xad>; - phandle = <0x128>; - }; - - pdm-clk1 { - rockchip,pins = <0x03 0x17 0x02 0xad>; - phandle = <0x44>; - }; - - pdm-sdi0m0 { - rockchip,pins = <0x03 0x1b 0x02 0xad>; - phandle = <0x45>; - }; - - pdm-sdi0m1 { - rockchip,pins = <0x02 0x15 0x02 0xad>; - phandle = <0x129>; - }; - - pdm-sdi1 { - rockchip,pins = <0x03 0x18 0x02 0xad>; - phandle = <0x46>; - }; - - pdm-sdi2 { - rockchip,pins = <0x03 0x19 0x02 0xad>; - phandle = <0x47>; - }; - - pdm-sdi3 { - rockchip,pins = <0x03 0x1a 0x02 0xad>; - phandle = <0x48>; - }; - - pdm-clk0m1-sleep { - rockchip,pins = <0x02 0x16 0x00 0xb1>; - phandle = <0x12a>; - }; - - pdm-clk1-sleep { - rockchip,pins = <0x03 0x17 0x00 0xb1>; - phandle = <0x12b>; - }; - - pdm-sdi0m0-sleep { - rockchip,pins = <0x03 0x1b 0x00 0xb1>; - phandle = <0x12c>; - }; - - pdm-sdi0m1-sleep { - rockchip,pins = <0x02 0x15 0x00 0xb1>; - phandle = <0x12d>; - }; - - pdm-sdi1-sleep { - rockchip,pins = <0x03 0x18 0x00 0xb1>; - phandle = <0x12e>; - }; - - pdm-sdi2-sleep { - rockchip,pins = <0x03 0x19 0x00 0xb1>; - phandle = <0x12f>; - }; - - pdm-sdi3-sleep { - rockchip,pins = <0x03 0x1a 0x00 0xb1>; - phandle = <0x130>; - }; - }; - - i2s0 { - - i2s0-8ch-mclk { - rockchip,pins = <0x03 0x11 0x02 0xad>; - phandle = <0x131>; - }; - - i2s0-8ch-sclktx { - rockchip,pins = <0x03 0x13 0x02 0xad>; - phandle = <0x30>; - }; - - i2s0-8ch-sclkrx { - rockchip,pins = <0x03 0x0c 0x02 0xad>; - phandle = <0x31>; - }; - - i2s0-8ch-lrcktx { - rockchip,pins = <0x03 0x12 0x02 0xad>; - phandle = <0x32>; - }; - - i2s0-8ch-lrckrx { - rockchip,pins = <0x03 0x0d 0x02 0xad>; - phandle = <0x33>; - }; - - i2s0-8ch-sdo0 { - rockchip,pins = <0x03 0x14 0x02 0xad>; - phandle = <0x38>; - }; - - i2s0-8ch-sdo1 { - rockchip,pins = <0x03 0x10 0x02 0xad>; - phandle = <0x39>; - }; - - i2s0-8ch-sdo2 { - rockchip,pins = <0x03 0x0f 0x02 0xad>; - phandle = <0x3a>; - }; - - i2s0-8ch-sdo3 { - rockchip,pins = <0x03 0x0e 0x02 0xad>; - phandle = <0x3b>; - }; - - i2s0-8ch-sdi0 { - rockchip,pins = <0x03 0x15 0x02 0xad>; - phandle = <0x34>; - }; - - i2s0-8ch-sdi1 { - rockchip,pins = <0x03 0x0b 0x02 0xad>; - phandle = <0x35>; - }; - - i2s0-8ch-sdi2 { - rockchip,pins = <0x03 0x09 0x02 0xad>; - phandle = <0x36>; - }; - - i2s0-8ch-sdi3 { - rockchip,pins = <0x03 0x08 0x02 0xad>; - phandle = <0x37>; - }; - }; - - i2s1 { - - i2s1-2ch-mclk { - rockchip,pins = <0x02 0x13 0x01 0xad>; - phandle = <0x65>; - }; - - i2s1-2ch-sclk { - rockchip,pins = <0x02 0x12 0x01 0xad>; - phandle = <0x3c>; - }; - - i2s1-2ch-lrck { - rockchip,pins = <0x02 0x11 0x01 0xad>; - phandle = <0x3d>; - }; - - i2s1-2ch-sdi { - rockchip,pins = <0x02 0x15 0x01 0xad>; - phandle = <0x3e>; - }; - - i2s1-2ch-sdo { - rockchip,pins = <0x02 0x14 0x01 0xad>; - phandle = <0x3f>; - }; - }; - - i2s2 { - - i2s2-2ch-mclk { - rockchip,pins = <0x03 0x01 0x02 0xad>; - phandle = <0x132>; - }; - - i2s2-2ch-sclk { - rockchip,pins = <0x03 0x02 0x02 0xad>; - phandle = <0x40>; - }; - - i2s2-2ch-lrck { - rockchip,pins = <0x03 0x03 0x02 0xad>; - phandle = <0x41>; - }; - - i2s2-2ch-sdi { - rockchip,pins = <0x03 0x05 0x02 0xad>; - phandle = <0x42>; - }; - - i2s2-2ch-sdo { - rockchip,pins = <0x03 0x07 0x02 0xad>; - phandle = <0x43>; - }; - }; - - sdmmc { - - sdmmc-clk { - rockchip,pins = <0x01 0x1e 0x01 0xb2>; - phandle = <0x8c>; - }; - - sdmmc-cmd { - rockchip,pins = <0x01 0x1f 0x01 0xb0>; - phandle = <0x8d>; - }; - - sdmmc-det { - rockchip,pins = <0x00 0x03 0x01 0xb0>; - phandle = <0x8e>; - }; - - sdmmc-bus1 { - rockchip,pins = <0x01 0x1a 0x01 0xb0>; - phandle = <0x133>; - }; - - sdmmc-bus4 { - rockchip,pins = <0x01 0x1a 0x01 0xb0 0x01 0x1b 0x01 0xb0 0x01 0x1c 0x01 0xb0 0x01 0x1d 0x01 0xb0>; - phandle = <0x8f>; - }; - - sdmmc-gpio { - rockchip,pins = <0x01 0x1a 0x00 0xaf 0x01 0x1b 0x00 0xaf 0x01 0x1c 0x00 0xaf 0x01 0x1d 0x00 0xaf 0x01 0x1e 0x00 0xaf 0x01 0x1f 0x00 0xaf>; - phandle = <0x134>; - }; - }; - - sdio { - - sdio-clk { - rockchip,pins = <0x01 0x15 0x01 0xad>; - phandle = <0x93>; - }; - - sdio-cmd { - rockchip,pins = <0x01 0x14 0x01 0xae>; - phandle = <0x92>; - }; - - sdio-bus4 { - rockchip,pins = <0x01 0x16 0x01 0xae 0x01 0x17 0x01 0xae 0x01 0x18 0x01 0xae 0x01 0x19 0x01 0xae>; - phandle = <0x91>; - }; - - sdio-gpio { - rockchip,pins = <0x01 0x16 0x00 0xae 0x01 0x17 0x00 0xae 0x01 0x18 0x00 0xae 0x01 0x19 0x00 0xae 0x01 0x14 0x00 0xae 0x01 0x15 0x00 0xae>; - phandle = <0x135>; - }; - }; - - emmc { - - emmc-clk { - rockchip,pins = <0x01 0x09 0x02 0xb2>; - phandle = <0x136>; - }; - - emmc-cmd { - rockchip,pins = <0x01 0x0a 0x02 0xb0>; - phandle = <0x137>; - }; - - emmc-pwren { - rockchip,pins = <0x01 0x08 0x02 0xad>; - phandle = <0x138>; - }; - - emmc-rstnout { - rockchip,pins = <0x01 0x0b 0x02 0xad>; - phandle = <0x139>; - }; - - emmc-bus1 { - rockchip,pins = <0x01 0x00 0x02 0xb0>; - phandle = <0x13a>; - }; - - emmc-bus4 { - rockchip,pins = <0x01 0x00 0x02 0xb0 0x01 0x01 0x02 0xb0 0x01 0x02 0x02 0xb0 0x01 0x03 0x02 0xb0>; - phandle = <0x13b>; - }; - - emmc-bus8 { - rockchip,pins = <0x01 0x00 0x02 0xb0 0x01 0x01 0x02 0xb0 0x01 0x02 0x02 0xb0 0x01 0x03 0x02 0xb0 0x01 0x04 0x02 0xb0 0x01 0x05 0x02 0xb0 0x01 0x06 0x02 0xb0 0x01 0x07 0x02 0xb0>; - phandle = <0x13c>; - }; - }; - - flash { - - flash-cs0 { - rockchip,pins = <0x01 0x08 0x01 0xad>; - phandle = <0x13d>; - }; - - flash-rdy { - rockchip,pins = <0x01 0x09 0x01 0xad>; - phandle = <0x13e>; - }; - - flash-dqs { - rockchip,pins = <0x01 0x0a 0x01 0xad>; - phandle = <0x13f>; - }; - - flash-ale { - rockchip,pins = <0x01 0x0b 0x01 0xad>; - phandle = <0x140>; - }; - - flash-cle { - rockchip,pins = <0x01 0x0c 0x01 0xad>; - phandle = <0x141>; - }; - - flash-wrn { - rockchip,pins = <0x01 0x0d 0x01 0xad>; - phandle = <0x142>; - }; - - flash-csl { - rockchip,pins = <0x01 0x0e 0x01 0xad>; - phandle = <0x143>; - }; - - flash-rdn { - rockchip,pins = <0x01 0x0f 0x01 0xad>; - phandle = <0x144>; - }; - - flash-bus8 { - rockchip,pins = <0x01 0x00 0x01 0xb3 0x01 0x01 0x01 0xb3 0x01 0x02 0x01 0xb3 0x01 0x03 0x01 0xb3 0x01 0x04 0x01 0xb3 0x01 0x05 0x01 0xb3 0x01 0x06 0x01 0xb3 0x01 0x07 0x01 0xb3>; - phandle = <0x145>; - }; - }; - - lcdc { - - lcdc-m0-rgb-pins { - rockchip,pins = <0x03 0x00 0x01 0xb2 0x03 0x01 0x01 0xb2 0x03 0x02 0x01 0xb2 0x03 0x03 0x01 0xb2 0x03 0x04 0x01 0xb2 0x03 0x05 0x01 0xb2 0x03 0x06 0x01 0xb2 0x03 0x07 0x01 0xb2 0x03 0x08 0x01 0xb2 0x03 0x09 0x01 0xb2 0x03 0x0a 0x01 0xb2 0x03 0x0b 0x01 0xb2 0x03 0x0c 0x01 0xb2 0x03 0x0d 0x01 0xb2 0x03 0x0e 0x01 0xb2 0x03 0x0f 0x01 0xb2 0x03 0x10 0x01 0xb2 0x03 0x11 0x01 0xb2 0x03 0x12 0x01 0xb2 0x03 0x13 0x01 0xb2 0x03 0x14 0x01 0xb2 0x03 0x15 0x01 0xb2 0x03 0x16 0x01 0xb2 0x03 0x17 0x01 0xb2 0x03 0x18 0x01 0xb2 0x03 0x19 0x01 0xb2 0x03 0x1a 0x01 0xb2 0x03 0x1b 0x01 0xb2>; - phandle = <0x146>; - }; - - lcdc-m0-sleep-pins { - rockchip,pins = <0x03 0x00 0x00 0xad 0x03 0x01 0x00 0xad 0x03 0x02 0x00 0xad 0x03 0x03 0x00 0xad 0x03 0x04 0x00 0xad 0x03 0x05 0x00 0xad 0x03 0x06 0x00 0xad 0x03 0x07 0x00 0xad 0x03 0x08 0x00 0xad 0x03 0x09 0x00 0xad 0x03 0x0a 0x00 0xad 0x03 0x0b 0x00 0xad 0x03 0x0c 0x00 0xad 0x03 0x0d 0x00 0xad 0x03 0x0e 0x00 0xad 0x03 0x0f 0x00 0xad 0x03 0x10 0x00 0xad 0x03 0x11 0x00 0xad 0x03 0x12 0x00 0xad 0x03 0x13 0x00 0xad 0x03 0x14 0x00 0xad 0x03 0x15 0x00 0xad 0x03 0x16 0x00 0xad 0x03 0x17 0x00 0xad 0x03 0x18 0x00 0xad 0x03 0x19 0x00 0xad 0x03 0x1a 0x00 0xad 0x03 0x1b 0x00 0xad>; - phandle = <0x147>; - }; - - lcdc-m1-rgb-pins { - rockchip,pins = <0x03 0x00 0x01 0xb2 0x03 0x04 0x01 0xb2 0x03 0x06 0x01 0xb2 0x03 0x0a 0x01 0xb2 0x03 0x0b 0x01 0xb2 0x03 0x0d 0x01 0xb2 0x03 0x10 0x01 0xb2 0x03 0x11 0x01 0xb2 0x03 0x12 0x01 0xb2 0x03 0x13 0x01 0xb2 0x03 0x14 0x01 0xb2 0x03 0x15 0x01 0xb2 0x03 0x16 0x01 0xb2 0x03 0x17 0x01 0xb2 0x03 0x18 0x01 0xb2 0x03 0x19 0x01 0xb2 0x03 0x1a 0x01 0xb2 0x03 0x1b 0x01 0xb2>; - phandle = <0x4c>; - }; - - lcdc-m1-sleep-pins { - rockchip,pins = <0x03 0x00 0x00 0xad 0x03 0x04 0x00 0xad 0x03 0x06 0x00 0xad 0x03 0x0a 0x00 0xad 0x03 0x0b 0x00 0xad 0x03 0x0d 0x00 0xad 0x03 0x10 0x00 0xad 0x03 0x11 0x00 0xad 0x03 0x12 0x00 0xad 0x03 0x13 0x00 0xad 0x03 0x14 0x00 0xad 0x03 0x15 0x00 0xad 0x03 0x16 0x00 0xad 0x03 0x17 0x00 0xad 0x03 0x18 0x00 0xad 0x03 0x19 0x00 0xad 0x03 0x1a 0x00 0xad 0x03 0x1b 0x00 0xad>; - phandle = <0x4d>; - }; - }; - - pwm0 { - - pwm0-pin { - rockchip,pins = <0x00 0x0f 0x01 0xad>; - phandle = <0x78>; - }; - }; - - pwm1 { - - pwm1-pin { - rockchip,pins = <0x00 0x10 0x01 0xad>; - phandle = <0x79>; - }; - }; - - pwm2 { - - pwm2-pin { - rockchip,pins = <0x02 0x0d 0x01 0xad>; - phandle = <0x7a>; - }; - }; - - pwm3 { - - pwm3-pin { - rockchip,pins = <0x00 0x11 0x01 0xad>; - phandle = <0x7b>; - }; - }; - - pwm4 { - - pwm4-pin { - rockchip,pins = <0x03 0x12 0x03 0xad>; - phandle = <0x7c>; - }; - }; - - pwm5 { - - pwm5-pin { - rockchip,pins = <0x03 0x13 0x03 0xad>; - phandle = <0x7d>; - }; - }; - - pwm6 { - - pwm6-pin { - rockchip,pins = <0x03 0x14 0x03 0xad>; - phandle = <0x7e>; - }; - }; - - pwm7 { - - pwm7-pin { - rockchip,pins = <0x03 0x15 0x03 0xad>; - phandle = <0x7f>; - }; - }; - - gmac { - - rmii-pins { - rockchip,pins = <0x02 0x00 0x02 0xb4 0x02 0x01 0x02 0xb4 0x02 0x02 0x02 0xb4 0x02 0x03 0x02 0xad 0x02 0x04 0x02 0xad 0x02 0x05 0x02 0xad 0x02 0x06 0x02 0xad 0x02 0x07 0x02 0xad 0x02 0x09 0x02 0xad>; - phandle = <0x8a>; - }; - - mac-refclk-12ma { - rockchip,pins = <0x02 0x0a 0x02 0xb4>; - phandle = <0x8b>; - }; - - mac-refclk { - rockchip,pins = <0x02 0x0a 0x02 0xad>; - phandle = <0x148>; - }; - }; - - cif-m0 { - - cif-clkout-m0 { - rockchip,pins = <0x02 0x0b 0x01 0xb4>; - phandle = <0xa3>; - }; - - dvp-d2d9-m0 { - rockchip,pins = <0x02 0x00 0x01 0xad 0x02 0x01 0x01 0xad 0x02 0x02 0x01 0xad 0x02 0x03 0x01 0xad 0x02 0x04 0x01 0xad 0x02 0x05 0x01 0xad 0x02 0x06 0x01 0xad 0x02 0x07 0x01 0xad 0x02 0x08 0x01 0xad 0x02 0x09 0x01 0xad 0x02 0x0a 0x01 0xad 0x02 0x0b 0x01 0xad>; - phandle = <0xa1>; - }; - - dvp-d0d1-m0 { - rockchip,pins = <0x02 0x0c 0x01 0xad 0x02 0x0e 0x01 0xad>; - phandle = <0xa5>; - }; - - d10-d11-m0 { - rockchip,pins = <0x02 0x0f 0x01 0xad 0x02 0x10 0x01 0xad>; - phandle = <0xa4>; - }; - }; - - cif-m1 { - - cif-clkout-m1 { - rockchip,pins = <0x03 0x18 0x03 0xad>; - phandle = <0x149>; - }; - - dvp-d2d9-m1 { - rockchip,pins = <0x03 0x03 0x03 0xad 0x03 0x05 0x03 0xad 0x03 0x07 0x03 0xad 0x03 0x08 0x03 0xad 0x03 0x09 0x03 0xad 0x03 0x0c 0x03 0xad 0x03 0x0e 0x03 0xad 0x03 0x0f 0x03 0xad 0x03 0x19 0x03 0xad 0x03 0x1a 0x03 0xad 0x03 0x1b 0x03 0xad 0x03 0x18 0x03 0xad>; - phandle = <0x14a>; - }; - - dvp-d0d1-m1 { - rockchip,pins = <0x03 0x01 0x03 0xad 0x03 0x02 0x03 0xad>; - phandle = <0x14b>; - }; - - d10-d11-m1 { - rockchip,pins = <0x03 0x17 0x03 0xad>; - phandle = <0x14c>; - }; - }; - - isp { - - isp-prelight { - rockchip,pins = <0x03 0x19 0x04 0xad>; - phandle = <0x14d>; - }; - }; - - pmic { - - pmic_int { - rockchip,pins = <0x00 0x07 0x00 0xae 0x03 0x17 0x00 0xad>; - phandle = <0x5a>; - }; - - soc_slppin_gpio { - rockchip,pins = <0x00 0x04 0x00 0xb5>; - phandle = <0x5d>; - }; - - soc_slppin_slp { - rockchip,pins = <0x00 0x04 0x01 0xad>; - phandle = <0x5b>; - }; - - soc_slppin_rst { - rockchip,pins = <0x00 0x04 0x02 0xad>; - phandle = <0x5f>; - }; - }; - - headphone { - - hp-det { - rockchip,pins = <0x02 0x16 0x00 0xad>; - phandle = <0xc0>; - }; - }; - - leds { - - led-pins { - rockchip,pins = <0x00 0x01 0x00 0xad>; - phandle = <0xbb>; - }; - }; - - btns { - - btn-pins { - rockchip,pins = <0x03 0x0c 0x00 0xae 0x01 0x0d 0x00 0xae 0x03 0x0e 0x00 0xae 0x01 0x0f 0x00 0xae 0x01 0x02 0x00 0xae 0x01 0x05 0x00 0xae 0x01 0x06 0x00 0xae 0x01 0x07 0x00 0xae 0x02 0x00 0x00 0xae 0x02 0x01 0x00 0xae 0x02 0x02 0x00 0xae 0x02 0x03 0x00 0xae 0x02 0x04 0x00 0xae 0x02 0x05 0x00 0xae 0x02 0x06 0x00 0xae 0x02 0x07 0x00 0xae 0x00 0x0f 0x00 0xae 0x03 0x0a 0x00 0xae>; - phandle = <0xb9>; - }; - }; - }; - - chosen { - bootargs = [00]; - }; - - fiq-debugger { - compatible = "rockchip,fiq-debugger"; - rockchip,serial-id = <0x02>; - rockchip,wake-irq = <0x00>; - rockchip,irq-mode-enable = <0x00>; - rockchip,baudrate = <0x16e360>; - interrupts = <0x00 0x7f 0x08>; - pinctrl-names = "default"; - pinctrl-0 = <0xb6>; - status = "okay"; - }; - - ramoops { - compatible = "ramoops"; - record-size = <0x00 0x20000>; - console-size = <0x00 0x80000>; - ftrace-size = <0x00 0x00>; - pmsg-size = <0x00 0x00>; - memory-region = <0xb7>; - }; - - reserved-memory { - #address-cells = <0x02>; - #size-cells = <0x02>; - ranges; - - drm-logo@00000000 { - compatible = "rockchip,drm-logo"; - reg = <0x00 0x00 0x00 0x00>; - phandle = <0x11>; - }; - - region@110000 { - reg = <0x00 0x110000 0x00 0xf0000>; - reg-names = "ramoops_mem"; - phandle = <0xb7>; - }; - }; - - odroidgo3-keys { - compatible = "gpio-keys"; - #address-cells = <0x01>; - #size-cells = <0x00>; - autorepeat; - phandle = <0x14e>; - - button@0 { - label = "GPIO BTN-VOLUP"; - linux,code = <0x73>; - gpios = <0x63 0x16 0x01>; - }; - - button@1 { - label = "GPIO BTN-VOLDN"; - linux,code = <0x72>; - gpios = <0x63 0x15 0x01>; - }; - }; - - odroidgo3-joypad { - compatible = "odroidgo3-joypad"; - pwms = <0xb8 0x00 0xbebc200 0x00>; - pwm-names = "enable"; - rumble-boost-weak = <0x00>; - rumble-boost-strong = <0x00>; - joypad-name = "GO-Super Gamepad"; - joypad-product = <0x1100>; - joypad-revision = <0x100>; - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <0xb9>; - pinctrl-1 = <0x78>; - io-channel-names = "amux_adc"; - io-channels = <0xba 0x01>; - amux-count = <0x04>; - amux-a-gpios = <0x59 0x0d 0x01>; - amux-b-gpios = <0x59 0x0c 0x01>; - amux-en-gpios = <0x59 0x11 0x01>; - button-adc-scale = <0x02>; - button-adc-deadzone = <0x40>; - button-adc-fuzz = <0x20>; - button-adc-flat = <0x20>; - abs_x-p-tuning = <0xc8>; - abs_x-n-tuning = <0xc8>; - abs_y-p-tuning = <0xc8>; - abs_y-n-tuning = <0xc8>; - abs_rx-p-tuning = <0xc8>; - abs_rx-n-tuning = <0xc8>; - abs_ry-p-tuning = <0xc8>; - abs_ry-n-tuning = <0xc8>; - poll-interval = <0x0a>; - invert-absx; - invert-absy; - phandle = <0x14f>; - - sw1 { - gpios = <0x63 0x07 0x01>; - label = "GPIO DPAD-UP"; - linux,code = <0x220>; - }; - - sw2 { - gpios = <0x63 0x08 0x01>; - label = "GPIO DPAD-DOWN"; - linux,code = <0x221>; - }; - - sw3 { - gpios = <0x63 0x0a 0x01>; - label = "GPIO DPAD-LEFT"; - linux,code = <0x222>; - }; - - sw4 { - gpios = <0x63 0x09 0x01>; - label = "GPIO DPAD-RIGHT"; - linux,code = <0x223>; - }; - - sw5 { - gpios = <0x63 0x0e 0x01>; - label = "GPIO KEY BTN-A"; - linux,code = <0x131>; - }; - - sw6 { - gpios = <0x63 0x0c 0x01>; - label = "GPIO BTN-B"; - linux,code = <0x130>; - }; - - sw7 { - gpios = <0x63 0x0b 0x01>; - label = "GPIO BTN-Y"; - linux,code = <0x134>; - }; - - sw8 { - gpios = <0x63 0x0d 0x01>; - label = "GPIO BTN-X"; - linux,code = <0x133>; - }; - - sw11 { - gpios = <0x59 0x0b 0x01>; - label = "GPIO F3"; - linux,code = <0x2c2>; - }; - - sw12 { - gpios = <0x63 0x1b 0x01>; - label = "GPIO F4"; - linux,code = <0x2c3>; - }; - - sw15 { - gpios = <0x63 0x03 0x01>; - label = "GPIO TOP-LEFT"; - linux,code = <0x136>; - }; - - sw16 { - gpios = <0x63 0x00 0x01>; - label = "GPIO TOP-RIGHT"; - linux,code = <0x137>; - }; - - sw19 { - gpios = <0x63 0x04 0x01>; - label = "GPIO F1"; - linux,code = <0x2c4>; - }; - - sw20 { - gpios = <0x63 0x02 0x01>; - label = "GPIO TOP-LEFT2"; - linux,code = <0x138>; - }; - - sw21 { - gpios = <0x63 0x01 0x01>; - label = "GPIO TOP-RIGHT2"; - linux,code = <0x139>; - }; - - sw22 { - gpios = <0x63 0x06 0x01>; - label = "GPIO F2"; - linux,code = <0x2c1>; - }; - - sw13 { - gpios = <0x63 0x05 0x01>; - label = "GPIO F5"; - linux,code = <0x2c0>; - }; - }; - - gpio_leds { - status = "disabled"; - compatible = "gpio-leds"; - pinctrl-names = "led_pins"; - pinctrl-0 = <0xbb>; - phandle = <0x150>; - - heartbeat { - label = "blue:heartbeat"; - gpios = <0x59 0x01 0x00>; - linux,default-trigger = "heartbeat"; - }; - }; - - backlight { - compatible = "pwm-backlight"; - pwms = <0xbc 0x00 0x9c40 0x00>; - brightness-levels = <0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f 0x20 0x21 0x22 0x23 0x24 0x25 0x26 0x27 0x28 0x29 0x2a 0x2b 0x2c 0x2d 0x2e 0x2f 0x30 0x31 0x32 0x33 0x34 0x35 0x36 0x37 0x38 0x39 0x3a 0x3b 0x3c 0x3d 0x3e 0x3f 0x40 0x41 0x42 0x43 0x44 0x45 0x46 0x47 0x48 0x49 0x4a 0x4b 0x4c 0x4d 0x4e 0x4f 0x50 0x51 0x52 0x53 0x54 0x55 0x56 0x57 0x58 0x59 0x5a 0x5b 0x5c 0x5d 0x5e 0x5f 0x60 0x61 0x62 0x63 0x64 0x65 0x66 0x67 0x68 0x69 0x6a 0x6b 0x6c 0x6d 0x6e 0x6f 0x70 0x71 0x72 0x73 0x74 0x75 0x76 0x77 0x78 0x79 0x7a 0x7b 0x7c 0x7d 0x7e 0x7f 0x80 0x81 0x82 0x83 0x84 0x85 0x86 0x87 0x88 0x89 0x8a 0x8b 0x8c 0x8d 0x8e 0x8f 0x90 0x91 0x92 0x93 0x94 0x95 0x96 0x97 0x98 0x99 0x9a 0x9b 0x9c 0x9d 0x9e 0x9f 0xa0>; - default-brightness-level = <0x50>; - phandle = <0x99>; - }; - - rk817-sound { - compatible = "simple-audio-card"; - simple-audio-card,format = "i2s"; - simple-audio-card,name = "rockchip,rk817-codec"; - simple-audio-card,mclk-fs = <0x100>; - simple-audio-card,widgets = "Microphone\0Mic Jack\0Headphone\0Headphone Jack"; - simple-audio-card,routing = "MIC_IN\0Mic Jack\0Headphone Jack\0HPOL\0Headphone Jack\0HPOR"; - - simple-audio-card,cpu { - sound-dai = <0xbd>; - }; - - simple-audio-card,codec { - sound-dai = <0xbe>; - }; - }; - - rk_headset { - compatible = "rockchip_headset"; - headset_gpio = <0xbf 0x16 0x00>; - pinctrl-names = "default"; - pinctrl-0 = <0xc0>; - }; - - vccsys { - compatible = "regulator-fixed"; - regulator-name = "vcc3v8_sys"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0x39fbc0>; - regulator-max-microvolt = <0x39fbc0>; - phandle = <0x61>; - }; - - __symbols__ { - ddr_timing = "/ddr_timing"; - cpu0 = "/cpus/cpu@0"; - cpu1 = "/cpus/cpu@1"; - cpu2 = "/cpus/cpu@2"; - cpu3 = "/cpus/cpu@3"; - CPU_SLEEP = "/cpus/idle-states/cpu-sleep"; - CLUSTER_SLEEP = "/cpus/idle-states/cluster-sleep"; - cpu0_opp_table = "/cpu0-opp-table"; - bus_soc = "/bus-soc"; - bus_apll = "/bus-apll"; - bus_apll_opp_table = "/bus-apll-opp-table"; - display_subsystem = "/display-subsystem"; - route_lvds = "/display-subsystem/route/route-lvds"; - route_dsi = "/display-subsystem/route/route-dsi"; - route_rgb = "/display-subsystem/route/route-rgb"; - gmac_clkin = "/external-gmac-clock"; - rockchip_suspend = "/rockchip-suspend"; - xin24m = "/xin24m"; - xin32k = "/xin32k"; - pmu = "/power-management@ff000000"; - power = "/power-management@ff000000/power-controller"; - pmugrf = "/syscon@ff010000"; - pmu_io_domains = "/syscon@ff010000/io-domains"; - pmu_pvtm = "/syscon@ff010000/pmu-pvtm"; - uart0 = "/serial@ff030000"; - i2s0_8ch = "/i2s@ff060000"; - i2s1_2ch = "/i2s@ff070000"; - i2s2_2ch = "/i2s@ff080000"; - pdm = "/pdm@ff0a0000"; - crypto = "/crypto@ff0b0000"; - rng = "/rng@ff0b0000"; - gic = "/interrupt-controller@ff131000"; - grf = "/syscon@ff140000"; - io_domains = "/syscon@ff140000/io-domains"; - lvds = "/syscon@ff140000/lvds"; - lvds_in_vopb = "/syscon@ff140000/lvds/ports/port@0/endpoint@0"; - rgb = "/syscon@ff140000/rgb"; - rgb_in_vopb = "/syscon@ff140000/rgb/ports/port@0/endpoint@0"; - core_grf = "/syscon@ff148000"; - pvtm = "/syscon@ff148000/pvtm"; - uart1 = "/serial@ff158000"; - uart2 = "/serial@ff160000"; - uart3 = "/serial@ff168000"; - uart4 = "/serial@ff170000"; - uart5 = "/serial@ff178000"; - i2c0 = "/i2c@ff180000"; - rk817 = "/i2c@ff180000/pmic@20"; - pinctrl_rk8xx = "/i2c@ff180000/pmic@20/pinctrl_rk8xx"; - rk817_ts_gpio1 = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_ts_gpio1"; - rk817_gt_gpio2 = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_gt_gpio2"; - rk817_pin_ts = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_pin_ts"; - rk817_pin_gt = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_pin_gt"; - rk817_slppin_null = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_slppin_null"; - rk817_slppin_slp = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_slppin_slp"; - rk817_slppin_pwrdn = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_slppin_pwrdn"; - rk817_slppin_rst = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_slppin_rst"; - vdd_logic = "/i2c@ff180000/pmic@20/regulators/DCDC_REG1"; - vdd_arm = "/i2c@ff180000/pmic@20/regulators/DCDC_REG2"; - vcc_ddr = "/i2c@ff180000/pmic@20/regulators/DCDC_REG3"; - vcc_3v3 = "/i2c@ff180000/pmic@20/regulators/DCDC_REG4"; - vcc_1v0 = "/i2c@ff180000/pmic@20/regulators/LDO_REG1"; - vcc1v8_soc = "/i2c@ff180000/pmic@20/regulators/LDO_REG2"; - vdd1v0_soc = "/i2c@ff180000/pmic@20/regulators/LDO_REG3"; - vcc3v3_pmu = "/i2c@ff180000/pmic@20/regulators/LDO_REG4"; - vccio_sd = "/i2c@ff180000/pmic@20/regulators/LDO_REG5"; - vcc_sd = "/i2c@ff180000/pmic@20/regulators/LDO_REG6"; - vcc2v8_dvp = "/i2c@ff180000/pmic@20/regulators/LDO_REG7"; - vcc_lcd = "/i2c@ff180000/pmic@20/regulators/LDO_REG8"; - vdd_11 = "/i2c@ff180000/pmic@20/regulators/LDO_REG9"; - dcdc_boost = "/i2c@ff180000/pmic@20/regulators/BOOST"; - otg_switch = "/i2c@ff180000/pmic@20/regulators/OTG_SWITCH"; - rk817_codec = "/i2c@ff180000/pmic@20/codec"; - i2c1 = "/i2c@ff190000"; - i2c2 = "/i2c@ff1a0000"; - i2c3 = "/i2c@ff1b0000"; - spi0 = "/spi@ff1d0000"; - spi1 = "/spi@ff1d8000"; - wdt = "/watchdog@ff1e0000"; - pwm0 = "/pwm@ff200000"; - pwm1 = "/pwm@ff200010"; - pwm2 = "/pwm@ff200020"; - pwm3 = "/pwm@ff200030"; - pwm4 = "/pwm@ff208000"; - pwm5 = "/pwm@ff208010"; - pwm6 = "/pwm@ff208020"; - pwm7 = "/pwm@ff208030"; - rktimer = "/rktimer@ff210000"; - dmac = "/amba/dmac@ff240000"; - thermal_zones = "/thermal-zones"; - soc_thermal = "/thermal-zones/soc-thermal"; - threshold = "/thermal-zones/soc-thermal/trips/trip-point-0"; - target = "/thermal-zones/soc-thermal/trips/trip-point-1"; - soc_crit = "/thermal-zones/soc-thermal/trips/soc-crit"; - gpu_thermal = "/thermal-zones/gpu-thermal"; - tsadc = "/tsadc@ff280000"; - saradc = "/saradc@ff288000"; - otp = "/otp@ff290000"; - otp_id = "/otp@ff290000/id@7"; - cpu_leakage = "/otp@ff290000/cpu-leakage@17"; - performance = "/otp@ff290000/performance@1e"; - cru = "/clock-controller@ff2b0000"; - cpu_boost = "/cpu-boost@ff2b8000"; - pmucru = "/pmu-clock-controller@ff2bc000"; - usb2phy_grf = "/syscon@ff2c0000"; - u2phy = "/syscon@ff2c0000/usb2-phy@100"; - u2phy_host = "/syscon@ff2c0000/usb2-phy@100/host-port"; - u2phy_otg = "/syscon@ff2c0000/usb2-phy@100/otg-port"; - video_phy = "/video-phy@ff2e0000"; - mipi_dphy_rx0 = "/mipi-dphy-rx0@ff2f0000"; - usb20_otg = "/usb@ff300000"; - usb_host0_ehci = "/usb@ff340000"; - usb_host0_ohci = "/usb@ff350000"; - gmac = "/ethernet@ff360000"; - sdmmc = "/dwmmc@ff370000"; - sdio = "/dwmmc@ff380000"; - emmc = "/dwmmc@ff390000"; - nandc0 = "/nandc@ff3b0000"; - sfc = "/sfc@ff3a0000"; - gpu = "/gpu@ff400000"; - gpu_opp_table = "/gpu-opp-table"; - hevc = "/hevc_service@ff440000"; - vpu = "/vpu_service@ff442000"; - vpu_combo = "/vpu_combo"; - hevc_mmu = "/iommu@ff440440"; - vpu_mmu = "/iommu@ff442800"; - dsi = "/dsi@ff450000"; - dsi_in_vopb = "/dsi@ff450000/ports/port@0/endpoint@0"; - timing0 = "/dsi@ff450000/panel@0/display-timings/60Hz"; - timing1 = "/dsi@ff450000/panel@0/display-timings/50Hz"; - timing2 = "/dsi@ff450000/panel@0/display-timings/75Hz"; - vopb = "/vop@ff460000"; - vopb_out = "/vop@ff460000/port"; - vopb_out_lvds = "/vop@ff460000/port/endpoint@0"; - vopb_out_dsi = "/vop@ff460000/port/endpoint@1"; - vopb_out_rgb = "/vop@ff460000/port/endpoint@2"; - vopb_mmu = "/iommu@ff460f00"; - rk_rga = "/rk_rga@ff480000"; - cif = "/cif@ff490000"; - cif_new = "/cif-new@ff490000"; - vip_mmu = "/iommu@ff490800"; - rk_isp = "/rk_isp@ff4a0000"; - rkisp1 = "/rkisp1@ff4a0000"; - isp_mmu = "/iommu@ff4a8000"; - qos_gmac = "/qos@ff518000"; - qos_gpu = "/qos@ff520000"; - qos_sdmmc = "/qos@ff52c000"; - qos_emmc = "/qos@ff538000"; - qos_nand = "/qos@ff538080"; - qos_sdio = "/qos@ff538100"; - qos_sfc = "/qos@ff538180"; - qos_usb_host = "/qos@ff540000"; - qos_usb_otg = "/qos@ff540080"; - qos_isp_128 = "/qos@ff548000"; - qos_isp_rd = "/qos@ff548080"; - qos_isp_wr = "/qos@ff548100"; - qos_isp_m1 = "/qos@ff548180"; - qos_vip = "/qos@ff548200"; - qos_rga_rd = "/qos@ff550000"; - qos_rga_wr = "/qos@ff550080"; - qos_vop_m0 = "/qos@ff550100"; - qos_vop_m1 = "/qos@ff550180"; - qos_vpu = "/qos@ff558000"; - qos_vpu_r128 = "/qos@ff558080"; - dfi = "/dfi@ff610000"; - dmc = "/dmc"; - ddr_power_model = "/dmc/ddr_power_model"; - dmc_opp_table = "/dmc-opp-table"; - rockchip_system_monitor = "/rockchip-system-monitor"; - pinctrl = "/pinctrl"; - gpio0 = "/pinctrl/gpio0@ff040000"; - gpio1 = "/pinctrl/gpio1@ff250000"; - gpio2 = "/pinctrl/gpio2@ff260000"; - gpio3 = "/pinctrl/gpio3@ff270000"; - pcfg_pull_up = "/pinctrl/pcfg-pull-up"; - pcfg_pull_down = "/pinctrl/pcfg-pull-down"; - pcfg_pull_none = "/pinctrl/pcfg-pull-none"; - pcfg_pull_none_2ma = "/pinctrl/pcfg-pull-none-2ma"; - pcfg_pull_up_2ma = "/pinctrl/pcfg-pull-up-2ma"; - pcfg_pull_up_4ma = "/pinctrl/pcfg-pull-up-4ma"; - pcfg_pull_none_4ma = "/pinctrl/pcfg-pull-none-4ma"; - pcfg_pull_down_4ma = "/pinctrl/pcfg-pull-down-4ma"; - pcfg_pull_none_8ma = "/pinctrl/pcfg-pull-none-8ma"; - pcfg_pull_up_8ma = "/pinctrl/pcfg-pull-up-8ma"; - pcfg_pull_none_12ma = "/pinctrl/pcfg-pull-none-12ma"; - pcfg_pull_up_12ma = "/pinctrl/pcfg-pull-up-12ma"; - pcfg_pull_none_smt = "/pinctrl/pcfg-pull-none-smt"; - pcfg_output_high = "/pinctrl/pcfg-output-high"; - pcfg_output_low = "/pinctrl/pcfg-output-low"; - pcfg_input_high = "/pinctrl/pcfg-input-high"; - pcfg_input = "/pinctrl/pcfg-input"; - i2c0_xfer = "/pinctrl/i2c0/i2c0-xfer"; - i2c1_xfer = "/pinctrl/i2c1/i2c1-xfer"; - i2c2_xfer = "/pinctrl/i2c2/i2c2-xfer"; - i2c3_xfer = "/pinctrl/i2c3/i2c3-xfer"; - tsadc_otp_gpio = "/pinctrl/tsadc/tsadc-otp-gpio"; - tsadc_otp_out = "/pinctrl/tsadc/tsadc-otp-out"; - uart0_xfer = "/pinctrl/uart0/uart0-xfer"; - uart0_cts = "/pinctrl/uart0/uart0-cts"; - uart0_rts = "/pinctrl/uart0/uart0-rts"; - uart0_rts_gpio = "/pinctrl/uart0/uart0-rts-gpio"; - uart1_xfer = "/pinctrl/uart1/uart1-xfer"; - uart1_cts = "/pinctrl/uart1/uart1-cts"; - uart1_rts = "/pinctrl/uart1/uart1-rts"; - uart1_rts_gpio = "/pinctrl/uart1/uart1-rts-gpio"; - uart2m0_xfer = "/pinctrl/uart2-m0/uart2m0-xfer"; - uart2m1_xfer = "/pinctrl/uart2-m1/uart2m1-xfer"; - uart3m0_xfer = "/pinctrl/uart3-m0/uart3m0-xfer"; - uart3m0_cts = "/pinctrl/uart3-m0/uart3m0-cts"; - uart3m0_rts = "/pinctrl/uart3-m0/uart3m0-rts"; - uart3m0_rts_gpio = "/pinctrl/uart3-m0/uart3m0-rts-gpio"; - uart3m1_xfer = "/pinctrl/uart3-m1/uart3m1-xfer"; - uart3m1_cts = "/pinctrl/uart3-m1/uart3m1-cts"; - uart3m1_rts = "/pinctrl/uart3-m1/uart3m1-rts"; - uart3m1_rts_gpio = "/pinctrl/uart3-m1/uart3m1-rts-gpio"; - uart4_xfer = "/pinctrl/uart4/uart4-xfer"; - uart4_cts = "/pinctrl/uart4/uart4-cts"; - uart4_rts = "/pinctrl/uart4/uart4-rts"; - uart5_xfer = "/pinctrl/uart5/uart5-xfer"; - uart5_cts = "/pinctrl/uart5/uart5-cts"; - uart5_rts = "/pinctrl/uart5/uart5-rts"; - spi0_clk = "/pinctrl/spi0/spi0-clk"; - spi0_csn = "/pinctrl/spi0/spi0-csn"; - spi0_miso = "/pinctrl/spi0/spi0-miso"; - spi0_mosi = "/pinctrl/spi0/spi0-mosi"; - spi0_clk_hs = "/pinctrl/spi0/spi0-clk-hs"; - spi0_miso_hs = "/pinctrl/spi0/spi0-miso-hs"; - spi0_mosi_hs = "/pinctrl/spi0/spi0-mosi-hs"; - spi1_clk = "/pinctrl/spi1/spi1-clk"; - spi1_csn0 = "/pinctrl/spi1/spi1-csn0"; - spi1_csn1 = "/pinctrl/spi1/spi1-csn1"; - spi1_miso = "/pinctrl/spi1/spi1-miso"; - spi1_mosi = "/pinctrl/spi1/spi1-mosi"; - spi1_clk_hs = "/pinctrl/spi1/spi1-clk-hs"; - spi1_miso_hs = "/pinctrl/spi1/spi1-miso-hs"; - spi1_mosi_hs = "/pinctrl/spi1/spi1-mosi-hs"; - pdm_clk0m1 = "/pinctrl/pdm/pdm-clk0m1"; - pdm_clk1 = "/pinctrl/pdm/pdm-clk1"; - pdm_sdi0m0 = "/pinctrl/pdm/pdm-sdi0m0"; - pdm_sdi0m1 = "/pinctrl/pdm/pdm-sdi0m1"; - pdm_sdi1 = "/pinctrl/pdm/pdm-sdi1"; - pdm_sdi2 = "/pinctrl/pdm/pdm-sdi2"; - pdm_sdi3 = "/pinctrl/pdm/pdm-sdi3"; - pdm_clk0m_sleep1 = "/pinctrl/pdm/pdm-clk0m1-sleep"; - pdm_clk1_sleep = "/pinctrl/pdm/pdm-clk1-sleep"; - pdm_sdi0m0_sleep = "/pinctrl/pdm/pdm-sdi0m0-sleep"; - pdm_sdi0m1_sleep = "/pinctrl/pdm/pdm-sdi0m1-sleep"; - pdm_sdi1_sleep = "/pinctrl/pdm/pdm-sdi1-sleep"; - pdm_sdi2_sleep = "/pinctrl/pdm/pdm-sdi2-sleep"; - pdm_sdi3_sleep = "/pinctrl/pdm/pdm-sdi3-sleep"; - i2s0_8ch_mclk = "/pinctrl/i2s0/i2s0-8ch-mclk"; - i2s0_8ch_sclktx = "/pinctrl/i2s0/i2s0-8ch-sclktx"; - i2s0_8ch_sclkrx = "/pinctrl/i2s0/i2s0-8ch-sclkrx"; - i2s0_8ch_lrcktx = "/pinctrl/i2s0/i2s0-8ch-lrcktx"; - i2s0_8ch_lrckrx = "/pinctrl/i2s0/i2s0-8ch-lrckrx"; - i2s0_8ch_sdo0 = "/pinctrl/i2s0/i2s0-8ch-sdo0"; - i2s0_8ch_sdo1 = "/pinctrl/i2s0/i2s0-8ch-sdo1"; - i2s0_8ch_sdo2 = "/pinctrl/i2s0/i2s0-8ch-sdo2"; - i2s0_8ch_sdo3 = "/pinctrl/i2s0/i2s0-8ch-sdo3"; - i2s0_8ch_sdi0 = "/pinctrl/i2s0/i2s0-8ch-sdi0"; - i2s0_8ch_sdi1 = "/pinctrl/i2s0/i2s0-8ch-sdi1"; - i2s0_8ch_sdi2 = "/pinctrl/i2s0/i2s0-8ch-sdi2"; - i2s0_8ch_sdi3 = "/pinctrl/i2s0/i2s0-8ch-sdi3"; - i2s1_2ch_mclk = "/pinctrl/i2s1/i2s1-2ch-mclk"; - i2s1_2ch_sclk = "/pinctrl/i2s1/i2s1-2ch-sclk"; - i2s1_2ch_lrck = "/pinctrl/i2s1/i2s1-2ch-lrck"; - i2s1_2ch_sdi = "/pinctrl/i2s1/i2s1-2ch-sdi"; - i2s1_2ch_sdo = "/pinctrl/i2s1/i2s1-2ch-sdo"; - i2s2_2ch_mclk = "/pinctrl/i2s2/i2s2-2ch-mclk"; - i2s2_2ch_sclk = "/pinctrl/i2s2/i2s2-2ch-sclk"; - i2s2_2ch_lrck = "/pinctrl/i2s2/i2s2-2ch-lrck"; - i2s2_2ch_sdi = "/pinctrl/i2s2/i2s2-2ch-sdi"; - i2s2_2ch_sdo = "/pinctrl/i2s2/i2s2-2ch-sdo"; - sdmmc_clk = "/pinctrl/sdmmc/sdmmc-clk"; - sdmmc_cmd = "/pinctrl/sdmmc/sdmmc-cmd"; - sdmmc_det = "/pinctrl/sdmmc/sdmmc-det"; - sdmmc_bus1 = "/pinctrl/sdmmc/sdmmc-bus1"; - sdmmc_bus4 = "/pinctrl/sdmmc/sdmmc-bus4"; - sdmmc_gpio = "/pinctrl/sdmmc/sdmmc-gpio"; - sdio_clk = "/pinctrl/sdio/sdio-clk"; - sdio_cmd = "/pinctrl/sdio/sdio-cmd"; - sdio_bus4 = "/pinctrl/sdio/sdio-bus4"; - sdio_gpio = "/pinctrl/sdio/sdio-gpio"; - emmc_clk = "/pinctrl/emmc/emmc-clk"; - emmc_cmd = "/pinctrl/emmc/emmc-cmd"; - emmc_pwren = "/pinctrl/emmc/emmc-pwren"; - emmc_rstnout = "/pinctrl/emmc/emmc-rstnout"; - emmc_bus1 = "/pinctrl/emmc/emmc-bus1"; - emmc_bus4 = "/pinctrl/emmc/emmc-bus4"; - emmc_bus8 = "/pinctrl/emmc/emmc-bus8"; - flash_cs0 = "/pinctrl/flash/flash-cs0"; - flash_rdy = "/pinctrl/flash/flash-rdy"; - flash_dqs = "/pinctrl/flash/flash-dqs"; - flash_ale = "/pinctrl/flash/flash-ale"; - flash_cle = "/pinctrl/flash/flash-cle"; - flash_wrn = "/pinctrl/flash/flash-wrn"; - flash_csl = "/pinctrl/flash/flash-csl"; - flash_rdn = "/pinctrl/flash/flash-rdn"; - flash_bus8 = "/pinctrl/flash/flash-bus8"; - lcdc_m0_rgb_pins = "/pinctrl/lcdc/lcdc-m0-rgb-pins"; - lcdc_m0_sleep_pins = "/pinctrl/lcdc/lcdc-m0-sleep-pins"; - lcdc_m1_rgb_pins = "/pinctrl/lcdc/lcdc-m1-rgb-pins"; - lcdc_m1_sleep_pins = "/pinctrl/lcdc/lcdc-m1-sleep-pins"; - pwm0_pin = "/pinctrl/pwm0/pwm0-pin"; - pwm1_pin = "/pinctrl/pwm1/pwm1-pin"; - pwm2_pin = "/pinctrl/pwm2/pwm2-pin"; - pwm3_pin = "/pinctrl/pwm3/pwm3-pin"; - pwm4_pin = "/pinctrl/pwm4/pwm4-pin"; - pwm5_pin = "/pinctrl/pwm5/pwm5-pin"; - pwm6_pin = "/pinctrl/pwm6/pwm6-pin"; - pwm7_pin = "/pinctrl/pwm7/pwm7-pin"; - rmii_pins = "/pinctrl/gmac/rmii-pins"; - mac_refclk_12ma = "/pinctrl/gmac/mac-refclk-12ma"; - mac_refclk = "/pinctrl/gmac/mac-refclk"; - cif_clkout_m0 = "/pinctrl/cif-m0/cif-clkout-m0"; - dvp_d2d9_m0 = "/pinctrl/cif-m0/dvp-d2d9-m0"; - dvp_d0d1_m0 = "/pinctrl/cif-m0/dvp-d0d1-m0"; - dvp_d10d11_m0 = "/pinctrl/cif-m0/d10-d11-m0"; - cif_clkout_m1 = "/pinctrl/cif-m1/cif-clkout-m1"; - dvp_d2d9_m1 = "/pinctrl/cif-m1/dvp-d2d9-m1"; - dvp_d0d1_m1 = "/pinctrl/cif-m1/dvp-d0d1-m1"; - dvp_d10d11_m1 = "/pinctrl/cif-m1/d10-d11-m1"; - isp_prelight = "/pinctrl/isp/isp-prelight"; - pmic_int = "/pinctrl/pmic/pmic_int"; - soc_slppin_gpio = "/pinctrl/pmic/soc_slppin_gpio"; - soc_slppin_slp = "/pinctrl/pmic/soc_slppin_slp"; - soc_slppin_rst = "/pinctrl/pmic/soc_slppin_rst"; - hp_det = "/pinctrl/headphone/hp-det"; - led_pins = "/pinctrl/leds/led-pins"; - btn_pins = "/pinctrl/btns/btn-pins"; - drm_logo = "/reserved-memory/drm-logo@00000000"; - ramoops_mem = "/reserved-memory/region@110000"; - gpio_keys = "/odroidgo3-keys"; - joypad = "/odroidgo3-joypad"; - leds = "/gpio_leds"; - backlight = "/backlight"; - vccsys = "/vccsys"; - }; -}; diff --git a/config/archr-dts/R36S-DTB/DTS/R35S-Rumble.dts b/config/archr-dts/R36S-DTB/DTS/R35S-Rumble.dts deleted file mode 100644 index 5d5f9b1a61..0000000000 --- a/config/archr-dts/R36S-DTB/DTS/R35S-Rumble.dts +++ /dev/null @@ -1,4071 +0,0 @@ -/dts-v1/; - -/ { - compatible = "rockchip,rk3326-odroidgo3-linux\0rockchip,rk3326"; - interrupt-parent = <0x01>; - #address-cells = <0x02>; - #size-cells = <0x02>; - model = "Game Console R35S/R36S fix by lxc"; - - ddr_timing { - compatible = "rockchip,ddr-timing"; - ddr2_speed_bin = <0x00>; - ddr3_speed_bin = <0x15>; - ddr4_speed_bin = <0x0c>; - pd_idle = <0x0d>; - sr_idle = <0x5d>; - sr_mc_gate_idle = <0x00>; - srpd_lite_idle = <0x00>; - standby_idle = <0x00>; - auto_pd_dis_freq = <0x42a>; - auto_sr_dis_freq = <0x320>; - ddr2_dll_dis_freq = <0x12c>; - ddr3_dll_dis_freq = <0x12c>; - ddr4_dll_dis_freq = <0x271>; - phy_dll_dis_freq = <0x190>; - ddr2_odt_dis_freq = <0x64>; - phy_ddr2_odt_dis_freq = <0x64>; - ddr2_drv = <0x01>; - ddr2_odt = <0x96>; - phy_ddr2_ca_drv = <0x15>; - phy_ddr2_ck_drv = <0x12>; - phy_ddr2_dq_drv = <0x15>; - phy_ddr2_odt = <0x02>; - ddr3_odt_dis_freq = <0x190>; - phy_ddr3_odt_dis_freq = <0x190>; - ddr3_drv = <0x28>; - ddr3_odt = <0x78>; - phy_ddr3_ca_drv = <0x15>; - phy_ddr3_ck_drv = <0x12>; - phy_ddr3_dq_drv = <0x15>; - phy_ddr3_odt = <0x02>; - phy_lpddr2_odt_dis_freq = <0x29a>; - lpddr2_drv = <0x28>; - phy_lpddr2_ca_drv = <0x16>; - phy_lpddr2_ck_drv = <0x13>; - phy_lpddr2_dq_drv = <0x16>; - phy_lpddr2_odt = <0x00>; - lpddr3_odt_dis_freq = <0x190>; - phy_lpddr3_odt_dis_freq = <0x190>; - lpddr3_drv = <0x28>; - lpddr3_odt = <0xf0>; - phy_lpddr3_ca_drv = <0x16>; - phy_lpddr3_ck_drv = <0x13>; - phy_lpddr3_dq_drv = <0x16>; - phy_lpddr3_odt = <0x02>; - lpddr4_odt_dis_freq = <0x320>; - phy_lpddr4_odt_dis_freq = <0x320>; - lpddr4_drv = <0x3c>; - lpddr4_dq_odt = <0x28>; - lpddr4_ca_odt = <0x28>; - phy_lpddr4_ca_drv = <0x14>; - phy_lpddr4_ck_cs_drv = <0x06>; - phy_lpddr4_dq_drv = <0x06>; - phy_lpddr4_odt = <0x10>; - ddr4_odt_dis_freq = <0x29a>; - phy_ddr4_odt_dis_freq = <0x29a>; - ddr4_drv = <0x22>; - ddr4_odt = <0xf0>; - phy_ddr4_ca_drv = <0x16>; - phy_ddr4_ck_drv = <0x13>; - phy_ddr4_dq_drv = <0x16>; - phy_ddr4_odt = <0x02>; - ddr3a1_ddr4a9_de-skew = <0x06>; - ddr3a0_ddr4a10_de-skew = <0x07>; - ddr3a3_ddr4a6_de-skew = <0x07>; - ddr3a2_ddr4a4_de-skew = <0x07>; - ddr3a5_ddr4a8_de-skew = <0x07>; - ddr3a4_ddr4a5_de-skew = <0x07>; - ddr3a7_ddr4a11_de-skew = <0x07>; - ddr3a6_ddr4a7_de-skew = <0x06>; - ddr3a9_ddr4a0_de-skew = <0x07>; - ddr3a8_ddr4a13_de-skew = <0x07>; - ddr3a11_ddr4a3_de-skew = <0x07>; - ddr3a10_ddr4cs0_de-skew = <0x07>; - ddr3a13_ddr4a2_de-skew = <0x07>; - ddr3a12_ddr4ba1_de-skew = <0x07>; - ddr3a15_ddr4odt0_de-skew = <0x07>; - ddr3a14_ddr4a1_de-skew = <0x07>; - ddr3ba1_ddr4a15_de-skew = <0x07>; - ddr3ba0_ddr4bg0_de-skew = <0x07>; - ddr3ras_ddr4cke_de-skew = <0x07>; - ddr3ba2_ddr4ba0_de-skew = <0x07>; - ddr3we_ddr4bg1_de-skew = <0x07>; - ddr3cas_ddr4a12_de-skew = <0x07>; - ddr3ckn_ddr4ckn_de-skew = <0x07>; - ddr3ckp_ddr4ckp_de-skew = <0x07>; - ddr3cke_ddr4a16_de-skew = <0x07>; - ddr3odt0_ddr4a14_de-skew = <0x07>; - ddr3cs0_ddr4act_de-skew = <0x06>; - ddr3reset_ddr4reset_de-skew = <0x07>; - ddr3cs1_ddr4cs1_de-skew = <0x06>; - ddr3odt1_ddr4odt1_de-skew = <0x07>; - cs0_dm0_rx_de-skew = <0x07>; - cs0_dm0_tx_de-skew = <0x07>; - cs0_dq0_rx_de-skew = <0x08>; - cs0_dq0_tx_de-skew = <0x08>; - cs0_dq1_rx_de-skew = <0x09>; - cs0_dq1_tx_de-skew = <0x08>; - cs0_dq2_rx_de-skew = <0x08>; - cs0_dq2_tx_de-skew = <0x08>; - cs0_dq3_rx_de-skew = <0x08>; - cs0_dq3_tx_de-skew = <0x08>; - cs0_dq4_rx_de-skew = <0x09>; - cs0_dq4_tx_de-skew = <0x08>; - cs0_dq5_rx_de-skew = <0x09>; - cs0_dq5_tx_de-skew = <0x08>; - cs0_dq6_rx_de-skew = <0x09>; - cs0_dq6_tx_de-skew = <0x08>; - cs0_dq7_rx_de-skew = <0x08>; - cs0_dq7_tx_de-skew = <0x08>; - cs0_dqs0_rx_de-skew = <0x06>; - cs0_dqs0p_tx_de-skew = <0x09>; - cs0_dqs0n_tx_de-skew = <0x09>; - cs0_dm1_rx_de-skew = <0x07>; - cs0_dm1_tx_de-skew = <0x06>; - cs0_dq8_rx_de-skew = <0x08>; - cs0_dq8_tx_de-skew = <0x07>; - cs0_dq9_rx_de-skew = <0x09>; - cs0_dq9_tx_de-skew = <0x07>; - cs0_dq10_rx_de-skew = <0x08>; - cs0_dq10_tx_de-skew = <0x08>; - cs0_dq11_rx_de-skew = <0x08>; - cs0_dq11_tx_de-skew = <0x07>; - cs0_dq12_rx_de-skew = <0x08>; - cs0_dq12_tx_de-skew = <0x08>; - cs0_dq13_rx_de-skew = <0x09>; - cs0_dq13_tx_de-skew = <0x07>; - cs0_dq14_rx_de-skew = <0x09>; - cs0_dq14_tx_de-skew = <0x08>; - cs0_dq15_rx_de-skew = <0x09>; - cs0_dq15_tx_de-skew = <0x07>; - cs0_dqs1_rx_de-skew = <0x07>; - cs0_dqs1p_tx_de-skew = <0x09>; - cs0_dqs1n_tx_de-skew = <0x09>; - cs0_dm2_rx_de-skew = <0x07>; - cs0_dm2_tx_de-skew = <0x07>; - cs0_dq16_rx_de-skew = <0x09>; - cs0_dq16_tx_de-skew = <0x09>; - cs0_dq17_rx_de-skew = <0x07>; - cs0_dq17_tx_de-skew = <0x09>; - cs0_dq18_rx_de-skew = <0x07>; - cs0_dq18_tx_de-skew = <0x08>; - cs0_dq19_rx_de-skew = <0x07>; - cs0_dq19_tx_de-skew = <0x09>; - cs0_dq20_rx_de-skew = <0x09>; - cs0_dq20_tx_de-skew = <0x09>; - cs0_dq21_rx_de-skew = <0x09>; - cs0_dq21_tx_de-skew = <0x09>; - cs0_dq22_rx_de-skew = <0x08>; - cs0_dq22_tx_de-skew = <0x09>; - cs0_dq23_rx_de-skew = <0x08>; - cs0_dq23_tx_de-skew = <0x09>; - cs0_dqs2_rx_de-skew = <0x06>; - cs0_dqs2p_tx_de-skew = <0x09>; - cs0_dqs2n_tx_de-skew = <0x09>; - cs0_dm3_rx_de-skew = <0x07>; - cs0_dm3_tx_de-skew = <0x07>; - cs0_dq24_rx_de-skew = <0x08>; - cs0_dq24_tx_de-skew = <0x08>; - cs0_dq25_rx_de-skew = <0x09>; - cs0_dq25_tx_de-skew = <0x09>; - cs0_dq26_rx_de-skew = <0x09>; - cs0_dq26_tx_de-skew = <0x08>; - cs0_dq27_rx_de-skew = <0x09>; - cs0_dq27_tx_de-skew = <0x08>; - cs0_dq28_rx_de-skew = <0x09>; - cs0_dq28_tx_de-skew = <0x09>; - cs0_dq29_rx_de-skew = <0x09>; - cs0_dq29_tx_de-skew = <0x09>; - cs0_dq30_rx_de-skew = <0x08>; - cs0_dq30_tx_de-skew = <0x08>; - cs0_dq31_rx_de-skew = <0x08>; - cs0_dq31_tx_de-skew = <0x08>; - cs0_dqs3_rx_de-skew = <0x07>; - cs0_dqs3p_tx_de-skew = <0x09>; - cs0_dqs3n_tx_de-skew = <0x09>; - cs1_dm0_rx_de-skew = <0x07>; - cs1_dm0_tx_de-skew = <0x07>; - cs1_dq0_rx_de-skew = <0x08>; - cs1_dq0_tx_de-skew = <0x08>; - cs1_dq1_rx_de-skew = <0x09>; - cs1_dq1_tx_de-skew = <0x08>; - cs1_dq2_rx_de-skew = <0x08>; - cs1_dq2_tx_de-skew = <0x08>; - cs1_dq3_rx_de-skew = <0x08>; - cs1_dq3_tx_de-skew = <0x08>; - cs1_dq4_rx_de-skew = <0x08>; - cs1_dq4_tx_de-skew = <0x08>; - cs1_dq5_rx_de-skew = <0x09>; - cs1_dq5_tx_de-skew = <0x08>; - cs1_dq6_rx_de-skew = <0x09>; - cs1_dq6_tx_de-skew = <0x08>; - cs1_dq7_rx_de-skew = <0x08>; - cs1_dq7_tx_de-skew = <0x08>; - cs1_dqs0_rx_de-skew = <0x06>; - cs1_dqs0p_tx_de-skew = <0x09>; - cs1_dqs0n_tx_de-skew = <0x09>; - cs1_dm1_rx_de-skew = <0x07>; - cs1_dm1_tx_de-skew = <0x07>; - cs1_dq8_rx_de-skew = <0x08>; - cs1_dq8_tx_de-skew = <0x08>; - cs1_dq9_rx_de-skew = <0x08>; - cs1_dq9_tx_de-skew = <0x07>; - cs1_dq10_rx_de-skew = <0x07>; - cs1_dq10_tx_de-skew = <0x08>; - cs1_dq11_rx_de-skew = <0x08>; - cs1_dq11_tx_de-skew = <0x08>; - cs1_dq12_rx_de-skew = <0x08>; - cs1_dq12_tx_de-skew = <0x07>; - cs1_dq13_rx_de-skew = <0x08>; - cs1_dq13_tx_de-skew = <0x08>; - cs1_dq14_rx_de-skew = <0x08>; - cs1_dq14_tx_de-skew = <0x08>; - cs1_dq15_rx_de-skew = <0x08>; - cs1_dq15_tx_de-skew = <0x07>; - cs1_dqs1_rx_de-skew = <0x07>; - cs1_dqs1p_tx_de-skew = <0x09>; - cs1_dqs1n_tx_de-skew = <0x09>; - cs1_dm2_rx_de-skew = <0x07>; - cs1_dm2_tx_de-skew = <0x08>; - cs1_dq16_rx_de-skew = <0x08>; - cs1_dq16_tx_de-skew = <0x09>; - cs1_dq17_rx_de-skew = <0x08>; - cs1_dq17_tx_de-skew = <0x09>; - cs1_dq18_rx_de-skew = <0x07>; - cs1_dq18_tx_de-skew = <0x08>; - cs1_dq19_rx_de-skew = <0x08>; - cs1_dq19_tx_de-skew = <0x09>; - cs1_dq20_rx_de-skew = <0x09>; - cs1_dq20_tx_de-skew = <0x09>; - cs1_dq21_rx_de-skew = <0x09>; - cs1_dq21_tx_de-skew = <0x09>; - cs1_dq22_rx_de-skew = <0x08>; - cs1_dq22_tx_de-skew = <0x09>; - cs1_dq23_rx_de-skew = <0x08>; - cs1_dq23_tx_de-skew = <0x09>; - cs1_dqs2_rx_de-skew = <0x06>; - cs1_dqs2p_tx_de-skew = <0x09>; - cs1_dqs2n_tx_de-skew = <0x09>; - cs1_dm3_rx_de-skew = <0x07>; - cs1_dm3_tx_de-skew = <0x07>; - cs1_dq24_rx_de-skew = <0x08>; - cs1_dq24_tx_de-skew = <0x09>; - cs1_dq25_rx_de-skew = <0x09>; - cs1_dq25_tx_de-skew = <0x09>; - cs1_dq26_rx_de-skew = <0x09>; - cs1_dq26_tx_de-skew = <0x08>; - cs1_dq27_rx_de-skew = <0x08>; - cs1_dq27_tx_de-skew = <0x08>; - cs1_dq28_rx_de-skew = <0x09>; - cs1_dq28_tx_de-skew = <0x09>; - cs1_dq29_rx_de-skew = <0x09>; - cs1_dq29_tx_de-skew = <0x09>; - cs1_dq30_rx_de-skew = <0x09>; - cs1_dq30_tx_de-skew = <0x08>; - cs1_dq31_rx_de-skew = <0x08>; - cs1_dq31_tx_de-skew = <0x08>; - cs1_dqs3_rx_de-skew = <0x07>; - cs1_dqs3p_tx_de-skew = <0x09>; - cs1_dqs3n_tx_de-skew = <0x09>; - phandle = <0xaf>; - }; - - aliases { - ethernet0 = "/ethernet@ff360000"; - i2c0 = "/i2c@ff180000"; - i2c1 = "/i2c@ff190000"; - i2c2 = "/i2c@ff1a0000"; - i2c3 = "/i2c@ff1b0000"; - serial0 = "/serial@ff030000"; - serial1 = "/serial@ff158000"; - serial2 = "/serial@ff160000"; - serial3 = "/serial@ff168000"; - serial4 = "/serial@ff170000"; - serial5 = "/serial@ff178000"; - spi0 = "/spi@ff1d0000"; - spi1 = "/spi@ff1d8000"; - }; - - cpus { - #address-cells = <0x02>; - #size-cells = <0x00>; - - cpu@0 { - device_type = "cpu"; - compatible = "arm,cortex-a35\0arm,armv8"; - reg = <0x00 0x00>; - enable-method = "psci"; - clocks = <0x02 0x07>; - #cooling-cells = <0x02>; - dynamic-power-coefficient = <0x5a>; - operating-points-v2 = <0x03>; - cpu-idle-states = <0x04 0x05>; - cpu-supply = <0x06>; - phandle = <0x09>; - }; - - cpu@1 { - device_type = "cpu"; - compatible = "arm,cortex-a35\0arm,armv8"; - reg = <0x00 0x01>; - enable-method = "psci"; - operating-points-v2 = <0x03>; - cpu-idle-states = <0x04 0x05>; - phandle = <0x0a>; - }; - - cpu@2 { - device_type = "cpu"; - compatible = "arm,cortex-a35\0arm,armv8"; - reg = <0x00 0x02>; - enable-method = "psci"; - operating-points-v2 = <0x03>; - cpu-idle-states = <0x04 0x05>; - phandle = <0x0b>; - }; - - cpu@3 { - device_type = "cpu"; - compatible = "arm,cortex-a35\0arm,armv8"; - reg = <0x00 0x03>; - enable-method = "psci"; - operating-points-v2 = <0x03>; - cpu-idle-states = <0x04 0x05>; - phandle = <0x0c>; - }; - - idle-states { - entry-method = "psci"; - - cpu-sleep { - compatible = "arm,idle-state"; - local-timer-stop; - arm,psci-suspend-param = <0x10000>; - entry-latency-us = <0x78>; - exit-latency-us = <0xfa>; - min-residency-us = <0x384>; - phandle = <0x04>; - }; - - cluster-sleep { - compatible = "arm,idle-state"; - local-timer-stop; - arm,psci-suspend-param = <0x1010000>; - entry-latency-us = <0x190>; - exit-latency-us = <0x1f4>; - min-residency-us = <0x7d0>; - phandle = <0x05>; - }; - }; - }; - - cpu0-opp-table { - compatible = "operating-points-v2"; - opp-shared; - rockchip,temp-hysteresis = <0x1388>; - rockchip,low-temp = <0x00>; - rockchip,low-temp-min-volt = <0xf4240>; - rockchip,low-temp-adjust-volt = <0x00 0x5e8 0xc350>; - clocks = <0x02 0x01>; - rockchip,avs-scale = <0x04>; - rockchip,max-volt = <0x149970>; - rockchip,evb-irdrop = <0x61a8>; - nvmem-cells = <0x07 0x08>; - nvmem-cell-names = "cpu_leakage\0performance"; - rockchip,bin-scaling-sel = <0x00 0x0d 0x01 0x0d>; - rockchip,pvtm-voltage-sel = <0x00 0xc350 0x00 0xc351 0xd2f0 0x01 0xd2f1 0xea60 0x02 0xea61 0x1869f 0x03>; - rockchip,pvtm-freq = <0x639c0>; - rockchip,pvtm-volt = <0xf4240>; - rockchip,pvtm-ch = <0x00 0x00>; - rockchip,pvtm-sample-time = <0x3e8>; - rockchip,pvtm-number = <0x0a>; - rockchip,pvtm-error = <0x3e8>; - rockchip,pvtm-ref-temp = <0x28>; - rockchip,pvtm-temp-prop = <0xffffffc8 0xffffffc8>; - rockchip,thermal-zone = "soc-thermal"; - rockchip,avs = <0x01>; - phandle = <0x03>; - - opp-1008000000 { - opp-hz = <0x00 0x3c14dc00>; - opp-microvolt = <0x11edd8 0x11edd8 0x149970>; - opp-microvolt-L0 = <0x11edd8 0x11edd8 0x149970>; - opp-microvolt-L1 = <0x112a88 0x112a88 0x149970>; - opp-microvolt-L2 = <0x112a88 0x112a88 0x149970>; - opp-microvolt-L3 = <0x100590 0x100590 0x149970>; - clock-latency-ns = <0x9c40>; - }; - - opp-1200000000 { - opp-hz = <0x00 0x47868c00>; - opp-microvolt = <0x13d620 0x13d620 0x149970>; - opp-microvolt-L0 = <0x13d620 0x13d620 0x149970>; - opp-microvolt-L1 = <0x137478 0x137478 0x149970>; - opp-microvolt-L2 = <0x1312d0 0x1312d0 0x149970>; - opp-microvolt-L3 = <0x124f80 0x124f80 0x149970>; - clock-latency-ns = <0x9c40>; - }; - - opp-1248000000 { - opp-hz = <0x00 0x4a62f800>; - opp-microvolt = <0x149970 0x149970 0x149970>; - opp-microvolt-L0 = <0x149970 0x149970 0x149970>; - opp-microvolt-L1 = <0x13d620 0x13d620 0x149970>; - opp-microvolt-L2 = <0x137478 0x137478 0x149970>; - opp-microvolt-L3 = <0x12b128 0x12b128 0x149970>; - clock-latency-ns = <0x9c40>; - }; - - opp-1296000000 { - opp-hz = <0x00 0x4d3f6400>; - opp-microvolt = <0x149970 0x149970 0x149970>; - opp-microvolt-L0 = <0x149970 0x149970 0x149970>; - opp-microvolt-L1 = <0x149970 0x149970 0x149970>; - opp-microvolt-L2 = <0x13d620 0x13d620 0x149970>; - opp-microvolt-L3 = <0x1312d0 0x1312d0 0x149970>; - clock-latency-ns = <0x9c40>; - }; - - opp-1512000000 { - opp-hz = <0x00 0x5a1f4a00>; - opp-microvolt = <0x149970 0x149970 0x149970>; - opp-microvolt-L0 = <0x149970 0x149970 0x149970>; - opp-microvolt-L1 = <0x149970 0x149970 0x149970>; - opp-microvolt-L2 = <0x13d620 0x13d620 0x149970>; - opp-microvolt-L3 = <0x1312d0 0x1312d0 0x149970>; - clock-latency-ns = <0x9c40>; - }; - }; - - arm-pmu { - compatible = "arm,cortex-a53-pmu"; - interrupts = <0x00 0x64 0x04 0x00 0x65 0x04 0x00 0x66 0x04 0x00 0x67 0x04>; - interrupt-affinity = <0x09 0x0a 0x0b 0x0c>; - }; - - bus-soc { - compatible = "rockchip,px30-bus"; - rockchip,busfreq-policy = "autocs"; - phandle = <0xc4>; - - soc-bus0 { - bus-id = <0x00>; - timer-us = <0x14>; - enable-msk = <0x40f7>; - status = "disabled"; - }; - - soc-bus1 { - bus-id = <0x01>; - timer-us = <0xc8>; - enable-msk = <0x40bf>; - status = "disabled"; - }; - - soc-bus2 { - bus-id = <0x02>; - timer-us = <0xc8>; - enable-msk = <0x4007>; - status = "disabled"; - }; - }; - - bus-apll { - compatible = "rockchip,px30-bus"; - rockchip,busfreq-policy = "clkfreq"; - clocks = <0x02 0x01>; - clock-names = "bus"; - operating-points-v2 = <0x0d>; - status = "okay"; - bus-supply = <0x0e>; - phandle = <0xc5>; - }; - - bus-apll-opp-table { - compatible = "operating-points-v2"; - opp-shared; - phandle = <0x0d>; - - opp-1512000000 { - opp-hz = <0x00 0x5a1f4a00>; - opp-microvolt = <0xf4240>; - }; - - opp-1008000000 { - opp-hz = <0x00 0x3c14dc00>; - opp-microvolt = <0xe7ef0>; - }; - }; - - cpuinfo { - compatible = "rockchip,cpuinfo"; - nvmem-cells = <0x0f>; - nvmem-cell-names = "id"; - }; - - display-subsystem { - compatible = "rockchip,display-subsystem"; - ports = <0x10>; - status = "okay"; - logo-memory-region = <0x11>; - phandle = <0xc6>; - - route { - - route-lvds { - status = "disabled"; - logo,uboot = "logo.gif"; - logo,kernel = "logo_kernel.gif"; - logo,mode = "center"; - charge_logo,mode = "center"; - connect = <0x12>; - phandle = <0xc7>; - }; - - route-dsi { - status = "okay"; - logo,uboot = "logo.gif"; - logo,kernel = "logo_kernel.gif"; - logo,mode = "center"; - charge_logo,mode = "center"; - connect = <0x13>; - phandle = <0xc8>; - }; - - route-rgb { - status = "disabled"; - logo,uboot = "logo.gif"; - logo,kernel = "logo_kernel.gif"; - logo,mode = "center"; - charge_logo,mode = "center"; - connect = <0x14>; - phandle = <0xc9>; - }; - }; - }; - - firmware { - - optee { - compatible = "linaro,optee-tz"; - method = "smc"; - }; - }; - - external-gmac-clock { - compatible = "fixed-clock"; - clock-frequency = <0x2faf080>; - clock-output-names = "gmac_clkin"; - #clock-cells = <0x00>; - phandle = <0xca>; - }; - - psci { - compatible = "arm,psci-1.0"; - method = "smc"; - }; - - rockchip-suspend { - compatible = "rockchip,pm-px30"; - status = "okay"; - rockchip,sleep-debug-en = <0x01>; - rockchip,sleep-mode-config = <0x20702>; - rockchip,wakeup-config = <0x85>; - phandle = <0xcb>; - }; - - timer { - compatible = "arm,armv8-timer"; - interrupts = <0x01 0x0d 0xf04 0x01 0x0e 0xf04 0x01 0x0b 0xf04 0x01 0x0a 0xf04>; - }; - - xin24m { - compatible = "fixed-clock"; - #clock-cells = <0x00>; - clock-frequency = <0x16e3600>; - clock-output-names = "xin24m"; - phandle = <0xcc>; - }; - - xin32k { - compatible = "fixed-clock"; - #clock-cells = <0x00>; - clock-frequency = <0x8000>; - clock-output-names = "xin32k"; - phandle = <0xcd>; - }; - - power-management@ff000000 { - compatible = "rockchip,px30-pmu\0syscon\0simple-mfd"; - reg = <0x00 0xff000000 0x00 0x1000>; - phandle = <0xce>; - - power-controller { - compatible = "rockchip,px30-power-controller"; - #power-domain-cells = <0x01>; - #address-cells = <0x01>; - #size-cells = <0x00>; - phandle = <0x8a>; - - pd_usb@5 { - reg = <0x05>; - clocks = <0x02 0x103 0x02 0x102 0x02 0x3c>; - pm_qos = <0x15 0x16>; - }; - - pd_sdcard@7 { - reg = <0x07>; - clocks = <0x02 0xf7 0x02 0x3b>; - pm_qos = <0x17>; - }; - - pd_gmac@9 { - reg = <0x09>; - clocks = <0x02 0xb2 0x02 0x143 0x02 0x40 0x02 0x3f>; - pm_qos = <0x18>; - }; - - pd_mmc_nand@10 { - reg = <0x0a>; - clocks = <0x02 0xfe 0x02 0x100 0x02 0xff 0x02 0x101 0x02 0x39 0x02 0x37 0x02 0x38 0x02 0x3a>; - pm_qos = <0x19 0x1a 0x1b 0x1c>; - }; - - pd_vpu@11 { - reg = <0x0b>; - clocks = <0x02 0xaf 0x02 0xf4 0x02 0x4b>; - pm_qos = <0x1d 0x1e>; - }; - - pd_vo@12 { - reg = <0x0c>; - clocks = <0x02 0xb7 0x02 0xb5 0x02 0xb6 0x02 0x96 0x02 0x97 0x02 0xfd 0x02 0xfb 0x02 0xfc 0x02 0x144 0x02 0x35 0x02 0x36>; - pm_qos = <0x1f 0x20 0x21 0x22>; - }; - - pd_vi@13 { - reg = <0x0d>; - clocks = <0x02 0xb3 0x02 0xb4 0x02 0xf9 0x02 0xfa 0x02 0x33>; - pm_qos = <0x23 0x24 0x25 0x26 0x27>; - }; - - pd_gpu@14 { - reg = <0x0e>; - clocks = <0x02 0x49>; - pm_qos = <0x28>; - }; - }; - }; - - syscon@ff010000 { - compatible = "rockchip,px30-pmugrf\0syscon\0simple-mfd"; - reg = <0x00 0xff010000 0x00 0x1000>; - #address-cells = <0x01>; - #size-cells = <0x01>; - phandle = <0xac>; - - io-domains { - compatible = "rockchip,px30-pmu-io-voltage-domain"; - status = "okay"; - pmuio1-supply = <0x29>; - pmuio2-supply = <0x29>; - phandle = <0xcf>; - }; - - reboot-mode { - compatible = "syscon-reboot-mode"; - offset = <0x200>; - mode-bootloader = <0x5242c301>; - mode-charge = <0x5242c30b>; - mode-fastboot = <0x5242c309>; - mode-loader = <0x5242c301>; - mode-normal = <0x5242c300>; - mode-recovery = <0x5242c303>; - mode-ums = <0x5242c30c>; - }; - - pmu-pvtm { - compatible = "rockchip,px30-pmu-pvtm"; - clocks = <0x2a 0x07>; - clock-names = "pmu"; - status = "okay"; - phandle = <0xd0>; - }; - }; - - serial@ff030000 { - compatible = "rockchip,px30-uart\0snps,dw-apb-uart"; - reg = <0x00 0xff030000 0x00 0x100>; - interrupts = <0x00 0x0f 0x04>; - clocks = <0x2a 0x06 0x2a 0x15>; - clock-names = "baudclk\0apb_pclk"; - reg-shift = <0x02>; - reg-io-width = <0x04>; - dmas = <0x2b 0x00 0x2b 0x01>; - pinctrl-names = "default"; - pinctrl-0 = <0x2c 0x2d 0x2e>; - status = "disabled"; - phandle = <0xd1>; - }; - - i2s@ff060000 { - compatible = "rockchip,px30-i2s-tdm"; - reg = <0x00 0xff060000 0x00 0x1000>; - interrupts = <0x00 0x0c 0x04>; - clocks = <0x02 0x10 0x02 0x12 0x02 0x106>; - clock-names = "mclk_tx\0mclk_rx\0hclk"; - dmas = <0x2b 0x10 0x2b 0x11>; - dma-names = "tx\0rx"; - resets = <0x02 0x84 0x02 0xbf>; - reset-names = "tx-m\0rx-m"; - rockchip,cru = <0x02>; - rockchip,grf = <0x2f>; - pinctrl-names = "default"; - pinctrl-0 = <0x30 0x31 0x32 0x33 0x34 0x35 0x36 0x37 0x38 0x39 0x3a 0x3b>; - status = "disabled"; - phandle = <0xd2>; - }; - - i2s@ff070000 { - compatible = "rockchip,px30-i2s\0rockchip,rk3066-i2s"; - reg = <0x00 0xff070000 0x00 0x1000>; - interrupts = <0x00 0x0d 0x04>; - clocks = <0x02 0x14 0x02 0x107>; - clock-names = "i2s_clk\0i2s_hclk"; - dmas = <0x2b 0x12 0x2b 0x13>; - dma-names = "tx\0rx"; - resets = <0x02 0x86 0x02 0x85>; - reset-names = "reset-m\0reset-h"; - pinctrl-names = "default"; - pinctrl-0 = <0x3c 0x3d 0x3e 0x3f>; - status = "okay"; - #sound-dai-cells = <0x00>; - phandle = <0xc2>; - }; - - i2s@ff080000 { - compatible = "rockchip,px30-i2s\0rockchip,rk3066-i2s"; - reg = <0x00 0xff080000 0x00 0x1000>; - interrupts = <0x00 0x0e 0x04>; - clocks = <0x02 0x16 0x02 0x108>; - clock-names = "i2s_clk\0i2s_hclk"; - dmas = <0x2b 0x14 0x2b 0x15>; - dma-names = "tx\0rx"; - resets = <0x02 0x88 0x02 0x87>; - reset-names = "reset-m\0reset-h"; - pinctrl-names = "default"; - pinctrl-0 = <0x40 0x41 0x42 0x43>; - status = "disabled"; - phandle = <0xd3>; - }; - - pdm@ff0a0000 { - compatible = "rockchip,px30-pdm\0rockchip,pdm"; - reg = <0x00 0xff0a0000 0x00 0x1000>; - clocks = <0x02 0x0f 0x02 0x105>; - clock-names = "pdm_clk\0pdm_hclk"; - dmas = <0x2b 0x18>; - dma-names = "rx"; - resets = <0x02 0x82>; - reset-names = "pdm-m"; - pinctrl-names = "default"; - pinctrl-0 = <0x44 0x45 0x46 0x47 0x48 0x49>; - status = "disabled"; - phandle = <0xd4>; - }; - - crypto@ff0b0000 { - compatible = "rockchip,px30-crypto"; - reg = <0x00 0xff0b0000 0x00 0x4000>; - interrupts = <0x00 0x52 0x04>; - clocks = <0x02 0xac 0x02 0xf1 0x02 0x30 0x02 0x31>; - clock-names = "aclk\0hclk\0sclk\0apb_pclk"; - resets = <0x02 0x74>; - reset-names = "crypto-rst"; - status = "disabled"; - phandle = <0xd5>; - }; - - rng@ff0b0000 { - compatible = "rockchip,cryptov2-rng"; - reg = <0x00 0xff0b0000 0x00 0x4000>; - clocks = <0x02 0x30 0x02 0x31 0x02 0xac 0x02 0xf1>; - clock-names = "clk_crypto\0clk_crypto_apk\0aclk_crypto\0hclk_crypto"; - assigned-clocks = <0x02 0x30 0x02 0x31 0x02 0xac 0x02 0xf1>; - assigned-clock-rates = <0x8f0d180 0x8f0d180 0xbebc200 0x5f5e100>; - resets = <0x02 0x74>; - reset-names = "reset"; - status = "okay"; - phandle = <0xd6>; - }; - - interrupt-controller@ff131000 { - compatible = "arm,gic-400"; - #interrupt-cells = <0x03>; - #address-cells = <0x00>; - interrupt-controller; - reg = <0x00 0xff131000 0x00 0x1000 0x00 0xff132000 0x00 0x2000 0x00 0xff134000 0x00 0x2000 0x00 0xff136000 0x00 0x2000>; - interrupts = <0x01 0x09 0xf04>; - phandle = <0x01>; - }; - - syscon@ff140000 { - compatible = "rockchip,px30-grf\0syscon\0simple-mfd"; - reg = <0x00 0xff140000 0x00 0x1000>; - #address-cells = <0x01>; - #size-cells = <0x01>; - phandle = <0x2f>; - - io-domains { - compatible = "rockchip,px30-io-voltage-domain"; - status = "okay"; - vccio1-supply = <0x4a>; - vccio2-supply = <0x4a>; - vccio3-supply = <0x4b>; - vccio4-supply = <0x4b>; - vccio5-supply = <0x4b>; - vccio6-supply = <0x4b>; - phandle = <0xd7>; - }; - - lvds { - compatible = "rockchip,px30-lvds"; - phys = <0x4c>; - phy-names = "phy"; - status = "disabled"; - phandle = <0xd8>; - - ports { - #address-cells = <0x01>; - #size-cells = <0x00>; - - port@0 { - reg = <0x00>; - #address-cells = <0x01>; - #size-cells = <0x00>; - - endpoint@0 { - reg = <0x00>; - remote-endpoint = <0x12>; - phandle = <0xa2>; - }; - }; - }; - }; - - rgb { - compatible = "rockchip,px30-rgb"; - pinctrl-names = "default\0sleep"; - pinctrl-0 = <0x4d>; - pinctrl-1 = <0x4e>; - status = "disabled"; - phys = <0x4c>; - phy-names = "phy"; - phandle = <0xd9>; - - ports { - #address-cells = <0x01>; - #size-cells = <0x00>; - - port@0 { - reg = <0x00>; - #address-cells = <0x01>; - #size-cells = <0x00>; - - endpoint@0 { - reg = <0x00>; - remote-endpoint = <0x14>; - phandle = <0xa4>; - }; - }; - }; - }; - }; - - syscon@ff148000 { - compatible = "syscon\0simple-mfd"; - reg = <0x00 0xff148000 0x00 0x1000>; - #address-cells = <0x01>; - #size-cells = <0x01>; - phandle = <0xda>; - - pvtm { - compatible = "rockchip,px30-pvtm"; - clocks = <0x02 0x4a>; - clock-names = "core"; - status = "okay"; - phandle = <0xdb>; - }; - }; - - serial@ff158000 { - compatible = "rockchip,px30-uart\0snps,dw-apb-uart"; - reg = <0x00 0xff158000 0x00 0x100>; - interrupts = <0x00 0x10 0x04>; - clocks = <0x02 0x18 0x02 0x149>; - clock-names = "baudclk\0apb_pclk"; - reg-shift = <0x02>; - reg-io-width = <0x04>; - dmas = <0x2b 0x02 0x2b 0x03>; - pinctrl-names = "default"; - pinctrl-0 = <0x4f 0x50>; - status = "okay"; - phandle = <0xdc>; - }; - - serial@ff160000 { - compatible = "rockchip,px30-uart\0snps,dw-apb-uart"; - reg = <0x00 0xff160000 0x00 0x100>; - interrupts = <0x00 0x11 0x04>; - clocks = <0x02 0x19 0x02 0x14a>; - clock-names = "baudclk\0apb_pclk"; - reg-shift = <0x02>; - reg-io-width = <0x04>; - dmas = <0x2b 0x04 0x2b 0x05>; - pinctrl-names = "default"; - pinctrl-0 = <0x51>; - status = "disabled"; - phandle = <0xdd>; - }; - - serial@ff168000 { - compatible = "rockchip,px30-uart\0snps,dw-apb-uart"; - reg = <0x00 0xff168000 0x00 0x100>; - interrupts = <0x00 0x12 0x04>; - clocks = <0x02 0x1a 0x02 0x14b>; - clock-names = "baudclk\0apb_pclk"; - reg-shift = <0x02>; - reg-io-width = <0x04>; - dmas = <0x2b 0x06 0x2b 0x07>; - pinctrl-names = "default"; - pinctrl-0 = <0x52 0x53 0x54>; - status = "disabled"; - phandle = <0xde>; - }; - - serial@ff170000 { - compatible = "rockchip,px30-uart\0snps,dw-apb-uart"; - reg = <0x00 0xff170000 0x00 0x100>; - interrupts = <0x00 0x13 0x04>; - clocks = <0x02 0x1b 0x02 0x14c>; - clock-names = "baudclk\0apb_pclk"; - reg-shift = <0x02>; - reg-io-width = <0x04>; - dmas = <0x2b 0x08 0x2b 0x09>; - pinctrl-names = "default"; - pinctrl-0 = <0x55 0x56 0x57>; - status = "disabled"; - phandle = <0xdf>; - }; - - serial@ff178000 { - compatible = "rockchip,px30-uart\0snps,dw-apb-uart"; - reg = <0x00 0xff178000 0x00 0x100>; - interrupts = <0x00 0x14 0x04>; - clocks = <0x02 0x1c 0x02 0x14d>; - clock-names = "baudclk\0apb_pclk"; - reg-shift = <0x02>; - reg-io-width = <0x04>; - dmas = <0x2b 0x0a 0x2b 0x0b>; - pinctrl-names = "default"; - pinctrl-0 = <0x58 0x59 0x5a>; - status = "disabled"; - phandle = <0xe0>; - }; - - i2c@ff180000 { - compatible = "rockchip,rk3399-i2c"; - reg = <0x00 0xff180000 0x00 0x1000>; - clocks = <0x02 0x1d 0x02 0x14e>; - clock-names = "i2c\0pclk"; - interrupts = <0x00 0x07 0x04>; - pinctrl-names = "default"; - pinctrl-0 = <0x5b>; - #address-cells = <0x01>; - #size-cells = <0x00>; - status = "okay"; - clock-frequency = <0x61a80>; - i2c-scl-rising-time-ns = <0x118>; - i2c-scl-falling-time-ns = <0x10>; - phandle = <0xe1>; - - pmic@20 { - compatible = "rockchip,rk817"; - reg = <0x20>; - interrupt-parent = <0x5c>; - interrupts = <0x0a 0x08>; - pinctrl-names = "default\0pmic-sleep\0pmic-power-off\0pmic-reset"; - pinctrl-0 = <0x5d>; - pinctrl-1 = <0x5e 0x5f>; - pinctrl-2 = <0x60 0x61>; - pinctrl-3 = <0x62 0x63>; - rockchip,system-power-controller; - wakeup-source; - #clock-cells = <0x01>; - clock-output-names = "rk808-clkout1\0rk808-clkout2"; - pmic-reset-func = <0x01>; - vcc1-supply = <0x64>; - vcc2-supply = <0x64>; - vcc3-supply = <0x64>; - vcc4-supply = <0x64>; - vcc5-supply = <0x64>; - vcc6-supply = <0x64>; - vcc7-supply = <0x64>; - vcc8-supply = <0x64>; - vcc9-supply = <0x65>; - phandle = <0xe2>; - - pwrkey { - status = "okay"; - }; - - pinctrl_rk8xx { - gpio-controller; - #gpio-cells = <0x02>; - phandle = <0xe3>; - - rk817_ts_gpio1 { - pins = "gpio_ts"; - function = "pin_fun1"; - phandle = <0xe4>; - }; - - rk817_gt_gpio2 { - pins = "gpio_gt"; - function = "pin_fun1"; - phandle = <0xe5>; - }; - - rk817_pin_ts { - pins = "gpio_ts"; - function = "pin_fun0"; - phandle = <0xe6>; - }; - - rk817_pin_gt { - pins = "gpio_gt"; - function = "pin_fun0"; - phandle = <0xe7>; - }; - - rk817_slppin_null { - pins = "gpio_slp"; - function = "pin_fun0"; - phandle = <0xe8>; - }; - - rk817_slppin_slp { - pins = "gpio_slp"; - function = "pin_fun1"; - phandle = <0x5f>; - }; - - rk817_slppin_pwrdn { - pins = "gpio_slp"; - function = "pin_fun2"; - phandle = <0x61>; - }; - - rk817_slppin_rst { - pins = "gpio_slp"; - function = "pin_fun3"; - phandle = <0x63>; - }; - }; - - regulators { - - DCDC_REG1 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0xe7ef0>; - regulator-max-microvolt = <0x118c30>; - regulator-ramp-delay = <0x1771>; - regulator-initial-mode = <0x02>; - regulator-name = "vdd_logic"; - phandle = <0x0e>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <0xe7ef0>; - }; - }; - - DCDC_REG2 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0xe7ef0>; - regulator-max-microvolt = <0x149970>; - regulator-ramp-delay = <0x1771>; - regulator-initial-mode = <0x02>; - regulator-name = "vdd_arm"; - phandle = <0x06>; - - regulator-state-mem { - regulator-off-in-suspend; - regulator-suspend-microvolt = <0xe7ef0>; - }; - }; - - DCDC_REG3 { - regulator-always-on; - regulator-boot-on; - regulator-initial-mode = <0x02>; - regulator-name = "vcc_ddr"; - phandle = <0xe9>; - - regulator-state-mem { - regulator-on-in-suspend; - }; - }; - - DCDC_REG4 { - regulator-always-on; - #regulator-boot-on; - regulator-init-microvolt = <0x1e8480>; - regulator-min-microvolt = <0x1e8480>; - regulator-max-microvolt = <0x231860>; - regulator-initial-mode = <0x02>; - regulator-name = "vcc_3v3"; - phandle = <0x4b>; - - regulator-state-mem { - regulator-off-in-suspend; - regulator-suspend-microvolt = <0x1e8480>; - }; - }; - - LDO_REG1 { - regulator-min-microvolt = <0xf4240>; - regulator-max-microvolt = <0xf4240>; - regulator-name = "vcc_1v0"; - phandle = <0xea>; - - regulator-state-mem { - regulator-off-in-suspend; - regulator-suspend-microvolt = <0xf4240>; - }; - }; - - LDO_REG2 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0x1b7740>; - regulator-max-microvolt = <0x1b7740>; - regulator-name = "vcc1v8_soc"; - phandle = <0x88>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <0x1b7740>; - }; - }; - - LDO_REG3 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0xf4240>; - regulator-max-microvolt = <0xf4240>; - regulator-name = "vcc1v0_soc"; - phandle = <0xeb>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <0xf4240>; - }; - }; - - LDO_REG4 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0x325aa0>; - regulator-max-microvolt = <0x325aa0>; - regulator-name = "vcc3v3_pmu"; - phandle = <0x29>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <0x325aa0>; - }; - }; - - LDO_REG5 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0x1b7740>; - regulator-max-microvolt = <0x1b7740>; - regulator-name = "vccio_sd"; - phandle = <0x4a>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <0x1b7740>; - }; - }; - - LDO_REG6 { - regulator-min-microvolt = <0x1b7740>; - regulator-max-microvolt = <0x2dc6c0>; - regulator-boot-on; - regulator-name = "vcc_sd"; - phandle = <0x93>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <0x2dc6c0>; - }; - }; - - LDO_REG7 { - regulator-min-microvolt = <0x325aa0>; - regulator-max-microvolt = <0x325aa0>; - regulator-name = "vcc_backlight"; - phandle = <0x9e>; - - regulator-state-mem { - regulator-off-in-suspend; - regulator-suspend-microvolt = <0x325aa0>; - }; - }; - - LDO_REG8 { - regulator-min-microvolt = <0x2ab980>; - regulator-max-microvolt = <0x2ab980>; - regulator-name = "vcc_lcd"; - phandle = <0x9f>; - - regulator-state-mem { - regulator-off-in-suspend; - regulator-suspend-microvolt = <0x2ab980>; - }; - }; - - BOOST { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0x4c4b40>; - regulator-max-microvolt = <0x5265c0>; - regulator-name = "boost"; - phandle = <0x65>; - }; - - OTG_SWITCH { - regulator-boot-on; - regulator-name = "otg_switch"; - phandle = <0xec>; - }; - }; - - battery { - compatible = "rk817,battery"; - ocv_table = <0xc5d 0xc94 0xcd0 0xd02 0xd34 0xd66 0xd98 0xdca 0xdfc 0xe2e 0xe56 0xe7e 0xea6 0xece 0xef6 0xf1e 0xf46 0xf6e 0xf96 0xf9b 0xfa0>; - design_capacity = <0xd34>; - design_qmax = <0xe86>; - bat_res = <0x64>; - sleep_enter_current = <0x12c>; - sleep_exit_current = <0x12c>; - sleep_filter_current = <0x64>; - power_off_thresd = <0xbb8>; - zero_algorithm_vol = <0xf0a>; - max_soc_offset = <0x3c>; - monitor_sec = <0x05>; - virtual_power = <0x00>; - sample_res = <0x0a>; - }; - - charger { - compatible = "rk817,charger"; - min_input_voltage = <0x1194>; - max_input_current = <0x5dc>; - max_chrg_current = <0x7d0>; - max_chrg_voltage = <0x1068>; - chrg_term_mode = <0x00>; - chrg_finish_cur = <0x34>; - virtual_power = <0x00>; - sample_res = <0x0a>; - dc_det_gpio = <0x5c 0x0b 0x00>; - bat_low_gpio = <0x66 0x0d 0x00>; - extcon = <0x67>; - }; - - codec { - #sound-dai-cells = <0x00>; - compatible = "rockchip,rk817-codec"; - clocks = <0x02 0x15>; - clock-names = "mclk"; - pinctrl-names = "default"; - pinctrl-0 = <0x68>; - hp-volume = <0x14>; - spk-volume = <0x03>; - status = "okay"; - phandle = <0xc3>; - }; - }; - }; - - i2c@ff190000 { - compatible = "rockchip,rk3399-i2c"; - reg = <0x00 0xff190000 0x00 0x1000>; - clocks = <0x02 0x1e 0x02 0x14f>; - clock-names = "i2c\0pclk"; - interrupts = <0x00 0x08 0x04>; - pinctrl-names = "default"; - pinctrl-0 = <0x69>; - #address-cells = <0x01>; - #size-cells = <0x00>; - status = "okay"; - clock-frequency = <0x61a80>; - phandle = <0xed>; - }; - - i2c@ff1a0000 { - compatible = "rockchip,rk3399-i2c"; - reg = <0x00 0xff1a0000 0x00 0x1000>; - clocks = <0x02 0x1f 0x02 0x150>; - clock-names = "i2c\0pclk"; - interrupts = <0x00 0x09 0x04>; - pinctrl-names = "default"; - pinctrl-0 = <0x6a>; - #address-cells = <0x01>; - #size-cells = <0x00>; - status = "disabled"; - phandle = <0xee>; - }; - - i2c@ff1b0000 { - compatible = "rockchip,rk3399-i2c"; - reg = <0x00 0xff1b0000 0x00 0x1000>; - clocks = <0x02 0x20 0x02 0x151>; - clock-names = "i2c\0pclk"; - interrupts = <0x00 0x0a 0x04>; - pinctrl-names = "default"; - pinctrl-0 = <0x6b>; - #address-cells = <0x01>; - #size-cells = <0x00>; - status = "disabled"; - phandle = <0xef>; - }; - - spi@ff1d0000 { - compatible = "rockchip,px30-spi\0rockchip,rk3066-spi"; - reg = <0x00 0xff1d0000 0x00 0x1000>; - interrupts = <0x00 0x1a 0x04>; - #address-cells = <0x01>; - #size-cells = <0x00>; - clocks = <0x02 0x24 0x02 0x155>; - clock-names = "spiclk\0apb_pclk"; - dmas = <0x2b 0x0c 0x2b 0x0d>; - dma-names = "tx\0rx"; - pinctrl-names = "default\0high_speed"; - pinctrl-0 = <0x6c 0x6d 0x6e 0x6f>; - pinctrl-1 = <0x70 0x6d 0x71 0x72>; - status = "disabled"; - phandle = <0xf0>; - }; - - spi@ff1d8000 { - compatible = "rockchip,px30-spi\0rockchip,rk3066-spi"; - reg = <0x00 0xff1d8000 0x00 0x1000>; - interrupts = <0x00 0x1b 0x04>; - #address-cells = <0x01>; - #size-cells = <0x00>; - clocks = <0x02 0x25 0x02 0x156>; - clock-names = "spiclk\0apb_pclk"; - dmas = <0x2b 0x0e 0x2b 0x0f>; - dma-names = "tx\0rx"; - pinctrl-names = "default\0high_speed"; - pinctrl-0 = <0x73 0x74 0x75 0x76 0x77>; - pinctrl-1 = <0x78 0x74 0x75 0x79 0x7a>; - status = "disabled"; - phandle = <0xf1>; - }; - - watchdog@ff1e0000 { - compatible = "snps,dw-wdt"; - reg = <0x00 0xff1e0000 0x00 0x100>; - clocks = <0x02 0x15b>; - interrupts = <0x00 0x25 0x04>; - resets = <0x02 0xb5>; - reset-names = "reset"; - status = "disabled"; - phandle = <0xf2>; - }; - - pwm@ff200000 { - compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm"; - reg = <0x00 0xff200000 0x00 0x10>; - #pwm-cells = <0x03>; - pinctrl-names = "active"; - pinctrl-0 = <0x7b>; - clocks = <0x02 0x22 0x02 0x153>; - clock-names = "pwm\0pclk"; - status = "okay"; - phandle = <0xbc>; - }; - - pwm@ff200010 { - compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm"; - reg = <0x00 0xff200010 0x00 0x10>; - #pwm-cells = <0x03>; - pinctrl-names = "active"; - pinctrl-0 = <0x7c>; - clocks = <0x02 0x22 0x02 0x153>; - clock-names = "pwm\0pclk"; - status = "okay"; - phandle = <0xc1>; - }; - - pwm@ff200020 { - compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm"; - reg = <0x00 0xff200020 0x00 0x10>; - #pwm-cells = <0x03>; - pinctrl-names = "active"; - pinctrl-0 = <0x7d>; - clocks = <0x02 0x22 0x02 0x153>; - clock-names = "pwm\0pclk"; - status = "disabled"; - phandle = <0xf3>; - }; - - pwm@ff200030 { - compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm"; - reg = <0x00 0xff200030 0x00 0x10>; - #pwm-cells = <0x03>; - pinctrl-names = "active"; - pinctrl-0 = <0x7e>; - clocks = <0x02 0x22 0x02 0x153>; - clock-names = "pwm\0pclk"; - status = "disabled"; - phandle = <0xf4>; - }; - - pwm@ff208000 { - compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm"; - reg = <0x00 0xff208000 0x00 0x10>; - #pwm-cells = <0x03>; - pinctrl-names = "active"; - pinctrl-0 = <0x7f>; - clocks = <0x02 0x23 0x02 0x154>; - clock-names = "pwm\0pclk"; - status = "disabled"; - phandle = <0xf5>; - }; - - pwm@ff208010 { - compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm"; - reg = <0x00 0xff208010 0x00 0x10>; - #pwm-cells = <0x03>; - pinctrl-names = "active"; - pinctrl-0 = <0x80>; - clocks = <0x02 0x23 0x02 0x154>; - clock-names = "pwm\0pclk"; - status = "disabled"; - phandle = <0xf6>; - }; - - pwm@ff208020 { - compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm"; - reg = <0x00 0xff208020 0x00 0x10>; - #pwm-cells = <0x03>; - pinctrl-names = "active"; - pinctrl-0 = <0x81>; - clocks = <0x02 0x23 0x02 0x154>; - clock-names = "pwm\0pclk"; - status = "disabled"; - phandle = <0xf7>; - }; - - pwm@ff208030 { - compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm"; - reg = <0x00 0xff208030 0x00 0x10>; - #pwm-cells = <0x03>; - pinctrl-names = "active"; - pinctrl-0 = <0x82>; - clocks = <0x02 0x23 0x02 0x154>; - clock-names = "pwm\0pclk"; - status = "disabled"; - phandle = <0xf8>; - }; - - rktimer@ff210000 { - compatible = "rockchip,rk3288-timer"; - reg = <0x00 0xff210000 0x00 0x1000>; - interrupts = <0x00 0x1e 0x04>; - clocks = <0x02 0x159 0x02 0x26>; - clock-names = "pclk\0timer"; - phandle = <0xf9>; - }; - - amba { - compatible = "simple-bus"; - #address-cells = <0x02>; - #size-cells = <0x02>; - ranges; - - dmac@ff240000 { - compatible = "arm,pl330\0arm,primecell"; - reg = <0x00 0xff240000 0x00 0x4000>; - interrupts = <0x00 0x01 0x04 0x00 0x02 0x04>; - clocks = <0x02 0xbb>; - clock-names = "apb_pclk"; - #dma-cells = <0x01>; - peripherals-req-type-burst; - phandle = <0x2b>; - }; - }; - - thermal-zones { - phandle = <0xfa>; - - soc-thermal { - polling-delay-passive = <0x14>; - polling-delay = <0x3e8>; - sustainable-power = <0x2ee>; - thermal-sensors = <0x83 0x00>; - phandle = <0xfb>; - - trips { - - trip-point-0 { - temperature = <0x11170>; - hysteresis = <0x7d0>; - type = "passive"; - phandle = <0xfc>; - }; - - trip-point-1 { - temperature = <0x14c08>; - hysteresis = <0x7d0>; - type = "passive"; - phandle = <0x84>; - }; - - soc-crit { - temperature = <0x1c138>; - hysteresis = <0x7d0>; - type = "critical"; - phandle = <0xfd>; - }; - }; - - cooling-maps { - - map0 { - trip = <0x84>; - cooling-device = <0x09 0xffffffff 0xffffffff>; - contribution = <0x1000>; - }; - - map1 { - trip = <0x84>; - cooling-device = <0x85 0xffffffff 0xffffffff>; - contribution = <0x1000>; - }; - }; - }; - - gpu-thermal { - polling-delay-passive = <0x64>; - polling-delay = <0x3e8>; - thermal-sensors = <0x83 0x01>; - phandle = <0xfe>; - }; - }; - - tsadc@ff280000 { - compatible = "rockchip,px30-tsadc"; - reg = <0x00 0xff280000 0x00 0x100>; - interrupts = <0x00 0x24 0x04>; - rockchip,grf = <0x2f>; - clocks = <0x02 0x2c 0x02 0x158>; - clock-names = "tsadc\0apb_pclk"; - assigned-clocks = <0x02 0x2c>; - assigned-clock-rates = <0xc350>; - resets = <0x02 0xa8>; - reset-names = "tsadc-apb"; - #thermal-sensor-cells = <0x01>; - rockchip,hw-tshut-temp = <0x1d4c0>; - status = "okay"; - pinctrl-names = "gpio\0otpout"; - pinctrl-0 = <0x86>; - pinctrl-1 = <0x87>; - phandle = <0x83>; - }; - - saradc@ff288000 { - compatible = "rockchip,px30-saradc\0rockchip,rk3399-saradc"; - reg = <0x00 0xff288000 0x00 0x100>; - interrupts = <0x00 0x54 0x04>; - #io-channel-cells = <0x01>; - clocks = <0x02 0x2d 0x02 0x157>; - clock-names = "saradc\0apb_pclk"; - resets = <0x02 0xa5>; - reset-names = "saradc-apb"; - status = "okay"; - vref-supply = <0x88>; - phandle = <0xbe>; - }; - - otp@ff290000 { - compatible = "rockchip,px30-otp"; - reg = <0x00 0xff290000 0x00 0x4000>; - #address-cells = <0x01>; - #size-cells = <0x01>; - clocks = <0x02 0x2f 0x02 0x15a 0x02 0x161>; - clock-names = "clk_otp\0pclk_otp\0pclk_otp_phy"; - resets = <0x02 0xb4>; - reset-names = "otp_phy"; - phandle = <0xff>; - - id@7 { - reg = <0x07 0x10>; - phandle = <0x0f>; - }; - - cpu-leakage@17 { - reg = <0x17 0x01>; - phandle = <0x07>; - }; - - performance@1e { - reg = <0x1e 0x01>; - bits = <0x04 0x03>; - phandle = <0x08>; - }; - }; - - clock-controller@ff2b0000 { - compatible = "rockchip,px30-cru"; - reg = <0x00 0xff2b0000 0x00 0x1000>; - rockchip,grf = <0x2f>; - rockchip,boost = <0x89>; - #clock-cells = <0x01>; - #reset-cells = <0x01>; - assigned-clocks = <0x02 0x04>; - assigned-clock-rates = <0x3dfd2400>; - phandle = <0x02>; - }; - - cpu-boost@ff2b8000 { - compatible = "syscon"; - reg = <0x00 0xff2b8000 0x00 0x1000>; - rockchip,boost-low-con0 = <0x1032>; - rockchip,boost-low-con1 = <0x1441>; - rockchip,boost-high-con0 = <0x1036>; - rockchip,boost-high-con1 = <0x1441>; - rockchip,boost-backup-pll = <0x01>; - rockchip,boost-backup-pll-usage = <0x00>; - rockchip,boost-switch-threshold = <0x249f00>; - rockchip,boost-statis-threshold = <0x100>; - rockchip,boost-statis-enable = <0x00>; - rockchip,boost-enable = <0x00>; - phandle = <0x89>; - }; - - pmu-clock-controller@ff2bc000 { - compatible = "rockchip,px30-pmucru"; - reg = <0x00 0xff2bc000 0x00 0x1000>; - rockchip,grf = <0x2f>; - #clock-cells = <0x01>; - #reset-cells = <0x01>; - assigned-clocks = <0x2a 0x01 0x2a 0x08 0x2a 0x05 0x02 0x07 0x02 0xab 0x02 0xb0 0x02 0xf0 0x02 0xf5 0x02 0x140 0x02 0x49>; - assigned-clock-rates = <0x47868c00 0x5f5e100 0x18cba80 0x23c34600 0xbebc200 0xbebc200 0x8f0d180 0x8f0d180 0x5f5e100 0xbebc200>; - phandle = <0x2a>; - }; - - syscon@ff2c0000 { - compatible = "rockchip,px30-usb2phy-grf\0syscon\0simple-mfd"; - reg = <0x00 0xff2c0000 0x00 0x10000>; - #address-cells = <0x01>; - #size-cells = <0x01>; - phandle = <0x100>; - - usb2-phy@100 { - compatible = "rockchip,px30-usb2phy\0rockchip,rk3328-usb2phy"; - reg = <0x100 0x10>; - clocks = <0x2a 0x0a>; - clock-names = "phyclk"; - #clock-cells = <0x00>; - assigned-clocks = <0x02 0x0e 0x02 0x55>; - assigned-clock-parents = <0x67 0x02 0x0e>; - clock-output-names = "usb480m_phy"; - status = "okay"; - phandle = <0x67>; - - host-port { - #phy-cells = <0x00>; - interrupts = <0x00 0x44 0x04>; - interrupt-names = "linestate"; - status = "okay"; - phandle = <0x8c>; - }; - - otg-port { - #phy-cells = <0x00>; - interrupts = <0x00 0x42 0x04 0x00 0x41 0x04 0x00 0x40 0x04>; - interrupt-names = "otg-bvalid\0otg-id\0linestate"; - status = "disabled"; - phandle = <0x8b>; - }; - }; - }; - - video-phy@ff2e0000 { - compatible = "rockchip,px30-video-phy"; - reg = <0x00 0xff2e0000 0x00 0x10000 0x00 0xff450000 0x00 0x10000>; - clocks = <0x2a 0x0b 0x02 0x145 0x02 0x144>; - clock-names = "ref\0pclk_phy\0pclk_host"; - #clock-cells = <0x00>; - resets = <0x02 0x3e>; - reset-names = "rst"; - power-domains = <0x8a 0x0c>; - #phy-cells = <0x00>; - status = "okay"; - phandle = <0x4c>; - }; - - mipi-dphy-rx0@ff2f0000 { - compatible = "rockchip,rk3326-mipi-dphy"; - reg = <0x00 0xff2f0000 0x00 0x4000>; - clocks = <0x02 0x146>; - clock-names = "dphy-ref"; - power-domains = <0x8a 0x0d>; - rockchip,grf = <0x2f>; - status = "okay"; - phandle = <0x101>; - }; - - usb@ff300000 { - compatible = "rockchip,px30-usb\0rockchip,rk3066-usb\0snps,dwc2"; - reg = <0x00 0xff300000 0x00 0x40000>; - interrupts = <0x00 0x3e 0x04>; - clocks = <0x02 0x102>; - clock-names = "otg"; - power-domains = <0x8a 0x05>; - dr_mode = "otg"; - g-np-tx-fifo-size = <0x10>; - g-rx-fifo-size = <0x118>; - g-tx-fifo-size = <0x100 0x80 0x80 0x40 0x20 0x10>; - g-use-dma; - phys = <0x8b>; - phy-names = "usb2-phy"; - status = "okay"; - phandle = <0x102>; - }; - - usb@ff340000 { - compatible = "generic-ehci"; - reg = <0x00 0xff340000 0x00 0x10000>; - interrupts = <0x00 0x3c 0x04>; - clocks = <0x02 0x103 0x67>; - clock-names = "usbhost\0utmi"; - power-domains = <0x8a 0x05>; - phys = <0x8c>; - phy-names = "usb"; - status = "disabled"; - phandle = <0x103>; - }; - - usb@ff350000 { - compatible = "generic-ohci"; - reg = <0x00 0xff350000 0x00 0x10000>; - interrupts = <0x00 0x3d 0x04>; - clocks = <0x02 0x103 0x67>; - clock-names = "usbhost\0utmi"; - power-domains = <0x8a 0x05>; - phys = <0x8c>; - phy-names = "usb"; - status = "disabled"; - phandle = <0x104>; - }; - - ethernet@ff360000 { - compatible = "rockchip,px30-gmac"; - reg = <0x00 0xff360000 0x00 0x10000>; - rockchip,grf = <0x2f>; - interrupts = <0x00 0x2b 0x04>; - interrupt-names = "macirq"; - clocks = <0x02 0x3e 0x02 0x3f 0x02 0x3f 0x02 0x40 0x02 0x41 0x02 0xb2 0x02 0x143 0x02 0x4c>; - clock-names = "stmmaceth\0mac_clk_rx\0mac_clk_tx\0clk_mac_ref\0clk_mac_refout\0aclk_mac\0pclk_mac\0clk_mac_speed"; - phy-mode = "rmii"; - pinctrl-names = "default"; - pinctrl-0 = <0x8d 0x8e>; - resets = <0x02 0x5e>; - reset-names = "stmmaceth"; - power-domains = <0x8a 0x09>; - status = "disabled"; - phandle = <0x105>; - }; - - dwmmc@ff370000 { - compatible = "rockchip,px30-dw-mshc\0rockchip,rk3288-dw-mshc"; - reg = <0x00 0xff370000 0x00 0x4000>; - max-frequency = <0x8f0d180>; - clocks = <0x02 0xf7 0x02 0x3b 0x02 0x43 0x02 0x44>; - clock-names = "biu\0ciu\0ciu-drv\0ciu-sample"; - assigned-clocks = <0x02 0x3b>; - assigned-clock-parents = <0x02 0x57>; - power-domains = <0x8a 0x07>; - fifo-depth = <0x100>; - interrupts = <0x00 0x36 0x04>; - pinctrl-names = "default"; - pinctrl-0 = <0x8f 0x90 0x91 0x92>; - status = "okay"; - bus-width = <0x04>; - cap-mmc-highspeed; - cap-sd-highspeed; - supports-sd; - card-detect-delay = <0x320>; - ignore-pm-notify; - cd-gpios = <0x5c 0x03 0x01>; - sd-uhs-sdr12; - sd-uhs-sdr25; - sd-uhs-sdr50; - sd-uhs-sdr104; - vqmmc-supply = <0x4a>; - vmmc-supply = <0x93>; - phandle = <0x106>; - }; - - dwmmc@ff380000 { - compatible = "rockchip,px30-dw-mshc\0rockchip,rk3288-dw-mshc"; - reg = <0x00 0xff380000 0x00 0x4000>; - max-frequency = <0x8f0d180>; - clocks = <0x02 0xff 0x02 0x38 0x02 0x45 0x02 0x46>; - clock-names = "biu\0ciu\0ciu-drv\0ciu-sample"; - assigned-clocks = <0x02 0x38>; - assigned-clock-parents = <0x02 0x51>; - power-domains = <0x8a 0x0a>; - fifo-depth = <0x100>; - interrupts = <0x00 0x37 0x04>; - pinctrl-names = "default"; - pinctrl-0 = <0x94 0x95 0x96>; - status = "okay"; - bus-width = <0x04>; - cap-mmc-highspeed; - cap-sd-highspeed; - supports-sd; - card-detect-delay = <0x320>; - ignore-pm-notify; - cd-gpios = <0x97 0x0e 0x01>; - sd-uhs-sdr12; - sd-uhs-sdr25; - sd-uhs-sdr50; - sd-uhs-sdr104; - vqmmc-supply = <0x4a>; - vmmc-supply = <0x93>; - phandle = <0x107>; - }; - - dwmmc@ff390000 { - compatible = "rockchip,px30-dw-mshc\0rockchip,rk3288-dw-mshc"; - reg = <0x00 0xff390000 0x00 0x4000>; - max-frequency = <0x8f0d180>; - clocks = <0x02 0x100 0x02 0x39 0x02 0x47 0x02 0x48>; - clock-names = "biu\0ciu\0ciu-drv\0ciu-sample"; - assigned-clocks = <0x02 0x39>; - assigned-clock-parents = <0x02 0x53>; - power-domains = <0x8a 0x0a>; - fifo-depth = <0x100>; - interrupts = <0x00 0x35 0x04>; - status = "disabled"; - phandle = <0x108>; - }; - - nandc@ff3b0000 { - compatible = "rockchip,rk-nandc"; - reg = <0x00 0xff3b0000 0x00 0x4000>; - interrupts = <0x00 0x39 0x04>; - nandc_id = <0x00>; - clocks = <0x02 0x37 0x02 0xfe>; - clock-names = "clk_nandc\0hclk_nandc"; - assigned-clocks = <0x02 0x37>; - assigned-clock-parents = <0x02 0x4f>; - power-domains = <0x8a 0x0a>; - status = "disabled"; - phandle = <0x109>; - }; - - sfc@ff3a0000 { - compatible = "rockchip,sfc"; - reg = <0x00 0xff3a0000 0x00 0x4000>; - interrupts = <0x00 0x38 0x04>; - clocks = <0x02 0x3a 0x02 0x101>; - clock-names = "clk_sfc\0hclk_sfc"; - assigned-clocks = <0x02 0x3a>; - assigned-clock-rates = <0x989680>; - status = "disabled"; - phandle = <0x10a>; - }; - - gpu@ff400000 { - compatible = "arm,malit602\0arm,malit60x\0arm,malit6xx\0arm,mali-midgard"; - reg = <0x00 0xff400000 0x00 0x4000>; - interrupts = <0x00 0x2d 0x04 0x00 0x2e 0x04 0x00 0x2f 0x04>; - interrupt-names = "GPU\0MMU\0JOB"; - clocks = <0x02 0x49>; - clock-names = "clk_mali"; - power-domains = <0x8a 0x0e>; - #cooling-cells = <0x02>; - operating-points-v2 = <0x98>; - status = "okay"; - mali-supply = <0x0e>; - phandle = <0x85>; - - power_model { - compatible = "arm,mali-simple-power-model"; - static-coefficient = <0x64578>; - dynamic-coefficient = <0x2dd>; - ts = <0x7d00 0x125c 0xffffffb0 0x02>; - thermal-zone = "gpu-thermal"; - }; - }; - - gpu-opp-table { - compatible = "operating-points-v2"; - rockchip,thermal-zone = "soc-thermal"; - rockchip,temp-hysteresis = <0x1388>; - rockchip,low-temp = <0x00>; - rockchip,low-temp-min-volt = <0xf4240>; - rockchip,low-temp-adjust-volt = <0x00 0x1e0 0xc350>; - rockchip,max-volt = <0x11edd8>; - rockchip,evb-irdrop = <0x61a8>; - rockchip,pvtm-voltage-sel = <0x00 0xc350 0x00 0xc351 0xd2f0 0x01 0xd2f1 0xea60 0x02 0xea61 0x1869f 0x03>; - rockchip,pvtm-ch = <0x00 0x00>; - phandle = <0x98>; - - opp-400000000 { - opp-hz = <0x00 0x17d78400>; - opp-microvolt = <0x100590>; - opp-microvolt-L0 = <0x100590>; - opp-microvolt-L1 = <0xfa3e8>; - opp-microvolt-L2 = <0xee098>; - opp-microvolt-L3 = <0xe7ef0>; - }; - - opp-480000000 { - opp-hz = <0x00 0x1c9c3800>; - opp-microvolt = <0x112a88>; - opp-microvolt-L0 = <0x112a88>; - opp-microvolt-L1 = <0x10c8e0>; - opp-microvolt-L2 = <0x100590>; - opp-microvolt-L3 = <0xf4240>; - }; - - opp-520000000 { - opp-hz = <0x00 0x1efe9200>; - opp-microvolt = <0x118c30>; - opp-microvolt-L0 = <0x118c30>; - opp-microvolt-L1 = <0x118c30>; - opp-microvolt-L2 = <0x10c8e0>; - opp-microvolt-L3 = <0x100590>; - }; - }; - - hevc_service@ff440000 { - compatible = "rockchip,hevc_sub"; - iommu_enabled = <0x01>; - reg = <0x00 0xff440000 0x00 0x400>; - interrupts = <0x00 0x31 0x04>; - interrupt-names = "irq_dec"; - dev_mode = <0x01>; - iommus = <0x99>; - allocator = <0x01>; - phandle = <0x9c>; - }; - - vpu_service@ff442000 { - compatible = "rockchip,vpu_sub"; - iommu_enabled = <0x01>; - reg = <0x00 0xff442000 0x00 0x800>; - interrupts = <0x00 0x50 0x04 0x00 0x4f 0x04>; - interrupt-names = "irq_enc\0irq_dec"; - dev_mode = <0x00>; - iommus = <0x9a>; - allocator = <0x01>; - phandle = <0x9b>; - }; - - vpu_combo { - compatible = "rockchip,vpu_combo"; - subcnt = <0x02>; - rockchip,grf = <0x2f>; - rockchip,sub = <0x9b 0x9c>; - clocks = <0x02 0xaf 0x02 0xf4 0x02 0x4b>; - clock-names = "aclk_vcodec\0hclk_vcodec\0clk_core"; - resets = <0x02 0x24 0x02 0x26 0x02 0x25 0x02 0x27 0x02 0x3f>; - reset-names = "video_a\0video_h\0niu_a\0niu_h\0video_core"; - power-domains = <0x8a 0x0b>; - mode_bit = <0x0f>; - mode_ctrl = <0x410>; - status = "okay"; - phandle = <0x10b>; - }; - - iommu@ff440440 { - compatible = "rockchip,iommu"; - reg = <0x00 0xff440440 0x00 0x40 0x00 0xff440480 0x00 0x40>; - interrupts = <0x00 0x32 0x04>; - interrupt-names = "hevc_mmu"; - clocks = <0x02 0xaf 0x02 0xf4>; - clock-names = "aclk\0hclk"; - power-domains = <0x8a 0x0b>; - #iommu-cells = <0x00>; - phandle = <0x99>; - }; - - iommu@ff442800 { - compatible = "rockchip,iommu"; - reg = <0x00 0xff442800 0x00 0x100>; - interrupts = <0x00 0x51 0x04>; - interrupt-names = "vpu_mmu"; - clocks = <0x02 0xaf 0x02 0xf4>; - clock-names = "aclk\0hclk"; - power-domains = <0x8a 0x0b>; - #iommu-cells = <0x00>; - phandle = <0x9a>; - }; - - dsi@ff450000 { - compatible = "rockchip,px30-mipi-dsi"; - reg = <0x00 0xff450000 0x00 0x10000>; - interrupts = <0x00 0x4b 0x04>; - clocks = <0x02 0x144 0x4c>; - clock-names = "pclk\0hs_clk"; - resets = <0x02 0x3d>; - reset-names = "apb"; - phys = <0x4c>; - phy-names = "mipi_dphy"; - power-domains = <0x8a 0x0c>; - rockchip,grf = <0x2f>; - #address-cells = <0x01>; - #size-cells = <0x00>; - status = "okay"; - phandle = <0x10c>; - - ports { - #address-cells = <0x01>; - #size-cells = <0x00>; - - port@0 { - reg = <0x00>; - #address-cells = <0x01>; - #size-cells = <0x00>; - - endpoint@0 { - reg = <0x00>; - remote-endpoint = <0x13>; - status = "okay"; - phandle = <0xa3>; - }; - }; - }; - - panel@0 { - compatible = "elida,kd35t133\0simple-panel-dsi"; - reg = <0x00>; - backlight = <0x9d>; - backlight-supply = <0x9e>; - power-supply = <0x9f>; - reset-gpios = <0x97 0x10 0x01>; - reset-delay-ms = <0x96>; - init-delay-ms = <0x14>; - enable-delay-ms = <0x78>; - prepare-delay-ms = <0x14>; - unprepare-delay-ms = <0x14>; - disable-delay-ms = <0x32>; - width-mm = <0x34>; - height-mm = <0x46>; - dsi,flags = <0xa03>; - dsi,format = <0x00>; - dsi,lanes = <0x04>; - panel-init-sequence = [15 00 02 ff 30 15 00 02 ff 52 15 00 02 ff 01 15 00 02 e3 00 15 00 02 25 10 15 00 02 28 6f 15 00 02 29 01 15 00 02 2a df 15 00 02 2c 22 15 00 02 c3 0f 15 00 02 37 9c 15 00 02 38 a7 15 00 02 39 41 15 00 02 80 20 15 00 02 91 67 15 00 02 92 67 15 00 02 a0 55 15 00 02 a1 50 15 00 02 a3 58 15 00 02 a4 9c 15 00 02 a7 02 15 00 02 a8 01 15 00 02 a9 21 15 00 02 aa fc 15 00 02 ab 28 15 00 02 ac 06 15 00 02 ad 06 15 00 02 ae 06 15 00 02 af 03 15 00 02 b0 08 15 00 02 b1 26 15 00 02 b2 28 15 00 02 b3 28 15 00 02 b4 03 15 00 02 b5 08 15 00 02 b6 26 15 00 02 b7 08 15 00 02 b8 26 15 00 02 2c 22 15 00 02 5c 40 15 00 02 c0 00 15 00 02 c1 00 15 00 02 c2 00 15 00 02 ff 30 15 00 02 ff 52 15 00 02 ff 02 15 00 02 b0 02 15 00 02 d0 02 15 00 02 b1 0f 15 00 02 d1 10 15 00 02 b2 11 15 00 02 d2 12 15 00 02 b3 32 15 00 02 d3 33 15 00 02 b4 36 15 00 02 d4 36 15 00 02 b5 3c 15 00 02 d5 3c 15 00 02 b6 20 15 00 02 d6 20 15 00 02 b7 3e 15 00 02 d7 3e 15 00 02 b8 0e 15 00 02 d8 0d 15 00 02 b9 05 15 00 02 d9 05 15 00 02 ba 11 15 00 02 da 12 15 00 02 bb 11 15 00 02 db 11 15 00 02 bc 13 15 00 02 dc 14 15 00 02 bd 14 15 00 02 dd 14 15 00 02 be 16 15 00 02 de 18 15 00 02 bf 0e 15 00 02 df 0f 15 00 02 c0 17 15 00 02 e0 17 15 00 02 c1 07 15 00 02 e1 08 15 00 02 ff 30 15 00 02 ff 52 15 00 02 ff 03 15 00 02 08 8a 15 00 02 09 8b 15 00 02 30 00 15 00 02 31 00 15 00 02 32 00 15 00 02 33 00 15 00 02 34 61 15 00 02 35 d4 15 00 02 36 24 15 00 02 37 03 15 00 02 40 86 15 00 02 41 87 15 00 02 42 84 15 00 02 43 85 15 00 02 44 11 15 00 02 45 de 15 00 02 46 dd 15 00 02 47 11 15 00 02 48 e0 15 00 02 49 df 15 00 02 50 82 15 00 02 51 83 15 00 02 52 80 15 00 02 53 81 15 00 02 54 11 15 00 02 55 e2 15 00 02 56 e1 15 00 02 57 11 15 00 02 58 e4 15 00 02 59 e3 15 00 02 82 0f 15 00 02 83 0f 15 00 02 84 00 15 00 02 85 0f 15 00 02 86 0f 15 00 02 87 0e 15 00 02 88 0e 15 00 02 89 06 15 00 02 8a 06 15 00 02 8b 07 15 00 02 8c 07 15 00 02 8d 04 15 00 02 8e 04 15 00 02 8f 05 15 00 02 90 05 15 00 02 98 0f 15 00 02 99 0f 15 00 02 9a 00 15 00 02 9b 0f 15 00 02 9c 0f 15 00 02 9d 0e 15 00 02 9e 0e 15 00 02 9f 06 15 00 02 a0 06 15 00 02 a1 07 15 00 02 a2 07 15 00 02 a3 04 15 00 02 a4 04 15 00 02 a5 05 15 00 02 a6 05 15 00 02 e0 02 15 00 02 e1 52 15 00 02 ff 30 15 00 02 ff 52 15 00 02 ff 00 15 00 02 36 02 15 00 02 11 00 15 00 02 29 00 05 c8 01 11 05 14 01 29]; - panel-exit-sequence = <0x5140128 0x50a0110>; - - display-timings { - native-mode = <0xa0>; - - 60Hz { - clock-frequency = <0x1ba8140>; - hactive = <0x280>; - vactive = <0x1e0>; - hfront-porch = <0x2e>; - hsync-len = <0x02>; - hback-porch = <0x2c>; - vfront-porch = <0xa5>; - vsync-len = <0x02>; - vback-porch = <0x0e>; - hsync-active = <0x00>; - vsync-active = <0x00>; - de-active = <0x00>; - pixelclk-active = <0x01>; - phandle = <0xaa1>; - }; - - 50Hz { - clock-frequency = <0x1ba8140>; - hactive = <0x280>; - vactive = <0x1e0>; - hfront-porch = <0x2e>; - hsync-len = <0x02>; - hback-porch = <0x2c>; - vfront-porch = <0x10>; - vsync-len = <0x02>; - vback-porch = <0x0e>; - hsync-active = <0x00>; - vsync-active = <0x00>; - de-active = <0x00>; - pixelclk-active = <0x01>; - phandle = <0xa00>; - }; - - 75Hz { - clock-frequency = <0x1ba8140>; - hactive = <0x280>; - vactive = <0x1e0>; - hfront-porch = <0x2e>; - hsync-len = <0x02>; - hback-porch = <0x2c>; - vfront-porch = <0x10>; - vsync-len = <0x02>; - vback-porch = <0x0e>; - hsync-active = <0x00>; - vsync-active = <0x00>; - de-active = <0x00>; - pixelclk-active = <0x01>; - phandle = <0xa01>; - }; - }; - }; - }; - - vop@ff460000 { - compatible = "rockchip,px30-vop-big"; - reg = <0x00 0xff460000 0x00 0x1fc 0x00 0xff460a00 0x00 0x400>; - rockchip,grf = <0x2f>; - reg-names = "regs\0gamma_lut"; - interrupts = <0x00 0x4d 0x04>; - clocks = <0x02 0xb5 0x02 0x96 0x02 0xfb>; - clock-names = "aclk_vop\0dclk_vop\0hclk_vop"; - power-domains = <0x8a 0x0c>; - iommus = <0xa1>; - status = "okay"; - phandle = <0x10f>; - - port { - #address-cells = <0x01>; - #size-cells = <0x00>; - phandle = <0x10>; - - endpoint@0 { - reg = <0x00>; - remote-endpoint = <0xa2>; - phandle = <0x12>; - }; - - endpoint@1 { - reg = <0x01>; - remote-endpoint = <0xa3>; - phandle = <0x13>; - }; - - endpoint@2 { - reg = <0x02>; - remote-endpoint = <0xa4>; - phandle = <0x14>; - }; - }; - }; - - iommu@ff460f00 { - compatible = "rockchip,iommu"; - reg = <0x00 0xff460f00 0x00 0x100>; - interrupts = <0x00 0x4d 0x04>; - interrupt-names = "vopb_mmu"; - clocks = <0x02 0xb5 0x02 0xfb>; - clock-names = "aclk\0hclk"; - power-domains = <0x8a 0x0c>; - #iommu-cells = <0x00>; - status = "okay"; - phandle = <0xa1>; - }; - - rk_rga@ff480000 { - compatible = "rockchip,rga2"; - reg = <0x00 0xff480000 0x00 0x1000>; - interrupts = <0x00 0x4c 0x04>; - clocks = <0x02 0xb7 0x02 0xfd 0x02 0x35>; - clock-names = "aclk_rga\0hclk_rga\0clk_rga"; - power-domains = <0x8a 0x0c>; - dma-coherent; - status = "okay"; - phandle = <0x110>; - }; - - cif@ff490000 { - compatible = "rockchip,cif"; - reg = <0x00 0xff490000 0x00 0x200>; - interrupts = <0x00 0x45 0x04>; - clocks = <0x02 0xb3 0x02 0xf9 0x02 0x160 0x02 0x34>; - clock-names = "aclk_cif0\0hclk_cif0\0pclk_cif\0cif0_out"; - resets = <0x02 0x2c 0x02 0x2d 0x02 0x2e>; - reset-names = "rst_cif_a\0rst_cif_h\0rst_cif_pclkin"; - power-domains = <0x8a 0x0d>; - pinctrl-names = "cif_pin_all"; - pinctrl-0 = <0xa5>; - iommus = <0xa6>; - status = "disabled"; - phandle = <0x111>; - }; - - cif-new@ff490000 { - compatible = "rockchip,px30-cif"; - reg = <0x00 0xff490000 0x00 0x200>; - interrupts = <0x00 0x45 0x04>; - clocks = <0x02 0xb3 0x02 0xf9 0x02 0x160 0x02 0x34>; - clock-names = "aclk_cif\0hclk_cif\0pclk_cif\0cif_out"; - resets = <0x02 0x2c 0x02 0x2d 0x02 0x2e>; - reset-names = "rst_cif_a\0rst_cif_h\0rst_cif_pclkin"; - power-domains = <0x8a 0x0d>; - iommus = <0xa6>; - status = "disabled"; - phandle = <0x112>; - }; - - iommu@ff490800 { - compatible = "rockchip,iommu"; - reg = <0x00 0xff490800 0x00 0x100>; - interrupts = <0x00 0x45 0x04>; - interrupt-names = "vip_mmu"; - clocks = <0x02 0xb3 0x02 0xf9>; - clock-names = "aclk\0hclk"; - power-domains = <0x8a 0x0d>; - rk_iommu,disable_reset_quirk; - #iommu-cells = <0x00>; - status = "okay"; - phandle = <0xa6>; - }; - - rk_isp@ff4a0000 { - compatible = "rockchip,px30-isp\0rockchip,isp"; - reg = <0x00 0xff4a0000 0x00 0x8000>; - interrupts = <0x00 0x46 0x04>; - clocks = <0x02 0xb4 0x02 0xfa 0x02 0x33 0x02 0x33 0x02 0x15f 0x02 0x34 0x02 0x34 0x02 0x146>; - clock-names = "aclk_isp\0hclk_isp\0clk_isp\0clk_isp_jpe\0pclkin_isp\0clk_cif_pll\0clk_cif_out\0pclk_dphyrx"; - resets = <0x02 0x2b 0x02 0x2f>; - reset-names = "rst_isp\0rst_mipicsiphy"; - power-domains = <0x8a 0x0d>; - pinctrl-names = "default\0isp_dvp8bit2\0isp_dvp10bit\0isp_dvp12bit"; - pinctrl-0 = <0xa7>; - pinctrl-1 = <0xa5>; - pinctrl-2 = <0xa5 0xa8>; - pinctrl-3 = <0xa9 0xa5 0xa8>; - rockchip,isp,mipiphy = <0x01>; - rockchip,isp,csiphy,reg = <0xff2f0000 0x4000>; - rockchip,grf = <0x2f>; - rockchip,cru = <0x02>; - rockchip,isp,iommu-enable = <0x01>; - iommus = <0xaa>; - status = "disabled"; - phandle = <0x113>; - }; - - rkisp1@ff4a0000 { - compatible = "rockchip,rk3326-rkisp1"; - reg = <0x00 0xff4a0000 0x00 0x8000>; - interrupts = <0x00 0x46 0x04 0x00 0x49 0x04 0x00 0x4a 0x04>; - interrupt-names = "isp_irq\0mi_irq\0mipi_irq"; - clocks = <0x02 0xb4 0x02 0xfa 0x02 0x33 0x02 0x15f>; - clock-names = "aclk_isp\0hclk_isp\0clk_isp\0pclk_isp"; - devfreq = <0xab>; - power-domains = <0x8a 0x0d>; - iommus = <0xaa>; - rockchip,grf = <0x2f>; - status = "okay"; - phandle = <0x114>; - }; - - iommu@ff4a8000 { - compatible = "rockchip,iommu"; - reg = <0x00 0xff4a8000 0x00 0x100>; - interrupts = <0x00 0x46 0x04>; - interrupt-names = "isp_mmu"; - clocks = <0x02 0xb4 0x02 0xfa>; - clock-names = "aclk\0hclk"; - power-domains = <0x8a 0x0d>; - rk_iommu,disable_reset_quirk; - #iommu-cells = <0x00>; - status = "okay"; - phandle = <0xaa>; - }; - - qos@ff518000 { - compatible = "syscon"; - reg = <0x00 0xff518000 0x00 0x20>; - phandle = <0x18>; - }; - - qos@ff520000 { - compatible = "syscon"; - reg = <0x00 0xff520000 0x00 0x20>; - phandle = <0x28>; - }; - - qos@ff52c000 { - compatible = "syscon"; - reg = <0x00 0xff52c000 0x00 0x20>; - phandle = <0x17>; - }; - - qos@ff538000 { - compatible = "syscon"; - reg = <0x00 0xff538000 0x00 0x20>; - phandle = <0x19>; - }; - - qos@ff538080 { - compatible = "syscon"; - reg = <0x00 0xff538080 0x00 0x20>; - phandle = <0x1a>; - }; - - qos@ff538100 { - compatible = "syscon"; - reg = <0x00 0xff538100 0x00 0x20>; - phandle = <0x1b>; - }; - - qos@ff538180 { - compatible = "syscon"; - reg = <0x00 0xff538180 0x00 0x20>; - phandle = <0x1c>; - }; - - qos@ff540000 { - compatible = "syscon"; - reg = <0x00 0xff540000 0x00 0x20>; - phandle = <0x15>; - }; - - qos@ff540080 { - compatible = "syscon"; - reg = <0x00 0xff540080 0x00 0x20>; - phandle = <0x16>; - }; - - qos@ff548000 { - compatible = "syscon"; - reg = <0x00 0xff548000 0x00 0x20>; - phandle = <0x23>; - }; - - qos@ff548080 { - compatible = "syscon"; - reg = <0x00 0xff548080 0x00 0x20>; - phandle = <0x24>; - }; - - qos@ff548100 { - compatible = "syscon"; - reg = <0x00 0xff548100 0x00 0x20>; - phandle = <0x25>; - }; - - qos@ff548180 { - compatible = "syscon"; - reg = <0x00 0xff548180 0x00 0x20>; - phandle = <0x26>; - }; - - qos@ff548200 { - compatible = "syscon"; - reg = <0x00 0xff548200 0x00 0x20>; - phandle = <0x27>; - }; - - qos@ff550000 { - compatible = "syscon"; - reg = <0x00 0xff550000 0x00 0x20>; - phandle = <0x1f>; - }; - - qos@ff550080 { - compatible = "syscon"; - reg = <0x00 0xff550080 0x00 0x20>; - phandle = <0x20>; - }; - - qos@ff550100 { - compatible = "syscon"; - reg = <0x00 0xff550100 0x00 0x20>; - phandle = <0x21>; - }; - - qos@ff550180 { - compatible = "syscon"; - reg = <0x00 0xff550180 0x00 0x20>; - phandle = <0x22>; - }; - - qos@ff558000 { - compatible = "syscon"; - reg = <0x00 0xff558000 0x00 0x20>; - phandle = <0x1d>; - }; - - qos@ff558080 { - compatible = "syscon"; - reg = <0x00 0xff558080 0x00 0x20>; - phandle = <0x1e>; - }; - - dfi@ff610000 { - reg = <0x00 0xff610000 0x00 0x400>; - compatible = "rockchip,px30-dfi"; - rockchip,pmugrf = <0xac>; - status = "okay"; - phandle = <0xad>; - }; - - dmc { - compatible = "rockchip,px30-dmc"; - interrupts = <0x00 0x69 0x04>; - interrupt-names = "complete_irq"; - devfreq-events = <0xad>; - clocks = <0x02 0x54>; - clock-names = "dmc_clk"; - operating-points-v2 = <0xae>; - ddr_timing = <0xaf>; - upthreshold = <0x28>; - downdifferential = <0x14>; - system-status-freq = <0x01 0x80e80 0x08 0x6ddd0 0x02 0x2f5d0 0x20 0x6ddd0 0x1000 0x80e80 0x4000 0xa2990 0x2000 0xa2990>; - auto-min-freq = <0x50140>; - auto-freq-en = <0x01>; - #cooling-cells = <0x02>; - status = "okay"; - center-supply = <0x0e>; - phandle = <0xab>; - - ddr_power_model { - compatible = "ddr_power_model"; - dynamic-power-coefficient = <0x78>; - static-power-coefficient = <0xc8>; - ts = <0x7d00 0x125c 0xffffffb0 0x02>; - thermal-zone = "soc-thermal"; - phandle = <0x115>; - }; - }; - - dmc-opp-table { - compatible = "operating-points-v2"; - rockchip,max-volt = <0x118c30>; - rockchip,evb-irdrop = <0x61a8>; - rockchip,pvtm-voltage-sel = <0x00 0xc350 0x00 0xc351 0xd2f0 0x01 0xd2f1 0xea60 0x02 0xea61 0x1869f 0x03>; - rockchip,pvtm-ch = <0x00 0x00>; - phandle = <0xae>; - - opp-528000000 { - opp-hz = <0x00 0x1f78a400>; - opp-microvolt = <0xee098>; - opp-microvolt-L0 = <0xee098>; - opp-microvolt-L1 = <0xee098>; - opp-microvolt-L2 = <0xe7ef0>; - opp-microvolt-L3 = <0xe7ef0>; - }; - - opp-666000000 { - opp-hz = <0x00 0x27b25a80>; - opp-microvolt = <0x100590>; - opp-microvolt-L0 = <0x100590>; - opp-microvolt-L1 = <0xf4240>; - opp-microvolt-L2 = <0xee098>; - opp-microvolt-L3 = <0xe7ef0>; - }; - - opp-786000000 { - opp-hz = <0x00 0x2ed96880>; - opp-microvolt = <0x10c8e0>; - opp-microvolt-L0 = <0x10c8e0>; - opp-microvolt-L1 = <0x100590>; - opp-microvolt-L2 = <0xfa3e8>; - opp-microvolt-L3 = <0xf4240>; - status = "okay"; - }; - }; - - rockchip-system-monitor { - compatible = "rockchip,system-monitor"; - rockchip,thermal-zone = "soc-thermal"; - rockchip,polling-delay = <0xc8>; - phandle = <0x116>; - }; - - pinctrl { - compatible = "rockchip,px30-pinctrl"; - rockchip,grf = <0x2f>; - rockchip,pmu = <0xac>; - #address-cells = <0x02>; - #size-cells = <0x02>; - ranges; - phandle = <0x117>; - - gpio0@ff040000 { - compatible = "rockchip,gpio-bank"; - reg = <0x00 0xff040000 0x00 0x100>; - interrupts = <0x00 0x03 0x04>; - clocks = <0x2a 0x14>; - gpio-controller; - #gpio-cells = <0x02>; - interrupt-controller; - #interrupt-cells = <0x02>; - phandle = <0x5c>; - - pwm0_hold_low { - gpio-hog; - gpios = <0x0f 0x00>; - output-low; - line-name = "rumble_en_hold_low"; - }; - }; - - gpio1@ff250000 { - compatible = "rockchip,gpio-bank"; - reg = <0x00 0xff250000 0x00 0x100>; - interrupts = <0x00 0x04 0x04>; - clocks = <0x02 0x15c>; - gpio-controller; - #gpio-cells = <0x02>; - interrupt-controller; - #interrupt-cells = <0x02>; - phandle = <0xbf>; - }; - - gpio2@ff260000 { - compatible = "rockchip,gpio-bank"; - reg = <0x00 0xff260000 0x00 0x100>; - interrupts = <0x00 0x05 0x04>; - clocks = <0x02 0x15d>; - gpio-controller; - #gpio-cells = <0x02>; - interrupt-controller; - #interrupt-cells = <0x02>; - phandle = <0x66>; - }; - - gpio3@ff270000 { - compatible = "rockchip,gpio-bank"; - reg = <0x00 0xff270000 0x00 0x100>; - interrupts = <0x00 0x06 0x04>; - clocks = <0x02 0x15e>; - gpio-controller; - #gpio-cells = <0x02>; - interrupt-controller; - #interrupt-cells = <0x02>; - phandle = <0x97>; - }; - - pcfg-pull-up { - bias-pull-up; - phandle = <0xb2>; - }; - - pcfg-pull-down { - bias-pull-down; - phandle = <0x118>; - }; - - pcfg-pull-none { - bias-disable; - phandle = <0xb1>; - }; - - pcfg-pull-none-2ma { - bias-disable; - drive-strength = <0x02>; - phandle = <0x119>; - }; - - pcfg-pull-up-2ma { - bias-pull-up; - drive-strength = <0x02>; - phandle = <0x11a>; - }; - - pcfg-pull-up-4ma { - bias-pull-up; - drive-strength = <0x04>; - phandle = <0xb3>; - }; - - pcfg-pull-none-4ma { - bias-disable; - drive-strength = <0x04>; - phandle = <0x11b>; - }; - - pcfg-pull-down-4ma { - bias-pull-down; - drive-strength = <0x04>; - phandle = <0x11c>; - }; - - pcfg-pull-none-8ma { - bias-disable; - drive-strength = <0x08>; - phandle = <0xb6>; - }; - - pcfg-pull-up-8ma { - bias-pull-up; - drive-strength = <0x08>; - phandle = <0xb4>; - }; - - pcfg-pull-none-12ma { - bias-disable; - drive-strength = <0x0c>; - phandle = <0xb8>; - }; - - pcfg-pull-up-12ma { - bias-pull-up; - drive-strength = <0x0c>; - phandle = <0xb7>; - }; - - pcfg-pull-none-smt { - bias-disable; - input-schmitt-enable; - phandle = <0xb0>; - }; - - pcfg-output-high { - output-high; - phandle = <0x11d>; - }; - - pcfg-output-low { - output-low; - phandle = <0xb9>; - }; - - pcfg-input-high { - bias-pull-up; - input-enable; - phandle = <0xb5>; - }; - - pcfg-input { - input-enable; - phandle = <0x11e>; - }; - - i2c0 { - - i2c0-xfer { - rockchip,pins = <0x00 0x08 0x01 0xb0 0x00 0x09 0x01 0xb0>; - phandle = <0x5b>; - }; - }; - - i2c1 { - - i2c1-xfer { - rockchip,pins = <0x00 0x12 0x01 0xb0 0x00 0x13 0x01 0xb0>; - phandle = <0x69>; - }; - }; - - i2c2 { - - i2c2-xfer { - rockchip,pins = <0x02 0x0f 0x02 0xb0 0x02 0x10 0x02 0xb0>; - phandle = <0x6a>; - }; - }; - - i2c3 { - - i2c3-xfer { - rockchip,pins = <0x01 0x0c 0x04 0xb0 0x01 0x0d 0x04 0xb0>; - phandle = <0x6b>; - }; - }; - - tsadc { - - tsadc-otp-gpio { - rockchip,pins = <0x00 0x06 0x00 0xb1>; - phandle = <0x86>; - }; - - tsadc-otp-out { - rockchip,pins = <0x00 0x06 0x01 0xb1>; - phandle = <0x87>; - }; - }; - - uart0 { - - uart0-xfer { - rockchip,pins = <0x00 0x0a 0x01 0xb2 0x00 0x0b 0x01 0xb2>; - phandle = <0x2c>; - }; - - uart0-cts { - rockchip,pins = <0x00 0x0c 0x01 0xb1>; - phandle = <0x2d>; - }; - - uart0-rts { - rockchip,pins = <0x00 0x0d 0x01 0xb1>; - phandle = <0x2e>; - }; - - uart0-rts-gpio { - rockchip,pins = <0x00 0x0d 0x00 0xb1>; - phandle = <0x11f>; - }; - }; - - uart1 { - - uart1-xfer { - rockchip,pins = <0x01 0x11 0x01 0xb2 0x01 0x10 0x01 0xb2>; - phandle = <0x4f>; - }; - - uart1-cts { - rockchip,pins = <0x01 0x12 0x01 0xb1>; - phandle = <0x50>; - }; - - uart1-rts { - rockchip,pins = <0x01 0x13 0x01 0xb1>; - phandle = <0x120>; - }; - - uart1-rts-gpio { - rockchip,pins = <0x01 0x13 0x00 0xb1>; - phandle = <0x121>; - }; - }; - - uart2-m0 { - - uart2m0-xfer { - rockchip,pins = <0x01 0x1a 0x02 0xb2 0x01 0x1b 0x02 0xb2>; - phandle = <0x51>; - }; - }; - - uart2-m1 { - - uart2m1-xfer { - rockchip,pins = <0x02 0x0c 0x02 0xb2 0x02 0x0e 0x02 0xb2>; - phandle = <0xba>; - }; - }; - - uart3-m0 { - - uart3m0-xfer { - rockchip,pins = <0x00 0x10 0x02 0xb2 0x00 0x11 0x02 0xb2>; - phandle = <0x122>; - }; - - uart3m0-cts { - rockchip,pins = <0x00 0x12 0x02 0xb1>; - phandle = <0x123>; - }; - - uart3m0-rts { - rockchip,pins = <0x00 0x13 0x02 0xb1>; - phandle = <0x124>; - }; - - uart3m0-rts-gpio { - rockchip,pins = <0x00 0x13 0x00 0xb1>; - phandle = <0x125>; - }; - }; - - uart3-m1 { - - uart3m1-xfer { - rockchip,pins = <0x01 0x0e 0x02 0xb2 0x01 0x0f 0x02 0xb2>; - phandle = <0x52>; - }; - - uart3m1-cts { - rockchip,pins = <0x01 0x0c 0x02 0xb1>; - phandle = <0x53>; - }; - - uart3m1-rts { - rockchip,pins = <0x01 0x0d 0x02 0xb1>; - phandle = <0x54>; - }; - - uart3m1-rts-gpio { - rockchip,pins = <0x01 0x0d 0x00 0xb1>; - phandle = <0x126>; - }; - }; - - uart4 { - - uart4-xfer { - rockchip,pins = <0x01 0x1c 0x02 0xb2 0x01 0x1d 0x02 0xb2>; - phandle = <0x55>; - }; - - uart4-cts { - rockchip,pins = <0x01 0x1e 0x02 0xb1>; - phandle = <0x56>; - }; - - uart4-rts { - rockchip,pins = <0x01 0x1f 0x02 0xb1>; - phandle = <0x57>; - }; - }; - - uart5 { - - uart5-xfer { - rockchip,pins = <0x03 0x02 0x04 0xb2 0x03 0x01 0x04 0xb2>; - phandle = <0x58>; - }; - - uart5-cts { - rockchip,pins = <0x03 0x03 0x04 0xb1>; - phandle = <0x59>; - }; - - uart5-rts { - rockchip,pins = <0x03 0x05 0x04 0xb1>; - phandle = <0x5a>; - }; - }; - - spi0 { - - spi0-clk { - rockchip,pins = <0x01 0x0f 0x03 0xb3>; - phandle = <0x6c>; - }; - - spi0-csn { - rockchip,pins = <0x01 0x0e 0x03 0xb3>; - phandle = <0x6d>; - }; - - spi0-miso { - rockchip,pins = <0x01 0x0d 0x03 0xb3>; - phandle = <0x6e>; - }; - - spi0-mosi { - rockchip,pins = <0x01 0x0c 0x03 0xb3>; - phandle = <0x6f>; - }; - - spi0-clk-hs { - rockchip,pins = <0x01 0x0f 0x03 0xb4>; - phandle = <0x70>; - }; - - spi0-miso-hs { - rockchip,pins = <0x01 0x0d 0x03 0xb4>; - phandle = <0x71>; - }; - - spi0-mosi-hs { - rockchip,pins = <0x01 0x0c 0x03 0xb4>; - phandle = <0x72>; - }; - }; - - spi1 { - - spi1-clk { - rockchip,pins = <0x03 0x0f 0x04 0xb3>; - phandle = <0x73>; - }; - - spi1-csn0 { - rockchip,pins = <0x03 0x09 0x04 0xb3>; - phandle = <0x74>; - }; - - spi1-csn1 { - rockchip,pins = <0x03 0x0a 0x02 0xb3>; - phandle = <0x75>; - }; - - spi1-miso { - rockchip,pins = <0x03 0x0e 0x04 0xb3>; - phandle = <0x76>; - }; - - spi1-mosi { - rockchip,pins = <0x03 0x0c 0x04 0xb3>; - phandle = <0x77>; - }; - - spi1-clk-hs { - rockchip,pins = <0x03 0x0f 0x04 0xb4>; - phandle = <0x78>; - }; - - spi1-miso-hs { - rockchip,pins = <0x03 0x0e 0x04 0xb4>; - phandle = <0x79>; - }; - - spi1-mosi-hs { - rockchip,pins = <0x03 0x0c 0x04 0xb4>; - phandle = <0x7a>; - }; - }; - - pdm { - - pdm-clk0m0 { - rockchip,pins = <0x03 0x16 0x02 0xb1>; - phandle = <0x44>; - }; - - pdm-clk0m1 { - rockchip,pins = <0x02 0x16 0x01 0xb1>; - phandle = <0x127>; - }; - - pdm-clk1 { - rockchip,pins = <0x03 0x17 0x02 0xb1>; - phandle = <0x45>; - }; - - pdm-sdi0m0 { - rockchip,pins = <0x03 0x1b 0x02 0xb1>; - phandle = <0x46>; - }; - - pdm-sdi0m1 { - rockchip,pins = <0x02 0x15 0x02 0xb1>; - phandle = <0x128>; - }; - - pdm-sdi1 { - rockchip,pins = <0x03 0x18 0x02 0xb1>; - phandle = <0x47>; - }; - - pdm-sdi2 { - rockchip,pins = <0x03 0x19 0x02 0xb1>; - phandle = <0x48>; - }; - - pdm-sdi3 { - rockchip,pins = <0x03 0x1a 0x02 0xb1>; - phandle = <0x49>; - }; - - pdm-clk0m0-sleep { - rockchip,pins = <0x03 0x16 0x00 0xb5>; - phandle = <0x129>; - }; - - pdm-clk0m1-sleep { - rockchip,pins = <0x02 0x16 0x00 0xb5>; - phandle = <0x12a>; - }; - - pdm-clk1-sleep { - rockchip,pins = <0x03 0x17 0x00 0xb5>; - phandle = <0x12b>; - }; - - pdm-sdi0m0-sleep { - rockchip,pins = <0x03 0x1b 0x00 0xb5>; - phandle = <0x12c>; - }; - - pdm-sdi0m1-sleep { - rockchip,pins = <0x02 0x15 0x00 0xb5>; - phandle = <0x12d>; - }; - - pdm-sdi1-sleep { - rockchip,pins = <0x03 0x18 0x00 0xb5>; - phandle = <0x12e>; - }; - - pdm-sdi2-sleep { - rockchip,pins = <0x03 0x19 0x00 0xb5>; - phandle = <0x12f>; - }; - - pdm-sdi3-sleep { - rockchip,pins = <0x03 0x1a 0x00 0xb5>; - phandle = <0x130>; - }; - }; - - i2s0 { - - i2s0-8ch-mclk { - rockchip,pins = <0x03 0x11 0x02 0xb1>; - phandle = <0x131>; - }; - - i2s0-8ch-sclktx { - rockchip,pins = <0x03 0x13 0x02 0xb1>; - phandle = <0x30>; - }; - - i2s0-8ch-sclkrx { - rockchip,pins = <0x03 0x0c 0x02 0xb1>; - phandle = <0x31>; - }; - - i2s0-8ch-lrcktx { - rockchip,pins = <0x03 0x12 0x02 0xb1>; - phandle = <0x32>; - }; - - i2s0-8ch-lrckrx { - rockchip,pins = <0x03 0x0d 0x02 0xb1>; - phandle = <0x33>; - }; - - i2s0-8ch-sdo0 { - rockchip,pins = <0x03 0x14 0x02 0xb1>; - phandle = <0x38>; - }; - - i2s0-8ch-sdo1 { - rockchip,pins = <0x03 0x10 0x02 0xb1>; - phandle = <0x39>; - }; - - i2s0-8ch-sdo2 { - rockchip,pins = <0x03 0x0f 0x02 0xb1>; - phandle = <0x3a>; - }; - - i2s0-8ch-sdo3 { - rockchip,pins = <0x03 0x0e 0x02 0xb1>; - phandle = <0x3b>; - }; - - i2s0-8ch-sdi0 { - rockchip,pins = <0x03 0x15 0x02 0xb1>; - phandle = <0x34>; - }; - - i2s0-8ch-sdi1 { - rockchip,pins = <0x03 0x0b 0x02 0xb1>; - phandle = <0x35>; - }; - - i2s0-8ch-sdi2 { - rockchip,pins = <0x03 0x09 0x02 0xb1>; - phandle = <0x36>; - }; - - i2s0-8ch-sdi3 { - rockchip,pins = <0x03 0x08 0x02 0xb1>; - phandle = <0x37>; - }; - }; - - i2s1 { - - i2s1-2ch-mclk { - rockchip,pins = <0x02 0x13 0x01 0xb1>; - phandle = <0x68>; - }; - - i2s1-2ch-sclk { - rockchip,pins = <0x02 0x12 0x01 0xb1>; - phandle = <0x3c>; - }; - - i2s1-2ch-lrck { - rockchip,pins = <0x02 0x11 0x01 0xb1>; - phandle = <0x3d>; - }; - - i2s1-2ch-sdi { - rockchip,pins = <0x02 0x15 0x01 0xb1>; - phandle = <0x3e>; - }; - - i2s1-2ch-sdo { - rockchip,pins = <0x02 0x14 0x01 0xb1>; - phandle = <0x3f>; - }; - }; - - i2s2 { - - i2s2-2ch-mclk { - rockchip,pins = <0x03 0x01 0x02 0xb1>; - phandle = <0x132>; - }; - - i2s2-2ch-sclk { - rockchip,pins = <0x03 0x02 0x02 0xb1>; - phandle = <0x40>; - }; - - i2s2-2ch-lrck { - rockchip,pins = <0x03 0x03 0x02 0xb1>; - phandle = <0x41>; - }; - - i2s2-2ch-sdi { - rockchip,pins = <0x03 0x05 0x02 0xb1>; - phandle = <0x42>; - }; - - i2s2-2ch-sdo { - rockchip,pins = <0x03 0x07 0x02 0xb1>; - phandle = <0x43>; - }; - }; - - sdmmc { - - sdmmc-clk { - rockchip,pins = <0x01 0x1e 0x01 0xb6>; - phandle = <0x8f>; - }; - - sdmmc-cmd { - rockchip,pins = <0x01 0x1f 0x01 0xb4>; - phandle = <0x90>; - }; - - sdmmc-det { - rockchip,pins = <0x00 0x03 0x01 0xb4>; - phandle = <0x91>; - }; - - sdmmc-bus1 { - rockchip,pins = <0x01 0x1a 0x01 0xb4>; - phandle = <0x133>; - }; - - sdmmc-bus4 { - rockchip,pins = <0x01 0x1a 0x01 0xb4 0x01 0x1b 0x01 0xb4 0x01 0x1c 0x01 0xb4 0x01 0x1d 0x01 0xb4>; - phandle = <0x92>; - }; - - sdmmc-gpio { - rockchip,pins = <0x01 0x1a 0x00 0xb3 0x01 0x1b 0x00 0xb3 0x01 0x1c 0x00 0xb3 0x01 0x1d 0x00 0xb3 0x01 0x1e 0x00 0xb3 0x01 0x1f 0x00 0xb3>; - phandle = <0x134>; - }; - }; - - sdio { - - sdio-clk { - rockchip,pins = <0x01 0x15 0x01 0xb1>; - phandle = <0x96>; - }; - - sdio-cmd { - rockchip,pins = <0x01 0x14 0x01 0xb2>; - phandle = <0x95>; - }; - - sdio-bus4 { - rockchip,pins = <0x01 0x16 0x01 0xb2 0x01 0x17 0x01 0xb2 0x01 0x18 0x01 0xb2 0x01 0x19 0x01 0xb2>; - phandle = <0x94>; - }; - - sdio-gpio { - rockchip,pins = <0x01 0x16 0x00 0xb2 0x01 0x17 0x00 0xb2 0x01 0x18 0x00 0xb2 0x01 0x19 0x00 0xb2 0x01 0x14 0x00 0xb2 0x01 0x15 0x00 0xb2>; - phandle = <0x135>; - }; - }; - - emmc { - - emmc-clk { - rockchip,pins = <0x01 0x09 0x02 0xb6>; - phandle = <0x136>; - }; - - emmc-cmd { - rockchip,pins = <0x01 0x0a 0x02 0xb4>; - phandle = <0x137>; - }; - - emmc-pwren { - rockchip,pins = <0x01 0x08 0x02 0xb1>; - phandle = <0x138>; - }; - - emmc-rstnout { - rockchip,pins = <0x01 0x0b 0x02 0xb1>; - phandle = <0x139>; - }; - - emmc-bus1 { - rockchip,pins = <0x01 0x00 0x02 0xb4>; - phandle = <0x13a>; - }; - - emmc-bus4 { - rockchip,pins = <0x01 0x00 0x02 0xb4 0x01 0x01 0x02 0xb4 0x01 0x02 0x02 0xb4 0x01 0x03 0x02 0xb4>; - phandle = <0x13b>; - }; - - emmc-bus8 { - rockchip,pins = <0x01 0x00 0x02 0xb4 0x01 0x01 0x02 0xb4 0x01 0x02 0x02 0xb4 0x01 0x03 0x02 0xb4 0x01 0x04 0x02 0xb4 0x01 0x05 0x02 0xb4 0x01 0x06 0x02 0xb4 0x01 0x07 0x02 0xb4>; - phandle = <0x13c>; - }; - }; - - flash { - - flash-cs0 { - rockchip,pins = <0x01 0x08 0x01 0xb1>; - phandle = <0x13d>; - }; - - flash-rdy { - rockchip,pins = <0x01 0x09 0x01 0xb1>; - phandle = <0x13e>; - }; - - flash-dqs { - rockchip,pins = <0x01 0x0a 0x01 0xb1>; - phandle = <0x13f>; - }; - - flash-ale { - rockchip,pins = <0x01 0x0b 0x01 0xb1>; - phandle = <0x140>; - }; - - flash-cle { - rockchip,pins = <0x01 0x0c 0x01 0xb1>; - phandle = <0x141>; - }; - - flash-wrn { - rockchip,pins = <0x01 0x0d 0x01 0xb1>; - phandle = <0x142>; - }; - - flash-csl { - rockchip,pins = <0x01 0x0e 0x01 0xb1>; - phandle = <0x143>; - }; - - flash-rdn { - rockchip,pins = <0x01 0x0f 0x01 0xb1>; - phandle = <0x144>; - }; - - flash-bus8 { - rockchip,pins = <0x01 0x00 0x01 0xb7 0x01 0x01 0x01 0xb7 0x01 0x02 0x01 0xb7 0x01 0x03 0x01 0xb7 0x01 0x04 0x01 0xb7 0x01 0x05 0x01 0xb7 0x01 0x06 0x01 0xb7 0x01 0x07 0x01 0xb7>; - phandle = <0x145>; - }; - }; - - lcdc { - - lcdc-m0-rgb-pins { - rockchip,pins = <0x03 0x00 0x01 0xb6 0x03 0x01 0x01 0xb6 0x03 0x02 0x01 0xb6 0x03 0x03 0x01 0xb6 0x03 0x04 0x01 0xb6 0x03 0x05 0x01 0xb6 0x03 0x06 0x01 0xb6 0x03 0x07 0x01 0xb6 0x03 0x08 0x01 0xb6 0x03 0x09 0x01 0xb6 0x03 0x0a 0x01 0xb6 0x03 0x0b 0x01 0xb6 0x03 0x0c 0x01 0xb6 0x03 0x0d 0x01 0xb6 0x03 0x0e 0x01 0xb6 0x03 0x0f 0x01 0xb6 0x03 0x10 0x01 0xb6 0x03 0x11 0x01 0xb6 0x03 0x12 0x01 0xb6 0x03 0x13 0x01 0xb6 0x03 0x14 0x01 0xb6 0x03 0x15 0x01 0xb6 0x03 0x16 0x01 0xb6 0x03 0x17 0x01 0xb6 0x03 0x18 0x01 0xb6 0x03 0x19 0x01 0xb6 0x03 0x1a 0x01 0xb6 0x03 0x1b 0x01 0xb6>; - phandle = <0x146>; - }; - - lcdc-m0-sleep-pins { - rockchip,pins = <0x03 0x00 0x00 0xb1 0x03 0x01 0x00 0xb1 0x03 0x02 0x00 0xb1 0x03 0x03 0x00 0xb1 0x03 0x04 0x00 0xb1 0x03 0x05 0x00 0xb1 0x03 0x06 0x00 0xb1 0x03 0x07 0x00 0xb1 0x03 0x08 0x00 0xb1 0x03 0x09 0x00 0xb1 0x03 0x0a 0x00 0xb1 0x03 0x0b 0x00 0xb1 0x03 0x0c 0x00 0xb1 0x03 0x0d 0x00 0xb1 0x03 0x0e 0x00 0xb1 0x03 0x0f 0x00 0xb1 0x03 0x10 0x00 0xb1 0x03 0x11 0x00 0xb1 0x03 0x12 0x00 0xb1 0x03 0x13 0x00 0xb1 0x03 0x14 0x00 0xb1 0x03 0x15 0x00 0xb1 0x03 0x16 0x00 0xb1 0x03 0x17 0x00 0xb1 0x03 0x18 0x00 0xb1 0x03 0x19 0x00 0xb1 0x03 0x1a 0x00 0xb1 0x03 0x1b 0x00 0xb1>; - phandle = <0x147>; - }; - - lcdc-m1-rgb-pins { - rockchip,pins = <0x03 0x00 0x01 0xb6 0x03 0x04 0x01 0xb6 0x03 0x06 0x01 0xb6 0x03 0x0a 0x01 0xb6 0x03 0x0b 0x01 0xb6 0x03 0x0d 0x01 0xb6 0x03 0x10 0x01 0xb6 0x03 0x11 0x01 0xb6 0x03 0x12 0x01 0xb6 0x03 0x13 0x01 0xb6 0x03 0x14 0x01 0xb6 0x03 0x15 0x01 0xb6 0x03 0x16 0x01 0xb6 0x03 0x17 0x01 0xb6 0x03 0x18 0x01 0xb6 0x03 0x19 0x01 0xb6 0x03 0x1a 0x01 0xb6 0x03 0x1b 0x01 0xb6>; - phandle = <0x4d>; - }; - - lcdc-m1-sleep-pins { - rockchip,pins = <0x03 0x00 0x00 0xb1 0x03 0x04 0x00 0xb1 0x03 0x06 0x00 0xb1 0x03 0x0a 0x00 0xb1 0x03 0x0b 0x00 0xb1 0x03 0x0d 0x00 0xb1 0x03 0x10 0x00 0xb1 0x03 0x11 0x00 0xb1 0x03 0x12 0x00 0xb1 0x03 0x13 0x00 0xb1 0x03 0x14 0x00 0xb1 0x03 0x15 0x00 0xb1 0x03 0x16 0x00 0xb1 0x03 0x17 0x00 0xb1 0x03 0x18 0x00 0xb1 0x03 0x19 0x00 0xb1 0x03 0x1a 0x00 0xb1 0x03 0x1b 0x00 0xb1>; - phandle = <0x4e>; - }; - }; - - pwm0 { - - pwm0-pin { - rockchip,pins = <0x00 0x0f 0x01 0x118>; - phandle = <0x7b>; - }; - }; - - pwm1 { - - pwm1-pin { - rockchip,pins = <0x00 0x10 0x01 0xb1>; - phandle = <0x7c>; - }; - }; - - pwm2 { - - pwm2-pin { - rockchip,pins = <0x02 0x0d 0x01 0xb1>; - phandle = <0x7d>; - }; - }; - - pwm3 { - - pwm3-pin { - rockchip,pins = <0x00 0x11 0x01 0xb1>; - phandle = <0x7e>; - }; - }; - - pwm4 { - - pwm4-pin { - rockchip,pins = <0x03 0x12 0x03 0xb1>; - phandle = <0x7f>; - }; - }; - - pwm5 { - - pwm5-pin { - rockchip,pins = <0x03 0x13 0x03 0xb1>; - phandle = <0x80>; - }; - }; - - pwm6 { - - pwm6-pin { - rockchip,pins = <0x03 0x14 0x03 0xb1>; - phandle = <0x81>; - }; - }; - - pwm7 { - - pwm7-pin { - rockchip,pins = <0x03 0x15 0x03 0xb1>; - phandle = <0x82>; - }; - }; - - gmac { - - rmii-pins { - rockchip,pins = <0x02 0x00 0x02 0xb8 0x02 0x01 0x02 0xb8 0x02 0x02 0x02 0xb8 0x02 0x03 0x02 0xb1 0x02 0x04 0x02 0xb1 0x02 0x05 0x02 0xb1 0x02 0x06 0x02 0xb1 0x02 0x07 0x02 0xb1 0x02 0x09 0x02 0xb1>; - phandle = <0x8d>; - }; - - mac-refclk-12ma { - rockchip,pins = <0x02 0x0a 0x02 0xb8>; - phandle = <0x8e>; - }; - - mac-refclk { - rockchip,pins = <0x02 0x0a 0x02 0xb1>; - phandle = <0x148>; - }; - }; - - cif-m0 { - - cif-clkout-m0 { - rockchip,pins = <0x02 0x0b 0x01 0xb8>; - phandle = <0xa7>; - }; - - dvp-d2d9-m0 { - rockchip,pins = <0x02 0x00 0x01 0xb1 0x02 0x01 0x01 0xb1 0x02 0x02 0x01 0xb1 0x02 0x03 0x01 0xb1 0x02 0x04 0x01 0xb1 0x02 0x05 0x01 0xb1 0x02 0x06 0x01 0xb1 0x02 0x07 0x01 0xb1 0x02 0x08 0x01 0xb1 0x02 0x09 0x01 0xb1 0x02 0x0a 0x01 0xb1 0x02 0x0b 0x01 0xb1>; - phandle = <0xa5>; - }; - - dvp-d0d1-m0 { - rockchip,pins = <0x02 0x0c 0x01 0xb1 0x02 0x0e 0x01 0xb1>; - phandle = <0xa9>; - }; - - d10-d11-m0 { - rockchip,pins = <0x02 0x0f 0x01 0xb1 0x02 0x10 0x01 0xb1>; - phandle = <0xa8>; - }; - }; - - cif-m1 { - - cif-clkout-m1 { - rockchip,pins = <0x03 0x18 0x03 0xb1>; - phandle = <0x149>; - }; - - dvp-d2d9-m1 { - rockchip,pins = <0x03 0x03 0x03 0xb1 0x03 0x05 0x03 0xb1 0x03 0x07 0x03 0xb1 0x03 0x08 0x03 0xb1 0x03 0x09 0x03 0xb1 0x03 0x0c 0x03 0xb1 0x03 0x0e 0x03 0xb1 0x03 0x0f 0x03 0xb1 0x03 0x19 0x03 0xb1 0x03 0x1a 0x03 0xb1 0x03 0x1b 0x03 0xb1 0x03 0x18 0x03 0xb1>; - phandle = <0x14a>; - }; - - dvp-d0d1-m1 { - rockchip,pins = <0x03 0x01 0x03 0xb1 0x03 0x02 0x03 0xb1>; - phandle = <0x14b>; - }; - - d10-d11-m1 { - rockchip,pins = <0x03 0x16 0x03 0xb1 0x03 0x17 0x03 0xb1>; - phandle = <0x14c>; - }; - }; - - isp { - - isp-prelight { - rockchip,pins = <0x03 0x19 0x04 0xb1>; - phandle = <0x14d>; - }; - }; - - pmic { - - pmic_int { - rockchip,pins = <0x00 0x0a 0x00 0xb2 0x00 0x0b 0x00 0xb1>; - phandle = <0x5d>; - }; - - soc_slppin_gpio { - rockchip,pins = <0x00 0x04 0x00 0xb9>; - phandle = <0x60>; - }; - - soc_slppin_slp { - rockchip,pins = <0x00 0x04 0x01 0xb1>; - phandle = <0x5e>; - }; - - soc_slppin_rst { - rockchip,pins = <0x00 0x04 0x02 0xb1>; - phandle = <0x62>; - }; - }; - - leds { - - led-pins { - rockchip,pins = <0x00 0x11 0x00 0xb1>; - phandle = <0xc0>; - }; - }; - - btns { - - btn-pins { - rockchip,pins = <0x01 0x0c 0x00 0xb2 0x01 0x0d 0x00 0xb2 0x01 0x0e 0x00 0xb2 0x01 0x0f 0x00 0xb2 0x01 0x02 0x00 0xb2 0x01 0x05 0x00 0xb2 0x01 0x06 0x00 0xb2 0x01 0x07 0x00 0xb2 0x02 0x00 0x00 0xb2 0x02 0x01 0x00 0xb2 0x02 0x02 0x00 0xb2 0x02 0x03 0x00 0xb2 0x02 0x04 0x00 0xb2 0x02 0x05 0x00 0xb2 0x02 0x06 0x00 0xb2 0x02 0x07 0x00 0xb2 0x03 0x09 0x00 0xb2 0x03 0x0a 0x00 0xb2 0x03 0x0c 0x00 0xb2 0x03 0x0f 0x00 0xb2>; - phandle = <0xbd>; - }; - }; - }; - - chosen { - bootargs = [00]; - }; - - fiq-debugger { - compatible = "rockchip,fiq-debugger"; - rockchip,serial-id = <0x02>; - rockchip,wake-irq = <0x00>; - rockchip,irq-mode-enable = <0x00>; - rockchip,baudrate = <0x1c200>; - interrupts = <0x00 0x7f 0x08>; - pinctrl-names = "default"; - pinctrl-0 = <0xba>; - status = "okay"; - }; - - ramoops { - compatible = "ramoops"; - record-size = <0x00 0x20000>; - console-size = <0x00 0x80000>; - ftrace-size = <0x00 0x00>; - pmsg-size = <0x00 0x00>; - memory-region = <0xbb>; - }; - - reserved-memory { - #address-cells = <0x02>; - #size-cells = <0x02>; - ranges; - - drm-logo@00000000 { - compatible = "rockchip,drm-logo"; - reg = <0x00 0x00 0x00 0x00>; - phandle = <0x11>; - }; - - region@110000 { - reg = <0x00 0x110000 0x00 0xf0000>; - reg-names = "ramoops_mem"; - phandle = <0xbb>; - }; - }; - - odroidgo3-keys { - compatible = "gpio-keys"; - #address-cells = <0x01>; - #size-cells = <0x00>; - autorepeat; - phandle = <0x14e>; - - button@0 { - label = "GPIO BTN-VOLUP"; - linux,code = <0x73>; - gpios = <0x66 0x00 0x01>; - }; - - button@1 { - label = "GPIO BTN-VOLDN"; - linux,code = <0x72>; - gpios = <0x66 0x01 0x01>; - }; - }; - - odroidgo3-joypad { - compatible = "odroidgo3-joypad"; - pwms = <0xbc 0x00 0x1312d00 0x00>; - pwm-names = "enable"; - motor-supply = <0x200>; - rumble-boost-weak = <0x00>; - rumble-boost-strong = <0x00>; - joypad-name = "GO-Super Gamepad"; - joypad-product = <0x1100>; - joypad-revision = <0x100>; - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <0xbd>; - io-channel-names = "amux_adc"; - io-channels = <0xbe 0x01>; - amux-count = <0x04>; - amux-a-gpios = <0x97 0x0b 0x01>; - amux-b-gpios = <0x97 0x08 0x01>; - amux-en-gpios = <0x97 0x0d 0x01>; - button-adc-scale = <0x02>; - button-adc-deadzone = <0x40>; - button-adc-fuzz = <0x20>; - button-adc-flat = <0x20>; - abs_x-p-tuning = <0xc8>; - abs_x-n-tuning = <0xc8>; - abs_y-p-tuning = <0xc8>; - abs_y-n-tuning = <0xc8>; - abs_rx-p-tuning = <0xc8>; - abs_rx-n-tuning = <0xc8>; - abs_ry-p-tuning = <0xc8>; - abs_ry-n-tuning = <0xc8>; - poll-interval = <0x0a>; - invert-absx; - invert-absy; - phandle = <0x14f>; - - sw1 { - gpios = <0xbf 0x0c 0x01>; - label = "GPIO DPAD-UP"; - linux,code = <0x220>; - }; - - sw2 { - gpios = <0xbf 0x0d 0x01>; - label = "GPIO DPAD-DOWN"; - linux,code = <0x221>; - }; - - sw3 { - gpios = <0xbf 0x0e 0x01>; - label = "GPIO DPAD-LEFT"; - linux,code = <0x222>; - }; - - sw4 { - gpios = <0xbf 0x0f 0x01>; - label = "GPIO DPAD-RIGHT"; - linux,code = <0x223>; - }; - - sw5 { - gpios = <0xbf 0x02 0x01>; - label = "GPIO KEY BTN-A"; - linux,code = <0x131>; - }; - - sw6 { - gpios = <0xbf 0x05 0x01>; - label = "GPIO BTN-B"; - linux,code = <0x130>; - }; - - sw7 { - gpios = <0xbf 0x06 0x01>; - label = "GPIO BTN-Y"; - linux,code = <0x134>; - }; - - sw8 { - gpios = <0xbf 0x07 0x01>; - label = "GPIO BTN-X"; - linux,code = <0x133>; - }; - - sw11 { - gpios = <0x66 0x02 0x01>; - label = "GPIO F3"; - linux,code = <0x2c2>; - }; - - sw12 { - gpios = <0x66 0x03 0x01>; - label = "GPIO F4"; - linux,code = <0x2c3>; - }; - - sw15 { - gpios = <0x66 0x06 0x01>; - label = "GPIO TOP-LEFT"; - linux,code = <0x136>; - }; - - sw16 { - gpios = <0x66 0x07 0x01>; - label = "GPIO TOP-RIGHT"; - linux,code = <0x137>; - }; - - sw19 { - gpios = <0x97 0x09 0x01>; - label = "GPIO F1"; - linux,code = <0x2c0>; - }; - - sw20 { - gpios = <0x97 0x0f 0x01>; - label = "GPIO TOP-RIGHT2"; - linux,code = <0x139>; - }; - - sw21 { - gpios = <0x97 0x0a 0x01>; - label = "GPIO TOP-LEFT2"; - linux,code = <0x138>; - }; - - sw22 { - gpios = <0x97 0x0c 0x01>; - label = "GPIO F2"; - linux,code = <0x2c1>; - }; - - sw13 { - gpios = <0x66 0x04 0x01>; - label = "GPIO F5"; - linux,code = <0x2c4>; - }; - }; - - gpio_leds { - compatible = "gpio-leds"; - pinctrl-names = "led_pins"; - pinctrl-0 = <0xc0>; - phandle = <0x150>; - - heartbeat { - label = "blue:heartbeat"; - gpios = <0x5c 0x11 0x00>; - linux,default-trigger = "heartbeat"; - }; - }; - - backlight { - compatible = "pwm-backlight"; - pwms = <0xc1 0x00 0xf519 0x00>; - brightness-levels = <0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f 0x20 0x21 0x22 0x23 0x24 0x25 0x26 0x27 0x28 0x29 0x2a 0x2b 0x2c 0x2d 0x2e 0x2f 0x30 0x31 0x32 0x33 0x34 0x35 0x36 0x37 0x38 0x39 0x3a 0x3b 0x3c 0x3d 0x3e 0x3f 0x40 0x41 0x42 0x43 0x44 0x45 0x46 0x47 0x48 0x49 0x4a 0x4b 0x4c 0x4d 0x4e 0x4f 0x50 0x51 0x52 0x53 0x54 0x55 0x56 0x57 0x58 0x59 0x5a 0x5b 0x5c 0x5d 0x5e 0x5f 0x60 0x61 0x62 0x63 0x64 0x65 0x66 0x67 0x68 0x69 0x6a 0x6b 0x6c 0x6d 0x6e 0x6f 0x70 0x71 0x72 0x73 0x74 0x75 0x76 0x77 0x78 0x79 0x7a 0x7b 0x7c 0x7d 0x7e 0x7f 0x80 0x81 0x82 0x83 0x84 0x85 0x86 0x87 0x88 0x89 0x8a 0x8b 0x8c 0x8d 0x8e 0x8f 0x90 0x91 0x92 0x93 0x94 0x95 0x96 0x97 0x98 0x99 0x9a 0x9b 0x9c 0x9d 0x9e 0x9f 0xa0>; - default-brightness-level = <0x33>; - phandle = <0x9d>; - }; - - rk817-sound { - compatible = "simple-audio-card"; - simple-audio-card,format = "i2s"; - simple-audio-card,name = "rockchip,rk817-codec"; - simple-audio-card,mclk-fs = <0x100>; - simple-audio-card,widgets = "Microphone\0Mic Jack\0Headphone\0Headphone Jack"; - simple-audio-card,routing = "MIC_IN\0Mic Jack\0Headphone Jack\0HPOL\0Headphone Jack\0HPOR"; - simple-audio-card,hp-det-gpio = <0x66 0x16 0x01>; - simple-audio-card,codec-hp-det = <0x01>; - - simple-audio-card,cpu { - sound-dai = <0xc2>; - }; - - simple-audio-card,codec { - sound-dai = <0xc3>; - }; - }; - - vccsys { - compatible = "regulator-fixed"; - regulator-name = "vcc3v8_sys"; - regulator-always-on; - regulator-min-microvolt = <0x39fbc0>; - regulator-max-microvolt = <0x39fbc0>; - phandle = <0x64>; - }; - - __symbols__ { - ddr_timing = "/ddr_timing"; - cpu0 = "/cpus/cpu@0"; - cpu1 = "/cpus/cpu@1"; - cpu2 = "/cpus/cpu@2"; - cpu3 = "/cpus/cpu@3"; - CPU_SLEEP = "/cpus/idle-states/cpu-sleep"; - CLUSTER_SLEEP = "/cpus/idle-states/cluster-sleep"; - cpu0_opp_table = "/cpu0-opp-table"; - bus_soc = "/bus-soc"; - bus_apll = "/bus-apll"; - bus_apll_opp_table = "/bus-apll-opp-table"; - display_subsystem = "/display-subsystem"; - route_lvds = "/display-subsystem/route/route-lvds"; - route_dsi = "/display-subsystem/route/route-dsi"; - route_rgb = "/display-subsystem/route/route-rgb"; - gmac_clkin = "/external-gmac-clock"; - rockchip_suspend = "/rockchip-suspend"; - xin24m = "/xin24m"; - xin32k = "/xin32k"; - pmu = "/power-management@ff000000"; - power = "/power-management@ff000000/power-controller"; - pmugrf = "/syscon@ff010000"; - pmu_io_domains = "/syscon@ff010000/io-domains"; - pmu_pvtm = "/syscon@ff010000/pmu-pvtm"; - uart0 = "/serial@ff030000"; - i2s0_8ch = "/i2s@ff060000"; - i2s1_2ch = "/i2s@ff070000"; - i2s2_2ch = "/i2s@ff080000"; - pdm = "/pdm@ff0a0000"; - crypto = "/crypto@ff0b0000"; - rng = "/rng@ff0b0000"; - gic = "/interrupt-controller@ff131000"; - grf = "/syscon@ff140000"; - io_domains = "/syscon@ff140000/io-domains"; - lvds = "/syscon@ff140000/lvds"; - lvds_in_vopb = "/syscon@ff140000/lvds/ports/port@0/endpoint@0"; - rgb = "/syscon@ff140000/rgb"; - rgb_in_vopb = "/syscon@ff140000/rgb/ports/port@0/endpoint@0"; - core_grf = "/syscon@ff148000"; - pvtm = "/syscon@ff148000/pvtm"; - uart1 = "/serial@ff158000"; - uart2 = "/serial@ff160000"; - uart3 = "/serial@ff168000"; - uart4 = "/serial@ff170000"; - uart5 = "/serial@ff178000"; - i2c0 = "/i2c@ff180000"; - rk817 = "/i2c@ff180000/pmic@20"; - pinctrl_rk8xx = "/i2c@ff180000/pmic@20/pinctrl_rk8xx"; - rk817_ts_gpio1 = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_ts_gpio1"; - rk817_gt_gpio2 = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_gt_gpio2"; - rk817_pin_ts = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_pin_ts"; - rk817_pin_gt = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_pin_gt"; - rk817_slppin_null = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_slppin_null"; - rk817_slppin_slp = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_slppin_slp"; - rk817_slppin_pwrdn = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_slppin_pwrdn"; - rk817_slppin_rst = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_slppin_rst"; - vdd_logic = "/i2c@ff180000/pmic@20/regulators/DCDC_REG1"; - vdd_arm = "/i2c@ff180000/pmic@20/regulators/DCDC_REG2"; - vcc_ddr = "/i2c@ff180000/pmic@20/regulators/DCDC_REG3"; - vcc_3v3 = "/i2c@ff180000/pmic@20/regulators/DCDC_REG4"; - vcc_1v0 = "/i2c@ff180000/pmic@20/regulators/LDO_REG1"; - vcc1v8_soc = "/i2c@ff180000/pmic@20/regulators/LDO_REG2"; - vdd1v0_soc = "/i2c@ff180000/pmic@20/regulators/LDO_REG3"; - vcc3v3_pmu = "/i2c@ff180000/pmic@20/regulators/LDO_REG4"; - vccio_sd = "/i2c@ff180000/pmic@20/regulators/LDO_REG5"; - vcc_sd = "/i2c@ff180000/pmic@20/regulators/LDO_REG6"; - vcc_backlight = "/i2c@ff180000/pmic@20/regulators/LDO_REG7"; - vcc_lcd = "/i2c@ff180000/pmic@20/regulators/LDO_REG8"; - dcdc_boost = "/i2c@ff180000/pmic@20/regulators/BOOST"; - otg_switch = "/i2c@ff180000/pmic@20/regulators/OTG_SWITCH"; - rk817_codec = "/i2c@ff180000/pmic@20/codec"; - i2c1 = "/i2c@ff190000"; - i2c2 = "/i2c@ff1a0000"; - i2c3 = "/i2c@ff1b0000"; - spi0 = "/spi@ff1d0000"; - spi1 = "/spi@ff1d8000"; - wdt = "/watchdog@ff1e0000"; - pwm0 = "/pwm@ff200000"; - pwm1 = "/pwm@ff200010"; - pwm2 = "/pwm@ff200020"; - pwm3 = "/pwm@ff200030"; - pwm4 = "/pwm@ff208000"; - pwm5 = "/pwm@ff208010"; - pwm6 = "/pwm@ff208020"; - pwm7 = "/pwm@ff208030"; - rktimer = "/rktimer@ff210000"; - dmac = "/amba/dmac@ff240000"; - thermal_zones = "/thermal-zones"; - soc_thermal = "/thermal-zones/soc-thermal"; - threshold = "/thermal-zones/soc-thermal/trips/trip-point-0"; - target = "/thermal-zones/soc-thermal/trips/trip-point-1"; - soc_crit = "/thermal-zones/soc-thermal/trips/soc-crit"; - gpu_thermal = "/thermal-zones/gpu-thermal"; - tsadc = "/tsadc@ff280000"; - saradc = "/saradc@ff288000"; - otp = "/otp@ff290000"; - otp_id = "/otp@ff290000/id@7"; - cpu_leakage = "/otp@ff290000/cpu-leakage@17"; - performance = "/otp@ff290000/performance@1e"; - cru = "/clock-controller@ff2b0000"; - cpu_boost = "/cpu-boost@ff2b8000"; - pmucru = "/pmu-clock-controller@ff2bc000"; - usb2phy_grf = "/syscon@ff2c0000"; - u2phy = "/syscon@ff2c0000/usb2-phy@100"; - u2phy_host = "/syscon@ff2c0000/usb2-phy@100/host-port"; - u2phy_otg = "/syscon@ff2c0000/usb2-phy@100/otg-port"; - video_phy = "/video-phy@ff2e0000"; - mipi_dphy_rx0 = "/mipi-dphy-rx0@ff2f0000"; - usb20_otg = "/usb@ff300000"; - usb_host0_ehci = "/usb@ff340000"; - usb_host0_ohci = "/usb@ff350000"; - gmac = "/ethernet@ff360000"; - sdmmc = "/dwmmc@ff370000"; - sdio = "/dwmmc@ff380000"; - emmc = "/dwmmc@ff390000"; - nandc0 = "/nandc@ff3b0000"; - sfc = "/sfc@ff3a0000"; - gpu = "/gpu@ff400000"; - gpu_opp_table = "/gpu-opp-table"; - hevc = "/hevc_service@ff440000"; - vpu = "/vpu_service@ff442000"; - vpu_combo = "/vpu_combo"; - hevc_mmu = "/iommu@ff440440"; - vpu_mmu = "/iommu@ff442800"; - dsi = "/dsi@ff450000"; - dsi_in_vopb = "/dsi@ff450000/ports/port@0/endpoint@0"; - timing0 = "/dsi@ff450000/panel@0/display-timings/60Hz"; - timing1 = "/dsi@ff450000/panel@0/display-timings/50Hz"; - timing2 = "/dsi@ff450000/panel@0/display-timings/75Hz"; - vopb = "/vop@ff460000"; - vopb_out = "/vop@ff460000/port"; - vopb_out_lvds = "/vop@ff460000/port/endpoint@0"; - vopb_out_dsi = "/vop@ff460000/port/endpoint@1"; - vopb_out_rgb = "/vop@ff460000/port/endpoint@2"; - vopb_mmu = "/iommu@ff460f00"; - rk_rga = "/rk_rga@ff480000"; - cif = "/cif@ff490000"; - cif_new = "/cif-new@ff490000"; - vip_mmu = "/iommu@ff490800"; - rk_isp = "/rk_isp@ff4a0000"; - rkisp1 = "/rkisp1@ff4a0000"; - isp_mmu = "/iommu@ff4a8000"; - qos_gmac = "/qos@ff518000"; - qos_gpu = "/qos@ff520000"; - qos_sdmmc = "/qos@ff52c000"; - qos_emmc = "/qos@ff538000"; - qos_nand = "/qos@ff538080"; - qos_sdio = "/qos@ff538100"; - qos_sfc = "/qos@ff538180"; - qos_usb_host = "/qos@ff540000"; - qos_usb_otg = "/qos@ff540080"; - qos_isp_128 = "/qos@ff548000"; - qos_isp_rd = "/qos@ff548080"; - qos_isp_wr = "/qos@ff548100"; - qos_isp_m1 = "/qos@ff548180"; - qos_vip = "/qos@ff548200"; - qos_rga_rd = "/qos@ff550000"; - qos_rga_wr = "/qos@ff550080"; - qos_vop_m0 = "/qos@ff550100"; - qos_vop_m1 = "/qos@ff550180"; - qos_vpu = "/qos@ff558000"; - qos_vpu_r128 = "/qos@ff558080"; - dfi = "/dfi@ff610000"; - dmc = "/dmc"; - ddr_power_model = "/dmc/ddr_power_model"; - dmc_opp_table = "/dmc-opp-table"; - rockchip_system_monitor = "/rockchip-system-monitor"; - pinctrl = "/pinctrl"; - gpio0 = "/pinctrl/gpio0@ff040000"; - gpio1 = "/pinctrl/gpio1@ff250000"; - gpio2 = "/pinctrl/gpio2@ff260000"; - gpio3 = "/pinctrl/gpio3@ff270000"; - pcfg_pull_up = "/pinctrl/pcfg-pull-up"; - pcfg_pull_down = "/pinctrl/pcfg-pull-down"; - pcfg_pull_none = "/pinctrl/pcfg-pull-none"; - pcfg_pull_none_2ma = "/pinctrl/pcfg-pull-none-2ma"; - pcfg_pull_up_2ma = "/pinctrl/pcfg-pull-up-2ma"; - pcfg_pull_up_4ma = "/pinctrl/pcfg-pull-up-4ma"; - pcfg_pull_none_4ma = "/pinctrl/pcfg-pull-none-4ma"; - pcfg_pull_down_4ma = "/pinctrl/pcfg-pull-down-4ma"; - pcfg_pull_none_8ma = "/pinctrl/pcfg-pull-none-8ma"; - pcfg_pull_up_8ma = "/pinctrl/pcfg-pull-up-8ma"; - pcfg_pull_none_12ma = "/pinctrl/pcfg-pull-none-12ma"; - pcfg_pull_up_12ma = "/pinctrl/pcfg-pull-up-12ma"; - pcfg_pull_none_smt = "/pinctrl/pcfg-pull-none-smt"; - pcfg_output_high = "/pinctrl/pcfg-output-high"; - pcfg_output_low = "/pinctrl/pcfg-output-low"; - pcfg_input_high = "/pinctrl/pcfg-input-high"; - pcfg_input = "/pinctrl/pcfg-input"; - i2c0_xfer = "/pinctrl/i2c0/i2c0-xfer"; - i2c1_xfer = "/pinctrl/i2c1/i2c1-xfer"; - i2c2_xfer = "/pinctrl/i2c2/i2c2-xfer"; - i2c3_xfer = "/pinctrl/i2c3/i2c3-xfer"; - tsadc_otp_gpio = "/pinctrl/tsadc/tsadc-otp-gpio"; - tsadc_otp_out = "/pinctrl/tsadc/tsadc-otp-out"; - uart0_xfer = "/pinctrl/uart0/uart0-xfer"; - uart0_cts = "/pinctrl/uart0/uart0-cts"; - uart0_rts = "/pinctrl/uart0/uart0-rts"; - uart0_rts_gpio = "/pinctrl/uart0/uart0-rts-gpio"; - uart1_xfer = "/pinctrl/uart1/uart1-xfer"; - uart1_cts = "/pinctrl/uart1/uart1-cts"; - uart1_rts = "/pinctrl/uart1/uart1-rts"; - uart1_rts_gpio = "/pinctrl/uart1/uart1-rts-gpio"; - uart2m0_xfer = "/pinctrl/uart2-m0/uart2m0-xfer"; - uart2m1_xfer = "/pinctrl/uart2-m1/uart2m1-xfer"; - uart3m0_xfer = "/pinctrl/uart3-m0/uart3m0-xfer"; - uart3m0_cts = "/pinctrl/uart3-m0/uart3m0-cts"; - uart3m0_rts = "/pinctrl/uart3-m0/uart3m0-rts"; - uart3m0_rts_gpio = "/pinctrl/uart3-m0/uart3m0-rts-gpio"; - uart3m1_xfer = "/pinctrl/uart3-m1/uart3m1-xfer"; - uart3m1_cts = "/pinctrl/uart3-m1/uart3m1-cts"; - uart3m1_rts = "/pinctrl/uart3-m1/uart3m1-rts"; - uart3m1_rts_gpio = "/pinctrl/uart3-m1/uart3m1-rts-gpio"; - uart4_xfer = "/pinctrl/uart4/uart4-xfer"; - uart4_cts = "/pinctrl/uart4/uart4-cts"; - uart4_rts = "/pinctrl/uart4/uart4-rts"; - uart5_xfer = "/pinctrl/uart5/uart5-xfer"; - uart5_cts = "/pinctrl/uart5/uart5-cts"; - uart5_rts = "/pinctrl/uart5/uart5-rts"; - spi0_clk = "/pinctrl/spi0/spi0-clk"; - spi0_csn = "/pinctrl/spi0/spi0-csn"; - spi0_miso = "/pinctrl/spi0/spi0-miso"; - spi0_mosi = "/pinctrl/spi0/spi0-mosi"; - spi0_clk_hs = "/pinctrl/spi0/spi0-clk-hs"; - spi0_miso_hs = "/pinctrl/spi0/spi0-miso-hs"; - spi0_mosi_hs = "/pinctrl/spi0/spi0-mosi-hs"; - spi1_clk = "/pinctrl/spi1/spi1-clk"; - spi1_csn0 = "/pinctrl/spi1/spi1-csn0"; - spi1_csn1 = "/pinctrl/spi1/spi1-csn1"; - spi1_miso = "/pinctrl/spi1/spi1-miso"; - spi1_mosi = "/pinctrl/spi1/spi1-mosi"; - spi1_clk_hs = "/pinctrl/spi1/spi1-clk-hs"; - spi1_miso_hs = "/pinctrl/spi1/spi1-miso-hs"; - spi1_mosi_hs = "/pinctrl/spi1/spi1-mosi-hs"; - pdm_clk0m0 = "/pinctrl/pdm/pdm-clk0m0"; - pdm_clk0m1 = "/pinctrl/pdm/pdm-clk0m1"; - pdm_clk1 = "/pinctrl/pdm/pdm-clk1"; - pdm_sdi0m0 = "/pinctrl/pdm/pdm-sdi0m0"; - pdm_sdi0m1 = "/pinctrl/pdm/pdm-sdi0m1"; - pdm_sdi1 = "/pinctrl/pdm/pdm-sdi1"; - pdm_sdi2 = "/pinctrl/pdm/pdm-sdi2"; - pdm_sdi3 = "/pinctrl/pdm/pdm-sdi3"; - pdm_clk0m0_sleep = "/pinctrl/pdm/pdm-clk0m0-sleep"; - pdm_clk0m_sleep1 = "/pinctrl/pdm/pdm-clk0m1-sleep"; - pdm_clk1_sleep = "/pinctrl/pdm/pdm-clk1-sleep"; - pdm_sdi0m0_sleep = "/pinctrl/pdm/pdm-sdi0m0-sleep"; - pdm_sdi0m1_sleep = "/pinctrl/pdm/pdm-sdi0m1-sleep"; - pdm_sdi1_sleep = "/pinctrl/pdm/pdm-sdi1-sleep"; - pdm_sdi2_sleep = "/pinctrl/pdm/pdm-sdi2-sleep"; - pdm_sdi3_sleep = "/pinctrl/pdm/pdm-sdi3-sleep"; - i2s0_8ch_mclk = "/pinctrl/i2s0/i2s0-8ch-mclk"; - i2s0_8ch_sclktx = "/pinctrl/i2s0/i2s0-8ch-sclktx"; - i2s0_8ch_sclkrx = "/pinctrl/i2s0/i2s0-8ch-sclkrx"; - i2s0_8ch_lrcktx = "/pinctrl/i2s0/i2s0-8ch-lrcktx"; - i2s0_8ch_lrckrx = "/pinctrl/i2s0/i2s0-8ch-lrckrx"; - i2s0_8ch_sdo0 = "/pinctrl/i2s0/i2s0-8ch-sdo0"; - i2s0_8ch_sdo1 = "/pinctrl/i2s0/i2s0-8ch-sdo1"; - i2s0_8ch_sdo2 = "/pinctrl/i2s0/i2s0-8ch-sdo2"; - i2s0_8ch_sdo3 = "/pinctrl/i2s0/i2s0-8ch-sdo3"; - i2s0_8ch_sdi0 = "/pinctrl/i2s0/i2s0-8ch-sdi0"; - i2s0_8ch_sdi1 = "/pinctrl/i2s0/i2s0-8ch-sdi1"; - i2s0_8ch_sdi2 = "/pinctrl/i2s0/i2s0-8ch-sdi2"; - i2s0_8ch_sdi3 = "/pinctrl/i2s0/i2s0-8ch-sdi3"; - i2s1_2ch_mclk = "/pinctrl/i2s1/i2s1-2ch-mclk"; - i2s1_2ch_sclk = "/pinctrl/i2s1/i2s1-2ch-sclk"; - i2s1_2ch_lrck = "/pinctrl/i2s1/i2s1-2ch-lrck"; - i2s1_2ch_sdi = "/pinctrl/i2s1/i2s1-2ch-sdi"; - i2s1_2ch_sdo = "/pinctrl/i2s1/i2s1-2ch-sdo"; - i2s2_2ch_mclk = "/pinctrl/i2s2/i2s2-2ch-mclk"; - i2s2_2ch_sclk = "/pinctrl/i2s2/i2s2-2ch-sclk"; - i2s2_2ch_lrck = "/pinctrl/i2s2/i2s2-2ch-lrck"; - i2s2_2ch_sdi = "/pinctrl/i2s2/i2s2-2ch-sdi"; - i2s2_2ch_sdo = "/pinctrl/i2s2/i2s2-2ch-sdo"; - sdmmc_clk = "/pinctrl/sdmmc/sdmmc-clk"; - sdmmc_cmd = "/pinctrl/sdmmc/sdmmc-cmd"; - sdmmc_det = "/pinctrl/sdmmc/sdmmc-det"; - sdmmc_bus1 = "/pinctrl/sdmmc/sdmmc-bus1"; - sdmmc_bus4 = "/pinctrl/sdmmc/sdmmc-bus4"; - sdmmc_gpio = "/pinctrl/sdmmc/sdmmc-gpio"; - sdio_clk = "/pinctrl/sdio/sdio-clk"; - sdio_cmd = "/pinctrl/sdio/sdio-cmd"; - sdio_bus4 = "/pinctrl/sdio/sdio-bus4"; - sdio_gpio = "/pinctrl/sdio/sdio-gpio"; - emmc_clk = "/pinctrl/emmc/emmc-clk"; - emmc_cmd = "/pinctrl/emmc/emmc-cmd"; - emmc_pwren = "/pinctrl/emmc/emmc-pwren"; - emmc_rstnout = "/pinctrl/emmc/emmc-rstnout"; - emmc_bus1 = "/pinctrl/emmc/emmc-bus1"; - emmc_bus4 = "/pinctrl/emmc/emmc-bus4"; - emmc_bus8 = "/pinctrl/emmc/emmc-bus8"; - flash_cs0 = "/pinctrl/flash/flash-cs0"; - flash_rdy = "/pinctrl/flash/flash-rdy"; - flash_dqs = "/pinctrl/flash/flash-dqs"; - flash_ale = "/pinctrl/flash/flash-ale"; - flash_cle = "/pinctrl/flash/flash-cle"; - flash_wrn = "/pinctrl/flash/flash-wrn"; - flash_csl = "/pinctrl/flash/flash-csl"; - flash_rdn = "/pinctrl/flash/flash-rdn"; - flash_bus8 = "/pinctrl/flash/flash-bus8"; - lcdc_m0_rgb_pins = "/pinctrl/lcdc/lcdc-m0-rgb-pins"; - lcdc_m0_sleep_pins = "/pinctrl/lcdc/lcdc-m0-sleep-pins"; - lcdc_m1_rgb_pins = "/pinctrl/lcdc/lcdc-m1-rgb-pins"; - lcdc_m1_sleep_pins = "/pinctrl/lcdc/lcdc-m1-sleep-pins"; - pwm0_pin = "/pinctrl/pwm0/pwm0-pin"; - pwm1_pin = "/pinctrl/pwm1/pwm1-pin"; - pwm2_pin = "/pinctrl/pwm2/pwm2-pin"; - pwm3_pin = "/pinctrl/pwm3/pwm3-pin"; - pwm4_pin = "/pinctrl/pwm4/pwm4-pin"; - pwm5_pin = "/pinctrl/pwm5/pwm5-pin"; - pwm6_pin = "/pinctrl/pwm6/pwm6-pin"; - pwm7_pin = "/pinctrl/pwm7/pwm7-pin"; - rmii_pins = "/pinctrl/gmac/rmii-pins"; - mac_refclk_12ma = "/pinctrl/gmac/mac-refclk-12ma"; - mac_refclk = "/pinctrl/gmac/mac-refclk"; - cif_clkout_m0 = "/pinctrl/cif-m0/cif-clkout-m0"; - dvp_d2d9_m0 = "/pinctrl/cif-m0/dvp-d2d9-m0"; - dvp_d0d1_m0 = "/pinctrl/cif-m0/dvp-d0d1-m0"; - dvp_d10d11_m0 = "/pinctrl/cif-m0/d10-d11-m0"; - cif_clkout_m1 = "/pinctrl/cif-m1/cif-clkout-m1"; - dvp_d2d9_m1 = "/pinctrl/cif-m1/dvp-d2d9-m1"; - dvp_d0d1_m1 = "/pinctrl/cif-m1/dvp-d0d1-m1"; - dvp_d10d11_m1 = "/pinctrl/cif-m1/d10-d11-m1"; - isp_prelight = "/pinctrl/isp/isp-prelight"; - pmic_int = "/pinctrl/pmic/pmic_int"; - soc_slppin_gpio = "/pinctrl/pmic/soc_slppin_gpio"; - soc_slppin_slp = "/pinctrl/pmic/soc_slppin_slp"; - soc_slppin_rst = "/pinctrl/pmic/soc_slppin_rst"; - led_pins = "/pinctrl/leds/led-pins"; - btn_pins = "/pinctrl/btns/btn-pins"; - drm_logo = "/reserved-memory/drm-logo@00000000"; - ramoops_mem = "/reserved-memory/region@110000"; - gpio_keys = "/odroidgo3-keys"; - joypad = "/odroidgo3-joypad"; - leds = "/gpio_leds"; - backlight = "/backlight"; - vccsys = "/vccsys"; - }; -}; diff --git a/config/archr-dts/R36S-DTB/DTS/R36S-Plus.dts b/config/archr-dts/R36S-DTB/DTS/R36S-Plus.dts deleted file mode 100644 index a6a3d3e9d2..0000000000 --- a/config/archr-dts/R36S-DTB/DTS/R36S-Plus.dts +++ /dev/null @@ -1,4018 +0,0 @@ -/dts-v1/; - -/ { - compatible = "rockchip,rk3326-odroidgo3-linux\0rockchip,rk3326"; - interrupt-parent = <0x01>; - #address-cells = <0x02>; - #size-cells = <0x02>; - model = "Hardkernel ODROID-GO3"; - - ddr_timing { - compatible = "rockchip,ddr-timing"; - ddr2_speed_bin = <0x00>; - ddr3_speed_bin = <0x15>; - ddr4_speed_bin = <0x0c>; - pd_idle = <0x0d>; - sr_idle = <0x5d>; - sr_mc_gate_idle = <0x00>; - srpd_lite_idle = <0x00>; - standby_idle = <0x00>; - auto_pd_dis_freq = <0x42a>; - auto_sr_dis_freq = <0x320>; - ddr2_dll_dis_freq = <0x12c>; - ddr3_dll_dis_freq = <0x12c>; - ddr4_dll_dis_freq = <0x271>; - phy_dll_dis_freq = <0x190>; - ddr2_odt_dis_freq = <0x64>; - phy_ddr2_odt_dis_freq = <0x64>; - ddr2_drv = <0x01>; - ddr2_odt = <0x96>; - phy_ddr2_ca_drv = <0x15>; - phy_ddr2_ck_drv = <0x12>; - phy_ddr2_dq_drv = <0x15>; - phy_ddr2_odt = <0x02>; - ddr3_odt_dis_freq = <0x190>; - phy_ddr3_odt_dis_freq = <0x190>; - ddr3_drv = <0x28>; - ddr3_odt = <0x78>; - phy_ddr3_ca_drv = <0x15>; - phy_ddr3_ck_drv = <0x12>; - phy_ddr3_dq_drv = <0x15>; - phy_ddr3_odt = <0x02>; - phy_lpddr2_odt_dis_freq = <0x29a>; - lpddr2_drv = <0x28>; - phy_lpddr2_ca_drv = <0x16>; - phy_lpddr2_ck_drv = <0x13>; - phy_lpddr2_dq_drv = <0x16>; - phy_lpddr2_odt = <0x00>; - lpddr3_odt_dis_freq = <0x190>; - phy_lpddr3_odt_dis_freq = <0x190>; - lpddr3_drv = <0x28>; - lpddr3_odt = <0xf0>; - phy_lpddr3_ca_drv = <0x16>; - phy_lpddr3_ck_drv = <0x13>; - phy_lpddr3_dq_drv = <0x16>; - phy_lpddr3_odt = <0x02>; - lpddr4_odt_dis_freq = <0x320>; - phy_lpddr4_odt_dis_freq = <0x320>; - lpddr4_drv = <0x3c>; - lpddr4_dq_odt = <0x28>; - lpddr4_ca_odt = <0x28>; - phy_lpddr4_ca_drv = <0x14>; - phy_lpddr4_ck_cs_drv = <0x06>; - phy_lpddr4_dq_drv = <0x06>; - phy_lpddr4_odt = <0x10>; - ddr4_odt_dis_freq = <0x29a>; - phy_ddr4_odt_dis_freq = <0x29a>; - ddr4_drv = <0x22>; - ddr4_odt = <0xf0>; - phy_ddr4_ca_drv = <0x16>; - phy_ddr4_ck_drv = <0x13>; - phy_ddr4_dq_drv = <0x16>; - phy_ddr4_odt = <0x02>; - ddr3a1_ddr4a9_de-skew = <0x06>; - ddr3a0_ddr4a10_de-skew = <0x07>; - ddr3a3_ddr4a6_de-skew = <0x07>; - ddr3a2_ddr4a4_de-skew = <0x07>; - ddr3a5_ddr4a8_de-skew = <0x07>; - ddr3a4_ddr4a5_de-skew = <0x07>; - ddr3a7_ddr4a11_de-skew = <0x07>; - ddr3a6_ddr4a7_de-skew = <0x06>; - ddr3a9_ddr4a0_de-skew = <0x07>; - ddr3a8_ddr4a13_de-skew = <0x07>; - ddr3a11_ddr4a3_de-skew = <0x07>; - ddr3a10_ddr4cs0_de-skew = <0x07>; - ddr3a13_ddr4a2_de-skew = <0x07>; - ddr3a12_ddr4ba1_de-skew = <0x07>; - ddr3a15_ddr4odt0_de-skew = <0x07>; - ddr3a14_ddr4a1_de-skew = <0x07>; - ddr3ba1_ddr4a15_de-skew = <0x07>; - ddr3ba0_ddr4bg0_de-skew = <0x07>; - ddr3ras_ddr4cke_de-skew = <0x07>; - ddr3ba2_ddr4ba0_de-skew = <0x07>; - ddr3we_ddr4bg1_de-skew = <0x07>; - ddr3cas_ddr4a12_de-skew = <0x07>; - ddr3ckn_ddr4ckn_de-skew = <0x07>; - ddr3ckp_ddr4ckp_de-skew = <0x07>; - ddr3cke_ddr4a16_de-skew = <0x07>; - ddr3odt0_ddr4a14_de-skew = <0x07>; - ddr3cs0_ddr4act_de-skew = <0x06>; - ddr3reset_ddr4reset_de-skew = <0x07>; - ddr3cs1_ddr4cs1_de-skew = <0x06>; - ddr3odt1_ddr4odt1_de-skew = <0x07>; - cs0_dm0_rx_de-skew = <0x07>; - cs0_dm0_tx_de-skew = <0x07>; - cs0_dq0_rx_de-skew = <0x08>; - cs0_dq0_tx_de-skew = <0x08>; - cs0_dq1_rx_de-skew = <0x09>; - cs0_dq1_tx_de-skew = <0x08>; - cs0_dq2_rx_de-skew = <0x08>; - cs0_dq2_tx_de-skew = <0x08>; - cs0_dq3_rx_de-skew = <0x08>; - cs0_dq3_tx_de-skew = <0x08>; - cs0_dq4_rx_de-skew = <0x09>; - cs0_dq4_tx_de-skew = <0x08>; - cs0_dq5_rx_de-skew = <0x09>; - cs0_dq5_tx_de-skew = <0x08>; - cs0_dq6_rx_de-skew = <0x09>; - cs0_dq6_tx_de-skew = <0x08>; - cs0_dq7_rx_de-skew = <0x08>; - cs0_dq7_tx_de-skew = <0x08>; - cs0_dqs0_rx_de-skew = <0x06>; - cs0_dqs0p_tx_de-skew = <0x09>; - cs0_dqs0n_tx_de-skew = <0x09>; - cs0_dm1_rx_de-skew = <0x07>; - cs0_dm1_tx_de-skew = <0x06>; - cs0_dq8_rx_de-skew = <0x08>; - cs0_dq8_tx_de-skew = <0x07>; - cs0_dq9_rx_de-skew = <0x09>; - cs0_dq9_tx_de-skew = <0x07>; - cs0_dq10_rx_de-skew = <0x08>; - cs0_dq10_tx_de-skew = <0x08>; - cs0_dq11_rx_de-skew = <0x08>; - cs0_dq11_tx_de-skew = <0x07>; - cs0_dq12_rx_de-skew = <0x08>; - cs0_dq12_tx_de-skew = <0x08>; - cs0_dq13_rx_de-skew = <0x09>; - cs0_dq13_tx_de-skew = <0x07>; - cs0_dq14_rx_de-skew = <0x09>; - cs0_dq14_tx_de-skew = <0x08>; - cs0_dq15_rx_de-skew = <0x09>; - cs0_dq15_tx_de-skew = <0x07>; - cs0_dqs1_rx_de-skew = <0x07>; - cs0_dqs1p_tx_de-skew = <0x09>; - cs0_dqs1n_tx_de-skew = <0x09>; - cs0_dm2_rx_de-skew = <0x07>; - cs0_dm2_tx_de-skew = <0x07>; - cs0_dq16_rx_de-skew = <0x09>; - cs0_dq16_tx_de-skew = <0x09>; - cs0_dq17_rx_de-skew = <0x07>; - cs0_dq17_tx_de-skew = <0x09>; - cs0_dq18_rx_de-skew = <0x07>; - cs0_dq18_tx_de-skew = <0x08>; - cs0_dq19_rx_de-skew = <0x07>; - cs0_dq19_tx_de-skew = <0x09>; - cs0_dq20_rx_de-skew = <0x09>; - cs0_dq20_tx_de-skew = <0x09>; - cs0_dq21_rx_de-skew = <0x09>; - cs0_dq21_tx_de-skew = <0x09>; - cs0_dq22_rx_de-skew = <0x08>; - cs0_dq22_tx_de-skew = <0x09>; - cs0_dq23_rx_de-skew = <0x08>; - cs0_dq23_tx_de-skew = <0x09>; - cs0_dqs2_rx_de-skew = <0x06>; - cs0_dqs2p_tx_de-skew = <0x09>; - cs0_dqs2n_tx_de-skew = <0x09>; - cs0_dm3_rx_de-skew = <0x07>; - cs0_dm3_tx_de-skew = <0x07>; - cs0_dq24_rx_de-skew = <0x08>; - cs0_dq24_tx_de-skew = <0x08>; - cs0_dq25_rx_de-skew = <0x09>; - cs0_dq25_tx_de-skew = <0x09>; - cs0_dq26_rx_de-skew = <0x09>; - cs0_dq26_tx_de-skew = <0x08>; - cs0_dq27_rx_de-skew = <0x09>; - cs0_dq27_tx_de-skew = <0x08>; - cs0_dq28_rx_de-skew = <0x09>; - cs0_dq28_tx_de-skew = <0x09>; - cs0_dq29_rx_de-skew = <0x09>; - cs0_dq29_tx_de-skew = <0x09>; - cs0_dq30_rx_de-skew = <0x08>; - cs0_dq30_tx_de-skew = <0x08>; - cs0_dq31_rx_de-skew = <0x08>; - cs0_dq31_tx_de-skew = <0x08>; - cs0_dqs3_rx_de-skew = <0x07>; - cs0_dqs3p_tx_de-skew = <0x09>; - cs0_dqs3n_tx_de-skew = <0x09>; - cs1_dm0_rx_de-skew = <0x07>; - cs1_dm0_tx_de-skew = <0x07>; - cs1_dq0_rx_de-skew = <0x08>; - cs1_dq0_tx_de-skew = <0x08>; - cs1_dq1_rx_de-skew = <0x09>; - cs1_dq1_tx_de-skew = <0x08>; - cs1_dq2_rx_de-skew = <0x08>; - cs1_dq2_tx_de-skew = <0x08>; - cs1_dq3_rx_de-skew = <0x08>; - cs1_dq3_tx_de-skew = <0x08>; - cs1_dq4_rx_de-skew = <0x08>; - cs1_dq4_tx_de-skew = <0x08>; - cs1_dq5_rx_de-skew = <0x09>; - cs1_dq5_tx_de-skew = <0x08>; - cs1_dq6_rx_de-skew = <0x09>; - cs1_dq6_tx_de-skew = <0x08>; - cs1_dq7_rx_de-skew = <0x08>; - cs1_dq7_tx_de-skew = <0x08>; - cs1_dqs0_rx_de-skew = <0x06>; - cs1_dqs0p_tx_de-skew = <0x09>; - cs1_dqs0n_tx_de-skew = <0x09>; - cs1_dm1_rx_de-skew = <0x07>; - cs1_dm1_tx_de-skew = <0x07>; - cs1_dq8_rx_de-skew = <0x08>; - cs1_dq8_tx_de-skew = <0x08>; - cs1_dq9_rx_de-skew = <0x08>; - cs1_dq9_tx_de-skew = <0x07>; - cs1_dq10_rx_de-skew = <0x07>; - cs1_dq10_tx_de-skew = <0x08>; - cs1_dq11_rx_de-skew = <0x08>; - cs1_dq11_tx_de-skew = <0x08>; - cs1_dq12_rx_de-skew = <0x08>; - cs1_dq12_tx_de-skew = <0x07>; - cs1_dq13_rx_de-skew = <0x08>; - cs1_dq13_tx_de-skew = <0x08>; - cs1_dq14_rx_de-skew = <0x08>; - cs1_dq14_tx_de-skew = <0x08>; - cs1_dq15_rx_de-skew = <0x08>; - cs1_dq15_tx_de-skew = <0x07>; - cs1_dqs1_rx_de-skew = <0x07>; - cs1_dqs1p_tx_de-skew = <0x09>; - cs1_dqs1n_tx_de-skew = <0x09>; - cs1_dm2_rx_de-skew = <0x07>; - cs1_dm2_tx_de-skew = <0x08>; - cs1_dq16_rx_de-skew = <0x08>; - cs1_dq16_tx_de-skew = <0x09>; - cs1_dq17_rx_de-skew = <0x08>; - cs1_dq17_tx_de-skew = <0x09>; - cs1_dq18_rx_de-skew = <0x07>; - cs1_dq18_tx_de-skew = <0x08>; - cs1_dq19_rx_de-skew = <0x08>; - cs1_dq19_tx_de-skew = <0x09>; - cs1_dq20_rx_de-skew = <0x09>; - cs1_dq20_tx_de-skew = <0x09>; - cs1_dq21_rx_de-skew = <0x09>; - cs1_dq21_tx_de-skew = <0x09>; - cs1_dq22_rx_de-skew = <0x08>; - cs1_dq22_tx_de-skew = <0x09>; - cs1_dq23_rx_de-skew = <0x08>; - cs1_dq23_tx_de-skew = <0x09>; - cs1_dqs2_rx_de-skew = <0x06>; - cs1_dqs2p_tx_de-skew = <0x09>; - cs1_dqs2n_tx_de-skew = <0x09>; - cs1_dm3_rx_de-skew = <0x07>; - cs1_dm3_tx_de-skew = <0x07>; - cs1_dq24_rx_de-skew = <0x08>; - cs1_dq24_tx_de-skew = <0x09>; - cs1_dq25_rx_de-skew = <0x09>; - cs1_dq25_tx_de-skew = <0x09>; - cs1_dq26_rx_de-skew = <0x09>; - cs1_dq26_tx_de-skew = <0x08>; - cs1_dq27_rx_de-skew = <0x08>; - cs1_dq27_tx_de-skew = <0x08>; - cs1_dq28_rx_de-skew = <0x09>; - cs1_dq28_tx_de-skew = <0x09>; - cs1_dq29_rx_de-skew = <0x09>; - cs1_dq29_tx_de-skew = <0x09>; - cs1_dq30_rx_de-skew = <0x09>; - cs1_dq30_tx_de-skew = <0x08>; - cs1_dq31_rx_de-skew = <0x08>; - cs1_dq31_tx_de-skew = <0x08>; - cs1_dqs3_rx_de-skew = <0x07>; - cs1_dqs3p_tx_de-skew = <0x09>; - cs1_dqs3n_tx_de-skew = <0x09>; - phandle = <0xaf>; - }; - - aliases { - ethernet0 = "/ethernet@ff360000"; - i2c0 = "/i2c@ff180000"; - i2c1 = "/i2c@ff190000"; - i2c2 = "/i2c@ff1a0000"; - i2c3 = "/i2c@ff1b0000"; - serial0 = "/serial@ff030000"; - serial1 = "/serial@ff158000"; - serial2 = "/serial@ff160000"; - serial3 = "/serial@ff168000"; - serial4 = "/serial@ff170000"; - serial5 = "/serial@ff178000"; - spi0 = "/spi@ff1d0000"; - spi1 = "/spi@ff1d8000"; - }; - - cpus { - #address-cells = <0x02>; - #size-cells = <0x00>; - - cpu@0 { - device_type = "cpu"; - compatible = "arm,cortex-a35\0arm,armv8"; - reg = <0x00 0x00>; - enable-method = "psci"; - clocks = <0x02 0x07>; - #cooling-cells = <0x02>; - dynamic-power-coefficient = <0x5a>; - operating-points-v2 = <0x03>; - cpu-idle-states = <0x04 0x05>; - cpu-supply = <0x06>; - phandle = <0x09>; - }; - - cpu@1 { - device_type = "cpu"; - compatible = "arm,cortex-a35\0arm,armv8"; - reg = <0x00 0x01>; - enable-method = "psci"; - operating-points-v2 = <0x03>; - cpu-idle-states = <0x04 0x05>; - phandle = <0x0a>; - }; - - cpu@2 { - device_type = "cpu"; - compatible = "arm,cortex-a35\0arm,armv8"; - reg = <0x00 0x02>; - enable-method = "psci"; - operating-points-v2 = <0x03>; - cpu-idle-states = <0x04 0x05>; - phandle = <0x0b>; - }; - - cpu@3 { - device_type = "cpu"; - compatible = "arm,cortex-a35\0arm,armv8"; - reg = <0x00 0x03>; - enable-method = "psci"; - operating-points-v2 = <0x03>; - cpu-idle-states = <0x04 0x05>; - phandle = <0x0c>; - }; - - idle-states { - entry-method = "psci"; - - cpu-sleep { - compatible = "arm,idle-state"; - local-timer-stop; - arm,psci-suspend-param = <0x10000>; - entry-latency-us = <0x78>; - exit-latency-us = <0xfa>; - min-residency-us = <0x384>; - phandle = <0x04>; - }; - - cluster-sleep { - compatible = "arm,idle-state"; - local-timer-stop; - arm,psci-suspend-param = <0x1010000>; - entry-latency-us = <0x190>; - exit-latency-us = <0x1f4>; - min-residency-us = <0x7d0>; - phandle = <0x05>; - }; - }; - }; - - cpu0-opp-table { - compatible = "operating-points-v2"; - opp-shared; - rockchip,temp-hysteresis = <0x1388>; - rockchip,low-temp = <0x00>; - rockchip,low-temp-min-volt = <0xf4240>; - rockchip,low-temp-adjust-volt = <0x00 0x5e8 0xc350>; - clocks = <0x02 0x01>; - rockchip,avs-scale = <0x04>; - rockchip,max-volt = <0x149970>; - rockchip,evb-irdrop = <0x61a8>; - nvmem-cells = <0x07 0x08>; - nvmem-cell-names = "cpu_leakage\0performance"; - rockchip,bin-scaling-sel = <0x00 0x0d 0x01 0x0d>; - rockchip,pvtm-voltage-sel = <0x00 0xc350 0x00 0xc351 0xd2f0 0x01 0xd2f1 0xea60 0x02 0xea61 0x1869f 0x03>; - rockchip,pvtm-freq = <0x639c0>; - rockchip,pvtm-volt = <0xf4240>; - rockchip,pvtm-ch = <0x00 0x00>; - rockchip,pvtm-sample-time = <0x3e8>; - rockchip,pvtm-number = <0x0a>; - rockchip,pvtm-error = <0x3e8>; - rockchip,pvtm-ref-temp = <0x28>; - rockchip,pvtm-temp-prop = <0xffffffc8 0xffffffc8>; - rockchip,thermal-zone = "soc-thermal"; - rockchip,avs = <0x01>; - phandle = <0x03>; - - opp-1008000000 { - opp-hz = <0x00 0x3c14dc00>; - opp-microvolt = <0x11edd8 0x11edd8 0x149970>; - opp-microvolt-L0 = <0x11edd8 0x11edd8 0x149970>; - opp-microvolt-L1 = <0x112a88 0x112a88 0x149970>; - opp-microvolt-L2 = <0x112a88 0x112a88 0x149970>; - opp-microvolt-L3 = <0x100590 0x100590 0x149970>; - clock-latency-ns = <0x9c40>; - }; - - opp-1200000000 { - opp-hz = <0x00 0x47868c00>; - opp-microvolt = <0x13d620 0x13d620 0x149970>; - opp-microvolt-L0 = <0x13d620 0x13d620 0x149970>; - opp-microvolt-L1 = <0x137478 0x137478 0x149970>; - opp-microvolt-L2 = <0x1312d0 0x1312d0 0x149970>; - opp-microvolt-L3 = <0x124f80 0x124f80 0x149970>; - clock-latency-ns = <0x9c40>; - }; - - opp-1248000000 { - opp-hz = <0x00 0x4a62f800>; - opp-microvolt = <0x149970 0x149970 0x149970>; - opp-microvolt-L0 = <0x149970 0x149970 0x149970>; - opp-microvolt-L1 = <0x13d620 0x13d620 0x149970>; - opp-microvolt-L2 = <0x137478 0x137478 0x149970>; - opp-microvolt-L3 = <0x12b128 0x12b128 0x149970>; - clock-latency-ns = <0x9c40>; - }; - - opp-1296000000 { - opp-hz = <0x00 0x4d3f6400>; - opp-microvolt = <0x149970 0x149970 0x149970>; - opp-microvolt-L0 = <0x149970 0x149970 0x149970>; - opp-microvolt-L1 = <0x149970 0x149970 0x149970>; - opp-microvolt-L2 = <0x13d620 0x13d620 0x149970>; - opp-microvolt-L3 = <0x1312d0 0x1312d0 0x149970>; - clock-latency-ns = <0x9c40>; - }; - }; - - arm-pmu { - compatible = "arm,cortex-a53-pmu"; - interrupts = <0x00 0x64 0x04 0x00 0x65 0x04 0x00 0x66 0x04 0x00 0x67 0x04>; - interrupt-affinity = <0x09 0x0a 0x0b 0x0c>; - }; - - bus-soc { - compatible = "rockchip,px30-bus"; - rockchip,busfreq-policy = "autocs"; - phandle = <0xc4>; - - soc-bus0 { - bus-id = <0x00>; - timer-us = <0x14>; - enable-msk = <0x40f7>; - status = "disabled"; - }; - - soc-bus1 { - bus-id = <0x01>; - timer-us = <0xc8>; - enable-msk = <0x40bf>; - status = "disabled"; - }; - - soc-bus2 { - bus-id = <0x02>; - timer-us = <0xc8>; - enable-msk = <0x4007>; - status = "disabled"; - }; - }; - - bus-apll { - compatible = "rockchip,px30-bus"; - rockchip,busfreq-policy = "clkfreq"; - clocks = <0x02 0x01>; - clock-names = "bus"; - operating-points-v2 = <0x0d>; - status = "okay"; - bus-supply = <0x0e>; - phandle = <0xc5>; - }; - - bus-apll-opp-table { - compatible = "operating-points-v2"; - opp-shared; - phandle = <0x0d>; - - opp-1512000000 { - opp-hz = <0x00 0x5a1f4a00>; - opp-microvolt = <0xf4240>; - }; - - opp-1008000000 { - opp-hz = <0x00 0x3c14dc00>; - opp-microvolt = <0xe7ef0>; - }; - }; - - cpuinfo { - compatible = "rockchip,cpuinfo"; - nvmem-cells = <0x0f>; - nvmem-cell-names = "id"; - }; - - display-subsystem { - compatible = "rockchip,display-subsystem"; - ports = <0x10>; - status = "okay"; - logo-memory-region = <0x11>; - phandle = <0xc6>; - - route { - - route-lvds { - status = "disabled"; - logo,uboot = "logo.bmp"; - logo,kernel = "logo_kernel.bmp"; - logo,mode = "center"; - charge_logo,mode = "center"; - connect = <0x12>; - phandle = <0xc7>; - }; - - route-dsi { - status = "okay"; - logo,uboot = "logo.bmp"; - logo,kernel = "logo_kernel.bmp"; - logo,mode = "center"; - charge_logo,mode = "center"; - connect = <0x13>; - phandle = <0xc8>; - }; - - route-rgb { - status = "disabled"; - logo,uboot = "logo.bmp"; - logo,kernel = "logo_kernel.bmp"; - logo,mode = "center"; - charge_logo,mode = "center"; - connect = <0x14>; - phandle = <0xc9>; - }; - }; - }; - - firmware { - - optee { - compatible = "linaro,optee-tz"; - method = "smc"; - }; - }; - - external-gmac-clock { - compatible = "fixed-clock"; - clock-frequency = <0x2faf080>; - clock-output-names = "gmac_clkin"; - #clock-cells = <0x00>; - phandle = <0xca>; - }; - - psci { - compatible = "arm,psci-1.0"; - method = "smc"; - }; - - rockchip-suspend { - compatible = "rockchip,pm-px30"; - status = "okay"; - rockchip,sleep-debug-en = <0x01>; - rockchip,sleep-mode-config = <0x20702>; - rockchip,wakeup-config = <0x85>; - phandle = <0xcb>; - }; - - timer { - compatible = "arm,armv8-timer"; - interrupts = <0x01 0x0d 0xf04 0x01 0x0e 0xf04 0x01 0x0b 0xf04 0x01 0x0a 0xf04>; - }; - - xin24m { - compatible = "fixed-clock"; - #clock-cells = <0x00>; - clock-frequency = <0x16e3600>; - clock-output-names = "xin24m"; - phandle = <0xcc>; - }; - - xin32k { - compatible = "fixed-clock"; - #clock-cells = <0x00>; - clock-frequency = <0x8000>; - clock-output-names = "xin32k"; - phandle = <0xcd>; - }; - - power-management@ff000000 { - compatible = "rockchip,px30-pmu\0syscon\0simple-mfd"; - reg = <0x00 0xff000000 0x00 0x1000>; - phandle = <0xce>; - - power-controller { - compatible = "rockchip,px30-power-controller"; - #power-domain-cells = <0x01>; - #address-cells = <0x01>; - #size-cells = <0x00>; - phandle = <0x8a>; - - pd_usb@5 { - reg = <0x05>; - clocks = <0x02 0x103 0x02 0x102 0x02 0x3c>; - pm_qos = <0x15 0x16>; - }; - - pd_sdcard@7 { - reg = <0x07>; - clocks = <0x02 0xf7 0x02 0x3b>; - pm_qos = <0x17>; - }; - - pd_gmac@9 { - reg = <0x09>; - clocks = <0x02 0xb2 0x02 0x143 0x02 0x40 0x02 0x3f>; - pm_qos = <0x18>; - }; - - pd_mmc_nand@10 { - reg = <0x0a>; - clocks = <0x02 0xfe 0x02 0x100 0x02 0xff 0x02 0x101 0x02 0x39 0x02 0x37 0x02 0x38 0x02 0x3a>; - pm_qos = <0x19 0x1a 0x1b 0x1c>; - }; - - pd_vpu@11 { - reg = <0x0b>; - clocks = <0x02 0xaf 0x02 0xf4 0x02 0x4b>; - pm_qos = <0x1d 0x1e>; - }; - - pd_vo@12 { - reg = <0x0c>; - clocks = <0x02 0xb7 0x02 0xb5 0x02 0xb6 0x02 0x96 0x02 0x97 0x02 0xfd 0x02 0xfb 0x02 0xfc 0x02 0x144 0x02 0x35 0x02 0x36>; - pm_qos = <0x1f 0x20 0x21 0x22>; - }; - - pd_vi@13 { - reg = <0x0d>; - clocks = <0x02 0xb3 0x02 0xb4 0x02 0xf9 0x02 0xfa 0x02 0x33>; - pm_qos = <0x23 0x24 0x25 0x26 0x27>; - }; - - pd_gpu@14 { - reg = <0x0e>; - clocks = <0x02 0x49>; - pm_qos = <0x28>; - }; - }; - }; - - syscon@ff010000 { - compatible = "rockchip,px30-pmugrf\0syscon\0simple-mfd"; - reg = <0x00 0xff010000 0x00 0x1000>; - #address-cells = <0x01>; - #size-cells = <0x01>; - phandle = <0xac>; - - io-domains { - compatible = "rockchip,px30-pmu-io-voltage-domain"; - status = "okay"; - pmuio1-supply = <0x29>; - pmuio2-supply = <0x29>; - phandle = <0xcf>; - }; - - reboot-mode { - compatible = "syscon-reboot-mode"; - offset = <0x200>; - mode-bootloader = <0x5242c301>; - mode-charge = <0x5242c30b>; - mode-fastboot = <0x5242c309>; - mode-loader = <0x5242c301>; - mode-normal = <0x5242c300>; - mode-recovery = <0x5242c303>; - mode-ums = <0x5242c30c>; - }; - - pmu-pvtm { - compatible = "rockchip,px30-pmu-pvtm"; - clocks = <0x2a 0x07>; - clock-names = "pmu"; - status = "okay"; - phandle = <0xd0>; - }; - }; - - serial@ff030000 { - compatible = "rockchip,px30-uart\0snps,dw-apb-uart"; - reg = <0x00 0xff030000 0x00 0x100>; - interrupts = <0x00 0x0f 0x04>; - clocks = <0x2a 0x06 0x2a 0x15>; - clock-names = "baudclk\0apb_pclk"; - reg-shift = <0x02>; - reg-io-width = <0x04>; - dmas = <0x2b 0x00 0x2b 0x01>; - pinctrl-names = "default"; - pinctrl-0 = <0x2c 0x2d 0x2e>; - status = "disabled"; - phandle = <0xd1>; - }; - - i2s@ff060000 { - compatible = "rockchip,px30-i2s-tdm"; - reg = <0x00 0xff060000 0x00 0x1000>; - interrupts = <0x00 0x0c 0x04>; - clocks = <0x02 0x10 0x02 0x12 0x02 0x106>; - clock-names = "mclk_tx\0mclk_rx\0hclk"; - dmas = <0x2b 0x10 0x2b 0x11>; - dma-names = "tx\0rx"; - resets = <0x02 0x84 0x02 0xbf>; - reset-names = "tx-m\0rx-m"; - rockchip,cru = <0x02>; - rockchip,grf = <0x2f>; - pinctrl-names = "default"; - pinctrl-0 = <0x30 0x31 0x32 0x33 0x34 0x35 0x36 0x37 0x38 0x39 0x3a 0x3b>; - status = "disabled"; - phandle = <0xd2>; - }; - - i2s@ff070000 { - compatible = "rockchip,px30-i2s\0rockchip,rk3066-i2s"; - reg = <0x00 0xff070000 0x00 0x1000>; - interrupts = <0x00 0x0d 0x04>; - clocks = <0x02 0x14 0x02 0x107>; - clock-names = "i2s_clk\0i2s_hclk"; - dmas = <0x2b 0x12 0x2b 0x13>; - dma-names = "tx\0rx"; - resets = <0x02 0x86 0x02 0x85>; - reset-names = "reset-m\0reset-h"; - pinctrl-names = "default"; - pinctrl-0 = <0x3c 0x3d 0x3e 0x3f>; - status = "okay"; - #sound-dai-cells = <0x00>; - phandle = <0xc2>; - }; - - i2s@ff080000 { - compatible = "rockchip,px30-i2s\0rockchip,rk3066-i2s"; - reg = <0x00 0xff080000 0x00 0x1000>; - interrupts = <0x00 0x0e 0x04>; - clocks = <0x02 0x16 0x02 0x108>; - clock-names = "i2s_clk\0i2s_hclk"; - dmas = <0x2b 0x14 0x2b 0x15>; - dma-names = "tx\0rx"; - resets = <0x02 0x88 0x02 0x87>; - reset-names = "reset-m\0reset-h"; - pinctrl-names = "default"; - pinctrl-0 = <0x40 0x41 0x42 0x43>; - status = "disabled"; - phandle = <0xd3>; - }; - - pdm@ff0a0000 { - compatible = "rockchip,px30-pdm\0rockchip,pdm"; - reg = <0x00 0xff0a0000 0x00 0x1000>; - clocks = <0x02 0x0f 0x02 0x105>; - clock-names = "pdm_clk\0pdm_hclk"; - dmas = <0x2b 0x18>; - dma-names = "rx"; - resets = <0x02 0x82>; - reset-names = "pdm-m"; - pinctrl-names = "default"; - pinctrl-0 = <0x44 0x45 0x46 0x47 0x48 0x49>; - status = "disabled"; - phandle = <0xd4>; - }; - - crypto@ff0b0000 { - compatible = "rockchip,px30-crypto"; - reg = <0x00 0xff0b0000 0x00 0x4000>; - interrupts = <0x00 0x52 0x04>; - clocks = <0x02 0xac 0x02 0xf1 0x02 0x30 0x02 0x31>; - clock-names = "aclk\0hclk\0sclk\0apb_pclk"; - resets = <0x02 0x74>; - reset-names = "crypto-rst"; - status = "disabled"; - phandle = <0xd5>; - }; - - rng@ff0b0000 { - compatible = "rockchip,cryptov2-rng"; - reg = <0x00 0xff0b0000 0x00 0x4000>; - clocks = <0x02 0x30 0x02 0x31 0x02 0xac 0x02 0xf1>; - clock-names = "clk_crypto\0clk_crypto_apk\0aclk_crypto\0hclk_crypto"; - assigned-clocks = <0x02 0x30 0x02 0x31 0x02 0xac 0x02 0xf1>; - assigned-clock-rates = <0x8f0d180 0x8f0d180 0xbebc200 0x5f5e100>; - resets = <0x02 0x74>; - reset-names = "reset"; - status = "okay"; - phandle = <0xd6>; - }; - - interrupt-controller@ff131000 { - compatible = "arm,gic-400"; - #interrupt-cells = <0x03>; - #address-cells = <0x00>; - interrupt-controller; - reg = <0x00 0xff131000 0x00 0x1000 0x00 0xff132000 0x00 0x2000 0x00 0xff134000 0x00 0x2000 0x00 0xff136000 0x00 0x2000>; - interrupts = <0x01 0x09 0xf04>; - phandle = <0x01>; - }; - - syscon@ff140000 { - compatible = "rockchip,px30-grf\0syscon\0simple-mfd"; - reg = <0x00 0xff140000 0x00 0x1000>; - #address-cells = <0x01>; - #size-cells = <0x01>; - phandle = <0x2f>; - - io-domains { - compatible = "rockchip,px30-io-voltage-domain"; - status = "okay"; - vccio1-supply = <0x4a>; - vccio2-supply = <0x4a>; - vccio3-supply = <0x4b>; - vccio4-supply = <0x4b>; - vccio5-supply = <0x4b>; - vccio6-supply = <0x4b>; - phandle = <0xd7>; - }; - - lvds { - compatible = "rockchip,px30-lvds"; - phys = <0x4c>; - phy-names = "phy"; - status = "disabled"; - phandle = <0xd8>; - - ports { - #address-cells = <0x01>; - #size-cells = <0x00>; - - port@0 { - reg = <0x00>; - #address-cells = <0x01>; - #size-cells = <0x00>; - - endpoint@0 { - reg = <0x00>; - remote-endpoint = <0x12>; - phandle = <0xa2>; - }; - }; - }; - }; - - rgb { - compatible = "rockchip,px30-rgb"; - pinctrl-names = "default\0sleep"; - pinctrl-0 = <0x4d>; - pinctrl-1 = <0x4e>; - status = "disabled"; - phys = <0x4c>; - phy-names = "phy"; - phandle = <0xd9>; - - ports { - #address-cells = <0x01>; - #size-cells = <0x00>; - - port@0 { - reg = <0x00>; - #address-cells = <0x01>; - #size-cells = <0x00>; - - endpoint@0 { - reg = <0x00>; - remote-endpoint = <0x14>; - phandle = <0xa4>; - }; - }; - }; - }; - }; - - syscon@ff148000 { - compatible = "syscon\0simple-mfd"; - reg = <0x00 0xff148000 0x00 0x1000>; - #address-cells = <0x01>; - #size-cells = <0x01>; - phandle = <0xda>; - - pvtm { - compatible = "rockchip,px30-pvtm"; - clocks = <0x02 0x4a>; - clock-names = "core"; - status = "okay"; - phandle = <0xdb>; - }; - }; - - serial@ff158000 { - compatible = "rockchip,px30-uart\0snps,dw-apb-uart"; - reg = <0x00 0xff158000 0x00 0x100>; - interrupts = <0x00 0x10 0x04>; - clocks = <0x02 0x18 0x02 0x149>; - clock-names = "baudclk\0apb_pclk"; - reg-shift = <0x02>; - reg-io-width = <0x04>; - dmas = <0x2b 0x02 0x2b 0x03>; - pinctrl-names = "default"; - pinctrl-0 = <0x4f 0x50>; - status = "okay"; - phandle = <0xdc>; - }; - - serial@ff160000 { - compatible = "rockchip,px30-uart\0snps,dw-apb-uart"; - reg = <0x00 0xff160000 0x00 0x100>; - interrupts = <0x00 0x11 0x04>; - clocks = <0x02 0x19 0x02 0x14a>; - clock-names = "baudclk\0apb_pclk"; - reg-shift = <0x02>; - reg-io-width = <0x04>; - dmas = <0x2b 0x04 0x2b 0x05>; - pinctrl-names = "default"; - pinctrl-0 = <0x51>; - status = "disabled"; - phandle = <0xdd>; - }; - - serial@ff168000 { - compatible = "rockchip,px30-uart\0snps,dw-apb-uart"; - reg = <0x00 0xff168000 0x00 0x100>; - interrupts = <0x00 0x12 0x04>; - clocks = <0x02 0x1a 0x02 0x14b>; - clock-names = "baudclk\0apb_pclk"; - reg-shift = <0x02>; - reg-io-width = <0x04>; - dmas = <0x2b 0x06 0x2b 0x07>; - pinctrl-names = "default"; - pinctrl-0 = <0x52 0x53 0x54>; - status = "disabled"; - phandle = <0xde>; - }; - - serial@ff170000 { - compatible = "rockchip,px30-uart\0snps,dw-apb-uart"; - reg = <0x00 0xff170000 0x00 0x100>; - interrupts = <0x00 0x13 0x04>; - clocks = <0x02 0x1b 0x02 0x14c>; - clock-names = "baudclk\0apb_pclk"; - reg-shift = <0x02>; - reg-io-width = <0x04>; - dmas = <0x2b 0x08 0x2b 0x09>; - pinctrl-names = "default"; - pinctrl-0 = <0x55 0x56 0x57>; - status = "disabled"; - phandle = <0xdf>; - }; - - serial@ff178000 { - compatible = "rockchip,px30-uart\0snps,dw-apb-uart"; - reg = <0x00 0xff178000 0x00 0x100>; - interrupts = <0x00 0x14 0x04>; - clocks = <0x02 0x1c 0x02 0x14d>; - clock-names = "baudclk\0apb_pclk"; - reg-shift = <0x02>; - reg-io-width = <0x04>; - dmas = <0x2b 0x0a 0x2b 0x0b>; - pinctrl-names = "default"; - pinctrl-0 = <0x58 0x59 0x5a>; - status = "disabled"; - phandle = <0xe0>; - }; - - i2c@ff180000 { - compatible = "rockchip,rk3399-i2c"; - reg = <0x00 0xff180000 0x00 0x1000>; - clocks = <0x02 0x1d 0x02 0x14e>; - clock-names = "i2c\0pclk"; - interrupts = <0x00 0x07 0x04>; - pinctrl-names = "default"; - pinctrl-0 = <0x5b>; - #address-cells = <0x01>; - #size-cells = <0x00>; - status = "okay"; - clock-frequency = <0x61a80>; - i2c-scl-rising-time-ns = <0x118>; - i2c-scl-falling-time-ns = <0x10>; - phandle = <0xe1>; - - pmic@20 { - compatible = "rockchip,rk817"; - reg = <0x20>; - interrupt-parent = <0x5c>; - interrupts = <0x0a 0x08>; - pinctrl-names = "default\0pmic-sleep\0pmic-power-off\0pmic-reset"; - pinctrl-0 = <0x5d>; - pinctrl-1 = <0x5e 0x5f>; - pinctrl-2 = <0x60 0x61>; - pinctrl-3 = <0x62 0x63>; - rockchip,system-power-controller; - wakeup-source; - #clock-cells = <0x01>; - clock-output-names = "rk808-clkout1\0rk808-clkout2"; - pmic-reset-func = <0x01>; - vcc1-supply = <0x64>; - vcc2-supply = <0x64>; - vcc3-supply = <0x64>; - vcc4-supply = <0x64>; - vcc5-supply = <0x64>; - vcc6-supply = <0x64>; - vcc7-supply = <0x64>; - vcc8-supply = <0x64>; - vcc9-supply = <0x65>; - phandle = <0xe2>; - - pwrkey { - status = "okay"; - }; - - pinctrl_rk8xx { - gpio-controller; - #gpio-cells = <0x02>; - phandle = <0xe3>; - - rk817_ts_gpio1 { - pins = "gpio_ts"; - function = "pin_fun1"; - phandle = <0xe4>; - }; - - rk817_gt_gpio2 { - pins = "gpio_gt"; - function = "pin_fun1"; - phandle = <0xe5>; - }; - - rk817_pin_ts { - pins = "gpio_ts"; - function = "pin_fun0"; - phandle = <0xe6>; - }; - - rk817_pin_gt { - pins = "gpio_gt"; - function = "pin_fun0"; - phandle = <0xe7>; - }; - - rk817_slppin_null { - pins = "gpio_slp"; - function = "pin_fun0"; - phandle = <0xe8>; - }; - - rk817_slppin_slp { - pins = "gpio_slp"; - function = "pin_fun1"; - phandle = <0x5f>; - }; - - rk817_slppin_pwrdn { - pins = "gpio_slp"; - function = "pin_fun2"; - phandle = <0x61>; - }; - - rk817_slppin_rst { - pins = "gpio_slp"; - function = "pin_fun3"; - phandle = <0x63>; - }; - }; - - regulators { - - DCDC_REG1 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0xe7ef0>; - regulator-max-microvolt = <0x118c30>; - regulator-ramp-delay = <0x1771>; - regulator-initial-mode = <0x02>; - regulator-name = "vdd_logic"; - phandle = <0x0e>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <0xe7ef0>; - }; - }; - - DCDC_REG2 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0xe7ef0>; - regulator-max-microvolt = <0x149970>; - regulator-ramp-delay = <0x1771>; - regulator-initial-mode = <0x02>; - regulator-name = "vdd_arm"; - phandle = <0x06>; - - regulator-state-mem { - regulator-off-in-suspend; - regulator-suspend-microvolt = <0xe7ef0>; - }; - }; - - DCDC_REG3 { - regulator-always-on; - regulator-boot-on; - regulator-initial-mode = <0x02>; - regulator-name = "vcc_ddr"; - phandle = <0xe9>; - - regulator-state-mem { - regulator-on-in-suspend; - }; - }; - - DCDC_REG4 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0x325aa0>; - regulator-max-microvolt = <0x325aa0>; - regulator-initial-mode = <0x02>; - regulator-name = "vcc_3v3"; - phandle = <0x4b>; - - regulator-state-mem { - regulator-off-in-suspend; - regulator-suspend-microvolt = <0x325aa0>; - }; - }; - - LDO_REG1 { - regulator-min-microvolt = <0xf4240>; - regulator-max-microvolt = <0xf4240>; - regulator-name = "vcc_1v0"; - phandle = <0xea>; - - regulator-state-mem { - regulator-off-in-suspend; - regulator-suspend-microvolt = <0xf4240>; - }; - }; - - LDO_REG2 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0x1b7740>; - regulator-max-microvolt = <0x1b7740>; - regulator-name = "vcc1v8_soc"; - phandle = <0x88>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <0x1b7740>; - }; - }; - - LDO_REG3 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0xf4240>; - regulator-max-microvolt = <0xf4240>; - regulator-name = "vcc1v0_soc"; - phandle = <0xeb>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <0xf4240>; - }; - }; - - LDO_REG4 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0x325aa0>; - regulator-max-microvolt = <0x325aa0>; - regulator-name = "vcc3v3_pmu"; - phandle = <0x29>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <0x325aa0>; - }; - }; - - LDO_REG5 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0x1b7740>; - regulator-max-microvolt = <0x1b7740>; - regulator-name = "vccio_sd"; - phandle = <0x4a>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <0x1b7740>; - }; - }; - - LDO_REG6 { - regulator-min-microvolt = <0x1b7740>; - regulator-max-microvolt = <0x2dc6c0>; - regulator-boot-on; - regulator-name = "vcc_sd"; - phandle = <0x93>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <0x2dc6c0>; - }; - }; - - LDO_REG7 { - regulator-min-microvolt = <0x325aa0>; - regulator-max-microvolt = <0x325aa0>; - regulator-name = "vcc_backlight"; - phandle = <0x9e>; - - regulator-state-mem { - regulator-off-in-suspend; - regulator-suspend-microvolt = <0x325aa0>; - }; - }; - - LDO_REG8 { - regulator-min-microvolt = <0x2ab980>; - regulator-max-microvolt = <0x2ab980>; - regulator-name = "vcc_lcd"; - phandle = <0x9f>; - - regulator-state-mem { - regulator-off-in-suspend; - regulator-suspend-microvolt = <0x2ab980>; - }; - }; - - BOOST { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0x4c4b40>; - regulator-max-microvolt = <0x5265c0>; - regulator-name = "boost"; - phandle = <0x65>; - }; - - OTG_SWITCH { - regulator-boot-on; - regulator-name = "otg_switch"; - phandle = <0xec>; - }; - }; - - battery { - compatible = "rk817,battery"; - ocv_table = <0xc5d 0xc94 0xcd0 0xd02 0xd34 0xd66 0xd98 0xdca 0xdfc 0xe2e 0xe56 0xe7e 0xea6 0xece 0xef6 0xf1e 0xf46 0xf6e 0xf96 0xf9b 0xfa0>; - design_capacity = <0xd34>; - design_qmax = <0xe86>; - bat_res = <0x64>; - sleep_enter_current = <0x12c>; - sleep_exit_current = <0x12c>; - sleep_filter_current = <0x64>; - power_off_thresd = <0xbb8>; - zero_algorithm_vol = <0xf0a>; - max_soc_offset = <0x3c>; - monitor_sec = <0x05>; - virtual_power = <0x00>; - sample_res = <0x0a>; - }; - - charger { - compatible = "rk817,charger"; - min_input_voltage = <0x1194>; - max_input_current = <0x5dc>; - max_chrg_current = <0x7d0>; - max_chrg_voltage = <0x1068>; - chrg_term_mode = <0x00>; - chrg_finish_cur = <0x34>; - virtual_power = <0x00>; - sample_res = <0x0a>; - dc_det_gpio = <0x5c 0x0b 0x00>; - bat_low_gpio = <0x66 0x0d 0x00>; - extcon = <0x67>; - }; - - codec { - #sound-dai-cells = <0x00>; - compatible = "rockchip,rk817-codec"; - clocks = <0x02 0x15>; - clock-names = "mclk"; - pinctrl-names = "default"; - pinctrl-0 = <0x68>; - hp-volume = <0x14>; - spk-volume = <0x03>; - status = "okay"; - phandle = <0xc3>; - }; - }; - }; - - i2c@ff190000 { - compatible = "rockchip,rk3399-i2c"; - reg = <0x00 0xff190000 0x00 0x1000>; - clocks = <0x02 0x1e 0x02 0x14f>; - clock-names = "i2c\0pclk"; - interrupts = <0x00 0x08 0x04>; - pinctrl-names = "default"; - pinctrl-0 = <0x69>; - #address-cells = <0x01>; - #size-cells = <0x00>; - status = "okay"; - clock-frequency = <0x61a80>; - phandle = <0xed>; - }; - - i2c@ff1a0000 { - compatible = "rockchip,rk3399-i2c"; - reg = <0x00 0xff1a0000 0x00 0x1000>; - clocks = <0x02 0x1f 0x02 0x150>; - clock-names = "i2c\0pclk"; - interrupts = <0x00 0x09 0x04>; - pinctrl-names = "default"; - pinctrl-0 = <0x6a>; - #address-cells = <0x01>; - #size-cells = <0x00>; - status = "disabled"; - phandle = <0xee>; - }; - - i2c@ff1b0000 { - compatible = "rockchip,rk3399-i2c"; - reg = <0x00 0xff1b0000 0x00 0x1000>; - clocks = <0x02 0x20 0x02 0x151>; - clock-names = "i2c\0pclk"; - interrupts = <0x00 0x0a 0x04>; - pinctrl-names = "default"; - pinctrl-0 = <0x6b>; - #address-cells = <0x01>; - #size-cells = <0x00>; - status = "disabled"; - phandle = <0xef>; - }; - - spi@ff1d0000 { - compatible = "rockchip,px30-spi\0rockchip,rk3066-spi"; - reg = <0x00 0xff1d0000 0x00 0x1000>; - interrupts = <0x00 0x1a 0x04>; - #address-cells = <0x01>; - #size-cells = <0x00>; - clocks = <0x02 0x24 0x02 0x155>; - clock-names = "spiclk\0apb_pclk"; - dmas = <0x2b 0x0c 0x2b 0x0d>; - dma-names = "tx\0rx"; - pinctrl-names = "default\0high_speed"; - pinctrl-0 = <0x6c 0x6d 0x6e 0x6f>; - pinctrl-1 = <0x70 0x6d 0x71 0x72>; - status = "disabled"; - phandle = <0xf0>; - }; - - spi@ff1d8000 { - compatible = "rockchip,px30-spi\0rockchip,rk3066-spi"; - reg = <0x00 0xff1d8000 0x00 0x1000>; - interrupts = <0x00 0x1b 0x04>; - #address-cells = <0x01>; - #size-cells = <0x00>; - clocks = <0x02 0x25 0x02 0x156>; - clock-names = "spiclk\0apb_pclk"; - dmas = <0x2b 0x0e 0x2b 0x0f>; - dma-names = "tx\0rx"; - pinctrl-names = "default\0high_speed"; - pinctrl-0 = <0x73 0x74 0x75 0x76 0x77>; - pinctrl-1 = <0x78 0x74 0x75 0x79 0x7a>; - status = "disabled"; - phandle = <0xf1>; - }; - - watchdog@ff1e0000 { - compatible = "snps,dw-wdt"; - reg = <0x00 0xff1e0000 0x00 0x100>; - clocks = <0x02 0x15b>; - interrupts = <0x00 0x25 0x04>; - resets = <0x02 0xb5>; - reset-names = "reset"; - status = "disabled"; - phandle = <0xf2>; - }; - - pwm@ff200000 { - compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm"; - reg = <0x00 0xff200000 0x00 0x10>; - #pwm-cells = <0x03>; - pinctrl-names = "active"; - pinctrl-0 = <0x7b>; - clocks = <0x02 0x22 0x02 0x153>; - clock-names = "pwm\0pclk"; - status = "okay"; - phandle = <0xbc>; - }; - - pwm@ff200010 { - compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm"; - reg = <0x00 0xff200010 0x00 0x10>; - #pwm-cells = <0x03>; - pinctrl-names = "active"; - pinctrl-0 = <0x7c>; - clocks = <0x02 0x22 0x02 0x153>; - clock-names = "pwm\0pclk"; - status = "okay"; - phandle = <0xc1>; - }; - - pwm@ff200020 { - compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm"; - reg = <0x00 0xff200020 0x00 0x10>; - #pwm-cells = <0x03>; - pinctrl-names = "active"; - pinctrl-0 = <0x7d>; - clocks = <0x02 0x22 0x02 0x153>; - clock-names = "pwm\0pclk"; - status = "disabled"; - phandle = <0xf3>; - }; - - pwm@ff200030 { - compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm"; - reg = <0x00 0xff200030 0x00 0x10>; - #pwm-cells = <0x03>; - pinctrl-names = "active"; - pinctrl-0 = <0x7e>; - clocks = <0x02 0x22 0x02 0x153>; - clock-names = "pwm\0pclk"; - status = "disabled"; - phandle = <0xf4>; - }; - - pwm@ff208000 { - compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm"; - reg = <0x00 0xff208000 0x00 0x10>; - #pwm-cells = <0x03>; - pinctrl-names = "active"; - pinctrl-0 = <0x7f>; - clocks = <0x02 0x23 0x02 0x154>; - clock-names = "pwm\0pclk"; - status = "disabled"; - phandle = <0xf5>; - }; - - pwm@ff208010 { - compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm"; - reg = <0x00 0xff208010 0x00 0x10>; - #pwm-cells = <0x03>; - pinctrl-names = "active"; - pinctrl-0 = <0x80>; - clocks = <0x02 0x23 0x02 0x154>; - clock-names = "pwm\0pclk"; - status = "disabled"; - phandle = <0xf6>; - }; - - pwm@ff208020 { - compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm"; - reg = <0x00 0xff208020 0x00 0x10>; - #pwm-cells = <0x03>; - pinctrl-names = "active"; - pinctrl-0 = <0x81>; - clocks = <0x02 0x23 0x02 0x154>; - clock-names = "pwm\0pclk"; - status = "disabled"; - phandle = <0xf7>; - }; - - pwm@ff208030 { - compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm"; - reg = <0x00 0xff208030 0x00 0x10>; - #pwm-cells = <0x03>; - pinctrl-names = "active"; - pinctrl-0 = <0x82>; - clocks = <0x02 0x23 0x02 0x154>; - clock-names = "pwm\0pclk"; - status = "disabled"; - phandle = <0xf8>; - }; - - rktimer@ff210000 { - compatible = "rockchip,rk3288-timer"; - reg = <0x00 0xff210000 0x00 0x1000>; - interrupts = <0x00 0x1e 0x04>; - clocks = <0x02 0x159 0x02 0x26>; - clock-names = "pclk\0timer"; - phandle = <0xf9>; - }; - - amba { - compatible = "simple-bus"; - #address-cells = <0x02>; - #size-cells = <0x02>; - ranges; - - dmac@ff240000 { - compatible = "arm,pl330\0arm,primecell"; - reg = <0x00 0xff240000 0x00 0x4000>; - interrupts = <0x00 0x01 0x04 0x00 0x02 0x04>; - clocks = <0x02 0xbb>; - clock-names = "apb_pclk"; - #dma-cells = <0x01>; - peripherals-req-type-burst; - phandle = <0x2b>; - }; - }; - - thermal-zones { - phandle = <0xfa>; - - soc-thermal { - polling-delay-passive = <0x14>; - polling-delay = <0x3e8>; - sustainable-power = <0x2ee>; - thermal-sensors = <0x83 0x00>; - phandle = <0xfb>; - - trips { - - trip-point-0 { - temperature = <0x11170>; - hysteresis = <0x7d0>; - type = "passive"; - phandle = <0xfc>; - }; - - trip-point-1 { - temperature = <0x14c08>; - hysteresis = <0x7d0>; - type = "passive"; - phandle = <0x84>; - }; - - soc-crit { - temperature = <0x1c138>; - hysteresis = <0x7d0>; - type = "critical"; - phandle = <0xfd>; - }; - }; - - cooling-maps { - - map0 { - trip = <0x84>; - cooling-device = <0x09 0xffffffff 0xffffffff>; - contribution = <0x1000>; - }; - - map1 { - trip = <0x84>; - cooling-device = <0x85 0xffffffff 0xffffffff>; - contribution = <0x1000>; - }; - }; - }; - - gpu-thermal { - polling-delay-passive = <0x64>; - polling-delay = <0x3e8>; - thermal-sensors = <0x83 0x01>; - phandle = <0xfe>; - }; - }; - - tsadc@ff280000 { - compatible = "rockchip,px30-tsadc"; - reg = <0x00 0xff280000 0x00 0x100>; - interrupts = <0x00 0x24 0x04>; - rockchip,grf = <0x2f>; - clocks = <0x02 0x2c 0x02 0x158>; - clock-names = "tsadc\0apb_pclk"; - assigned-clocks = <0x02 0x2c>; - assigned-clock-rates = <0xc350>; - resets = <0x02 0xa8>; - reset-names = "tsadc-apb"; - #thermal-sensor-cells = <0x01>; - rockchip,hw-tshut-temp = <0x1d4c0>; - status = "okay"; - pinctrl-names = "gpio\0otpout"; - pinctrl-0 = <0x86>; - pinctrl-1 = <0x87>; - phandle = <0x83>; - }; - - saradc@ff288000 { - compatible = "rockchip,px30-saradc\0rockchip,rk3399-saradc"; - reg = <0x00 0xff288000 0x00 0x100>; - interrupts = <0x00 0x54 0x04>; - #io-channel-cells = <0x01>; - clocks = <0x02 0x2d 0x02 0x157>; - clock-names = "saradc\0apb_pclk"; - resets = <0x02 0xa5>; - reset-names = "saradc-apb"; - status = "okay"; - vref-supply = <0x88>; - phandle = <0xbe>; - }; - - otp@ff290000 { - compatible = "rockchip,px30-otp"; - reg = <0x00 0xff290000 0x00 0x4000>; - #address-cells = <0x01>; - #size-cells = <0x01>; - clocks = <0x02 0x2f 0x02 0x15a 0x02 0x161>; - clock-names = "clk_otp\0pclk_otp\0pclk_otp_phy"; - resets = <0x02 0xb4>; - reset-names = "otp_phy"; - phandle = <0xff>; - - id@7 { - reg = <0x07 0x10>; - phandle = <0x0f>; - }; - - cpu-leakage@17 { - reg = <0x17 0x01>; - phandle = <0x07>; - }; - - performance@1e { - reg = <0x1e 0x01>; - bits = <0x04 0x03>; - phandle = <0x08>; - }; - }; - - clock-controller@ff2b0000 { - compatible = "rockchip,px30-cru"; - reg = <0x00 0xff2b0000 0x00 0x1000>; - rockchip,grf = <0x2f>; - rockchip,boost = <0x89>; - #clock-cells = <0x01>; - #reset-cells = <0x01>; - assigned-clocks = <0x02 0x04>; - assigned-clock-rates = <0x3dfd2400>; - phandle = <0x02>; - }; - - cpu-boost@ff2b8000 { - compatible = "syscon"; - reg = <0x00 0xff2b8000 0x00 0x1000>; - rockchip,boost-low-con0 = <0x1032>; - rockchip,boost-low-con1 = <0x1441>; - rockchip,boost-high-con0 = <0x1036>; - rockchip,boost-high-con1 = <0x1441>; - rockchip,boost-backup-pll = <0x01>; - rockchip,boost-backup-pll-usage = <0x00>; - rockchip,boost-switch-threshold = <0x249f00>; - rockchip,boost-statis-threshold = <0x100>; - rockchip,boost-statis-enable = <0x00>; - rockchip,boost-enable = <0x00>; - phandle = <0x89>; - }; - - pmu-clock-controller@ff2bc000 { - compatible = "rockchip,px30-pmucru"; - reg = <0x00 0xff2bc000 0x00 0x1000>; - rockchip,grf = <0x2f>; - #clock-cells = <0x01>; - #reset-cells = <0x01>; - assigned-clocks = <0x2a 0x01 0x2a 0x08 0x2a 0x05 0x02 0x07 0x02 0xab 0x02 0xb0 0x02 0xf0 0x02 0xf5 0x02 0x140 0x02 0x49>; - assigned-clock-rates = <0x47868c00 0x5f5e100 0x18cba80 0x23c34600 0xbebc200 0xbebc200 0x8f0d180 0x8f0d180 0x5f5e100 0xbebc200>; - phandle = <0x2a>; - }; - - syscon@ff2c0000 { - compatible = "rockchip,px30-usb2phy-grf\0syscon\0simple-mfd"; - reg = <0x00 0xff2c0000 0x00 0x10000>; - #address-cells = <0x01>; - #size-cells = <0x01>; - phandle = <0x100>; - - usb2-phy@100 { - compatible = "rockchip,px30-usb2phy\0rockchip,rk3328-usb2phy"; - reg = <0x100 0x10>; - clocks = <0x2a 0x0a>; - clock-names = "phyclk"; - #clock-cells = <0x00>; - assigned-clocks = <0x02 0x0e 0x02 0x55>; - assigned-clock-parents = <0x67 0x02 0x0e>; - clock-output-names = "usb480m_phy"; - status = "okay"; - phandle = <0x67>; - - host-port { - #phy-cells = <0x00>; - interrupts = <0x00 0x44 0x04>; - interrupt-names = "linestate"; - status = "okay"; - phandle = <0x8c>; - }; - - otg-port { - #phy-cells = <0x00>; - interrupts = <0x00 0x42 0x04 0x00 0x41 0x04 0x00 0x40 0x04>; - interrupt-names = "otg-bvalid\0otg-id\0linestate"; - status = "disabled"; - phandle = <0x8b>; - }; - }; - }; - - video-phy@ff2e0000 { - compatible = "rockchip,px30-video-phy"; - reg = <0x00 0xff2e0000 0x00 0x10000 0x00 0xff450000 0x00 0x10000>; - clocks = <0x2a 0x0b 0x02 0x145 0x02 0x144>; - clock-names = "ref\0pclk_phy\0pclk_host"; - #clock-cells = <0x00>; - resets = <0x02 0x3e>; - reset-names = "rst"; - power-domains = <0x8a 0x0c>; - #phy-cells = <0x00>; - status = "okay"; - phandle = <0x4c>; - }; - - mipi-dphy-rx0@ff2f0000 { - compatible = "rockchip,rk3326-mipi-dphy"; - reg = <0x00 0xff2f0000 0x00 0x4000>; - clocks = <0x02 0x146>; - clock-names = "dphy-ref"; - power-domains = <0x8a 0x0d>; - rockchip,grf = <0x2f>; - status = "okay"; - phandle = <0x101>; - }; - - usb@ff300000 { - compatible = "rockchip,px30-usb\0rockchip,rk3066-usb\0snps,dwc2"; - reg = <0x00 0xff300000 0x00 0x40000>; - interrupts = <0x00 0x3e 0x04>; - clocks = <0x02 0x102>; - clock-names = "otg"; - power-domains = <0x8a 0x05>; - dr_mode = "otg"; - g-np-tx-fifo-size = <0x10>; - g-rx-fifo-size = <0x118>; - g-tx-fifo-size = <0x100 0x80 0x80 0x40 0x20 0x10>; - g-use-dma; - phys = <0x8b>; - phy-names = "usb2-phy"; - status = "okay"; - phandle = <0x102>; - }; - - usb@ff340000 { - compatible = "generic-ehci"; - reg = <0x00 0xff340000 0x00 0x10000>; - interrupts = <0x00 0x3c 0x04>; - clocks = <0x02 0x103 0x67>; - clock-names = "usbhost\0utmi"; - power-domains = <0x8a 0x05>; - phys = <0x8c>; - phy-names = "usb"; - status = "disabled"; - phandle = <0x103>; - }; - - usb@ff350000 { - compatible = "generic-ohci"; - reg = <0x00 0xff350000 0x00 0x10000>; - interrupts = <0x00 0x3d 0x04>; - clocks = <0x02 0x103 0x67>; - clock-names = "usbhost\0utmi"; - power-domains = <0x8a 0x05>; - phys = <0x8c>; - phy-names = "usb"; - status = "disabled"; - phandle = <0x104>; - }; - - ethernet@ff360000 { - compatible = "rockchip,px30-gmac"; - reg = <0x00 0xff360000 0x00 0x10000>; - rockchip,grf = <0x2f>; - interrupts = <0x00 0x2b 0x04>; - interrupt-names = "macirq"; - clocks = <0x02 0x3e 0x02 0x3f 0x02 0x3f 0x02 0x40 0x02 0x41 0x02 0xb2 0x02 0x143 0x02 0x4c>; - clock-names = "stmmaceth\0mac_clk_rx\0mac_clk_tx\0clk_mac_ref\0clk_mac_refout\0aclk_mac\0pclk_mac\0clk_mac_speed"; - phy-mode = "rmii"; - pinctrl-names = "default"; - pinctrl-0 = <0x8d 0x8e>; - resets = <0x02 0x5e>; - reset-names = "stmmaceth"; - power-domains = <0x8a 0x09>; - status = "disabled"; - phandle = <0x105>; - }; - - dwmmc@ff370000 { - compatible = "rockchip,px30-dw-mshc\0rockchip,rk3288-dw-mshc"; - reg = <0x00 0xff370000 0x00 0x4000>; - max-frequency = <0x8f0d180>; - clocks = <0x02 0xf7 0x02 0x3b 0x02 0x43 0x02 0x44>; - clock-names = "biu\0ciu\0ciu-drv\0ciu-sample"; - assigned-clocks = <0x02 0x3b>; - assigned-clock-parents = <0x02 0x57>; - power-domains = <0x8a 0x07>; - fifo-depth = <0x100>; - interrupts = <0x00 0x36 0x04>; - pinctrl-names = "default"; - pinctrl-0 = <0x8f 0x90 0x91 0x92>; - status = "okay"; - bus-width = <0x04>; - cap-mmc-highspeed; - cap-sd-highspeed; - supports-sd; - card-detect-delay = <0x320>; - ignore-pm-notify; - cd-gpios = <0x5c 0x03 0x01>; - sd-uhs-sdr12; - sd-uhs-sdr25; - sd-uhs-sdr50; - sd-uhs-sdr104; - vqmmc-supply = <0x4a>; - vmmc-supply = <0x93>; - phandle = <0x106>; - }; - - dwmmc@ff380000 { - compatible = "rockchip,px30-dw-mshc\0rockchip,rk3288-dw-mshc"; - reg = <0x00 0xff380000 0x00 0x4000>; - max-frequency = <0x8f0d180>; - clocks = <0x02 0xff 0x02 0x38 0x02 0x45 0x02 0x46>; - clock-names = "biu\0ciu\0ciu-drv\0ciu-sample"; - assigned-clocks = <0x02 0x38>; - assigned-clock-parents = <0x02 0x51>; - power-domains = <0x8a 0x0a>; - fifo-depth = <0x100>; - interrupts = <0x00 0x37 0x04>; - pinctrl-names = "default"; - pinctrl-0 = <0x94 0x95 0x96>; - status = "okay"; - bus-width = <0x04>; - cap-mmc-highspeed; - cap-sd-highspeed; - supports-sd; - card-detect-delay = <0x320>; - ignore-pm-notify; - cd-gpios = <0x97 0x0e 0x01>; - sd-uhs-sdr12; - sd-uhs-sdr25; - sd-uhs-sdr50; - sd-uhs-sdr104; - vqmmc-supply = <0x4a>; - vmmc-supply = <0x93>; - phandle = <0x107>; - }; - - dwmmc@ff390000 { - compatible = "rockchip,px30-dw-mshc\0rockchip,rk3288-dw-mshc"; - reg = <0x00 0xff390000 0x00 0x4000>; - max-frequency = <0x8f0d180>; - clocks = <0x02 0x100 0x02 0x39 0x02 0x47 0x02 0x48>; - clock-names = "biu\0ciu\0ciu-drv\0ciu-sample"; - assigned-clocks = <0x02 0x39>; - assigned-clock-parents = <0x02 0x53>; - power-domains = <0x8a 0x0a>; - fifo-depth = <0x100>; - interrupts = <0x00 0x35 0x04>; - status = "disabled"; - phandle = <0x108>; - }; - - nandc@ff3b0000 { - compatible = "rockchip,rk-nandc"; - reg = <0x00 0xff3b0000 0x00 0x4000>; - interrupts = <0x00 0x39 0x04>; - nandc_id = <0x00>; - clocks = <0x02 0x37 0x02 0xfe>; - clock-names = "clk_nandc\0hclk_nandc"; - assigned-clocks = <0x02 0x37>; - assigned-clock-parents = <0x02 0x4f>; - power-domains = <0x8a 0x0a>; - status = "disabled"; - phandle = <0x109>; - }; - - sfc@ff3a0000 { - compatible = "rockchip,sfc"; - reg = <0x00 0xff3a0000 0x00 0x4000>; - interrupts = <0x00 0x38 0x04>; - clocks = <0x02 0x3a 0x02 0x101>; - clock-names = "clk_sfc\0hclk_sfc"; - assigned-clocks = <0x02 0x3a>; - assigned-clock-rates = <0x989680>; - status = "disabled"; - phandle = <0x10a>; - }; - - gpu@ff400000 { - compatible = "arm,malit602\0arm,malit60x\0arm,malit6xx\0arm,mali-midgard"; - reg = <0x00 0xff400000 0x00 0x4000>; - interrupts = <0x00 0x2d 0x04 0x00 0x2e 0x04 0x00 0x2f 0x04>; - interrupt-names = "GPU\0MMU\0JOB"; - clocks = <0x02 0x49>; - clock-names = "clk_mali"; - power-domains = <0x8a 0x0e>; - #cooling-cells = <0x02>; - operating-points-v2 = <0x98>; - status = "okay"; - mali-supply = <0x0e>; - phandle = <0x85>; - - power_model { - compatible = "arm,mali-simple-power-model"; - static-coefficient = <0x64578>; - dynamic-coefficient = <0x2dd>; - ts = <0x7d00 0x125c 0xffffffb0 0x02>; - thermal-zone = "gpu-thermal"; - }; - }; - - gpu-opp-table { - compatible = "operating-points-v2"; - rockchip,thermal-zone = "soc-thermal"; - rockchip,temp-hysteresis = <0x1388>; - rockchip,low-temp = <0x00>; - rockchip,low-temp-min-volt = <0xf4240>; - rockchip,low-temp-adjust-volt = <0x00 0x1e0 0xc350>; - rockchip,max-volt = <0x11edd8>; - rockchip,evb-irdrop = <0x61a8>; - rockchip,pvtm-voltage-sel = <0x00 0xc350 0x00 0xc351 0xd2f0 0x01 0xd2f1 0xea60 0x02 0xea61 0x1869f 0x03>; - rockchip,pvtm-ch = <0x00 0x00>; - phandle = <0x98>; - - opp-400000000 { - opp-hz = <0x00 0x17d78400>; - opp-microvolt = <0x100590>; - opp-microvolt-L0 = <0x100590>; - opp-microvolt-L1 = <0xfa3e8>; - opp-microvolt-L2 = <0xee098>; - opp-microvolt-L3 = <0xe7ef0>; - }; - - opp-480000000 { - opp-hz = <0x00 0x1c9c3800>; - opp-microvolt = <0x112a88>; - opp-microvolt-L0 = <0x112a88>; - opp-microvolt-L1 = <0x10c8e0>; - opp-microvolt-L2 = <0x100590>; - opp-microvolt-L3 = <0xf4240>; - }; - - opp-520000000 { - opp-hz = <0x00 0x1efe9200>; - opp-microvolt = <0x118c30>; - opp-microvolt-L0 = <0x118c30>; - opp-microvolt-L1 = <0x118c30>; - opp-microvolt-L2 = <0x10c8e0>; - opp-microvolt-L3 = <0x100590>; - }; - }; - - hevc_service@ff440000 { - compatible = "rockchip,hevc_sub"; - iommu_enabled = <0x01>; - reg = <0x00 0xff440000 0x00 0x400>; - interrupts = <0x00 0x31 0x04>; - interrupt-names = "irq_dec"; - dev_mode = <0x01>; - iommus = <0x99>; - allocator = <0x01>; - phandle = <0x9c>; - }; - - vpu_service@ff442000 { - compatible = "rockchip,vpu_sub"; - iommu_enabled = <0x01>; - reg = <0x00 0xff442000 0x00 0x800>; - interrupts = <0x00 0x50 0x04 0x00 0x4f 0x04>; - interrupt-names = "irq_enc\0irq_dec"; - dev_mode = <0x00>; - iommus = <0x9a>; - allocator = <0x01>; - phandle = <0x9b>; - }; - - vpu_combo { - compatible = "rockchip,vpu_combo"; - subcnt = <0x02>; - rockchip,grf = <0x2f>; - rockchip,sub = <0x9b 0x9c>; - clocks = <0x02 0xaf 0x02 0xf4 0x02 0x4b>; - clock-names = "aclk_vcodec\0hclk_vcodec\0clk_core"; - resets = <0x02 0x24 0x02 0x26 0x02 0x25 0x02 0x27 0x02 0x3f>; - reset-names = "video_a\0video_h\0niu_a\0niu_h\0video_core"; - power-domains = <0x8a 0x0b>; - mode_bit = <0x0f>; - mode_ctrl = <0x410>; - status = "okay"; - phandle = <0x10b>; - }; - - iommu@ff440440 { - compatible = "rockchip,iommu"; - reg = <0x00 0xff440440 0x00 0x40 0x00 0xff440480 0x00 0x40>; - interrupts = <0x00 0x32 0x04>; - interrupt-names = "hevc_mmu"; - clocks = <0x02 0xaf 0x02 0xf4>; - clock-names = "aclk\0hclk"; - power-domains = <0x8a 0x0b>; - #iommu-cells = <0x00>; - phandle = <0x99>; - }; - - iommu@ff442800 { - compatible = "rockchip,iommu"; - reg = <0x00 0xff442800 0x00 0x100>; - interrupts = <0x00 0x51 0x04>; - interrupt-names = "vpu_mmu"; - clocks = <0x02 0xaf 0x02 0xf4>; - clock-names = "aclk\0hclk"; - power-domains = <0x8a 0x0b>; - #iommu-cells = <0x00>; - phandle = <0x9a>; - }; - - dsi@ff450000 { - compatible = "rockchip,px30-mipi-dsi"; - reg = <0x00 0xff450000 0x00 0x10000>; - interrupts = <0x00 0x4b 0x04>; - clocks = <0x02 0x144 0x4c>; - clock-names = "pclk\0hs_clk"; - resets = <0x02 0x3d>; - reset-names = "apb"; - phys = <0x4c>; - phy-names = "mipi_dphy"; - power-domains = <0x8a 0x0c>; - rockchip,grf = <0x2f>; - #address-cells = <0x01>; - #size-cells = <0x00>; - status = "okay"; - phandle = <0x10c>; - - ports { - #address-cells = <0x01>; - #size-cells = <0x00>; - - port@0 { - reg = <0x00>; - #address-cells = <0x01>; - #size-cells = <0x00>; - - endpoint@0 { - reg = <0x00>; - remote-endpoint = <0x13>; - status = "okay"; - phandle = <0xa3>; - }; - }; - }; - - panel@0 { - compatible = "sitronix,st7703\0simple-panel-dsi"; - reg = <0x00>; - backlight = <0x9d>; - power-supply = <0x9f>; - prepare-delay-ms = <0x14>; - reset-delay-ms = <0x14>; - init-delay-ms = <0x14>; - enable-delay-ms = <0x78>; - disable-delay-ms = <0x14>; - unprepare-delay-ms = <0x14>; - width-mm = <0x99>; - height-mm = <0x55>; - dsi,flags = <0xa03>; - dsi,format = <0x00>; - dsi,lanes = <0x04>; - panel-init-sequence = [05 fa 01 11 39 00 04 b9 f1 12 83 39 00 1c ba 33 81 05 f9 0e 0e 20 00 00 00 00 00 00 00 44 25 00 90 0a 00 00 01 4f 01 00 00 37 39 00 05 b8 25 22 f0 63 39 00 04 bf 02 11 00 39 00 0b b3 10 10 28 28 03 ff 00 00 00 00 39 00 0a c0 73 73 50 50 00 00 12 70 00 15 00 02 bc 46 15 00 02 cc 0b 15 00 02 b4 80 39 00 04 b2 3c 12 30 39 00 0f e3 07 07 0b 0b 03 0b 00 00 00 00 ff 00 c0 10 39 00 0d c1 36 00 32 32 77 f1 cc cc 77 77 33 33 39 00 03 b5 0a 0a 39 00 03 b6 88 88 39 00 40 e9 c8 10 0a 10 0f a1 80 12 31 23 47 86 a1 80 47 08 00 00 0d 00 00 00 00 00 0d 00 00 00 48 02 8b af 46 02 88 88 88 88 88 48 13 8b af 57 13 88 88 88 88 88 00 00 00 00 00 00 00 00 00 00 00 00 00 39 00 3e ea 96 12 01 01 01 78 02 00 00 00 00 00 4f 31 8b a8 31 75 88 88 88 88 88 4f 20 8b a8 20 64 88 88 88 88 88 23 00 00 01 02 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 40 a1 80 00 00 00 00 39 00 23 e0 00 0a 0f 29 3b 3f 42 39 06 0d 10 13 15 14 15 10 17 00 0a 0f 29 3b 3f 42 39 06 0d 10 13 15 14 15 10 17 05 32 01 29]; - panel-exit-sequence = <0x5140128 0x50a0110>; - reset-gpios = <0x97 0x10 0x01>; - - display-timings { - native-mode = <0xa0>; - - 60Hz { - clock-frequency = <0x22cf220>; - hactive = <0x2d0>; - vactive = <0x2d0>; - hfront-porch = <0x2d>; - hsync-len = <0x04>; - hback-porch = <0x2d>; - vfront-porch = <0x0f>; - vsync-len = <0x03>; - vback-porch = <0x0b>; - hsync-active = <0x00>; - vsync-active = <0x00>; - de-active = <0x00>; - pixelclk-active = <0x00>; - phandle = <0xa0>; - }; - }; - }; - }; - - vop@ff460000 { - compatible = "rockchip,px30-vop-big"; - reg = <0x00 0xff460000 0x00 0x1fc 0x00 0xff460a00 0x00 0x400>; - rockchip,grf = <0x2f>; - reg-names = "regs\0gamma_lut"; - interrupts = <0x00 0x4d 0x04>; - clocks = <0x02 0xb5 0x02 0x96 0x02 0xfb>; - clock-names = "aclk_vop\0dclk_vop\0hclk_vop"; - power-domains = <0x8a 0x0c>; - iommus = <0xa1>; - status = "okay"; - phandle = <0x10f>; - - port { - #address-cells = <0x01>; - #size-cells = <0x00>; - phandle = <0x10>; - - endpoint@0 { - reg = <0x00>; - remote-endpoint = <0xa2>; - phandle = <0x12>; - }; - - endpoint@1 { - reg = <0x01>; - remote-endpoint = <0xa3>; - phandle = <0x13>; - }; - - endpoint@2 { - reg = <0x02>; - remote-endpoint = <0xa4>; - phandle = <0x14>; - }; - }; - }; - - iommu@ff460f00 { - compatible = "rockchip,iommu"; - reg = <0x00 0xff460f00 0x00 0x100>; - interrupts = <0x00 0x4d 0x04>; - interrupt-names = "vopb_mmu"; - clocks = <0x02 0xb5 0x02 0xfb>; - clock-names = "aclk\0hclk"; - power-domains = <0x8a 0x0c>; - #iommu-cells = <0x00>; - status = "okay"; - phandle = <0xa1>; - }; - - rk_rga@ff480000 { - compatible = "rockchip,rga2"; - reg = <0x00 0xff480000 0x00 0x1000>; - interrupts = <0x00 0x4c 0x04>; - clocks = <0x02 0xb7 0x02 0xfd 0x02 0x35>; - clock-names = "aclk_rga\0hclk_rga\0clk_rga"; - power-domains = <0x8a 0x0c>; - dma-coherent; - status = "okay"; - phandle = <0x110>; - }; - - cif@ff490000 { - compatible = "rockchip,cif"; - reg = <0x00 0xff490000 0x00 0x200>; - interrupts = <0x00 0x45 0x04>; - clocks = <0x02 0xb3 0x02 0xf9 0x02 0x160 0x02 0x34>; - clock-names = "aclk_cif0\0hclk_cif0\0pclk_cif\0cif0_out"; - resets = <0x02 0x2c 0x02 0x2d 0x02 0x2e>; - reset-names = "rst_cif_a\0rst_cif_h\0rst_cif_pclkin"; - power-domains = <0x8a 0x0d>; - pinctrl-names = "cif_pin_all"; - pinctrl-0 = <0xa5>; - iommus = <0xa6>; - status = "disabled"; - phandle = <0x111>; - }; - - cif-new@ff490000 { - compatible = "rockchip,px30-cif"; - reg = <0x00 0xff490000 0x00 0x200>; - interrupts = <0x00 0x45 0x04>; - clocks = <0x02 0xb3 0x02 0xf9 0x02 0x160 0x02 0x34>; - clock-names = "aclk_cif\0hclk_cif\0pclk_cif\0cif_out"; - resets = <0x02 0x2c 0x02 0x2d 0x02 0x2e>; - reset-names = "rst_cif_a\0rst_cif_h\0rst_cif_pclkin"; - power-domains = <0x8a 0x0d>; - iommus = <0xa6>; - status = "disabled"; - phandle = <0x112>; - }; - - iommu@ff490800 { - compatible = "rockchip,iommu"; - reg = <0x00 0xff490800 0x00 0x100>; - interrupts = <0x00 0x45 0x04>; - interrupt-names = "vip_mmu"; - clocks = <0x02 0xb3 0x02 0xf9>; - clock-names = "aclk\0hclk"; - power-domains = <0x8a 0x0d>; - rk_iommu,disable_reset_quirk; - #iommu-cells = <0x00>; - status = "okay"; - phandle = <0xa6>; - }; - - rk_isp@ff4a0000 { - compatible = "rockchip,px30-isp\0rockchip,isp"; - reg = <0x00 0xff4a0000 0x00 0x8000>; - interrupts = <0x00 0x46 0x04>; - clocks = <0x02 0xb4 0x02 0xfa 0x02 0x33 0x02 0x33 0x02 0x15f 0x02 0x34 0x02 0x34 0x02 0x146>; - clock-names = "aclk_isp\0hclk_isp\0clk_isp\0clk_isp_jpe\0pclkin_isp\0clk_cif_pll\0clk_cif_out\0pclk_dphyrx"; - resets = <0x02 0x2b 0x02 0x2f>; - reset-names = "rst_isp\0rst_mipicsiphy"; - power-domains = <0x8a 0x0d>; - pinctrl-names = "default\0isp_dvp8bit2\0isp_dvp10bit\0isp_dvp12bit"; - pinctrl-0 = <0xa7>; - pinctrl-1 = <0xa5>; - pinctrl-2 = <0xa5 0xa8>; - pinctrl-3 = <0xa9 0xa5 0xa8>; - rockchip,isp,mipiphy = <0x01>; - rockchip,isp,csiphy,reg = <0xff2f0000 0x4000>; - rockchip,grf = <0x2f>; - rockchip,cru = <0x02>; - rockchip,isp,iommu-enable = <0x01>; - iommus = <0xaa>; - status = "disabled"; - phandle = <0x113>; - }; - - rkisp1@ff4a0000 { - compatible = "rockchip,rk3326-rkisp1"; - reg = <0x00 0xff4a0000 0x00 0x8000>; - interrupts = <0x00 0x46 0x04 0x00 0x49 0x04 0x00 0x4a 0x04>; - interrupt-names = "isp_irq\0mi_irq\0mipi_irq"; - clocks = <0x02 0xb4 0x02 0xfa 0x02 0x33 0x02 0x15f>; - clock-names = "aclk_isp\0hclk_isp\0clk_isp\0pclk_isp"; - devfreq = <0xab>; - power-domains = <0x8a 0x0d>; - iommus = <0xaa>; - rockchip,grf = <0x2f>; - status = "okay"; - phandle = <0x114>; - }; - - iommu@ff4a8000 { - compatible = "rockchip,iommu"; - reg = <0x00 0xff4a8000 0x00 0x100>; - interrupts = <0x00 0x46 0x04>; - interrupt-names = "isp_mmu"; - clocks = <0x02 0xb4 0x02 0xfa>; - clock-names = "aclk\0hclk"; - power-domains = <0x8a 0x0d>; - rk_iommu,disable_reset_quirk; - #iommu-cells = <0x00>; - status = "okay"; - phandle = <0xaa>; - }; - - qos@ff518000 { - compatible = "syscon"; - reg = <0x00 0xff518000 0x00 0x20>; - phandle = <0x18>; - }; - - qos@ff520000 { - compatible = "syscon"; - reg = <0x00 0xff520000 0x00 0x20>; - phandle = <0x28>; - }; - - qos@ff52c000 { - compatible = "syscon"; - reg = <0x00 0xff52c000 0x00 0x20>; - phandle = <0x17>; - }; - - qos@ff538000 { - compatible = "syscon"; - reg = <0x00 0xff538000 0x00 0x20>; - phandle = <0x19>; - }; - - qos@ff538080 { - compatible = "syscon"; - reg = <0x00 0xff538080 0x00 0x20>; - phandle = <0x1a>; - }; - - qos@ff538100 { - compatible = "syscon"; - reg = <0x00 0xff538100 0x00 0x20>; - phandle = <0x1b>; - }; - - qos@ff538180 { - compatible = "syscon"; - reg = <0x00 0xff538180 0x00 0x20>; - phandle = <0x1c>; - }; - - qos@ff540000 { - compatible = "syscon"; - reg = <0x00 0xff540000 0x00 0x20>; - phandle = <0x15>; - }; - - qos@ff540080 { - compatible = "syscon"; - reg = <0x00 0xff540080 0x00 0x20>; - phandle = <0x16>; - }; - - qos@ff548000 { - compatible = "syscon"; - reg = <0x00 0xff548000 0x00 0x20>; - phandle = <0x23>; - }; - - qos@ff548080 { - compatible = "syscon"; - reg = <0x00 0xff548080 0x00 0x20>; - phandle = <0x24>; - }; - - qos@ff548100 { - compatible = "syscon"; - reg = <0x00 0xff548100 0x00 0x20>; - phandle = <0x25>; - }; - - qos@ff548180 { - compatible = "syscon"; - reg = <0x00 0xff548180 0x00 0x20>; - phandle = <0x26>; - }; - - qos@ff548200 { - compatible = "syscon"; - reg = <0x00 0xff548200 0x00 0x20>; - phandle = <0x27>; - }; - - qos@ff550000 { - compatible = "syscon"; - reg = <0x00 0xff550000 0x00 0x20>; - phandle = <0x1f>; - }; - - qos@ff550080 { - compatible = "syscon"; - reg = <0x00 0xff550080 0x00 0x20>; - phandle = <0x20>; - }; - - qos@ff550100 { - compatible = "syscon"; - reg = <0x00 0xff550100 0x00 0x20>; - phandle = <0x21>; - }; - - qos@ff550180 { - compatible = "syscon"; - reg = <0x00 0xff550180 0x00 0x20>; - phandle = <0x22>; - }; - - qos@ff558000 { - compatible = "syscon"; - reg = <0x00 0xff558000 0x00 0x20>; - phandle = <0x1d>; - }; - - qos@ff558080 { - compatible = "syscon"; - reg = <0x00 0xff558080 0x00 0x20>; - phandle = <0x1e>; - }; - - dfi@ff610000 { - reg = <0x00 0xff610000 0x00 0x400>; - compatible = "rockchip,px30-dfi"; - rockchip,pmugrf = <0xac>; - status = "okay"; - phandle = <0xad>; - }; - - dmc { - compatible = "rockchip,px30-dmc"; - interrupts = <0x00 0x69 0x04>; - interrupt-names = "complete_irq"; - devfreq-events = <0xad>; - clocks = <0x02 0x54>; - clock-names = "dmc_clk"; - operating-points-v2 = <0xae>; - ddr_timing = <0xaf>; - upthreshold = <0x28>; - downdifferential = <0x14>; - system-status-freq = <0x01 0x80e80 0x08 0x6ddd0 0x02 0x2f5d0 0x20 0x6ddd0 0x1000 0x80e80 0x4000 0xa2990 0x2000 0xa2990>; - auto-min-freq = <0x50140>; - auto-freq-en = <0x01>; - #cooling-cells = <0x02>; - status = "okay"; - center-supply = <0x0e>; - phandle = <0xab>; - - ddr_power_model { - compatible = "ddr_power_model"; - dynamic-power-coefficient = <0x78>; - static-power-coefficient = <0xc8>; - ts = <0x7d00 0x125c 0xffffffb0 0x02>; - thermal-zone = "soc-thermal"; - phandle = <0x115>; - }; - }; - - dmc-opp-table { - compatible = "operating-points-v2"; - rockchip,max-volt = <0x118c30>; - rockchip,evb-irdrop = <0x61a8>; - rockchip,pvtm-voltage-sel = <0x00 0xc350 0x00 0xc351 0xd2f0 0x01 0xd2f1 0xea60 0x02 0xea61 0x1869f 0x03>; - rockchip,pvtm-ch = <0x00 0x00>; - phandle = <0xae>; - - opp-528000000 { - opp-hz = <0x00 0x1f78a400>; - opp-microvolt = <0xee098>; - opp-microvolt-L0 = <0xee098>; - opp-microvolt-L1 = <0xee098>; - opp-microvolt-L2 = <0xe7ef0>; - opp-microvolt-L3 = <0xe7ef0>; - }; - - opp-666000000 { - opp-hz = <0x00 0x27b25a80>; - opp-microvolt = <0x100590>; - opp-microvolt-L0 = <0x100590>; - opp-microvolt-L1 = <0xf4240>; - opp-microvolt-L2 = <0xee098>; - opp-microvolt-L3 = <0xe7ef0>; - }; - - opp-786000000 { - opp-hz = <0x00 0x2ed96880>; - opp-microvolt = <0x10c8e0>; - opp-microvolt-L0 = <0x10c8e0>; - opp-microvolt-L1 = <0x100590>; - opp-microvolt-L2 = <0xfa3e8>; - opp-microvolt-L3 = <0xf4240>; - status = "okay"; - }; - }; - - rockchip-system-monitor { - compatible = "rockchip,system-monitor"; - rockchip,thermal-zone = "soc-thermal"; - rockchip,polling-delay = <0xc8>; - phandle = <0x116>; - }; - - pinctrl { - compatible = "rockchip,px30-pinctrl"; - rockchip,grf = <0x2f>; - rockchip,pmu = <0xac>; - #address-cells = <0x02>; - #size-cells = <0x02>; - ranges; - phandle = <0x117>; - - gpio0@ff040000 { - compatible = "rockchip,gpio-bank"; - reg = <0x00 0xff040000 0x00 0x100>; - interrupts = <0x00 0x03 0x04>; - clocks = <0x2a 0x14>; - gpio-controller; - #gpio-cells = <0x02>; - interrupt-controller; - #interrupt-cells = <0x02>; - phandle = <0x5c>; - }; - - gpio1@ff250000 { - compatible = "rockchip,gpio-bank"; - reg = <0x00 0xff250000 0x00 0x100>; - interrupts = <0x00 0x04 0x04>; - clocks = <0x02 0x15c>; - gpio-controller; - #gpio-cells = <0x02>; - interrupt-controller; - #interrupt-cells = <0x02>; - phandle = <0xbf>; - }; - - gpio2@ff260000 { - compatible = "rockchip,gpio-bank"; - reg = <0x00 0xff260000 0x00 0x100>; - interrupts = <0x00 0x05 0x04>; - clocks = <0x02 0x15d>; - gpio-controller; - #gpio-cells = <0x02>; - interrupt-controller; - #interrupt-cells = <0x02>; - phandle = <0x66>; - }; - - gpio3@ff270000 { - compatible = "rockchip,gpio-bank"; - reg = <0x00 0xff270000 0x00 0x100>; - interrupts = <0x00 0x06 0x04>; - clocks = <0x02 0x15e>; - gpio-controller; - #gpio-cells = <0x02>; - interrupt-controller; - #interrupt-cells = <0x02>; - phandle = <0x97>; - }; - - pcfg-pull-up { - bias-pull-up; - phandle = <0xb2>; - }; - - pcfg-pull-down { - bias-pull-down; - phandle = <0x118>; - }; - - pcfg-pull-none { - bias-disable; - phandle = <0xb1>; - }; - - pcfg-pull-none-2ma { - bias-disable; - drive-strength = <0x02>; - phandle = <0x119>; - }; - - pcfg-pull-up-2ma { - bias-pull-up; - drive-strength = <0x02>; - phandle = <0x11a>; - }; - - pcfg-pull-up-4ma { - bias-pull-up; - drive-strength = <0x04>; - phandle = <0xb3>; - }; - - pcfg-pull-none-4ma { - bias-disable; - drive-strength = <0x04>; - phandle = <0x11b>; - }; - - pcfg-pull-down-4ma { - bias-pull-down; - drive-strength = <0x04>; - phandle = <0x11c>; - }; - - pcfg-pull-none-8ma { - bias-disable; - drive-strength = <0x08>; - phandle = <0xb6>; - }; - - pcfg-pull-up-8ma { - bias-pull-up; - drive-strength = <0x08>; - phandle = <0xb4>; - }; - - pcfg-pull-none-12ma { - bias-disable; - drive-strength = <0x0c>; - phandle = <0xb8>; - }; - - pcfg-pull-up-12ma { - bias-pull-up; - drive-strength = <0x0c>; - phandle = <0xb7>; - }; - - pcfg-pull-none-smt { - bias-disable; - input-schmitt-enable; - phandle = <0xb0>; - }; - - pcfg-output-high { - output-high; - phandle = <0x11d>; - }; - - pcfg-output-low { - output-low; - phandle = <0xb9>; - }; - - pcfg-input-high { - bias-pull-up; - input-enable; - phandle = <0xb5>; - }; - - pcfg-input { - input-enable; - phandle = <0x11e>; - }; - - i2c0 { - - i2c0-xfer { - rockchip,pins = <0x00 0x08 0x01 0xb0 0x00 0x09 0x01 0xb0>; - phandle = <0x5b>; - }; - }; - - i2c1 { - - i2c1-xfer { - rockchip,pins = <0x00 0x12 0x01 0xb0 0x00 0x13 0x01 0xb0>; - phandle = <0x69>; - }; - }; - - i2c2 { - - i2c2-xfer { - rockchip,pins = <0x02 0x0f 0x02 0xb0 0x02 0x10 0x02 0xb0>; - phandle = <0x6a>; - }; - }; - - i2c3 { - - i2c3-xfer { - rockchip,pins = <0x01 0x0c 0x04 0xb0 0x01 0x0d 0x04 0xb0>; - phandle = <0x6b>; - }; - }; - - tsadc { - - tsadc-otp-gpio { - rockchip,pins = <0x00 0x06 0x00 0xb1>; - phandle = <0x86>; - }; - - tsadc-otp-out { - rockchip,pins = <0x00 0x06 0x01 0xb1>; - phandle = <0x87>; - }; - }; - - uart0 { - - uart0-xfer { - rockchip,pins = <0x00 0x0a 0x01 0xb2 0x00 0x0b 0x01 0xb2>; - phandle = <0x2c>; - }; - - uart0-cts { - rockchip,pins = <0x00 0x0c 0x01 0xb1>; - phandle = <0x2d>; - }; - - uart0-rts { - rockchip,pins = <0x00 0x0d 0x01 0xb1>; - phandle = <0x2e>; - }; - - uart0-rts-gpio { - rockchip,pins = <0x00 0x0d 0x00 0xb1>; - phandle = <0x11f>; - }; - }; - - uart1 { - - uart1-xfer { - rockchip,pins = <0x01 0x11 0x01 0xb2 0x01 0x10 0x01 0xb2>; - phandle = <0x4f>; - }; - - uart1-cts { - rockchip,pins = <0x01 0x12 0x01 0xb1>; - phandle = <0x50>; - }; - - uart1-rts { - rockchip,pins = <0x01 0x13 0x01 0xb1>; - phandle = <0x120>; - }; - - uart1-rts-gpio { - rockchip,pins = <0x01 0x13 0x00 0xb1>; - phandle = <0x121>; - }; - }; - - uart2-m0 { - - uart2m0-xfer { - rockchip,pins = <0x01 0x1a 0x02 0xb2 0x01 0x1b 0x02 0xb2>; - phandle = <0x51>; - }; - }; - - uart2-m1 { - - uart2m1-xfer { - rockchip,pins = <0x02 0x0c 0x02 0xb2 0x02 0x0e 0x02 0xb2>; - phandle = <0xba>; - }; - }; - - uart3-m0 { - - uart3m0-xfer { - rockchip,pins = <0x00 0x10 0x02 0xb2 0x00 0x11 0x02 0xb2>; - phandle = <0x122>; - }; - - uart3m0-cts { - rockchip,pins = <0x00 0x12 0x02 0xb1>; - phandle = <0x123>; - }; - - uart3m0-rts { - rockchip,pins = <0x00 0x13 0x02 0xb1>; - phandle = <0x124>; - }; - - uart3m0-rts-gpio { - rockchip,pins = <0x00 0x13 0x00 0xb1>; - phandle = <0x125>; - }; - }; - - uart3-m1 { - - uart3m1-xfer { - rockchip,pins = <0x01 0x0e 0x02 0xb2 0x01 0x0f 0x02 0xb2>; - phandle = <0x52>; - }; - - uart3m1-cts { - rockchip,pins = <0x01 0x0c 0x02 0xb1>; - phandle = <0x53>; - }; - - uart3m1-rts { - rockchip,pins = <0x01 0x0d 0x02 0xb1>; - phandle = <0x54>; - }; - - uart3m1-rts-gpio { - rockchip,pins = <0x01 0x0d 0x00 0xb1>; - phandle = <0x126>; - }; - }; - - uart4 { - - uart4-xfer { - rockchip,pins = <0x01 0x1c 0x02 0xb2 0x01 0x1d 0x02 0xb2>; - phandle = <0x55>; - }; - - uart4-cts { - rockchip,pins = <0x01 0x1e 0x02 0xb1>; - phandle = <0x56>; - }; - - uart4-rts { - rockchip,pins = <0x01 0x1f 0x02 0xb1>; - phandle = <0x57>; - }; - }; - - uart5 { - - uart5-xfer { - rockchip,pins = <0x03 0x02 0x04 0xb2 0x03 0x01 0x04 0xb2>; - phandle = <0x58>; - }; - - uart5-cts { - rockchip,pins = <0x03 0x03 0x04 0xb1>; - phandle = <0x59>; - }; - - uart5-rts { - rockchip,pins = <0x03 0x05 0x04 0xb1>; - phandle = <0x5a>; - }; - }; - - spi0 { - - spi0-clk { - rockchip,pins = <0x01 0x0f 0x03 0xb3>; - phandle = <0x6c>; - }; - - spi0-csn { - rockchip,pins = <0x01 0x0e 0x03 0xb3>; - phandle = <0x6d>; - }; - - spi0-miso { - rockchip,pins = <0x01 0x0d 0x03 0xb3>; - phandle = <0x6e>; - }; - - spi0-mosi { - rockchip,pins = <0x01 0x0c 0x03 0xb3>; - phandle = <0x6f>; - }; - - spi0-clk-hs { - rockchip,pins = <0x01 0x0f 0x03 0xb4>; - phandle = <0x70>; - }; - - spi0-miso-hs { - rockchip,pins = <0x01 0x0d 0x03 0xb4>; - phandle = <0x71>; - }; - - spi0-mosi-hs { - rockchip,pins = <0x01 0x0c 0x03 0xb4>; - phandle = <0x72>; - }; - }; - - spi1 { - - spi1-clk { - rockchip,pins = <0x03 0x0f 0x04 0xb3>; - phandle = <0x73>; - }; - - spi1-csn0 { - rockchip,pins = <0x03 0x09 0x04 0xb3>; - phandle = <0x74>; - }; - - spi1-csn1 { - rockchip,pins = <0x03 0x0a 0x02 0xb3>; - phandle = <0x75>; - }; - - spi1-miso { - rockchip,pins = <0x03 0x0e 0x04 0xb3>; - phandle = <0x76>; - }; - - spi1-mosi { - rockchip,pins = <0x03 0x0c 0x04 0xb3>; - phandle = <0x77>; - }; - - spi1-clk-hs { - rockchip,pins = <0x03 0x0f 0x04 0xb4>; - phandle = <0x78>; - }; - - spi1-miso-hs { - rockchip,pins = <0x03 0x0e 0x04 0xb4>; - phandle = <0x79>; - }; - - spi1-mosi-hs { - rockchip,pins = <0x03 0x0c 0x04 0xb4>; - phandle = <0x7a>; - }; - }; - - pdm { - - pdm-clk0m0 { - rockchip,pins = <0x03 0x16 0x02 0xb1>; - phandle = <0x44>; - }; - - pdm-clk0m1 { - rockchip,pins = <0x02 0x16 0x01 0xb1>; - phandle = <0x127>; - }; - - pdm-clk1 { - rockchip,pins = <0x03 0x17 0x02 0xb1>; - phandle = <0x45>; - }; - - pdm-sdi0m0 { - rockchip,pins = <0x03 0x1b 0x02 0xb1>; - phandle = <0x46>; - }; - - pdm-sdi0m1 { - rockchip,pins = <0x02 0x15 0x02 0xb1>; - phandle = <0x128>; - }; - - pdm-sdi1 { - rockchip,pins = <0x03 0x18 0x02 0xb1>; - phandle = <0x47>; - }; - - pdm-sdi2 { - rockchip,pins = <0x03 0x19 0x02 0xb1>; - phandle = <0x48>; - }; - - pdm-sdi3 { - rockchip,pins = <0x03 0x1a 0x02 0xb1>; - phandle = <0x49>; - }; - - pdm-clk0m0-sleep { - rockchip,pins = <0x03 0x16 0x00 0xb5>; - phandle = <0x129>; - }; - - pdm-clk0m1-sleep { - rockchip,pins = <0x02 0x16 0x00 0xb5>; - phandle = <0x12a>; - }; - - pdm-clk1-sleep { - rockchip,pins = <0x03 0x17 0x00 0xb5>; - phandle = <0x12b>; - }; - - pdm-sdi0m0-sleep { - rockchip,pins = <0x03 0x1b 0x00 0xb5>; - phandle = <0x12c>; - }; - - pdm-sdi0m1-sleep { - rockchip,pins = <0x02 0x15 0x00 0xb5>; - phandle = <0x12d>; - }; - - pdm-sdi1-sleep { - rockchip,pins = <0x03 0x18 0x00 0xb5>; - phandle = <0x12e>; - }; - - pdm-sdi2-sleep { - rockchip,pins = <0x03 0x19 0x00 0xb5>; - phandle = <0x12f>; - }; - - pdm-sdi3-sleep { - rockchip,pins = <0x03 0x1a 0x00 0xb5>; - phandle = <0x130>; - }; - }; - - i2s0 { - - i2s0-8ch-mclk { - rockchip,pins = <0x03 0x11 0x02 0xb1>; - phandle = <0x131>; - }; - - i2s0-8ch-sclktx { - rockchip,pins = <0x03 0x13 0x02 0xb1>; - phandle = <0x30>; - }; - - i2s0-8ch-sclkrx { - rockchip,pins = <0x03 0x0c 0x02 0xb1>; - phandle = <0x31>; - }; - - i2s0-8ch-lrcktx { - rockchip,pins = <0x03 0x12 0x02 0xb1>; - phandle = <0x32>; - }; - - i2s0-8ch-lrckrx { - rockchip,pins = <0x03 0x0d 0x02 0xb1>; - phandle = <0x33>; - }; - - i2s0-8ch-sdo0 { - rockchip,pins = <0x03 0x14 0x02 0xb1>; - phandle = <0x38>; - }; - - i2s0-8ch-sdo1 { - rockchip,pins = <0x03 0x10 0x02 0xb1>; - phandle = <0x39>; - }; - - i2s0-8ch-sdo2 { - rockchip,pins = <0x03 0x0f 0x02 0xb1>; - phandle = <0x3a>; - }; - - i2s0-8ch-sdo3 { - rockchip,pins = <0x03 0x0e 0x02 0xb1>; - phandle = <0x3b>; - }; - - i2s0-8ch-sdi0 { - rockchip,pins = <0x03 0x15 0x02 0xb1>; - phandle = <0x34>; - }; - - i2s0-8ch-sdi1 { - rockchip,pins = <0x03 0x0b 0x02 0xb1>; - phandle = <0x35>; - }; - - i2s0-8ch-sdi2 { - rockchip,pins = <0x03 0x09 0x02 0xb1>; - phandle = <0x36>; - }; - - i2s0-8ch-sdi3 { - rockchip,pins = <0x03 0x08 0x02 0xb1>; - phandle = <0x37>; - }; - }; - - i2s1 { - - i2s1-2ch-mclk { - rockchip,pins = <0x02 0x13 0x01 0xb1>; - phandle = <0x68>; - }; - - i2s1-2ch-sclk { - rockchip,pins = <0x02 0x12 0x01 0xb1>; - phandle = <0x3c>; - }; - - i2s1-2ch-lrck { - rockchip,pins = <0x02 0x11 0x01 0xb1>; - phandle = <0x3d>; - }; - - i2s1-2ch-sdi { - rockchip,pins = <0x02 0x15 0x01 0xb1>; - phandle = <0x3e>; - }; - - i2s1-2ch-sdo { - rockchip,pins = <0x02 0x14 0x01 0xb1>; - phandle = <0x3f>; - }; - }; - - i2s2 { - - i2s2-2ch-mclk { - rockchip,pins = <0x03 0x01 0x02 0xb1>; - phandle = <0x132>; - }; - - i2s2-2ch-sclk { - rockchip,pins = <0x03 0x02 0x02 0xb1>; - phandle = <0x40>; - }; - - i2s2-2ch-lrck { - rockchip,pins = <0x03 0x03 0x02 0xb1>; - phandle = <0x41>; - }; - - i2s2-2ch-sdi { - rockchip,pins = <0x03 0x05 0x02 0xb1>; - phandle = <0x42>; - }; - - i2s2-2ch-sdo { - rockchip,pins = <0x03 0x07 0x02 0xb1>; - phandle = <0x43>; - }; - }; - - sdmmc { - - sdmmc-clk { - rockchip,pins = <0x01 0x1e 0x01 0xb6>; - phandle = <0x8f>; - }; - - sdmmc-cmd { - rockchip,pins = <0x01 0x1f 0x01 0xb4>; - phandle = <0x90>; - }; - - sdmmc-det { - rockchip,pins = <0x00 0x03 0x01 0xb4>; - phandle = <0x91>; - }; - - sdmmc-bus1 { - rockchip,pins = <0x01 0x1a 0x01 0xb4>; - phandle = <0x133>; - }; - - sdmmc-bus4 { - rockchip,pins = <0x01 0x1a 0x01 0xb4 0x01 0x1b 0x01 0xb4 0x01 0x1c 0x01 0xb4 0x01 0x1d 0x01 0xb4>; - phandle = <0x92>; - }; - - sdmmc-gpio { - rockchip,pins = <0x01 0x1a 0x00 0xb3 0x01 0x1b 0x00 0xb3 0x01 0x1c 0x00 0xb3 0x01 0x1d 0x00 0xb3 0x01 0x1e 0x00 0xb3 0x01 0x1f 0x00 0xb3>; - phandle = <0x134>; - }; - }; - - sdio { - - sdio-clk { - rockchip,pins = <0x01 0x15 0x01 0xb1>; - phandle = <0x96>; - }; - - sdio-cmd { - rockchip,pins = <0x01 0x14 0x01 0xb2>; - phandle = <0x95>; - }; - - sdio-bus4 { - rockchip,pins = <0x01 0x16 0x01 0xb2 0x01 0x17 0x01 0xb2 0x01 0x18 0x01 0xb2 0x01 0x19 0x01 0xb2>; - phandle = <0x94>; - }; - - sdio-gpio { - rockchip,pins = <0x01 0x16 0x00 0xb2 0x01 0x17 0x00 0xb2 0x01 0x18 0x00 0xb2 0x01 0x19 0x00 0xb2 0x01 0x14 0x00 0xb2 0x01 0x15 0x00 0xb2>; - phandle = <0x135>; - }; - }; - - emmc { - - emmc-clk { - rockchip,pins = <0x01 0x09 0x02 0xb6>; - phandle = <0x136>; - }; - - emmc-cmd { - rockchip,pins = <0x01 0x0a 0x02 0xb4>; - phandle = <0x137>; - }; - - emmc-pwren { - rockchip,pins = <0x01 0x08 0x02 0xb1>; - phandle = <0x138>; - }; - - emmc-rstnout { - rockchip,pins = <0x01 0x0b 0x02 0xb1>; - phandle = <0x139>; - }; - - emmc-bus1 { - rockchip,pins = <0x01 0x00 0x02 0xb4>; - phandle = <0x13a>; - }; - - emmc-bus4 { - rockchip,pins = <0x01 0x00 0x02 0xb4 0x01 0x01 0x02 0xb4 0x01 0x02 0x02 0xb4 0x01 0x03 0x02 0xb4>; - phandle = <0x13b>; - }; - - emmc-bus8 { - rockchip,pins = <0x01 0x00 0x02 0xb4 0x01 0x01 0x02 0xb4 0x01 0x02 0x02 0xb4 0x01 0x03 0x02 0xb4 0x01 0x04 0x02 0xb4 0x01 0x05 0x02 0xb4 0x01 0x06 0x02 0xb4 0x01 0x07 0x02 0xb4>; - phandle = <0x13c>; - }; - }; - - flash { - - flash-cs0 { - rockchip,pins = <0x01 0x08 0x01 0xb1>; - phandle = <0x13d>; - }; - - flash-rdy { - rockchip,pins = <0x01 0x09 0x01 0xb1>; - phandle = <0x13e>; - }; - - flash-dqs { - rockchip,pins = <0x01 0x0a 0x01 0xb1>; - phandle = <0x13f>; - }; - - flash-ale { - rockchip,pins = <0x01 0x0b 0x01 0xb1>; - phandle = <0x140>; - }; - - flash-cle { - rockchip,pins = <0x01 0x0c 0x01 0xb1>; - phandle = <0x141>; - }; - - flash-wrn { - rockchip,pins = <0x01 0x0d 0x01 0xb1>; - phandle = <0x142>; - }; - - flash-csl { - rockchip,pins = <0x01 0x0e 0x01 0xb1>; - phandle = <0x143>; - }; - - flash-rdn { - rockchip,pins = <0x01 0x0f 0x01 0xb1>; - phandle = <0x144>; - }; - - flash-bus8 { - rockchip,pins = <0x01 0x00 0x01 0xb7 0x01 0x01 0x01 0xb7 0x01 0x02 0x01 0xb7 0x01 0x03 0x01 0xb7 0x01 0x04 0x01 0xb7 0x01 0x05 0x01 0xb7 0x01 0x06 0x01 0xb7 0x01 0x07 0x01 0xb7>; - phandle = <0x145>; - }; - }; - - lcdc { - - lcdc-m0-rgb-pins { - rockchip,pins = <0x03 0x00 0x01 0xb6 0x03 0x01 0x01 0xb6 0x03 0x02 0x01 0xb6 0x03 0x03 0x01 0xb6 0x03 0x04 0x01 0xb6 0x03 0x05 0x01 0xb6 0x03 0x06 0x01 0xb6 0x03 0x07 0x01 0xb6 0x03 0x08 0x01 0xb6 0x03 0x09 0x01 0xb6 0x03 0x0a 0x01 0xb6 0x03 0x0b 0x01 0xb6 0x03 0x0c 0x01 0xb6 0x03 0x0d 0x01 0xb6 0x03 0x0e 0x01 0xb6 0x03 0x0f 0x01 0xb6 0x03 0x10 0x01 0xb6 0x03 0x11 0x01 0xb6 0x03 0x12 0x01 0xb6 0x03 0x13 0x01 0xb6 0x03 0x14 0x01 0xb6 0x03 0x15 0x01 0xb6 0x03 0x16 0x01 0xb6 0x03 0x17 0x01 0xb6 0x03 0x18 0x01 0xb6 0x03 0x19 0x01 0xb6 0x03 0x1a 0x01 0xb6 0x03 0x1b 0x01 0xb6>; - phandle = <0x146>; - }; - - lcdc-m0-sleep-pins { - rockchip,pins = <0x03 0x00 0x00 0xb1 0x03 0x01 0x00 0xb1 0x03 0x02 0x00 0xb1 0x03 0x03 0x00 0xb1 0x03 0x04 0x00 0xb1 0x03 0x05 0x00 0xb1 0x03 0x06 0x00 0xb1 0x03 0x07 0x00 0xb1 0x03 0x08 0x00 0xb1 0x03 0x09 0x00 0xb1 0x03 0x0a 0x00 0xb1 0x03 0x0b 0x00 0xb1 0x03 0x0c 0x00 0xb1 0x03 0x0d 0x00 0xb1 0x03 0x0e 0x00 0xb1 0x03 0x0f 0x00 0xb1 0x03 0x10 0x00 0xb1 0x03 0x11 0x00 0xb1 0x03 0x12 0x00 0xb1 0x03 0x13 0x00 0xb1 0x03 0x14 0x00 0xb1 0x03 0x15 0x00 0xb1 0x03 0x16 0x00 0xb1 0x03 0x17 0x00 0xb1 0x03 0x18 0x00 0xb1 0x03 0x19 0x00 0xb1 0x03 0x1a 0x00 0xb1 0x03 0x1b 0x00 0xb1>; - phandle = <0x147>; - }; - - lcdc-m1-rgb-pins { - rockchip,pins = <0x03 0x00 0x01 0xb6 0x03 0x04 0x01 0xb6 0x03 0x06 0x01 0xb6 0x03 0x0a 0x01 0xb6 0x03 0x0b 0x01 0xb6 0x03 0x0d 0x01 0xb6 0x03 0x10 0x01 0xb6 0x03 0x11 0x01 0xb6 0x03 0x12 0x01 0xb6 0x03 0x13 0x01 0xb6 0x03 0x14 0x01 0xb6 0x03 0x15 0x01 0xb6 0x03 0x16 0x01 0xb6 0x03 0x17 0x01 0xb6 0x03 0x18 0x01 0xb6 0x03 0x19 0x01 0xb6 0x03 0x1a 0x01 0xb6 0x03 0x1b 0x01 0xb6>; - phandle = <0x4d>; - }; - - lcdc-m1-sleep-pins { - rockchip,pins = <0x03 0x00 0x00 0xb1 0x03 0x04 0x00 0xb1 0x03 0x06 0x00 0xb1 0x03 0x0a 0x00 0xb1 0x03 0x0b 0x00 0xb1 0x03 0x0d 0x00 0xb1 0x03 0x10 0x00 0xb1 0x03 0x11 0x00 0xb1 0x03 0x12 0x00 0xb1 0x03 0x13 0x00 0xb1 0x03 0x14 0x00 0xb1 0x03 0x15 0x00 0xb1 0x03 0x16 0x00 0xb1 0x03 0x17 0x00 0xb1 0x03 0x18 0x00 0xb1 0x03 0x19 0x00 0xb1 0x03 0x1a 0x00 0xb1 0x03 0x1b 0x00 0xb1>; - phandle = <0x4e>; - }; - }; - - pwm0 { - - pwm0-pin { - rockchip,pins = <0x00 0x0f 0x01 0xb1>; - phandle = <0x7b>; - }; - }; - - pwm1 { - - pwm1-pin { - rockchip,pins = <0x00 0x10 0x01 0xb1>; - phandle = <0x7c>; - }; - }; - - pwm2 { - - pwm2-pin { - rockchip,pins = <0x02 0x0d 0x01 0xb1>; - phandle = <0x7d>; - }; - }; - - pwm3 { - - pwm3-pin { - rockchip,pins = <0x00 0x11 0x01 0xb1>; - phandle = <0x7e>; - }; - }; - - pwm4 { - - pwm4-pin { - rockchip,pins = <0x03 0x12 0x03 0xb1>; - phandle = <0x7f>; - }; - }; - - pwm5 { - - pwm5-pin { - rockchip,pins = <0x03 0x13 0x03 0xb1>; - phandle = <0x80>; - }; - }; - - pwm6 { - - pwm6-pin { - rockchip,pins = <0x03 0x14 0x03 0xb1>; - phandle = <0x81>; - }; - }; - - pwm7 { - - pwm7-pin { - rockchip,pins = <0x03 0x15 0x03 0xb1>; - phandle = <0x82>; - }; - }; - - gmac { - - rmii-pins { - rockchip,pins = <0x02 0x00 0x02 0xb8 0x02 0x01 0x02 0xb8 0x02 0x02 0x02 0xb8 0x02 0x03 0x02 0xb1 0x02 0x04 0x02 0xb1 0x02 0x05 0x02 0xb1 0x02 0x06 0x02 0xb1 0x02 0x07 0x02 0xb1 0x02 0x09 0x02 0xb1>; - phandle = <0x8d>; - }; - - mac-refclk-12ma { - rockchip,pins = <0x02 0x0a 0x02 0xb8>; - phandle = <0x8e>; - }; - - mac-refclk { - rockchip,pins = <0x02 0x0a 0x02 0xb1>; - phandle = <0x148>; - }; - }; - - cif-m0 { - - cif-clkout-m0 { - rockchip,pins = <0x02 0x0b 0x01 0xb8>; - phandle = <0xa7>; - }; - - dvp-d2d9-m0 { - rockchip,pins = <0x02 0x00 0x01 0xb1 0x02 0x01 0x01 0xb1 0x02 0x02 0x01 0xb1 0x02 0x03 0x01 0xb1 0x02 0x04 0x01 0xb1 0x02 0x05 0x01 0xb1 0x02 0x06 0x01 0xb1 0x02 0x07 0x01 0xb1 0x02 0x08 0x01 0xb1 0x02 0x09 0x01 0xb1 0x02 0x0a 0x01 0xb1 0x02 0x0b 0x01 0xb1>; - phandle = <0xa5>; - }; - - dvp-d0d1-m0 { - rockchip,pins = <0x02 0x0c 0x01 0xb1 0x02 0x0e 0x01 0xb1>; - phandle = <0xa9>; - }; - - d10-d11-m0 { - rockchip,pins = <0x02 0x0f 0x01 0xb1 0x02 0x10 0x01 0xb1>; - phandle = <0xa8>; - }; - }; - - cif-m1 { - - cif-clkout-m1 { - rockchip,pins = <0x03 0x18 0x03 0xb1>; - phandle = <0x149>; - }; - - dvp-d2d9-m1 { - rockchip,pins = <0x03 0x03 0x03 0xb1 0x03 0x05 0x03 0xb1 0x03 0x07 0x03 0xb1 0x03 0x08 0x03 0xb1 0x03 0x09 0x03 0xb1 0x03 0x0c 0x03 0xb1 0x03 0x0e 0x03 0xb1 0x03 0x0f 0x03 0xb1 0x03 0x19 0x03 0xb1 0x03 0x1a 0x03 0xb1 0x03 0x1b 0x03 0xb1 0x03 0x18 0x03 0xb1>; - phandle = <0x14a>; - }; - - dvp-d0d1-m1 { - rockchip,pins = <0x03 0x01 0x03 0xb1 0x03 0x02 0x03 0xb1>; - phandle = <0x14b>; - }; - - d10-d11-m1 { - rockchip,pins = <0x03 0x16 0x03 0xb1 0x03 0x17 0x03 0xb1>; - phandle = <0x14c>; - }; - }; - - isp { - - isp-prelight { - rockchip,pins = <0x03 0x19 0x04 0xb1>; - phandle = <0x14d>; - }; - }; - - pmic { - - pmic_int { - rockchip,pins = <0x00 0x0a 0x00 0xb2 0x00 0x0b 0x00 0xb1>; - phandle = <0x5d>; - }; - - soc_slppin_gpio { - rockchip,pins = <0x00 0x04 0x00 0xb9>; - phandle = <0x60>; - }; - - soc_slppin_slp { - rockchip,pins = <0x00 0x04 0x01 0xb1>; - phandle = <0x5e>; - }; - - soc_slppin_rst { - rockchip,pins = <0x00 0x04 0x02 0xb1>; - phandle = <0x62>; - }; - }; - - leds { - - led-pins { - rockchip,pins = <0x00 0x11 0x00 0xb1>; - phandle = <0xc0>; - }; - }; - - btns { - - btn-pins { - rockchip,pins = <0x01 0x0c 0x00 0xb2 0x01 0x0d 0x00 0xb2 0x01 0x0e 0x00 0xb2 0x01 0x0f 0x00 0xb2 0x01 0x02 0x00 0xb2 0x01 0x05 0x00 0xb2 0x01 0x06 0x00 0xb2 0x01 0x07 0x00 0xb2 0x02 0x00 0x00 0xb2 0x02 0x01 0x00 0xb2 0x02 0x02 0x00 0xb2 0x02 0x03 0x00 0xb2 0x02 0x04 0x00 0xb2 0x02 0x05 0x00 0xb2 0x02 0x06 0x00 0xb2 0x02 0x07 0x00 0xb2 0x03 0x09 0x00 0xb2 0x03 0x0a 0x00 0xb2 0x03 0x0c 0x00 0xb2 0x03 0x0f 0x00 0xb2>; - phandle = <0xbd>; - }; - }; - }; - - chosen { - bootargs = [00]; - }; - - fiq-debugger { - compatible = "rockchip,fiq-debugger"; - rockchip,serial-id = <0x02>; - rockchip,wake-irq = <0x00>; - rockchip,irq-mode-enable = <0x00>; - rockchip,baudrate = <0x1c200>; - interrupts = <0x00 0x7f 0x08>; - pinctrl-names = "default"; - pinctrl-0 = <0xba>; - status = "okay"; - }; - - ramoops { - compatible = "ramoops"; - record-size = <0x00 0x20000>; - console-size = <0x00 0x80000>; - ftrace-size = <0x00 0x00>; - pmsg-size = <0x00 0x00>; - memory-region = <0xbb>; - }; - - reserved-memory { - #address-cells = <0x02>; - #size-cells = <0x02>; - ranges; - - drm-logo@00000000 { - compatible = "rockchip,drm-logo"; - reg = <0x00 0x00 0x00 0x00>; - phandle = <0x11>; - }; - - region@110000 { - reg = <0x00 0x110000 0x00 0xf0000>; - reg-names = "ramoops_mem"; - phandle = <0xbb>; - }; - }; - - odroidgo3-keys { - compatible = "gpio-keys"; - #address-cells = <0x01>; - #size-cells = <0x00>; - autorepeat; - phandle = <0x14e>; - - button@0 { - label = "GPIO BTN-VOLUP"; - linux,code = <0x73>; - gpios = <0x66 0x00 0x01>; - }; - - button@1 { - label = "GPIO BTN-VOLDN"; - linux,code = <0x72>; - gpios = <0x66 0x01 0x01>; - }; - }; - - odroidgo3-joypad { - compatible = "odroidgo3-joypad"; - pwms = <0xbc 0x00 0xbebc200 0x00>; - pwm-names = "enable"; - rumble-boost-weak = <0x00>; - rumble-boost-strong = <0x00>; - joypad-name = "GO-Super Gamepad"; - joypad-product = <0x1100>; - joypad-revision = <0x100>; - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <0xbd>; - pinctrl-1 = <0x7b>; - io-channel-names = "amux_adc"; - io-channels = <0xbe 0x01>; - amux-count = <0x04>; - amux-a-gpios = <0x97 0x0b 0x01>; - amux-b-gpios = <0x97 0x08 0x01>; - amux-en-gpios = <0x97 0x0d 0x01>; - button-adc-scale = <0x02>; - button-adc-deadzone = <0x40>; - button-adc-fuzz = <0x20>; - button-adc-flat = <0x20>; - abs_x-p-tuning = <0xc8>; - abs_x-n-tuning = <0xc8>; - abs_y-p-tuning = <0xc8>; - abs_y-n-tuning = <0xc8>; - abs_rx-p-tuning = <0xc8>; - abs_rx-n-tuning = <0xc8>; - abs_ry-p-tuning = <0xc8>; - abs_ry-n-tuning = <0xc8>; - poll-interval = <0x0a>; - invert-absx; - invert-absy; - phandle = <0x14f>; - - sw1 { - gpios = <0xbf 0x0c 0x01>; - label = "GPIO DPAD-UP"; - linux,code = <0x220>; - }; - - sw2 { - gpios = <0xbf 0x0d 0x01>; - label = "GPIO DPAD-DOWN"; - linux,code = <0x221>; - }; - - sw3 { - gpios = <0xbf 0x0e 0x01>; - label = "GPIO DPAD-LEFT"; - linux,code = <0x222>; - }; - - sw4 { - gpios = <0xbf 0x0f 0x01>; - label = "GPIO DPAD-RIGHT"; - linux,code = <0x223>; - }; - - sw5 { - gpios = <0xbf 0x02 0x01>; - label = "GPIO KEY BTN-A"; - linux,code = <0x131>; - }; - - sw6 { - gpios = <0xbf 0x05 0x01>; - label = "GPIO BTN-B"; - linux,code = <0x130>; - }; - - sw7 { - gpios = <0xbf 0x06 0x01>; - label = "GPIO BTN-Y"; - linux,code = <0x134>; - }; - - sw8 { - gpios = <0xbf 0x07 0x01>; - label = "GPIO BTN-X"; - linux,code = <0x133>; - }; - - sw11 { - gpios = <0x66 0x02 0x01>; - label = "GPIO F3"; - linux,code = <0x2c2>; - }; - - sw12 { - gpios = <0x66 0x03 0x01>; - label = "GPIO F4"; - linux,code = <0x2c3>; - }; - - sw13 { - gpios = <0x66 0x04 0x01>; - label = "GPIO F5"; - linux,code = <0x2c4>; - }; - - sw15 { - gpios = <0x66 0x06 0x01>; - label = "GPIO TOP-LEFT"; - linux,code = <0x136>; - }; - - sw16 { - gpios = <0x66 0x07 0x01>; - label = "GPIO TOP-RIGHT"; - linux,code = <0x137>; - }; - - sw19 { - gpios = <0x97 0x09 0x01>; - label = "GPIO F1"; - linux,code = <0x2c0>; - }; - - sw20 { - gpios = <0x97 0x0f 0x01>; - label = "GPIO TOP-RIGHT2"; - linux,code = <0x139>; - }; - - sw21 { - gpios = <0x97 0x0a 0x01>; - label = "GPIO TOP-LEFT2"; - linux,code = <0x138>; - }; - - sw22 { - gpios = <0x97 0x0c 0x01>; - label = "GPIO F2"; - linux,code = <0x2c1>; - }; - }; - - gpio_leds { - compatible = "gpio-leds"; - pinctrl-names = "led_pins"; - pinctrl-0 = <0xc0>; - phandle = <0x150>; - - heartbeat { - label = "blue:heartbeat"; - gpios = <0x5c 0x11 0x00>; - linux,default-trigger = "heartbeat"; - }; - }; - - backlight { - compatible = "pwm-backlight"; - pwms = <0xc1 0x00 0x9c40 0x00>; - brightness-levels = <0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f 0x20 0x21 0x22 0x23 0x24 0x25 0x26 0x27 0x28 0x29 0x2a 0x2b 0x2c 0x2d 0x2e 0x2f 0x30 0x31 0x32 0x33 0x34 0x35 0x36 0x37 0x38 0x39 0x3a 0x3b 0x3c 0x3d 0x3e 0x3f 0x40 0x41 0x42 0x43 0x44 0x45 0x46 0x47 0x48 0x49 0x4a 0x4b 0x4c 0x4d 0x4e 0x4f 0x50 0x51 0x52 0x53 0x54 0x55 0x56 0x57 0x58 0x59 0x5a 0x5b 0x5c 0x5d 0x5e 0x5f 0x60 0x61 0x62 0x63 0x64 0x65 0x66 0x67 0x68 0x69 0x6a 0x6b 0x6c 0x6d 0x6e 0x6f 0x70 0x71 0x72 0x73 0x74 0x75 0x76 0x77 0x78 0x79 0x7a 0x7b 0x7c 0x7d 0x7e 0x7f 0x80 0x81 0x82 0x83 0x84 0x85 0x86 0x87 0x88 0x89 0x8a 0x8b 0x8c 0x8d 0x8e 0x8f 0x90 0x91 0x92 0x93 0x94 0x95 0x96 0x97 0x98 0x99 0x9a 0x9b 0x9c 0x9d 0x9e 0x9f 0xa0>; - default-brightness-level = <0x50>; - phandle = <0x9d>; - }; - - rk817-sound { - compatible = "simple-audio-card"; - simple-audio-card,format = "i2s"; - simple-audio-card,name = "rockchip,rk817-codec"; - simple-audio-card,mclk-fs = <0x100>; - simple-audio-card,widgets = "Microphone\0Mic Jack\0Headphone\0Headphone Jack"; - simple-audio-card,routing = "MIC_IN\0Mic Jack\0Headphone Jack\0HPOL\0Headphone Jack\0HPOR"; - simple-audio-card,hp-det-gpio = <0x66 0x16 0x01>; - simple-audio-card,codec-hp-det = <0x01>; - - simple-audio-card,cpu { - sound-dai = <0xc2>; - }; - - simple-audio-card,codec { - sound-dai = <0xc3>; - }; - }; - - vccsys { - compatible = "regulator-fixed"; - regulator-name = "vcc3v8_sys"; - regulator-always-on; - regulator-min-microvolt = <0x39fbc0>; - regulator-max-microvolt = <0x39fbc0>; - phandle = <0x64>; - }; - - __symbols__ { - ddr_timing = "/ddr_timing"; - cpu0 = "/cpus/cpu@0"; - cpu1 = "/cpus/cpu@1"; - cpu2 = "/cpus/cpu@2"; - cpu3 = "/cpus/cpu@3"; - CPU_SLEEP = "/cpus/idle-states/cpu-sleep"; - CLUSTER_SLEEP = "/cpus/idle-states/cluster-sleep"; - cpu0_opp_table = "/cpu0-opp-table"; - bus_soc = "/bus-soc"; - bus_apll = "/bus-apll"; - bus_apll_opp_table = "/bus-apll-opp-table"; - display_subsystem = "/display-subsystem"; - route_lvds = "/display-subsystem/route/route-lvds"; - route_dsi = "/display-subsystem/route/route-dsi"; - route_rgb = "/display-subsystem/route/route-rgb"; - gmac_clkin = "/external-gmac-clock"; - rockchip_suspend = "/rockchip-suspend"; - xin24m = "/xin24m"; - xin32k = "/xin32k"; - pmu = "/power-management@ff000000"; - power = "/power-management@ff000000/power-controller"; - pmugrf = "/syscon@ff010000"; - pmu_io_domains = "/syscon@ff010000/io-domains"; - pmu_pvtm = "/syscon@ff010000/pmu-pvtm"; - uart0 = "/serial@ff030000"; - i2s0_8ch = "/i2s@ff060000"; - i2s1_2ch = "/i2s@ff070000"; - i2s2_2ch = "/i2s@ff080000"; - pdm = "/pdm@ff0a0000"; - crypto = "/crypto@ff0b0000"; - rng = "/rng@ff0b0000"; - gic = "/interrupt-controller@ff131000"; - grf = "/syscon@ff140000"; - io_domains = "/syscon@ff140000/io-domains"; - lvds = "/syscon@ff140000/lvds"; - lvds_in_vopb = "/syscon@ff140000/lvds/ports/port@0/endpoint@0"; - rgb = "/syscon@ff140000/rgb"; - rgb_in_vopb = "/syscon@ff140000/rgb/ports/port@0/endpoint@0"; - core_grf = "/syscon@ff148000"; - pvtm = "/syscon@ff148000/pvtm"; - uart1 = "/serial@ff158000"; - uart2 = "/serial@ff160000"; - uart3 = "/serial@ff168000"; - uart4 = "/serial@ff170000"; - uart5 = "/serial@ff178000"; - i2c0 = "/i2c@ff180000"; - rk817 = "/i2c@ff180000/pmic@20"; - pinctrl_rk8xx = "/i2c@ff180000/pmic@20/pinctrl_rk8xx"; - rk817_ts_gpio1 = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_ts_gpio1"; - rk817_gt_gpio2 = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_gt_gpio2"; - rk817_pin_ts = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_pin_ts"; - rk817_pin_gt = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_pin_gt"; - rk817_slppin_null = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_slppin_null"; - rk817_slppin_slp = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_slppin_slp"; - rk817_slppin_pwrdn = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_slppin_pwrdn"; - rk817_slppin_rst = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_slppin_rst"; - vdd_logic = "/i2c@ff180000/pmic@20/regulators/DCDC_REG1"; - vdd_arm = "/i2c@ff180000/pmic@20/regulators/DCDC_REG2"; - vcc_ddr = "/i2c@ff180000/pmic@20/regulators/DCDC_REG3"; - vcc_3v3 = "/i2c@ff180000/pmic@20/regulators/DCDC_REG4"; - vcc_1v0 = "/i2c@ff180000/pmic@20/regulators/LDO_REG1"; - vcc1v8_soc = "/i2c@ff180000/pmic@20/regulators/LDO_REG2"; - vdd1v0_soc = "/i2c@ff180000/pmic@20/regulators/LDO_REG3"; - vcc3v3_pmu = "/i2c@ff180000/pmic@20/regulators/LDO_REG4"; - vccio_sd = "/i2c@ff180000/pmic@20/regulators/LDO_REG5"; - vcc_sd = "/i2c@ff180000/pmic@20/regulators/LDO_REG6"; - vcc_backlight = "/i2c@ff180000/pmic@20/regulators/LDO_REG7"; - vcc_lcd = "/i2c@ff180000/pmic@20/regulators/LDO_REG8"; - dcdc_boost = "/i2c@ff180000/pmic@20/regulators/BOOST"; - otg_switch = "/i2c@ff180000/pmic@20/regulators/OTG_SWITCH"; - rk817_codec = "/i2c@ff180000/pmic@20/codec"; - i2c1 = "/i2c@ff190000"; - i2c2 = "/i2c@ff1a0000"; - i2c3 = "/i2c@ff1b0000"; - spi0 = "/spi@ff1d0000"; - spi1 = "/spi@ff1d8000"; - wdt = "/watchdog@ff1e0000"; - pwm0 = "/pwm@ff200000"; - pwm1 = "/pwm@ff200010"; - pwm2 = "/pwm@ff200020"; - pwm3 = "/pwm@ff200030"; - pwm4 = "/pwm@ff208000"; - pwm5 = "/pwm@ff208010"; - pwm6 = "/pwm@ff208020"; - pwm7 = "/pwm@ff208030"; - rktimer = "/rktimer@ff210000"; - dmac = "/amba/dmac@ff240000"; - thermal_zones = "/thermal-zones"; - soc_thermal = "/thermal-zones/soc-thermal"; - threshold = "/thermal-zones/soc-thermal/trips/trip-point-0"; - target = "/thermal-zones/soc-thermal/trips/trip-point-1"; - soc_crit = "/thermal-zones/soc-thermal/trips/soc-crit"; - gpu_thermal = "/thermal-zones/gpu-thermal"; - tsadc = "/tsadc@ff280000"; - saradc = "/saradc@ff288000"; - otp = "/otp@ff290000"; - otp_id = "/otp@ff290000/id@7"; - cpu_leakage = "/otp@ff290000/cpu-leakage@17"; - performance = "/otp@ff290000/performance@1e"; - cru = "/clock-controller@ff2b0000"; - cpu_boost = "/cpu-boost@ff2b8000"; - pmucru = "/pmu-clock-controller@ff2bc000"; - usb2phy_grf = "/syscon@ff2c0000"; - u2phy = "/syscon@ff2c0000/usb2-phy@100"; - u2phy_host = "/syscon@ff2c0000/usb2-phy@100/host-port"; - u2phy_otg = "/syscon@ff2c0000/usb2-phy@100/otg-port"; - video_phy = "/video-phy@ff2e0000"; - mipi_dphy_rx0 = "/mipi-dphy-rx0@ff2f0000"; - usb20_otg = "/usb@ff300000"; - usb_host0_ehci = "/usb@ff340000"; - usb_host0_ohci = "/usb@ff350000"; - gmac = "/ethernet@ff360000"; - sdmmc = "/dwmmc@ff370000"; - sdio = "/dwmmc@ff380000"; - emmc = "/dwmmc@ff390000"; - nandc0 = "/nandc@ff3b0000"; - sfc = "/sfc@ff3a0000"; - gpu = "/gpu@ff400000"; - gpu_opp_table = "/gpu-opp-table"; - hevc = "/hevc_service@ff440000"; - vpu = "/vpu_service@ff442000"; - vpu_combo = "/vpu_combo"; - hevc_mmu = "/iommu@ff440440"; - vpu_mmu = "/iommu@ff442800"; - dsi = "/dsi@ff450000"; - dsi_in_vopb = "/dsi@ff450000/ports/port@0/endpoint@0"; - timing0 = "/dsi@ff450000/panel@0/display-timings/60Hz"; - timing1 = "/dsi@ff450000/panel@0/display-timings/50Hz"; - timing2 = "/dsi@ff450000/panel@0/display-timings/75Hz"; - vopb = "/vop@ff460000"; - vopb_out = "/vop@ff460000/port"; - vopb_out_lvds = "/vop@ff460000/port/endpoint@0"; - vopb_out_dsi = "/vop@ff460000/port/endpoint@1"; - vopb_out_rgb = "/vop@ff460000/port/endpoint@2"; - vopb_mmu = "/iommu@ff460f00"; - rk_rga = "/rk_rga@ff480000"; - cif = "/cif@ff490000"; - cif_new = "/cif-new@ff490000"; - vip_mmu = "/iommu@ff490800"; - rk_isp = "/rk_isp@ff4a0000"; - rkisp1 = "/rkisp1@ff4a0000"; - isp_mmu = "/iommu@ff4a8000"; - qos_gmac = "/qos@ff518000"; - qos_gpu = "/qos@ff520000"; - qos_sdmmc = "/qos@ff52c000"; - qos_emmc = "/qos@ff538000"; - qos_nand = "/qos@ff538080"; - qos_sdio = "/qos@ff538100"; - qos_sfc = "/qos@ff538180"; - qos_usb_host = "/qos@ff540000"; - qos_usb_otg = "/qos@ff540080"; - qos_isp_128 = "/qos@ff548000"; - qos_isp_rd = "/qos@ff548080"; - qos_isp_wr = "/qos@ff548100"; - qos_isp_m1 = "/qos@ff548180"; - qos_vip = "/qos@ff548200"; - qos_rga_rd = "/qos@ff550000"; - qos_rga_wr = "/qos@ff550080"; - qos_vop_m0 = "/qos@ff550100"; - qos_vop_m1 = "/qos@ff550180"; - qos_vpu = "/qos@ff558000"; - qos_vpu_r128 = "/qos@ff558080"; - dfi = "/dfi@ff610000"; - dmc = "/dmc"; - ddr_power_model = "/dmc/ddr_power_model"; - dmc_opp_table = "/dmc-opp-table"; - rockchip_system_monitor = "/rockchip-system-monitor"; - pinctrl = "/pinctrl"; - gpio0 = "/pinctrl/gpio0@ff040000"; - gpio1 = "/pinctrl/gpio1@ff250000"; - gpio2 = "/pinctrl/gpio2@ff260000"; - gpio3 = "/pinctrl/gpio3@ff270000"; - pcfg_pull_up = "/pinctrl/pcfg-pull-up"; - pcfg_pull_down = "/pinctrl/pcfg-pull-down"; - pcfg_pull_none = "/pinctrl/pcfg-pull-none"; - pcfg_pull_none_2ma = "/pinctrl/pcfg-pull-none-2ma"; - pcfg_pull_up_2ma = "/pinctrl/pcfg-pull-up-2ma"; - pcfg_pull_up_4ma = "/pinctrl/pcfg-pull-up-4ma"; - pcfg_pull_none_4ma = "/pinctrl/pcfg-pull-none-4ma"; - pcfg_pull_down_4ma = "/pinctrl/pcfg-pull-down-4ma"; - pcfg_pull_none_8ma = "/pinctrl/pcfg-pull-none-8ma"; - pcfg_pull_up_8ma = "/pinctrl/pcfg-pull-up-8ma"; - pcfg_pull_none_12ma = "/pinctrl/pcfg-pull-none-12ma"; - pcfg_pull_up_12ma = "/pinctrl/pcfg-pull-up-12ma"; - pcfg_pull_none_smt = "/pinctrl/pcfg-pull-none-smt"; - pcfg_output_high = "/pinctrl/pcfg-output-high"; - pcfg_output_low = "/pinctrl/pcfg-output-low"; - pcfg_input_high = "/pinctrl/pcfg-input-high"; - pcfg_input = "/pinctrl/pcfg-input"; - i2c0_xfer = "/pinctrl/i2c0/i2c0-xfer"; - i2c1_xfer = "/pinctrl/i2c1/i2c1-xfer"; - i2c2_xfer = "/pinctrl/i2c2/i2c2-xfer"; - i2c3_xfer = "/pinctrl/i2c3/i2c3-xfer"; - tsadc_otp_gpio = "/pinctrl/tsadc/tsadc-otp-gpio"; - tsadc_otp_out = "/pinctrl/tsadc/tsadc-otp-out"; - uart0_xfer = "/pinctrl/uart0/uart0-xfer"; - uart0_cts = "/pinctrl/uart0/uart0-cts"; - uart0_rts = "/pinctrl/uart0/uart0-rts"; - uart0_rts_gpio = "/pinctrl/uart0/uart0-rts-gpio"; - uart1_xfer = "/pinctrl/uart1/uart1-xfer"; - uart1_cts = "/pinctrl/uart1/uart1-cts"; - uart1_rts = "/pinctrl/uart1/uart1-rts"; - uart1_rts_gpio = "/pinctrl/uart1/uart1-rts-gpio"; - uart2m0_xfer = "/pinctrl/uart2-m0/uart2m0-xfer"; - uart2m1_xfer = "/pinctrl/uart2-m1/uart2m1-xfer"; - uart3m0_xfer = "/pinctrl/uart3-m0/uart3m0-xfer"; - uart3m0_cts = "/pinctrl/uart3-m0/uart3m0-cts"; - uart3m0_rts = "/pinctrl/uart3-m0/uart3m0-rts"; - uart3m0_rts_gpio = "/pinctrl/uart3-m0/uart3m0-rts-gpio"; - uart3m1_xfer = "/pinctrl/uart3-m1/uart3m1-xfer"; - uart3m1_cts = "/pinctrl/uart3-m1/uart3m1-cts"; - uart3m1_rts = "/pinctrl/uart3-m1/uart3m1-rts"; - uart3m1_rts_gpio = "/pinctrl/uart3-m1/uart3m1-rts-gpio"; - uart4_xfer = "/pinctrl/uart4/uart4-xfer"; - uart4_cts = "/pinctrl/uart4/uart4-cts"; - uart4_rts = "/pinctrl/uart4/uart4-rts"; - uart5_xfer = "/pinctrl/uart5/uart5-xfer"; - uart5_cts = "/pinctrl/uart5/uart5-cts"; - uart5_rts = "/pinctrl/uart5/uart5-rts"; - spi0_clk = "/pinctrl/spi0/spi0-clk"; - spi0_csn = "/pinctrl/spi0/spi0-csn"; - spi0_miso = "/pinctrl/spi0/spi0-miso"; - spi0_mosi = "/pinctrl/spi0/spi0-mosi"; - spi0_clk_hs = "/pinctrl/spi0/spi0-clk-hs"; - spi0_miso_hs = "/pinctrl/spi0/spi0-miso-hs"; - spi0_mosi_hs = "/pinctrl/spi0/spi0-mosi-hs"; - spi1_clk = "/pinctrl/spi1/spi1-clk"; - spi1_csn0 = "/pinctrl/spi1/spi1-csn0"; - spi1_csn1 = "/pinctrl/spi1/spi1-csn1"; - spi1_miso = "/pinctrl/spi1/spi1-miso"; - spi1_mosi = "/pinctrl/spi1/spi1-mosi"; - spi1_clk_hs = "/pinctrl/spi1/spi1-clk-hs"; - spi1_miso_hs = "/pinctrl/spi1/spi1-miso-hs"; - spi1_mosi_hs = "/pinctrl/spi1/spi1-mosi-hs"; - pdm_clk0m0 = "/pinctrl/pdm/pdm-clk0m0"; - pdm_clk0m1 = "/pinctrl/pdm/pdm-clk0m1"; - pdm_clk1 = "/pinctrl/pdm/pdm-clk1"; - pdm_sdi0m0 = "/pinctrl/pdm/pdm-sdi0m0"; - pdm_sdi0m1 = "/pinctrl/pdm/pdm-sdi0m1"; - pdm_sdi1 = "/pinctrl/pdm/pdm-sdi1"; - pdm_sdi2 = "/pinctrl/pdm/pdm-sdi2"; - pdm_sdi3 = "/pinctrl/pdm/pdm-sdi3"; - pdm_clk0m0_sleep = "/pinctrl/pdm/pdm-clk0m0-sleep"; - pdm_clk0m_sleep1 = "/pinctrl/pdm/pdm-clk0m1-sleep"; - pdm_clk1_sleep = "/pinctrl/pdm/pdm-clk1-sleep"; - pdm_sdi0m0_sleep = "/pinctrl/pdm/pdm-sdi0m0-sleep"; - pdm_sdi0m1_sleep = "/pinctrl/pdm/pdm-sdi0m1-sleep"; - pdm_sdi1_sleep = "/pinctrl/pdm/pdm-sdi1-sleep"; - pdm_sdi2_sleep = "/pinctrl/pdm/pdm-sdi2-sleep"; - pdm_sdi3_sleep = "/pinctrl/pdm/pdm-sdi3-sleep"; - i2s0_8ch_mclk = "/pinctrl/i2s0/i2s0-8ch-mclk"; - i2s0_8ch_sclktx = "/pinctrl/i2s0/i2s0-8ch-sclktx"; - i2s0_8ch_sclkrx = "/pinctrl/i2s0/i2s0-8ch-sclkrx"; - i2s0_8ch_lrcktx = "/pinctrl/i2s0/i2s0-8ch-lrcktx"; - i2s0_8ch_lrckrx = "/pinctrl/i2s0/i2s0-8ch-lrckrx"; - i2s0_8ch_sdo0 = "/pinctrl/i2s0/i2s0-8ch-sdo0"; - i2s0_8ch_sdo1 = "/pinctrl/i2s0/i2s0-8ch-sdo1"; - i2s0_8ch_sdo2 = "/pinctrl/i2s0/i2s0-8ch-sdo2"; - i2s0_8ch_sdo3 = "/pinctrl/i2s0/i2s0-8ch-sdo3"; - i2s0_8ch_sdi0 = "/pinctrl/i2s0/i2s0-8ch-sdi0"; - i2s0_8ch_sdi1 = "/pinctrl/i2s0/i2s0-8ch-sdi1"; - i2s0_8ch_sdi2 = "/pinctrl/i2s0/i2s0-8ch-sdi2"; - i2s0_8ch_sdi3 = "/pinctrl/i2s0/i2s0-8ch-sdi3"; - i2s1_2ch_mclk = "/pinctrl/i2s1/i2s1-2ch-mclk"; - i2s1_2ch_sclk = "/pinctrl/i2s1/i2s1-2ch-sclk"; - i2s1_2ch_lrck = "/pinctrl/i2s1/i2s1-2ch-lrck"; - i2s1_2ch_sdi = "/pinctrl/i2s1/i2s1-2ch-sdi"; - i2s1_2ch_sdo = "/pinctrl/i2s1/i2s1-2ch-sdo"; - i2s2_2ch_mclk = "/pinctrl/i2s2/i2s2-2ch-mclk"; - i2s2_2ch_sclk = "/pinctrl/i2s2/i2s2-2ch-sclk"; - i2s2_2ch_lrck = "/pinctrl/i2s2/i2s2-2ch-lrck"; - i2s2_2ch_sdi = "/pinctrl/i2s2/i2s2-2ch-sdi"; - i2s2_2ch_sdo = "/pinctrl/i2s2/i2s2-2ch-sdo"; - sdmmc_clk = "/pinctrl/sdmmc/sdmmc-clk"; - sdmmc_cmd = "/pinctrl/sdmmc/sdmmc-cmd"; - sdmmc_det = "/pinctrl/sdmmc/sdmmc-det"; - sdmmc_bus1 = "/pinctrl/sdmmc/sdmmc-bus1"; - sdmmc_bus4 = "/pinctrl/sdmmc/sdmmc-bus4"; - sdmmc_gpio = "/pinctrl/sdmmc/sdmmc-gpio"; - sdio_clk = "/pinctrl/sdio/sdio-clk"; - sdio_cmd = "/pinctrl/sdio/sdio-cmd"; - sdio_bus4 = "/pinctrl/sdio/sdio-bus4"; - sdio_gpio = "/pinctrl/sdio/sdio-gpio"; - emmc_clk = "/pinctrl/emmc/emmc-clk"; - emmc_cmd = "/pinctrl/emmc/emmc-cmd"; - emmc_pwren = "/pinctrl/emmc/emmc-pwren"; - emmc_rstnout = "/pinctrl/emmc/emmc-rstnout"; - emmc_bus1 = "/pinctrl/emmc/emmc-bus1"; - emmc_bus4 = "/pinctrl/emmc/emmc-bus4"; - emmc_bus8 = "/pinctrl/emmc/emmc-bus8"; - flash_cs0 = "/pinctrl/flash/flash-cs0"; - flash_rdy = "/pinctrl/flash/flash-rdy"; - flash_dqs = "/pinctrl/flash/flash-dqs"; - flash_ale = "/pinctrl/flash/flash-ale"; - flash_cle = "/pinctrl/flash/flash-cle"; - flash_wrn = "/pinctrl/flash/flash-wrn"; - flash_csl = "/pinctrl/flash/flash-csl"; - flash_rdn = "/pinctrl/flash/flash-rdn"; - flash_bus8 = "/pinctrl/flash/flash-bus8"; - lcdc_m0_rgb_pins = "/pinctrl/lcdc/lcdc-m0-rgb-pins"; - lcdc_m0_sleep_pins = "/pinctrl/lcdc/lcdc-m0-sleep-pins"; - lcdc_m1_rgb_pins = "/pinctrl/lcdc/lcdc-m1-rgb-pins"; - lcdc_m1_sleep_pins = "/pinctrl/lcdc/lcdc-m1-sleep-pins"; - pwm0_pin = "/pinctrl/pwm0/pwm0-pin"; - pwm1_pin = "/pinctrl/pwm1/pwm1-pin"; - pwm2_pin = "/pinctrl/pwm2/pwm2-pin"; - pwm3_pin = "/pinctrl/pwm3/pwm3-pin"; - pwm4_pin = "/pinctrl/pwm4/pwm4-pin"; - pwm5_pin = "/pinctrl/pwm5/pwm5-pin"; - pwm6_pin = "/pinctrl/pwm6/pwm6-pin"; - pwm7_pin = "/pinctrl/pwm7/pwm7-pin"; - rmii_pins = "/pinctrl/gmac/rmii-pins"; - mac_refclk_12ma = "/pinctrl/gmac/mac-refclk-12ma"; - mac_refclk = "/pinctrl/gmac/mac-refclk"; - cif_clkout_m0 = "/pinctrl/cif-m0/cif-clkout-m0"; - dvp_d2d9_m0 = "/pinctrl/cif-m0/dvp-d2d9-m0"; - dvp_d0d1_m0 = "/pinctrl/cif-m0/dvp-d0d1-m0"; - dvp_d10d11_m0 = "/pinctrl/cif-m0/d10-d11-m0"; - cif_clkout_m1 = "/pinctrl/cif-m1/cif-clkout-m1"; - dvp_d2d9_m1 = "/pinctrl/cif-m1/dvp-d2d9-m1"; - dvp_d0d1_m1 = "/pinctrl/cif-m1/dvp-d0d1-m1"; - dvp_d10d11_m1 = "/pinctrl/cif-m1/d10-d11-m1"; - isp_prelight = "/pinctrl/isp/isp-prelight"; - pmic_int = "/pinctrl/pmic/pmic_int"; - soc_slppin_gpio = "/pinctrl/pmic/soc_slppin_gpio"; - soc_slppin_slp = "/pinctrl/pmic/soc_slppin_slp"; - soc_slppin_rst = "/pinctrl/pmic/soc_slppin_rst"; - led_pins = "/pinctrl/leds/led-pins"; - btn_pins = "/pinctrl/btns/btn-pins"; - drm_logo = "/reserved-memory/drm-logo@00000000"; - ramoops_mem = "/reserved-memory/region@110000"; - gpio_keys = "/odroidgo3-keys"; - joypad = "/odroidgo3-joypad"; - leds = "/gpio_leds"; - backlight = "/backlight"; - vccsys = "/vccsys"; - }; -}; diff --git a/config/archr-dts/R36S-DTB/DTS/R46H.dts b/config/archr-dts/R36S-DTB/DTS/R46H.dts deleted file mode 100644 index 3a6b53fc42..0000000000 --- a/config/archr-dts/R36S-DTB/DTS/R46H.dts +++ /dev/null @@ -1,4038 +0,0 @@ -/dts-v1/; - -/ { - compatible = "rockchip,rk3326-odroidgo3-linux\0rockchip,rk3326"; - interrupt-parent = <0x01>; - #address-cells = <0x02>; - #size-cells = <0x02>; - model = "Hardkernel ODROID-GO3"; - - ddr_timing { - compatible = "rockchip,ddr-timing"; - ddr2_speed_bin = <0x00>; - ddr3_speed_bin = <0x15>; - ddr4_speed_bin = <0x0c>; - pd_idle = <0x0d>; - sr_idle = <0x5d>; - sr_mc_gate_idle = <0x00>; - srpd_lite_idle = <0x00>; - standby_idle = <0x00>; - auto_pd_dis_freq = <0x42a>; - auto_sr_dis_freq = <0x320>; - ddr2_dll_dis_freq = <0x12c>; - ddr3_dll_dis_freq = <0x12c>; - ddr4_dll_dis_freq = <0x271>; - phy_dll_dis_freq = <0x190>; - ddr2_odt_dis_freq = <0x64>; - phy_ddr2_odt_dis_freq = <0x64>; - ddr2_drv = <0x01>; - ddr2_odt = <0x96>; - phy_ddr2_ca_drv = <0x15>; - phy_ddr2_ck_drv = <0x12>; - phy_ddr2_dq_drv = <0x15>; - phy_ddr2_odt = <0x02>; - ddr3_odt_dis_freq = <0x190>; - phy_ddr3_odt_dis_freq = <0x190>; - ddr3_drv = <0x28>; - ddr3_odt = <0x78>; - phy_ddr3_ca_drv = <0x15>; - phy_ddr3_ck_drv = <0x12>; - phy_ddr3_dq_drv = <0x15>; - phy_ddr3_odt = <0x02>; - phy_lpddr2_odt_dis_freq = <0x29a>; - lpddr2_drv = <0x28>; - phy_lpddr2_ca_drv = <0x16>; - phy_lpddr2_ck_drv = <0x13>; - phy_lpddr2_dq_drv = <0x16>; - phy_lpddr2_odt = <0x00>; - lpddr3_odt_dis_freq = <0x190>; - phy_lpddr3_odt_dis_freq = <0x190>; - lpddr3_drv = <0x28>; - lpddr3_odt = <0xf0>; - phy_lpddr3_ca_drv = <0x16>; - phy_lpddr3_ck_drv = <0x13>; - phy_lpddr3_dq_drv = <0x16>; - phy_lpddr3_odt = <0x02>; - lpddr4_odt_dis_freq = <0x320>; - phy_lpddr4_odt_dis_freq = <0x320>; - lpddr4_drv = <0x3c>; - lpddr4_dq_odt = <0x28>; - lpddr4_ca_odt = <0x28>; - phy_lpddr4_ca_drv = <0x14>; - phy_lpddr4_ck_cs_drv = <0x06>; - phy_lpddr4_dq_drv = <0x06>; - phy_lpddr4_odt = <0x10>; - ddr4_odt_dis_freq = <0x29a>; - phy_ddr4_odt_dis_freq = <0x29a>; - ddr4_drv = <0x22>; - ddr4_odt = <0xf0>; - phy_ddr4_ca_drv = <0x16>; - phy_ddr4_ck_drv = <0x13>; - phy_ddr4_dq_drv = <0x16>; - phy_ddr4_odt = <0x02>; - ddr3a1_ddr4a9_de-skew = <0x06>; - ddr3a0_ddr4a10_de-skew = <0x07>; - ddr3a3_ddr4a6_de-skew = <0x07>; - ddr3a2_ddr4a4_de-skew = <0x07>; - ddr3a5_ddr4a8_de-skew = <0x07>; - ddr3a4_ddr4a5_de-skew = <0x07>; - ddr3a7_ddr4a11_de-skew = <0x07>; - ddr3a6_ddr4a7_de-skew = <0x06>; - ddr3a9_ddr4a0_de-skew = <0x07>; - ddr3a8_ddr4a13_de-skew = <0x07>; - ddr3a11_ddr4a3_de-skew = <0x07>; - ddr3a10_ddr4cs0_de-skew = <0x07>; - ddr3a13_ddr4a2_de-skew = <0x07>; - ddr3a12_ddr4ba1_de-skew = <0x07>; - ddr3a15_ddr4odt0_de-skew = <0x07>; - ddr3a14_ddr4a1_de-skew = <0x07>; - ddr3ba1_ddr4a15_de-skew = <0x07>; - ddr3ba0_ddr4bg0_de-skew = <0x07>; - ddr3ras_ddr4cke_de-skew = <0x07>; - ddr3ba2_ddr4ba0_de-skew = <0x07>; - ddr3we_ddr4bg1_de-skew = <0x07>; - ddr3cas_ddr4a12_de-skew = <0x07>; - ddr3ckn_ddr4ckn_de-skew = <0x07>; - ddr3ckp_ddr4ckp_de-skew = <0x07>; - ddr3cke_ddr4a16_de-skew = <0x07>; - ddr3odt0_ddr4a14_de-skew = <0x07>; - ddr3cs0_ddr4act_de-skew = <0x06>; - ddr3reset_ddr4reset_de-skew = <0x07>; - ddr3cs1_ddr4cs1_de-skew = <0x06>; - ddr3odt1_ddr4odt1_de-skew = <0x07>; - cs0_dm0_rx_de-skew = <0x07>; - cs0_dm0_tx_de-skew = <0x07>; - cs0_dq0_rx_de-skew = <0x08>; - cs0_dq0_tx_de-skew = <0x08>; - cs0_dq1_rx_de-skew = <0x09>; - cs0_dq1_tx_de-skew = <0x08>; - cs0_dq2_rx_de-skew = <0x08>; - cs0_dq2_tx_de-skew = <0x08>; - cs0_dq3_rx_de-skew = <0x08>; - cs0_dq3_tx_de-skew = <0x08>; - cs0_dq4_rx_de-skew = <0x09>; - cs0_dq4_tx_de-skew = <0x08>; - cs0_dq5_rx_de-skew = <0x09>; - cs0_dq5_tx_de-skew = <0x08>; - cs0_dq6_rx_de-skew = <0x09>; - cs0_dq6_tx_de-skew = <0x08>; - cs0_dq7_rx_de-skew = <0x08>; - cs0_dq7_tx_de-skew = <0x08>; - cs0_dqs0_rx_de-skew = <0x06>; - cs0_dqs0p_tx_de-skew = <0x09>; - cs0_dqs0n_tx_de-skew = <0x09>; - cs0_dm1_rx_de-skew = <0x07>; - cs0_dm1_tx_de-skew = <0x06>; - cs0_dq8_rx_de-skew = <0x08>; - cs0_dq8_tx_de-skew = <0x07>; - cs0_dq9_rx_de-skew = <0x09>; - cs0_dq9_tx_de-skew = <0x07>; - cs0_dq10_rx_de-skew = <0x08>; - cs0_dq10_tx_de-skew = <0x08>; - cs0_dq11_rx_de-skew = <0x08>; - cs0_dq11_tx_de-skew = <0x07>; - cs0_dq12_rx_de-skew = <0x08>; - cs0_dq12_tx_de-skew = <0x08>; - cs0_dq13_rx_de-skew = <0x09>; - cs0_dq13_tx_de-skew = <0x07>; - cs0_dq14_rx_de-skew = <0x09>; - cs0_dq14_tx_de-skew = <0x08>; - cs0_dq15_rx_de-skew = <0x09>; - cs0_dq15_tx_de-skew = <0x07>; - cs0_dqs1_rx_de-skew = <0x07>; - cs0_dqs1p_tx_de-skew = <0x09>; - cs0_dqs1n_tx_de-skew = <0x09>; - cs0_dm2_rx_de-skew = <0x07>; - cs0_dm2_tx_de-skew = <0x07>; - cs0_dq16_rx_de-skew = <0x09>; - cs0_dq16_tx_de-skew = <0x09>; - cs0_dq17_rx_de-skew = <0x07>; - cs0_dq17_tx_de-skew = <0x09>; - cs0_dq18_rx_de-skew = <0x07>; - cs0_dq18_tx_de-skew = <0x08>; - cs0_dq19_rx_de-skew = <0x07>; - cs0_dq19_tx_de-skew = <0x09>; - cs0_dq20_rx_de-skew = <0x09>; - cs0_dq20_tx_de-skew = <0x09>; - cs0_dq21_rx_de-skew = <0x09>; - cs0_dq21_tx_de-skew = <0x09>; - cs0_dq22_rx_de-skew = <0x08>; - cs0_dq22_tx_de-skew = <0x09>; - cs0_dq23_rx_de-skew = <0x08>; - cs0_dq23_tx_de-skew = <0x09>; - cs0_dqs2_rx_de-skew = <0x06>; - cs0_dqs2p_tx_de-skew = <0x09>; - cs0_dqs2n_tx_de-skew = <0x09>; - cs0_dm3_rx_de-skew = <0x07>; - cs0_dm3_tx_de-skew = <0x07>; - cs0_dq24_rx_de-skew = <0x08>; - cs0_dq24_tx_de-skew = <0x08>; - cs0_dq25_rx_de-skew = <0x09>; - cs0_dq25_tx_de-skew = <0x09>; - cs0_dq26_rx_de-skew = <0x09>; - cs0_dq26_tx_de-skew = <0x08>; - cs0_dq27_rx_de-skew = <0x09>; - cs0_dq27_tx_de-skew = <0x08>; - cs0_dq28_rx_de-skew = <0x09>; - cs0_dq28_tx_de-skew = <0x09>; - cs0_dq29_rx_de-skew = <0x09>; - cs0_dq29_tx_de-skew = <0x09>; - cs0_dq30_rx_de-skew = <0x08>; - cs0_dq30_tx_de-skew = <0x08>; - cs0_dq31_rx_de-skew = <0x08>; - cs0_dq31_tx_de-skew = <0x08>; - cs0_dqs3_rx_de-skew = <0x07>; - cs0_dqs3p_tx_de-skew = <0x09>; - cs0_dqs3n_tx_de-skew = <0x09>; - cs1_dm0_rx_de-skew = <0x07>; - cs1_dm0_tx_de-skew = <0x07>; - cs1_dq0_rx_de-skew = <0x08>; - cs1_dq0_tx_de-skew = <0x08>; - cs1_dq1_rx_de-skew = <0x09>; - cs1_dq1_tx_de-skew = <0x08>; - cs1_dq2_rx_de-skew = <0x08>; - cs1_dq2_tx_de-skew = <0x08>; - cs1_dq3_rx_de-skew = <0x08>; - cs1_dq3_tx_de-skew = <0x08>; - cs1_dq4_rx_de-skew = <0x08>; - cs1_dq4_tx_de-skew = <0x08>; - cs1_dq5_rx_de-skew = <0x09>; - cs1_dq5_tx_de-skew = <0x08>; - cs1_dq6_rx_de-skew = <0x09>; - cs1_dq6_tx_de-skew = <0x08>; - cs1_dq7_rx_de-skew = <0x08>; - cs1_dq7_tx_de-skew = <0x08>; - cs1_dqs0_rx_de-skew = <0x06>; - cs1_dqs0p_tx_de-skew = <0x09>; - cs1_dqs0n_tx_de-skew = <0x09>; - cs1_dm1_rx_de-skew = <0x07>; - cs1_dm1_tx_de-skew = <0x07>; - cs1_dq8_rx_de-skew = <0x08>; - cs1_dq8_tx_de-skew = <0x08>; - cs1_dq9_rx_de-skew = <0x08>; - cs1_dq9_tx_de-skew = <0x07>; - cs1_dq10_rx_de-skew = <0x07>; - cs1_dq10_tx_de-skew = <0x08>; - cs1_dq11_rx_de-skew = <0x08>; - cs1_dq11_tx_de-skew = <0x08>; - cs1_dq12_rx_de-skew = <0x08>; - cs1_dq12_tx_de-skew = <0x07>; - cs1_dq13_rx_de-skew = <0x08>; - cs1_dq13_tx_de-skew = <0x08>; - cs1_dq14_rx_de-skew = <0x08>; - cs1_dq14_tx_de-skew = <0x08>; - cs1_dq15_rx_de-skew = <0x08>; - cs1_dq15_tx_de-skew = <0x07>; - cs1_dqs1_rx_de-skew = <0x07>; - cs1_dqs1p_tx_de-skew = <0x09>; - cs1_dqs1n_tx_de-skew = <0x09>; - cs1_dm2_rx_de-skew = <0x07>; - cs1_dm2_tx_de-skew = <0x08>; - cs1_dq16_rx_de-skew = <0x08>; - cs1_dq16_tx_de-skew = <0x09>; - cs1_dq17_rx_de-skew = <0x08>; - cs1_dq17_tx_de-skew = <0x09>; - cs1_dq18_rx_de-skew = <0x07>; - cs1_dq18_tx_de-skew = <0x08>; - cs1_dq19_rx_de-skew = <0x08>; - cs1_dq19_tx_de-skew = <0x09>; - cs1_dq20_rx_de-skew = <0x09>; - cs1_dq20_tx_de-skew = <0x09>; - cs1_dq21_rx_de-skew = <0x09>; - cs1_dq21_tx_de-skew = <0x09>; - cs1_dq22_rx_de-skew = <0x08>; - cs1_dq22_tx_de-skew = <0x09>; - cs1_dq23_rx_de-skew = <0x08>; - cs1_dq23_tx_de-skew = <0x09>; - cs1_dqs2_rx_de-skew = <0x06>; - cs1_dqs2p_tx_de-skew = <0x09>; - cs1_dqs2n_tx_de-skew = <0x09>; - cs1_dm3_rx_de-skew = <0x07>; - cs1_dm3_tx_de-skew = <0x07>; - cs1_dq24_rx_de-skew = <0x08>; - cs1_dq24_tx_de-skew = <0x09>; - cs1_dq25_rx_de-skew = <0x09>; - cs1_dq25_tx_de-skew = <0x09>; - cs1_dq26_rx_de-skew = <0x09>; - cs1_dq26_tx_de-skew = <0x08>; - cs1_dq27_rx_de-skew = <0x08>; - cs1_dq27_tx_de-skew = <0x08>; - cs1_dq28_rx_de-skew = <0x09>; - cs1_dq28_tx_de-skew = <0x09>; - cs1_dq29_rx_de-skew = <0x09>; - cs1_dq29_tx_de-skew = <0x09>; - cs1_dq30_rx_de-skew = <0x09>; - cs1_dq30_tx_de-skew = <0x08>; - cs1_dq31_rx_de-skew = <0x08>; - cs1_dq31_tx_de-skew = <0x08>; - cs1_dqs3_rx_de-skew = <0x07>; - cs1_dqs3p_tx_de-skew = <0x09>; - cs1_dqs3n_tx_de-skew = <0x09>; - phandle = <0xae>; - }; - - aliases { - ethernet0 = "/ethernet@ff360000"; - i2c0 = "/i2c@ff180000"; - i2c1 = "/i2c@ff190000"; - i2c2 = "/i2c@ff1a0000"; - i2c3 = "/i2c@ff1b0000"; - serial0 = "/serial@ff030000"; - serial1 = "/serial@ff158000"; - serial2 = "/serial@ff160000"; - serial3 = "/serial@ff168000"; - serial4 = "/serial@ff170000"; - serial5 = "/serial@ff178000"; - spi0 = "/spi@ff1d0000"; - spi1 = "/spi@ff1d8000"; - }; - - cpus { - #address-cells = <0x02>; - #size-cells = <0x00>; - - cpu@0 { - device_type = "cpu"; - compatible = "arm,cortex-a35\0arm,armv8"; - reg = <0x00 0x00>; - enable-method = "psci"; - clocks = <0x02 0x07>; - #cooling-cells = <0x02>; - dynamic-power-coefficient = <0x5a>; - operating-points-v2 = <0x03>; - cpu-idle-states = <0x04 0x05>; - cpu-supply = <0x06>; - phandle = <0x09>; - }; - - cpu@1 { - device_type = "cpu"; - compatible = "arm,cortex-a35\0arm,armv8"; - reg = <0x00 0x01>; - enable-method = "psci"; - operating-points-v2 = <0x03>; - cpu-idle-states = <0x04 0x05>; - phandle = <0x0a>; - }; - - cpu@2 { - device_type = "cpu"; - compatible = "arm,cortex-a35\0arm,armv8"; - reg = <0x00 0x02>; - enable-method = "psci"; - operating-points-v2 = <0x03>; - cpu-idle-states = <0x04 0x05>; - phandle = <0x0b>; - }; - - cpu@3 { - device_type = "cpu"; - compatible = "arm,cortex-a35\0arm,armv8"; - reg = <0x00 0x03>; - enable-method = "psci"; - operating-points-v2 = <0x03>; - cpu-idle-states = <0x04 0x05>; - phandle = <0x0c>; - }; - - idle-states { - entry-method = "psci"; - - cpu-sleep { - compatible = "arm,idle-state"; - local-timer-stop; - arm,psci-suspend-param = <0x10000>; - entry-latency-us = <0x78>; - exit-latency-us = <0xfa>; - min-residency-us = <0x384>; - phandle = <0x04>; - }; - - cluster-sleep { - compatible = "arm,idle-state"; - local-timer-stop; - arm,psci-suspend-param = <0x1010000>; - entry-latency-us = <0x190>; - exit-latency-us = <0x1f4>; - min-residency-us = <0x7d0>; - phandle = <0x05>; - }; - }; - }; - - cpu0-opp-table { - compatible = "operating-points-v2"; - opp-shared; - rockchip,temp-hysteresis = <0x1388>; - rockchip,low-temp = <0x00>; - rockchip,low-temp-min-volt = <0xf4240>; - rockchip,low-temp-adjust-volt = <0x00 0x5e8 0xc350>; - clocks = <0x02 0x01>; - rockchip,avs-scale = <0x04>; - rockchip,max-volt = <0x149970>; - rockchip,evb-irdrop = <0x61a8>; - nvmem-cells = <0x07 0x08>; - nvmem-cell-names = "cpu_leakage\0performance"; - rockchip,bin-scaling-sel = <0x00 0x0d 0x01 0x0d>; - rockchip,pvtm-voltage-sel = <0x00 0xc350 0x00 0xc351 0xd2f0 0x01 0xd2f1 0xea60 0x02 0xea61 0x1869f 0x03>; - rockchip,pvtm-freq = <0x639c0>; - rockchip,pvtm-volt = <0xf4240>; - rockchip,pvtm-ch = <0x00 0x00>; - rockchip,pvtm-sample-time = <0x3e8>; - rockchip,pvtm-number = <0x0a>; - rockchip,pvtm-error = <0x3e8>; - rockchip,pvtm-ref-temp = <0x28>; - rockchip,pvtm-temp-prop = <0xffffffc8 0xffffffc8>; - rockchip,thermal-zone = "soc-thermal"; - rockchip,avs = <0x01>; - phandle = <0x03>; - - opp-1008000000 { - opp-hz = <0x00 0x3c14dc00>; - opp-microvolt = <0x11edd8 0x11edd8 0x149970>; - opp-microvolt-L0 = <0x11edd8 0x11edd8 0x149970>; - opp-microvolt-L1 = <0x112a88 0x112a88 0x149970>; - opp-microvolt-L2 = <0x112a88 0x112a88 0x149970>; - opp-microvolt-L3 = <0x100590 0x100590 0x149970>; - clock-latency-ns = <0x9c40>; - }; - - opp-1200000000 { - opp-hz = <0x00 0x47868c00>; - opp-microvolt = <0x13d620 0x13d620 0x149970>; - opp-microvolt-L0 = <0x13d620 0x13d620 0x149970>; - opp-microvolt-L1 = <0x137478 0x137478 0x149970>; - opp-microvolt-L2 = <0x1312d0 0x1312d0 0x149970>; - opp-microvolt-L3 = <0x124f80 0x124f80 0x149970>; - clock-latency-ns = <0x9c40>; - }; - - opp-1248000000 { - opp-hz = <0x00 0x4a62f800>; - opp-microvolt = <0x149970 0x149970 0x149970>; - opp-microvolt-L0 = <0x149970 0x149970 0x149970>; - opp-microvolt-L1 = <0x13d620 0x13d620 0x149970>; - opp-microvolt-L2 = <0x137478 0x137478 0x149970>; - opp-microvolt-L3 = <0x12b128 0x12b128 0x149970>; - clock-latency-ns = <0x9c40>; - }; - - opp-1296000000 { - opp-hz = <0x00 0x4d3f6400>; - opp-microvolt = <0x149970 0x149970 0x149970>; - opp-microvolt-L0 = <0x149970 0x149970 0x149970>; - opp-microvolt-L1 = <0x149970 0x149970 0x149970>; - opp-microvolt-L2 = <0x13d620 0x13d620 0x149970>; - opp-microvolt-L3 = <0x1312d0 0x1312d0 0x149970>; - clock-latency-ns = <0x9c40>; - }; - }; - - arm-pmu { - compatible = "arm,cortex-a53-pmu"; - interrupts = <0x00 0x64 0x04 0x00 0x65 0x04 0x00 0x66 0x04 0x00 0x67 0x04>; - interrupt-affinity = <0x09 0x0a 0x0b 0x0c>; - }; - - bus-soc { - compatible = "rockchip,px30-bus"; - rockchip,busfreq-policy = "autocs"; - phandle = <0xc6>; - - soc-bus0 { - bus-id = <0x00>; - timer-us = <0x14>; - enable-msk = <0x40f7>; - status = "disabled"; - }; - - soc-bus1 { - bus-id = <0x01>; - timer-us = <0xc8>; - enable-msk = <0x40bf>; - status = "disabled"; - }; - - soc-bus2 { - bus-id = <0x02>; - timer-us = <0xc8>; - enable-msk = <0x4007>; - status = "disabled"; - }; - }; - - bus-apll { - compatible = "rockchip,px30-bus"; - rockchip,busfreq-policy = "clkfreq"; - clocks = <0x02 0x01>; - clock-names = "bus"; - operating-points-v2 = <0x0d>; - status = "okay"; - bus-supply = <0x0e>; - phandle = <0xc7>; - }; - - bus-apll-opp-table { - compatible = "operating-points-v2"; - opp-shared; - phandle = <0x0d>; - - opp-1512000000 { - opp-hz = <0x00 0x5a1f4a00>; - opp-microvolt = <0xf4240>; - }; - - opp-1008000000 { - opp-hz = <0x00 0x3c14dc00>; - opp-microvolt = <0xe7ef0>; - }; - }; - - cpuinfo { - compatible = "rockchip,cpuinfo"; - nvmem-cells = <0x0f>; - nvmem-cell-names = "id"; - }; - - display-subsystem { - compatible = "rockchip,display-subsystem"; - ports = <0x10>; - status = "okay"; - logo-memory-region = <0x11>; - phandle = <0xc8>; - - route { - - route-lvds { - status = "disabled"; - logo,uboot = "logo.bmp"; - logo,kernel = "logo_kernel.bmp"; - logo,mode = "center"; - charge_logo,mode = "center"; - connect = <0x12>; - phandle = <0xc9>; - }; - - route-dsi { - status = "okay"; - logo,uboot = "logo.bmp"; - logo,kernel = "logo_kernel.bmp"; - logo,mode = "center"; - charge_logo,mode = "center"; - connect = <0x13>; - phandle = <0xca>; - }; - - route-rgb { - status = "disabled"; - logo,uboot = "logo.bmp"; - logo,kernel = "logo_kernel.bmp"; - logo,mode = "center"; - charge_logo,mode = "center"; - connect = <0x14>; - phandle = <0xcb>; - }; - }; - }; - - firmware { - - optee { - compatible = "linaro,optee-tz"; - method = "smc"; - }; - }; - - external-gmac-clock { - compatible = "fixed-clock"; - clock-frequency = <0x2faf080>; - clock-output-names = "gmac_clkin"; - #clock-cells = <0x00>; - phandle = <0xcc>; - }; - - psci { - compatible = "arm,psci-1.0"; - method = "smc"; - }; - - rockchip-suspend { - compatible = "rockchip,pm-px30"; - status = "okay"; - rockchip,sleep-debug-en = <0x01>; - rockchip,sleep-mode-config = <0x20702>; - rockchip,wakeup-config = <0x85>; - phandle = <0xcd>; - }; - - timer { - compatible = "arm,armv8-timer"; - interrupts = <0x01 0x0d 0xf04 0x01 0x0e 0xf04 0x01 0x0b 0xf04 0x01 0x0a 0xf04>; - }; - - xin24m { - compatible = "fixed-clock"; - #clock-cells = <0x00>; - clock-frequency = <0x16e3600>; - clock-output-names = "xin24m"; - phandle = <0xce>; - }; - - xin32k { - compatible = "fixed-clock"; - #clock-cells = <0x00>; - clock-frequency = <0x8000>; - clock-output-names = "xin32k"; - phandle = <0xcf>; - }; - - power-management@ff000000 { - compatible = "rockchip,px30-pmu\0syscon\0simple-mfd"; - reg = <0x00 0xff000000 0x00 0x1000>; - phandle = <0xd0>; - - power-controller { - compatible = "rockchip,px30-power-controller"; - #power-domain-cells = <0x01>; - #address-cells = <0x01>; - #size-cells = <0x00>; - phandle = <0x8a>; - - pd_usb@5 { - reg = <0x05>; - clocks = <0x02 0x103 0x02 0x102 0x02 0x3c>; - pm_qos = <0x15 0x16>; - }; - - pd_sdcard@7 { - reg = <0x07>; - clocks = <0x02 0xf7 0x02 0x3b>; - pm_qos = <0x17>; - }; - - pd_gmac@9 { - reg = <0x09>; - clocks = <0x02 0xb2 0x02 0x143 0x02 0x40 0x02 0x3f>; - pm_qos = <0x18>; - }; - - pd_mmc_nand@10 { - reg = <0x0a>; - clocks = <0x02 0xfe 0x02 0x100 0x02 0xff 0x02 0x101 0x02 0x39 0x02 0x37 0x02 0x38 0x02 0x3a>; - pm_qos = <0x19 0x1a 0x1b 0x1c>; - }; - - pd_vpu@11 { - reg = <0x0b>; - clocks = <0x02 0xaf 0x02 0xf4 0x02 0x4b>; - pm_qos = <0x1d 0x1e>; - }; - - pd_vo@12 { - reg = <0x0c>; - clocks = <0x02 0xb7 0x02 0xb5 0x02 0xb6 0x02 0x96 0x02 0x97 0x02 0xfd 0x02 0xfb 0x02 0xfc 0x02 0x144 0x02 0x35 0x02 0x36>; - pm_qos = <0x1f 0x20 0x21 0x22>; - }; - - pd_vi@13 { - reg = <0x0d>; - clocks = <0x02 0xb3 0x02 0xb4 0x02 0xf9 0x02 0xfa 0x02 0x33>; - pm_qos = <0x23 0x24 0x25 0x26 0x27>; - }; - - pd_gpu@14 { - reg = <0x0e>; - clocks = <0x02 0x49>; - pm_qos = <0x28>; - }; - }; - }; - - syscon@ff010000 { - compatible = "rockchip,px30-pmugrf\0syscon\0simple-mfd"; - reg = <0x00 0xff010000 0x00 0x1000>; - #address-cells = <0x01>; - #size-cells = <0x01>; - phandle = <0xab>; - - io-domains { - compatible = "rockchip,px30-pmu-io-voltage-domain"; - status = "okay"; - pmuio1-supply = <0x29>; - pmuio2-supply = <0x29>; - phandle = <0xd1>; - }; - - reboot-mode { - compatible = "syscon-reboot-mode"; - offset = <0x200>; - mode-bootloader = <0x5242c301>; - mode-charge = <0x5242c30b>; - mode-fastboot = <0x5242c309>; - mode-loader = <0x5242c301>; - mode-normal = <0x5242c300>; - mode-recovery = <0x5242c303>; - mode-ums = <0x5242c30c>; - }; - - pmu-pvtm { - compatible = "rockchip,px30-pmu-pvtm"; - clocks = <0x2a 0x07>; - clock-names = "pmu"; - status = "okay"; - phandle = <0xd2>; - }; - }; - - serial@ff030000 { - compatible = "rockchip,px30-uart\0snps,dw-apb-uart"; - reg = <0x00 0xff030000 0x00 0x100>; - interrupts = <0x00 0x0f 0x04>; - clocks = <0x2a 0x06 0x2a 0x15>; - clock-names = "baudclk\0apb_pclk"; - reg-shift = <0x02>; - reg-io-width = <0x04>; - dmas = <0x2b 0x00 0x2b 0x01>; - pinctrl-names = "default"; - pinctrl-0 = <0x2c 0x2d 0x2e>; - status = "disabled"; - phandle = <0xd3>; - }; - - i2s@ff060000 { - compatible = "rockchip,px30-i2s-tdm"; - reg = <0x00 0xff060000 0x00 0x1000>; - interrupts = <0x00 0x0c 0x04>; - clocks = <0x02 0x10 0x02 0x12 0x02 0x106>; - clock-names = "mclk_tx\0mclk_rx\0hclk"; - dmas = <0x2b 0x10 0x2b 0x11>; - dma-names = "tx\0rx"; - resets = <0x02 0x84 0x02 0xbf>; - reset-names = "tx-m\0rx-m"; - rockchip,cru = <0x02>; - rockchip,grf = <0x2f>; - pinctrl-names = "default"; - pinctrl-0 = <0x30 0x31 0x32 0x33 0x34 0x35 0x36 0x37 0x38 0x39 0x3a 0x3b>; - status = "disabled"; - phandle = <0xd4>; - }; - - i2s@ff070000 { - compatible = "rockchip,px30-i2s\0rockchip,rk3066-i2s"; - reg = <0x00 0xff070000 0x00 0x1000>; - interrupts = <0x00 0x0d 0x04>; - clocks = <0x02 0x14 0x02 0x107>; - clock-names = "i2s_clk\0i2s_hclk"; - dmas = <0x2b 0x12 0x2b 0x13>; - dma-names = "tx\0rx"; - resets = <0x02 0x86 0x02 0x85>; - reset-names = "reset-m\0reset-h"; - pinctrl-names = "default"; - pinctrl-0 = <0x3c 0x3d 0x3e 0x3f>; - status = "okay"; - #sound-dai-cells = <0x00>; - phandle = <0xc4>; - }; - - i2s@ff080000 { - compatible = "rockchip,px30-i2s\0rockchip,rk3066-i2s"; - reg = <0x00 0xff080000 0x00 0x1000>; - interrupts = <0x00 0x0e 0x04>; - clocks = <0x02 0x16 0x02 0x108>; - clock-names = "i2s_clk\0i2s_hclk"; - dmas = <0x2b 0x14 0x2b 0x15>; - dma-names = "tx\0rx"; - resets = <0x02 0x88 0x02 0x87>; - reset-names = "reset-m\0reset-h"; - pinctrl-names = "default"; - pinctrl-0 = <0x40 0x41 0x42 0x43>; - status = "disabled"; - phandle = <0xd5>; - }; - - pdm@ff0a0000 { - compatible = "rockchip,px30-pdm\0rockchip,pdm"; - reg = <0x00 0xff0a0000 0x00 0x1000>; - clocks = <0x02 0x0f 0x02 0x105>; - clock-names = "pdm_clk\0pdm_hclk"; - dmas = <0x2b 0x18>; - dma-names = "rx"; - resets = <0x02 0x82>; - reset-names = "pdm-m"; - pinctrl-names = "default"; - pinctrl-0 = <0x44 0x45 0x46 0x47 0x48 0x49>; - status = "disabled"; - phandle = <0xd6>; - }; - - crypto@ff0b0000 { - compatible = "rockchip,px30-crypto"; - reg = <0x00 0xff0b0000 0x00 0x4000>; - interrupts = <0x00 0x52 0x04>; - clocks = <0x02 0xac 0x02 0xf1 0x02 0x30 0x02 0x31>; - clock-names = "aclk\0hclk\0sclk\0apb_pclk"; - resets = <0x02 0x74>; - reset-names = "crypto-rst"; - status = "disabled"; - phandle = <0xd7>; - }; - - rng@ff0b0000 { - compatible = "rockchip,cryptov2-rng"; - reg = <0x00 0xff0b0000 0x00 0x4000>; - clocks = <0x02 0x30 0x02 0x31 0x02 0xac 0x02 0xf1>; - clock-names = "clk_crypto\0clk_crypto_apk\0aclk_crypto\0hclk_crypto"; - assigned-clocks = <0x02 0x30 0x02 0x31 0x02 0xac 0x02 0xf1>; - assigned-clock-rates = <0x8f0d180 0x8f0d180 0xbebc200 0x5f5e100>; - resets = <0x02 0x74>; - reset-names = "reset"; - status = "okay"; - phandle = <0xd8>; - }; - - interrupt-controller@ff131000 { - compatible = "arm,gic-400"; - #interrupt-cells = <0x03>; - #address-cells = <0x00>; - interrupt-controller; - reg = <0x00 0xff131000 0x00 0x1000 0x00 0xff132000 0x00 0x2000 0x00 0xff134000 0x00 0x2000 0x00 0xff136000 0x00 0x2000>; - interrupts = <0x01 0x09 0xf04>; - phandle = <0x01>; - }; - - syscon@ff140000 { - compatible = "rockchip,px30-grf\0syscon\0simple-mfd"; - reg = <0x00 0xff140000 0x00 0x1000>; - #address-cells = <0x01>; - #size-cells = <0x01>; - phandle = <0x2f>; - - io-domains { - compatible = "rockchip,px30-io-voltage-domain"; - status = "okay"; - vccio1-supply = <0x4a>; - vccio2-supply = <0x4a>; - vccio3-supply = <0x4b>; - vccio4-supply = <0x4b>; - vccio5-supply = <0x4b>; - vccio6-supply = <0x4b>; - phandle = <0xd9>; - }; - - lvds { - compatible = "rockchip,px30-lvds"; - phys = <0x4c>; - phy-names = "phy"; - status = "disabled"; - phandle = <0xda>; - - ports { - #address-cells = <0x01>; - #size-cells = <0x00>; - - port@0 { - reg = <0x00>; - #address-cells = <0x01>; - #size-cells = <0x00>; - - endpoint@0 { - reg = <0x00>; - remote-endpoint = <0x12>; - phandle = <0xa1>; - }; - }; - }; - }; - - rgb { - compatible = "rockchip,px30-rgb"; - pinctrl-names = "default\0sleep"; - pinctrl-0 = <0x4d>; - pinctrl-1 = <0x4e>; - status = "disabled"; - phys = <0x4c>; - phy-names = "phy"; - phandle = <0xdb>; - - ports { - #address-cells = <0x01>; - #size-cells = <0x00>; - - port@0 { - reg = <0x00>; - #address-cells = <0x01>; - #size-cells = <0x00>; - - endpoint@0 { - reg = <0x00>; - remote-endpoint = <0x14>; - phandle = <0xa3>; - }; - }; - }; - }; - }; - - syscon@ff148000 { - compatible = "syscon\0simple-mfd"; - reg = <0x00 0xff148000 0x00 0x1000>; - #address-cells = <0x01>; - #size-cells = <0x01>; - phandle = <0xdc>; - - pvtm { - compatible = "rockchip,px30-pvtm"; - clocks = <0x02 0x4a>; - clock-names = "core"; - status = "okay"; - phandle = <0xdd>; - }; - }; - - serial@ff158000 { - compatible = "rockchip,px30-uart\0snps,dw-apb-uart"; - reg = <0x00 0xff158000 0x00 0x100>; - interrupts = <0x00 0x10 0x04>; - clocks = <0x02 0x18 0x02 0x149>; - clock-names = "baudclk\0apb_pclk"; - reg-shift = <0x02>; - reg-io-width = <0x04>; - dmas = <0x2b 0x02 0x2b 0x03>; - pinctrl-names = "default"; - pinctrl-0 = <0x4f 0x50>; - status = "okay"; - phandle = <0xde>; - }; - - serial@ff160000 { - compatible = "rockchip,px30-uart\0snps,dw-apb-uart"; - reg = <0x00 0xff160000 0x00 0x100>; - interrupts = <0x00 0x11 0x04>; - clocks = <0x02 0x19 0x02 0x14a>; - clock-names = "baudclk\0apb_pclk"; - reg-shift = <0x02>; - reg-io-width = <0x04>; - dmas = <0x2b 0x04 0x2b 0x05>; - pinctrl-names = "default"; - pinctrl-0 = <0x51>; - status = "disabled"; - phandle = <0xdf>; - }; - - serial@ff168000 { - compatible = "rockchip,px30-uart\0snps,dw-apb-uart"; - reg = <0x00 0xff168000 0x00 0x100>; - interrupts = <0x00 0x12 0x04>; - clocks = <0x02 0x1a 0x02 0x14b>; - clock-names = "baudclk\0apb_pclk"; - reg-shift = <0x02>; - reg-io-width = <0x04>; - dmas = <0x2b 0x06 0x2b 0x07>; - pinctrl-names = "default"; - pinctrl-0 = <0x52 0x53 0x54>; - status = "disabled"; - phandle = <0xe0>; - }; - - serial@ff170000 { - compatible = "rockchip,px30-uart\0snps,dw-apb-uart"; - reg = <0x00 0xff170000 0x00 0x100>; - interrupts = <0x00 0x13 0x04>; - clocks = <0x02 0x1b 0x02 0x14c>; - clock-names = "baudclk\0apb_pclk"; - reg-shift = <0x02>; - reg-io-width = <0x04>; - dmas = <0x2b 0x08 0x2b 0x09>; - pinctrl-names = "default"; - pinctrl-0 = <0x55 0x56 0x57>; - status = "disabled"; - phandle = <0xe1>; - }; - - serial@ff178000 { - compatible = "rockchip,px30-uart\0snps,dw-apb-uart"; - reg = <0x00 0xff178000 0x00 0x100>; - interrupts = <0x00 0x14 0x04>; - clocks = <0x02 0x1c 0x02 0x14d>; - clock-names = "baudclk\0apb_pclk"; - reg-shift = <0x02>; - reg-io-width = <0x04>; - dmas = <0x2b 0x0a 0x2b 0x0b>; - pinctrl-names = "default"; - pinctrl-0 = <0x58 0x59 0x5a>; - status = "disabled"; - phandle = <0xe2>; - }; - - i2c@ff180000 { - compatible = "rockchip,rk3399-i2c"; - reg = <0x00 0xff180000 0x00 0x1000>; - clocks = <0x02 0x1d 0x02 0x14e>; - clock-names = "i2c\0pclk"; - interrupts = <0x00 0x07 0x04>; - pinctrl-names = "default"; - pinctrl-0 = <0x5b>; - #address-cells = <0x01>; - #size-cells = <0x00>; - status = "okay"; - clock-frequency = <0x61a80>; - i2c-scl-rising-time-ns = <0x118>; - i2c-scl-falling-time-ns = <0x10>; - phandle = <0xe3>; - - pmic@20 { - compatible = "rockchip,rk817"; - reg = <0x20>; - interrupt-parent = <0x5c>; - interrupts = <0x0a 0x08>; - pinctrl-names = "default\0pmic-sleep\0pmic-power-off\0pmic-reset"; - pinctrl-0 = <0x5d>; - pinctrl-1 = <0x5e 0x5f>; - pinctrl-2 = <0x60 0x61>; - pinctrl-3 = <0x62 0x63>; - rockchip,system-power-controller; - wakeup-source; - #clock-cells = <0x01>; - clock-output-names = "rk808-clkout1\0rk808-clkout2"; - pmic-reset-func = <0x01>; - vcc1-supply = <0x64>; - vcc2-supply = <0x64>; - vcc3-supply = <0x64>; - vcc4-supply = <0x64>; - vcc5-supply = <0x64>; - vcc6-supply = <0x64>; - vcc7-supply = <0x64>; - vcc8-supply = <0x64>; - vcc9-supply = <0x65>; - phandle = <0xe4>; - - pwrkey { - status = "okay"; - }; - - pinctrl_rk8xx { - gpio-controller; - #gpio-cells = <0x02>; - phandle = <0xe5>; - - rk817_ts_gpio1 { - pins = "gpio_ts"; - function = "pin_fun1"; - phandle = <0xe6>; - }; - - rk817_gt_gpio2 { - pins = "gpio_gt"; - function = "pin_fun1"; - phandle = <0xe7>; - }; - - rk817_pin_ts { - pins = "gpio_ts"; - function = "pin_fun0"; - phandle = <0xe8>; - }; - - rk817_pin_gt { - pins = "gpio_gt"; - function = "pin_fun0"; - phandle = <0xe9>; - }; - - rk817_slppin_null { - pins = "gpio_slp"; - function = "pin_fun0"; - phandle = <0xea>; - }; - - rk817_slppin_slp { - pins = "gpio_slp"; - function = "pin_fun1"; - phandle = <0x5f>; - }; - - rk817_slppin_pwrdn { - pins = "gpio_slp"; - function = "pin_fun2"; - phandle = <0x61>; - }; - - rk817_slppin_rst { - pins = "gpio_slp"; - function = "pin_fun3"; - phandle = <0x63>; - }; - }; - - regulators { - - DCDC_REG1 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0xe7ef0>; - regulator-max-microvolt = <0x118c30>; - regulator-ramp-delay = <0x1771>; - regulator-initial-mode = <0x02>; - regulator-name = "vdd_logic"; - phandle = <0x0e>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <0xe7ef0>; - }; - }; - - DCDC_REG2 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0xe7ef0>; - regulator-max-microvolt = <0x149970>; - regulator-ramp-delay = <0x1771>; - regulator-initial-mode = <0x02>; - regulator-name = "vdd_arm"; - phandle = <0x06>; - - regulator-state-mem { - regulator-off-in-suspend; - regulator-suspend-microvolt = <0xe7ef0>; - }; - }; - - DCDC_REG3 { - regulator-always-on; - regulator-boot-on; - regulator-initial-mode = <0x02>; - regulator-name = "vcc_ddr"; - phandle = <0xeb>; - - regulator-state-mem { - regulator-on-in-suspend; - }; - }; - - DCDC_REG4 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0x325aa0>; - regulator-max-microvolt = <0x325aa0>; - regulator-initial-mode = <0x02>; - regulator-name = "vcc_3v3"; - phandle = <0x4b>; - - regulator-state-mem { - regulator-off-in-suspend; - regulator-suspend-microvolt = <0x325aa0>; - }; - }; - - LDO_REG1 { - regulator-min-microvolt = <0xf4240>; - regulator-max-microvolt = <0xf4240>; - regulator-name = "vcc_1v0"; - phandle = <0xec>; - - regulator-state-mem { - regulator-off-in-suspend; - regulator-suspend-microvolt = <0xf4240>; - }; - }; - - LDO_REG2 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0x1b7740>; - regulator-max-microvolt = <0x1b7740>; - regulator-name = "vcc1v8_soc"; - phandle = <0x88>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <0x1b7740>; - }; - }; - - LDO_REG3 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0xf4240>; - regulator-max-microvolt = <0xf4240>; - regulator-name = "vcc1v0_soc"; - phandle = <0xed>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <0xf4240>; - }; - }; - - LDO_REG4 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0x325aa0>; - regulator-max-microvolt = <0x325aa0>; - regulator-name = "vcc3v3_pmu"; - phandle = <0x29>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <0x325aa0>; - }; - }; - - LDO_REG5 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0x1b7740>; - regulator-max-microvolt = <0x1b7740>; - regulator-name = "vccio_sd"; - phandle = <0x4a>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <0x1b7740>; - }; - }; - - LDO_REG6 { - regulator-min-microvolt = <0x1b7740>; - regulator-max-microvolt = <0x2dc6c0>; - regulator-boot-on; - regulator-name = "vcc_sd"; - phandle = <0x93>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <0x2dc6c0>; - }; - }; - - LDO_REG7 { - regulator-min-microvolt = <0x325aa0>; - regulator-max-microvolt = <0x325aa0>; - regulator-name = "vcc_backlight"; - regulator-always-on; - phandle = <0xc3>; - - regulator-state-mem { - regulator-off-in-suspend; - regulator-suspend-microvolt = <0x325aa0>; - }; - }; - - LDO_REG8 { - regulator-min-microvolt = <0x2ab980>; - regulator-max-microvolt = <0x2ab980>; - regulator-name = "vcc_lcd"; - phandle = <0x9e>; - - regulator-state-mem { - regulator-off-in-suspend; - regulator-suspend-microvolt = <0x2ab980>; - }; - }; - - BOOST { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0x4c4b40>; - regulator-max-microvolt = <0x5265c0>; - regulator-name = "boost"; - phandle = <0x65>; - }; - - OTG_SWITCH { - regulator-boot-on; - regulator-name = "otg_switch"; - phandle = <0xee>; - }; - }; - - battery { - compatible = "rk817,battery"; - ocv_table = <0xc5d 0xc94 0xcd0 0xd02 0xd34 0xd66 0xd98 0xdca 0xdfc 0xe2e 0xe56 0xe7e 0xea6 0xece 0xef6 0xf1e 0xf46 0xf6e 0xf96 0xf9b 0xfa0>; - design_capacity = <0xd34>; - design_qmax = <0xe86>; - bat_res = <0x64>; - sleep_enter_current = <0x12c>; - sleep_exit_current = <0x12c>; - sleep_filter_current = <0x64>; - power_off_thresd = <0xbb8>; - zero_algorithm_vol = <0xf0a>; - max_soc_offset = <0x3c>; - monitor_sec = <0x05>; - virtual_power = <0x00>; - sample_res = <0x0a>; - }; - - charger { - compatible = "rk817,charger"; - min_input_voltage = <0x1194>; - max_input_current = <0x5dc>; - max_chrg_current = <0x7d0>; - max_chrg_voltage = <0x1068>; - chrg_term_mode = <0x00>; - chrg_finish_cur = <0x34>; - virtual_power = <0x00>; - sample_res = <0x0a>; - dc_det_gpio = <0x5c 0x0b 0x00>; - bat_low_gpio = <0x66 0x0d 0x00>; - extcon = <0x67>; - }; - - codec { - #sound-dai-cells = <0x00>; - compatible = "rockchip,rk817-codec"; - clocks = <0x02 0x15>; - clock-names = "mclk"; - pinctrl-names = "default"; - pinctrl-0 = <0x68>; - hp-volume = <0x14>; - spk-volume = <0x03>; - status = "okay"; - phandle = <0xc5>; - }; - }; - }; - - i2c@ff190000 { - compatible = "rockchip,rk3399-i2c"; - reg = <0x00 0xff190000 0x00 0x1000>; - clocks = <0x02 0x1e 0x02 0x14f>; - clock-names = "i2c\0pclk"; - interrupts = <0x00 0x08 0x04>; - pinctrl-names = "default"; - pinctrl-0 = <0x69>; - #address-cells = <0x01>; - #size-cells = <0x00>; - status = "okay"; - clock-frequency = <0x61a80>; - phandle = <0xef>; - }; - - i2c@ff1a0000 { - compatible = "rockchip,rk3399-i2c"; - reg = <0x00 0xff1a0000 0x00 0x1000>; - clocks = <0x02 0x1f 0x02 0x150>; - clock-names = "i2c\0pclk"; - interrupts = <0x00 0x09 0x04>; - pinctrl-names = "default"; - pinctrl-0 = <0x6a>; - #address-cells = <0x01>; - #size-cells = <0x00>; - status = "disabled"; - phandle = <0xf0>; - }; - - i2c@ff1b0000 { - compatible = "rockchip,rk3399-i2c"; - reg = <0x00 0xff1b0000 0x00 0x1000>; - clocks = <0x02 0x20 0x02 0x151>; - clock-names = "i2c\0pclk"; - interrupts = <0x00 0x0a 0x04>; - pinctrl-names = "default"; - pinctrl-0 = <0x6b>; - #address-cells = <0x01>; - #size-cells = <0x00>; - status = "disabled"; - phandle = <0xf1>; - }; - - spi@ff1d0000 { - compatible = "rockchip,px30-spi\0rockchip,rk3066-spi"; - reg = <0x00 0xff1d0000 0x00 0x1000>; - interrupts = <0x00 0x1a 0x04>; - #address-cells = <0x01>; - #size-cells = <0x00>; - clocks = <0x02 0x24 0x02 0x155>; - clock-names = "spiclk\0apb_pclk"; - dmas = <0x2b 0x0c 0x2b 0x0d>; - dma-names = "tx\0rx"; - pinctrl-names = "default\0high_speed"; - pinctrl-0 = <0x6c 0x6d 0x6e 0x6f>; - pinctrl-1 = <0x70 0x6d 0x71 0x72>; - status = "disabled"; - phandle = <0xf2>; - }; - - spi@ff1d8000 { - compatible = "rockchip,px30-spi\0rockchip,rk3066-spi"; - reg = <0x00 0xff1d8000 0x00 0x1000>; - interrupts = <0x00 0x1b 0x04>; - #address-cells = <0x01>; - #size-cells = <0x00>; - clocks = <0x02 0x25 0x02 0x156>; - clock-names = "spiclk\0apb_pclk"; - dmas = <0x2b 0x0e 0x2b 0x0f>; - dma-names = "tx\0rx"; - pinctrl-names = "default\0high_speed"; - pinctrl-0 = <0x73 0x74 0x75 0x76 0x77>; - pinctrl-1 = <0x78 0x74 0x75 0x79 0x7a>; - status = "disabled"; - phandle = <0xf3>; - }; - - watchdog@ff1e0000 { - compatible = "snps,dw-wdt"; - reg = <0x00 0xff1e0000 0x00 0x100>; - clocks = <0x02 0x15b>; - interrupts = <0x00 0x25 0x04>; - resets = <0x02 0xb5>; - reset-names = "reset"; - status = "disabled"; - phandle = <0xf4>; - }; - - pwm@ff200000 { - compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm"; - reg = <0x00 0xff200000 0x00 0x10>; - #pwm-cells = <0x03>; - pinctrl-names = "active"; - pinctrl-0 = <0x7b>; - clocks = <0x02 0x22 0x02 0x153>; - clock-names = "pwm\0pclk"; - status = "okay"; - phandle = <0xbc>; - }; - - pwm@ff200010 { - compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm"; - reg = <0x00 0xff200010 0x00 0x10>; - #pwm-cells = <0x03>; - pinctrl-names = "active"; - pinctrl-0 = <0x7c>; - clocks = <0x02 0x22 0x02 0x153>; - clock-names = "pwm\0pclk"; - status = "okay"; - phandle = <0xc2>; - }; - - pwm@ff200020 { - compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm"; - reg = <0x00 0xff200020 0x00 0x10>; - #pwm-cells = <0x03>; - pinctrl-names = "active"; - pinctrl-0 = <0x7d>; - clocks = <0x02 0x22 0x02 0x153>; - clock-names = "pwm\0pclk"; - status = "disabled"; - phandle = <0xf5>; - }; - - pwm@ff200030 { - compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm"; - reg = <0x00 0xff200030 0x00 0x10>; - #pwm-cells = <0x03>; - pinctrl-names = "active"; - pinctrl-0 = <0x7e>; - clocks = <0x02 0x22 0x02 0x153>; - clock-names = "pwm\0pclk"; - status = "disabled"; - phandle = <0xf6>; - }; - - pwm@ff208000 { - compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm"; - reg = <0x00 0xff208000 0x00 0x10>; - #pwm-cells = <0x03>; - pinctrl-names = "active"; - pinctrl-0 = <0x7f>; - clocks = <0x02 0x23 0x02 0x154>; - clock-names = "pwm\0pclk"; - status = "disabled"; - phandle = <0xf7>; - }; - - pwm@ff208010 { - compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm"; - reg = <0x00 0xff208010 0x00 0x10>; - #pwm-cells = <0x03>; - pinctrl-names = "active"; - pinctrl-0 = <0x80>; - clocks = <0x02 0x23 0x02 0x154>; - clock-names = "pwm\0pclk"; - status = "disabled"; - phandle = <0xf8>; - }; - - pwm@ff208020 { - compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm"; - reg = <0x00 0xff208020 0x00 0x10>; - #pwm-cells = <0x03>; - pinctrl-names = "active"; - pinctrl-0 = <0x81>; - clocks = <0x02 0x23 0x02 0x154>; - clock-names = "pwm\0pclk"; - status = "disabled"; - phandle = <0xf9>; - }; - - pwm@ff208030 { - compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm"; - reg = <0x00 0xff208030 0x00 0x10>; - #pwm-cells = <0x03>; - pinctrl-names = "active"; - pinctrl-0 = <0x82>; - clocks = <0x02 0x23 0x02 0x154>; - clock-names = "pwm\0pclk"; - status = "disabled"; - phandle = <0xfa>; - }; - - rktimer@ff210000 { - compatible = "rockchip,rk3288-timer"; - reg = <0x00 0xff210000 0x00 0x1000>; - interrupts = <0x00 0x1e 0x04>; - clocks = <0x02 0x159 0x02 0x26>; - clock-names = "pclk\0timer"; - phandle = <0xfb>; - }; - - amba { - compatible = "simple-bus"; - #address-cells = <0x02>; - #size-cells = <0x02>; - ranges; - - dmac@ff240000 { - compatible = "arm,pl330\0arm,primecell"; - reg = <0x00 0xff240000 0x00 0x4000>; - interrupts = <0x00 0x01 0x04 0x00 0x02 0x04>; - clocks = <0x02 0xbb>; - clock-names = "apb_pclk"; - #dma-cells = <0x01>; - peripherals-req-type-burst; - phandle = <0x2b>; - }; - }; - - thermal-zones { - phandle = <0xfc>; - - soc-thermal { - polling-delay-passive = <0x14>; - polling-delay = <0x3e8>; - sustainable-power = <0x2ee>; - thermal-sensors = <0x83 0x00>; - phandle = <0xfd>; - - trips { - - trip-point-0 { - temperature = <0x11170>; - hysteresis = <0x7d0>; - type = "passive"; - phandle = <0xfe>; - }; - - trip-point-1 { - temperature = <0x14c08>; - hysteresis = <0x7d0>; - type = "passive"; - phandle = <0x84>; - }; - - soc-crit { - temperature = <0x1c138>; - hysteresis = <0x7d0>; - type = "critical"; - phandle = <0xff>; - }; - }; - - cooling-maps { - - map0 { - trip = <0x84>; - cooling-device = <0x09 0xffffffff 0xffffffff>; - contribution = <0x1000>; - }; - - map1 { - trip = <0x84>; - cooling-device = <0x85 0xffffffff 0xffffffff>; - contribution = <0x1000>; - }; - }; - }; - - gpu-thermal { - polling-delay-passive = <0x64>; - polling-delay = <0x3e8>; - thermal-sensors = <0x83 0x01>; - phandle = <0x100>; - }; - }; - - tsadc@ff280000 { - compatible = "rockchip,px30-tsadc"; - reg = <0x00 0xff280000 0x00 0x100>; - interrupts = <0x00 0x24 0x04>; - rockchip,grf = <0x2f>; - clocks = <0x02 0x2c 0x02 0x158>; - clock-names = "tsadc\0apb_pclk"; - assigned-clocks = <0x02 0x2c>; - assigned-clock-rates = <0xc350>; - resets = <0x02 0xa8>; - reset-names = "tsadc-apb"; - #thermal-sensor-cells = <0x01>; - rockchip,hw-tshut-temp = <0x1d4c0>; - status = "okay"; - pinctrl-names = "gpio\0otpout"; - pinctrl-0 = <0x86>; - pinctrl-1 = <0x87>; - phandle = <0x83>; - }; - - saradc@ff288000 { - compatible = "rockchip,px30-saradc\0rockchip,rk3399-saradc"; - reg = <0x00 0xff288000 0x00 0x100>; - interrupts = <0x00 0x54 0x04>; - #io-channel-cells = <0x01>; - clocks = <0x02 0x2d 0x02 0x157>; - clock-names = "saradc\0apb_pclk"; - resets = <0x02 0xa5>; - reset-names = "saradc-apb"; - status = "okay"; - vref-supply = <0x88>; - phandle = <0xbe>; - }; - - otp@ff290000 { - compatible = "rockchip,px30-otp"; - reg = <0x00 0xff290000 0x00 0x4000>; - #address-cells = <0x01>; - #size-cells = <0x01>; - clocks = <0x02 0x2f 0x02 0x15a 0x02 0x161>; - clock-names = "clk_otp\0pclk_otp\0pclk_otp_phy"; - resets = <0x02 0xb4>; - reset-names = "otp_phy"; - phandle = <0x101>; - - id@7 { - reg = <0x07 0x10>; - phandle = <0x0f>; - }; - - cpu-leakage@17 { - reg = <0x17 0x01>; - phandle = <0x07>; - }; - - performance@1e { - reg = <0x1e 0x01>; - bits = <0x04 0x03>; - phandle = <0x08>; - }; - }; - - clock-controller@ff2b0000 { - compatible = "rockchip,px30-cru"; - reg = <0x00 0xff2b0000 0x00 0x1000>; - rockchip,grf = <0x2f>; - rockchip,boost = <0x89>; - #clock-cells = <0x01>; - #reset-cells = <0x01>; - assigned-clocks = <0x02 0x04>; - assigned-clock-rates = <0x3dfd2400>; - phandle = <0x02>; - }; - - cpu-boost@ff2b8000 { - compatible = "syscon"; - reg = <0x00 0xff2b8000 0x00 0x1000>; - rockchip,boost-low-con0 = <0x1032>; - rockchip,boost-low-con1 = <0x1441>; - rockchip,boost-high-con0 = <0x1036>; - rockchip,boost-high-con1 = <0x1441>; - rockchip,boost-backup-pll = <0x01>; - rockchip,boost-backup-pll-usage = <0x00>; - rockchip,boost-switch-threshold = <0x249f00>; - rockchip,boost-statis-threshold = <0x100>; - rockchip,boost-statis-enable = <0x00>; - rockchip,boost-enable = <0x00>; - phandle = <0x89>; - }; - - pmu-clock-controller@ff2bc000 { - compatible = "rockchip,px30-pmucru"; - reg = <0x00 0xff2bc000 0x00 0x1000>; - rockchip,grf = <0x2f>; - #clock-cells = <0x01>; - #reset-cells = <0x01>; - assigned-clocks = <0x2a 0x01 0x2a 0x08 0x2a 0x05 0x02 0x07 0x02 0xab 0x02 0xb0 0x02 0xf0 0x02 0xf5 0x02 0x140 0x02 0x49>; - assigned-clock-rates = <0x47868c00 0x5f5e100 0x18cba80 0x23c34600 0xbebc200 0xbebc200 0x8f0d180 0x8f0d180 0x5f5e100 0xbebc200>; - phandle = <0x2a>; - }; - - syscon@ff2c0000 { - compatible = "rockchip,px30-usb2phy-grf\0syscon\0simple-mfd"; - reg = <0x00 0xff2c0000 0x00 0x10000>; - #address-cells = <0x01>; - #size-cells = <0x01>; - phandle = <0x102>; - - usb2-phy@100 { - compatible = "rockchip,px30-usb2phy\0rockchip,rk3328-usb2phy"; - reg = <0x100 0x10>; - clocks = <0x2a 0x0a>; - clock-names = "phyclk"; - #clock-cells = <0x00>; - assigned-clocks = <0x02 0x0e 0x02 0x55>; - assigned-clock-parents = <0x67 0x02 0x0e>; - clock-output-names = "usb480m_phy"; - status = "okay"; - phandle = <0x67>; - - host-port { - #phy-cells = <0x00>; - interrupts = <0x00 0x44 0x04>; - interrupt-names = "linestate"; - status = "okay"; - phandle = <0x8c>; - }; - - otg-port { - #phy-cells = <0x00>; - interrupts = <0x00 0x42 0x04 0x00 0x41 0x04 0x00 0x40 0x04>; - interrupt-names = "otg-bvalid\0otg-id\0linestate"; - status = "disabled"; - phandle = <0x8b>; - }; - }; - }; - - video-phy@ff2e0000 { - compatible = "rockchip,px30-video-phy"; - reg = <0x00 0xff2e0000 0x00 0x10000 0x00 0xff450000 0x00 0x10000>; - clocks = <0x2a 0x0b 0x02 0x145 0x02 0x144>; - clock-names = "ref\0pclk_phy\0pclk_host"; - #clock-cells = <0x00>; - resets = <0x02 0x3e>; - reset-names = "rst"; - power-domains = <0x8a 0x0c>; - #phy-cells = <0x00>; - status = "okay"; - phandle = <0x4c>; - }; - - mipi-dphy-rx0@ff2f0000 { - compatible = "rockchip,rk3326-mipi-dphy"; - reg = <0x00 0xff2f0000 0x00 0x4000>; - clocks = <0x02 0x146>; - clock-names = "dphy-ref"; - power-domains = <0x8a 0x0d>; - rockchip,grf = <0x2f>; - status = "okay"; - phandle = <0x103>; - }; - - usb@ff300000 { - compatible = "rockchip,px30-usb\0rockchip,rk3066-usb\0snps,dwc2"; - reg = <0x00 0xff300000 0x00 0x40000>; - interrupts = <0x00 0x3e 0x04>; - clocks = <0x02 0x102>; - clock-names = "otg"; - power-domains = <0x8a 0x05>; - dr_mode = "otg"; - g-np-tx-fifo-size = <0x10>; - g-rx-fifo-size = <0x118>; - g-tx-fifo-size = <0x100 0x80 0x80 0x40 0x20 0x10>; - g-use-dma; - phys = <0x8b>; - phy-names = "usb2-phy"; - status = "okay"; - phandle = <0x104>; - }; - - usb@ff340000 { - compatible = "generic-ehci"; - reg = <0x00 0xff340000 0x00 0x10000>; - interrupts = <0x00 0x3c 0x04>; - clocks = <0x02 0x103 0x67>; - clock-names = "usbhost\0utmi"; - power-domains = <0x8a 0x05>; - phys = <0x8c>; - phy-names = "usb"; - status = "disabled"; - phandle = <0x105>; - }; - - usb@ff350000 { - compatible = "generic-ohci"; - reg = <0x00 0xff350000 0x00 0x10000>; - interrupts = <0x00 0x3d 0x04>; - clocks = <0x02 0x103 0x67>; - clock-names = "usbhost\0utmi"; - power-domains = <0x8a 0x05>; - phys = <0x8c>; - phy-names = "usb"; - status = "disabled"; - phandle = <0x106>; - }; - - ethernet@ff360000 { - compatible = "rockchip,px30-gmac"; - reg = <0x00 0xff360000 0x00 0x10000>; - rockchip,grf = <0x2f>; - interrupts = <0x00 0x2b 0x04>; - interrupt-names = "macirq"; - clocks = <0x02 0x3e 0x02 0x3f 0x02 0x3f 0x02 0x40 0x02 0x41 0x02 0xb2 0x02 0x143 0x02 0x4c>; - clock-names = "stmmaceth\0mac_clk_rx\0mac_clk_tx\0clk_mac_ref\0clk_mac_refout\0aclk_mac\0pclk_mac\0clk_mac_speed"; - phy-mode = "rmii"; - pinctrl-names = "default"; - pinctrl-0 = <0x8d 0x8e>; - resets = <0x02 0x5e>; - reset-names = "stmmaceth"; - power-domains = <0x8a 0x09>; - status = "disabled"; - phandle = <0x107>; - }; - - dwmmc@ff370000 { - compatible = "rockchip,px30-dw-mshc\0rockchip,rk3288-dw-mshc"; - reg = <0x00 0xff370000 0x00 0x4000>; - max-frequency = <0x8f0d180>; - clocks = <0x02 0xf7 0x02 0x3b 0x02 0x43 0x02 0x44>; - clock-names = "biu\0ciu\0ciu-drv\0ciu-sample"; - assigned-clocks = <0x02 0x3b>; - assigned-clock-parents = <0x02 0x57>; - power-domains = <0x8a 0x07>; - fifo-depth = <0x100>; - interrupts = <0x00 0x36 0x04>; - pinctrl-names = "default"; - pinctrl-0 = <0x8f 0x90 0x91 0x92>; - status = "okay"; - bus-width = <0x04>; - cap-mmc-highspeed; - cap-sd-highspeed; - supports-sd; - card-detect-delay = <0x320>; - ignore-pm-notify; - cd-gpios = <0x5c 0x03 0x01>; - sd-uhs-sdr12; - sd-uhs-sdr25; - sd-uhs-sdr50; - sd-uhs-sdr104; - vqmmc-supply = <0x4a>; - vmmc-supply = <0x93>; - phandle = <0x108>; - }; - - dwmmc@ff380000 { - compatible = "rockchip,px30-dw-mshc\0rockchip,rk3288-dw-mshc"; - reg = <0x00 0xff380000 0x00 0x4000>; - max-frequency = <0x8f0d180>; - clocks = <0x02 0xff 0x02 0x38 0x02 0x45 0x02 0x46>; - clock-names = "biu\0ciu\0ciu-drv\0ciu-sample"; - assigned-clocks = <0x02 0x38>; - assigned-clock-parents = <0x02 0x51>; - power-domains = <0x8a 0x0a>; - fifo-depth = <0x100>; - interrupts = <0x00 0x37 0x04>; - pinctrl-names = "default"; - pinctrl-0 = <0x94 0x95 0x96>; - status = "okay"; - bus-width = <0x04>; - cap-mmc-highspeed; - cap-sd-highspeed; - supports-sd; - card-detect-delay = <0x320>; - ignore-pm-notify; - cd-gpios = <0x97 0x0e 0x01>; - sd-uhs-sdr12; - sd-uhs-sdr25; - sd-uhs-sdr50; - sd-uhs-sdr104; - vqmmc-supply = <0x4a>; - vmmc-supply = <0x93>; - phandle = <0x109>; - }; - - dwmmc@ff390000 { - compatible = "rockchip,px30-dw-mshc\0rockchip,rk3288-dw-mshc"; - reg = <0x00 0xff390000 0x00 0x4000>; - max-frequency = <0x8f0d180>; - clocks = <0x02 0x100 0x02 0x39 0x02 0x47 0x02 0x48>; - clock-names = "biu\0ciu\0ciu-drv\0ciu-sample"; - assigned-clocks = <0x02 0x39>; - assigned-clock-parents = <0x02 0x53>; - power-domains = <0x8a 0x0a>; - fifo-depth = <0x100>; - interrupts = <0x00 0x35 0x04>; - status = "disabled"; - phandle = <0x10a>; - }; - - nandc@ff3b0000 { - compatible = "rockchip,rk-nandc"; - reg = <0x00 0xff3b0000 0x00 0x4000>; - interrupts = <0x00 0x39 0x04>; - nandc_id = <0x00>; - clocks = <0x02 0x37 0x02 0xfe>; - clock-names = "clk_nandc\0hclk_nandc"; - assigned-clocks = <0x02 0x37>; - assigned-clock-parents = <0x02 0x4f>; - power-domains = <0x8a 0x0a>; - status = "disabled"; - phandle = <0x10b>; - }; - - sfc@ff3a0000 { - compatible = "rockchip,sfc"; - reg = <0x00 0xff3a0000 0x00 0x4000>; - interrupts = <0x00 0x38 0x04>; - clocks = <0x02 0x3a 0x02 0x101>; - clock-names = "clk_sfc\0hclk_sfc"; - assigned-clocks = <0x02 0x3a>; - assigned-clock-rates = <0x989680>; - status = "disabled"; - phandle = <0x10c>; - }; - - gpu@ff400000 { - compatible = "arm,malit602\0arm,malit60x\0arm,malit6xx\0arm,mali-midgard"; - reg = <0x00 0xff400000 0x00 0x4000>; - interrupts = <0x00 0x2d 0x04 0x00 0x2e 0x04 0x00 0x2f 0x04>; - interrupt-names = "GPU\0MMU\0JOB"; - clocks = <0x02 0x49>; - clock-names = "clk_mali"; - power-domains = <0x8a 0x0e>; - #cooling-cells = <0x02>; - operating-points-v2 = <0x98>; - status = "okay"; - mali-supply = <0x0e>; - phandle = <0x85>; - - power_model { - compatible = "arm,mali-simple-power-model"; - static-coefficient = <0x64578>; - dynamic-coefficient = <0x2dd>; - ts = <0x7d00 0x125c 0xffffffb0 0x02>; - thermal-zone = "gpu-thermal"; - }; - }; - - gpu-opp-table { - compatible = "operating-points-v2"; - rockchip,thermal-zone = "soc-thermal"; - rockchip,temp-hysteresis = <0x1388>; - rockchip,low-temp = <0x00>; - rockchip,low-temp-min-volt = <0xf4240>; - rockchip,low-temp-adjust-volt = <0x00 0x1e0 0xc350>; - rockchip,max-volt = <0x11edd8>; - rockchip,evb-irdrop = <0x61a8>; - rockchip,pvtm-voltage-sel = <0x00 0xc350 0x00 0xc351 0xd2f0 0x01 0xd2f1 0xea60 0x02 0xea61 0x1869f 0x03>; - rockchip,pvtm-ch = <0x00 0x00>; - phandle = <0x98>; - - opp-400000000 { - opp-hz = <0x00 0x17d78400>; - opp-microvolt = <0x100590>; - opp-microvolt-L0 = <0x100590>; - opp-microvolt-L1 = <0xfa3e8>; - opp-microvolt-L2 = <0xee098>; - opp-microvolt-L3 = <0xe7ef0>; - }; - - opp-480000000 { - opp-hz = <0x00 0x1c9c3800>; - opp-microvolt = <0x112a88>; - opp-microvolt-L0 = <0x112a88>; - opp-microvolt-L1 = <0x10c8e0>; - opp-microvolt-L2 = <0x100590>; - opp-microvolt-L3 = <0xf4240>; - }; - - opp-520000000 { - opp-hz = <0x00 0x1efe9200>; - opp-microvolt = <0x118c30>; - opp-microvolt-L0 = <0x118c30>; - opp-microvolt-L1 = <0x118c30>; - opp-microvolt-L2 = <0x10c8e0>; - opp-microvolt-L3 = <0x100590>; - }; - }; - - hevc_service@ff440000 { - compatible = "rockchip,hevc_sub"; - iommu_enabled = <0x01>; - reg = <0x00 0xff440000 0x00 0x400>; - interrupts = <0x00 0x31 0x04>; - interrupt-names = "irq_dec"; - dev_mode = <0x01>; - iommus = <0x99>; - allocator = <0x01>; - phandle = <0x9c>; - }; - - vpu_service@ff442000 { - compatible = "rockchip,vpu_sub"; - iommu_enabled = <0x01>; - reg = <0x00 0xff442000 0x00 0x800>; - interrupts = <0x00 0x50 0x04 0x00 0x4f 0x04>; - interrupt-names = "irq_enc\0irq_dec"; - dev_mode = <0x00>; - iommus = <0x9a>; - allocator = <0x01>; - phandle = <0x9b>; - }; - - vpu_combo { - compatible = "rockchip,vpu_combo"; - subcnt = <0x02>; - rockchip,grf = <0x2f>; - rockchip,sub = <0x9b 0x9c>; - clocks = <0x02 0xaf 0x02 0xf4 0x02 0x4b>; - clock-names = "aclk_vcodec\0hclk_vcodec\0clk_core"; - resets = <0x02 0x24 0x02 0x26 0x02 0x25 0x02 0x27 0x02 0x3f>; - reset-names = "video_a\0video_h\0niu_a\0niu_h\0video_core"; - power-domains = <0x8a 0x0b>; - mode_bit = <0x0f>; - mode_ctrl = <0x410>; - status = "okay"; - phandle = <0x10d>; - }; - - iommu@ff440440 { - compatible = "rockchip,iommu"; - reg = <0x00 0xff440440 0x00 0x40 0x00 0xff440480 0x00 0x40>; - interrupts = <0x00 0x32 0x04>; - interrupt-names = "hevc_mmu"; - clocks = <0x02 0xaf 0x02 0xf4>; - clock-names = "aclk\0hclk"; - power-domains = <0x8a 0x0b>; - #iommu-cells = <0x00>; - phandle = <0x99>; - }; - - iommu@ff442800 { - compatible = "rockchip,iommu"; - reg = <0x00 0xff442800 0x00 0x100>; - interrupts = <0x00 0x51 0x04>; - interrupt-names = "vpu_mmu"; - clocks = <0x02 0xaf 0x02 0xf4>; - clock-names = "aclk\0hclk"; - power-domains = <0x8a 0x0b>; - #iommu-cells = <0x00>; - phandle = <0x9a>; - }; - - dsi@ff450000 { - compatible = "rockchip,px30-mipi-dsi"; - reg = <0x00 0xff450000 0x00 0x10000>; - interrupts = <0x00 0x4b 0x04>; - clocks = <0x02 0x144 0x4c>; - clock-names = "pclk\0hs_clk"; - resets = <0x02 0x3d>; - reset-names = "apb"; - phys = <0x4c>; - phy-names = "mipi_dphy"; - power-domains = <0x8a 0x0c>; - rockchip,grf = <0x2f>; - #address-cells = <0x01>; - #size-cells = <0x00>; - status = "okay"; - phandle = <0x10e>; - - ports { - #address-cells = <0x01>; - #size-cells = <0x00>; - - port@0 { - reg = <0x00>; - #address-cells = <0x01>; - #size-cells = <0x00>; - - endpoint@0 { - reg = <0x00>; - remote-endpoint = <0x13>; - status = "okay"; - phandle = <0xa2>; - }; - }; - }; - - panel@0 { - compatible = "elida,kd35t133\0simple-panel-dsi"; - reg = <0x00>; - backlight = <0x9d>; - power-supply = <0x9e>; - reset-gpios = <0x97 0x10 0x01>; - prepare-delay-ms = <0x14>; - reset-delay-ms = <0x96>; - init-delay-ms = <0x14>; - enable-delay-ms = <0x78>; - disable-delay-ms = <0x32>; - unprepare-delay-ms = <0x14>; - width-mm = <0x34>; - height-mm = <0x46>; - dsi,flags = <0xa03>; - dsi,format = <0x00>; - dsi,lanes = <0x04>; - panel-init-sequence = [15 00 02 ee 01 15 00 02 ea 07 15 00 02 eb 12 15 00 02 0a 8b 15 00 02 17 35 15 00 02 1d 33 15 00 02 21 01 15 00 02 28 1c 15 00 02 29 27 15 00 02 2a 63 15 00 02 2b b5 15 00 02 2c 00 15 00 02 2d 33 15 00 02 2f f3 15 00 02 ee 02 15 00 02 39 78 15 00 02 39 78 15 00 02 00 00 15 00 02 01 18 15 00 02 02 15 15 00 02 03 10 15 00 02 04 18 15 00 02 05 3f 15 00 02 06 11 15 00 02 07 11 15 00 02 08 11 15 00 02 09 0f 15 00 02 0a 10 15 00 02 0b 54 15 00 02 0c 14 15 00 02 0d 17 15 00 02 0e 35 15 00 02 0f 37 15 00 02 10 3f 15 00 02 20 00 15 00 02 21 18 15 00 02 22 15 15 00 02 23 10 15 00 02 24 12 15 00 02 25 37 15 00 02 26 0b 15 00 02 27 0d 15 00 02 28 0d 15 00 02 29 0b 15 00 02 2a 10 15 00 02 2b 54 15 00 02 2c 14 15 00 02 2d 17 15 00 02 2e 35 15 00 02 2f 37 15 00 02 30 3f 15 00 02 ee 04 15 00 02 00 04 15 00 02 01 01 15 00 02 02 80 15 00 02 03 04 15 00 02 04 00 15 00 02 06 16 15 00 02 07 03 15 00 02 08 13 15 00 02 09 0a 15 00 02 0a 0f 15 00 02 0b 10 15 00 02 22 80 15 00 02 24 08 15 00 02 2a 00 15 00 02 ee 05 15 00 02 00 04 15 00 02 01 08 15 00 02 02 55 15 00 02 03 05 15 00 02 04 00 15 00 02 05 04 15 00 02 06 00 15 00 02 07 13 15 00 02 08 1e 15 00 02 09 66 15 00 02 0d 22 15 00 02 10 08 15 00 02 11 0c 15 00 02 12 55 15 00 02 13 05 15 00 02 19 14 15 00 02 1a 76 15 00 02 23 00 15 00 02 43 13 15 00 02 40 44 15 00 02 41 00 15 00 02 30 01 15 00 02 31 01 15 00 02 32 00 15 00 02 33 14 15 00 02 34 14 15 00 02 35 b4 15 00 02 36 01 15 00 02 37 01 15 00 02 38 00 15 00 02 39 14 15 00 02 3a 14 15 00 02 44 01 15 00 02 45 81 15 00 02 46 05 15 00 02 ee 06 15 00 02 00 23 15 00 02 01 01 15 00 02 02 04 15 00 02 06 cd 15 00 02 08 67 15 00 02 09 45 15 00 02 0a 23 15 00 02 0b 01 15 00 02 ee 07 15 00 02 00 3c 15 00 02 01 20 15 00 02 02 20 15 00 02 03 21 15 00 02 04 21 15 00 02 05 3c 15 00 02 06 3c 15 00 02 07 04 15 00 02 08 04 15 00 02 09 0c 15 00 02 0a 0c 15 00 02 0b 01 15 00 02 0c 15 15 00 02 0d 15 15 00 02 0e 17 15 00 02 0f 17 15 00 02 10 11 15 00 02 11 11 15 00 02 12 13 15 00 02 13 13 15 00 02 14 0d 15 00 02 15 0d 15 00 02 20 3c 15 00 02 21 20 15 00 02 22 20 15 00 02 23 21 15 00 02 24 21 15 00 02 25 3c 15 00 02 26 3c 15 00 02 27 04 15 00 02 28 04 15 00 02 29 0c 15 00 02 2a 0c 15 00 02 2b 00 15 00 02 2c 14 15 00 02 2d 14 15 00 02 2e 16 15 00 02 2f 16 15 00 02 30 10 15 00 02 31 10 15 00 02 32 12 15 00 02 33 12 15 00 02 34 0d 15 00 02 35 0d 15 00 02 ee 08 15 00 02 10 00 15 00 02 12 da 15 00 02 14 10 15 00 02 22 69 15 00 02 ee 0f 15 00 02 00 01 15 00 02 01 10 15 00 02 ee 00 15 00 02 ea 00 15 00 02 eb 00 05 c8 01 11 05 14 01 29]; - panel-exit-sequence = <0x5140128 0x50a0110>; - - display-timings { - native-mode = <0x9f>; - - 60Hz { - clock-frequency = <0x3938700>; - hactive = <0x400>; - vactive = <0x300>; - hfront-porch = <0x50>; - hsync-len = <0x3c>; - hback-porch = <0x3c>; - vfront-porch = <0x10>; - vsync-len = <0x08>; - vback-porch = <0x08>; - hsync-active = <0x00>; - vsync-active = <0x00>; - de-active = <0x00>; - pixelclk-active = <0x00>; - phandle = <0x9f>; - }; - }; - }; - }; - - vop@ff460000 { - compatible = "rockchip,px30-vop-big"; - reg = <0x00 0xff460000 0x00 0x1fc 0x00 0xff460a00 0x00 0x400>; - rockchip,grf = <0x2f>; - reg-names = "regs\0gamma_lut"; - interrupts = <0x00 0x4d 0x04>; - clocks = <0x02 0xb5 0x02 0x96 0x02 0xfb>; - clock-names = "aclk_vop\0dclk_vop\0hclk_vop"; - power-domains = <0x8a 0x0c>; - iommus = <0xa0>; - status = "okay"; - phandle = <0x10f>; - - port { - #address-cells = <0x01>; - #size-cells = <0x00>; - phandle = <0x10>; - - endpoint@0 { - reg = <0x00>; - remote-endpoint = <0xa1>; - phandle = <0x12>; - }; - - endpoint@1 { - reg = <0x01>; - remote-endpoint = <0xa2>; - phandle = <0x13>; - }; - - endpoint@2 { - reg = <0x02>; - remote-endpoint = <0xa3>; - phandle = <0x14>; - }; - }; - }; - - iommu@ff460f00 { - compatible = "rockchip,iommu"; - reg = <0x00 0xff460f00 0x00 0x100>; - interrupts = <0x00 0x4d 0x04>; - interrupt-names = "vopb_mmu"; - clocks = <0x02 0xb5 0x02 0xfb>; - clock-names = "aclk\0hclk"; - power-domains = <0x8a 0x0c>; - #iommu-cells = <0x00>; - status = "okay"; - phandle = <0xa0>; - }; - - rk_rga@ff480000 { - compatible = "rockchip,rga2"; - reg = <0x00 0xff480000 0x00 0x1000>; - interrupts = <0x00 0x4c 0x04>; - clocks = <0x02 0xb7 0x02 0xfd 0x02 0x35>; - clock-names = "aclk_rga\0hclk_rga\0clk_rga"; - power-domains = <0x8a 0x0c>; - dma-coherent; - status = "okay"; - phandle = <0x110>; - }; - - cif@ff490000 { - compatible = "rockchip,cif"; - reg = <0x00 0xff490000 0x00 0x200>; - interrupts = <0x00 0x45 0x04>; - clocks = <0x02 0xb3 0x02 0xf9 0x02 0x160 0x02 0x34>; - clock-names = "aclk_cif0\0hclk_cif0\0pclk_cif\0cif0_out"; - resets = <0x02 0x2c 0x02 0x2d 0x02 0x2e>; - reset-names = "rst_cif_a\0rst_cif_h\0rst_cif_pclkin"; - power-domains = <0x8a 0x0d>; - pinctrl-names = "cif_pin_all"; - pinctrl-0 = <0xa4>; - iommus = <0xa5>; - status = "disabled"; - phandle = <0x111>; - }; - - cif-new@ff490000 { - compatible = "rockchip,px30-cif"; - reg = <0x00 0xff490000 0x00 0x200>; - interrupts = <0x00 0x45 0x04>; - clocks = <0x02 0xb3 0x02 0xf9 0x02 0x160 0x02 0x34>; - clock-names = "aclk_cif\0hclk_cif\0pclk_cif\0cif_out"; - resets = <0x02 0x2c 0x02 0x2d 0x02 0x2e>; - reset-names = "rst_cif_a\0rst_cif_h\0rst_cif_pclkin"; - power-domains = <0x8a 0x0d>; - iommus = <0xa5>; - status = "disabled"; - phandle = <0x112>; - }; - - iommu@ff490800 { - compatible = "rockchip,iommu"; - reg = <0x00 0xff490800 0x00 0x100>; - interrupts = <0x00 0x45 0x04>; - interrupt-names = "vip_mmu"; - clocks = <0x02 0xb3 0x02 0xf9>; - clock-names = "aclk\0hclk"; - power-domains = <0x8a 0x0d>; - rk_iommu,disable_reset_quirk; - #iommu-cells = <0x00>; - status = "okay"; - phandle = <0xa5>; - }; - - rk_isp@ff4a0000 { - compatible = "rockchip,px30-isp\0rockchip,isp"; - reg = <0x00 0xff4a0000 0x00 0x8000>; - interrupts = <0x00 0x46 0x04>; - clocks = <0x02 0xb4 0x02 0xfa 0x02 0x33 0x02 0x33 0x02 0x15f 0x02 0x34 0x02 0x34 0x02 0x146>; - clock-names = "aclk_isp\0hclk_isp\0clk_isp\0clk_isp_jpe\0pclkin_isp\0clk_cif_pll\0clk_cif_out\0pclk_dphyrx"; - resets = <0x02 0x2b 0x02 0x2f>; - reset-names = "rst_isp\0rst_mipicsiphy"; - power-domains = <0x8a 0x0d>; - pinctrl-names = "default\0isp_dvp8bit2\0isp_dvp10bit\0isp_dvp12bit"; - pinctrl-0 = <0xa6>; - pinctrl-1 = <0xa4>; - pinctrl-2 = <0xa4 0xa7>; - pinctrl-3 = <0xa8 0xa4 0xa7>; - rockchip,isp,mipiphy = <0x01>; - rockchip,isp,csiphy,reg = <0xff2f0000 0x4000>; - rockchip,grf = <0x2f>; - rockchip,cru = <0x02>; - rockchip,isp,iommu-enable = <0x01>; - iommus = <0xa9>; - status = "disabled"; - phandle = <0x113>; - }; - - rkisp1@ff4a0000 { - compatible = "rockchip,rk3326-rkisp1"; - reg = <0x00 0xff4a0000 0x00 0x8000>; - interrupts = <0x00 0x46 0x04 0x00 0x49 0x04 0x00 0x4a 0x04>; - interrupt-names = "isp_irq\0mi_irq\0mipi_irq"; - clocks = <0x02 0xb4 0x02 0xfa 0x02 0x33 0x02 0x15f>; - clock-names = "aclk_isp\0hclk_isp\0clk_isp\0pclk_isp"; - devfreq = <0xaa>; - power-domains = <0x8a 0x0d>; - iommus = <0xa9>; - rockchip,grf = <0x2f>; - status = "okay"; - phandle = <0x114>; - }; - - iommu@ff4a8000 { - compatible = "rockchip,iommu"; - reg = <0x00 0xff4a8000 0x00 0x100>; - interrupts = <0x00 0x46 0x04>; - interrupt-names = "isp_mmu"; - clocks = <0x02 0xb4 0x02 0xfa>; - clock-names = "aclk\0hclk"; - power-domains = <0x8a 0x0d>; - rk_iommu,disable_reset_quirk; - #iommu-cells = <0x00>; - status = "okay"; - phandle = <0xa9>; - }; - - qos@ff518000 { - compatible = "syscon"; - reg = <0x00 0xff518000 0x00 0x20>; - phandle = <0x18>; - }; - - qos@ff520000 { - compatible = "syscon"; - reg = <0x00 0xff520000 0x00 0x20>; - phandle = <0x28>; - }; - - qos@ff52c000 { - compatible = "syscon"; - reg = <0x00 0xff52c000 0x00 0x20>; - phandle = <0x17>; - }; - - qos@ff538000 { - compatible = "syscon"; - reg = <0x00 0xff538000 0x00 0x20>; - phandle = <0x19>; - }; - - qos@ff538080 { - compatible = "syscon"; - reg = <0x00 0xff538080 0x00 0x20>; - phandle = <0x1a>; - }; - - qos@ff538100 { - compatible = "syscon"; - reg = <0x00 0xff538100 0x00 0x20>; - phandle = <0x1b>; - }; - - qos@ff538180 { - compatible = "syscon"; - reg = <0x00 0xff538180 0x00 0x20>; - phandle = <0x1c>; - }; - - qos@ff540000 { - compatible = "syscon"; - reg = <0x00 0xff540000 0x00 0x20>; - phandle = <0x15>; - }; - - qos@ff540080 { - compatible = "syscon"; - reg = <0x00 0xff540080 0x00 0x20>; - phandle = <0x16>; - }; - - qos@ff548000 { - compatible = "syscon"; - reg = <0x00 0xff548000 0x00 0x20>; - phandle = <0x23>; - }; - - qos@ff548080 { - compatible = "syscon"; - reg = <0x00 0xff548080 0x00 0x20>; - phandle = <0x24>; - }; - - qos@ff548100 { - compatible = "syscon"; - reg = <0x00 0xff548100 0x00 0x20>; - phandle = <0x25>; - }; - - qos@ff548180 { - compatible = "syscon"; - reg = <0x00 0xff548180 0x00 0x20>; - phandle = <0x26>; - }; - - qos@ff548200 { - compatible = "syscon"; - reg = <0x00 0xff548200 0x00 0x20>; - phandle = <0x27>; - }; - - qos@ff550000 { - compatible = "syscon"; - reg = <0x00 0xff550000 0x00 0x20>; - phandle = <0x1f>; - }; - - qos@ff550080 { - compatible = "syscon"; - reg = <0x00 0xff550080 0x00 0x20>; - phandle = <0x20>; - }; - - qos@ff550100 { - compatible = "syscon"; - reg = <0x00 0xff550100 0x00 0x20>; - phandle = <0x21>; - }; - - qos@ff550180 { - compatible = "syscon"; - reg = <0x00 0xff550180 0x00 0x20>; - phandle = <0x22>; - }; - - qos@ff558000 { - compatible = "syscon"; - reg = <0x00 0xff558000 0x00 0x20>; - phandle = <0x1d>; - }; - - qos@ff558080 { - compatible = "syscon"; - reg = <0x00 0xff558080 0x00 0x20>; - phandle = <0x1e>; - }; - - dfi@ff610000 { - reg = <0x00 0xff610000 0x00 0x400>; - compatible = "rockchip,px30-dfi"; - rockchip,pmugrf = <0xab>; - status = "okay"; - phandle = <0xac>; - }; - - dmc { - compatible = "rockchip,px30-dmc"; - interrupts = <0x00 0x69 0x04>; - interrupt-names = "complete_irq"; - devfreq-events = <0xac>; - clocks = <0x02 0x54>; - clock-names = "dmc_clk"; - operating-points-v2 = <0xad>; - ddr_timing = <0xae>; - upthreshold = <0x28>; - downdifferential = <0x14>; - system-status-freq = <0x01 0x80e80 0x08 0x6ddd0 0x02 0x2f5d0 0x20 0x6ddd0 0x1000 0x80e80 0x4000 0xa2990 0x2000 0xa2990>; - auto-min-freq = <0x50140>; - auto-freq-en = <0x01>; - #cooling-cells = <0x02>; - status = "okay"; - center-supply = <0x0e>; - phandle = <0xaa>; - - ddr_power_model { - compatible = "ddr_power_model"; - dynamic-power-coefficient = <0x78>; - static-power-coefficient = <0xc8>; - ts = <0x7d00 0x125c 0xffffffb0 0x02>; - thermal-zone = "soc-thermal"; - phandle = <0x115>; - }; - }; - - dmc-opp-table { - compatible = "operating-points-v2"; - rockchip,max-volt = <0x118c30>; - rockchip,evb-irdrop = <0x61a8>; - rockchip,pvtm-voltage-sel = <0x00 0xc350 0x00 0xc351 0xd2f0 0x01 0xd2f1 0xea60 0x02 0xea61 0x1869f 0x03>; - rockchip,pvtm-ch = <0x00 0x00>; - phandle = <0xad>; - - opp-528000000 { - opp-hz = <0x00 0x1f78a400>; - opp-microvolt = <0xee098>; - opp-microvolt-L0 = <0xee098>; - opp-microvolt-L1 = <0xee098>; - opp-microvolt-L2 = <0xe7ef0>; - opp-microvolt-L3 = <0xe7ef0>; - }; - - opp-666000000 { - opp-hz = <0x00 0x27b25a80>; - opp-microvolt = <0x100590>; - opp-microvolt-L0 = <0x100590>; - opp-microvolt-L1 = <0xf4240>; - opp-microvolt-L2 = <0xee098>; - opp-microvolt-L3 = <0xe7ef0>; - }; - - opp-786000000 { - opp-hz = <0x00 0x2ed96880>; - opp-microvolt = <0x10c8e0>; - opp-microvolt-L0 = <0x10c8e0>; - opp-microvolt-L1 = <0x100590>; - opp-microvolt-L2 = <0xfa3e8>; - opp-microvolt-L3 = <0xf4240>; - status = "okay"; - }; - }; - - rockchip-system-monitor { - compatible = "rockchip,system-monitor"; - rockchip,thermal-zone = "soc-thermal"; - rockchip,polling-delay = <0xc8>; - phandle = <0x116>; - }; - - pinctrl { - compatible = "rockchip,px30-pinctrl"; - rockchip,grf = <0x2f>; - rockchip,pmu = <0xab>; - #address-cells = <0x02>; - #size-cells = <0x02>; - ranges; - phandle = <0x117>; - - gpio0@ff040000 { - compatible = "rockchip,gpio-bank"; - reg = <0x00 0xff040000 0x00 0x100>; - interrupts = <0x00 0x03 0x04>; - clocks = <0x2a 0x14>; - gpio-controller; - #gpio-cells = <0x02>; - interrupt-controller; - #interrupt-cells = <0x02>; - phandle = <0x5c>; - }; - - gpio1@ff250000 { - compatible = "rockchip,gpio-bank"; - reg = <0x00 0xff250000 0x00 0x100>; - interrupts = <0x00 0x04 0x04>; - clocks = <0x02 0x15c>; - gpio-controller; - #gpio-cells = <0x02>; - interrupt-controller; - #interrupt-cells = <0x02>; - phandle = <0xbf>; - }; - - gpio2@ff260000 { - compatible = "rockchip,gpio-bank"; - reg = <0x00 0xff260000 0x00 0x100>; - interrupts = <0x00 0x05 0x04>; - clocks = <0x02 0x15d>; - gpio-controller; - #gpio-cells = <0x02>; - interrupt-controller; - #interrupt-cells = <0x02>; - phandle = <0x66>; - }; - - gpio3@ff270000 { - compatible = "rockchip,gpio-bank"; - reg = <0x00 0xff270000 0x00 0x100>; - interrupts = <0x00 0x06 0x04>; - clocks = <0x02 0x15e>; - gpio-controller; - #gpio-cells = <0x02>; - interrupt-controller; - #interrupt-cells = <0x02>; - phandle = <0x97>; - }; - - pcfg-pull-up { - bias-pull-up; - phandle = <0xb1>; - }; - - pcfg-pull-down { - bias-pull-down; - phandle = <0xb9>; - }; - - pcfg-pull-none { - bias-disable; - phandle = <0xb0>; - }; - - pcfg-pull-none-2ma { - bias-disable; - drive-strength = <0x02>; - phandle = <0x118>; - }; - - pcfg-pull-up-2ma { - bias-pull-up; - drive-strength = <0x02>; - phandle = <0x119>; - }; - - pcfg-pull-up-4ma { - bias-pull-up; - drive-strength = <0x04>; - phandle = <0xb2>; - }; - - pcfg-pull-none-4ma { - bias-disable; - drive-strength = <0x04>; - phandle = <0x11a>; - }; - - pcfg-pull-down-4ma { - bias-pull-down; - drive-strength = <0x04>; - phandle = <0x11b>; - }; - - pcfg-pull-none-8ma { - bias-disable; - drive-strength = <0x08>; - phandle = <0xb5>; - }; - - pcfg-pull-up-8ma { - bias-pull-up; - drive-strength = <0x08>; - phandle = <0xb3>; - }; - - pcfg-pull-none-12ma { - bias-disable; - drive-strength = <0x0c>; - phandle = <0xb7>; - }; - - pcfg-pull-up-12ma { - bias-pull-up; - drive-strength = <0x0c>; - phandle = <0xb6>; - }; - - pcfg-pull-none-smt { - bias-disable; - input-schmitt-enable; - phandle = <0xaf>; - }; - - pcfg-output-high { - output-high; - phandle = <0x11c>; - }; - - pcfg-output-low { - output-low; - phandle = <0xb8>; - }; - - pcfg-input-high { - bias-pull-up; - input-enable; - phandle = <0xb4>; - }; - - pcfg-input { - input-enable; - phandle = <0x11d>; - }; - - i2c0 { - - i2c0-xfer { - rockchip,pins = <0x00 0x08 0x01 0xaf 0x00 0x09 0x01 0xaf>; - phandle = <0x5b>; - }; - }; - - i2c1 { - - i2c1-xfer { - rockchip,pins = <0x00 0x12 0x01 0xaf 0x00 0x13 0x01 0xaf>; - phandle = <0x69>; - }; - }; - - i2c2 { - - i2c2-xfer { - rockchip,pins = <0x02 0x0f 0x02 0xaf 0x02 0x10 0x02 0xaf>; - phandle = <0x6a>; - }; - }; - - i2c3 { - - i2c3-xfer { - rockchip,pins = <0x01 0x0c 0x04 0xaf 0x01 0x0d 0x04 0xaf>; - phandle = <0x6b>; - }; - }; - - tsadc { - - tsadc-otp-gpio { - rockchip,pins = <0x00 0x06 0x00 0xb0>; - phandle = <0x86>; - }; - - tsadc-otp-out { - rockchip,pins = <0x00 0x06 0x01 0xb0>; - phandle = <0x87>; - }; - }; - - uart0 { - - uart0-xfer { - rockchip,pins = <0x00 0x0a 0x01 0xb1 0x00 0x0b 0x01 0xb1>; - phandle = <0x2c>; - }; - - uart0-cts { - rockchip,pins = <0x00 0x0c 0x01 0xb0>; - phandle = <0x2d>; - }; - - uart0-rts { - rockchip,pins = <0x00 0x0d 0x01 0xb0>; - phandle = <0x2e>; - }; - - uart0-rts-gpio { - rockchip,pins = <0x00 0x0d 0x00 0xb0>; - phandle = <0x11e>; - }; - }; - - uart1 { - - uart1-xfer { - rockchip,pins = <0x01 0x11 0x01 0xb1 0x01 0x10 0x01 0xb1>; - phandle = <0x4f>; - }; - - uart1-cts { - rockchip,pins = <0x01 0x12 0x01 0xb0>; - phandle = <0x50>; - }; - - uart1-rts { - rockchip,pins = <0x01 0x13 0x01 0xb0>; - phandle = <0x11f>; - }; - - uart1-rts-gpio { - rockchip,pins = <0x01 0x13 0x00 0xb0>; - phandle = <0x120>; - }; - }; - - uart2-m0 { - - uart2m0-xfer { - rockchip,pins = <0x01 0x1a 0x02 0xb1 0x01 0x1b 0x02 0xb1>; - phandle = <0x51>; - }; - }; - - uart2-m1 { - - uart2m1-xfer { - rockchip,pins = <0x02 0x0c 0x02 0xb1 0x02 0x0e 0x02 0xb1>; - phandle = <0xba>; - }; - }; - - uart3-m0 { - - uart3m0-xfer { - rockchip,pins = <0x00 0x10 0x02 0xb1 0x00 0x11 0x02 0xb1>; - phandle = <0x121>; - }; - - uart3m0-cts { - rockchip,pins = <0x00 0x12 0x02 0xb0>; - phandle = <0x122>; - }; - - uart3m0-rts { - rockchip,pins = <0x00 0x13 0x02 0xb0>; - phandle = <0x123>; - }; - - uart3m0-rts-gpio { - rockchip,pins = <0x00 0x13 0x00 0xb0>; - phandle = <0x124>; - }; - }; - - uart3-m1 { - - uart3m1-xfer { - rockchip,pins = <0x01 0x0e 0x02 0xb1 0x01 0x0f 0x02 0xb1>; - phandle = <0x52>; - }; - - uart3m1-cts { - rockchip,pins = <0x01 0x0c 0x02 0xb0>; - phandle = <0x53>; - }; - - uart3m1-rts { - rockchip,pins = <0x01 0x0d 0x02 0xb0>; - phandle = <0x54>; - }; - - uart3m1-rts-gpio { - rockchip,pins = <0x01 0x0d 0x00 0xb0>; - phandle = <0x125>; - }; - }; - - uart4 { - - uart4-xfer { - rockchip,pins = <0x01 0x1c 0x02 0xb1 0x01 0x1d 0x02 0xb1>; - phandle = <0x55>; - }; - - uart4-cts { - rockchip,pins = <0x01 0x1e 0x02 0xb0>; - phandle = <0x56>; - }; - - uart4-rts { - rockchip,pins = <0x01 0x1f 0x02 0xb0>; - phandle = <0x57>; - }; - }; - - uart5 { - - uart5-xfer { - rockchip,pins = <0x03 0x02 0x04 0xb1 0x03 0x01 0x04 0xb1>; - phandle = <0x58>; - }; - - uart5-cts { - rockchip,pins = <0x03 0x03 0x04 0xb0>; - phandle = <0x59>; - }; - - uart5-rts { - rockchip,pins = <0x03 0x05 0x04 0xb0>; - phandle = <0x5a>; - }; - }; - - spi0 { - - spi0-clk { - rockchip,pins = <0x01 0x0f 0x03 0xb2>; - phandle = <0x6c>; - }; - - spi0-csn { - rockchip,pins = <0x01 0x0e 0x03 0xb2>; - phandle = <0x6d>; - }; - - spi0-miso { - rockchip,pins = <0x01 0x0d 0x03 0xb2>; - phandle = <0x6e>; - }; - - spi0-mosi { - rockchip,pins = <0x01 0x0c 0x03 0xb2>; - phandle = <0x6f>; - }; - - spi0-clk-hs { - rockchip,pins = <0x01 0x0f 0x03 0xb3>; - phandle = <0x70>; - }; - - spi0-miso-hs { - rockchip,pins = <0x01 0x0d 0x03 0xb3>; - phandle = <0x71>; - }; - - spi0-mosi-hs { - rockchip,pins = <0x01 0x0c 0x03 0xb3>; - phandle = <0x72>; - }; - }; - - spi1 { - - spi1-clk { - rockchip,pins = <0x03 0x0f 0x04 0xb2>; - phandle = <0x73>; - }; - - spi1-csn0 { - rockchip,pins = <0x03 0x09 0x04 0xb2>; - phandle = <0x74>; - }; - - spi1-csn1 { - rockchip,pins = <0x03 0x0a 0x02 0xb2>; - phandle = <0x75>; - }; - - spi1-miso { - rockchip,pins = <0x03 0x0e 0x04 0xb2>; - phandle = <0x76>; - }; - - spi1-mosi { - rockchip,pins = <0x03 0x0c 0x04 0xb2>; - phandle = <0x77>; - }; - - spi1-clk-hs { - rockchip,pins = <0x03 0x0f 0x04 0xb3>; - phandle = <0x78>; - }; - - spi1-miso-hs { - rockchip,pins = <0x03 0x0e 0x04 0xb3>; - phandle = <0x79>; - }; - - spi1-mosi-hs { - rockchip,pins = <0x03 0x0c 0x04 0xb3>; - phandle = <0x7a>; - }; - }; - - pdm { - - pdm-clk0m0 { - rockchip,pins = <0x03 0x16 0x02 0xb0>; - phandle = <0x44>; - }; - - pdm-clk0m1 { - rockchip,pins = <0x02 0x16 0x01 0xb0>; - phandle = <0x126>; - }; - - pdm-clk1 { - rockchip,pins = <0x03 0x17 0x02 0xb0>; - phandle = <0x45>; - }; - - pdm-sdi0m0 { - rockchip,pins = <0x03 0x1b 0x02 0xb0>; - phandle = <0x46>; - }; - - pdm-sdi0m1 { - rockchip,pins = <0x02 0x15 0x02 0xb0>; - phandle = <0x127>; - }; - - pdm-sdi1 { - rockchip,pins = <0x03 0x18 0x02 0xb0>; - phandle = <0x47>; - }; - - pdm-sdi2 { - rockchip,pins = <0x03 0x19 0x02 0xb0>; - phandle = <0x48>; - }; - - pdm-sdi3 { - rockchip,pins = <0x03 0x1a 0x02 0xb0>; - phandle = <0x49>; - }; - - pdm-clk0m0-sleep { - rockchip,pins = <0x03 0x16 0x00 0xb4>; - phandle = <0x128>; - }; - - pdm-clk0m1-sleep { - rockchip,pins = <0x02 0x16 0x00 0xb4>; - phandle = <0x129>; - }; - - pdm-clk1-sleep { - rockchip,pins = <0x03 0x17 0x00 0xb4>; - phandle = <0x12a>; - }; - - pdm-sdi0m0-sleep { - rockchip,pins = <0x03 0x1b 0x00 0xb4>; - phandle = <0x12b>; - }; - - pdm-sdi0m1-sleep { - rockchip,pins = <0x02 0x15 0x00 0xb4>; - phandle = <0x12c>; - }; - - pdm-sdi1-sleep { - rockchip,pins = <0x03 0x18 0x00 0xb4>; - phandle = <0x12d>; - }; - - pdm-sdi2-sleep { - rockchip,pins = <0x03 0x19 0x00 0xb4>; - phandle = <0x12e>; - }; - - pdm-sdi3-sleep { - rockchip,pins = <0x03 0x1a 0x00 0xb4>; - phandle = <0x12f>; - }; - }; - - i2s0 { - - i2s0-8ch-mclk { - rockchip,pins = <0x03 0x11 0x02 0xb0>; - phandle = <0x130>; - }; - - i2s0-8ch-sclktx { - rockchip,pins = <0x03 0x13 0x02 0xb0>; - phandle = <0x30>; - }; - - i2s0-8ch-sclkrx { - rockchip,pins = <0x03 0x0c 0x02 0xb0>; - phandle = <0x31>; - }; - - i2s0-8ch-lrcktx { - rockchip,pins = <0x03 0x12 0x02 0xb0>; - phandle = <0x32>; - }; - - i2s0-8ch-lrckrx { - rockchip,pins = <0x03 0x0d 0x02 0xb0>; - phandle = <0x33>; - }; - - i2s0-8ch-sdo0 { - rockchip,pins = <0x03 0x14 0x02 0xb0>; - phandle = <0x38>; - }; - - i2s0-8ch-sdo1 { - rockchip,pins = <0x03 0x10 0x02 0xb0>; - phandle = <0x39>; - }; - - i2s0-8ch-sdo2 { - rockchip,pins = <0x03 0x0f 0x02 0xb0>; - phandle = <0x3a>; - }; - - i2s0-8ch-sdo3 { - rockchip,pins = <0x03 0x0e 0x02 0xb0>; - phandle = <0x3b>; - }; - - i2s0-8ch-sdi0 { - rockchip,pins = <0x03 0x15 0x02 0xb0>; - phandle = <0x34>; - }; - - i2s0-8ch-sdi1 { - rockchip,pins = <0x03 0x0b 0x02 0xb0>; - phandle = <0x35>; - }; - - i2s0-8ch-sdi2 { - rockchip,pins = <0x03 0x09 0x02 0xb0>; - phandle = <0x36>; - }; - - i2s0-8ch-sdi3 { - rockchip,pins = <0x03 0x08 0x02 0xb0>; - phandle = <0x37>; - }; - }; - - i2s1 { - - i2s1-2ch-mclk { - rockchip,pins = <0x02 0x13 0x01 0xb0>; - phandle = <0x68>; - }; - - i2s1-2ch-sclk { - rockchip,pins = <0x02 0x12 0x01 0xb0>; - phandle = <0x3c>; - }; - - i2s1-2ch-lrck { - rockchip,pins = <0x02 0x11 0x01 0xb0>; - phandle = <0x3d>; - }; - - i2s1-2ch-sdi { - rockchip,pins = <0x02 0x15 0x01 0xb0>; - phandle = <0x3e>; - }; - - i2s1-2ch-sdo { - rockchip,pins = <0x02 0x14 0x01 0xb0>; - phandle = <0x3f>; - }; - }; - - i2s2 { - - i2s2-2ch-mclk { - rockchip,pins = <0x03 0x01 0x02 0xb0>; - phandle = <0x131>; - }; - - i2s2-2ch-sclk { - rockchip,pins = <0x03 0x02 0x02 0xb0>; - phandle = <0x40>; - }; - - i2s2-2ch-lrck { - rockchip,pins = <0x03 0x03 0x02 0xb0>; - phandle = <0x41>; - }; - - i2s2-2ch-sdi { - rockchip,pins = <0x03 0x05 0x02 0xb0>; - phandle = <0x42>; - }; - - i2s2-2ch-sdo { - rockchip,pins = <0x03 0x07 0x02 0xb0>; - phandle = <0x43>; - }; - }; - - sdmmc { - - sdmmc-clk { - rockchip,pins = <0x01 0x1e 0x01 0xb5>; - phandle = <0x8f>; - }; - - sdmmc-cmd { - rockchip,pins = <0x01 0x1f 0x01 0xb3>; - phandle = <0x90>; - }; - - sdmmc-det { - rockchip,pins = <0x00 0x03 0x01 0xb3>; - phandle = <0x91>; - }; - - sdmmc-bus1 { - rockchip,pins = <0x01 0x1a 0x01 0xb3>; - phandle = <0x132>; - }; - - sdmmc-bus4 { - rockchip,pins = <0x01 0x1a 0x01 0xb3 0x01 0x1b 0x01 0xb3 0x01 0x1c 0x01 0xb3 0x01 0x1d 0x01 0xb3>; - phandle = <0x92>; - }; - - sdmmc-gpio { - rockchip,pins = <0x01 0x1a 0x00 0xb2 0x01 0x1b 0x00 0xb2 0x01 0x1c 0x00 0xb2 0x01 0x1d 0x00 0xb2 0x01 0x1e 0x00 0xb2 0x01 0x1f 0x00 0xb2>; - phandle = <0x133>; - }; - }; - - sdio { - - sdio-clk { - rockchip,pins = <0x01 0x15 0x01 0xb0>; - phandle = <0x96>; - }; - - sdio-cmd { - rockchip,pins = <0x01 0x14 0x01 0xb1>; - phandle = <0x95>; - }; - - sdio-bus4 { - rockchip,pins = <0x01 0x16 0x01 0xb1 0x01 0x17 0x01 0xb1 0x01 0x18 0x01 0xb1 0x01 0x19 0x01 0xb1>; - phandle = <0x94>; - }; - - sdio-gpio { - rockchip,pins = <0x01 0x16 0x00 0xb1 0x01 0x17 0x00 0xb1 0x01 0x18 0x00 0xb1 0x01 0x19 0x00 0xb1 0x01 0x14 0x00 0xb1 0x01 0x15 0x00 0xb1>; - phandle = <0x134>; - }; - }; - - emmc { - - emmc-clk { - rockchip,pins = <0x01 0x09 0x02 0xb5>; - phandle = <0x135>; - }; - - emmc-cmd { - rockchip,pins = <0x01 0x0a 0x02 0xb3>; - phandle = <0x136>; - }; - - emmc-pwren { - rockchip,pins = <0x01 0x08 0x02 0xb0>; - phandle = <0x137>; - }; - - emmc-rstnout { - rockchip,pins = <0x01 0x0b 0x02 0xb0>; - phandle = <0x138>; - }; - - emmc-bus1 { - rockchip,pins = <0x01 0x00 0x02 0xb3>; - phandle = <0x139>; - }; - - emmc-bus4 { - rockchip,pins = <0x01 0x00 0x02 0xb3 0x01 0x01 0x02 0xb3 0x01 0x02 0x02 0xb3 0x01 0x03 0x02 0xb3>; - phandle = <0x13a>; - }; - - emmc-bus8 { - rockchip,pins = <0x01 0x00 0x02 0xb3 0x01 0x01 0x02 0xb3 0x01 0x02 0x02 0xb3 0x01 0x03 0x02 0xb3 0x01 0x04 0x02 0xb3 0x01 0x05 0x02 0xb3 0x01 0x06 0x02 0xb3 0x01 0x07 0x02 0xb3>; - phandle = <0x13b>; - }; - }; - - flash { - - flash-cs0 { - rockchip,pins = <0x01 0x08 0x01 0xb0>; - phandle = <0x13c>; - }; - - flash-rdy { - rockchip,pins = <0x01 0x09 0x01 0xb0>; - phandle = <0x13d>; - }; - - flash-dqs { - rockchip,pins = <0x01 0x0a 0x01 0xb0>; - phandle = <0x13e>; - }; - - flash-ale { - rockchip,pins = <0x01 0x0b 0x01 0xb0>; - phandle = <0x13f>; - }; - - flash-cle { - rockchip,pins = <0x01 0x0c 0x01 0xb0>; - phandle = <0x140>; - }; - - flash-wrn { - rockchip,pins = <0x01 0x0d 0x01 0xb0>; - phandle = <0x141>; - }; - - flash-csl { - rockchip,pins = <0x01 0x0e 0x01 0xb0>; - phandle = <0x142>; - }; - - flash-rdn { - rockchip,pins = <0x01 0x0f 0x01 0xb0>; - phandle = <0x143>; - }; - - flash-bus8 { - rockchip,pins = <0x01 0x00 0x01 0xb6 0x01 0x01 0x01 0xb6 0x01 0x02 0x01 0xb6 0x01 0x03 0x01 0xb6 0x01 0x04 0x01 0xb6 0x01 0x05 0x01 0xb6 0x01 0x06 0x01 0xb6 0x01 0x07 0x01 0xb6>; - phandle = <0x144>; - }; - }; - - lcdc { - - lcdc-m0-rgb-pins { - rockchip,pins = <0x03 0x00 0x01 0xb5 0x03 0x01 0x01 0xb5 0x03 0x02 0x01 0xb5 0x03 0x03 0x01 0xb5 0x03 0x04 0x01 0xb5 0x03 0x05 0x01 0xb5 0x03 0x06 0x01 0xb5 0x03 0x07 0x01 0xb5 0x03 0x08 0x01 0xb5 0x03 0x09 0x01 0xb5 0x03 0x0a 0x01 0xb5 0x03 0x0b 0x01 0xb5 0x03 0x0c 0x01 0xb5 0x03 0x0d 0x01 0xb5 0x03 0x0e 0x01 0xb5 0x03 0x0f 0x01 0xb5 0x03 0x10 0x01 0xb5 0x03 0x11 0x01 0xb5 0x03 0x12 0x01 0xb5 0x03 0x13 0x01 0xb5 0x03 0x14 0x01 0xb5 0x03 0x15 0x01 0xb5 0x03 0x16 0x01 0xb5 0x03 0x17 0x01 0xb5 0x03 0x18 0x01 0xb5 0x03 0x19 0x01 0xb5 0x03 0x1a 0x01 0xb5 0x03 0x1b 0x01 0xb5>; - phandle = <0x145>; - }; - - lcdc-m0-sleep-pins { - rockchip,pins = <0x03 0x00 0x00 0xb0 0x03 0x01 0x00 0xb0 0x03 0x02 0x00 0xb0 0x03 0x03 0x00 0xb0 0x03 0x04 0x00 0xb0 0x03 0x05 0x00 0xb0 0x03 0x06 0x00 0xb0 0x03 0x07 0x00 0xb0 0x03 0x08 0x00 0xb0 0x03 0x09 0x00 0xb0 0x03 0x0a 0x00 0xb0 0x03 0x0b 0x00 0xb0 0x03 0x0c 0x00 0xb0 0x03 0x0d 0x00 0xb0 0x03 0x0e 0x00 0xb0 0x03 0x0f 0x00 0xb0 0x03 0x10 0x00 0xb0 0x03 0x11 0x00 0xb0 0x03 0x12 0x00 0xb0 0x03 0x13 0x00 0xb0 0x03 0x14 0x00 0xb0 0x03 0x15 0x00 0xb0 0x03 0x16 0x00 0xb0 0x03 0x17 0x00 0xb0 0x03 0x18 0x00 0xb0 0x03 0x19 0x00 0xb0 0x03 0x1a 0x00 0xb0 0x03 0x1b 0x00 0xb0>; - phandle = <0x146>; - }; - - lcdc-m1-rgb-pins { - rockchip,pins = <0x03 0x00 0x01 0xb5 0x03 0x04 0x01 0xb5 0x03 0x06 0x01 0xb5 0x03 0x0a 0x01 0xb5 0x03 0x0b 0x01 0xb5 0x03 0x0d 0x01 0xb5 0x03 0x10 0x01 0xb5 0x03 0x11 0x01 0xb5 0x03 0x12 0x01 0xb5 0x03 0x13 0x01 0xb5 0x03 0x14 0x01 0xb5 0x03 0x15 0x01 0xb5 0x03 0x16 0x01 0xb5 0x03 0x17 0x01 0xb5 0x03 0x18 0x01 0xb5 0x03 0x19 0x01 0xb5 0x03 0x1a 0x01 0xb5 0x03 0x1b 0x01 0xb5>; - phandle = <0x4d>; - }; - - lcdc-m1-sleep-pins { - rockchip,pins = <0x03 0x00 0x00 0xb0 0x03 0x04 0x00 0xb0 0x03 0x06 0x00 0xb0 0x03 0x0a 0x00 0xb0 0x03 0x0b 0x00 0xb0 0x03 0x0d 0x00 0xb0 0x03 0x10 0x00 0xb0 0x03 0x11 0x00 0xb0 0x03 0x12 0x00 0xb0 0x03 0x13 0x00 0xb0 0x03 0x14 0x00 0xb0 0x03 0x15 0x00 0xb0 0x03 0x16 0x00 0xb0 0x03 0x17 0x00 0xb0 0x03 0x18 0x00 0xb0 0x03 0x19 0x00 0xb0 0x03 0x1a 0x00 0xb0 0x03 0x1b 0x00 0xb0>; - phandle = <0x4e>; - }; - }; - - pwm0 { - - pwm0-pin { - rockchip,pins = <0x00 0x0f 0x01 0xb0>; - phandle = <0x7b>; - }; - }; - - pwm1 { - - pwm1-pin { - rockchip,pins = <0x00 0x10 0x01 0xb0>; - phandle = <0x7c>; - }; - }; - - pwm2 { - - pwm2-pin { - rockchip,pins = <0x02 0x0d 0x01 0xb0>; - phandle = <0x7d>; - }; - }; - - pwm3 { - - pwm3-pin { - rockchip,pins = <0x00 0x11 0x01 0xb0>; - phandle = <0x7e>; - }; - }; - - pwm4 { - - pwm4-pin { - rockchip,pins = <0x03 0x12 0x03 0xb0>; - phandle = <0x7f>; - }; - }; - - pwm5 { - - pwm5-pin { - rockchip,pins = <0x03 0x13 0x03 0xb0>; - phandle = <0x80>; - }; - }; - - pwm6 { - - pwm6-pin { - rockchip,pins = <0x03 0x14 0x03 0xb0>; - phandle = <0x81>; - }; - }; - - pwm7 { - - pwm7-pin { - rockchip,pins = <0x03 0x15 0x03 0xb0>; - phandle = <0x82>; - }; - }; - - gmac { - - rmii-pins { - rockchip,pins = <0x02 0x00 0x02 0xb7 0x02 0x01 0x02 0xb7 0x02 0x02 0x02 0xb7 0x02 0x03 0x02 0xb0 0x02 0x04 0x02 0xb0 0x02 0x05 0x02 0xb0 0x02 0x06 0x02 0xb0 0x02 0x07 0x02 0xb0 0x02 0x09 0x02 0xb0>; - phandle = <0x8d>; - }; - - mac-refclk-12ma { - rockchip,pins = <0x02 0x0a 0x02 0xb7>; - phandle = <0x8e>; - }; - - mac-refclk { - rockchip,pins = <0x02 0x0a 0x02 0xb0>; - phandle = <0x147>; - }; - }; - - cif-m0 { - - cif-clkout-m0 { - rockchip,pins = <0x02 0x0b 0x01 0xb7>; - phandle = <0xa6>; - }; - - dvp-d2d9-m0 { - rockchip,pins = <0x02 0x00 0x01 0xb0 0x02 0x01 0x01 0xb0 0x02 0x02 0x01 0xb0 0x02 0x03 0x01 0xb0 0x02 0x04 0x01 0xb0 0x02 0x05 0x01 0xb0 0x02 0x06 0x01 0xb0 0x02 0x07 0x01 0xb0 0x02 0x08 0x01 0xb0 0x02 0x09 0x01 0xb0 0x02 0x0a 0x01 0xb0 0x02 0x0b 0x01 0xb0>; - phandle = <0xa4>; - }; - - dvp-d0d1-m0 { - rockchip,pins = <0x02 0x0c 0x01 0xb0 0x02 0x0e 0x01 0xb0>; - phandle = <0xa8>; - }; - - d10-d11-m0 { - rockchip,pins = <0x02 0x0f 0x01 0xb0 0x02 0x10 0x01 0xb0>; - phandle = <0xa7>; - }; - }; - - cif-m1 { - - cif-clkout-m1 { - rockchip,pins = <0x03 0x18 0x03 0xb0>; - phandle = <0x148>; - }; - - dvp-d2d9-m1 { - rockchip,pins = <0x03 0x03 0x03 0xb0 0x03 0x05 0x03 0xb0 0x03 0x07 0x03 0xb0 0x03 0x08 0x03 0xb0 0x03 0x09 0x03 0xb0 0x03 0x0c 0x03 0xb0 0x03 0x0e 0x03 0xb0 0x03 0x0f 0x03 0xb0 0x03 0x19 0x03 0xb0 0x03 0x1a 0x03 0xb0 0x03 0x1b 0x03 0xb0 0x03 0x18 0x03 0xb0>; - phandle = <0x149>; - }; - - dvp-d0d1-m1 { - rockchip,pins = <0x03 0x01 0x03 0xb0 0x03 0x02 0x03 0xb0>; - phandle = <0x14a>; - }; - - d10-d11-m1 { - rockchip,pins = <0x03 0x16 0x03 0xb0 0x03 0x17 0x03 0xb0>; - phandle = <0x14b>; - }; - }; - - isp { - - isp-prelight { - rockchip,pins = <0x03 0x19 0x04 0xb0>; - phandle = <0x14c>; - }; - }; - - pmic { - - pmic_int { - rockchip,pins = <0x00 0x0a 0x00 0xb1 0x00 0x0b 0x00 0xb0>; - phandle = <0x5d>; - }; - - soc_slppin_gpio { - rockchip,pins = <0x00 0x04 0x00 0xb8>; - phandle = <0x60>; - }; - - soc_slppin_slp { - rockchip,pins = <0x00 0x04 0x01 0xb0>; - phandle = <0x5e>; - }; - - soc_slppin_rst { - rockchip,pins = <0x00 0x04 0x02 0xb0>; - phandle = <0x62>; - }; - }; - - leds { - - led-pins { - rockchip,pins = <0x00 0x11 0x00 0xb0>; - phandle = <0xc0>; - }; - }; - - motor { - - motor-pin { - rockchip,pins = <0x02 0x15 0x00 0xb9>; - phandle = <0xc1>; - }; - }; - - btns { - - btn-pins { - rockchip,pins = <0x01 0x0c 0x00 0xb1 0x01 0x0d 0x00 0xb1 0x01 0x0e 0x00 0xb1 0x01 0x0f 0x00 0xb1 0x01 0x02 0x00 0xb1 0x01 0x05 0x00 0xb1 0x01 0x06 0x00 0xb1 0x01 0x07 0x00 0xb1 0x02 0x00 0x00 0xb1 0x02 0x01 0x00 0xb1 0x02 0x02 0x00 0xb1 0x02 0x03 0x00 0xb1 0x02 0x04 0x00 0xb1 0x02 0x05 0x00 0xb1 0x02 0x06 0x00 0xb1 0x02 0x07 0x00 0xb1 0x03 0x09 0x00 0xb1 0x03 0x0a 0x00 0xb1 0x03 0x0c 0x00 0xb1 0x03 0x0f 0x00 0xb1>; - phandle = <0xbd>; - }; - }; - }; - - chosen { - bootargs = [00]; - }; - - fiq-debugger { - compatible = "rockchip,fiq-debugger"; - rockchip,serial-id = <0x02>; - rockchip,wake-irq = <0x00>; - rockchip,irq-mode-enable = <0x00>; - rockchip,baudrate = <0x1c200>; - interrupts = <0x00 0x7f 0x08>; - pinctrl-names = "default"; - pinctrl-0 = <0xba>; - status = "okay"; - }; - - ramoops { - compatible = "ramoops"; - record-size = <0x00 0x20000>; - console-size = <0x00 0x80000>; - ftrace-size = <0x00 0x00>; - pmsg-size = <0x00 0x00>; - memory-region = <0xbb>; - }; - - reserved-memory { - #address-cells = <0x02>; - #size-cells = <0x02>; - ranges; - - drm-logo@00000000 { - compatible = "rockchip,drm-logo"; - reg = <0x00 0x00 0x00 0x00>; - phandle = <0x11>; - }; - - region@110000 { - reg = <0x00 0x110000 0x00 0xf0000>; - reg-names = "ramoops_mem"; - phandle = <0xbb>; - }; - }; - - odroidgo3-keys { - compatible = "gpio-keys"; - #address-cells = <0x01>; - #size-cells = <0x00>; - autorepeat; - phandle = <0x14d>; - - button@0 { - label = "GPIO BTN-VOLUP"; - linux,code = <0x73>; - gpios = <0x66 0x00 0x01>; - }; - - button@1 { - label = "GPIO BTN-VOLDN"; - linux,code = <0x72>; - gpios = <0x66 0x01 0x01>; - }; - }; - - odroidgo3-joypad { - compatible = "odroidgo3-joypad"; - pwms = <0xbc 0x00 0xbebc200 0x00>; - pwm-names = "enable"; - rumble-boost-weak = <0x00>; - rumble-boost-strong = <0x00>; - joypad-name = "GO-Super Gamepad"; - joypad-product = <0x1100>; - joypad-revision = <0x100>; - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <0xbd>; - pinctrl-1 = <0x7b>; - io-channel-names = "amux_adc"; - io-channels = <0xbe 0x01>; - amux-count = <0x04>; - amux-a-gpios = <0x97 0x0b 0x01>; - amux-b-gpios = <0x97 0x08 0x01>; - amux-en-gpios = <0x97 0x0d 0x01>; - button-adc-scale = <0x02>; - button-adc-deadzone = <0x40>; - button-adc-fuzz = <0x20>; - button-adc-flat = <0x20>; - abs_x-p-tuning = <0xc8>; - abs_x-n-tuning = <0xc8>; - abs_y-p-tuning = <0xc8>; - abs_y-n-tuning = <0xc8>; - abs_rx-p-tuning = <0xc8>; - abs_rx-n-tuning = <0xc8>; - abs_ry-p-tuning = <0xc8>; - abs_ry-n-tuning = <0xc8>; - poll-interval = <0x0a>; - invert-absx; - invert-absy; - phandle = <0x14e>; - - sw1 { - gpios = <0xbf 0x0c 0x01>; - label = "GPIO DPAD-UP"; - linux,code = <0x220>; - }; - - sw2 { - gpios = <0xbf 0x0d 0x01>; - label = "GPIO DPAD-DOWN"; - linux,code = <0x221>; - }; - - sw3 { - gpios = <0xbf 0x0e 0x01>; - label = "GPIO DPAD-LEFT"; - linux,code = <0x222>; - }; - - sw4 { - gpios = <0xbf 0x0f 0x01>; - label = "GPIO DPAD-RIGHT"; - linux,code = <0x223>; - }; - - sw5 { - gpios = <0xbf 0x02 0x01>; - label = "GPIO KEY BTN-A"; - linux,code = <0x131>; - }; - - sw6 { - gpios = <0xbf 0x05 0x01>; - label = "GPIO BTN-B"; - linux,code = <0x130>; - }; - - sw7 { - gpios = <0xbf 0x06 0x01>; - label = "GPIO BTN-Y"; - linux,code = <0x134>; - }; - - sw8 { - gpios = <0xbf 0x07 0x01>; - label = "GPIO BTN-X"; - linux,code = <0x133>; - }; - - sw11 { - gpios = <0x66 0x02 0x01>; - label = "GPIO F3"; - linux,code = <0x2c2>; - }; - - sw12 { - gpios = <0x66 0x03 0x01>; - label = "GPIO F4"; - linux,code = <0x2c3>; - }; - - sw13 { - gpios = <0x66 0x04 0x01>; - label = "GPIO F5"; - linux,code = <0x2c4>; - }; - - sw15 { - gpios = <0x66 0x06 0x01>; - label = "GPIO TOP-LEFT"; - linux,code = <0x136>; - }; - - sw16 { - gpios = <0x66 0x07 0x01>; - label = "GPIO TOP-RIGHT"; - linux,code = <0x137>; - }; - - sw19 { - gpios = <0x97 0x09 0x01>; - label = "GPIO F1"; - linux,code = <0x2c0>; - }; - - sw20 { - gpios = <0x97 0x0f 0x01>; - label = "GPIO TOP-RIGHT2"; - linux,code = <0x139>; - }; - - sw21 { - gpios = <0x97 0x0a 0x01>; - label = "GPIO TOP-LEFT2"; - linux,code = <0x138>; - }; - - sw22 { - gpios = <0x97 0x0c 0x01>; - label = "GPIO F2"; - linux,code = <0x2c1>; - }; - }; - - gpio_leds { - compatible = "gpio-leds"; - pinctrl-names = "led_pins"; - pinctrl-0 = <0xc0>; - phandle = <0x14f>; - - heartbeat { - label = "blue:heartbeat"; - gpios = <0x5c 0x11 0x00>; - linux,default-trigger = "heartbeat"; - }; - }; - - motor-control { - compatible = "gpio-motor"; - motor-gpios = <0x66 0x15 0x00>; - default-state = "disabled"; - pinctrl-names = "default"; - pinctrl-0 = <0xc1>; - status = "okay"; - phandle = <0x150>; - }; - - backlight { - compatible = "pwm-backlight"; - pwms = <0xc2 0x00 0x9c40 0x00>; - brightness-levels = <0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f 0x20 0x21 0x22 0x23 0x24 0x25 0x26 0x27 0x28 0x29 0x2a 0x2b 0x2c 0x2d 0x2e 0x2f 0x30 0x31 0x32 0x33 0x34 0x35 0x36 0x37 0x38 0x39 0x3a 0x3b 0x3c 0x3d 0x3e 0x3f 0x40 0x41 0x42 0x43 0x44 0x45 0x46 0x47 0x48 0x49 0x4a 0x4b 0x4c 0x4d 0x4e 0x4f 0x50 0x51 0x52 0x53 0x54 0x55 0x56 0x57 0x58 0x59 0x5a 0x5b 0x5c 0x5d 0x5e 0x5f 0x60 0x61 0x62 0x63 0x64 0x65 0x66 0x67 0x68 0x69 0x6a 0x6b 0x6c 0x6d 0x6e 0x6f 0x70 0x71 0x72 0x73 0x74 0x75 0x76 0x77 0x78 0x79 0x7a 0x7b 0x7c 0x7d 0x7e 0x7f 0x80 0x81 0x82 0x83 0x84 0x85 0x86 0x87 0x88 0x89 0x8a 0x8b 0x8c 0x8d 0x8e 0x8f 0x90 0x91 0x92 0x93 0x94 0x95 0x96 0x97 0x98 0x99 0x9a 0x9b 0x9c 0x9d 0x9e 0x9f 0xa0>; - default-brightness-level = <0x50>; - power-supply = <0xc3>; - phandle = <0x9d>; - }; - - rk817-sound { - compatible = "simple-audio-card"; - simple-audio-card,format = "i2s"; - simple-audio-card,name = "rockchip,rk817-codec"; - simple-audio-card,mclk-fs = <0x100>; - simple-audio-card,widgets = "Microphone\0Mic Jack\0Headphone\0Headphone Jack"; - simple-audio-card,routing = "MIC_IN\0Mic Jack\0Headphone Jack\0HPOL\0Headphone Jack\0HPOR"; - simple-audio-card,hp-det-gpio = <0x66 0x16 0x01>; - simple-audio-card,codec-hp-det = <0x01>; - - simple-audio-card,cpu { - sound-dai = <0xc4>; - }; - - simple-audio-card,codec { - sound-dai = <0xc5>; - }; - }; - - vccsys { - compatible = "regulator-fixed"; - regulator-name = "vcc3v8_sys"; - regulator-always-on; - regulator-min-microvolt = <0x39fbc0>; - regulator-max-microvolt = <0x39fbc0>; - phandle = <0x64>; - }; - - __symbols__ { - ddr_timing = "/ddr_timing"; - cpu0 = "/cpus/cpu@0"; - cpu1 = "/cpus/cpu@1"; - cpu2 = "/cpus/cpu@2"; - cpu3 = "/cpus/cpu@3"; - CPU_SLEEP = "/cpus/idle-states/cpu-sleep"; - CLUSTER_SLEEP = "/cpus/idle-states/cluster-sleep"; - cpu0_opp_table = "/cpu0-opp-table"; - bus_soc = "/bus-soc"; - bus_apll = "/bus-apll"; - bus_apll_opp_table = "/bus-apll-opp-table"; - display_subsystem = "/display-subsystem"; - route_lvds = "/display-subsystem/route/route-lvds"; - route_dsi = "/display-subsystem/route/route-dsi"; - route_rgb = "/display-subsystem/route/route-rgb"; - gmac_clkin = "/external-gmac-clock"; - rockchip_suspend = "/rockchip-suspend"; - xin24m = "/xin24m"; - xin32k = "/xin32k"; - pmu = "/power-management@ff000000"; - power = "/power-management@ff000000/power-controller"; - pmugrf = "/syscon@ff010000"; - pmu_io_domains = "/syscon@ff010000/io-domains"; - pmu_pvtm = "/syscon@ff010000/pmu-pvtm"; - uart0 = "/serial@ff030000"; - i2s0_8ch = "/i2s@ff060000"; - i2s1_2ch = "/i2s@ff070000"; - i2s2_2ch = "/i2s@ff080000"; - pdm = "/pdm@ff0a0000"; - crypto = "/crypto@ff0b0000"; - rng = "/rng@ff0b0000"; - gic = "/interrupt-controller@ff131000"; - grf = "/syscon@ff140000"; - io_domains = "/syscon@ff140000/io-domains"; - lvds = "/syscon@ff140000/lvds"; - lvds_in_vopb = "/syscon@ff140000/lvds/ports/port@0/endpoint@0"; - rgb = "/syscon@ff140000/rgb"; - rgb_in_vopb = "/syscon@ff140000/rgb/ports/port@0/endpoint@0"; - core_grf = "/syscon@ff148000"; - pvtm = "/syscon@ff148000/pvtm"; - uart1 = "/serial@ff158000"; - uart2 = "/serial@ff160000"; - uart3 = "/serial@ff168000"; - uart4 = "/serial@ff170000"; - uart5 = "/serial@ff178000"; - i2c0 = "/i2c@ff180000"; - rk817 = "/i2c@ff180000/pmic@20"; - pinctrl_rk8xx = "/i2c@ff180000/pmic@20/pinctrl_rk8xx"; - rk817_ts_gpio1 = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_ts_gpio1"; - rk817_gt_gpio2 = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_gt_gpio2"; - rk817_pin_ts = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_pin_ts"; - rk817_pin_gt = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_pin_gt"; - rk817_slppin_null = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_slppin_null"; - rk817_slppin_slp = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_slppin_slp"; - rk817_slppin_pwrdn = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_slppin_pwrdn"; - rk817_slppin_rst = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_slppin_rst"; - vdd_logic = "/i2c@ff180000/pmic@20/regulators/DCDC_REG1"; - vdd_arm = "/i2c@ff180000/pmic@20/regulators/DCDC_REG2"; - vcc_ddr = "/i2c@ff180000/pmic@20/regulators/DCDC_REG3"; - vcc_3v3 = "/i2c@ff180000/pmic@20/regulators/DCDC_REG4"; - vcc_1v0 = "/i2c@ff180000/pmic@20/regulators/LDO_REG1"; - vcc1v8_soc = "/i2c@ff180000/pmic@20/regulators/LDO_REG2"; - vdd1v0_soc = "/i2c@ff180000/pmic@20/regulators/LDO_REG3"; - vcc3v3_pmu = "/i2c@ff180000/pmic@20/regulators/LDO_REG4"; - vccio_sd = "/i2c@ff180000/pmic@20/regulators/LDO_REG5"; - vcc_sd = "/i2c@ff180000/pmic@20/regulators/LDO_REG6"; - vcc_backlight = "/i2c@ff180000/pmic@20/regulators/LDO_REG7"; - vcc_lcd = "/i2c@ff180000/pmic@20/regulators/LDO_REG8"; - dcdc_boost = "/i2c@ff180000/pmic@20/regulators/BOOST"; - otg_switch = "/i2c@ff180000/pmic@20/regulators/OTG_SWITCH"; - rk817_codec = "/i2c@ff180000/pmic@20/codec"; - i2c1 = "/i2c@ff190000"; - i2c2 = "/i2c@ff1a0000"; - i2c3 = "/i2c@ff1b0000"; - spi0 = "/spi@ff1d0000"; - spi1 = "/spi@ff1d8000"; - wdt = "/watchdog@ff1e0000"; - pwm0 = "/pwm@ff200000"; - pwm1 = "/pwm@ff200010"; - pwm2 = "/pwm@ff200020"; - pwm3 = "/pwm@ff200030"; - pwm4 = "/pwm@ff208000"; - pwm5 = "/pwm@ff208010"; - pwm6 = "/pwm@ff208020"; - pwm7 = "/pwm@ff208030"; - rktimer = "/rktimer@ff210000"; - dmac = "/amba/dmac@ff240000"; - thermal_zones = "/thermal-zones"; - soc_thermal = "/thermal-zones/soc-thermal"; - threshold = "/thermal-zones/soc-thermal/trips/trip-point-0"; - target = "/thermal-zones/soc-thermal/trips/trip-point-1"; - soc_crit = "/thermal-zones/soc-thermal/trips/soc-crit"; - gpu_thermal = "/thermal-zones/gpu-thermal"; - tsadc = "/tsadc@ff280000"; - saradc = "/saradc@ff288000"; - otp = "/otp@ff290000"; - otp_id = "/otp@ff290000/id@7"; - cpu_leakage = "/otp@ff290000/cpu-leakage@17"; - performance = "/otp@ff290000/performance@1e"; - cru = "/clock-controller@ff2b0000"; - cpu_boost = "/cpu-boost@ff2b8000"; - pmucru = "/pmu-clock-controller@ff2bc000"; - usb2phy_grf = "/syscon@ff2c0000"; - u2phy = "/syscon@ff2c0000/usb2-phy@100"; - u2phy_host = "/syscon@ff2c0000/usb2-phy@100/host-port"; - u2phy_otg = "/syscon@ff2c0000/usb2-phy@100/otg-port"; - video_phy = "/video-phy@ff2e0000"; - mipi_dphy_rx0 = "/mipi-dphy-rx0@ff2f0000"; - usb20_otg = "/usb@ff300000"; - usb_host0_ehci = "/usb@ff340000"; - usb_host0_ohci = "/usb@ff350000"; - gmac = "/ethernet@ff360000"; - sdmmc = "/dwmmc@ff370000"; - sdio = "/dwmmc@ff380000"; - emmc = "/dwmmc@ff390000"; - nandc0 = "/nandc@ff3b0000"; - sfc = "/sfc@ff3a0000"; - gpu = "/gpu@ff400000"; - gpu_opp_table = "/gpu-opp-table"; - hevc = "/hevc_service@ff440000"; - vpu = "/vpu_service@ff442000"; - vpu_combo = "/vpu_combo"; - hevc_mmu = "/iommu@ff440440"; - vpu_mmu = "/iommu@ff442800"; - dsi = "/dsi@ff450000"; - dsi_in_vopb = "/dsi@ff450000/ports/port@0/endpoint@0"; - timing0 = "/dsi@ff450000/panel@0/display-timings/60Hz"; - vopb = "/vop@ff460000"; - vopb_out = "/vop@ff460000/port"; - vopb_out_lvds = "/vop@ff460000/port/endpoint@0"; - vopb_out_dsi = "/vop@ff460000/port/endpoint@1"; - vopb_out_rgb = "/vop@ff460000/port/endpoint@2"; - vopb_mmu = "/iommu@ff460f00"; - rk_rga = "/rk_rga@ff480000"; - cif = "/cif@ff490000"; - cif_new = "/cif-new@ff490000"; - vip_mmu = "/iommu@ff490800"; - rk_isp = "/rk_isp@ff4a0000"; - rkisp1 = "/rkisp1@ff4a0000"; - isp_mmu = "/iommu@ff4a8000"; - qos_gmac = "/qos@ff518000"; - qos_gpu = "/qos@ff520000"; - qos_sdmmc = "/qos@ff52c000"; - qos_emmc = "/qos@ff538000"; - qos_nand = "/qos@ff538080"; - qos_sdio = "/qos@ff538100"; - qos_sfc = "/qos@ff538180"; - qos_usb_host = "/qos@ff540000"; - qos_usb_otg = "/qos@ff540080"; - qos_isp_128 = "/qos@ff548000"; - qos_isp_rd = "/qos@ff548080"; - qos_isp_wr = "/qos@ff548100"; - qos_isp_m1 = "/qos@ff548180"; - qos_vip = "/qos@ff548200"; - qos_rga_rd = "/qos@ff550000"; - qos_rga_wr = "/qos@ff550080"; - qos_vop_m0 = "/qos@ff550100"; - qos_vop_m1 = "/qos@ff550180"; - qos_vpu = "/qos@ff558000"; - qos_vpu_r128 = "/qos@ff558080"; - dfi = "/dfi@ff610000"; - dmc = "/dmc"; - ddr_power_model = "/dmc/ddr_power_model"; - dmc_opp_table = "/dmc-opp-table"; - rockchip_system_monitor = "/rockchip-system-monitor"; - pinctrl = "/pinctrl"; - gpio0 = "/pinctrl/gpio0@ff040000"; - gpio1 = "/pinctrl/gpio1@ff250000"; - gpio2 = "/pinctrl/gpio2@ff260000"; - gpio3 = "/pinctrl/gpio3@ff270000"; - pcfg_pull_up = "/pinctrl/pcfg-pull-up"; - pcfg_pull_down = "/pinctrl/pcfg-pull-down"; - pcfg_pull_none = "/pinctrl/pcfg-pull-none"; - pcfg_pull_none_2ma = "/pinctrl/pcfg-pull-none-2ma"; - pcfg_pull_up_2ma = "/pinctrl/pcfg-pull-up-2ma"; - pcfg_pull_up_4ma = "/pinctrl/pcfg-pull-up-4ma"; - pcfg_pull_none_4ma = "/pinctrl/pcfg-pull-none-4ma"; - pcfg_pull_down_4ma = "/pinctrl/pcfg-pull-down-4ma"; - pcfg_pull_none_8ma = "/pinctrl/pcfg-pull-none-8ma"; - pcfg_pull_up_8ma = "/pinctrl/pcfg-pull-up-8ma"; - pcfg_pull_none_12ma = "/pinctrl/pcfg-pull-none-12ma"; - pcfg_pull_up_12ma = "/pinctrl/pcfg-pull-up-12ma"; - pcfg_pull_none_smt = "/pinctrl/pcfg-pull-none-smt"; - pcfg_output_high = "/pinctrl/pcfg-output-high"; - pcfg_output_low = "/pinctrl/pcfg-output-low"; - pcfg_input_high = "/pinctrl/pcfg-input-high"; - pcfg_input = "/pinctrl/pcfg-input"; - i2c0_xfer = "/pinctrl/i2c0/i2c0-xfer"; - i2c1_xfer = "/pinctrl/i2c1/i2c1-xfer"; - i2c2_xfer = "/pinctrl/i2c2/i2c2-xfer"; - i2c3_xfer = "/pinctrl/i2c3/i2c3-xfer"; - tsadc_otp_gpio = "/pinctrl/tsadc/tsadc-otp-gpio"; - tsadc_otp_out = "/pinctrl/tsadc/tsadc-otp-out"; - uart0_xfer = "/pinctrl/uart0/uart0-xfer"; - uart0_cts = "/pinctrl/uart0/uart0-cts"; - uart0_rts = "/pinctrl/uart0/uart0-rts"; - uart0_rts_gpio = "/pinctrl/uart0/uart0-rts-gpio"; - uart1_xfer = "/pinctrl/uart1/uart1-xfer"; - uart1_cts = "/pinctrl/uart1/uart1-cts"; - uart1_rts = "/pinctrl/uart1/uart1-rts"; - uart1_rts_gpio = "/pinctrl/uart1/uart1-rts-gpio"; - uart2m0_xfer = "/pinctrl/uart2-m0/uart2m0-xfer"; - uart2m1_xfer = "/pinctrl/uart2-m1/uart2m1-xfer"; - uart3m0_xfer = "/pinctrl/uart3-m0/uart3m0-xfer"; - uart3m0_cts = "/pinctrl/uart3-m0/uart3m0-cts"; - uart3m0_rts = "/pinctrl/uart3-m0/uart3m0-rts"; - uart3m0_rts_gpio = "/pinctrl/uart3-m0/uart3m0-rts-gpio"; - uart3m1_xfer = "/pinctrl/uart3-m1/uart3m1-xfer"; - uart3m1_cts = "/pinctrl/uart3-m1/uart3m1-cts"; - uart3m1_rts = "/pinctrl/uart3-m1/uart3m1-rts"; - uart3m1_rts_gpio = "/pinctrl/uart3-m1/uart3m1-rts-gpio"; - uart4_xfer = "/pinctrl/uart4/uart4-xfer"; - uart4_cts = "/pinctrl/uart4/uart4-cts"; - uart4_rts = "/pinctrl/uart4/uart4-rts"; - uart5_xfer = "/pinctrl/uart5/uart5-xfer"; - uart5_cts = "/pinctrl/uart5/uart5-cts"; - uart5_rts = "/pinctrl/uart5/uart5-rts"; - spi0_clk = "/pinctrl/spi0/spi0-clk"; - spi0_csn = "/pinctrl/spi0/spi0-csn"; - spi0_miso = "/pinctrl/spi0/spi0-miso"; - spi0_mosi = "/pinctrl/spi0/spi0-mosi"; - spi0_clk_hs = "/pinctrl/spi0/spi0-clk-hs"; - spi0_miso_hs = "/pinctrl/spi0/spi0-miso-hs"; - spi0_mosi_hs = "/pinctrl/spi0/spi0-mosi-hs"; - spi1_clk = "/pinctrl/spi1/spi1-clk"; - spi1_csn0 = "/pinctrl/spi1/spi1-csn0"; - spi1_csn1 = "/pinctrl/spi1/spi1-csn1"; - spi1_miso = "/pinctrl/spi1/spi1-miso"; - spi1_mosi = "/pinctrl/spi1/spi1-mosi"; - spi1_clk_hs = "/pinctrl/spi1/spi1-clk-hs"; - spi1_miso_hs = "/pinctrl/spi1/spi1-miso-hs"; - spi1_mosi_hs = "/pinctrl/spi1/spi1-mosi-hs"; - pdm_clk0m0 = "/pinctrl/pdm/pdm-clk0m0"; - pdm_clk0m1 = "/pinctrl/pdm/pdm-clk0m1"; - pdm_clk1 = "/pinctrl/pdm/pdm-clk1"; - pdm_sdi0m0 = "/pinctrl/pdm/pdm-sdi0m0"; - pdm_sdi0m1 = "/pinctrl/pdm/pdm-sdi0m1"; - pdm_sdi1 = "/pinctrl/pdm/pdm-sdi1"; - pdm_sdi2 = "/pinctrl/pdm/pdm-sdi2"; - pdm_sdi3 = "/pinctrl/pdm/pdm-sdi3"; - pdm_clk0m0_sleep = "/pinctrl/pdm/pdm-clk0m0-sleep"; - pdm_clk0m_sleep1 = "/pinctrl/pdm/pdm-clk0m1-sleep"; - pdm_clk1_sleep = "/pinctrl/pdm/pdm-clk1-sleep"; - pdm_sdi0m0_sleep = "/pinctrl/pdm/pdm-sdi0m0-sleep"; - pdm_sdi0m1_sleep = "/pinctrl/pdm/pdm-sdi0m1-sleep"; - pdm_sdi1_sleep = "/pinctrl/pdm/pdm-sdi1-sleep"; - pdm_sdi2_sleep = "/pinctrl/pdm/pdm-sdi2-sleep"; - pdm_sdi3_sleep = "/pinctrl/pdm/pdm-sdi3-sleep"; - i2s0_8ch_mclk = "/pinctrl/i2s0/i2s0-8ch-mclk"; - i2s0_8ch_sclktx = "/pinctrl/i2s0/i2s0-8ch-sclktx"; - i2s0_8ch_sclkrx = "/pinctrl/i2s0/i2s0-8ch-sclkrx"; - i2s0_8ch_lrcktx = "/pinctrl/i2s0/i2s0-8ch-lrcktx"; - i2s0_8ch_lrckrx = "/pinctrl/i2s0/i2s0-8ch-lrckrx"; - i2s0_8ch_sdo0 = "/pinctrl/i2s0/i2s0-8ch-sdo0"; - i2s0_8ch_sdo1 = "/pinctrl/i2s0/i2s0-8ch-sdo1"; - i2s0_8ch_sdo2 = "/pinctrl/i2s0/i2s0-8ch-sdo2"; - i2s0_8ch_sdo3 = "/pinctrl/i2s0/i2s0-8ch-sdo3"; - i2s0_8ch_sdi0 = "/pinctrl/i2s0/i2s0-8ch-sdi0"; - i2s0_8ch_sdi1 = "/pinctrl/i2s0/i2s0-8ch-sdi1"; - i2s0_8ch_sdi2 = "/pinctrl/i2s0/i2s0-8ch-sdi2"; - i2s0_8ch_sdi3 = "/pinctrl/i2s0/i2s0-8ch-sdi3"; - i2s1_2ch_mclk = "/pinctrl/i2s1/i2s1-2ch-mclk"; - i2s1_2ch_sclk = "/pinctrl/i2s1/i2s1-2ch-sclk"; - i2s1_2ch_lrck = "/pinctrl/i2s1/i2s1-2ch-lrck"; - i2s1_2ch_sdi = "/pinctrl/i2s1/i2s1-2ch-sdi"; - i2s1_2ch_sdo = "/pinctrl/i2s1/i2s1-2ch-sdo"; - i2s2_2ch_mclk = "/pinctrl/i2s2/i2s2-2ch-mclk"; - i2s2_2ch_sclk = "/pinctrl/i2s2/i2s2-2ch-sclk"; - i2s2_2ch_lrck = "/pinctrl/i2s2/i2s2-2ch-lrck"; - i2s2_2ch_sdi = "/pinctrl/i2s2/i2s2-2ch-sdi"; - i2s2_2ch_sdo = "/pinctrl/i2s2/i2s2-2ch-sdo"; - sdmmc_clk = "/pinctrl/sdmmc/sdmmc-clk"; - sdmmc_cmd = "/pinctrl/sdmmc/sdmmc-cmd"; - sdmmc_det = "/pinctrl/sdmmc/sdmmc-det"; - sdmmc_bus1 = "/pinctrl/sdmmc/sdmmc-bus1"; - sdmmc_bus4 = "/pinctrl/sdmmc/sdmmc-bus4"; - sdmmc_gpio = "/pinctrl/sdmmc/sdmmc-gpio"; - sdio_clk = "/pinctrl/sdio/sdio-clk"; - sdio_cmd = "/pinctrl/sdio/sdio-cmd"; - sdio_bus4 = "/pinctrl/sdio/sdio-bus4"; - sdio_gpio = "/pinctrl/sdio/sdio-gpio"; - emmc_clk = "/pinctrl/emmc/emmc-clk"; - emmc_cmd = "/pinctrl/emmc/emmc-cmd"; - emmc_pwren = "/pinctrl/emmc/emmc-pwren"; - emmc_rstnout = "/pinctrl/emmc/emmc-rstnout"; - emmc_bus1 = "/pinctrl/emmc/emmc-bus1"; - emmc_bus4 = "/pinctrl/emmc/emmc-bus4"; - emmc_bus8 = "/pinctrl/emmc/emmc-bus8"; - flash_cs0 = "/pinctrl/flash/flash-cs0"; - flash_rdy = "/pinctrl/flash/flash-rdy"; - flash_dqs = "/pinctrl/flash/flash-dqs"; - flash_ale = "/pinctrl/flash/flash-ale"; - flash_cle = "/pinctrl/flash/flash-cle"; - flash_wrn = "/pinctrl/flash/flash-wrn"; - flash_csl = "/pinctrl/flash/flash-csl"; - flash_rdn = "/pinctrl/flash/flash-rdn"; - flash_bus8 = "/pinctrl/flash/flash-bus8"; - lcdc_m0_rgb_pins = "/pinctrl/lcdc/lcdc-m0-rgb-pins"; - lcdc_m0_sleep_pins = "/pinctrl/lcdc/lcdc-m0-sleep-pins"; - lcdc_m1_rgb_pins = "/pinctrl/lcdc/lcdc-m1-rgb-pins"; - lcdc_m1_sleep_pins = "/pinctrl/lcdc/lcdc-m1-sleep-pins"; - pwm0_pin = "/pinctrl/pwm0/pwm0-pin"; - pwm1_pin = "/pinctrl/pwm1/pwm1-pin"; - pwm2_pin = "/pinctrl/pwm2/pwm2-pin"; - pwm3_pin = "/pinctrl/pwm3/pwm3-pin"; - pwm4_pin = "/pinctrl/pwm4/pwm4-pin"; - pwm5_pin = "/pinctrl/pwm5/pwm5-pin"; - pwm6_pin = "/pinctrl/pwm6/pwm6-pin"; - pwm7_pin = "/pinctrl/pwm7/pwm7-pin"; - rmii_pins = "/pinctrl/gmac/rmii-pins"; - mac_refclk_12ma = "/pinctrl/gmac/mac-refclk-12ma"; - mac_refclk = "/pinctrl/gmac/mac-refclk"; - cif_clkout_m0 = "/pinctrl/cif-m0/cif-clkout-m0"; - dvp_d2d9_m0 = "/pinctrl/cif-m0/dvp-d2d9-m0"; - dvp_d0d1_m0 = "/pinctrl/cif-m0/dvp-d0d1-m0"; - dvp_d10d11_m0 = "/pinctrl/cif-m0/d10-d11-m0"; - cif_clkout_m1 = "/pinctrl/cif-m1/cif-clkout-m1"; - dvp_d2d9_m1 = "/pinctrl/cif-m1/dvp-d2d9-m1"; - dvp_d0d1_m1 = "/pinctrl/cif-m1/dvp-d0d1-m1"; - dvp_d10d11_m1 = "/pinctrl/cif-m1/d10-d11-m1"; - isp_prelight = "/pinctrl/isp/isp-prelight"; - pmic_int = "/pinctrl/pmic/pmic_int"; - soc_slppin_gpio = "/pinctrl/pmic/soc_slppin_gpio"; - soc_slppin_slp = "/pinctrl/pmic/soc_slppin_slp"; - soc_slppin_rst = "/pinctrl/pmic/soc_slppin_rst"; - led_pins = "/pinctrl/leds/led-pins"; - motor_pin = "/pinctrl/motor/motor-pin"; - btn_pins = "/pinctrl/btns/btn-pins"; - drm_logo = "/reserved-memory/drm-logo@00000000"; - ramoops_mem = "/reserved-memory/region@110000"; - gpio_keys = "/odroidgo3-keys"; - joypad = "/odroidgo3-joypad"; - leds = "/gpio_leds"; - motor = "/motor-control"; - backlight = "/backlight"; - vccsys = "/vccsys"; - }; -}; diff --git a/config/archr-dts/R36S-DTB/DTS/RGB20S.dts b/config/archr-dts/R36S-DTB/DTS/RGB20S.dts deleted file mode 100644 index 053f31bcc2..0000000000 --- a/config/archr-dts/R36S-DTB/DTS/RGB20S.dts +++ /dev/null @@ -1,4053 +0,0 @@ -/dts-v1/; - -/ { - compatible = "rockchip,rk3326-odroidgo3-linux\0rockchip,rk3326"; - interrupt-parent = <0x01>; - #address-cells = <0x02>; - #size-cells = <0x02>; - model = "Hardkernel ODROID-GO3"; - - ddr_timing { - compatible = "rockchip,ddr-timing"; - ddr2_speed_bin = <0x00>; - ddr3_speed_bin = <0x15>; - ddr4_speed_bin = <0x0c>; - pd_idle = <0x0d>; - sr_idle = <0x5d>; - sr_mc_gate_idle = <0x00>; - srpd_lite_idle = <0x00>; - standby_idle = <0x00>; - auto_pd_dis_freq = <0x42a>; - auto_sr_dis_freq = <0x320>; - ddr2_dll_dis_freq = <0x12c>; - ddr3_dll_dis_freq = <0x12c>; - ddr4_dll_dis_freq = <0x271>; - phy_dll_dis_freq = <0x190>; - ddr2_odt_dis_freq = <0x64>; - phy_ddr2_odt_dis_freq = <0x64>; - ddr2_drv = <0x01>; - ddr2_odt = <0x96>; - phy_ddr2_ca_drv = <0x15>; - phy_ddr2_ck_drv = <0x12>; - phy_ddr2_dq_drv = <0x15>; - phy_ddr2_odt = <0x02>; - ddr3_odt_dis_freq = <0x190>; - phy_ddr3_odt_dis_freq = <0x190>; - ddr3_drv = <0x28>; - ddr3_odt = <0x78>; - phy_ddr3_ca_drv = <0x15>; - phy_ddr3_ck_drv = <0x12>; - phy_ddr3_dq_drv = <0x15>; - phy_ddr3_odt = <0x02>; - phy_lpddr2_odt_dis_freq = <0x29a>; - lpddr2_drv = <0x28>; - phy_lpddr2_ca_drv = <0x16>; - phy_lpddr2_ck_drv = <0x13>; - phy_lpddr2_dq_drv = <0x16>; - phy_lpddr2_odt = <0x00>; - lpddr3_odt_dis_freq = <0x190>; - phy_lpddr3_odt_dis_freq = <0x190>; - lpddr3_drv = <0x28>; - lpddr3_odt = <0xf0>; - phy_lpddr3_ca_drv = <0x16>; - phy_lpddr3_ck_drv = <0x13>; - phy_lpddr3_dq_drv = <0x16>; - phy_lpddr3_odt = <0x02>; - lpddr4_odt_dis_freq = <0x320>; - phy_lpddr4_odt_dis_freq = <0x320>; - lpddr4_drv = <0x3c>; - lpddr4_dq_odt = <0x28>; - lpddr4_ca_odt = <0x28>; - phy_lpddr4_ca_drv = <0x14>; - phy_lpddr4_ck_cs_drv = <0x06>; - phy_lpddr4_dq_drv = <0x06>; - phy_lpddr4_odt = <0x10>; - ddr4_odt_dis_freq = <0x29a>; - phy_ddr4_odt_dis_freq = <0x29a>; - ddr4_drv = <0x22>; - ddr4_odt = <0xf0>; - phy_ddr4_ca_drv = <0x16>; - phy_ddr4_ck_drv = <0x13>; - phy_ddr4_dq_drv = <0x16>; - phy_ddr4_odt = <0x02>; - ddr3a1_ddr4a9_de-skew = <0x06>; - ddr3a0_ddr4a10_de-skew = <0x07>; - ddr3a3_ddr4a6_de-skew = <0x07>; - ddr3a2_ddr4a4_de-skew = <0x07>; - ddr3a5_ddr4a8_de-skew = <0x07>; - ddr3a4_ddr4a5_de-skew = <0x07>; - ddr3a7_ddr4a11_de-skew = <0x07>; - ddr3a6_ddr4a7_de-skew = <0x06>; - ddr3a9_ddr4a0_de-skew = <0x07>; - ddr3a8_ddr4a13_de-skew = <0x07>; - ddr3a11_ddr4a3_de-skew = <0x07>; - ddr3a10_ddr4cs0_de-skew = <0x07>; - ddr3a13_ddr4a2_de-skew = <0x07>; - ddr3a12_ddr4ba1_de-skew = <0x07>; - ddr3a15_ddr4odt0_de-skew = <0x07>; - ddr3a14_ddr4a1_de-skew = <0x07>; - ddr3ba1_ddr4a15_de-skew = <0x07>; - ddr3ba0_ddr4bg0_de-skew = <0x07>; - ddr3ras_ddr4cke_de-skew = <0x07>; - ddr3ba2_ddr4ba0_de-skew = <0x07>; - ddr3we_ddr4bg1_de-skew = <0x07>; - ddr3cas_ddr4a12_de-skew = <0x07>; - ddr3ckn_ddr4ckn_de-skew = <0x07>; - ddr3ckp_ddr4ckp_de-skew = <0x07>; - ddr3cke_ddr4a16_de-skew = <0x07>; - ddr3odt0_ddr4a14_de-skew = <0x07>; - ddr3cs0_ddr4act_de-skew = <0x06>; - ddr3reset_ddr4reset_de-skew = <0x07>; - ddr3cs1_ddr4cs1_de-skew = <0x06>; - ddr3odt1_ddr4odt1_de-skew = <0x07>; - cs0_dm0_rx_de-skew = <0x07>; - cs0_dm0_tx_de-skew = <0x07>; - cs0_dq0_rx_de-skew = <0x08>; - cs0_dq0_tx_de-skew = <0x08>; - cs0_dq1_rx_de-skew = <0x09>; - cs0_dq1_tx_de-skew = <0x08>; - cs0_dq2_rx_de-skew = <0x08>; - cs0_dq2_tx_de-skew = <0x08>; - cs0_dq3_rx_de-skew = <0x08>; - cs0_dq3_tx_de-skew = <0x08>; - cs0_dq4_rx_de-skew = <0x09>; - cs0_dq4_tx_de-skew = <0x08>; - cs0_dq5_rx_de-skew = <0x09>; - cs0_dq5_tx_de-skew = <0x08>; - cs0_dq6_rx_de-skew = <0x09>; - cs0_dq6_tx_de-skew = <0x08>; - cs0_dq7_rx_de-skew = <0x08>; - cs0_dq7_tx_de-skew = <0x08>; - cs0_dqs0_rx_de-skew = <0x06>; - cs0_dqs0p_tx_de-skew = <0x09>; - cs0_dqs0n_tx_de-skew = <0x09>; - cs0_dm1_rx_de-skew = <0x07>; - cs0_dm1_tx_de-skew = <0x06>; - cs0_dq8_rx_de-skew = <0x08>; - cs0_dq8_tx_de-skew = <0x07>; - cs0_dq9_rx_de-skew = <0x09>; - cs0_dq9_tx_de-skew = <0x07>; - cs0_dq10_rx_de-skew = <0x08>; - cs0_dq10_tx_de-skew = <0x08>; - cs0_dq11_rx_de-skew = <0x08>; - cs0_dq11_tx_de-skew = <0x07>; - cs0_dq12_rx_de-skew = <0x08>; - cs0_dq12_tx_de-skew = <0x08>; - cs0_dq13_rx_de-skew = <0x09>; - cs0_dq13_tx_de-skew = <0x07>; - cs0_dq14_rx_de-skew = <0x09>; - cs0_dq14_tx_de-skew = <0x08>; - cs0_dq15_rx_de-skew = <0x09>; - cs0_dq15_tx_de-skew = <0x07>; - cs0_dqs1_rx_de-skew = <0x07>; - cs0_dqs1p_tx_de-skew = <0x09>; - cs0_dqs1n_tx_de-skew = <0x09>; - cs0_dm2_rx_de-skew = <0x07>; - cs0_dm2_tx_de-skew = <0x07>; - cs0_dq16_rx_de-skew = <0x09>; - cs0_dq16_tx_de-skew = <0x09>; - cs0_dq17_rx_de-skew = <0x07>; - cs0_dq17_tx_de-skew = <0x09>; - cs0_dq18_rx_de-skew = <0x07>; - cs0_dq18_tx_de-skew = <0x08>; - cs0_dq19_rx_de-skew = <0x07>; - cs0_dq19_tx_de-skew = <0x09>; - cs0_dq20_rx_de-skew = <0x09>; - cs0_dq20_tx_de-skew = <0x09>; - cs0_dq21_rx_de-skew = <0x09>; - cs0_dq21_tx_de-skew = <0x09>; - cs0_dq22_rx_de-skew = <0x08>; - cs0_dq22_tx_de-skew = <0x09>; - cs0_dq23_rx_de-skew = <0x08>; - cs0_dq23_tx_de-skew = <0x09>; - cs0_dqs2_rx_de-skew = <0x06>; - cs0_dqs2p_tx_de-skew = <0x09>; - cs0_dqs2n_tx_de-skew = <0x09>; - cs0_dm3_rx_de-skew = <0x07>; - cs0_dm3_tx_de-skew = <0x07>; - cs0_dq24_rx_de-skew = <0x08>; - cs0_dq24_tx_de-skew = <0x08>; - cs0_dq25_rx_de-skew = <0x09>; - cs0_dq25_tx_de-skew = <0x09>; - cs0_dq26_rx_de-skew = <0x09>; - cs0_dq26_tx_de-skew = <0x08>; - cs0_dq27_rx_de-skew = <0x09>; - cs0_dq27_tx_de-skew = <0x08>; - cs0_dq28_rx_de-skew = <0x09>; - cs0_dq28_tx_de-skew = <0x09>; - cs0_dq29_rx_de-skew = <0x09>; - cs0_dq29_tx_de-skew = <0x09>; - cs0_dq30_rx_de-skew = <0x08>; - cs0_dq30_tx_de-skew = <0x08>; - cs0_dq31_rx_de-skew = <0x08>; - cs0_dq31_tx_de-skew = <0x08>; - cs0_dqs3_rx_de-skew = <0x07>; - cs0_dqs3p_tx_de-skew = <0x09>; - cs0_dqs3n_tx_de-skew = <0x09>; - cs1_dm0_rx_de-skew = <0x07>; - cs1_dm0_tx_de-skew = <0x07>; - cs1_dq0_rx_de-skew = <0x08>; - cs1_dq0_tx_de-skew = <0x08>; - cs1_dq1_rx_de-skew = <0x09>; - cs1_dq1_tx_de-skew = <0x08>; - cs1_dq2_rx_de-skew = <0x08>; - cs1_dq2_tx_de-skew = <0x08>; - cs1_dq3_rx_de-skew = <0x08>; - cs1_dq3_tx_de-skew = <0x08>; - cs1_dq4_rx_de-skew = <0x08>; - cs1_dq4_tx_de-skew = <0x08>; - cs1_dq5_rx_de-skew = <0x09>; - cs1_dq5_tx_de-skew = <0x08>; - cs1_dq6_rx_de-skew = <0x09>; - cs1_dq6_tx_de-skew = <0x08>; - cs1_dq7_rx_de-skew = <0x08>; - cs1_dq7_tx_de-skew = <0x08>; - cs1_dqs0_rx_de-skew = <0x06>; - cs1_dqs0p_tx_de-skew = <0x09>; - cs1_dqs0n_tx_de-skew = <0x09>; - cs1_dm1_rx_de-skew = <0x07>; - cs1_dm1_tx_de-skew = <0x07>; - cs1_dq8_rx_de-skew = <0x08>; - cs1_dq8_tx_de-skew = <0x08>; - cs1_dq9_rx_de-skew = <0x08>; - cs1_dq9_tx_de-skew = <0x07>; - cs1_dq10_rx_de-skew = <0x07>; - cs1_dq10_tx_de-skew = <0x08>; - cs1_dq11_rx_de-skew = <0x08>; - cs1_dq11_tx_de-skew = <0x08>; - cs1_dq12_rx_de-skew = <0x08>; - cs1_dq12_tx_de-skew = <0x07>; - cs1_dq13_rx_de-skew = <0x08>; - cs1_dq13_tx_de-skew = <0x08>; - cs1_dq14_rx_de-skew = <0x08>; - cs1_dq14_tx_de-skew = <0x08>; - cs1_dq15_rx_de-skew = <0x08>; - cs1_dq15_tx_de-skew = <0x07>; - cs1_dqs1_rx_de-skew = <0x07>; - cs1_dqs1p_tx_de-skew = <0x09>; - cs1_dqs1n_tx_de-skew = <0x09>; - cs1_dm2_rx_de-skew = <0x07>; - cs1_dm2_tx_de-skew = <0x08>; - cs1_dq16_rx_de-skew = <0x08>; - cs1_dq16_tx_de-skew = <0x09>; - cs1_dq17_rx_de-skew = <0x08>; - cs1_dq17_tx_de-skew = <0x09>; - cs1_dq18_rx_de-skew = <0x07>; - cs1_dq18_tx_de-skew = <0x08>; - cs1_dq19_rx_de-skew = <0x08>; - cs1_dq19_tx_de-skew = <0x09>; - cs1_dq20_rx_de-skew = <0x09>; - cs1_dq20_tx_de-skew = <0x09>; - cs1_dq21_rx_de-skew = <0x09>; - cs1_dq21_tx_de-skew = <0x09>; - cs1_dq22_rx_de-skew = <0x08>; - cs1_dq22_tx_de-skew = <0x09>; - cs1_dq23_rx_de-skew = <0x08>; - cs1_dq23_tx_de-skew = <0x09>; - cs1_dqs2_rx_de-skew = <0x06>; - cs1_dqs2p_tx_de-skew = <0x09>; - cs1_dqs2n_tx_de-skew = <0x09>; - cs1_dm3_rx_de-skew = <0x07>; - cs1_dm3_tx_de-skew = <0x07>; - cs1_dq24_rx_de-skew = <0x08>; - cs1_dq24_tx_de-skew = <0x09>; - cs1_dq25_rx_de-skew = <0x09>; - cs1_dq25_tx_de-skew = <0x09>; - cs1_dq26_rx_de-skew = <0x09>; - cs1_dq26_tx_de-skew = <0x08>; - cs1_dq27_rx_de-skew = <0x08>; - cs1_dq27_tx_de-skew = <0x08>; - cs1_dq28_rx_de-skew = <0x09>; - cs1_dq28_tx_de-skew = <0x09>; - cs1_dq29_rx_de-skew = <0x09>; - cs1_dq29_tx_de-skew = <0x09>; - cs1_dq30_rx_de-skew = <0x09>; - cs1_dq30_tx_de-skew = <0x08>; - cs1_dq31_rx_de-skew = <0x08>; - cs1_dq31_tx_de-skew = <0x08>; - cs1_dqs3_rx_de-skew = <0x07>; - cs1_dqs3p_tx_de-skew = <0x09>; - cs1_dqs3n_tx_de-skew = <0x09>; - phandle = <0xaf>; - }; - - aliases { - ethernet0 = "/ethernet@ff360000"; - i2c0 = "/i2c@ff180000"; - i2c1 = "/i2c@ff190000"; - i2c2 = "/i2c@ff1a0000"; - i2c3 = "/i2c@ff1b0000"; - serial0 = "/serial@ff030000"; - serial1 = "/serial@ff158000"; - serial2 = "/serial@ff160000"; - serial3 = "/serial@ff168000"; - serial4 = "/serial@ff170000"; - serial5 = "/serial@ff178000"; - spi0 = "/spi@ff1d0000"; - spi1 = "/spi@ff1d8000"; - }; - - cpus { - #address-cells = <0x02>; - #size-cells = <0x00>; - - cpu@0 { - device_type = "cpu"; - compatible = "arm,cortex-a35\0arm,armv8"; - reg = <0x00 0x00>; - enable-method = "psci"; - clocks = <0x02 0x07>; - #cooling-cells = <0x02>; - dynamic-power-coefficient = <0x5a>; - operating-points-v2 = <0x03>; - cpu-idle-states = <0x04 0x05>; - cpu-supply = <0x06>; - phandle = <0x09>; - }; - - cpu@1 { - device_type = "cpu"; - compatible = "arm,cortex-a35\0arm,armv8"; - reg = <0x00 0x01>; - enable-method = "psci"; - operating-points-v2 = <0x03>; - cpu-idle-states = <0x04 0x05>; - phandle = <0x0a>; - }; - - cpu@2 { - device_type = "cpu"; - compatible = "arm,cortex-a35\0arm,armv8"; - reg = <0x00 0x02>; - enable-method = "psci"; - operating-points-v2 = <0x03>; - cpu-idle-states = <0x04 0x05>; - phandle = <0x0b>; - }; - - cpu@3 { - device_type = "cpu"; - compatible = "arm,cortex-a35\0arm,armv8"; - reg = <0x00 0x03>; - enable-method = "psci"; - operating-points-v2 = <0x03>; - cpu-idle-states = <0x04 0x05>; - phandle = <0x0c>; - }; - - idle-states { - entry-method = "psci"; - - cpu-sleep { - compatible = "arm,idle-state"; - local-timer-stop; - arm,psci-suspend-param = <0x10000>; - entry-latency-us = <0x78>; - exit-latency-us = <0xfa>; - min-residency-us = <0x384>; - phandle = <0x04>; - }; - - cluster-sleep { - compatible = "arm,idle-state"; - local-timer-stop; - arm,psci-suspend-param = <0x1010000>; - entry-latency-us = <0x190>; - exit-latency-us = <0x1f4>; - min-residency-us = <0x7d0>; - phandle = <0x05>; - }; - }; - }; - - cpu0-opp-table { - compatible = "operating-points-v2"; - opp-shared; - rockchip,temp-hysteresis = <0x1388>; - rockchip,low-temp = <0x00>; - rockchip,low-temp-min-volt = <0xf4240>; - rockchip,low-temp-adjust-volt = <0x00 0x5e8 0xc350>; - clocks = <0x02 0x01>; - rockchip,avs-scale = <0x04>; - rockchip,max-volt = <0x149970>; - rockchip,evb-irdrop = <0x61a8>; - nvmem-cells = <0x07 0x08>; - nvmem-cell-names = "cpu_leakage\0performance"; - rockchip,bin-scaling-sel = <0x00 0x0d 0x01 0x0d>; - rockchip,pvtm-voltage-sel = <0x00 0xc350 0x00 0xc351 0xd2f0 0x01 0xd2f1 0xea60 0x02 0xea61 0x1869f 0x03>; - rockchip,pvtm-freq = <0x639c0>; - rockchip,pvtm-volt = <0xf4240>; - rockchip,pvtm-ch = <0x00 0x00>; - rockchip,pvtm-sample-time = <0x3e8>; - rockchip,pvtm-number = <0x0a>; - rockchip,pvtm-error = <0x3e8>; - rockchip,pvtm-ref-temp = <0x28>; - rockchip,pvtm-temp-prop = <0xffffffc8 0xffffffc8>; - rockchip,thermal-zone = "soc-thermal"; - rockchip,avs = <0x01>; - phandle = <0x03>; - - opp-1008000000 { - opp-hz = <0x00 0x3c14dc00>; - opp-microvolt = <0x11edd8 0x11edd8 0x149970>; - opp-microvolt-L0 = <0x11edd8 0x11edd8 0x149970>; - opp-microvolt-L1 = <0x112a88 0x112a88 0x149970>; - opp-microvolt-L2 = <0x112a88 0x112a88 0x149970>; - opp-microvolt-L3 = <0x100590 0x100590 0x149970>; - clock-latency-ns = <0x9c40>; - }; - - opp-1200000000 { - opp-hz = <0x00 0x47868c00>; - opp-microvolt = <0x13d620 0x13d620 0x149970>; - opp-microvolt-L0 = <0x13d620 0x13d620 0x149970>; - opp-microvolt-L1 = <0x137478 0x137478 0x149970>; - opp-microvolt-L2 = <0x1312d0 0x1312d0 0x149970>; - opp-microvolt-L3 = <0x124f80 0x124f80 0x149970>; - clock-latency-ns = <0x9c40>; - }; - - opp-1248000000 { - opp-hz = <0x00 0x4a62f800>; - opp-microvolt = <0x149970 0x149970 0x149970>; - opp-microvolt-L0 = <0x149970 0x149970 0x149970>; - opp-microvolt-L1 = <0x13d620 0x13d620 0x149970>; - opp-microvolt-L2 = <0x137478 0x137478 0x149970>; - opp-microvolt-L3 = <0x12b128 0x12b128 0x149970>; - clock-latency-ns = <0x9c40>; - }; - - opp-1296000000 { - opp-hz = <0x00 0x4d3f6400>; - opp-microvolt = <0x149970 0x149970 0x149970>; - opp-microvolt-L0 = <0x149970 0x149970 0x149970>; - opp-microvolt-L1 = <0x149970 0x149970 0x149970>; - opp-microvolt-L2 = <0x13d620 0x13d620 0x149970>; - opp-microvolt-L3 = <0x1312d0 0x1312d0 0x149970>; - clock-latency-ns = <0x9c40>; - }; - }; - - arm-pmu { - compatible = "arm,cortex-a53-pmu"; - interrupts = <0x00 0x64 0x04 0x00 0x65 0x04 0x00 0x66 0x04 0x00 0x67 0x04>; - interrupt-affinity = <0x09 0x0a 0x0b 0x0c>; - }; - - bus-soc { - compatible = "rockchip,px30-bus"; - rockchip,busfreq-policy = "autocs"; - phandle = <0xc4>; - - soc-bus0 { - bus-id = <0x00>; - timer-us = <0x14>; - enable-msk = <0x40f7>; - status = "disabled"; - }; - - soc-bus1 { - bus-id = <0x01>; - timer-us = <0xc8>; - enable-msk = <0x40bf>; - status = "disabled"; - }; - - soc-bus2 { - bus-id = <0x02>; - timer-us = <0xc8>; - enable-msk = <0x4007>; - status = "disabled"; - }; - }; - - bus-apll { - compatible = "rockchip,px30-bus"; - rockchip,busfreq-policy = "clkfreq"; - clocks = <0x02 0x01>; - clock-names = "bus"; - operating-points-v2 = <0x0d>; - status = "okay"; - bus-supply = <0x0e>; - phandle = <0xc5>; - }; - - bus-apll-opp-table { - compatible = "operating-points-v2"; - opp-shared; - phandle = <0x0d>; - - opp-1512000000 { - opp-hz = <0x00 0x5a1f4a00>; - opp-microvolt = <0xf4240>; - }; - - opp-1008000000 { - opp-hz = <0x00 0x3c14dc00>; - opp-microvolt = <0xe7ef0>; - }; - }; - - cpuinfo { - compatible = "rockchip,cpuinfo"; - nvmem-cells = <0x0f>; - nvmem-cell-names = "id"; - }; - - display-subsystem { - compatible = "rockchip,display-subsystem"; - ports = <0x10>; - status = "okay"; - logo-memory-region = <0x11>; - phandle = <0xc6>; - - route { - - route-lvds { - status = "disabled"; - logo,uboot = "logo.bmp"; - logo,kernel = "logo_kernel.bmp"; - logo,mode = "center"; - charge_logo,mode = "center"; - connect = <0x12>; - phandle = <0xc7>; - }; - - route-dsi { - status = "okay"; - logo,uboot = "logo.bmp"; - logo,kernel = "logo_kernel.bmp"; - logo,mode = "center"; - charge_logo,mode = "center"; - connect = <0x13>; - phandle = <0xc8>; - }; - - route-rgb { - status = "disabled"; - logo,uboot = "logo.bmp"; - logo,kernel = "logo_kernel.bmp"; - logo,mode = "center"; - charge_logo,mode = "center"; - connect = <0x14>; - phandle = <0xc9>; - }; - }; - }; - - firmware { - - optee { - compatible = "linaro,optee-tz"; - method = "smc"; - }; - }; - - external-gmac-clock { - compatible = "fixed-clock"; - clock-frequency = <0x2faf080>; - clock-output-names = "gmac_clkin"; - #clock-cells = <0x00>; - phandle = <0xca>; - }; - - psci { - compatible = "arm,psci-1.0"; - method = "smc"; - }; - - rockchip-suspend { - compatible = "rockchip,pm-px30"; - status = "okay"; - rockchip,sleep-debug-en = <0x01>; - rockchip,sleep-mode-config = <0x20702>; - rockchip,wakeup-config = <0x85>; - phandle = <0xcb>; - }; - - timer { - compatible = "arm,armv8-timer"; - interrupts = <0x01 0x0d 0xf04 0x01 0x0e 0xf04 0x01 0x0b 0xf04 0x01 0x0a 0xf04>; - }; - - xin24m { - compatible = "fixed-clock"; - #clock-cells = <0x00>; - clock-frequency = <0x16e3600>; - clock-output-names = "xin24m"; - phandle = <0xcc>; - }; - - xin32k { - compatible = "fixed-clock"; - #clock-cells = <0x00>; - clock-frequency = <0x8000>; - clock-output-names = "xin32k"; - phandle = <0xcd>; - }; - - power-management@ff000000 { - compatible = "rockchip,px30-pmu\0syscon\0simple-mfd"; - reg = <0x00 0xff000000 0x00 0x1000>; - phandle = <0xce>; - - power-controller { - compatible = "rockchip,px30-power-controller"; - #power-domain-cells = <0x01>; - #address-cells = <0x01>; - #size-cells = <0x00>; - phandle = <0x8a>; - - pd_usb@5 { - reg = <0x05>; - clocks = <0x02 0x103 0x02 0x102 0x02 0x3c>; - pm_qos = <0x15 0x16>; - }; - - pd_sdcard@7 { - reg = <0x07>; - clocks = <0x02 0xf7 0x02 0x3b>; - pm_qos = <0x17>; - }; - - pd_gmac@9 { - reg = <0x09>; - clocks = <0x02 0xb2 0x02 0x143 0x02 0x40 0x02 0x3f>; - pm_qos = <0x18>; - }; - - pd_mmc_nand@10 { - reg = <0x0a>; - clocks = <0x02 0xfe 0x02 0x100 0x02 0xff 0x02 0x101 0x02 0x39 0x02 0x37 0x02 0x38 0x02 0x3a>; - pm_qos = <0x19 0x1a 0x1b 0x1c>; - }; - - pd_vpu@11 { - reg = <0x0b>; - clocks = <0x02 0xaf 0x02 0xf4 0x02 0x4b>; - pm_qos = <0x1d 0x1e>; - }; - - pd_vo@12 { - reg = <0x0c>; - clocks = <0x02 0xb7 0x02 0xb5 0x02 0xb6 0x02 0x96 0x02 0x97 0x02 0xfd 0x02 0xfb 0x02 0xfc 0x02 0x144 0x02 0x35 0x02 0x36>; - pm_qos = <0x1f 0x20 0x21 0x22>; - }; - - pd_vi@13 { - reg = <0x0d>; - clocks = <0x02 0xb3 0x02 0xb4 0x02 0xf9 0x02 0xfa 0x02 0x33>; - pm_qos = <0x23 0x24 0x25 0x26 0x27>; - }; - - pd_gpu@14 { - reg = <0x0e>; - clocks = <0x02 0x49>; - pm_qos = <0x28>; - }; - }; - }; - - syscon@ff010000 { - compatible = "rockchip,px30-pmugrf\0syscon\0simple-mfd"; - reg = <0x00 0xff010000 0x00 0x1000>; - #address-cells = <0x01>; - #size-cells = <0x01>; - phandle = <0xac>; - - io-domains { - compatible = "rockchip,px30-pmu-io-voltage-domain"; - status = "okay"; - pmuio1-supply = <0x29>; - pmuio2-supply = <0x29>; - phandle = <0xcf>; - }; - - reboot-mode { - compatible = "syscon-reboot-mode"; - offset = <0x200>; - mode-bootloader = <0x5242c301>; - mode-charge = <0x5242c30b>; - mode-fastboot = <0x5242c309>; - mode-loader = <0x5242c301>; - mode-normal = <0x5242c300>; - mode-recovery = <0x5242c303>; - mode-ums = <0x5242c30c>; - }; - - pmu-pvtm { - compatible = "rockchip,px30-pmu-pvtm"; - clocks = <0x2a 0x07>; - clock-names = "pmu"; - status = "okay"; - phandle = <0xd0>; - }; - }; - - serial@ff030000 { - compatible = "rockchip,px30-uart\0snps,dw-apb-uart"; - reg = <0x00 0xff030000 0x00 0x100>; - interrupts = <0x00 0x0f 0x04>; - clocks = <0x2a 0x06 0x2a 0x15>; - clock-names = "baudclk\0apb_pclk"; - reg-shift = <0x02>; - reg-io-width = <0x04>; - dmas = <0x2b 0x00 0x2b 0x01>; - pinctrl-names = "default"; - pinctrl-0 = <0x2c 0x2d 0x2e>; - status = "disabled"; - phandle = <0xd1>; - }; - - i2s@ff060000 { - compatible = "rockchip,px30-i2s-tdm"; - reg = <0x00 0xff060000 0x00 0x1000>; - interrupts = <0x00 0x0c 0x04>; - clocks = <0x02 0x10 0x02 0x12 0x02 0x106>; - clock-names = "mclk_tx\0mclk_rx\0hclk"; - dmas = <0x2b 0x10 0x2b 0x11>; - dma-names = "tx\0rx"; - resets = <0x02 0x84 0x02 0xbf>; - reset-names = "tx-m\0rx-m"; - rockchip,cru = <0x02>; - rockchip,grf = <0x2f>; - pinctrl-names = "default"; - pinctrl-0 = <0x30 0x31 0x32 0x33 0x34 0x35 0x36 0x37 0x38 0x39 0x3a 0x3b>; - status = "disabled"; - phandle = <0xd2>; - }; - - i2s@ff070000 { - compatible = "rockchip,px30-i2s\0rockchip,rk3066-i2s"; - reg = <0x00 0xff070000 0x00 0x1000>; - interrupts = <0x00 0x0d 0x04>; - clocks = <0x02 0x14 0x02 0x107>; - clock-names = "i2s_clk\0i2s_hclk"; - dmas = <0x2b 0x12 0x2b 0x13>; - dma-names = "tx\0rx"; - resets = <0x02 0x86 0x02 0x85>; - reset-names = "reset-m\0reset-h"; - pinctrl-names = "default"; - pinctrl-0 = <0x3c 0x3d 0x3e 0x3f>; - status = "okay"; - #sound-dai-cells = <0x00>; - phandle = <0xc2>; - }; - - i2s@ff080000 { - compatible = "rockchip,px30-i2s\0rockchip,rk3066-i2s"; - reg = <0x00 0xff080000 0x00 0x1000>; - interrupts = <0x00 0x0e 0x04>; - clocks = <0x02 0x16 0x02 0x108>; - clock-names = "i2s_clk\0i2s_hclk"; - dmas = <0x2b 0x14 0x2b 0x15>; - dma-names = "tx\0rx"; - resets = <0x02 0x88 0x02 0x87>; - reset-names = "reset-m\0reset-h"; - pinctrl-names = "default"; - pinctrl-0 = <0x40 0x41 0x42 0x43>; - status = "disabled"; - phandle = <0xd3>; - }; - - pdm@ff0a0000 { - compatible = "rockchip,px30-pdm\0rockchip,pdm"; - reg = <0x00 0xff0a0000 0x00 0x1000>; - clocks = <0x02 0x0f 0x02 0x105>; - clock-names = "pdm_clk\0pdm_hclk"; - dmas = <0x2b 0x18>; - dma-names = "rx"; - resets = <0x02 0x82>; - reset-names = "pdm-m"; - pinctrl-names = "default"; - pinctrl-0 = <0x44 0x45 0x46 0x47 0x48 0x49>; - status = "disabled"; - phandle = <0xd4>; - }; - - crypto@ff0b0000 { - compatible = "rockchip,px30-crypto"; - reg = <0x00 0xff0b0000 0x00 0x4000>; - interrupts = <0x00 0x52 0x04>; - clocks = <0x02 0xac 0x02 0xf1 0x02 0x30 0x02 0x31>; - clock-names = "aclk\0hclk\0sclk\0apb_pclk"; - resets = <0x02 0x74>; - reset-names = "crypto-rst"; - status = "disabled"; - phandle = <0xd5>; - }; - - rng@ff0b0000 { - compatible = "rockchip,cryptov2-rng"; - reg = <0x00 0xff0b0000 0x00 0x4000>; - clocks = <0x02 0x30 0x02 0x31 0x02 0xac 0x02 0xf1>; - clock-names = "clk_crypto\0clk_crypto_apk\0aclk_crypto\0hclk_crypto"; - assigned-clocks = <0x02 0x30 0x02 0x31 0x02 0xac 0x02 0xf1>; - assigned-clock-rates = <0x8f0d180 0x8f0d180 0xbebc200 0x5f5e100>; - resets = <0x02 0x74>; - reset-names = "reset"; - status = "okay"; - phandle = <0xd6>; - }; - - interrupt-controller@ff131000 { - compatible = "arm,gic-400"; - #interrupt-cells = <0x03>; - #address-cells = <0x00>; - interrupt-controller; - reg = <0x00 0xff131000 0x00 0x1000 0x00 0xff132000 0x00 0x2000 0x00 0xff134000 0x00 0x2000 0x00 0xff136000 0x00 0x2000>; - interrupts = <0x01 0x09 0xf04>; - phandle = <0x01>; - }; - - syscon@ff140000 { - compatible = "rockchip,px30-grf\0syscon\0simple-mfd"; - reg = <0x00 0xff140000 0x00 0x1000>; - #address-cells = <0x01>; - #size-cells = <0x01>; - phandle = <0x2f>; - - io-domains { - compatible = "rockchip,px30-io-voltage-domain"; - status = "okay"; - vccio1-supply = <0x4a>; - vccio2-supply = <0x4a>; - vccio3-supply = <0x4b>; - vccio4-supply = <0x4b>; - vccio5-supply = <0x4b>; - vccio6-supply = <0x4b>; - phandle = <0xd7>; - }; - - lvds { - compatible = "rockchip,px30-lvds"; - phys = <0x4c>; - phy-names = "phy"; - status = "disabled"; - phandle = <0xd8>; - - ports { - #address-cells = <0x01>; - #size-cells = <0x00>; - - port@0 { - reg = <0x00>; - #address-cells = <0x01>; - #size-cells = <0x00>; - - endpoint@0 { - reg = <0x00>; - remote-endpoint = <0x12>; - phandle = <0xa2>; - }; - }; - }; - }; - - rgb { - compatible = "rockchip,px30-rgb"; - pinctrl-names = "default\0sleep"; - pinctrl-0 = <0x4d>; - pinctrl-1 = <0x4e>; - status = "disabled"; - phys = <0x4c>; - phy-names = "phy"; - phandle = <0xd9>; - - ports { - #address-cells = <0x01>; - #size-cells = <0x00>; - - port@0 { - reg = <0x00>; - #address-cells = <0x01>; - #size-cells = <0x00>; - - endpoint@0 { - reg = <0x00>; - remote-endpoint = <0x14>; - phandle = <0xa4>; - }; - }; - }; - }; - }; - - syscon@ff148000 { - compatible = "syscon\0simple-mfd"; - reg = <0x00 0xff148000 0x00 0x1000>; - #address-cells = <0x01>; - #size-cells = <0x01>; - phandle = <0xda>; - - pvtm { - compatible = "rockchip,px30-pvtm"; - clocks = <0x02 0x4a>; - clock-names = "core"; - status = "okay"; - phandle = <0xdb>; - }; - }; - - serial@ff158000 { - compatible = "rockchip,px30-uart\0snps,dw-apb-uart"; - reg = <0x00 0xff158000 0x00 0x100>; - interrupts = <0x00 0x10 0x04>; - clocks = <0x02 0x18 0x02 0x149>; - clock-names = "baudclk\0apb_pclk"; - reg-shift = <0x02>; - reg-io-width = <0x04>; - dmas = <0x2b 0x02 0x2b 0x03>; - pinctrl-names = "default"; - pinctrl-0 = <0x4f 0x50>; - status = "okay"; - phandle = <0xdc>; - }; - - serial@ff160000 { - compatible = "rockchip,px30-uart\0snps,dw-apb-uart"; - reg = <0x00 0xff160000 0x00 0x100>; - interrupts = <0x00 0x11 0x04>; - clocks = <0x02 0x19 0x02 0x14a>; - clock-names = "baudclk\0apb_pclk"; - reg-shift = <0x02>; - reg-io-width = <0x04>; - dmas = <0x2b 0x04 0x2b 0x05>; - pinctrl-names = "default"; - pinctrl-0 = <0x51>; - status = "disabled"; - phandle = <0xdd>; - }; - - serial@ff168000 { - compatible = "rockchip,px30-uart\0snps,dw-apb-uart"; - reg = <0x00 0xff168000 0x00 0x100>; - interrupts = <0x00 0x12 0x04>; - clocks = <0x02 0x1a 0x02 0x14b>; - clock-names = "baudclk\0apb_pclk"; - reg-shift = <0x02>; - reg-io-width = <0x04>; - dmas = <0x2b 0x06 0x2b 0x07>; - pinctrl-names = "default"; - pinctrl-0 = <0x52 0x53 0x54>; - status = "disabled"; - phandle = <0xde>; - }; - - serial@ff170000 { - compatible = "rockchip,px30-uart\0snps,dw-apb-uart"; - reg = <0x00 0xff170000 0x00 0x100>; - interrupts = <0x00 0x13 0x04>; - clocks = <0x02 0x1b 0x02 0x14c>; - clock-names = "baudclk\0apb_pclk"; - reg-shift = <0x02>; - reg-io-width = <0x04>; - dmas = <0x2b 0x08 0x2b 0x09>; - pinctrl-names = "default"; - pinctrl-0 = <0x55 0x56 0x57>; - status = "disabled"; - phandle = <0xdf>; - }; - - serial@ff178000 { - compatible = "rockchip,px30-uart\0snps,dw-apb-uart"; - reg = <0x00 0xff178000 0x00 0x100>; - interrupts = <0x00 0x14 0x04>; - clocks = <0x02 0x1c 0x02 0x14d>; - clock-names = "baudclk\0apb_pclk"; - reg-shift = <0x02>; - reg-io-width = <0x04>; - dmas = <0x2b 0x0a 0x2b 0x0b>; - pinctrl-names = "default"; - pinctrl-0 = <0x58 0x59 0x5a>; - status = "disabled"; - phandle = <0xe0>; - }; - - i2c@ff180000 { - compatible = "rockchip,rk3399-i2c"; - reg = <0x00 0xff180000 0x00 0x1000>; - clocks = <0x02 0x1d 0x02 0x14e>; - clock-names = "i2c\0pclk"; - interrupts = <0x00 0x07 0x04>; - pinctrl-names = "default"; - pinctrl-0 = <0x5b>; - #address-cells = <0x01>; - #size-cells = <0x00>; - status = "okay"; - clock-frequency = <0x61a80>; - i2c-scl-rising-time-ns = <0x118>; - i2c-scl-falling-time-ns = <0x10>; - phandle = <0xe1>; - - pmic@20 { - compatible = "rockchip,rk817"; - reg = <0x20>; - interrupt-parent = <0x5c>; - interrupts = <0x0a 0x08>; - pinctrl-names = "default\0pmic-sleep\0pmic-power-off\0pmic-reset"; - pinctrl-0 = <0x5d>; - pinctrl-1 = <0x5e 0x5f>; - pinctrl-2 = <0x60 0x61>; - pinctrl-3 = <0x62 0x63>; - rockchip,system-power-controller; - wakeup-source; - #clock-cells = <0x01>; - clock-output-names = "rk808-clkout1\0rk808-clkout2"; - pmic-reset-func = <0x01>; - vcc1-supply = <0x64>; - vcc2-supply = <0x64>; - vcc3-supply = <0x64>; - vcc4-supply = <0x64>; - vcc5-supply = <0x64>; - vcc6-supply = <0x64>; - vcc7-supply = <0x64>; - vcc8-supply = <0x64>; - vcc9-supply = <0x65>; - phandle = <0xe2>; - - pwrkey { - status = "okay"; - }; - - pinctrl_rk8xx { - gpio-controller; - #gpio-cells = <0x02>; - phandle = <0xe3>; - - rk817_ts_gpio1 { - pins = "gpio_ts"; - function = "pin_fun1"; - phandle = <0xe4>; - }; - - rk817_gt_gpio2 { - pins = "gpio_gt"; - function = "pin_fun1"; - phandle = <0xe5>; - }; - - rk817_pin_ts { - pins = "gpio_ts"; - function = "pin_fun0"; - phandle = <0xe6>; - }; - - rk817_pin_gt { - pins = "gpio_gt"; - function = "pin_fun0"; - phandle = <0xe7>; - }; - - rk817_slppin_null { - pins = "gpio_slp"; - function = "pin_fun0"; - phandle = <0xe8>; - }; - - rk817_slppin_slp { - pins = "gpio_slp"; - function = "pin_fun1"; - phandle = <0x5f>; - }; - - rk817_slppin_pwrdn { - pins = "gpio_slp"; - function = "pin_fun2"; - phandle = <0x61>; - }; - - rk817_slppin_rst { - pins = "gpio_slp"; - function = "pin_fun3"; - phandle = <0x63>; - }; - }; - - regulators { - - DCDC_REG1 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0xe7ef0>; - regulator-max-microvolt = <0x118c30>; - regulator-ramp-delay = <0x1771>; - regulator-initial-mode = <0x02>; - regulator-name = "vdd_logic"; - phandle = <0x0e>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <0xe7ef0>; - }; - }; - - DCDC_REG2 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0xe7ef0>; - regulator-max-microvolt = <0x149970>; - regulator-ramp-delay = <0x1771>; - regulator-initial-mode = <0x02>; - regulator-name = "vdd_arm"; - phandle = <0x06>; - - regulator-state-mem { - regulator-off-in-suspend; - regulator-suspend-microvolt = <0xe7ef0>; - }; - }; - - DCDC_REG3 { - regulator-always-on; - regulator-boot-on; - regulator-initial-mode = <0x02>; - regulator-name = "vcc_ddr"; - phandle = <0xe9>; - - regulator-state-mem { - regulator-on-in-suspend; - }; - }; - - DCDC_REG4 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0x325aa0>; - regulator-max-microvolt = <0x325aa0>; - regulator-initial-mode = <0x02>; - regulator-name = "vcc_3v3"; - phandle = <0x4b>; - - regulator-state-mem { - regulator-off-in-suspend; - regulator-suspend-microvolt = <0x325aa0>; - }; - }; - - LDO_REG1 { - regulator-min-microvolt = <0xf4240>; - regulator-max-microvolt = <0xf4240>; - regulator-name = "vcc_1v0"; - phandle = <0xea>; - - regulator-state-mem { - regulator-off-in-suspend; - regulator-suspend-microvolt = <0xf4240>; - }; - }; - - LDO_REG2 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0x1b7740>; - regulator-max-microvolt = <0x1b7740>; - regulator-name = "vcc1v8_soc"; - phandle = <0x88>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <0x1b7740>; - }; - }; - - LDO_REG3 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0xf4240>; - regulator-max-microvolt = <0xf4240>; - regulator-name = "vcc1v0_soc"; - phandle = <0xeb>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <0xf4240>; - }; - }; - - LDO_REG4 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0x325aa0>; - regulator-max-microvolt = <0x325aa0>; - regulator-name = "vcc3v3_pmu"; - phandle = <0x29>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <0x325aa0>; - }; - }; - - LDO_REG5 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0x1b7740>; - regulator-max-microvolt = <0x1b7740>; - regulator-name = "vccio_sd"; - phandle = <0x4a>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <0x1b7740>; - }; - }; - - LDO_REG6 { - regulator-min-microvolt = <0x1b7740>; - regulator-max-microvolt = <0x2dc6c0>; - regulator-boot-on; - regulator-name = "vcc_sd"; - phandle = <0x93>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <0x2dc6c0>; - }; - }; - - LDO_REG7 { - regulator-min-microvolt = <0x325aa0>; - regulator-max-microvolt = <0x325aa0>; - regulator-name = "vcc_backlight"; - phandle = <0x9e>; - - regulator-state-mem { - regulator-off-in-suspend; - regulator-suspend-microvolt = <0x325aa0>; - }; - }; - - LDO_REG8 { - regulator-min-microvolt = <0x2ab980>; - regulator-max-microvolt = <0x2ab980>; - regulator-name = "vcc_lcd"; - phandle = <0x9f>; - - regulator-state-mem { - regulator-off-in-suspend; - regulator-suspend-microvolt = <0x2ab980>; - }; - }; - - BOOST { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <0x4c4b40>; - regulator-max-microvolt = <0x5265c0>; - regulator-name = "boost"; - phandle = <0x65>; - }; - - OTG_SWITCH { - regulator-boot-on; - regulator-name = "otg_switch"; - phandle = <0xec>; - }; - }; - - battery { - compatible = "rk817,battery"; - ocv_table = <0xc5d 0xc94 0xcd0 0xd02 0xd34 0xd66 0xd98 0xdca 0xdfc 0xe2e 0xe56 0xe7e 0xea6 0xece 0xef6 0xf1e 0xf46 0xf6e 0xf96 0xf9b 0xfa0>; - design_capacity = <0xd34>; - design_qmax = <0xe86>; - bat_res = <0x64>; - sleep_enter_current = <0x12c>; - sleep_exit_current = <0x12c>; - sleep_filter_current = <0x64>; - power_off_thresd = <0xbb8>; - zero_algorithm_vol = <0xf0a>; - max_soc_offset = <0x3c>; - monitor_sec = <0x05>; - virtual_power = <0x00>; - sample_res = <0x0a>; - }; - - charger { - compatible = "rk817,charger"; - min_input_voltage = <0x1194>; - max_input_current = <0x5dc>; - max_chrg_current = <0x7d0>; - max_chrg_voltage = <0x1068>; - chrg_term_mode = <0x00>; - chrg_finish_cur = <0x34>; - virtual_power = <0x00>; - sample_res = <0x0a>; - dc_det_gpio = <0x5c 0x0b 0x00>; - bat_low_gpio = <0x66 0x0d 0x00>; - extcon = <0x67>; - }; - - codec { - #sound-dai-cells = <0x00>; - compatible = "rockchip,rk817-codec"; - clocks = <0x02 0x15>; - clock-names = "mclk"; - pinctrl-names = "default"; - pinctrl-0 = <0x68>; - hp-volume = <0x14>; - spk-volume = <0x03>; - status = "okay"; - phandle = <0xc3>; - }; - }; - }; - - i2c@ff190000 { - compatible = "rockchip,rk3399-i2c"; - reg = <0x00 0xff190000 0x00 0x1000>; - clocks = <0x02 0x1e 0x02 0x14f>; - clock-names = "i2c\0pclk"; - interrupts = <0x00 0x08 0x04>; - pinctrl-names = "default"; - pinctrl-0 = <0x69>; - #address-cells = <0x01>; - #size-cells = <0x00>; - status = "okay"; - clock-frequency = <0x61a80>; - phandle = <0xed>; - }; - - i2c@ff1a0000 { - compatible = "rockchip,rk3399-i2c"; - reg = <0x00 0xff1a0000 0x00 0x1000>; - clocks = <0x02 0x1f 0x02 0x150>; - clock-names = "i2c\0pclk"; - interrupts = <0x00 0x09 0x04>; - pinctrl-names = "default"; - pinctrl-0 = <0x6a>; - #address-cells = <0x01>; - #size-cells = <0x00>; - status = "disabled"; - phandle = <0xee>; - }; - - i2c@ff1b0000 { - compatible = "rockchip,rk3399-i2c"; - reg = <0x00 0xff1b0000 0x00 0x1000>; - clocks = <0x02 0x20 0x02 0x151>; - clock-names = "i2c\0pclk"; - interrupts = <0x00 0x0a 0x04>; - pinctrl-names = "default"; - pinctrl-0 = <0x6b>; - #address-cells = <0x01>; - #size-cells = <0x00>; - status = "disabled"; - phandle = <0xef>; - }; - - spi@ff1d0000 { - compatible = "rockchip,px30-spi\0rockchip,rk3066-spi"; - reg = <0x00 0xff1d0000 0x00 0x1000>; - interrupts = <0x00 0x1a 0x04>; - #address-cells = <0x01>; - #size-cells = <0x00>; - clocks = <0x02 0x24 0x02 0x155>; - clock-names = "spiclk\0apb_pclk"; - dmas = <0x2b 0x0c 0x2b 0x0d>; - dma-names = "tx\0rx"; - pinctrl-names = "default\0high_speed"; - pinctrl-0 = <0x6c 0x6d 0x6e 0x6f>; - pinctrl-1 = <0x70 0x6d 0x71 0x72>; - status = "disabled"; - phandle = <0xf0>; - }; - - spi@ff1d8000 { - compatible = "rockchip,px30-spi\0rockchip,rk3066-spi"; - reg = <0x00 0xff1d8000 0x00 0x1000>; - interrupts = <0x00 0x1b 0x04>; - #address-cells = <0x01>; - #size-cells = <0x00>; - clocks = <0x02 0x25 0x02 0x156>; - clock-names = "spiclk\0apb_pclk"; - dmas = <0x2b 0x0e 0x2b 0x0f>; - dma-names = "tx\0rx"; - pinctrl-names = "default\0high_speed"; - pinctrl-0 = <0x73 0x74 0x75 0x76 0x77>; - pinctrl-1 = <0x78 0x74 0x75 0x79 0x7a>; - status = "disabled"; - phandle = <0xf1>; - }; - - watchdog@ff1e0000 { - compatible = "snps,dw-wdt"; - reg = <0x00 0xff1e0000 0x00 0x100>; - clocks = <0x02 0x15b>; - interrupts = <0x00 0x25 0x04>; - resets = <0x02 0xb5>; - reset-names = "reset"; - status = "disabled"; - phandle = <0xf2>; - }; - - pwm@ff200000 { - compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm"; - reg = <0x00 0xff200000 0x00 0x10>; - #pwm-cells = <0x03>; - pinctrl-names = "active"; - pinctrl-0 = <0x7b>; - clocks = <0x02 0x22 0x02 0x153>; - clock-names = "pwm\0pclk"; - status = "okay"; - phandle = <0xbc>; - }; - - pwm@ff200010 { - compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm"; - reg = <0x00 0xff200010 0x00 0x10>; - #pwm-cells = <0x03>; - pinctrl-names = "active"; - pinctrl-0 = <0x7c>; - clocks = <0x02 0x22 0x02 0x153>; - clock-names = "pwm\0pclk"; - status = "okay"; - phandle = <0xc1>; - }; - - pwm@ff200020 { - compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm"; - reg = <0x00 0xff200020 0x00 0x10>; - #pwm-cells = <0x03>; - pinctrl-names = "active"; - pinctrl-0 = <0x7d>; - clocks = <0x02 0x22 0x02 0x153>; - clock-names = "pwm\0pclk"; - status = "disabled"; - phandle = <0xf3>; - }; - - pwm@ff200030 { - compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm"; - reg = <0x00 0xff200030 0x00 0x10>; - #pwm-cells = <0x03>; - pinctrl-names = "active"; - pinctrl-0 = <0x7e>; - clocks = <0x02 0x22 0x02 0x153>; - clock-names = "pwm\0pclk"; - status = "disabled"; - phandle = <0xf4>; - }; - - pwm@ff208000 { - compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm"; - reg = <0x00 0xff208000 0x00 0x10>; - #pwm-cells = <0x03>; - pinctrl-names = "active"; - pinctrl-0 = <0x7f>; - clocks = <0x02 0x23 0x02 0x154>; - clock-names = "pwm\0pclk"; - status = "disabled"; - phandle = <0xf5>; - }; - - pwm@ff208010 { - compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm"; - reg = <0x00 0xff208010 0x00 0x10>; - #pwm-cells = <0x03>; - pinctrl-names = "active"; - pinctrl-0 = <0x80>; - clocks = <0x02 0x23 0x02 0x154>; - clock-names = "pwm\0pclk"; - status = "disabled"; - phandle = <0xf6>; - }; - - pwm@ff208020 { - compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm"; - reg = <0x00 0xff208020 0x00 0x10>; - #pwm-cells = <0x03>; - pinctrl-names = "active"; - pinctrl-0 = <0x81>; - clocks = <0x02 0x23 0x02 0x154>; - clock-names = "pwm\0pclk"; - status = "disabled"; - phandle = <0xf7>; - }; - - pwm@ff208030 { - compatible = "rockchip,px30-pwm\0rockchip,rk3328-pwm"; - reg = <0x00 0xff208030 0x00 0x10>; - #pwm-cells = <0x03>; - pinctrl-names = "active"; - pinctrl-0 = <0x82>; - clocks = <0x02 0x23 0x02 0x154>; - clock-names = "pwm\0pclk"; - status = "disabled"; - phandle = <0xf8>; - }; - - rktimer@ff210000 { - compatible = "rockchip,rk3288-timer"; - reg = <0x00 0xff210000 0x00 0x1000>; - interrupts = <0x00 0x1e 0x04>; - clocks = <0x02 0x159 0x02 0x26>; - clock-names = "pclk\0timer"; - phandle = <0xf9>; - }; - - amba { - compatible = "simple-bus"; - #address-cells = <0x02>; - #size-cells = <0x02>; - ranges; - - dmac@ff240000 { - compatible = "arm,pl330\0arm,primecell"; - reg = <0x00 0xff240000 0x00 0x4000>; - interrupts = <0x00 0x01 0x04 0x00 0x02 0x04>; - clocks = <0x02 0xbb>; - clock-names = "apb_pclk"; - #dma-cells = <0x01>; - peripherals-req-type-burst; - phandle = <0x2b>; - }; - }; - - thermal-zones { - phandle = <0xfa>; - - soc-thermal { - polling-delay-passive = <0x14>; - polling-delay = <0x3e8>; - sustainable-power = <0x2ee>; - thermal-sensors = <0x83 0x00>; - phandle = <0xfb>; - - trips { - - trip-point-0 { - temperature = <0x11170>; - hysteresis = <0x7d0>; - type = "passive"; - phandle = <0xfc>; - }; - - trip-point-1 { - temperature = <0x14c08>; - hysteresis = <0x7d0>; - type = "passive"; - phandle = <0x84>; - }; - - soc-crit { - temperature = <0x1c138>; - hysteresis = <0x7d0>; - type = "critical"; - phandle = <0xfd>; - }; - }; - - cooling-maps { - - map0 { - trip = <0x84>; - cooling-device = <0x09 0xffffffff 0xffffffff>; - contribution = <0x1000>; - }; - - map1 { - trip = <0x84>; - cooling-device = <0x85 0xffffffff 0xffffffff>; - contribution = <0x1000>; - }; - }; - }; - - gpu-thermal { - polling-delay-passive = <0x64>; - polling-delay = <0x3e8>; - thermal-sensors = <0x83 0x01>; - phandle = <0xfe>; - }; - }; - - tsadc@ff280000 { - compatible = "rockchip,px30-tsadc"; - reg = <0x00 0xff280000 0x00 0x100>; - interrupts = <0x00 0x24 0x04>; - rockchip,grf = <0x2f>; - clocks = <0x02 0x2c 0x02 0x158>; - clock-names = "tsadc\0apb_pclk"; - assigned-clocks = <0x02 0x2c>; - assigned-clock-rates = <0xc350>; - resets = <0x02 0xa8>; - reset-names = "tsadc-apb"; - #thermal-sensor-cells = <0x01>; - rockchip,hw-tshut-temp = <0x1d4c0>; - status = "okay"; - pinctrl-names = "gpio\0otpout"; - pinctrl-0 = <0x86>; - pinctrl-1 = <0x87>; - phandle = <0x83>; - }; - - saradc@ff288000 { - compatible = "rockchip,px30-saradc\0rockchip,rk3399-saradc"; - reg = <0x00 0xff288000 0x00 0x100>; - interrupts = <0x00 0x54 0x04>; - #io-channel-cells = <0x01>; - clocks = <0x02 0x2d 0x02 0x157>; - clock-names = "saradc\0apb_pclk"; - resets = <0x02 0xa5>; - reset-names = "saradc-apb"; - status = "okay"; - vref-supply = <0x88>; - phandle = <0xbe>; - }; - - otp@ff290000 { - compatible = "rockchip,px30-otp"; - reg = <0x00 0xff290000 0x00 0x4000>; - #address-cells = <0x01>; - #size-cells = <0x01>; - clocks = <0x02 0x2f 0x02 0x15a 0x02 0x161>; - clock-names = "clk_otp\0pclk_otp\0pclk_otp_phy"; - resets = <0x02 0xb4>; - reset-names = "otp_phy"; - phandle = <0xff>; - - id@7 { - reg = <0x07 0x10>; - phandle = <0x0f>; - }; - - cpu-leakage@17 { - reg = <0x17 0x01>; - phandle = <0x07>; - }; - - performance@1e { - reg = <0x1e 0x01>; - bits = <0x04 0x03>; - phandle = <0x08>; - }; - }; - - clock-controller@ff2b0000 { - compatible = "rockchip,px30-cru"; - reg = <0x00 0xff2b0000 0x00 0x1000>; - rockchip,grf = <0x2f>; - rockchip,boost = <0x89>; - #clock-cells = <0x01>; - #reset-cells = <0x01>; - assigned-clocks = <0x02 0x04>; - assigned-clock-rates = <0x3dfd2400>; - phandle = <0x02>; - }; - - cpu-boost@ff2b8000 { - compatible = "syscon"; - reg = <0x00 0xff2b8000 0x00 0x1000>; - rockchip,boost-low-con0 = <0x1032>; - rockchip,boost-low-con1 = <0x1441>; - rockchip,boost-high-con0 = <0x1036>; - rockchip,boost-high-con1 = <0x1441>; - rockchip,boost-backup-pll = <0x01>; - rockchip,boost-backup-pll-usage = <0x00>; - rockchip,boost-switch-threshold = <0x249f00>; - rockchip,boost-statis-threshold = <0x100>; - rockchip,boost-statis-enable = <0x00>; - rockchip,boost-enable = <0x00>; - phandle = <0x89>; - }; - - pmu-clock-controller@ff2bc000 { - compatible = "rockchip,px30-pmucru"; - reg = <0x00 0xff2bc000 0x00 0x1000>; - rockchip,grf = <0x2f>; - #clock-cells = <0x01>; - #reset-cells = <0x01>; - assigned-clocks = <0x2a 0x01 0x2a 0x08 0x2a 0x05 0x02 0x07 0x02 0xab 0x02 0xb0 0x02 0xf0 0x02 0xf5 0x02 0x140 0x02 0x49>; - assigned-clock-rates = <0x47868c00 0x5f5e100 0x18cba80 0x23c34600 0xbebc200 0xbebc200 0x8f0d180 0x8f0d180 0x5f5e100 0xbebc200>; - phandle = <0x2a>; - }; - - syscon@ff2c0000 { - compatible = "rockchip,px30-usb2phy-grf\0syscon\0simple-mfd"; - reg = <0x00 0xff2c0000 0x00 0x10000>; - #address-cells = <0x01>; - #size-cells = <0x01>; - phandle = <0x100>; - - usb2-phy@100 { - compatible = "rockchip,px30-usb2phy\0rockchip,rk3328-usb2phy"; - reg = <0x100 0x10>; - clocks = <0x2a 0x0a>; - clock-names = "phyclk"; - #clock-cells = <0x00>; - assigned-clocks = <0x02 0x0e 0x02 0x55>; - assigned-clock-parents = <0x67 0x02 0x0e>; - clock-output-names = "usb480m_phy"; - status = "okay"; - phandle = <0x67>; - - host-port { - #phy-cells = <0x00>; - interrupts = <0x00 0x44 0x04>; - interrupt-names = "linestate"; - status = "okay"; - phandle = <0x8c>; - }; - - otg-port { - #phy-cells = <0x00>; - interrupts = <0x00 0x42 0x04 0x00 0x41 0x04 0x00 0x40 0x04>; - interrupt-names = "otg-bvalid\0otg-id\0linestate"; - status = "disabled"; - phandle = <0x8b>; - }; - }; - }; - - video-phy@ff2e0000 { - compatible = "rockchip,px30-video-phy"; - reg = <0x00 0xff2e0000 0x00 0x10000 0x00 0xff450000 0x00 0x10000>; - clocks = <0x2a 0x0b 0x02 0x145 0x02 0x144>; - clock-names = "ref\0pclk_phy\0pclk_host"; - #clock-cells = <0x00>; - resets = <0x02 0x3e>; - reset-names = "rst"; - power-domains = <0x8a 0x0c>; - #phy-cells = <0x00>; - status = "okay"; - phandle = <0x4c>; - }; - - mipi-dphy-rx0@ff2f0000 { - compatible = "rockchip,rk3326-mipi-dphy"; - reg = <0x00 0xff2f0000 0x00 0x4000>; - clocks = <0x02 0x146>; - clock-names = "dphy-ref"; - power-domains = <0x8a 0x0d>; - rockchip,grf = <0x2f>; - status = "okay"; - phandle = <0x101>; - }; - - usb@ff300000 { - compatible = "rockchip,px30-usb\0rockchip,rk3066-usb\0snps,dwc2"; - reg = <0x00 0xff300000 0x00 0x40000>; - interrupts = <0x00 0x3e 0x04>; - clocks = <0x02 0x102>; - clock-names = "otg"; - power-domains = <0x8a 0x05>; - dr_mode = "otg"; - g-np-tx-fifo-size = <0x10>; - g-rx-fifo-size = <0x118>; - g-tx-fifo-size = <0x100 0x80 0x80 0x40 0x20 0x10>; - g-use-dma; - phys = <0x8b>; - phy-names = "usb2-phy"; - status = "okay"; - phandle = <0x102>; - }; - - usb@ff340000 { - compatible = "generic-ehci"; - reg = <0x00 0xff340000 0x00 0x10000>; - interrupts = <0x00 0x3c 0x04>; - clocks = <0x02 0x103 0x67>; - clock-names = "usbhost\0utmi"; - power-domains = <0x8a 0x05>; - phys = <0x8c>; - phy-names = "usb"; - status = "disabled"; - phandle = <0x103>; - }; - - usb@ff350000 { - compatible = "generic-ohci"; - reg = <0x00 0xff350000 0x00 0x10000>; - interrupts = <0x00 0x3d 0x04>; - clocks = <0x02 0x103 0x67>; - clock-names = "usbhost\0utmi"; - power-domains = <0x8a 0x05>; - phys = <0x8c>; - phy-names = "usb"; - status = "disabled"; - phandle = <0x104>; - }; - - ethernet@ff360000 { - compatible = "rockchip,px30-gmac"; - reg = <0x00 0xff360000 0x00 0x10000>; - rockchip,grf = <0x2f>; - interrupts = <0x00 0x2b 0x04>; - interrupt-names = "macirq"; - clocks = <0x02 0x3e 0x02 0x3f 0x02 0x3f 0x02 0x40 0x02 0x41 0x02 0xb2 0x02 0x143 0x02 0x4c>; - clock-names = "stmmaceth\0mac_clk_rx\0mac_clk_tx\0clk_mac_ref\0clk_mac_refout\0aclk_mac\0pclk_mac\0clk_mac_speed"; - phy-mode = "rmii"; - pinctrl-names = "default"; - pinctrl-0 = <0x8d 0x8e>; - resets = <0x02 0x5e>; - reset-names = "stmmaceth"; - power-domains = <0x8a 0x09>; - status = "disabled"; - phandle = <0x105>; - }; - - dwmmc@ff370000 { - compatible = "rockchip,px30-dw-mshc\0rockchip,rk3288-dw-mshc"; - reg = <0x00 0xff370000 0x00 0x4000>; - max-frequency = <0x8f0d180>; - clocks = <0x02 0xf7 0x02 0x3b 0x02 0x43 0x02 0x44>; - clock-names = "biu\0ciu\0ciu-drv\0ciu-sample"; - assigned-clocks = <0x02 0x3b>; - assigned-clock-parents = <0x02 0x57>; - power-domains = <0x8a 0x07>; - fifo-depth = <0x100>; - interrupts = <0x00 0x36 0x04>; - pinctrl-names = "default"; - pinctrl-0 = <0x8f 0x90 0x91 0x92>; - status = "okay"; - bus-width = <0x04>; - cap-mmc-highspeed; - cap-sd-highspeed; - supports-sd; - card-detect-delay = <0x320>; - ignore-pm-notify; - cd-gpios = <0x5c 0x03 0x01>; - sd-uhs-sdr12; - sd-uhs-sdr25; - sd-uhs-sdr50; - sd-uhs-sdr104; - vqmmc-supply = <0x4a>; - vmmc-supply = <0x93>; - phandle = <0x106>; - }; - - dwmmc@ff380000 { - compatible = "rockchip,px30-dw-mshc\0rockchip,rk3288-dw-mshc"; - reg = <0x00 0xff380000 0x00 0x4000>; - max-frequency = <0x8f0d180>; - clocks = <0x02 0xff 0x02 0x38 0x02 0x45 0x02 0x46>; - clock-names = "biu\0ciu\0ciu-drv\0ciu-sample"; - assigned-clocks = <0x02 0x38>; - assigned-clock-parents = <0x02 0x51>; - power-domains = <0x8a 0x0a>; - fifo-depth = <0x100>; - interrupts = <0x00 0x37 0x04>; - pinctrl-names = "default"; - pinctrl-0 = <0x94 0x95 0x96>; - status = "okay"; - bus-width = <0x04>; - cap-mmc-highspeed; - cap-sd-highspeed; - supports-sd; - card-detect-delay = <0x320>; - ignore-pm-notify; - cd-gpios = <0x97 0x0e 0x01>; - sd-uhs-sdr12; - sd-uhs-sdr25; - sd-uhs-sdr50; - sd-uhs-sdr104; - vqmmc-supply = <0x4a>; - vmmc-supply = <0x93>; - phandle = <0x107>; - }; - - dwmmc@ff390000 { - compatible = "rockchip,px30-dw-mshc\0rockchip,rk3288-dw-mshc"; - reg = <0x00 0xff390000 0x00 0x4000>; - max-frequency = <0x8f0d180>; - clocks = <0x02 0x100 0x02 0x39 0x02 0x47 0x02 0x48>; - clock-names = "biu\0ciu\0ciu-drv\0ciu-sample"; - assigned-clocks = <0x02 0x39>; - assigned-clock-parents = <0x02 0x53>; - power-domains = <0x8a 0x0a>; - fifo-depth = <0x100>; - interrupts = <0x00 0x35 0x04>; - status = "disabled"; - phandle = <0x108>; - }; - - nandc@ff3b0000 { - compatible = "rockchip,rk-nandc"; - reg = <0x00 0xff3b0000 0x00 0x4000>; - interrupts = <0x00 0x39 0x04>; - nandc_id = <0x00>; - clocks = <0x02 0x37 0x02 0xfe>; - clock-names = "clk_nandc\0hclk_nandc"; - assigned-clocks = <0x02 0x37>; - assigned-clock-parents = <0x02 0x4f>; - power-domains = <0x8a 0x0a>; - status = "disabled"; - phandle = <0x109>; - }; - - sfc@ff3a0000 { - compatible = "rockchip,sfc"; - reg = <0x00 0xff3a0000 0x00 0x4000>; - interrupts = <0x00 0x38 0x04>; - clocks = <0x02 0x3a 0x02 0x101>; - clock-names = "clk_sfc\0hclk_sfc"; - assigned-clocks = <0x02 0x3a>; - assigned-clock-rates = <0x989680>; - status = "disabled"; - phandle = <0x10a>; - }; - - gpu@ff400000 { - compatible = "arm,malit602\0arm,malit60x\0arm,malit6xx\0arm,mali-midgard"; - reg = <0x00 0xff400000 0x00 0x4000>; - interrupts = <0x00 0x2d 0x04 0x00 0x2e 0x04 0x00 0x2f 0x04>; - interrupt-names = "GPU\0MMU\0JOB"; - clocks = <0x02 0x49>; - clock-names = "clk_mali"; - power-domains = <0x8a 0x0e>; - #cooling-cells = <0x02>; - operating-points-v2 = <0x98>; - status = "okay"; - mali-supply = <0x0e>; - phandle = <0x85>; - - power_model { - compatible = "arm,mali-simple-power-model"; - static-coefficient = <0x64578>; - dynamic-coefficient = <0x2dd>; - ts = <0x7d00 0x125c 0xffffffb0 0x02>; - thermal-zone = "gpu-thermal"; - }; - }; - - gpu-opp-table { - compatible = "operating-points-v2"; - rockchip,thermal-zone = "soc-thermal"; - rockchip,temp-hysteresis = <0x1388>; - rockchip,low-temp = <0x00>; - rockchip,low-temp-min-volt = <0xf4240>; - rockchip,low-temp-adjust-volt = <0x00 0x1e0 0xc350>; - rockchip,max-volt = <0x11edd8>; - rockchip,evb-irdrop = <0x61a8>; - rockchip,pvtm-voltage-sel = <0x00 0xc350 0x00 0xc351 0xd2f0 0x01 0xd2f1 0xea60 0x02 0xea61 0x1869f 0x03>; - rockchip,pvtm-ch = <0x00 0x00>; - phandle = <0x98>; - - opp-400000000 { - opp-hz = <0x00 0x17d78400>; - opp-microvolt = <0x100590>; - opp-microvolt-L0 = <0x100590>; - opp-microvolt-L1 = <0xfa3e8>; - opp-microvolt-L2 = <0xee098>; - opp-microvolt-L3 = <0xe7ef0>; - }; - - opp-480000000 { - opp-hz = <0x00 0x1c9c3800>; - opp-microvolt = <0x112a88>; - opp-microvolt-L0 = <0x112a88>; - opp-microvolt-L1 = <0x10c8e0>; - opp-microvolt-L2 = <0x100590>; - opp-microvolt-L3 = <0xf4240>; - }; - - opp-520000000 { - opp-hz = <0x00 0x1efe9200>; - opp-microvolt = <0x118c30>; - opp-microvolt-L0 = <0x118c30>; - opp-microvolt-L1 = <0x118c30>; - opp-microvolt-L2 = <0x10c8e0>; - opp-microvolt-L3 = <0x100590>; - }; - }; - - hevc_service@ff440000 { - compatible = "rockchip,hevc_sub"; - iommu_enabled = <0x01>; - reg = <0x00 0xff440000 0x00 0x400>; - interrupts = <0x00 0x31 0x04>; - interrupt-names = "irq_dec"; - dev_mode = <0x01>; - iommus = <0x99>; - allocator = <0x01>; - phandle = <0x9c>; - }; - - vpu_service@ff442000 { - compatible = "rockchip,vpu_sub"; - iommu_enabled = <0x01>; - reg = <0x00 0xff442000 0x00 0x800>; - interrupts = <0x00 0x50 0x04 0x00 0x4f 0x04>; - interrupt-names = "irq_enc\0irq_dec"; - dev_mode = <0x00>; - iommus = <0x9a>; - allocator = <0x01>; - phandle = <0x9b>; - }; - - vpu_combo { - compatible = "rockchip,vpu_combo"; - subcnt = <0x02>; - rockchip,grf = <0x2f>; - rockchip,sub = <0x9b 0x9c>; - clocks = <0x02 0xaf 0x02 0xf4 0x02 0x4b>; - clock-names = "aclk_vcodec\0hclk_vcodec\0clk_core"; - resets = <0x02 0x24 0x02 0x26 0x02 0x25 0x02 0x27 0x02 0x3f>; - reset-names = "video_a\0video_h\0niu_a\0niu_h\0video_core"; - power-domains = <0x8a 0x0b>; - mode_bit = <0x0f>; - mode_ctrl = <0x410>; - status = "okay"; - phandle = <0x10b>; - }; - - iommu@ff440440 { - compatible = "rockchip,iommu"; - reg = <0x00 0xff440440 0x00 0x40 0x00 0xff440480 0x00 0x40>; - interrupts = <0x00 0x32 0x04>; - interrupt-names = "hevc_mmu"; - clocks = <0x02 0xaf 0x02 0xf4>; - clock-names = "aclk\0hclk"; - power-domains = <0x8a 0x0b>; - #iommu-cells = <0x00>; - phandle = <0x99>; - }; - - iommu@ff442800 { - compatible = "rockchip,iommu"; - reg = <0x00 0xff442800 0x00 0x100>; - interrupts = <0x00 0x51 0x04>; - interrupt-names = "vpu_mmu"; - clocks = <0x02 0xaf 0x02 0xf4>; - clock-names = "aclk\0hclk"; - power-domains = <0x8a 0x0b>; - #iommu-cells = <0x00>; - phandle = <0x9a>; - }; - - dsi@ff450000 { - compatible = "rockchip,px30-mipi-dsi"; - reg = <0x00 0xff450000 0x00 0x10000>; - interrupts = <0x00 0x4b 0x04>; - clocks = <0x02 0x144 0x4c>; - clock-names = "pclk\0hs_clk"; - resets = <0x02 0x3d>; - reset-names = "apb"; - phys = <0x4c>; - phy-names = "mipi_dphy"; - power-domains = <0x8a 0x0c>; - rockchip,grf = <0x2f>; - #address-cells = <0x01>; - #size-cells = <0x00>; - status = "okay"; - phandle = <0x10c>; - - ports { - #address-cells = <0x01>; - #size-cells = <0x00>; - - port@0 { - reg = <0x00>; - #address-cells = <0x01>; - #size-cells = <0x00>; - - endpoint@0 { - reg = <0x00>; - remote-endpoint = <0x13>; - status = "okay"; - phandle = <0xa3>; - }; - }; - }; - - panel@0 { - compatible = "elida,kd35t133\0simple-panel-dsi"; - reg = <0x00>; - backlight = <0x9d>; - backlight-supply = <0x9e>; - power-supply = <0x9f>; - reset-gpios = <0x97 0x10 0x01>; - prepare-delay-ms = <0x02>; - reset-delay-ms = <0x01>; - init-delay-ms = <0x14>; - enable-delay-ms = <0x78>; - disable-delay-ms = <0x32>; - unprepare-delay-ms = <0x14>; - width-mm = <0x34>; - height-mm = <0x46>; - dsi,flags = <0xa03>; - dsi,format = <0x00>; - dsi,lanes = <0x04>; - panel-init-sequence = <0x150002ff 0x30150002 0xff521500 0x2ff0115 0x2e300 0x15000240 0xa150002 0x3401500 0x2040015 0x20503 0x15000224 0x12150002 0x251e1500 0x2262815 0x22752 0x15000228 0x57150002 0x29011500 0x22adf15 0x2389c 0x15000239 0xa7150002 0x3a531500 0x2440015 0x2493c 0x15000259 0xfe150002 0x5c001500 0x2917715 0x29277 0x150002a0 0x55150002 0xa1501500 0x2a49c15 0x2a702 0x150002a8 0x1150002 0xa9011500 0x2aafc15 0x2ab28 0x150002ac 0x6150002 0xad061500 0x2ae0615 0x2af03 0x150002b0 0x8150002 0xb1261500 0x2b22815 0x2b328 0x150002b4 0x33150002 0xb5081500 0x2b62615 0x2b708 0x150002b8 0x26150002 0xff301500 0x2ff5215 0x2ff02 0x150002b0 0xb150002 0xb1161500 0x2b21715 0x2b32c 0x150002b4 0x32150002 0xb53b1500 0x2b62915 0x2b740 0x150002b8 0xd150002 0xb9051500 0x2ba1215 0x2bb10 0x150002bc 0x12150002 0xbd151500 0x2be1915 0x2bf0e 0x150002c0 0x16150002 0xc10a1500 0x2d00c15 0x2d117 0x150002d2 0x14150002 0xd32e1500 0x2d43215 0x2d53c 0x150002d6 0x22150002 0xd73d1500 0x2d80d15 0x2d907 0x150002da 0x13150002 0xdb131500 0x2dc1115 0x2dd15 0x150002de 0x19150002 0xdf101500 0x2e01715 0x2e10a 0x150002ff 0x30150002 0xff521500 0x2ff0315 0x2002a 0x15000201 0x2a150002 0x22a1500 0x2032a15 0x20461 0x15000205 0x80150002 0x6c71500 0x2070115 0x20882 0x15000209 0x83150002 0x302a1500 0x2312a15 0x2322a 0x15000233 0x2a150002 0x34611500 0x235c515 0x23680 0x15000237 0x23150002 0x40821500 0x2418315 0x24280 0x15000243 0x81150002 0x44111500 0x245e615 0x246e5 0x15000247 0x11150002 0x48e81500 0x249e715 0x25002 0x15000251 0x1150002 0x52041500 0x2530315 0x25411 0x15000255 0xea150002 0x56e91500 0x2571115 0x258ec 0x15000259 0xeb150002 0x7e021500 0x27f8015 0x2e05a 0x150002b1 0x150002 0xb40e1500 0x2b50f15 0x2b604 0x150002b7 0x7150002 0xb8061500 0x2b90515 0x2ba0f 0x150002c7 0x150002 0xca0e1500 0x2cb0f15 0x2cc04 0x150002cd 0x7150002 0xce061500 0x2cf0515 0x2d00f 0x15000281 0xf150002 0x840e1500 0x2850f15 0x28607 0x15000287 0x4150002 0x88051500 0x2890615 0x28a00 0x15000297 0xf150002 0x9a0e1500 0x29b0f15 0x29c07 0x1500029d 0x4150002 0x9e051500 0x29f0615 0x2a000 0x150002ff 0x30150002 0xff521500 0x2ff0215 0x20101 0x15000202 0xda150002 0x3ba1500 0x204a815 0x2059a 0x15000206 0x70150002 0x7ff1500 0x2089115 0x20990 0x1500020a 0xff150002 0xb8f1500 0x20c6015 0x20d58 0x1500020e 0x48150002 0xf381500 0x2102b15 0x2ff30 0x150002ff 0x52150002 0xff001500 0x2360215 0x23a70 0x5c80111 0x50a0129>; - panel-exit-sequence = <0x5140128 0x50a0110>; - - display-timings { - native-mode = <0xa0>; - - 60Hz { - clock-frequency = <0x192d500>; - hactive = <0x280>; - vactive = <0x1e0>; - hfront-porch = <0x77>; - hsync-len = <0x02>; - hback-porch = <0x77>; - vfront-porch = <0x0d>; - vsync-len = <0x02>; - vback-porch = <0x05>; - hsync-active = <0x00>; - vsync-active = <0x00>; - de-active = <0x00>; - pixelclk-active = <0x00>; - phandle = <0xa0>; - }; - - 50Hz { - clock-frequency = <0x192d500>; - hactive = <0x280>; - vactive = <0x1e0>; - hfront-porch = <0xcf>; - hsync-len = <0x02>; - hback-porch = <0xcf>; - vfront-porch = <0x0d>; - vsync-len = <0x02>; - vback-porch = <0x05>; - hsync-active = <0x00>; - vsync-active = <0x00>; - de-active = <0x00>; - pixelclk-active = <0x00>; - phandle = <0x10d>; - }; - - 75Hz { - clock-frequency = <0x192d500>; - hactive = <0x280>; - vactive = <0x1e0>; - hfront-porch = <0x1f>; - hsync-len = <0x02>; - hback-porch = <0x1f>; - vfront-porch = <0x0d>; - vsync-len = <0x02>; - vback-porch = <0x05>; - hsync-active = <0x00>; - vsync-active = <0x00>; - de-active = <0x00>; - pixelclk-active = <0x00>; - phandle = <0x10e>; - }; - }; - }; - }; - - vop@ff460000 { - compatible = "rockchip,px30-vop-big"; - reg = <0x00 0xff460000 0x00 0x1fc 0x00 0xff460a00 0x00 0x400>; - rockchip,grf = <0x2f>; - reg-names = "regs\0gamma_lut"; - interrupts = <0x00 0x4d 0x04>; - clocks = <0x02 0xb5 0x02 0x96 0x02 0xfb>; - clock-names = "aclk_vop\0dclk_vop\0hclk_vop"; - power-domains = <0x8a 0x0c>; - iommus = <0xa1>; - status = "okay"; - phandle = <0x10f>; - - port { - #address-cells = <0x01>; - #size-cells = <0x00>; - phandle = <0x10>; - - endpoint@0 { - reg = <0x00>; - remote-endpoint = <0xa2>; - phandle = <0x12>; - }; - - endpoint@1 { - reg = <0x01>; - remote-endpoint = <0xa3>; - phandle = <0x13>; - }; - - endpoint@2 { - reg = <0x02>; - remote-endpoint = <0xa4>; - phandle = <0x14>; - }; - }; - }; - - iommu@ff460f00 { - compatible = "rockchip,iommu"; - reg = <0x00 0xff460f00 0x00 0x100>; - interrupts = <0x00 0x4d 0x04>; - interrupt-names = "vopb_mmu"; - clocks = <0x02 0xb5 0x02 0xfb>; - clock-names = "aclk\0hclk"; - power-domains = <0x8a 0x0c>; - #iommu-cells = <0x00>; - status = "okay"; - phandle = <0xa1>; - }; - - rk_rga@ff480000 { - compatible = "rockchip,rga2"; - reg = <0x00 0xff480000 0x00 0x1000>; - interrupts = <0x00 0x4c 0x04>; - clocks = <0x02 0xb7 0x02 0xfd 0x02 0x35>; - clock-names = "aclk_rga\0hclk_rga\0clk_rga"; - power-domains = <0x8a 0x0c>; - dma-coherent; - status = "okay"; - phandle = <0x110>; - }; - - cif@ff490000 { - compatible = "rockchip,cif"; - reg = <0x00 0xff490000 0x00 0x200>; - interrupts = <0x00 0x45 0x04>; - clocks = <0x02 0xb3 0x02 0xf9 0x02 0x160 0x02 0x34>; - clock-names = "aclk_cif0\0hclk_cif0\0pclk_cif\0cif0_out"; - resets = <0x02 0x2c 0x02 0x2d 0x02 0x2e>; - reset-names = "rst_cif_a\0rst_cif_h\0rst_cif_pclkin"; - power-domains = <0x8a 0x0d>; - pinctrl-names = "cif_pin_all"; - pinctrl-0 = <0xa5>; - iommus = <0xa6>; - status = "disabled"; - phandle = <0x111>; - }; - - cif-new@ff490000 { - compatible = "rockchip,px30-cif"; - reg = <0x00 0xff490000 0x00 0x200>; - interrupts = <0x00 0x45 0x04>; - clocks = <0x02 0xb3 0x02 0xf9 0x02 0x160 0x02 0x34>; - clock-names = "aclk_cif\0hclk_cif\0pclk_cif\0cif_out"; - resets = <0x02 0x2c 0x02 0x2d 0x02 0x2e>; - reset-names = "rst_cif_a\0rst_cif_h\0rst_cif_pclkin"; - power-domains = <0x8a 0x0d>; - iommus = <0xa6>; - status = "disabled"; - phandle = <0x112>; - }; - - iommu@ff490800 { - compatible = "rockchip,iommu"; - reg = <0x00 0xff490800 0x00 0x100>; - interrupts = <0x00 0x45 0x04>; - interrupt-names = "vip_mmu"; - clocks = <0x02 0xb3 0x02 0xf9>; - clock-names = "aclk\0hclk"; - power-domains = <0x8a 0x0d>; - rk_iommu,disable_reset_quirk; - #iommu-cells = <0x00>; - status = "okay"; - phandle = <0xa6>; - }; - - rk_isp@ff4a0000 { - compatible = "rockchip,px30-isp\0rockchip,isp"; - reg = <0x00 0xff4a0000 0x00 0x8000>; - interrupts = <0x00 0x46 0x04>; - clocks = <0x02 0xb4 0x02 0xfa 0x02 0x33 0x02 0x33 0x02 0x15f 0x02 0x34 0x02 0x34 0x02 0x146>; - clock-names = "aclk_isp\0hclk_isp\0clk_isp\0clk_isp_jpe\0pclkin_isp\0clk_cif_pll\0clk_cif_out\0pclk_dphyrx"; - resets = <0x02 0x2b 0x02 0x2f>; - reset-names = "rst_isp\0rst_mipicsiphy"; - power-domains = <0x8a 0x0d>; - pinctrl-names = "default\0isp_dvp8bit2\0isp_dvp10bit\0isp_dvp12bit"; - pinctrl-0 = <0xa7>; - pinctrl-1 = <0xa5>; - pinctrl-2 = <0xa5 0xa8>; - pinctrl-3 = <0xa9 0xa5 0xa8>; - rockchip,isp,mipiphy = <0x01>; - rockchip,isp,csiphy,reg = <0xff2f0000 0x4000>; - rockchip,grf = <0x2f>; - rockchip,cru = <0x02>; - rockchip,isp,iommu-enable = <0x01>; - iommus = <0xaa>; - status = "disabled"; - phandle = <0x113>; - }; - - rkisp1@ff4a0000 { - compatible = "rockchip,rk3326-rkisp1"; - reg = <0x00 0xff4a0000 0x00 0x8000>; - interrupts = <0x00 0x46 0x04 0x00 0x49 0x04 0x00 0x4a 0x04>; - interrupt-names = "isp_irq\0mi_irq\0mipi_irq"; - clocks = <0x02 0xb4 0x02 0xfa 0x02 0x33 0x02 0x15f>; - clock-names = "aclk_isp\0hclk_isp\0clk_isp\0pclk_isp"; - devfreq = <0xab>; - power-domains = <0x8a 0x0d>; - iommus = <0xaa>; - rockchip,grf = <0x2f>; - status = "okay"; - phandle = <0x114>; - }; - - iommu@ff4a8000 { - compatible = "rockchip,iommu"; - reg = <0x00 0xff4a8000 0x00 0x100>; - interrupts = <0x00 0x46 0x04>; - interrupt-names = "isp_mmu"; - clocks = <0x02 0xb4 0x02 0xfa>; - clock-names = "aclk\0hclk"; - power-domains = <0x8a 0x0d>; - rk_iommu,disable_reset_quirk; - #iommu-cells = <0x00>; - status = "okay"; - phandle = <0xaa>; - }; - - qos@ff518000 { - compatible = "syscon"; - reg = <0x00 0xff518000 0x00 0x20>; - phandle = <0x18>; - }; - - qos@ff520000 { - compatible = "syscon"; - reg = <0x00 0xff520000 0x00 0x20>; - phandle = <0x28>; - }; - - qos@ff52c000 { - compatible = "syscon"; - reg = <0x00 0xff52c000 0x00 0x20>; - phandle = <0x17>; - }; - - qos@ff538000 { - compatible = "syscon"; - reg = <0x00 0xff538000 0x00 0x20>; - phandle = <0x19>; - }; - - qos@ff538080 { - compatible = "syscon"; - reg = <0x00 0xff538080 0x00 0x20>; - phandle = <0x1a>; - }; - - qos@ff538100 { - compatible = "syscon"; - reg = <0x00 0xff538100 0x00 0x20>; - phandle = <0x1b>; - }; - - qos@ff538180 { - compatible = "syscon"; - reg = <0x00 0xff538180 0x00 0x20>; - phandle = <0x1c>; - }; - - qos@ff540000 { - compatible = "syscon"; - reg = <0x00 0xff540000 0x00 0x20>; - phandle = <0x15>; - }; - - qos@ff540080 { - compatible = "syscon"; - reg = <0x00 0xff540080 0x00 0x20>; - phandle = <0x16>; - }; - - qos@ff548000 { - compatible = "syscon"; - reg = <0x00 0xff548000 0x00 0x20>; - phandle = <0x23>; - }; - - qos@ff548080 { - compatible = "syscon"; - reg = <0x00 0xff548080 0x00 0x20>; - phandle = <0x24>; - }; - - qos@ff548100 { - compatible = "syscon"; - reg = <0x00 0xff548100 0x00 0x20>; - phandle = <0x25>; - }; - - qos@ff548180 { - compatible = "syscon"; - reg = <0x00 0xff548180 0x00 0x20>; - phandle = <0x26>; - }; - - qos@ff548200 { - compatible = "syscon"; - reg = <0x00 0xff548200 0x00 0x20>; - phandle = <0x27>; - }; - - qos@ff550000 { - compatible = "syscon"; - reg = <0x00 0xff550000 0x00 0x20>; - phandle = <0x1f>; - }; - - qos@ff550080 { - compatible = "syscon"; - reg = <0x00 0xff550080 0x00 0x20>; - phandle = <0x20>; - }; - - qos@ff550100 { - compatible = "syscon"; - reg = <0x00 0xff550100 0x00 0x20>; - phandle = <0x21>; - }; - - qos@ff550180 { - compatible = "syscon"; - reg = <0x00 0xff550180 0x00 0x20>; - phandle = <0x22>; - }; - - qos@ff558000 { - compatible = "syscon"; - reg = <0x00 0xff558000 0x00 0x20>; - phandle = <0x1d>; - }; - - qos@ff558080 { - compatible = "syscon"; - reg = <0x00 0xff558080 0x00 0x20>; - phandle = <0x1e>; - }; - - dfi@ff610000 { - reg = <0x00 0xff610000 0x00 0x400>; - compatible = "rockchip,px30-dfi"; - rockchip,pmugrf = <0xac>; - status = "okay"; - phandle = <0xad>; - }; - - dmc { - compatible = "rockchip,px30-dmc"; - interrupts = <0x00 0x69 0x04>; - interrupt-names = "complete_irq"; - devfreq-events = <0xad>; - clocks = <0x02 0x54>; - clock-names = "dmc_clk"; - operating-points-v2 = <0xae>; - ddr_timing = <0xaf>; - upthreshold = <0x28>; - downdifferential = <0x14>; - system-status-freq = <0x01 0x80e80 0x08 0x6ddd0 0x02 0x2f5d0 0x20 0x6ddd0 0x1000 0x80e80 0x4000 0xa2990 0x2000 0xa2990>; - auto-min-freq = <0x50140>; - auto-freq-en = <0x01>; - #cooling-cells = <0x02>; - status = "okay"; - center-supply = <0x0e>; - phandle = <0xab>; - - ddr_power_model { - compatible = "ddr_power_model"; - dynamic-power-coefficient = <0x78>; - static-power-coefficient = <0xc8>; - ts = <0x7d00 0x125c 0xffffffb0 0x02>; - thermal-zone = "soc-thermal"; - phandle = <0x115>; - }; - }; - - dmc-opp-table { - compatible = "operating-points-v2"; - rockchip,max-volt = <0x118c30>; - rockchip,evb-irdrop = <0x61a8>; - rockchip,pvtm-voltage-sel = <0x00 0xc350 0x00 0xc351 0xd2f0 0x01 0xd2f1 0xea60 0x02 0xea61 0x1869f 0x03>; - rockchip,pvtm-ch = <0x00 0x00>; - phandle = <0xae>; - - opp-528000000 { - opp-hz = <0x00 0x1f78a400>; - opp-microvolt = <0xee098>; - opp-microvolt-L0 = <0xee098>; - opp-microvolt-L1 = <0xee098>; - opp-microvolt-L2 = <0xe7ef0>; - opp-microvolt-L3 = <0xe7ef0>; - }; - - opp-666000000 { - opp-hz = <0x00 0x27b25a80>; - opp-microvolt = <0x100590>; - opp-microvolt-L0 = <0x100590>; - opp-microvolt-L1 = <0xf4240>; - opp-microvolt-L2 = <0xee098>; - opp-microvolt-L3 = <0xe7ef0>; - }; - - opp-786000000 { - opp-hz = <0x00 0x2ed96880>; - opp-microvolt = <0x10c8e0>; - opp-microvolt-L0 = <0x10c8e0>; - opp-microvolt-L1 = <0x100590>; - opp-microvolt-L2 = <0xfa3e8>; - opp-microvolt-L3 = <0xf4240>; - status = "okay"; - }; - }; - - rockchip-system-monitor { - compatible = "rockchip,system-monitor"; - rockchip,thermal-zone = "soc-thermal"; - rockchip,polling-delay = <0xc8>; - phandle = <0x116>; - }; - - pinctrl { - compatible = "rockchip,px30-pinctrl"; - rockchip,grf = <0x2f>; - rockchip,pmu = <0xac>; - #address-cells = <0x02>; - #size-cells = <0x02>; - ranges; - phandle = <0x117>; - - gpio0@ff040000 { - compatible = "rockchip,gpio-bank"; - reg = <0x00 0xff040000 0x00 0x100>; - interrupts = <0x00 0x03 0x04>; - clocks = <0x2a 0x14>; - gpio-controller; - #gpio-cells = <0x02>; - interrupt-controller; - #interrupt-cells = <0x02>; - phandle = <0x5c>; - }; - - gpio1@ff250000 { - compatible = "rockchip,gpio-bank"; - reg = <0x00 0xff250000 0x00 0x100>; - interrupts = <0x00 0x04 0x04>; - clocks = <0x02 0x15c>; - gpio-controller; - #gpio-cells = <0x02>; - interrupt-controller; - #interrupt-cells = <0x02>; - phandle = <0xbf>; - }; - - gpio2@ff260000 { - compatible = "rockchip,gpio-bank"; - reg = <0x00 0xff260000 0x00 0x100>; - interrupts = <0x00 0x05 0x04>; - clocks = <0x02 0x15d>; - gpio-controller; - #gpio-cells = <0x02>; - interrupt-controller; - #interrupt-cells = <0x02>; - phandle = <0x66>; - }; - - gpio3@ff270000 { - compatible = "rockchip,gpio-bank"; - reg = <0x00 0xff270000 0x00 0x100>; - interrupts = <0x00 0x06 0x04>; - clocks = <0x02 0x15e>; - gpio-controller; - #gpio-cells = <0x02>; - interrupt-controller; - #interrupt-cells = <0x02>; - phandle = <0x97>; - }; - - pcfg-pull-up { - bias-pull-up; - phandle = <0xb2>; - }; - - pcfg-pull-down { - bias-pull-down; - phandle = <0x118>; - }; - - pcfg-pull-none { - bias-disable; - phandle = <0xb1>; - }; - - pcfg-pull-none-2ma { - bias-disable; - drive-strength = <0x02>; - phandle = <0x119>; - }; - - pcfg-pull-up-2ma { - bias-pull-up; - drive-strength = <0x02>; - phandle = <0x11a>; - }; - - pcfg-pull-up-4ma { - bias-pull-up; - drive-strength = <0x04>; - phandle = <0xb3>; - }; - - pcfg-pull-none-4ma { - bias-disable; - drive-strength = <0x04>; - phandle = <0x11b>; - }; - - pcfg-pull-down-4ma { - bias-pull-down; - drive-strength = <0x04>; - phandle = <0x11c>; - }; - - pcfg-pull-none-8ma { - bias-disable; - drive-strength = <0x08>; - phandle = <0xb6>; - }; - - pcfg-pull-up-8ma { - bias-pull-up; - drive-strength = <0x08>; - phandle = <0xb4>; - }; - - pcfg-pull-none-12ma { - bias-disable; - drive-strength = <0x0c>; - phandle = <0xb8>; - }; - - pcfg-pull-up-12ma { - bias-pull-up; - drive-strength = <0x0c>; - phandle = <0xb7>; - }; - - pcfg-pull-none-smt { - bias-disable; - input-schmitt-enable; - phandle = <0xb0>; - }; - - pcfg-output-high { - output-high; - phandle = <0x11d>; - }; - - pcfg-output-low { - output-low; - phandle = <0xb9>; - }; - - pcfg-input-high { - bias-pull-up; - input-enable; - phandle = <0xb5>; - }; - - pcfg-input { - input-enable; - phandle = <0x11e>; - }; - - i2c0 { - - i2c0-xfer { - rockchip,pins = <0x00 0x08 0x01 0xb0 0x00 0x09 0x01 0xb0>; - phandle = <0x5b>; - }; - }; - - i2c1 { - - i2c1-xfer { - rockchip,pins = <0x00 0x12 0x01 0xb0 0x00 0x13 0x01 0xb0>; - phandle = <0x69>; - }; - }; - - i2c2 { - - i2c2-xfer { - rockchip,pins = <0x02 0x0f 0x02 0xb0 0x02 0x10 0x02 0xb0>; - phandle = <0x6a>; - }; - }; - - i2c3 { - - i2c3-xfer { - rockchip,pins = <0x01 0x0c 0x04 0xb0 0x01 0x0d 0x04 0xb0>; - phandle = <0x6b>; - }; - }; - - tsadc { - - tsadc-otp-gpio { - rockchip,pins = <0x00 0x06 0x00 0xb1>; - phandle = <0x86>; - }; - - tsadc-otp-out { - rockchip,pins = <0x00 0x06 0x01 0xb1>; - phandle = <0x87>; - }; - }; - - uart0 { - - uart0-xfer { - rockchip,pins = <0x00 0x0a 0x01 0xb2 0x00 0x0b 0x01 0xb2>; - phandle = <0x2c>; - }; - - uart0-cts { - rockchip,pins = <0x00 0x0c 0x01 0xb1>; - phandle = <0x2d>; - }; - - uart0-rts { - rockchip,pins = <0x00 0x0d 0x01 0xb1>; - phandle = <0x2e>; - }; - - uart0-rts-gpio { - rockchip,pins = <0x00 0x0d 0x00 0xb1>; - phandle = <0x11f>; - }; - }; - - uart1 { - - uart1-xfer { - rockchip,pins = <0x01 0x11 0x01 0xb2 0x01 0x10 0x01 0xb2>; - phandle = <0x4f>; - }; - - uart1-cts { - rockchip,pins = <0x01 0x12 0x01 0xb1>; - phandle = <0x50>; - }; - - uart1-rts { - rockchip,pins = <0x01 0x13 0x01 0xb1>; - phandle = <0x120>; - }; - - uart1-rts-gpio { - rockchip,pins = <0x01 0x13 0x00 0xb1>; - phandle = <0x121>; - }; - }; - - uart2-m0 { - - uart2m0-xfer { - rockchip,pins = <0x01 0x1a 0x02 0xb2 0x01 0x1b 0x02 0xb2>; - phandle = <0x51>; - }; - }; - - uart2-m1 { - - uart2m1-xfer { - rockchip,pins = <0x02 0x0c 0x02 0xb2 0x02 0x0e 0x02 0xb2>; - phandle = <0xba>; - }; - }; - - uart3-m0 { - - uart3m0-xfer { - rockchip,pins = <0x00 0x10 0x02 0xb2 0x00 0x11 0x02 0xb2>; - phandle = <0x122>; - }; - - uart3m0-cts { - rockchip,pins = <0x00 0x12 0x02 0xb1>; - phandle = <0x123>; - }; - - uart3m0-rts { - rockchip,pins = <0x00 0x13 0x02 0xb1>; - phandle = <0x124>; - }; - - uart3m0-rts-gpio { - rockchip,pins = <0x00 0x13 0x00 0xb1>; - phandle = <0x125>; - }; - }; - - uart3-m1 { - - uart3m1-xfer { - rockchip,pins = <0x01 0x0e 0x02 0xb2 0x01 0x0f 0x02 0xb2>; - phandle = <0x52>; - }; - - uart3m1-cts { - rockchip,pins = <0x01 0x0c 0x02 0xb1>; - phandle = <0x53>; - }; - - uart3m1-rts { - rockchip,pins = <0x01 0x0d 0x02 0xb1>; - phandle = <0x54>; - }; - - uart3m1-rts-gpio { - rockchip,pins = <0x01 0x0d 0x00 0xb1>; - phandle = <0x126>; - }; - }; - - uart4 { - - uart4-xfer { - rockchip,pins = <0x01 0x1c 0x02 0xb2 0x01 0x1d 0x02 0xb2>; - phandle = <0x55>; - }; - - uart4-cts { - rockchip,pins = <0x01 0x1e 0x02 0xb1>; - phandle = <0x56>; - }; - - uart4-rts { - rockchip,pins = <0x01 0x1f 0x02 0xb1>; - phandle = <0x57>; - }; - }; - - uart5 { - - uart5-xfer { - rockchip,pins = <0x03 0x02 0x04 0xb2 0x03 0x01 0x04 0xb2>; - phandle = <0x58>; - }; - - uart5-cts { - rockchip,pins = <0x03 0x03 0x04 0xb1>; - phandle = <0x59>; - }; - - uart5-rts { - rockchip,pins = <0x03 0x05 0x04 0xb1>; - phandle = <0x5a>; - }; - }; - - spi0 { - - spi0-clk { - rockchip,pins = <0x01 0x0f 0x03 0xb3>; - phandle = <0x6c>; - }; - - spi0-csn { - rockchip,pins = <0x01 0x0e 0x03 0xb3>; - phandle = <0x6d>; - }; - - spi0-miso { - rockchip,pins = <0x01 0x0d 0x03 0xb3>; - phandle = <0x6e>; - }; - - spi0-mosi { - rockchip,pins = <0x01 0x0c 0x03 0xb3>; - phandle = <0x6f>; - }; - - spi0-clk-hs { - rockchip,pins = <0x01 0x0f 0x03 0xb4>; - phandle = <0x70>; - }; - - spi0-miso-hs { - rockchip,pins = <0x01 0x0d 0x03 0xb4>; - phandle = <0x71>; - }; - - spi0-mosi-hs { - rockchip,pins = <0x01 0x0c 0x03 0xb4>; - phandle = <0x72>; - }; - }; - - spi1 { - - spi1-clk { - rockchip,pins = <0x03 0x0f 0x04 0xb3>; - phandle = <0x73>; - }; - - spi1-csn0 { - rockchip,pins = <0x03 0x09 0x04 0xb3>; - phandle = <0x74>; - }; - - spi1-csn1 { - rockchip,pins = <0x03 0x0a 0x02 0xb3>; - phandle = <0x75>; - }; - - spi1-miso { - rockchip,pins = <0x03 0x0e 0x04 0xb3>; - phandle = <0x76>; - }; - - spi1-mosi { - rockchip,pins = <0x03 0x0c 0x04 0xb3>; - phandle = <0x77>; - }; - - spi1-clk-hs { - rockchip,pins = <0x03 0x0f 0x04 0xb4>; - phandle = <0x78>; - }; - - spi1-miso-hs { - rockchip,pins = <0x03 0x0e 0x04 0xb4>; - phandle = <0x79>; - }; - - spi1-mosi-hs { - rockchip,pins = <0x03 0x0c 0x04 0xb4>; - phandle = <0x7a>; - }; - }; - - pdm { - - pdm-clk0m0 { - rockchip,pins = <0x03 0x16 0x02 0xb1>; - phandle = <0x44>; - }; - - pdm-clk0m1 { - rockchip,pins = <0x02 0x16 0x01 0xb1>; - phandle = <0x127>; - }; - - pdm-clk1 { - rockchip,pins = <0x03 0x17 0x02 0xb1>; - phandle = <0x45>; - }; - - pdm-sdi0m0 { - rockchip,pins = <0x03 0x1b 0x02 0xb1>; - phandle = <0x46>; - }; - - pdm-sdi0m1 { - rockchip,pins = <0x02 0x15 0x02 0xb1>; - phandle = <0x128>; - }; - - pdm-sdi1 { - rockchip,pins = <0x03 0x18 0x02 0xb1>; - phandle = <0x47>; - }; - - pdm-sdi2 { - rockchip,pins = <0x03 0x19 0x02 0xb1>; - phandle = <0x48>; - }; - - pdm-sdi3 { - rockchip,pins = <0x03 0x1a 0x02 0xb1>; - phandle = <0x49>; - }; - - pdm-clk0m0-sleep { - rockchip,pins = <0x03 0x16 0x00 0xb5>; - phandle = <0x129>; - }; - - pdm-clk0m1-sleep { - rockchip,pins = <0x02 0x16 0x00 0xb5>; - phandle = <0x12a>; - }; - - pdm-clk1-sleep { - rockchip,pins = <0x03 0x17 0x00 0xb5>; - phandle = <0x12b>; - }; - - pdm-sdi0m0-sleep { - rockchip,pins = <0x03 0x1b 0x00 0xb5>; - phandle = <0x12c>; - }; - - pdm-sdi0m1-sleep { - rockchip,pins = <0x02 0x15 0x00 0xb5>; - phandle = <0x12d>; - }; - - pdm-sdi1-sleep { - rockchip,pins = <0x03 0x18 0x00 0xb5>; - phandle = <0x12e>; - }; - - pdm-sdi2-sleep { - rockchip,pins = <0x03 0x19 0x00 0xb5>; - phandle = <0x12f>; - }; - - pdm-sdi3-sleep { - rockchip,pins = <0x03 0x1a 0x00 0xb5>; - phandle = <0x130>; - }; - }; - - i2s0 { - - i2s0-8ch-mclk { - rockchip,pins = <0x03 0x11 0x02 0xb1>; - phandle = <0x131>; - }; - - i2s0-8ch-sclktx { - rockchip,pins = <0x03 0x13 0x02 0xb1>; - phandle = <0x30>; - }; - - i2s0-8ch-sclkrx { - rockchip,pins = <0x03 0x0c 0x02 0xb1>; - phandle = <0x31>; - }; - - i2s0-8ch-lrcktx { - rockchip,pins = <0x03 0x12 0x02 0xb1>; - phandle = <0x32>; - }; - - i2s0-8ch-lrckrx { - rockchip,pins = <0x03 0x0d 0x02 0xb1>; - phandle = <0x33>; - }; - - i2s0-8ch-sdo0 { - rockchip,pins = <0x03 0x14 0x02 0xb1>; - phandle = <0x38>; - }; - - i2s0-8ch-sdo1 { - rockchip,pins = <0x03 0x10 0x02 0xb1>; - phandle = <0x39>; - }; - - i2s0-8ch-sdo2 { - rockchip,pins = <0x03 0x0f 0x02 0xb1>; - phandle = <0x3a>; - }; - - i2s0-8ch-sdo3 { - rockchip,pins = <0x03 0x0e 0x02 0xb1>; - phandle = <0x3b>; - }; - - i2s0-8ch-sdi0 { - rockchip,pins = <0x03 0x15 0x02 0xb1>; - phandle = <0x34>; - }; - - i2s0-8ch-sdi1 { - rockchip,pins = <0x03 0x0b 0x02 0xb1>; - phandle = <0x35>; - }; - - i2s0-8ch-sdi2 { - rockchip,pins = <0x03 0x09 0x02 0xb1>; - phandle = <0x36>; - }; - - i2s0-8ch-sdi3 { - rockchip,pins = <0x03 0x08 0x02 0xb1>; - phandle = <0x37>; - }; - }; - - i2s1 { - - i2s1-2ch-mclk { - rockchip,pins = <0x02 0x13 0x01 0xb1>; - phandle = <0x68>; - }; - - i2s1-2ch-sclk { - rockchip,pins = <0x02 0x12 0x01 0xb1>; - phandle = <0x3c>; - }; - - i2s1-2ch-lrck { - rockchip,pins = <0x02 0x11 0x01 0xb1>; - phandle = <0x3d>; - }; - - i2s1-2ch-sdi { - rockchip,pins = <0x02 0x15 0x01 0xb1>; - phandle = <0x3e>; - }; - - i2s1-2ch-sdo { - rockchip,pins = <0x02 0x14 0x01 0xb1>; - phandle = <0x3f>; - }; - }; - - i2s2 { - - i2s2-2ch-mclk { - rockchip,pins = <0x03 0x01 0x02 0xb1>; - phandle = <0x132>; - }; - - i2s2-2ch-sclk { - rockchip,pins = <0x03 0x02 0x02 0xb1>; - phandle = <0x40>; - }; - - i2s2-2ch-lrck { - rockchip,pins = <0x03 0x03 0x02 0xb1>; - phandle = <0x41>; - }; - - i2s2-2ch-sdi { - rockchip,pins = <0x03 0x05 0x02 0xb1>; - phandle = <0x42>; - }; - - i2s2-2ch-sdo { - rockchip,pins = <0x03 0x07 0x02 0xb1>; - phandle = <0x43>; - }; - }; - - sdmmc { - - sdmmc-clk { - rockchip,pins = <0x01 0x1e 0x01 0xb6>; - phandle = <0x8f>; - }; - - sdmmc-cmd { - rockchip,pins = <0x01 0x1f 0x01 0xb4>; - phandle = <0x90>; - }; - - sdmmc-det { - rockchip,pins = <0x00 0x03 0x01 0xb4>; - phandle = <0x91>; - }; - - sdmmc-bus1 { - rockchip,pins = <0x01 0x1a 0x01 0xb4>; - phandle = <0x133>; - }; - - sdmmc-bus4 { - rockchip,pins = <0x01 0x1a 0x01 0xb4 0x01 0x1b 0x01 0xb4 0x01 0x1c 0x01 0xb4 0x01 0x1d 0x01 0xb4>; - phandle = <0x92>; - }; - - sdmmc-gpio { - rockchip,pins = <0x01 0x1a 0x00 0xb3 0x01 0x1b 0x00 0xb3 0x01 0x1c 0x00 0xb3 0x01 0x1d 0x00 0xb3 0x01 0x1e 0x00 0xb3 0x01 0x1f 0x00 0xb3>; - phandle = <0x134>; - }; - }; - - sdio { - - sdio-clk { - rockchip,pins = <0x01 0x15 0x01 0xb1>; - phandle = <0x96>; - }; - - sdio-cmd { - rockchip,pins = <0x01 0x14 0x01 0xb2>; - phandle = <0x95>; - }; - - sdio-bus4 { - rockchip,pins = <0x01 0x16 0x01 0xb2 0x01 0x17 0x01 0xb2 0x01 0x18 0x01 0xb2 0x01 0x19 0x01 0xb2>; - phandle = <0x94>; - }; - - sdio-gpio { - rockchip,pins = <0x01 0x16 0x00 0xb2 0x01 0x17 0x00 0xb2 0x01 0x18 0x00 0xb2 0x01 0x19 0x00 0xb2 0x01 0x14 0x00 0xb2 0x01 0x15 0x00 0xb2>; - phandle = <0x135>; - }; - }; - - emmc { - - emmc-clk { - rockchip,pins = <0x01 0x09 0x02 0xb6>; - phandle = <0x136>; - }; - - emmc-cmd { - rockchip,pins = <0x01 0x0a 0x02 0xb4>; - phandle = <0x137>; - }; - - emmc-pwren { - rockchip,pins = <0x01 0x08 0x02 0xb1>; - phandle = <0x138>; - }; - - emmc-rstnout { - rockchip,pins = <0x01 0x0b 0x02 0xb1>; - phandle = <0x139>; - }; - - emmc-bus1 { - rockchip,pins = <0x01 0x00 0x02 0xb4>; - phandle = <0x13a>; - }; - - emmc-bus4 { - rockchip,pins = <0x01 0x00 0x02 0xb4 0x01 0x01 0x02 0xb4 0x01 0x02 0x02 0xb4 0x01 0x03 0x02 0xb4>; - phandle = <0x13b>; - }; - - emmc-bus8 { - rockchip,pins = <0x01 0x00 0x02 0xb4 0x01 0x01 0x02 0xb4 0x01 0x02 0x02 0xb4 0x01 0x03 0x02 0xb4 0x01 0x04 0x02 0xb4 0x01 0x05 0x02 0xb4 0x01 0x06 0x02 0xb4 0x01 0x07 0x02 0xb4>; - phandle = <0x13c>; - }; - }; - - flash { - - flash-cs0 { - rockchip,pins = <0x01 0x08 0x01 0xb1>; - phandle = <0x13d>; - }; - - flash-rdy { - rockchip,pins = <0x01 0x09 0x01 0xb1>; - phandle = <0x13e>; - }; - - flash-dqs { - rockchip,pins = <0x01 0x0a 0x01 0xb1>; - phandle = <0x13f>; - }; - - flash-ale { - rockchip,pins = <0x01 0x0b 0x01 0xb1>; - phandle = <0x140>; - }; - - flash-cle { - rockchip,pins = <0x01 0x0c 0x01 0xb1>; - phandle = <0x141>; - }; - - flash-wrn { - rockchip,pins = <0x01 0x0d 0x01 0xb1>; - phandle = <0x142>; - }; - - flash-csl { - rockchip,pins = <0x01 0x0e 0x01 0xb1>; - phandle = <0x143>; - }; - - flash-rdn { - rockchip,pins = <0x01 0x0f 0x01 0xb1>; - phandle = <0x144>; - }; - - flash-bus8 { - rockchip,pins = <0x01 0x00 0x01 0xb7 0x01 0x01 0x01 0xb7 0x01 0x02 0x01 0xb7 0x01 0x03 0x01 0xb7 0x01 0x04 0x01 0xb7 0x01 0x05 0x01 0xb7 0x01 0x06 0x01 0xb7 0x01 0x07 0x01 0xb7>; - phandle = <0x145>; - }; - }; - - lcdc { - - lcdc-m0-rgb-pins { - rockchip,pins = <0x03 0x00 0x01 0xb6 0x03 0x01 0x01 0xb6 0x03 0x02 0x01 0xb6 0x03 0x03 0x01 0xb6 0x03 0x04 0x01 0xb6 0x03 0x05 0x01 0xb6 0x03 0x06 0x01 0xb6 0x03 0x07 0x01 0xb6 0x03 0x08 0x01 0xb6 0x03 0x09 0x01 0xb6 0x03 0x0a 0x01 0xb6 0x03 0x0b 0x01 0xb6 0x03 0x0c 0x01 0xb6 0x03 0x0d 0x01 0xb6 0x03 0x0e 0x01 0xb6 0x03 0x0f 0x01 0xb6 0x03 0x10 0x01 0xb6 0x03 0x11 0x01 0xb6 0x03 0x12 0x01 0xb6 0x03 0x13 0x01 0xb6 0x03 0x14 0x01 0xb6 0x03 0x15 0x01 0xb6 0x03 0x16 0x01 0xb6 0x03 0x17 0x01 0xb6 0x03 0x18 0x01 0xb6 0x03 0x19 0x01 0xb6 0x03 0x1a 0x01 0xb6 0x03 0x1b 0x01 0xb6>; - phandle = <0x146>; - }; - - lcdc-m0-sleep-pins { - rockchip,pins = <0x03 0x00 0x00 0xb1 0x03 0x01 0x00 0xb1 0x03 0x02 0x00 0xb1 0x03 0x03 0x00 0xb1 0x03 0x04 0x00 0xb1 0x03 0x05 0x00 0xb1 0x03 0x06 0x00 0xb1 0x03 0x07 0x00 0xb1 0x03 0x08 0x00 0xb1 0x03 0x09 0x00 0xb1 0x03 0x0a 0x00 0xb1 0x03 0x0b 0x00 0xb1 0x03 0x0c 0x00 0xb1 0x03 0x0d 0x00 0xb1 0x03 0x0e 0x00 0xb1 0x03 0x0f 0x00 0xb1 0x03 0x10 0x00 0xb1 0x03 0x11 0x00 0xb1 0x03 0x12 0x00 0xb1 0x03 0x13 0x00 0xb1 0x03 0x14 0x00 0xb1 0x03 0x15 0x00 0xb1 0x03 0x16 0x00 0xb1 0x03 0x17 0x00 0xb1 0x03 0x18 0x00 0xb1 0x03 0x19 0x00 0xb1 0x03 0x1a 0x00 0xb1 0x03 0x1b 0x00 0xb1>; - phandle = <0x147>; - }; - - lcdc-m1-rgb-pins { - rockchip,pins = <0x03 0x00 0x01 0xb6 0x03 0x04 0x01 0xb6 0x03 0x06 0x01 0xb6 0x03 0x0a 0x01 0xb6 0x03 0x0b 0x01 0xb6 0x03 0x0d 0x01 0xb6 0x03 0x10 0x01 0xb6 0x03 0x11 0x01 0xb6 0x03 0x12 0x01 0xb6 0x03 0x13 0x01 0xb6 0x03 0x14 0x01 0xb6 0x03 0x15 0x01 0xb6 0x03 0x16 0x01 0xb6 0x03 0x17 0x01 0xb6 0x03 0x18 0x01 0xb6 0x03 0x19 0x01 0xb6 0x03 0x1a 0x01 0xb6 0x03 0x1b 0x01 0xb6>; - phandle = <0x4d>; - }; - - lcdc-m1-sleep-pins { - rockchip,pins = <0x03 0x00 0x00 0xb1 0x03 0x04 0x00 0xb1 0x03 0x06 0x00 0xb1 0x03 0x0a 0x00 0xb1 0x03 0x0b 0x00 0xb1 0x03 0x0d 0x00 0xb1 0x03 0x10 0x00 0xb1 0x03 0x11 0x00 0xb1 0x03 0x12 0x00 0xb1 0x03 0x13 0x00 0xb1 0x03 0x14 0x00 0xb1 0x03 0x15 0x00 0xb1 0x03 0x16 0x00 0xb1 0x03 0x17 0x00 0xb1 0x03 0x18 0x00 0xb1 0x03 0x19 0x00 0xb1 0x03 0x1a 0x00 0xb1 0x03 0x1b 0x00 0xb1>; - phandle = <0x4e>; - }; - }; - - pwm0 { - - pwm0-pin { - rockchip,pins = <0x00 0x0f 0x01 0xb1>; - phandle = <0x7b>; - }; - }; - - pwm1 { - - pwm1-pin { - rockchip,pins = <0x00 0x10 0x01 0xb1>; - phandle = <0x7c>; - }; - }; - - pwm2 { - - pwm2-pin { - rockchip,pins = <0x02 0x0d 0x01 0xb1>; - phandle = <0x7d>; - }; - }; - - pwm3 { - - pwm3-pin { - rockchip,pins = <0x00 0x11 0x01 0xb1>; - phandle = <0x7e>; - }; - }; - - pwm4 { - - pwm4-pin { - rockchip,pins = <0x03 0x12 0x03 0xb1>; - phandle = <0x7f>; - }; - }; - - pwm5 { - - pwm5-pin { - rockchip,pins = <0x03 0x13 0x03 0xb1>; - phandle = <0x80>; - }; - }; - - pwm6 { - - pwm6-pin { - rockchip,pins = <0x03 0x14 0x03 0xb1>; - phandle = <0x81>; - }; - }; - - pwm7 { - - pwm7-pin { - rockchip,pins = <0x03 0x15 0x03 0xb1>; - phandle = <0x82>; - }; - }; - - gmac { - - rmii-pins { - rockchip,pins = <0x02 0x00 0x02 0xb8 0x02 0x01 0x02 0xb8 0x02 0x02 0x02 0xb8 0x02 0x03 0x02 0xb1 0x02 0x04 0x02 0xb1 0x02 0x05 0x02 0xb1 0x02 0x06 0x02 0xb1 0x02 0x07 0x02 0xb1 0x02 0x09 0x02 0xb1>; - phandle = <0x8d>; - }; - - mac-refclk-12ma { - rockchip,pins = <0x02 0x0a 0x02 0xb8>; - phandle = <0x8e>; - }; - - mac-refclk { - rockchip,pins = <0x02 0x0a 0x02 0xb1>; - phandle = <0x148>; - }; - }; - - cif-m0 { - - cif-clkout-m0 { - rockchip,pins = <0x02 0x0b 0x01 0xb8>; - phandle = <0xa7>; - }; - - dvp-d2d9-m0 { - rockchip,pins = <0x02 0x00 0x01 0xb1 0x02 0x01 0x01 0xb1 0x02 0x02 0x01 0xb1 0x02 0x03 0x01 0xb1 0x02 0x04 0x01 0xb1 0x02 0x05 0x01 0xb1 0x02 0x06 0x01 0xb1 0x02 0x07 0x01 0xb1 0x02 0x08 0x01 0xb1 0x02 0x09 0x01 0xb1 0x02 0x0a 0x01 0xb1 0x02 0x0b 0x01 0xb1>; - phandle = <0xa5>; - }; - - dvp-d0d1-m0 { - rockchip,pins = <0x02 0x0c 0x01 0xb1 0x02 0x0e 0x01 0xb1>; - phandle = <0xa9>; - }; - - d10-d11-m0 { - rockchip,pins = <0x02 0x0f 0x01 0xb1 0x02 0x10 0x01 0xb1>; - phandle = <0xa8>; - }; - }; - - cif-m1 { - - cif-clkout-m1 { - rockchip,pins = <0x03 0x18 0x03 0xb1>; - phandle = <0x149>; - }; - - dvp-d2d9-m1 { - rockchip,pins = <0x03 0x03 0x03 0xb1 0x03 0x05 0x03 0xb1 0x03 0x07 0x03 0xb1 0x03 0x08 0x03 0xb1 0x03 0x09 0x03 0xb1 0x03 0x0c 0x03 0xb1 0x03 0x0e 0x03 0xb1 0x03 0x0f 0x03 0xb1 0x03 0x19 0x03 0xb1 0x03 0x1a 0x03 0xb1 0x03 0x1b 0x03 0xb1 0x03 0x18 0x03 0xb1>; - phandle = <0x14a>; - }; - - dvp-d0d1-m1 { - rockchip,pins = <0x03 0x01 0x03 0xb1 0x03 0x02 0x03 0xb1>; - phandle = <0x14b>; - }; - - d10-d11-m1 { - rockchip,pins = <0x03 0x16 0x03 0xb1 0x03 0x17 0x03 0xb1>; - phandle = <0x14c>; - }; - }; - - isp { - - isp-prelight { - rockchip,pins = <0x03 0x19 0x04 0xb1>; - phandle = <0x14d>; - }; - }; - - pmic { - - pmic_int { - rockchip,pins = <0x00 0x0a 0x00 0xb2 0x00 0x0b 0x00 0xb1>; - phandle = <0x5d>; - }; - - soc_slppin_gpio { - rockchip,pins = <0x00 0x04 0x00 0xb9>; - phandle = <0x60>; - }; - - soc_slppin_slp { - rockchip,pins = <0x00 0x04 0x01 0xb1>; - phandle = <0x5e>; - }; - - soc_slppin_rst { - rockchip,pins = <0x00 0x04 0x02 0xb1>; - phandle = <0x62>; - }; - }; - - leds { - - led-pins { - rockchip,pins = <0x00 0x11 0x00 0xb1>; - phandle = <0xc0>; - }; - }; - - btns { - - btn-pins { - rockchip,pins = <0x01 0x0c 0x00 0xb2 0x01 0x0d 0x00 0xb2 0x01 0x0e 0x00 0xb2 0x01 0x0f 0x00 0xb2 0x01 0x02 0x00 0xb2 0x01 0x05 0x00 0xb2 0x01 0x06 0x00 0xb2 0x01 0x07 0x00 0xb2 0x02 0x00 0x00 0xb2 0x02 0x01 0x00 0xb2 0x02 0x02 0x00 0xb2 0x02 0x03 0x00 0xb2 0x02 0x04 0x00 0xb2 0x02 0x05 0x00 0xb2 0x02 0x06 0x00 0xb2 0x02 0x07 0x00 0xb2 0x03 0x09 0x00 0xb2 0x03 0x0a 0x00 0xb2 0x03 0x0c 0x00 0xb2 0x03 0x0f 0x00 0xb2>; - phandle = <0xbd>; - }; - }; - }; - - chosen { - bootargs = [00]; - }; - - fiq-debugger { - compatible = "rockchip,fiq-debugger"; - rockchip,serial-id = <0x02>; - rockchip,wake-irq = <0x00>; - rockchip,irq-mode-enable = <0x00>; - rockchip,baudrate = <0x1c200>; - interrupts = <0x00 0x7f 0x08>; - pinctrl-names = "default"; - pinctrl-0 = <0xba>; - status = "okay"; - }; - - ramoops { - compatible = "ramoops"; - record-size = <0x00 0x20000>; - console-size = <0x00 0x80000>; - ftrace-size = <0x00 0x00>; - pmsg-size = <0x00 0x00>; - memory-region = <0xbb>; - }; - - reserved-memory { - #address-cells = <0x02>; - #size-cells = <0x02>; - ranges; - - drm-logo@00000000 { - compatible = "rockchip,drm-logo"; - reg = <0x00 0x00 0x00 0x00>; - phandle = <0x11>; - }; - - region@110000 { - reg = <0x00 0x110000 0x00 0xf0000>; - reg-names = "ramoops_mem"; - phandle = <0xbb>; - }; - }; - - odroidgo3-keys { - compatible = "gpio-keys"; - #address-cells = <0x01>; - #size-cells = <0x00>; - autorepeat; - phandle = <0x14e>; - - button@0 { - label = "GPIO BTN-VOLUP"; - linux,code = <0x73>; - gpios = <0x66 0x00 0x01>; - }; - - button@1 { - label = "GPIO BTN-VOLDN"; - linux,code = <0x72>; - gpios = <0x66 0x01 0x01>; - }; - }; - - odroidgo3-joypad { - compatible = "odroidgo3-joypad"; - pwms = <0xbc 0x00 0xbebc200 0x00>; - pwm-names = "enable"; - rumble-boost-weak = <0x00>; - rumble-boost-strong = <0x00>; - joypad-name = "GO-Super Gamepad"; - joypad-product = <0x1100>; - joypad-revision = <0x100>; - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <0xbd>; - pinctrl-1 = <0x7b>; - io-channel-names = "amux_adc"; - io-channels = <0xbe 0x01>; - amux-count = <0x04>; - amux-a-gpios = <0x97 0x0b 0x01>; - amux-b-gpios = <0x97 0x08 0x01>; - amux-en-gpios = <0x97 0x0d 0x01>; - button-adc-scale = <0x02>; - button-adc-deadzone = <0x40>; - button-adc-fuzz = <0x20>; - button-adc-flat = <0x20>; - abs_x-p-tuning = <0xc8>; - abs_x-n-tuning = <0xc8>; - abs_y-p-tuning = <0xc8>; - abs_y-n-tuning = <0xc8>; - abs_rx-p-tuning = <0xc8>; - abs_rx-n-tuning = <0xc8>; - abs_ry-p-tuning = <0xc8>; - abs_ry-n-tuning = <0xc8>; - poll-interval = <0x0a>; - invert-absx; - invert-absy; - phandle = <0x14f>; - - sw1 { - gpios = <0xbf 0x0c 0x01>; - label = "GPIO DPAD-UP"; - linux,code = <0x220>; - }; - - sw2 { - gpios = <0xbf 0x0d 0x01>; - label = "GPIO DPAD-DOWN"; - linux,code = <0x221>; - }; - - sw3 { - gpios = <0xbf 0x0e 0x01>; - label = "GPIO DPAD-LEFT"; - linux,code = <0x222>; - }; - - sw4 { - gpios = <0xbf 0x0f 0x01>; - label = "GPIO DPAD-RIGHT"; - linux,code = <0x223>; - }; - - sw5 { - gpios = <0xbf 0x02 0x01>; - label = "GPIO KEY BTN-A"; - linux,code = <0x131>; - }; - - sw6 { - gpios = <0xbf 0x05 0x01>; - label = "GPIO BTN-B"; - linux,code = <0x130>; - }; - - sw7 { - gpios = <0xbf 0x06 0x01>; - label = "GPIO BTN-Y"; - linux,code = <0x134>; - }; - - sw8 { - gpios = <0xbf 0x07 0x01>; - label = "GPIO BTN-X"; - linux,code = <0x133>; - }; - - sw11 { - gpios = <0x66 0x02 0x01>; - label = "GPIO F3"; - linux,code = <0x2c2>; - }; - - sw12 { - gpios = <0x66 0x03 0x01>; - label = "GPIO F4"; - linux,code = <0x2c3>; - }; - - sw13 { - gpios = <0x66 0x04 0x01>; - label = "GPIO F5"; - linux,code = <0x2c4>; - }; - - sw15 { - gpios = <0x66 0x06 0x01>; - label = "GPIO TOP-LEFT"; - linux,code = <0x136>; - }; - - sw16 { - gpios = <0x66 0x07 0x01>; - label = "GPIO TOP-RIGHT"; - linux,code = <0x137>; - }; - - sw19 { - gpios = <0x97 0x09 0x01>; - label = "GPIO F1"; - linux,code = <0x2c0>; - }; - - sw20 { - gpios = <0x97 0x0f 0x01>; - label = "GPIO TOP-RIGHT2"; - linux,code = <0x139>; - }; - - sw21 { - gpios = <0x97 0x0a 0x01>; - label = "GPIO TOP-LEFT2"; - linux,code = <0x138>; - }; - - sw22 { - gpios = <0x97 0x0c 0x01>; - label = "GPIO F2"; - linux,code = <0x2c1>; - }; - }; - - gpio_leds { - compatible = "gpio-leds"; - pinctrl-names = "led_pins"; - pinctrl-0 = <0xc0>; - phandle = <0x150>; - - heartbeat { - label = "blue:heartbeat"; - gpios = <0x5c 0x11 0x00>; - linux,default-trigger = "heartbeat"; - }; - }; - - backlight { - compatible = "pwm-backlight"; - pwms = <0xc1 0x00 0x9c40 0x00>; - brightness-levels = <0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f 0x20 0x21 0x22 0x23 0x24 0x25 0x26 0x27 0x28 0x29 0x2a 0x2b 0x2c 0x2d 0x2e 0x2f 0x30 0x31 0x32 0x33 0x34 0x35 0x36 0x37 0x38 0x39 0x3a 0x3b 0x3c 0x3d 0x3e 0x3f 0x40 0x41 0x42 0x43 0x44 0x45 0x46 0x47 0x48 0x49 0x4a 0x4b 0x4c 0x4d 0x4e 0x4f 0x50 0x51 0x52 0x53 0x54 0x55 0x56 0x57 0x58 0x59 0x5a 0x5b 0x5c 0x5d 0x5e 0x5f 0x60 0x61 0x62 0x63 0x64 0x65 0x66 0x67 0x68 0x69 0x6a 0x6b 0x6c 0x6d 0x6e 0x6f 0x70 0x71 0x72 0x73 0x74 0x75 0x76 0x77 0x78 0x79 0x7a 0x7b 0x7c 0x7d 0x7e 0x7f 0x80 0x81 0x82 0x83 0x84 0x85 0x86 0x87 0x88 0x89 0x8a 0x8b 0x8c 0x8d 0x8e 0x8f 0x90 0x91 0x92 0x93 0x94 0x95 0x96 0x97 0x98 0x99 0x9a 0x9b 0x9c 0x9d 0x9e 0x9f 0xa0>; - default-brightness-level = <0x50>; - phandle = <0x9d>; - }; - - rk817-sound { - compatible = "simple-audio-card"; - simple-audio-card,format = "i2s"; - simple-audio-card,name = "rockchip,rk817-codec"; - simple-audio-card,mclk-fs = <0x100>; - simple-audio-card,widgets = "Microphone\0Mic Jack\0Headphone\0Headphone Jack"; - simple-audio-card,routing = "MIC_IN\0Mic Jack\0Headphone Jack\0HPOL\0Headphone Jack\0HPOR"; - simple-audio-card,hp-det-gpio = <0x66 0x16 0x01>; - simple-audio-card,codec-hp-det = <0x01>; - - simple-audio-card,cpu { - sound-dai = <0xc2>; - }; - - simple-audio-card,codec { - sound-dai = <0xc3>; - }; - }; - - vccsys { - compatible = "regulator-fixed"; - regulator-name = "vcc3v8_sys"; - regulator-always-on; - regulator-min-microvolt = <0x39fbc0>; - regulator-max-microvolt = <0x39fbc0>; - phandle = <0x64>; - }; - - __symbols__ { - ddr_timing = "/ddr_timing"; - cpu0 = "/cpus/cpu@0"; - cpu1 = "/cpus/cpu@1"; - cpu2 = "/cpus/cpu@2"; - cpu3 = "/cpus/cpu@3"; - CPU_SLEEP = "/cpus/idle-states/cpu-sleep"; - CLUSTER_SLEEP = "/cpus/idle-states/cluster-sleep"; - cpu0_opp_table = "/cpu0-opp-table"; - bus_soc = "/bus-soc"; - bus_apll = "/bus-apll"; - bus_apll_opp_table = "/bus-apll-opp-table"; - display_subsystem = "/display-subsystem"; - route_lvds = "/display-subsystem/route/route-lvds"; - route_dsi = "/display-subsystem/route/route-dsi"; - route_rgb = "/display-subsystem/route/route-rgb"; - gmac_clkin = "/external-gmac-clock"; - rockchip_suspend = "/rockchip-suspend"; - xin24m = "/xin24m"; - xin32k = "/xin32k"; - pmu = "/power-management@ff000000"; - power = "/power-management@ff000000/power-controller"; - pmugrf = "/syscon@ff010000"; - pmu_io_domains = "/syscon@ff010000/io-domains"; - pmu_pvtm = "/syscon@ff010000/pmu-pvtm"; - uart0 = "/serial@ff030000"; - i2s0_8ch = "/i2s@ff060000"; - i2s1_2ch = "/i2s@ff070000"; - i2s2_2ch = "/i2s@ff080000"; - pdm = "/pdm@ff0a0000"; - crypto = "/crypto@ff0b0000"; - rng = "/rng@ff0b0000"; - gic = "/interrupt-controller@ff131000"; - grf = "/syscon@ff140000"; - io_domains = "/syscon@ff140000/io-domains"; - lvds = "/syscon@ff140000/lvds"; - lvds_in_vopb = "/syscon@ff140000/lvds/ports/port@0/endpoint@0"; - rgb = "/syscon@ff140000/rgb"; - rgb_in_vopb = "/syscon@ff140000/rgb/ports/port@0/endpoint@0"; - core_grf = "/syscon@ff148000"; - pvtm = "/syscon@ff148000/pvtm"; - uart1 = "/serial@ff158000"; - uart2 = "/serial@ff160000"; - uart3 = "/serial@ff168000"; - uart4 = "/serial@ff170000"; - uart5 = "/serial@ff178000"; - i2c0 = "/i2c@ff180000"; - rk817 = "/i2c@ff180000/pmic@20"; - pinctrl_rk8xx = "/i2c@ff180000/pmic@20/pinctrl_rk8xx"; - rk817_ts_gpio1 = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_ts_gpio1"; - rk817_gt_gpio2 = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_gt_gpio2"; - rk817_pin_ts = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_pin_ts"; - rk817_pin_gt = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_pin_gt"; - rk817_slppin_null = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_slppin_null"; - rk817_slppin_slp = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_slppin_slp"; - rk817_slppin_pwrdn = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_slppin_pwrdn"; - rk817_slppin_rst = "/i2c@ff180000/pmic@20/pinctrl_rk8xx/rk817_slppin_rst"; - vdd_logic = "/i2c@ff180000/pmic@20/regulators/DCDC_REG1"; - vdd_arm = "/i2c@ff180000/pmic@20/regulators/DCDC_REG2"; - vcc_ddr = "/i2c@ff180000/pmic@20/regulators/DCDC_REG3"; - vcc_3v3 = "/i2c@ff180000/pmic@20/regulators/DCDC_REG4"; - vcc_1v0 = "/i2c@ff180000/pmic@20/regulators/LDO_REG1"; - vcc1v8_soc = "/i2c@ff180000/pmic@20/regulators/LDO_REG2"; - vdd1v0_soc = "/i2c@ff180000/pmic@20/regulators/LDO_REG3"; - vcc3v3_pmu = "/i2c@ff180000/pmic@20/regulators/LDO_REG4"; - vccio_sd = "/i2c@ff180000/pmic@20/regulators/LDO_REG5"; - vcc_sd = "/i2c@ff180000/pmic@20/regulators/LDO_REG6"; - vcc_backlight = "/i2c@ff180000/pmic@20/regulators/LDO_REG7"; - vcc_lcd = "/i2c@ff180000/pmic@20/regulators/LDO_REG8"; - dcdc_boost = "/i2c@ff180000/pmic@20/regulators/BOOST"; - otg_switch = "/i2c@ff180000/pmic@20/regulators/OTG_SWITCH"; - rk817_codec = "/i2c@ff180000/pmic@20/codec"; - i2c1 = "/i2c@ff190000"; - i2c2 = "/i2c@ff1a0000"; - i2c3 = "/i2c@ff1b0000"; - spi0 = "/spi@ff1d0000"; - spi1 = "/spi@ff1d8000"; - wdt = "/watchdog@ff1e0000"; - pwm0 = "/pwm@ff200000"; - pwm1 = "/pwm@ff200010"; - pwm2 = "/pwm@ff200020"; - pwm3 = "/pwm@ff200030"; - pwm4 = "/pwm@ff208000"; - pwm5 = "/pwm@ff208010"; - pwm6 = "/pwm@ff208020"; - pwm7 = "/pwm@ff208030"; - rktimer = "/rktimer@ff210000"; - dmac = "/amba/dmac@ff240000"; - thermal_zones = "/thermal-zones"; - soc_thermal = "/thermal-zones/soc-thermal"; - threshold = "/thermal-zones/soc-thermal/trips/trip-point-0"; - target = "/thermal-zones/soc-thermal/trips/trip-point-1"; - soc_crit = "/thermal-zones/soc-thermal/trips/soc-crit"; - gpu_thermal = "/thermal-zones/gpu-thermal"; - tsadc = "/tsadc@ff280000"; - saradc = "/saradc@ff288000"; - otp = "/otp@ff290000"; - otp_id = "/otp@ff290000/id@7"; - cpu_leakage = "/otp@ff290000/cpu-leakage@17"; - performance = "/otp@ff290000/performance@1e"; - cru = "/clock-controller@ff2b0000"; - cpu_boost = "/cpu-boost@ff2b8000"; - pmucru = "/pmu-clock-controller@ff2bc000"; - usb2phy_grf = "/syscon@ff2c0000"; - u2phy = "/syscon@ff2c0000/usb2-phy@100"; - u2phy_host = "/syscon@ff2c0000/usb2-phy@100/host-port"; - u2phy_otg = "/syscon@ff2c0000/usb2-phy@100/otg-port"; - video_phy = "/video-phy@ff2e0000"; - mipi_dphy_rx0 = "/mipi-dphy-rx0@ff2f0000"; - usb20_otg = "/usb@ff300000"; - usb_host0_ehci = "/usb@ff340000"; - usb_host0_ohci = "/usb@ff350000"; - gmac = "/ethernet@ff360000"; - sdmmc = "/dwmmc@ff370000"; - sdio = "/dwmmc@ff380000"; - emmc = "/dwmmc@ff390000"; - nandc0 = "/nandc@ff3b0000"; - sfc = "/sfc@ff3a0000"; - gpu = "/gpu@ff400000"; - gpu_opp_table = "/gpu-opp-table"; - hevc = "/hevc_service@ff440000"; - vpu = "/vpu_service@ff442000"; - vpu_combo = "/vpu_combo"; - hevc_mmu = "/iommu@ff440440"; - vpu_mmu = "/iommu@ff442800"; - dsi = "/dsi@ff450000"; - dsi_in_vopb = "/dsi@ff450000/ports/port@0/endpoint@0"; - timing0 = "/dsi@ff450000/panel@0/display-timings/60Hz"; - timing1 = "/dsi@ff450000/panel@0/display-timings/50Hz"; - timing2 = "/dsi@ff450000/panel@0/display-timings/75Hz"; - vopb = "/vop@ff460000"; - vopb_out = "/vop@ff460000/port"; - vopb_out_lvds = "/vop@ff460000/port/endpoint@0"; - vopb_out_dsi = "/vop@ff460000/port/endpoint@1"; - vopb_out_rgb = "/vop@ff460000/port/endpoint@2"; - vopb_mmu = "/iommu@ff460f00"; - rk_rga = "/rk_rga@ff480000"; - cif = "/cif@ff490000"; - cif_new = "/cif-new@ff490000"; - vip_mmu = "/iommu@ff490800"; - rk_isp = "/rk_isp@ff4a0000"; - rkisp1 = "/rkisp1@ff4a0000"; - isp_mmu = "/iommu@ff4a8000"; - qos_gmac = "/qos@ff518000"; - qos_gpu = "/qos@ff520000"; - qos_sdmmc = "/qos@ff52c000"; - qos_emmc = "/qos@ff538000"; - qos_nand = "/qos@ff538080"; - qos_sdio = "/qos@ff538100"; - qos_sfc = "/qos@ff538180"; - qos_usb_host = "/qos@ff540000"; - qos_usb_otg = "/qos@ff540080"; - qos_isp_128 = "/qos@ff548000"; - qos_isp_rd = "/qos@ff548080"; - qos_isp_wr = "/qos@ff548100"; - qos_isp_m1 = "/qos@ff548180"; - qos_vip = "/qos@ff548200"; - qos_rga_rd = "/qos@ff550000"; - qos_rga_wr = "/qos@ff550080"; - qos_vop_m0 = "/qos@ff550100"; - qos_vop_m1 = "/qos@ff550180"; - qos_vpu = "/qos@ff558000"; - qos_vpu_r128 = "/qos@ff558080"; - dfi = "/dfi@ff610000"; - dmc = "/dmc"; - ddr_power_model = "/dmc/ddr_power_model"; - dmc_opp_table = "/dmc-opp-table"; - rockchip_system_monitor = "/rockchip-system-monitor"; - pinctrl = "/pinctrl"; - gpio0 = "/pinctrl/gpio0@ff040000"; - gpio1 = "/pinctrl/gpio1@ff250000"; - gpio2 = "/pinctrl/gpio2@ff260000"; - gpio3 = "/pinctrl/gpio3@ff270000"; - pcfg_pull_up = "/pinctrl/pcfg-pull-up"; - pcfg_pull_down = "/pinctrl/pcfg-pull-down"; - pcfg_pull_none = "/pinctrl/pcfg-pull-none"; - pcfg_pull_none_2ma = "/pinctrl/pcfg-pull-none-2ma"; - pcfg_pull_up_2ma = "/pinctrl/pcfg-pull-up-2ma"; - pcfg_pull_up_4ma = "/pinctrl/pcfg-pull-up-4ma"; - pcfg_pull_none_4ma = "/pinctrl/pcfg-pull-none-4ma"; - pcfg_pull_down_4ma = "/pinctrl/pcfg-pull-down-4ma"; - pcfg_pull_none_8ma = "/pinctrl/pcfg-pull-none-8ma"; - pcfg_pull_up_8ma = "/pinctrl/pcfg-pull-up-8ma"; - pcfg_pull_none_12ma = "/pinctrl/pcfg-pull-none-12ma"; - pcfg_pull_up_12ma = "/pinctrl/pcfg-pull-up-12ma"; - pcfg_pull_none_smt = "/pinctrl/pcfg-pull-none-smt"; - pcfg_output_high = "/pinctrl/pcfg-output-high"; - pcfg_output_low = "/pinctrl/pcfg-output-low"; - pcfg_input_high = "/pinctrl/pcfg-input-high"; - pcfg_input = "/pinctrl/pcfg-input"; - i2c0_xfer = "/pinctrl/i2c0/i2c0-xfer"; - i2c1_xfer = "/pinctrl/i2c1/i2c1-xfer"; - i2c2_xfer = "/pinctrl/i2c2/i2c2-xfer"; - i2c3_xfer = "/pinctrl/i2c3/i2c3-xfer"; - tsadc_otp_gpio = "/pinctrl/tsadc/tsadc-otp-gpio"; - tsadc_otp_out = "/pinctrl/tsadc/tsadc-otp-out"; - uart0_xfer = "/pinctrl/uart0/uart0-xfer"; - uart0_cts = "/pinctrl/uart0/uart0-cts"; - uart0_rts = "/pinctrl/uart0/uart0-rts"; - uart0_rts_gpio = "/pinctrl/uart0/uart0-rts-gpio"; - uart1_xfer = "/pinctrl/uart1/uart1-xfer"; - uart1_cts = "/pinctrl/uart1/uart1-cts"; - uart1_rts = "/pinctrl/uart1/uart1-rts"; - uart1_rts_gpio = "/pinctrl/uart1/uart1-rts-gpio"; - uart2m0_xfer = "/pinctrl/uart2-m0/uart2m0-xfer"; - uart2m1_xfer = "/pinctrl/uart2-m1/uart2m1-xfer"; - uart3m0_xfer = "/pinctrl/uart3-m0/uart3m0-xfer"; - uart3m0_cts = "/pinctrl/uart3-m0/uart3m0-cts"; - uart3m0_rts = "/pinctrl/uart3-m0/uart3m0-rts"; - uart3m0_rts_gpio = "/pinctrl/uart3-m0/uart3m0-rts-gpio"; - uart3m1_xfer = "/pinctrl/uart3-m1/uart3m1-xfer"; - uart3m1_cts = "/pinctrl/uart3-m1/uart3m1-cts"; - uart3m1_rts = "/pinctrl/uart3-m1/uart3m1-rts"; - uart3m1_rts_gpio = "/pinctrl/uart3-m1/uart3m1-rts-gpio"; - uart4_xfer = "/pinctrl/uart4/uart4-xfer"; - uart4_cts = "/pinctrl/uart4/uart4-cts"; - uart4_rts = "/pinctrl/uart4/uart4-rts"; - uart5_xfer = "/pinctrl/uart5/uart5-xfer"; - uart5_cts = "/pinctrl/uart5/uart5-cts"; - uart5_rts = "/pinctrl/uart5/uart5-rts"; - spi0_clk = "/pinctrl/spi0/spi0-clk"; - spi0_csn = "/pinctrl/spi0/spi0-csn"; - spi0_miso = "/pinctrl/spi0/spi0-miso"; - spi0_mosi = "/pinctrl/spi0/spi0-mosi"; - spi0_clk_hs = "/pinctrl/spi0/spi0-clk-hs"; - spi0_miso_hs = "/pinctrl/spi0/spi0-miso-hs"; - spi0_mosi_hs = "/pinctrl/spi0/spi0-mosi-hs"; - spi1_clk = "/pinctrl/spi1/spi1-clk"; - spi1_csn0 = "/pinctrl/spi1/spi1-csn0"; - spi1_csn1 = "/pinctrl/spi1/spi1-csn1"; - spi1_miso = "/pinctrl/spi1/spi1-miso"; - spi1_mosi = "/pinctrl/spi1/spi1-mosi"; - spi1_clk_hs = "/pinctrl/spi1/spi1-clk-hs"; - spi1_miso_hs = "/pinctrl/spi1/spi1-miso-hs"; - spi1_mosi_hs = "/pinctrl/spi1/spi1-mosi-hs"; - pdm_clk0m0 = "/pinctrl/pdm/pdm-clk0m0"; - pdm_clk0m1 = "/pinctrl/pdm/pdm-clk0m1"; - pdm_clk1 = "/pinctrl/pdm/pdm-clk1"; - pdm_sdi0m0 = "/pinctrl/pdm/pdm-sdi0m0"; - pdm_sdi0m1 = "/pinctrl/pdm/pdm-sdi0m1"; - pdm_sdi1 = "/pinctrl/pdm/pdm-sdi1"; - pdm_sdi2 = "/pinctrl/pdm/pdm-sdi2"; - pdm_sdi3 = "/pinctrl/pdm/pdm-sdi3"; - pdm_clk0m0_sleep = "/pinctrl/pdm/pdm-clk0m0-sleep"; - pdm_clk0m_sleep1 = "/pinctrl/pdm/pdm-clk0m1-sleep"; - pdm_clk1_sleep = "/pinctrl/pdm/pdm-clk1-sleep"; - pdm_sdi0m0_sleep = "/pinctrl/pdm/pdm-sdi0m0-sleep"; - pdm_sdi0m1_sleep = "/pinctrl/pdm/pdm-sdi0m1-sleep"; - pdm_sdi1_sleep = "/pinctrl/pdm/pdm-sdi1-sleep"; - pdm_sdi2_sleep = "/pinctrl/pdm/pdm-sdi2-sleep"; - pdm_sdi3_sleep = "/pinctrl/pdm/pdm-sdi3-sleep"; - i2s0_8ch_mclk = "/pinctrl/i2s0/i2s0-8ch-mclk"; - i2s0_8ch_sclktx = "/pinctrl/i2s0/i2s0-8ch-sclktx"; - i2s0_8ch_sclkrx = "/pinctrl/i2s0/i2s0-8ch-sclkrx"; - i2s0_8ch_lrcktx = "/pinctrl/i2s0/i2s0-8ch-lrcktx"; - i2s0_8ch_lrckrx = "/pinctrl/i2s0/i2s0-8ch-lrckrx"; - i2s0_8ch_sdo0 = "/pinctrl/i2s0/i2s0-8ch-sdo0"; - i2s0_8ch_sdo1 = "/pinctrl/i2s0/i2s0-8ch-sdo1"; - i2s0_8ch_sdo2 = "/pinctrl/i2s0/i2s0-8ch-sdo2"; - i2s0_8ch_sdo3 = "/pinctrl/i2s0/i2s0-8ch-sdo3"; - i2s0_8ch_sdi0 = "/pinctrl/i2s0/i2s0-8ch-sdi0"; - i2s0_8ch_sdi1 = "/pinctrl/i2s0/i2s0-8ch-sdi1"; - i2s0_8ch_sdi2 = "/pinctrl/i2s0/i2s0-8ch-sdi2"; - i2s0_8ch_sdi3 = "/pinctrl/i2s0/i2s0-8ch-sdi3"; - i2s1_2ch_mclk = "/pinctrl/i2s1/i2s1-2ch-mclk"; - i2s1_2ch_sclk = "/pinctrl/i2s1/i2s1-2ch-sclk"; - i2s1_2ch_lrck = "/pinctrl/i2s1/i2s1-2ch-lrck"; - i2s1_2ch_sdi = "/pinctrl/i2s1/i2s1-2ch-sdi"; - i2s1_2ch_sdo = "/pinctrl/i2s1/i2s1-2ch-sdo"; - i2s2_2ch_mclk = "/pinctrl/i2s2/i2s2-2ch-mclk"; - i2s2_2ch_sclk = "/pinctrl/i2s2/i2s2-2ch-sclk"; - i2s2_2ch_lrck = "/pinctrl/i2s2/i2s2-2ch-lrck"; - i2s2_2ch_sdi = "/pinctrl/i2s2/i2s2-2ch-sdi"; - i2s2_2ch_sdo = "/pinctrl/i2s2/i2s2-2ch-sdo"; - sdmmc_clk = "/pinctrl/sdmmc/sdmmc-clk"; - sdmmc_cmd = "/pinctrl/sdmmc/sdmmc-cmd"; - sdmmc_det = "/pinctrl/sdmmc/sdmmc-det"; - sdmmc_bus1 = "/pinctrl/sdmmc/sdmmc-bus1"; - sdmmc_bus4 = "/pinctrl/sdmmc/sdmmc-bus4"; - sdmmc_gpio = "/pinctrl/sdmmc/sdmmc-gpio"; - sdio_clk = "/pinctrl/sdio/sdio-clk"; - sdio_cmd = "/pinctrl/sdio/sdio-cmd"; - sdio_bus4 = "/pinctrl/sdio/sdio-bus4"; - sdio_gpio = "/pinctrl/sdio/sdio-gpio"; - emmc_clk = "/pinctrl/emmc/emmc-clk"; - emmc_cmd = "/pinctrl/emmc/emmc-cmd"; - emmc_pwren = "/pinctrl/emmc/emmc-pwren"; - emmc_rstnout = "/pinctrl/emmc/emmc-rstnout"; - emmc_bus1 = "/pinctrl/emmc/emmc-bus1"; - emmc_bus4 = "/pinctrl/emmc/emmc-bus4"; - emmc_bus8 = "/pinctrl/emmc/emmc-bus8"; - flash_cs0 = "/pinctrl/flash/flash-cs0"; - flash_rdy = "/pinctrl/flash/flash-rdy"; - flash_dqs = "/pinctrl/flash/flash-dqs"; - flash_ale = "/pinctrl/flash/flash-ale"; - flash_cle = "/pinctrl/flash/flash-cle"; - flash_wrn = "/pinctrl/flash/flash-wrn"; - flash_csl = "/pinctrl/flash/flash-csl"; - flash_rdn = "/pinctrl/flash/flash-rdn"; - flash_bus8 = "/pinctrl/flash/flash-bus8"; - lcdc_m0_rgb_pins = "/pinctrl/lcdc/lcdc-m0-rgb-pins"; - lcdc_m0_sleep_pins = "/pinctrl/lcdc/lcdc-m0-sleep-pins"; - lcdc_m1_rgb_pins = "/pinctrl/lcdc/lcdc-m1-rgb-pins"; - lcdc_m1_sleep_pins = "/pinctrl/lcdc/lcdc-m1-sleep-pins"; - pwm0_pin = "/pinctrl/pwm0/pwm0-pin"; - pwm1_pin = "/pinctrl/pwm1/pwm1-pin"; - pwm2_pin = "/pinctrl/pwm2/pwm2-pin"; - pwm3_pin = "/pinctrl/pwm3/pwm3-pin"; - pwm4_pin = "/pinctrl/pwm4/pwm4-pin"; - pwm5_pin = "/pinctrl/pwm5/pwm5-pin"; - pwm6_pin = "/pinctrl/pwm6/pwm6-pin"; - pwm7_pin = "/pinctrl/pwm7/pwm7-pin"; - rmii_pins = "/pinctrl/gmac/rmii-pins"; - mac_refclk_12ma = "/pinctrl/gmac/mac-refclk-12ma"; - mac_refclk = "/pinctrl/gmac/mac-refclk"; - cif_clkout_m0 = "/pinctrl/cif-m0/cif-clkout-m0"; - dvp_d2d9_m0 = "/pinctrl/cif-m0/dvp-d2d9-m0"; - dvp_d0d1_m0 = "/pinctrl/cif-m0/dvp-d0d1-m0"; - dvp_d10d11_m0 = "/pinctrl/cif-m0/d10-d11-m0"; - cif_clkout_m1 = "/pinctrl/cif-m1/cif-clkout-m1"; - dvp_d2d9_m1 = "/pinctrl/cif-m1/dvp-d2d9-m1"; - dvp_d0d1_m1 = "/pinctrl/cif-m1/dvp-d0d1-m1"; - dvp_d10d11_m1 = "/pinctrl/cif-m1/d10-d11-m1"; - isp_prelight = "/pinctrl/isp/isp-prelight"; - pmic_int = "/pinctrl/pmic/pmic_int"; - soc_slppin_gpio = "/pinctrl/pmic/soc_slppin_gpio"; - soc_slppin_slp = "/pinctrl/pmic/soc_slppin_slp"; - soc_slppin_rst = "/pinctrl/pmic/soc_slppin_rst"; - led_pins = "/pinctrl/leds/led-pins"; - btn_pins = "/pinctrl/btns/btn-pins"; - drm_logo = "/reserved-memory/drm-logo@00000000"; - ramoops_mem = "/reserved-memory/region@110000"; - gpio_keys = "/odroidgo3-keys"; - joypad = "/odroidgo3-joypad"; - leds = "/gpio_leds"; - backlight = "/backlight"; - vccsys = "/vccsys"; - }; -}; diff --git a/config/archr-dts/R36S-DTB/R36S/Panel 0/boot.ini b/config/archr-dts/R36S-DTB/R36S/Panel 0/boot.ini deleted file mode 100644 index 3719453d04..0000000000 --- a/config/archr-dts/R36S-DTB/R36S/Panel 0/boot.ini +++ /dev/null @@ -1,25 +0,0 @@ -odroidgoa-uboot-config - -######################################################################## -# Changes made to this are overwritten every time there's a new upgrade -# To make your changes permanent change it on -# boot.ini.default -# After changing it on boot.ini.default run the bootini command to -# rewrite this file with your personal permanent settings. -######################################################################## - -# Boot Arguments -setenv bootargs "root=UUID='e139ce78-9841-40fe-8823-96a304a09859' rootwait rw fsck.repair=yes net.ifnames=0 fbcon=rotate:0 console=/dev/ttyFIQ0 quiet splash plymouth.ignore-serial-consoles consoleblank=0 vt.global_cursor_default=0" - -# Booting -setenv loadaddr "0x02000000" -setenv initrd_loadaddr "0x01100000" -setenv dtb_loadaddr "0x01f00000" - -load mmc 1:1 ${loadaddr} Image -load mmc 1:1 ${initrd_loadaddr} uInitrd - -load mmc 1:1 ${dtb_loadaddr} rk3326-r35s-linux.dtb - -booti ${loadaddr} ${initrd_loadaddr} ${dtb_loadaddr} - diff --git a/config/archr-dts/R36S-DTB/R36S/Panel 1/boot.ini b/config/archr-dts/R36S-DTB/R36S/Panel 1/boot.ini deleted file mode 100644 index 3719453d04..0000000000 --- a/config/archr-dts/R36S-DTB/R36S/Panel 1/boot.ini +++ /dev/null @@ -1,25 +0,0 @@ -odroidgoa-uboot-config - -######################################################################## -# Changes made to this are overwritten every time there's a new upgrade -# To make your changes permanent change it on -# boot.ini.default -# After changing it on boot.ini.default run the bootini command to -# rewrite this file with your personal permanent settings. -######################################################################## - -# Boot Arguments -setenv bootargs "root=UUID='e139ce78-9841-40fe-8823-96a304a09859' rootwait rw fsck.repair=yes net.ifnames=0 fbcon=rotate:0 console=/dev/ttyFIQ0 quiet splash plymouth.ignore-serial-consoles consoleblank=0 vt.global_cursor_default=0" - -# Booting -setenv loadaddr "0x02000000" -setenv initrd_loadaddr "0x01100000" -setenv dtb_loadaddr "0x01f00000" - -load mmc 1:1 ${loadaddr} Image -load mmc 1:1 ${initrd_loadaddr} uInitrd - -load mmc 1:1 ${dtb_loadaddr} rk3326-r35s-linux.dtb - -booti ${loadaddr} ${initrd_loadaddr} ${dtb_loadaddr} - diff --git a/config/archr-dts/R36S-DTB/R36S/Panel 1/rk3326-rg351mp-linux.dtb.tony b/config/archr-dts/R36S-DTB/R36S/Panel 1/rk3326-rg351mp-linux.dtb.tony deleted file mode 100644 index c9d63c8797..0000000000 Binary files a/config/archr-dts/R36S-DTB/R36S/Panel 1/rk3326-rg351mp-linux.dtb.tony and /dev/null differ diff --git a/config/archr-dts/R36S-DTB/R36S/Panel 2/boot.ini b/config/archr-dts/R36S-DTB/R36S/Panel 2/boot.ini deleted file mode 100644 index 3719453d04..0000000000 --- a/config/archr-dts/R36S-DTB/R36S/Panel 2/boot.ini +++ /dev/null @@ -1,25 +0,0 @@ -odroidgoa-uboot-config - -######################################################################## -# Changes made to this are overwritten every time there's a new upgrade -# To make your changes permanent change it on -# boot.ini.default -# After changing it on boot.ini.default run the bootini command to -# rewrite this file with your personal permanent settings. -######################################################################## - -# Boot Arguments -setenv bootargs "root=UUID='e139ce78-9841-40fe-8823-96a304a09859' rootwait rw fsck.repair=yes net.ifnames=0 fbcon=rotate:0 console=/dev/ttyFIQ0 quiet splash plymouth.ignore-serial-consoles consoleblank=0 vt.global_cursor_default=0" - -# Booting -setenv loadaddr "0x02000000" -setenv initrd_loadaddr "0x01100000" -setenv dtb_loadaddr "0x01f00000" - -load mmc 1:1 ${loadaddr} Image -load mmc 1:1 ${initrd_loadaddr} uInitrd - -load mmc 1:1 ${dtb_loadaddr} rk3326-r35s-linux.dtb - -booti ${loadaddr} ${initrd_loadaddr} ${dtb_loadaddr} - diff --git a/config/archr-dts/R36S-DTB/R36S/Panel 2/rg351mp-kernel.dtb b/config/archr-dts/R36S-DTB/R36S/Panel 2/rg351mp-kernel.dtb deleted file mode 100644 index 3d96e82eff..0000000000 Binary files a/config/archr-dts/R36S-DTB/R36S/Panel 2/rg351mp-kernel.dtb and /dev/null differ diff --git a/config/archr-dts/R36S-DTB/R36S/Panel 2/rk3326-r35s-linux.dtb b/config/archr-dts/R36S-DTB/R36S/Panel 2/rk3326-r35s-linux.dtb deleted file mode 100644 index 11ed2e9e48..0000000000 Binary files a/config/archr-dts/R36S-DTB/R36S/Panel 2/rk3326-r35s-linux.dtb and /dev/null differ diff --git a/config/archr-dts/R36S-DTB/R36S/Panel 2/rk3326-rg351mp-linux.dtb b/config/archr-dts/R36S-DTB/R36S/Panel 2/rk3326-rg351mp-linux.dtb deleted file mode 100644 index c9d63c8797..0000000000 Binary files a/config/archr-dts/R36S-DTB/R36S/Panel 2/rk3326-rg351mp-linux.dtb and /dev/null differ diff --git a/config/archr-dts/R36S-DTB/R36S/Panel 2/rk3326-rg351mp-linux.dtb.tony b/config/archr-dts/R36S-DTB/R36S/Panel 2/rk3326-rg351mp-linux.dtb.tony deleted file mode 100644 index c9d63c8797..0000000000 Binary files a/config/archr-dts/R36S-DTB/R36S/Panel 2/rk3326-rg351mp-linux.dtb.tony and /dev/null differ diff --git a/config/archr-dts/R36S-DTB/R36S/Panel 3/boot.ini b/config/archr-dts/R36S-DTB/R36S/Panel 3/boot.ini deleted file mode 100644 index 3719453d04..0000000000 --- a/config/archr-dts/R36S-DTB/R36S/Panel 3/boot.ini +++ /dev/null @@ -1,25 +0,0 @@ -odroidgoa-uboot-config - -######################################################################## -# Changes made to this are overwritten every time there's a new upgrade -# To make your changes permanent change it on -# boot.ini.default -# After changing it on boot.ini.default run the bootini command to -# rewrite this file with your personal permanent settings. -######################################################################## - -# Boot Arguments -setenv bootargs "root=UUID='e139ce78-9841-40fe-8823-96a304a09859' rootwait rw fsck.repair=yes net.ifnames=0 fbcon=rotate:0 console=/dev/ttyFIQ0 quiet splash plymouth.ignore-serial-consoles consoleblank=0 vt.global_cursor_default=0" - -# Booting -setenv loadaddr "0x02000000" -setenv initrd_loadaddr "0x01100000" -setenv dtb_loadaddr "0x01f00000" - -load mmc 1:1 ${loadaddr} Image -load mmc 1:1 ${initrd_loadaddr} uInitrd - -load mmc 1:1 ${dtb_loadaddr} rk3326-r35s-linux.dtb - -booti ${loadaddr} ${initrd_loadaddr} ${dtb_loadaddr} - diff --git a/config/archr-dts/R36S-DTB/R36S/Panel 3/rk3326-r35s-linux.dtb b/config/archr-dts/R36S-DTB/R36S/Panel 3/rk3326-r35s-linux.dtb deleted file mode 100644 index 1f8f800143..0000000000 Binary files a/config/archr-dts/R36S-DTB/R36S/Panel 3/rk3326-r35s-linux.dtb and /dev/null differ diff --git a/config/archr-dts/R36S-DTB/R36S/Panel 3/rk3326-rg351mp-linux.dtb b/config/archr-dts/R36S-DTB/R36S/Panel 3/rk3326-rg351mp-linux.dtb deleted file mode 100644 index c9d63c8797..0000000000 Binary files a/config/archr-dts/R36S-DTB/R36S/Panel 3/rk3326-rg351mp-linux.dtb and /dev/null differ diff --git a/config/archr-dts/R36S-DTB/R36S/Panel 3/rk3326-rg351mp-linux.dtb.tony b/config/archr-dts/R36S-DTB/R36S/Panel 3/rk3326-rg351mp-linux.dtb.tony deleted file mode 100644 index c9d63c8797..0000000000 Binary files a/config/archr-dts/R36S-DTB/R36S/Panel 3/rk3326-rg351mp-linux.dtb.tony and /dev/null differ diff --git a/config/archr-dts/R36S-DTB/R36S/Panel 4 - V22/boot.ini b/config/archr-dts/R36S-DTB/R36S/Panel 4 - V22/boot.ini deleted file mode 100644 index 3719453d04..0000000000 --- a/config/archr-dts/R36S-DTB/R36S/Panel 4 - V22/boot.ini +++ /dev/null @@ -1,25 +0,0 @@ -odroidgoa-uboot-config - -######################################################################## -# Changes made to this are overwritten every time there's a new upgrade -# To make your changes permanent change it on -# boot.ini.default -# After changing it on boot.ini.default run the bootini command to -# rewrite this file with your personal permanent settings. -######################################################################## - -# Boot Arguments -setenv bootargs "root=UUID='e139ce78-9841-40fe-8823-96a304a09859' rootwait rw fsck.repair=yes net.ifnames=0 fbcon=rotate:0 console=/dev/ttyFIQ0 quiet splash plymouth.ignore-serial-consoles consoleblank=0 vt.global_cursor_default=0" - -# Booting -setenv loadaddr "0x02000000" -setenv initrd_loadaddr "0x01100000" -setenv dtb_loadaddr "0x01f00000" - -load mmc 1:1 ${loadaddr} Image -load mmc 1:1 ${initrd_loadaddr} uInitrd - -load mmc 1:1 ${dtb_loadaddr} rk3326-r35s-linux.dtb - -booti ${loadaddr} ${initrd_loadaddr} ${dtb_loadaddr} - diff --git a/config/archr-dts/R36S-DTB/R36S/Panel 4 - V22/rk3326-r35s-linux.dtb b/config/archr-dts/R36S-DTB/R36S/Panel 4 - V22/rk3326-r35s-linux.dtb deleted file mode 100644 index 255dfb86ff..0000000000 Binary files a/config/archr-dts/R36S-DTB/R36S/Panel 4 - V22/rk3326-r35s-linux.dtb and /dev/null differ diff --git a/config/archr-dts/R36S-DTB/R36S/Panel 4 - V22/rk3326-rg351mp-linux.dtb b/config/archr-dts/R36S-DTB/R36S/Panel 4 - V22/rk3326-rg351mp-linux.dtb deleted file mode 100644 index c9d63c8797..0000000000 Binary files a/config/archr-dts/R36S-DTB/R36S/Panel 4 - V22/rk3326-rg351mp-linux.dtb and /dev/null differ diff --git a/config/archr-dts/R36S-DTB/R36S/Panel 4 - V22/rk3326-rg351mp-linux.dtb.tony b/config/archr-dts/R36S-DTB/R36S/Panel 4 - V22/rk3326-rg351mp-linux.dtb.tony deleted file mode 100644 index c9d63c8797..0000000000 Binary files a/config/archr-dts/R36S-DTB/R36S/Panel 4 - V22/rk3326-rg351mp-linux.dtb.tony and /dev/null differ diff --git a/config/archr-dts/R36S-DTB/R36S/Panel 4/boot.ini b/config/archr-dts/R36S-DTB/R36S/Panel 4/boot.ini deleted file mode 100644 index 3719453d04..0000000000 --- a/config/archr-dts/R36S-DTB/R36S/Panel 4/boot.ini +++ /dev/null @@ -1,25 +0,0 @@ -odroidgoa-uboot-config - -######################################################################## -# Changes made to this are overwritten every time there's a new upgrade -# To make your changes permanent change it on -# boot.ini.default -# After changing it on boot.ini.default run the bootini command to -# rewrite this file with your personal permanent settings. -######################################################################## - -# Boot Arguments -setenv bootargs "root=UUID='e139ce78-9841-40fe-8823-96a304a09859' rootwait rw fsck.repair=yes net.ifnames=0 fbcon=rotate:0 console=/dev/ttyFIQ0 quiet splash plymouth.ignore-serial-consoles consoleblank=0 vt.global_cursor_default=0" - -# Booting -setenv loadaddr "0x02000000" -setenv initrd_loadaddr "0x01100000" -setenv dtb_loadaddr "0x01f00000" - -load mmc 1:1 ${loadaddr} Image -load mmc 1:1 ${initrd_loadaddr} uInitrd - -load mmc 1:1 ${dtb_loadaddr} rk3326-r35s-linux.dtb - -booti ${loadaddr} ${initrd_loadaddr} ${dtb_loadaddr} - diff --git a/config/archr-dts/R36S-DTB/R36S/Panel 4/rk3326-rg351mp-linux.dtb b/config/archr-dts/R36S-DTB/R36S/Panel 4/rk3326-rg351mp-linux.dtb deleted file mode 100644 index c9d63c8797..0000000000 Binary files a/config/archr-dts/R36S-DTB/R36S/Panel 4/rk3326-rg351mp-linux.dtb and /dev/null differ diff --git a/config/archr-dts/R36S-DTB/R36S/Panel 4/rk3326-rg351mp-linux.dtb.tony b/config/archr-dts/R36S-DTB/R36S/Panel 4/rk3326-rg351mp-linux.dtb.tony deleted file mode 100644 index c9d63c8797..0000000000 Binary files a/config/archr-dts/R36S-DTB/R36S/Panel 4/rk3326-rg351mp-linux.dtb.tony and /dev/null differ diff --git a/config/archr-dts/R36S-DTB/R36S/Panel 5/Image b/config/archr-dts/R36S-DTB/R36S/Panel 5/Image deleted file mode 100644 index a18f822d3b..0000000000 Binary files a/config/archr-dts/R36S-DTB/R36S/Panel 5/Image and /dev/null differ diff --git a/config/archr-dts/R36S-DTB/R36S/Panel 5/boot.ini b/config/archr-dts/R36S-DTB/R36S/Panel 5/boot.ini deleted file mode 100644 index 4d75324652..0000000000 --- a/config/archr-dts/R36S-DTB/R36S/Panel 5/boot.ini +++ /dev/null @@ -1,25 +0,0 @@ -odroidgoa-uboot-config - -######################################################################## -# Changes made to this are overwritten every time there's a new upgrade -# To make your changes permanent change it on -# boot.ini.default -# After changing it on boot.ini.default run the bootini command to -# rewrite this file with your personal permanent settings. -######################################################################## - -# Boot Arguments -setenv bootargs "root=UUID='e139ce78-9841-40fe-8823-96a304a09859' rootwait rw fsck.repair=yes net.ifnames=0 fbcon=rotate:0 console=/dev/ttyFIQ0 quiet splash plymouth.ignore-serial-consoles consoleblank=0" - -# Booting -setenv loadaddr "0x02000000" -setenv initrd_loadaddr "0x01100000" -setenv dtb_loadaddr "0x01f00000" - -load mmc 1:1 ${loadaddr} Image -load mmc 1:1 ${initrd_loadaddr} uInitrd - -load mmc 1:1 ${dtb_loadaddr} rk3326-r35s-linux.dtb - -booti ${loadaddr} ${initrd_loadaddr} ${dtb_loadaddr} - diff --git a/config/archr-dts/R36S-DTB/R36S/Panel 5/rg351mp-kernel.dtb b/config/archr-dts/R36S-DTB/R36S/Panel 5/rg351mp-kernel.dtb deleted file mode 100644 index 5856f8fca3..0000000000 Binary files a/config/archr-dts/R36S-DTB/R36S/Panel 5/rg351mp-kernel.dtb and /dev/null differ diff --git a/config/archr-dts/R36S-DTB/R36S/Panel 5/rk3326-r35s-linux.dtb b/config/archr-dts/R36S-DTB/R36S/Panel 5/rk3326-r35s-linux.dtb deleted file mode 100644 index 6326ef9b80..0000000000 Binary files a/config/archr-dts/R36S-DTB/R36S/Panel 5/rk3326-r35s-linux.dtb and /dev/null differ diff --git a/config/archr-dts/R36S-DTB/R36S/Panel 6/Image b/config/archr-dts/R36S-DTB/R36S/Panel 6/Image deleted file mode 100644 index a18f822d3b..0000000000 Binary files a/config/archr-dts/R36S-DTB/R36S/Panel 6/Image and /dev/null differ diff --git a/config/archr-dts/R36S-DTB/R36S/Panel 6/boot.ini b/config/archr-dts/R36S-DTB/R36S/Panel 6/boot.ini deleted file mode 100644 index 3719453d04..0000000000 --- a/config/archr-dts/R36S-DTB/R36S/Panel 6/boot.ini +++ /dev/null @@ -1,25 +0,0 @@ -odroidgoa-uboot-config - -######################################################################## -# Changes made to this are overwritten every time there's a new upgrade -# To make your changes permanent change it on -# boot.ini.default -# After changing it on boot.ini.default run the bootini command to -# rewrite this file with your personal permanent settings. -######################################################################## - -# Boot Arguments -setenv bootargs "root=UUID='e139ce78-9841-40fe-8823-96a304a09859' rootwait rw fsck.repair=yes net.ifnames=0 fbcon=rotate:0 console=/dev/ttyFIQ0 quiet splash plymouth.ignore-serial-consoles consoleblank=0 vt.global_cursor_default=0" - -# Booting -setenv loadaddr "0x02000000" -setenv initrd_loadaddr "0x01100000" -setenv dtb_loadaddr "0x01f00000" - -load mmc 1:1 ${loadaddr} Image -load mmc 1:1 ${initrd_loadaddr} uInitrd - -load mmc 1:1 ${dtb_loadaddr} rk3326-r35s-linux.dtb - -booti ${loadaddr} ${initrd_loadaddr} ${dtb_loadaddr} - diff --git a/config/archr-dts/R36S-DTB/R36S/Panel 6/rk3326-r35s-linux.dtb b/config/archr-dts/R36S-DTB/R36S/Panel 6/rk3326-r35s-linux.dtb deleted file mode 100644 index 0d1ea0da7f..0000000000 Binary files a/config/archr-dts/R36S-DTB/R36S/Panel 6/rk3326-r35s-linux.dtb and /dev/null differ diff --git a/config/archr-dts/R36S-DTB/R46H/boot.ini b/config/archr-dts/R36S-DTB/R46H/boot.ini deleted file mode 100644 index 995a985cb0..0000000000 --- a/config/archr-dts/R36S-DTB/R46H/boot.ini +++ /dev/null @@ -1,15 +0,0 @@ -odroidgoa-uboot-config - -setenv bootargs "root=/dev/mmcblk0p2 rootwait rw fsck.repair=yes net.ifnames=0 fbcon=rotate:0 console=/dev/ttyFIQ0 quiet splash consoleblank=0 vt.global_cursor_default=0" - -# Booting -setenv loadaddr "0x02000000" -setenv initrd_loadaddr "0x04000000" -setenv dtb_loadaddr "0x01f00000" - -load mmc 1:1 ${loadaddr} Image -load mmc 1:1 ${initrd_loadaddr} uInitrd - -load mmc 1:1 ${dtb_loadaddr} rk3326-r46h-linux.dtb - -booti ${loadaddr} ${initrd_loadaddr} ${dtb_loadaddr} diff --git a/config/archr-dts/R36S-DTB/R46H/rk3326-r46h-linux.dtb b/config/archr-dts/R36S-DTB/R46H/rk3326-r46h-linux.dtb deleted file mode 100644 index cabf391382..0000000000 Binary files a/config/archr-dts/R36S-DTB/R46H/rk3326-r46h-linux.dtb and /dev/null differ diff --git a/config/archr-dts/R36S-DTB/RGB20S/boot.ini b/config/archr-dts/R36S-DTB/RGB20S/boot.ini deleted file mode 100644 index 5741ad0bf4..0000000000 --- a/config/archr-dts/R36S-DTB/RGB20S/boot.ini +++ /dev/null @@ -1,25 +0,0 @@ -odroidgoa-uboot-config - -######################################################################## -# Changes made to this are overwritten every time there's a new upgrade -# To make your changes permanent change it on -# boot.ini.default -# After changing it on boot.ini.default run the bootini command to -# rewrite this file with your personal permanent settings. -######################################################################## - -# Boot Arguments -setenv bootargs "root=UUID='e139ce78-9841-40fe-8823-96a304a09859' rootwait rw fsck.repair=yes net.ifnames=0 fbcon=rotate:0 console=/dev/ttyFIQ0 quiet splash plymouth.ignore-serial-consoles consoleblank=0 vt.global_cursor_default=0" - -# Booting -setenv loadaddr "0x02000000" -setenv initrd_loadaddr "0x01100000" -setenv dtb_loadaddr "0x01f00000" - -load mmc 1:1 ${loadaddr} Image -load mmc 1:1 ${initrd_loadaddr} uInitrd - -load mmc 1:1 ${dtb_loadaddr} rk3326-rgb20s-linux.dtb - -booti ${loadaddr} ${initrd_loadaddr} ${dtb_loadaddr} - diff --git a/config/archr-dts/R36S-DTB/RGB20S/rk3326-rg351mp-linux.dtb b/config/archr-dts/R36S-DTB/RGB20S/rk3326-rg351mp-linux.dtb deleted file mode 100644 index c9d63c8797..0000000000 Binary files a/config/archr-dts/R36S-DTB/RGB20S/rk3326-rg351mp-linux.dtb and /dev/null differ diff --git a/config/archr-dts/R36S-DTB/RGB20S/rk3326-rg351mp-linux.dtb.tony b/config/archr-dts/R36S-DTB/RGB20S/rk3326-rg351mp-linux.dtb.tony deleted file mode 100644 index c9d63c8797..0000000000 Binary files a/config/archr-dts/R36S-DTB/RGB20S/rk3326-rg351mp-linux.dtb.tony and /dev/null differ diff --git a/config/archr-dts/R36S-DTB/RGB20S/rk3326-rgb20s-linux.dtb b/config/archr-dts/R36S-DTB/RGB20S/rk3326-rgb20s-linux.dtb deleted file mode 100644 index c9d63c8797..0000000000 Binary files a/config/archr-dts/R36S-DTB/RGB20S/rk3326-rgb20s-linux.dtb and /dev/null differ diff --git a/config/archr-dts/R36S-clone-plugin-overlays/eeclone-mipi-panel-640x480.dts b/config/archr-dts/R36S-clone-plugin-overlays/eeclone-mipi-panel-640x480.dts deleted file mode 100644 index 51e49c4df4..0000000000 --- a/config/archr-dts/R36S-clone-plugin-overlays/eeclone-mipi-panel-640x480.dts +++ /dev/null @@ -1,109 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * MIPI panel overlay for RK3326 EE-clone handhelds with 640x480 (HVGA) panel - * and ST7703-style init via archr,generic-dsi. - * - * Applied on top of rk3326-gameconsole-eeclone.dtb (clone image). - * Contributors: community (Arch R) - */ - -/dts-v1/; - -/ { - - fragment@0 { - target-path = "/"; - - __overlay__ { - - dsi@ff450000 { - - panel@0 { - compatible = "archr,generic-dsi"; - panel_description = "G size=153,85 delays=20,20,20,120,20 format=rgb888 lanes=4 flags=0xe03\0M clock=30000 horizontal=640,150,50,150 vertical=480,20,6,12 default=1\0M clock=30000 horizontal=640,150,61,150 vertical=480,20,88,12\0M clock=30000 horizontal=640,150,60,150 vertical=480,20,88,12\0M clock=30010 horizontal=640,150,72,150 vertical=480,20,81,12\0M clock=30130 horizontal=640,150,60,150 vertical=480,20,12,12\0M clock=35920 horizontal=640,150,59,150 vertical=480,20,90,12\0M clock=31440 horizontal=640,150,61,150 vertical=480,20,12,12\0M clock=31080 horizontal=640,150,60,150 vertical=480,20,6,12\0M clock=32750 horizontal=640,150,96,150 vertical=480,20,14,12\0M clock=45250 horizontal=640,150,66,150 vertical=480,20,84,12\0M clock=46620 horizontal=640,150,60,150 vertical=480,20,6,12\0M clock=62160 horizontal=640,150,60,150 vertical=480,20,6,12\0I seq=b9f11283\0I seq=b1000000da80\0I seq=b2001370\0I seq=b31010282803ff00000000\0I seq=b480\0I seq=b50a0a\0I seq=b68282\0I seq=b82662f063\0I seq=ba338105f90e0e2000000000000000442500900a0000014f01000037\0I seq=bc47\0I seq=bf021100\0I seq=c0737350500000125000\0I seq=c15300323277d1cccc77773333\0I seq=c68200bfff00ff\0I seq=c7b8000a000000\0I seq=c810401e02\0I seq=cc0b\0I seq=e000070d37353f4144060c0d0f111012141a00070d37353f4144060c0d0f111012141a\0I seq=e307070b0b0b0b00000000ff00c010\0I seq=e9c810020000b0b11131232880b0b127080004020000000004020000008888ba60240888888888888888ba713518888888888800000001000000000000000000\0I seq=ea970a820203070000000000008188ba17538888888888888088ba0642888888888888230000028000000000000000000000000000000000000000000000\0I seq=efffff01\0I seq=11 wait=200\0I seq=29 wait=20"; - reset-gpios = <0xffffffff 0x1b 0x01>; - }; - }; - - pinctrl { - - gpio-lcd { - - lcd-rst { - rockchip,pins = <0x03 0x1b 0x00 0xffffffff>; - }; - }; - - vcc18-lcd { - - vcc18-lcd-n { - rockchip,pins = <0x03 0x03 0x00 0xffffffff>; - }; - }; - }; - - vcc18-lcd0 { - gpio = <0xffffffff 0x03 0x00>; - }; - }; - }; - - fragment@1 { - target-path = "/"; - - __overlay__ { - - adc-keys { - status = "okay"; - }; - }; - }; - - fragment@2 { - target = <0xffffffff>; - - __overlay__ { - invert-absx = <0x01>; - invert-absy = <0x01>; - }; - }; - - fragment@3 { - target-path = "/"; - - __overlay__ { - - audio-amplifier { - enable-gpios = <0xffffffff 0x07 0x00>; - }; - - pinctrl { - - speaker { - spk-amp-enable-h { - rockchip,pins = <0x03 0x07 0x00 0xffffffff>; - }; - }; - - headphone { - hp-det { - rockchip,pins = <0x02 0x16 0x00 0xffffffff>; - }; - }; - }; - - rk817-sound-amplified { - status = "okay"; - simple-audio-card,hp-det-gpio = <0xffffffff 0x16 0x00>; - }; - }; - }; - - __fixups__ { - gpio3 = "/fragment@0/__overlay__/dsi@ff450000/panel@0:reset-gpios:0\0/fragment@0/__overlay__/vcc18-lcd0:gpio:0\0/fragment@3/__overlay__/audio-amplifier:enable-gpios:0"; - pcfg_pull_none = "/fragment@0/__overlay__/pinctrl/gpio-lcd/lcd-rst:rockchip,pins:12\0/fragment@0/__overlay__/pinctrl/vcc18-lcd/vcc18-lcd-n:rockchip,pins:12\0/fragment@3/__overlay__/pinctrl/speaker/spk-amp-enable-h:rockchip,pins:12"; - joypad = "/fragment@2:target:0"; - gpio2 = "/fragment@3/__overlay__/rk817-sound-amplified:simple-audio-card,hp-det-gpio:0"; - pcfg_pull_up = "/fragment@3/__overlay__/pinctrl/headphone/hp-det:rockchip,pins:12"; - }; -}; diff --git a/config/archr-dts/clone/G80C-MB V1.1-20250319 Panel 8/rg351v-uboot.dtb b/config/archr-dts/clone/G80C-MB V1.1-20250319 Panel 8/rg351v-uboot.dtb new file mode 100644 index 0000000000..4b0e936f61 Binary files /dev/null and b/config/archr-dts/clone/G80C-MB V1.1-20250319 Panel 8/rg351v-uboot.dtb differ diff --git a/config/archr-dts/clone/G80C-MB V1.1-20250319 Panel 8/rk3326-r36s-linux.dtb b/config/archr-dts/clone/G80C-MB V1.1-20250319 Panel 8/rk3326-r36s-linux.dtb new file mode 100644 index 0000000000..268a86080f Binary files /dev/null and b/config/archr-dts/clone/G80C-MB V1.1-20250319 Panel 8/rk3326-r36s-linux.dtb differ diff --git a/config/archr-dts/clone/G80C-MB V1.1-20250319 Panel 9/rg351v-uboot.dtb b/config/archr-dts/clone/G80C-MB V1.1-20250319 Panel 9/rg351v-uboot.dtb new file mode 100644 index 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from config/archr-dts/R36S-soysauce/Y3506_V05_20251215 2601/rg351v-uboot.dtb rename to config/archr-dts/soysauce/Y3506_V04_20250529 2548 Panel 2/rg351v-uboot.dtb index f800195b2b..7754976b6f 100644 Binary files a/config/archr-dts/R36S-soysauce/Y3506_V05_20251215 2601/rg351v-uboot.dtb and b/config/archr-dts/soysauce/Y3506_V04_20250529 2548 Panel 2/rg351v-uboot.dtb differ diff --git a/config/archr-dts/R36S-soysauce/Y3506_V05_20251215 2601/rk3326-r36s-linux.dtb b/config/archr-dts/soysauce/Y3506_V04_20250529 2548 Panel 2/rk3326-r36s-linux.dtb similarity index 96% rename from config/archr-dts/R36S-soysauce/Y3506_V05_20251215 2601/rk3326-r36s-linux.dtb rename to config/archr-dts/soysauce/Y3506_V04_20250529 2548 Panel 2/rk3326-r36s-linux.dtb index cd034337b7..3934e618be 100644 Binary files a/config/archr-dts/R36S-soysauce/Y3506_V05_20251215 2601/rk3326-r36s-linux.dtb and b/config/archr-dts/soysauce/Y3506_V04_20250529 2548 Panel 2/rk3326-r36s-linux.dtb differ diff --git a/config/archr-dts/R36S-soysauce/Y3506_V04_20250529 2548/rg351p-uboot.dtb b/config/archr-dts/soysauce/Y3506_V04_20250529 2548/rg351p-uboot.dtb similarity index 100% rename from config/archr-dts/R36S-soysauce/Y3506_V04_20250529 2548/rg351p-uboot.dtb rename to config/archr-dts/soysauce/Y3506_V04_20250529 2548/rg351p-uboot.dtb diff --git a/config/archr-dts/R36S-soysauce/Y3506_V04_20250529 2548/rg351v-uboot.dtb b/config/archr-dts/soysauce/Y3506_V04_20250529 2548/rg351v-uboot.dtb similarity index 100% rename from config/archr-dts/R36S-soysauce/Y3506_V04_20250529 2548/rg351v-uboot.dtb rename to config/archr-dts/soysauce/Y3506_V04_20250529 2548/rg351v-uboot.dtb diff --git a/config/archr-dts/R36S-soysauce/Y3506_V04_20250529 2548/rk3326-r36s-linux.dtb b/config/archr-dts/soysauce/Y3506_V04_20250529 2548/rk3326-r36s-linux.dtb similarity index 100% rename from config/archr-dts/R36S-soysauce/Y3506_V04_20250529 2548/rk3326-r36s-linux.dtb rename to config/archr-dts/soysauce/Y3506_V04_20250529 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a/config/archr-dts/R36S-soysauce/Y3506_v03_20241210/rg351p-uboot.dtb b/config/archr-dts/soysauce/Y3506_v03_20241210 2507/rg351p-uboot.dtb similarity index 100% rename from config/archr-dts/R36S-soysauce/Y3506_v03_20241210/rg351p-uboot.dtb rename to config/archr-dts/soysauce/Y3506_v03_20241210 2507/rg351p-uboot.dtb diff --git a/config/archr-dts/R36S-soysauce/Y3506_v03_20241210/rg351v-uboot.dtb b/config/archr-dts/soysauce/Y3506_v03_20241210 2507/rg351v-uboot.dtb similarity index 100% rename from config/archr-dts/R36S-soysauce/Y3506_v03_20241210/rg351v-uboot.dtb rename to config/archr-dts/soysauce/Y3506_v03_20241210 2507/rg351v-uboot.dtb diff --git a/config/archr-dts/R36S-soysauce/Y3506_v03_20241210/rk3326-r36s-linux.dtb b/config/archr-dts/soysauce/Y3506_v03_20241210 2507/rk3326-r36s-linux.dtb similarity index 97% rename from config/archr-dts/R36S-soysauce/Y3506_v03_20241210/rk3326-r36s-linux.dtb rename to config/archr-dts/soysauce/Y3506_v03_20241210 2507/rk3326-r36s-linux.dtb index 594bb8c284..87df449997 100644 Binary files a/config/archr-dts/R36S-soysauce/Y3506_v03_20241210/rk3326-r36s-linux.dtb and b/config/archr-dts/soysauce/Y3506_v03_20241210 2507/rk3326-r36s-linux.dtb differ diff --git a/config/archr-dts/R36S-DTB/R36S/Panel 5/rg351p-kernel.dtb b/config/archr-dts/soysauce/Y3506_v03_20241210 2533/rg351p-uboot.dtb similarity index 71% rename from config/archr-dts/R36S-DTB/R36S/Panel 5/rg351p-kernel.dtb rename to config/archr-dts/soysauce/Y3506_v03_20241210 2533/rg351p-uboot.dtb index 5856f8fca3..2f233904bb 100644 Binary files a/config/archr-dts/R36S-DTB/R36S/Panel 5/rg351p-kernel.dtb and b/config/archr-dts/soysauce/Y3506_v03_20241210 2533/rg351p-uboot.dtb differ diff --git a/config/archr-dts/R36S-DTB/R36S/Panel 6/rg351mp-kernel.dtb b/config/archr-dts/soysauce/Y3506_v03_20241210 2533/rg351v-uboot.dtb similarity index 71% rename from config/archr-dts/R36S-DTB/R36S/Panel 6/rg351mp-kernel.dtb rename to config/archr-dts/soysauce/Y3506_v03_20241210 2533/rg351v-uboot.dtb index 5856f8fca3..2f233904bb 100644 Binary files a/config/archr-dts/R36S-DTB/R36S/Panel 6/rg351mp-kernel.dtb and b/config/archr-dts/soysauce/Y3506_v03_20241210 2533/rg351v-uboot.dtb differ diff --git a/config/archr-dts/R36S-soysauce/Y3506_V05_20251215 2551/rk3326-r36s-linux.dtb b/config/archr-dts/soysauce/Y3506_v03_20241210 2533/rk3326-r36s-linux.dtb similarity index 99% rename from config/archr-dts/R36S-soysauce/Y3506_V05_20251215 2551/rk3326-r36s-linux.dtb rename to config/archr-dts/soysauce/Y3506_v03_20241210 2533/rk3326-r36s-linux.dtb index fe1a820949..0bd85da8ac 100644 Binary files a/config/archr-dts/R36S-soysauce/Y3506_V05_20251215 2551/rk3326-r36s-linux.dtb and b/config/archr-dts/soysauce/Y3506_v03_20241210 2533/rk3326-r36s-linux.dtb differ diff --git a/config/mipi-generator/archr-dtbo.py b/config/mipi-generator/archr-dtbo.py index dca78f7b5b..f958739f03 100644 --- a/config/mipi-generator/archr-dtbo.py +++ b/config/mipi-generator/archr-dtbo.py @@ -71,7 +71,12 @@ def panel_to_desc(panel, args): ] mode = {'clock': clock, 'hor': hor, 'ver': ver} - if (m.get_property("phandle").value == native): + # Some vendor DTBs (e.g. R36S-V20 2025-05-18) omit `phandle` on + # individual modes. A mode without a phandle can't be the native + # default, so skip the comparison instead of crashing. + phandle_prop = m.get_property("phandle") + is_native = phandle_prop is not None and phandle_prop.value == native + if is_native: mode['default'] = True htotal = sum(hor) @@ -80,7 +85,7 @@ def panel_to_desc(panel, args): if fps not in modes: modes[fps] = mode - if (m.get_property("phandle").value == native): + if is_native: modes[fps]['default'] = True orig_def_fps = fps @@ -374,18 +379,19 @@ def make_dtbo(dtb_data, args): pass - # If stock DTB does not have ADC keys, disable adc-keys in overlay + # If the vendor DTB explicitly disables /adc-keys, mirror that decision + # in the overlay. We deliberately do NOT treat "/adc-keys absent" as + # MyMini hardware: most ArchR vendor DTBs are partial extractions that + # don't ship that node even when the underlying board has K36-style + # single-ADC sticks. Auto-detecting MyMini from absence broke input on + # every K36 R36S in our 43-board set. Default is K36 unless JPmm is + # explicitly requested or /adc-keys is present-but-disabled. need_adckeys_disable = False - if not dt.exist_node('/adc-keys'): - need_adckeys_disable = True - else: + if dt.exist_node('/adc-keys'): adckeys_orig = dt.get_node('/adc-keys') adckeys_status = adckeys_orig.get_property('status') if (adckeys_status) and (adckeys_status.value == 'disabled'): need_adckeys_disable = True - else: - # usually we just don't have status property, so consider this valid - need_adckeys_disable = False if need_adckeys_disable: noadck_ovl = add_overlay(overlay, '/') overlay.set_property('dtbo_comment', 'deliberately-disabled-adc-keys', path=noadck_ovl.path+'/__overlay__/adc-keys') @@ -443,10 +449,24 @@ def make_dtbo(dtb_data, args): force_simple_audio_routing = ('SRs' in args['flags']) + # Detect amplifier GPIO. Direct `spk-con-gpio` on the sound node is + # the legacy path. Newer R36S clones (post-2025-03-18 batches) wire + # the amplifier through `rockchip,codec/spk-ctl-gpios` instead, so + # we follow the codec phandle as a fallback. + amp_gpio = None + if not force_simple_audio_routing: + if snd.exist_property('spk-con-gpio'): + amp_gpio = snd.get_property('spk-con-gpio').data + elif snd.exist_property('rockchip,codec'): + snd_codec_ph = snd.get_property('rockchip,codec').value + snd_codec_path = resolve_phandle(dt, snd_codec_ph) + snd_codec = dt.get_node(snd_codec_path) + if snd_codec.exist_property('spk-ctl-gpios'): + amp_gpio = snd_codec.get_property('spk-ctl-gpios').data + # Determine preset, configure amplifier if needed - if snd.exist_property('spk-con-gpio') and not force_simple_audio_routing: + if amp_gpio: rk817_path = hpdet_ovl.path+'/__overlay__/rk817-sound-amplified' - amp_gpio = snd.get_property('spk-con-gpio').data amp_gpio_sym = [p.name for p in symbols.props if p.value == resolve_phandle(dt, amp_gpio[0])][0] gpio_num = int(amp_gpio_sym[4:]) args['logger'].info(f"spk-con-gpio {amp_gpio_sym} {amp_gpio[1]} on {hpdet_ovl.path}") diff --git a/config/mipi-generator/generator.sh b/config/mipi-generator/generator.sh index f70ef1e47f..d7f020733e 100755 --- a/config/mipi-generator/generator.sh +++ b/config/mipi-generator/generator.sh @@ -3,29 +3,34 @@ #============================================================================== # Arch R - Generate Panel DTBO Overlays #============================================================================== -# Generates DTBO overlay files for ALL panel variants using archr-dtbo.py +# Each MB (motherboard) variant lives under config/archr-dts/// +# and ships its kernel DTB as rk3326-r36s-linux.dtb. We extract one DTBO per +# MB folder, named after the folder (spaces → underscores) so users can pick +# the exact MB instead of a generic "Panel N" that historically collided +# across distinct boards. # # Sources: -# - R36S originals: DTS in config/archr-dts/R36S-DTB/DTS/ -# - R36S clones: DTBs in config/archr-dts/R36S-Clones-DTB/ -# - EE clone plugin overlays: hand-written overlay DTS in -# config/archr-dts/R36S-clone-plugin-overlays/ (compiled with dtc -@ only) +# config/archr-dts/clone//rk3326-r36s-linux.dtb +# config/archr-dts/original//rk3326-r36s-linux.dtb +# config/archr-dts/soysauce//rk3326-r36s-linux.dtb # -# Output: -# - output/panels/original/ -> overlays for original R36S image -# - output/panels/clone/ -> overlays for clone R36S image +# Outputs: +# config/mipi-generator/output/clone/.dtbo +# config/mipi-generator/output/original/.dtbo +# config/mipi-generator/output/soysauce/.dtbo #============================================================================== -# Don't use set -e: individual panel failures should not abort the entire script set +e SCRIPT_DIR="$(cd "$(dirname "${BASH_SOURCE[0]}")" && pwd)" ROOT_DIR="$(dirname "$(dirname "$SCRIPT_DIR")")" -DTS_DIR="${ROOT_DIR}/config/archr-dts/R36S-DTB/DTS" -CLONES_DIR="${ROOT_DIR}/config/archr-dts/R36S-Clones-DTB" -OUTPUT_ORIG="${ROOT_DIR}/config/mipi-generator/output/original" -OUTPUT_CLONE="${ROOT_DIR}/config/mipi-generator/output/clone" +DTS_ROOT="${ROOT_DIR}/config/archr-dts" +OUTPUT_BASE="${MIPI_OUT:-${ROOT_DIR}/config/mipi-generator/output}" DTBO_TOOL="$SCRIPT_DIR/archr-dtbo.py" +INPUT_DTB_NAME="rk3326-r36s-linux.dtb" + +# Subdevices to process. Order matters only for log readability. +SUBDEVICES=(original clone soysauce) RED='\033[0;31m' GREEN='\033[0;32m' @@ -35,242 +40,145 @@ log() { echo -e "${GREEN}[PANEL]${NC} $1"; } warn() { echo -e "${YELLOW}[PANEL] WARNING:${NC} $1"; } error() { echo -e "${RED}[PANEL] ERROR:${NC} $1"; exit 1; } -# Check prerequisites command -v dtc &>/dev/null || error "dtc not found" command -v python3 &>/dev/null || error "python3 not found" python3 -c "import fdt" 2>/dev/null || error "Python fdt package not found. Install with: pip3 install fdt" [ -f "$DTBO_TOOL" ] || error "archr-dtbo.py not found at: $DTBO_TOOL" -mkdir -p "$OUTPUT_ORIG" "$OUTPUT_CLONE" -TMPDIR=$(mktemp -d) -trap "rm -rf $TMPDIR" EXIT - GENERATED=0 FAILED=0 +SKIPPED=0 -#------------------------------------------------------------------------------ -# Helper: generate overlay from DTS file (compile DTS->DTB, then run dtbo.py) -#------------------------------------------------------------------------------ -generate_from_dts() { - local dts_file="$1" - local out_file="$2" - local flags="$3" - local label="$4" - - if [ ! -f "$dts_file" ]; then - warn " DTS not found: $dts_file" - FAILED=$((FAILED + 1)) - return 1 - fi - - local tmp_dtb="$TMPDIR/$(basename "${dts_file%.dts}").dtb" - if ! dtc -I dts -O dtb -@ "$dts_file" -o "$tmp_dtb" 2>/dev/null; then - warn " Failed to compile DTS: $(basename "$dts_file")" - FAILED=$((FAILED + 1)) - return 1 - fi - - if python3 "$DTBO_TOOL" "$tmp_dtb" $flags -o "$out_file" 2>/dev/null; then - local sz=$(stat -c%s "$out_file") - log " OK: $(basename "$out_file") (${sz} bytes) [$label]" - GENERATED=$((GENERATED + 1)) - else - warn " archr-dtbo.py failed: $(basename "$out_file")" - FAILED=$((FAILED + 1)) - return 1 - fi +# Map "G80C-MB V1.1-20250319 Panel 8" → "G80C-MB_V1.1-20250319_Panel_8". +# Spaces are the only character that needs taming; dashes, dots and digits +# are already filename-safe. +sanitize_mb_name() { + echo "${1// /_}" } -#------------------------------------------------------------------------------ -# Helper: generate overlay from pre-compiled DTB -#------------------------------------------------------------------------------ -generate_from_dtb() { - local dtb_file="$1" - local out_file="$2" - local flags="$3" - local label="$4" - - if [ ! -f "$dtb_file" ]; then - warn " DTB not found: $dtb_file" - FAILED=$((FAILED + 1)) - return 1 - fi - - if python3 "$DTBO_TOOL" "$dtb_file" $flags -o "$out_file" 2>/dev/null; then - local sz=$(stat -c%s "$out_file") - log " OK: $(basename "$out_file") (${sz} bytes) [$label]" - GENERATED=$((GENERATED + 1)) - else - warn " archr-dtbo.py failed: $(basename "$out_file")" - FAILED=$((FAILED + 1)) - return 1 - fi -} - -#------------------------------------------------------------------------------ -# Helper: compile overlay plugin DTS with dtc -@ (no archr-dtbo.py) -#------------------------------------------------------------------------------ -generate_from_plugin_dts() { - local dts_file="$1" - local out_file="$2" +generate_overlay() { + local dtb="$1" + local out="$2" local label="$3" + local flags="$4" # optional, e.g. "JPmm-SRs" - if [ ! -f "$dts_file" ]; then - warn " Plugin DTS not found: $dts_file" - FAILED=$((FAILED + 1)) - return 1 - fi + local cmd=(python3 "$DTBO_TOOL" "$dtb") + [ -n "$flags" ] && cmd+=("$flags") + cmd+=(-o "$out") - if dtc -I dts -O dtb -@ "$dts_file" -o "$out_file" 2>/dev/null; then - local sz=$(stat -c%s "$out_file") - log " OK: $(basename "$out_file") (${sz} bytes) [$label]" + if "${cmd[@]}" 2>/dev/null; then + local sz=$(stat -c%s "$out") + log " OK: $(basename "$out") (${sz} bytes) [$label]" GENERATED=$((GENERATED + 1)) else - warn " dtc failed plugin overlay: $(basename "$dts_file")" + warn " archr-dtbo.py failed: $(basename "$out")" FAILED=$((FAILED + 1)) return 1 fi } -#------------------------------------------------------------------------------ -# Original R36S panels (DTS files) -#------------------------------------------------------------------------------ -log "=== Original R36S Panel Overlays ===" -log "Source: $DTS_DIR" -log "Output: $OUTPUT_ORIG" -log "" +# 6 variants per panel cover every joypad×audio override the user can pick +# from the flasher UI. Dno (skip vendor mode) is applied as a runtime string +# transform on panel_description so we don't need to multiply this set by 2. +# +# Default-joypad mapping: every R36S board we ship is K36-style except for +# the Y3506 family ("soysauce") which uses MyMini-style multi-ADC sticks. +# Our vendor DTBs are partial extracts that don't expose /adc-keys, so the +# generator can't auto-detect — we baked the choice in here per subdevice. +# +# Suffix pairs: | +# "" | "" -> default for the subdevice +# "JPk36" | "_JPk36" -> force K36 joypad +# "JPmm" | "_JPmm" -> force MyMini joypad +# "SRs" | "_SRs" -> force simple audio routing +# "JPk36-SRs" | "_JPk36_SRs" -> K36 joypad + simple audio +# "JPmm-SRs" | "_JPmm_SRs" -> MyMini joypad + simple audio +VARIANT_FLAGS_K36=("" "JPk36" "JPmm" "SRs" "JPk36-SRs" "JPmm-SRs") +VARIANT_SUFFIX_K36=("" "_JPk36" "_JPmm" "_SRs" "_JPk36_SRs" "_JPmm_SRs") +VARIANT_FLAGS_MM=("JPmm" "JPk36" "JPmm" "JPmm-SRs" "JPk36-SRs" "JPmm-SRs") +VARIANT_SUFFIX_MM=("" "_JPk36" "_JPmm" "_SRs" "_JPk36_SRs" "_JPmm_SRs") -# Panel index -> DTS filename -declare -A ORIG_PANELS=( - [panel0]="Panel0.dts" - [panel1]="Panel1.dts" - [panel2]="Panel2.dts" - [panel3]="Panel3.dts" - [panel4]="Panel4.dts" - [panel4-v22]="Panel4-V22.dts" - [panel5]="Panel5.dts" - [r35s-rumble]="R35S-Rumble.dts" - [r36s-plus]="R36S-Plus.dts" - [r46h]="R46H.dts" - [rgb20s]="RGB20S.dts" -) +# Pick the variant flag/suffix arrays that match each subdevice's expected +# default. Names are matched literally against $sd. +default_variant_arrays() { + case "$1" in + soysauce) + echo "MM" + ;; + *) + echo "K36" + ;; + esac +} -ORIG_ORDER=(panel0 panel1 panel2 panel3 panel4 panel4-v22 panel5 r35s-rumble r36s-plus r46h rgb20s) +process_subdevice() { + local sd="$1" + local src_dir="${DTS_ROOT}/${sd}" + local out_dir="${OUTPUT_BASE}/${sd}" -for key in "${ORIG_ORDER[@]}"; do - dts="${ORIG_PANELS[$key]}" - log "Original ${key}: ${dts}" - generate_from_dts "$DTS_DIR/$dts" "$OUTPUT_ORIG/${key}.dtbo" "" "$key" -done + if [ ! -d "$src_dir" ]; then + warn "Subdevice source dir missing: $src_dir" + return + fi -# Panel 6: no DTS source, use stock DTB -log "Original panel6: R36S/Panel 6/rk3326-r35s-linux.dtb" -generate_from_dtb "${ROOT_DIR}/config/archr-dts/R36S-DTB/R36S/Panel 6/rk3326-r35s-linux.dtb" "$OUTPUT_ORIG/panel6.dtbo" "" "panel6" + mkdir -p "$out_dir" -#------------------------------------------------------------------------------ -# Clone R36S panels (pre-compiled DTBs) -#------------------------------------------------------------------------------ -log "" -log "=== Clone R36S Panel Overlays ===" -log "Source: $CLONES_DIR" -log "Output: $OUTPUT_CLONE" -log "" - -declare -A CLONE_PANELS=( - [clone_panel_1]="Panel 1/rf3536k4ka.dtb" - [clone_panel_2]="Panel 2/rf3536k4ka.dtb" - [clone_panel_3]="Panel 3/rf3536k4ka.dtb" - [clone_panel_4]="Panel 4/rf3536k4ka.dtb" - [clone_panel_5]="Panel 5/rf3536k4ka.dtb" - [clone_panel_6]="Panel 6/rf3536k4ka.dtb" - [clone_panel_7]="Panel 7/rf3536k4ka.dtb" - [clone_panel_8]="Panel 8/rf3536k4ka.dtb" - [clone_panel_9]="Panel 9/rf3536k4ka.dtb" - [clone_panel_10]="Panel 10/rf3536k3ka.dtb" - [r36_max]="R36 Max/rf3536k4ka.dtb" - [rx6s]="RX6S/rf351g3ka.dtb" -) - -CLONE_ORDER=(clone_panel_1 clone_panel_2 clone_panel_3 clone_panel_4 clone_panel_5 - clone_panel_6 clone_panel_7 clone_panel_8 clone_panel_9 clone_panel_10 - r36_max rx6s) - -for key in "${CLONE_ORDER[@]}"; do - dtb="${CLONE_PANELS[$key]}" - log "Clone ${key}: ${dtb}" - generate_from_dtb "$CLONES_DIR/$dtb" "$OUTPUT_CLONE/${key}.dtbo" "" "$key" -done - -#------------------------------------------------------------------------------ -# Clone R36S — hand-written plugin overlays (dts → dtbo via dtc -@) -#------------------------------------------------------------------------------ -PLUGIN_CLONE_DTS_DIR="${ROOT_DIR}/config/archr-dts/R36S-clone-plugin-overlays" -log "" -log "=== Clone EE plugin overlays (dtc -@) ===" -log "Source: $PLUGIN_CLONE_DTS_DIR" -log "Output: $OUTPUT_CLONE" -log "" - -declare -A PLUGIN_CLONE_DTS=( - [clone_panel_11]="eeclone-mipi-panel-640x480.dts" -) - -PLUGIN_CLONE_ORDER=(clone_panel_11) - -for key in "${PLUGIN_CLONE_ORDER[@]}"; do - dts="${PLUGIN_CLONE_DTS[$key]}" - log "Plugin clone ${key}: ${dts}" - generate_from_plugin_dts "$PLUGIN_CLONE_DTS_DIR/$dts" "$OUTPUT_CLONE/${key}.dtbo" "$key" -done - -#------------------------------------------------------------------------------ -# Soysauce R36S panels (pre-compiled DTBs from Y3506 variants) -#------------------------------------------------------------------------------ -SOYSAUCE_DIR="${ROOT_DIR}/config/archr-dts/R36S-soysauce" -OUTPUT_SOYSAUCE="${MIPI_OUT:-${ROOT_DIR}/config/mipi-generator/output}/soysauce" -mkdir -p "$OUTPUT_SOYSAUCE" - -if [ -d "$SOYSAUCE_DIR" ]; then - log "" - log "=== Soysauce R36S Panel Overlays ===" - log "Source: $SOYSAUCE_DIR" - log "Output: $OUTPUT_SOYSAUCE" log "" + log "=== ${sd} panel overlays ===" + log "Source: $src_dir" + log "Output: $out_dir" - declare -A SOYSAUCE_PANELS=( - [ss_v03_20241104]="Y3506_V03_20241104/rk3326-r36s-linux.dtb" - [ss_v03_20241210]="Y3506_v03_20241210/rk3326-r36s-linux.dtb" - [ss_v03_20250317]="Y3506_V03_20250317/rk3326-r36s-linux.dtb" - [ss_v04_20250529_253x]="Y3506_V04_20250529 253x Panel 6/rk3326-r36s-linux.dtb" - [ss_v04_20250529_2548]="Y3506_V04_20250529 2548/rk3326-r36s-linux.dtb" - [ss_v05_20251215_2551]="Y3506_V05_20251215 2551/rk3326-r36s-linux.dtb" - [ss_v05_20251215_2601]="Y3506_V05_20251215 2601/rk3326-r36s-linux.dtb" - ) + local kind="$(default_variant_arrays "$sd")" + local -n flags_arr="VARIANT_FLAGS_${kind}" + local -n suffix_arr="VARIANT_SUFFIX_${kind}" + log "Default joypad: ${kind} (${flags_arr[0]:-K36})" - SOYSAUCE_ORDER=(ss_v03_20241104 ss_v03_20241210 ss_v03_20250317 - ss_v04_20250529_253x ss_v04_20250529_2548 - ss_v05_20251215_2551 ss_v05_20251215_2601) + local count=0 + # Sort makes output deterministic across filesystems. + while IFS= read -r mb_dir; do + local mb_name="$(basename "$mb_dir")" + local input_dtb="${mb_dir}/${INPUT_DTB_NAME}" - for key in "${SOYSAUCE_ORDER[@]}"; do - dtb="${SOYSAUCE_PANELS[$key]}" - log "Soysauce ${key}: ${dtb}" - generate_from_dtb "$SOYSAUCE_DIR/$dtb" "$OUTPUT_SOYSAUCE/${key}.dtbo" "" "$key" - done -fi + if [ ! -f "$input_dtb" ]; then + warn " ${mb_name}: missing ${INPUT_DTB_NAME}" + SKIPPED=$((SKIPPED + 1)) + continue + fi + + local sanitized="$(sanitize_mb_name "$mb_name")" + log " ${mb_name}" + + local i + for i in "${!flags_arr[@]}"; do + local flags="${flags_arr[$i]}" + local suffix="${suffix_arr[$i]}" + local out_file="${out_dir}/${sanitized}${suffix}.dtbo" + generate_overlay "$input_dtb" "$out_file" "${sd}/${mb_name}${suffix}" "$flags" + done + count=$((count + 1)) + done < <(find "$src_dir" -mindepth 1 -maxdepth 1 -type d | sort) + + if [ "$count" -eq 0 ]; then + warn "${sd}: no MB folders found" + fi +} + +mkdir -p "$OUTPUT_BASE" + +for sd in "${SUBDEVICES[@]}"; do + process_subdevice "$sd" +done -#------------------------------------------------------------------------------ -# Summary -#------------------------------------------------------------------------------ log "" log "=== Panel Generation Complete ===" -log "Generated: ${GENERATED} Failed: ${FAILED}" -log "" -log "Original overlays: $OUTPUT_ORIG/" -ls -1 "$OUTPUT_ORIG"/*.dtbo 2>/dev/null | while read f; do - log " $(basename "$f") ($(stat -c%s "$f") bytes)" -done -log "" -log "Clone overlays: $OUTPUT_CLONE/" -ls -1 "$OUTPUT_CLONE"/*.dtbo 2>/dev/null | while read f; do - log " $(basename "$f") ($(stat -c%s "$f") bytes)" +log "Generated: ${GENERATED} Failed: ${FAILED} Skipped: ${SKIPPED}" + +for sd in "${SUBDEVICES[@]}"; do + out_dir="${OUTPUT_BASE}/${sd}" + [ -d "$out_dir" ] || continue + log "" + log "${sd} overlays: ${out_dir}/" + ls -1 "$out_dir"/*.dtbo 2>/dev/null | while read -r f; do + log " $(basename "$f") ($(stat -c%s "$f") bytes)" + done done diff --git a/config/mipi-generator/output/clone/clone_panel_1.dtbo b/config/mipi-generator/output/clone/clone_panel_1.dtbo deleted file mode 100644 index 6021ad941e..0000000000 Binary files a/config/mipi-generator/output/clone/clone_panel_1.dtbo and /dev/null differ diff --git a/config/mipi-generator/output/clone/clone_panel_10.dtbo b/config/mipi-generator/output/clone/clone_panel_10.dtbo deleted file mode 100644 index b3dff201e4..0000000000 Binary files a/config/mipi-generator/output/clone/clone_panel_10.dtbo and /dev/null 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6b814c64a6..0000000000 Binary files a/config/mipi-generator/output/soysauce/ss_v05_20251215_2601.dtbo and /dev/null differ diff --git a/distributions/ArchR/options b/distributions/ArchR/options index 2e7b211ae8..15f96ca15b 100644 --- a/distributions/ArchR/options +++ b/distributions/ArchR/options @@ -148,11 +148,10 @@ # swap support enabled per default (yes / no) SWAP_ENABLED_DEFAULT="yes" -# swap size if SWAP_SUPPORT=yes in MB - SWAPSIZE="384" - -# swap type if SWAP_SUPPORT=yes (file / zram) - SWAP_TYPE="file" +# Vestigial LibreELEC vars: SWAPSIZE and SWAP_TYPE are NOT read by +# ArchR's util-linux package.mk (it uses ZRAM_SWAP_SIZE / SWAP_FILE_SIZE +# / ZRAM_COMPRESSION_ALGO from device options). Swap policy on each +# device is zram-only when SWAP_FILE_SIZE=0; see RK3326/options. # Default weston terminal font size WESTONFONTSIZE="14" diff --git a/packages/graphics/mesa/package.mk b/packages/graphics/mesa/package.mk index 2aa37d410a..8fa9ab44b9 100644 --- a/packages/graphics/mesa/package.mk +++ b/packages/graphics/mesa/package.mk @@ -11,7 +11,7 @@ PKG_URL="https://mesa.freedesktop.org/archive/mesa-${PKG_VERSION}.tar.xz" PKG_DEPENDS_HOST="toolchain:host expat:host libclc:host libdrm:host Mako:host pyyaml:host spirv-tools:host" PKG_DEPENDS_TARGET="toolchain expat libdrm Mako:host pyyaml:host" PKG_LONGDESC="Mesa is a 3-D graphics library with an API." -PKG_BUILD_FLAGS="+speed" +PKG_BUILD_FLAGS="+speed +lto" get_graphicdrivers diff --git a/projects/ArchR/devices/RK3326/linux/linux.aarch64.conf b/projects/ArchR/devices/RK3326/linux/linux.aarch64.conf index 7af9922c3f..7eb8a757a6 100644 --- a/projects/ArchR/devices/RK3326/linux/linux.aarch64.conf +++ b/projects/ArchR/devices/RK3326/linux/linux.aarch64.conf @@ -6646,7 +6646,7 @@ CONFIG_DMA_CMA=y # # Default contiguous memory area size: # -CONFIG_CMA_SIZE_MBYTES=64 +CONFIG_CMA_SIZE_MBYTES=96 CONFIG_CMA_SIZE_SEL_MBYTES=y # CONFIG_CMA_SIZE_SEL_PERCENTAGE is not set # CONFIG_CMA_SIZE_SEL_MIN is not set diff --git a/projects/ArchR/devices/RK3326/patches/linux/000-rk3326-dts.patch b/projects/ArchR/devices/RK3326/patches/linux/000-rk3326-dts.patch index 7b6a2eeb18..7d2e7d3d96 100644 --- a/projects/ArchR/devices/RK3326/patches/linux/000-rk3326-dts.patch +++ b/projects/ArchR/devices/RK3326/patches/linux/000-rk3326-dts.patch @@ -76,7 +76,7 @@ pmugrf: syscon@ff010000 { compatible = "rockchip,px30-pmugrf", "syscon", "simple-mfd"; reg = <0x0 0xff010000 0x0 0x1000>; -@@ -1077,10 +1106,14 @@ +@@ -1077,10 +1106,19 @@ opp-hz = /bits/ 64 <400000000>; opp-microvolt = <1050000>; }; @@ -89,11 +89,16 @@ + opp-600000000 { + opp-hz = /bits/ 64 <600000000>; + opp-microvolt = <1150000>; ++ }; ++ opp-650000000 { ++ opp-hz = /bits/ 64 <650000000>; ++ opp-microvolt = <1150000>; ++ turbo-mode; + }; }; - + gpu: gpu@ff400000 { -@@ -1091,10 +1124,25 @@ +@@ -1091,10 +1129,25 @@ ; interrupt-names = "job", "mmu", "gpu"; clocks = <&cru SCLK_GPU>; diff --git a/projects/ArchR/packages/archr/config/system/configs/system.cfg b/projects/ArchR/packages/archr/config/system/configs/system.cfg index 17be19c224..3fa9664d52 100644 --- a/projects/ArchR/packages/archr/config/system/configs/system.cfg +++ b/projects/ArchR/packages/archr/config/system/configs/system.cfg @@ -181,6 +181,7 @@ system.battery.warning=0 system.battery.warning_threshold=25 system.hostname=@DEVICENAME@ system.language=en_US +system.cpugovernor=ondemand system.loglevel=none system.merged.storage=0 system.shutdown_delay=900 diff --git a/projects/ArchR/packages/archr/profile.d/099-freqfunctions b/projects/ArchR/packages/archr/profile.d/099-freqfunctions index a43bd877d8..07039ed104 100644 --- a/projects/ArchR/packages/archr/profile.d/099-freqfunctions +++ b/projects/ArchR/packages/archr/profile.d/099-freqfunctions @@ -53,6 +53,65 @@ set_cpu_gov() { done } +# Toggle the CPU turbo OPP. On RK3326 the 1512 MHz OPP is marked +# turbo-mode in the DT, which means cpufreq-dt excludes it from the +# regular ladder until cpufreq/boost=1. Without this the ondemand and +# performance governors top out at 1416 MHz, regardless of how the +# floor is pinned. +set_cpu_boost() { + [ -e /sys/devices/system/cpu/cpufreq/boost ] || return + case ${1} in + on|1) echo 1 >/sys/devices/system/cpu/cpufreq/boost 2>/dev/null ;; + off|0) echo 0 >/sys/devices/system/cpu/cpufreq/boost 2>/dev/null ;; + esac +} + +# Pin CPU max_freq across all policies to the highest available OPP +# (boost included if cpufreq/boost=1 was already toggled). Mirrors the +# GPU helper above. ROCKNIX achieves the same effect by trimming the DT +# ladder; we keep the full ladder for idle and force the ceiling up at +# runtime. +set_cpu_max_freq() { + for POLICY in /sys/devices/system/cpu/cpufreq/policy[0-9]*; do + [ -e "${POLICY}/scaling_max_freq" ] || continue + [ -e "${POLICY}/cpuinfo_max_freq" ] || continue + + local target="" + case ${1} in + highest) + target=$(cat "${POLICY}/cpuinfo_max_freq") + ;; + *) + target=${1} + ;; + esac + + [ -n "${target}" ] && echo "${target}" >"${POLICY}/scaling_max_freq" 2>/dev/null + done +} + +set_cpu_min_freq() { + for POLICY in /sys/devices/system/cpu/cpufreq/policy[0-9]*; do + [ -e "${POLICY}/scaling_min_freq" ] || continue + [ -e "${POLICY}/cpuinfo_min_freq" ] || continue + + local target="" + case ${1} in + highest) + target=$(cat "${POLICY}/cpuinfo_max_freq") + ;; + lowest) + target=$(cat "${POLICY}/cpuinfo_min_freq") + ;; + *) + target=${1} + ;; + esac + + [ -n "${target}" ] && echo "${target}" >"${POLICY}/scaling_min_freq" 2>/dev/null + done +} + set_dmc_gov() { if [ -e "${DMC_FREQ}/governor" ]; then for governor in $1 dmc_$1 simple_$1; do @@ -75,16 +134,60 @@ set_gpu_gov() { fi } +# Pin GPU min_freq to floor a workload at a given OPP. Without this, devfreq +# can sit at 200/300 MHz at the start of a frame and miss vsync; ROCKNIX +# achieves a similar effect by exposing only one OPP in DT. We do it at +# runtime so suspend/idle can still drop to low OPPs. +set_gpu_min_freq() { + [ -e "${GPU_FREQ}/min_freq" ] || return + [ -e "${GPU_FREQ}/available_frequencies" ] || return + + local target="" + case ${1} in + highest) + target=$(tr ' ' '\n' <"${GPU_FREQ}/available_frequencies" | sort -n | tail -n1) + ;; + lowest) + target=$(tr ' ' '\n' <"${GPU_FREQ}/available_frequencies" | sort -n | head -n1) + ;; + *) + target=${1} + ;; + esac + + [ -n "${target}" ] && echo "${target}" >"${GPU_FREQ}/min_freq" 2>/dev/null +} + onlinethreads() { set_online_threads ${1} ${2} } +# Restore the user-configured boost setting. Idle/menu paths call this so +# that turning the device's "Turbo Mode" toggle off in the UI is honored +# outside gameplay; gameplay always overrides it on for the duration of +# the run. +restore_cpu_boost() { + local TURBO_SETTING + TURBO_SETTING=$(get_setting "enable.turbo-mode" 2>/dev/null) + case ${TURBO_SETTING} in + 1) set_cpu_boost on ;; + *) set_cpu_boost off ;; + esac +} + performance() { + # Force boost ON regardless of the user setting during gameplay so the + # 1512 MHz OPP is reachable. RK3326's BSP-marked turbo OPP is otherwise + # locked behind cpufreq/boost. ondemand/schedutil paths restore the + # user preference. + set_cpu_boost on set_cpu_gov performance + set_cpu_max_freq highest set_dmc_gov performance } ondemand() { + restore_cpu_boost set_cpu_gov ondemand set_dmc_gov ondemand # Tune ondemand: stay at high freq longer, reduce switching overhead @@ -98,6 +201,7 @@ ondemand() { } schedutil() { + restore_cpu_boost set_cpu_gov schedutil set_dmc_gov ondemand } @@ -114,8 +218,16 @@ get_gpu_performance_level() { gpu_performance_level() { case ${1} in auto|default) + # Restore governor; do NOT lower min_freq here. Direct min_freq writes + # at game exit (especially while Panfrost is mid-teardown of the GL + # context) caused immediate kernel reboots on R36S V22 boards. Governor + # ondemand naturally drops cur_freq when idle, which is enough. set_gpu_gov ondemand ;; + performance) + set_gpu_gov performance + set_gpu_min_freq highest + ;; *) set_gpu_gov ${1} ;; diff --git a/projects/ArchR/packages/archr/sources/scripts/runemu.sh b/projects/ArchR/packages/archr/sources/scripts/runemu.sh index d7a58ef0d1..9a45eff3ea 100755 --- a/projects/ArchR/packages/archr/sources/scripts/runemu.sh +++ b/projects/ArchR/packages/archr/sources/scripts/runemu.sh @@ -4,15 +4,19 @@ # Copyright (C) 2019-present Shanti Gilbert (https://github.com/shantigilbert) # Copyright (C) 2023 JELOS (https://github.com/JustEnoughLinuxOS) -# Persist debug log to storage (survives reboot) -RUNEMU_DEBUG="/storage/.cache/log/runemu-debug.log" -exec 2>>"${RUNEMU_DEBUG}" -set -x - # Source predefined functions and variables . /etc/profile . /etc/os-release +### Shell trace + persistent debug log are gated by system.loglevel=verbose. +### Default (off/none/quiet) writes nothing to microSD on launch. +if [ "$(get_setting system.loglevel)" = "verbose" ]; then + RUNEMU_DEBUG="/storage/.cache/log/runemu-debug.log" + mkdir -p "$(dirname "${RUNEMU_DEBUG}")" + exec 2>>"${RUNEMU_DEBUG}" + set -x +fi + ### Switch to performance mode early to speed up configuration and reduce time it takes to get into games. performance @@ -101,13 +105,47 @@ EOF function quit() { ${VERBOSE} && log $0 "Cleaning up and exiting" bluetooth enable + resume_background_services + restore_ksm set_kill set "emulationstation" clear_screen + # Restore CPU governor to user pref (or ondemand fallback). Without + # the fallback the CPU stays in performance + boost after exit + # because performance() unconditionally turns boost on for the + # 1512 MHz turbo OPP, draining battery in the menu. DEVICE_CPU_GOVERNOR=$(get_setting system.cpugovernor) - ${DEVICE_CPU_GOVERNOR} + case "${DEVICE_CPU_GOVERNOR}" in + performance|ondemand|schedutil|powersave) + ${DEVICE_CPU_GOVERNOR} + ;; + *) + ondemand + ;; + esac exit $1 } +# KSM (Kernel Same-page Merging) compares page contents across processes +# to deduplicate memory. On a Cortex-A35 in-order core it's a noticeable +# source of jitter — exactly the kind of background CPU eater that shows +# up as p99 frametime spikes during gameplay. Pause it for the duration +# of the run and put it back the way the user/memory-manager left it on +# exit. +KSM_RUN_FILE="/sys/kernel/mm/ksm/run" +KSM_PREVIOUS_STATE="" + +function pause_ksm() { + [ -e "${KSM_RUN_FILE}" ] || return + KSM_PREVIOUS_STATE="$(cat "${KSM_RUN_FILE}" 2>/dev/null)" + echo 0 > "${KSM_RUN_FILE}" 2>/dev/null +} + +function restore_ksm() { + [ -e "${KSM_RUN_FILE}" ] || return + [ -z "${KSM_PREVIOUS_STATE}" ] && return + echo "${KSM_PREVIOUS_STATE}" > "${KSM_RUN_FILE}" 2>/dev/null +} + function clear_screen() { ${VERBOSE} && log $0 "Clearing screen" clear @@ -134,6 +172,29 @@ function bluetooth() { fi } +### Sync/VPN/HTTP daemons compete with the emulator for CPU, RAM and microSD +### I/O. Stop them on launch and restart only the ones that were running on +### exit (so we never enable a service the user had off). +GAMEPLAY_PAUSE_SERVICES="syncthing tailscaled zerotier-one simple-http-server" +SERVICES_PAUSED_DURING_GAME="" + +function pause_background_services() { + for svc in ${GAMEPLAY_PAUSE_SERVICES}; do + if systemctl is-active --quiet "${svc}" 2>/dev/null; then + ${VERBOSE} && log $0 "Pausing ${svc} for gameplay" + systemctl stop "${svc}" >/dev/null 2>&1 + SERVICES_PAUSED_DURING_GAME+=" ${svc}" + fi + done +} + +function resume_background_services() { + for svc in ${SERVICES_PAUSED_DURING_GAME}; do + ${VERBOSE} && log $0 "Resuming ${svc} after gameplay" + systemctl start "${svc}" >/dev/null 2>&1 & + done +} + ### Enable logging case $(get_setting system.loglevel) in off|none) @@ -152,6 +213,8 @@ esac loginit "$1" "$2" "$3" "$4" clear_screen bluetooth disable +pause_background_services +pause_ksm set_kill stop ### Determine which emulator we're launching and make appropriate adjustments before launching. @@ -335,13 +398,23 @@ esac COOLINGPROFILE=$(get_setting cooling.profile) ### Configure GPU performance mode +### Default to "performance" during gameplay so devfreq pins min_freq at the +### highest OPP. ROCKNIX achieves the same effect by exposing only one GPU +### OPP (560 MHz) in their DT; we keep the full ladder for idle/menu and +### force the floor up here. Without this, simple_ondemand kept the GPU +### oscillating between 200-400 MHz mid-frame, costing ~50% of PSP/N64/DC +### performance versus competing distros. GPUPERF=$(get_setting "gpuperf" "${PLATFORM}" "${ROMNAME##*/}") -if [ ! -z ${GPUPERF} ] -then - ${VERBOSE} && log $0 "Set GPU performance to (${GPUPERF})" - gpu_performance_level ${GPUPERF} - get_gpu_performance_level >/tmp/.gpu_performance_level -fi +GPUPERF="${GPUPERF:-performance}" +${VERBOSE} && log $0 "Set GPU performance to (${GPUPERF})" +gpu_performance_level ${GPUPERF} +get_gpu_performance_level >/tmp/.gpu_performance_level + +### Make sure Mesa's shader cache directory exists. Mesa won't create the +### root path itself when MESA_SHADER_CACHE_DIR points somewhere new; the +### result is silent fall-through to "no cache" and a stutter every time +### the user re-launches a game whose shaders should already be hot. +[ -d /storage/.cache/mesa_shader_cache ] || mkdir -p /storage/.cache/mesa_shader_cache 2>/dev/null if [ "${DEVICE_HAS_FAN}" = "true" ] then @@ -442,15 +515,21 @@ then systemctl restart fancontrol & fi -### Restore system GPU performance mode +### Restore system GPU performance mode. +### Honour an explicit per-system setting if the user picked one. Otherwise +### keep the governor at "performance" — every transition back to ondemand +### exercises a regulator/clock refcount path in mali_kbase that fires +### "unbalanced disables for vdd_logic" / "Enabling unprepared clk_gpu" +### kernel WARNs and occasionally takes the device down. Battery cost of +### staying performance in the menu is small; PM stability is worth it. GPUPERF=$(get_setting "system.gpuperf") if [ ! -z ${GPUPERF} ] then ${VERBOSE} && log $0 "Restore system GPU performance mode (${GPUPERF})" gpu_performance_level ${GPUPERF} & else - ${VERBOSE} && log $0 "Restore system GPU performance mode (auto)" - gpu_performance_level auto & + ${VERBOSE} && log $0 "Keeping GPU governor at performance (mali_kbase PM workaround)" + # No-op: leave whatever gameplay set in place. fi rm -f /tmp/.gpu_performance_level 2>/dev/null diff --git a/projects/ArchR/packages/emulators/libretro/retroarch/sources/RK3326/retroarch.cfg b/projects/ArchR/packages/emulators/libretro/retroarch/sources/RK3326/retroarch.cfg index 5f791f34e0..e2e893128c 100755 --- a/projects/ArchR/packages/emulators/libretro/retroarch/sources/RK3326/retroarch.cfg +++ b/projects/ArchR/packages/emulators/libretro/retroarch/sources/RK3326/retroarch.cfg @@ -730,7 +730,7 @@ video_allow_rotate = "true" video_aspect_ratio = "-1.000000" video_aspect_ratio_auto = "true" video_black_frame_insertion = "0" -video_context_driver = "wayland" +video_context_driver = "" video_crop_overscan = "true" video_ctx_scaling = "false" video_disable_composition = "false" @@ -742,8 +742,8 @@ video_font_path = "/usr/share/retroarch-assets/xmb/monochrome/font.ttf" video_font_size = "32.000000" video_force_aspect = "true" video_force_srgb_disable = "false" -video_frame_delay = "4" -video_frame_delay_auto = "true" +video_frame_delay = "0" +video_frame_delay_auto = "false" video_fullscreen = "true" video_fullscreen_x = "0" video_fullscreen_y = "0" diff --git a/projects/ArchR/packages/emulators/standalone/duckstation-sa/config/RK3326/settings.ini b/projects/ArchR/packages/emulators/standalone/duckstation-sa/config/RK3326/settings.ini index 55c4a716aa..792c4a149f 100644 --- a/projects/ArchR/packages/emulators/standalone/duckstation-sa/config/RK3326/settings.ini +++ b/projects/ArchR/packages/emulators/standalone/duckstation-sa/config/RK3326/settings.ini @@ -33,7 +33,7 @@ PatchFastBoot = true [GPU] -Renderer = OpenGL +Renderer = Software Adapter = ResolutionScale = 1 Multisamples = 1 diff --git a/projects/ArchR/packages/emulators/standalone/flycast-sa/config/RK3326/emu.cfg b/projects/ArchR/packages/emulators/standalone/flycast-sa/config/RK3326/emu.cfg index 1495bc564d..72b7876b44 100644 --- a/projects/ArchR/packages/emulators/standalone/flycast-sa/config/RK3326/emu.cfg +++ b/projects/ArchR/packages/emulators/standalone/flycast-sa/config/RK3326/emu.cfg @@ -2,10 +2,11 @@ backend = auto [config] -rend.Resolution = 480 +rend.Resolution = 240 pvr.rend = 0 pvr.AutoSkipFrame = 2 pvr.RenderToTextureBuffer = 0 +rend.RenderToTextureBuffer = 0 rend.TextureUpscale = 1 rend.Fog = 1 rend.FloatVMUs = 0 @@ -15,6 +16,7 @@ rend.SuperWideScreen = no rend.vsync = yes ta_skip = 0 rend.ThreadedRendering = 1 +aica.DSPEnabled = 0 aica.NoBatch = 0 Dynarec.Enabled = 1 Dynarec.idleskip = 1 diff --git a/projects/ArchR/packages/emulators/standalone/melonds-sa/scripts/start_melonds.sh b/projects/ArchR/packages/emulators/standalone/melonds-sa/scripts/start_melonds.sh index 8800d09030..10b9298f53 100644 --- a/projects/ArchR/packages/emulators/standalone/melonds-sa/scripts/start_melonds.sh +++ b/projects/ArchR/packages/emulators/standalone/melonds-sa/scripts/start_melonds.sh @@ -90,14 +90,14 @@ case "$GRENDERER" in esac #Internal Resolution -if [ "$IRES" > "0" ]; then +if [ "${IRES:-0}" -gt 0 ] 2>/dev/null; then sed -i "/^GL_ScaleFactor=/c\GL_ScaleFactor=$IRES" "${CONF_DIR}/${MELONDS_INI}" else sed -i '/^GL_ScaleFactor=/c\GL_ScaleFactor=1' "${CONF_DIR}/${MELONDS_INI}" fi #Screen Orientation -if [ "$SORIENTATION" > "0" ]; then +if [ "${SORIENTATION:-0}" -gt 0 ] 2>/dev/null; then sed -i "/^ScreenLayout=/c\ScreenLayout=$SORIENTATION" "${CONF_DIR}/${MELONDS_INI}" else sed -i '/^ScreenLayout=/c\ScreenLayout=2' "${CONF_DIR}/${MELONDS_INI}" @@ -137,7 +137,7 @@ else fi #Screen Rotation -if [ "$SROTATION" ] >"0"; then +if [ "${SROTATION:-0}" -gt 0 ] 2>/dev/null; then sed -i "/^ScreenRotation=/c\ScreenRotation=$SROTATION" "${CONF_DIR}/${MELONDS_INI}" else sed -i '/^ScreenRotation=/c\ScreenRotation=0' "${CONF_DIR}/${MELONDS_INI}" diff --git a/projects/ArchR/packages/emulators/standalone/ppsspp-sa/scripts/start_ppsspp.sh b/projects/ArchR/packages/emulators/standalone/ppsspp-sa/scripts/start_ppsspp.sh index bd91ee32b0..9b3118dbfd 100755 --- a/projects/ArchR/packages/emulators/standalone/ppsspp-sa/scripts/start_ppsspp.sh +++ b/projects/ArchR/packages/emulators/standalone/ppsspp-sa/scripts/start_ppsspp.sh @@ -42,11 +42,14 @@ else unset EMUPERF fi - #Auto Frame Skip - if [ "${ASKIP}" = "1" ]; then - sed -i '/AutoFrameSkip =/c\AutoFrameSkip = True' ${CONF_DIR}/${PPSSPP_INI} - else + #Auto Frame Skip — default ON when no explicit setting. RK3326 cannot + #sustain 60fps in heavier PSP titles; without auto-skip the user sees + #15fps stutter instead of a smooth 25-30. Users that prefer no skipping + #can flip the per-platform / per-game setting to "0". + if [ "${ASKIP}" = "0" ]; then sed -i '/^AutoFrameSkip =/c\AutoFrameSkip = False' ${CONF_DIR}/${PPSSPP_INI} + else + sed -i '/AutoFrameSkip =/c\AutoFrameSkip = True' ${CONF_DIR}/${PPSSPP_INI} fi #Graphics Backend diff --git a/projects/ArchR/packages/emulators/standalone/ppsspp-sa/sources/RK3326/ppsspp.ini b/projects/ArchR/packages/emulators/standalone/ppsspp-sa/sources/RK3326/ppsspp.ini index a36f9c256d..73a47bbab1 100755 --- a/projects/ArchR/packages/emulators/standalone/ppsspp-sa/sources/RK3326/ppsspp.ini +++ b/projects/ArchR/packages/emulators/standalone/ppsspp-sa/sources/RK3326/ppsspp.ini @@ -81,7 +81,7 @@ FuncReplacements = True HideSlowWarnings = False HideStateWarnings = False PreloadFunctions = False -CPUSpeed = 333 +CPUSpeed = 0 JitDisableFlags = 0x00000000 FunctionReplacements = True [Graphics] @@ -102,13 +102,13 @@ BufferFiltering = 1 InternalResolution = 1 AndroidHwScale = 1 HighQualityDepth = 0 -FrameSkip = 1 +FrameSkip = 3 FrameSkipType = 0 AutoFrameSkip = True FrameRate = -1 FrameRate2 = -1 FrameSkipUnthrottle = True -ForceMaxEmulatedFPS = 0 +ForceMaxEmulatedFPS = 30 AnisotropyLevel = 0 VertexDecCache = True TextureBackoffCache = True @@ -146,8 +146,8 @@ UnthrottleMode = CONTINUOUS IgnoreScreenInsets = True TexHardwareScaling = False TextureShader = Off -InflightFrames = 2 -RenderDuplicateFrames = False +InflightFrames = 3 +RenderDuplicateFrames = True ShaderChainRequires60FPS = False ClearFramebuffersOnFirstUseHack = False SoftwareRendererJit = True diff --git a/projects/ArchR/packages/graphics/gpudriver/package.mk b/projects/ArchR/packages/graphics/gpudriver/package.mk index 4702895a14..ef47793f54 100644 --- a/projects/ArchR/packages/graphics/gpudriver/package.mk +++ b/projects/ArchR/packages/graphics/gpudriver/package.mk @@ -27,8 +27,12 @@ post_makeinstall_target() { DTB_OVERLAY_UNLOAD="\/usr\/bin\/dtb_overlay set driver-gpu None" ;; *) + # No DTB overlay shipped for this device. The gpudriver script + # detects the empty placeholder and (a) hides panfrost from the + # UI, (b) refuses runtime switches, and (c) on boot falls back to + # libmali if a stale setting still points at panfrost. PAN="panfrost" - DTB_OVERLAY="" + DTB_OVERLAY_LOAD="" DTB_OVERLAY_UNLOAD="" ;; esac diff --git a/projects/ArchR/packages/graphics/gpudriver/sources/bin/gpudriver b/projects/ArchR/packages/graphics/gpudriver/sources/bin/gpudriver index 78d9ca74bd..375dab95b8 100755 --- a/projects/ArchR/packages/graphics/gpudriver/sources/bin/gpudriver +++ b/projects/ArchR/packages/graphics/gpudriver/sources/bin/gpudriver @@ -6,15 +6,41 @@ GPU_DRIVER_SETTING_KEY="gpu.driver" +# When the device ships no panfrost DTB overlay, panfrost selection is a +# brick: even with the runtime fallback, sway/UI starts before the +# fallback finishes, leaves a half-initialized GPU, and the next boot +# ends in a black screen. Detect the empty placeholder substituted by +# package.mk and refuse panfrost in that case. +DTB_OVERLAY_LOAD_CMD="@DTB_OVERLAY_LOAD@" +PANFROST_AVAILABLE=true +[ -z "${DTB_OVERLAY_LOAD_CMD}" ] && PANFROST_AVAILABLE=false + get_current_driver() { CONFDRIVER=$(get_setting ${GPU_DRIVER_SETTING_KEY}) if [ -z ${CONFDRIVER} ]; then CONFDRIVER="libmali" # DEFAULT set_setting ${GPU_DRIVER_SETTING_KEY} ${CONFDRIVER} fi + # Self-heal: stale "panfrost" setting on a device that can't run it. + if [ "${CONFDRIVER}" = "panfrost" ] && [ "${PANFROST_AVAILABLE}" = "false" ]; then + logger -t gpudriver "panfrost not supported on this device (no DTB overlay); reverting to libmali" + CONFDRIVER="libmali" + set_setting ${GPU_DRIVER_SETTING_KEY} ${CONFDRIVER} + fi } +# Verify the GPU node ended up bound to a kernel driver. A successful +# modprobe doesn't always mean the driver actually attached to the +# hardware (mismatched compatible string, regulator/clock failure, etc). +# `/sys/class/drm/card0` only exists when *some* DRM driver is bound. +gpu_is_bound() { + for c in /sys/class/drm/card[0-9]*; do + [ -e "$c" ] && return 0 + done + return 1 +} + # When loading a driver, do two things: # * ensure needed driver is loaded and other is not # * ensure graphics related libs are overridden (or not) @@ -23,7 +49,7 @@ load_driver() { case ${DRIVER_TO_LOAD} in "libmali") - modprobe -r @PAN@ + modprobe -r @PAN@ 2>/dev/null modprobe mali_kbase # Bind-mount mali GLES libraries over mesa if not already done. @@ -42,7 +68,7 @@ load_driver() { done ;; "panfrost") - modprobe -r mali_kbase + modprobe -r mali_kbase 2>/dev/null modprobe @PAN@ mount | grep -q "on /usr/lib/libEGL.so" && find /usr/lib/mali -type f -exec bash -c 'lib={}; umount ${lib/\/mali\//\/}' ';' @@ -63,17 +89,38 @@ load_driver() { case "$1" in "--options") - echo "panfrost libmali" + if [ "${PANFROST_AVAILABLE}" = "true" ]; then + echo "panfrost libmali" + else + echo "libmali" + fi ;; "--start") get_current_driver load_driver ${CONFDRIVER} + # If the requested driver didn't actually bind, fall back to the + # other one so the user gets a graphical system either way. Mali-G31 + # on RK3326 is normally driven by libmali; if mali_kbase decides the + # regulator/clock state is bad it silently fails to bind, leaving a + # composited system with software rasterization that crawls. Try the + # alternate driver instead of letting the user think their device is + # just slow. + if ! gpu_is_bound; then + ALT="libmali" + [ "${CONFDRIVER}" = "libmali" ] && ALT="panfrost" + logger -t gpudriver "${CONFDRIVER} did not bind to GPU; trying ${ALT}" + load_driver "${ALT}" 2>/dev/null + fi ;; "libmali") set_setting ${GPU_DRIVER_SETTING_KEY} $1 @DTB_OVERLAY_UNLOAD@ ;; "panfrost") + if [ "${PANFROST_AVAILABLE}" = "false" ]; then + echo "panfrost is not supported on this device" >&2 + exit 2 + fi set_setting ${GPU_DRIVER_SETTING_KEY} $1 @DTB_OVERLAY_LOAD@ ;; diff --git a/projects/ArchR/packages/hardware/quirks/platforms/RK3326/041-panfrost b/projects/ArchR/packages/hardware/quirks/platforms/RK3326/041-panfrost deleted file mode 100644 index 41480f5e90..0000000000 --- a/projects/ArchR/packages/hardware/quirks/platforms/RK3326/041-panfrost +++ /dev/null @@ -1,14 +0,0 @@ -#!/bin/sh -# SPDX-License-Identifier: GPL-2.0 -# Copyright (C) 2024-present ArchR (https://github.com/archr-linux/Arch-R) - -# Panfrost optimization for Mali-G31 (Bifrost) -# forcepack: reduces draw call overhead by packing vertex attributes -export PAN_MESA_DEBUG=forcepack - -# Skip GL error checking for better performance in emulators -export MESA_NO_ERROR=1 - -# Persistent shader cache - avoids recompilation on every launch -export MESA_SHADER_CACHE_DIR=/storage/.cache/mesa_shader_cache -export MESA_SHADER_CACHE_MAX_SIZE=128MB diff --git a/projects/ArchR/packages/hardware/quirks/profile.d/041-panfrost b/projects/ArchR/packages/hardware/quirks/profile.d/041-panfrost new file mode 100644 index 0000000000..1c64c4abd3 --- /dev/null +++ b/projects/ArchR/packages/hardware/quirks/profile.d/041-panfrost @@ -0,0 +1,20 @@ +#!/bin/sh +# SPDX-License-Identifier: GPL-2.0 +# Copyright (C) 2024-present ArchR (https://github.com/archr-linux/Arch-R) + +# Panfrost / Mali-G31 (Bifrost) tuning. Sourced by /etc/profile so the vars +# reach login shells AND every emulator launched from runemu.sh / start_*.sh +# (which both do `. /etc/profile`). Previously these lived in a quirks/ +# autostart subshell that exited immediately, so the shader cache and Mesa +# error-skip flags never reached emulator processes. + +# forcepack: pack vertex attributes; reduces draw call overhead on G31. +export PAN_MESA_DEBUG=forcepack + +# Skip GL error checking — emulators don't query glGetError defensively. +export MESA_NO_ERROR=1 + +# Persistent shader cache on /storage to survive reboots and avoid +# recompilation every launch. Mesa creates the dir on first write. +export MESA_SHADER_CACHE_DIR=/storage/.cache/mesa_shader_cache +export MESA_SHADER_CACHE_MAX_SIZE=128MB diff --git a/projects/ArchR/packages/hardware/quirks/profile.d/999-export b/projects/ArchR/packages/hardware/quirks/profile.d/999-export index 18eb66d58e..73a807f0a4 100755 --- a/projects/ArchR/packages/hardware/quirks/profile.d/999-export +++ b/projects/ArchR/packages/hardware/quirks/profile.d/999-export @@ -55,6 +55,9 @@ export OS_VERSION \ QUIRK_DEVICE \ UI_SERVICE \ PAN_MESA_DEBUG \ + MESA_NO_ERROR \ + MESA_SHADER_CACHE_DIR \ + MESA_SHADER_CACHE_MAX_SIZE \ WLR_DRM_DEVICES \ WLR_BACKENDS \ WLR_CON \ diff --git a/projects/ArchR/packages/linux-drivers/mali-bifrost/patches/6.12-LTS/002-fix-unbalanced-regulator-clk-pm.patch b/projects/ArchR/packages/linux-drivers/mali-bifrost/patches/6.12-LTS/002-fix-unbalanced-regulator-clk-pm.patch new file mode 100644 index 0000000000..e70d78bf5f --- /dev/null +++ b/projects/ArchR/packages/linux-drivers/mali-bifrost/patches/6.12-LTS/002-fix-unbalanced-regulator-clk-pm.patch @@ -0,0 +1,79 @@ +--- a/product/kernel/drivers/gpu/arm/midgard/platform/devicetree/mali_kbase_runtime_pm.c ++++ b/product/kernel/drivers/gpu/arm/midgard/platform/devicetree/mali_kbase_runtime_pm.c +@@ -30,51 +30,67 @@ + + #include "mali_kbase_config_platform.h" + ++/* Tracks whether *this driver* currently owns enables on the regulators ++ * and clocks. Without it, sharing vdd_logic with rockchip-pm-domain ++ * makes regulator_is_enabled() return true even when our consumer count ++ * is zero, leading to unbalanced regulator_disable() calls on every PM ++ * transition. Single-GPU systems only — fine for RK3326. */ ++static bool gpu_power_held; ++ + static void enable_gpu_power_control(struct kbase_device *kbdev) + { + unsigned int i; + ++ if (gpu_power_held) ++ return; ++ + #if defined(CONFIG_REGULATOR) + for (i = 0; i < kbdev->nr_regulators; i++) { + if (WARN_ON(kbdev->regulators[i] == NULL)) + ; +- else if (!regulator_is_enabled(kbdev->regulators[i])) +- WARN_ON(regulator_enable(kbdev->regulators[i])); ++ else if (regulator_enable(kbdev->regulators[i])) ++ dev_warn(kbdev->dev, "regulator_enable[%u] failed\n", i); + } + #endif + + for (i = 0; i < kbdev->nr_clocks; i++) { + if (WARN_ON(kbdev->clocks[i] == NULL)) + ; +- else if (!__clk_is_enabled(kbdev->clocks[i])) +- WARN_ON(clk_prepare_enable(kbdev->clocks[i])); ++ else if (clk_prepare_enable(kbdev->clocks[i])) ++ dev_warn(kbdev->dev, "clk_prepare_enable[%u] failed\n", i); + } ++ ++ gpu_power_held = true; + } + + static void disable_gpu_power_control(struct kbase_device *kbdev) + { + unsigned int i; + ++ if (!gpu_power_held) ++ return; ++ ++ gpu_power_held = false; ++ + for (i = 0; i < kbdev->nr_clocks; i++) { + if (WARN_ON(kbdev->clocks[i] == NULL)) + ; +- else if (__clk_is_enabled(kbdev->clocks[i])) { ++ else + clk_disable_unprepare(kbdev->clocks[i]); +- WARN_ON(__clk_is_enabled(kbdev->clocks[i])); +- } + } + + #if defined(CONFIG_REGULATOR) + for (i = 0; i < kbdev->nr_regulators; i++) { + if (WARN_ON(kbdev->regulators[i] == NULL)) + ; +- else if (regulator_is_enabled(kbdev->regulators[i])) +- WARN_ON(regulator_disable(kbdev->regulators[i])); ++ else ++ regulator_disable(kbdev->regulators[i]); + } + #endif + + } + ++ + static int pm_callback_power_on(struct kbase_device *kbdev) + { + int ret = 1; /* Assume GPU has been powered off */ diff --git a/projects/ArchR/packages/linux/udev.d/10-bfq-sched.rules b/projects/ArchR/packages/linux/udev.d/10-bfq-sched.rules index c6047bd863..11060205dc 100644 --- a/projects/ArchR/packages/linux/udev.d/10-bfq-sched.rules +++ b/projects/ArchR/packages/linux/udev.d/10-bfq-sched.rules @@ -2,3 +2,4 @@ ACTION=="add|change", KERNEL=="mmcblk[0-9]*", ATTR{queue/scheduler}="bfq" ACTION=="add|change", KERNEL=="mmcblk[0-9]*", ATTR{queue/iosched/low_latency}="1" ACTION=="add|change", KERNEL=="mmcblk[0-9]*", ATTR{queue/read_ahead_kb}="2048" ACTION=="add|change", KERNEL=="mmcblk[0-9]*", ATTR{queue/nr_requests}="128" +ACTION=="add|change", KERNEL=="mmcblk[0-9]*", ATTR{queue/rq_affinity}="2" diff --git a/projects/ArchR/packages/network/simple-http-server/daemons/008-simple-http-server b/projects/ArchR/packages/network/simple-http-server/daemons/008-simple-http-server new file mode 100644 index 0000000000..13260ca9ed --- /dev/null +++ b/projects/ArchR/packages/network/simple-http-server/daemons/008-simple-http-server @@ -0,0 +1,4 @@ +STATE=$(get_setting simplehttp.enabled) +SVC="simple-http-server" +CONF="simplehttp.conf" +DAEMONS=("simple-http-server") diff --git a/projects/ArchR/packages/network/simple-http-server/system.d/simple-http-server.service b/projects/ArchR/packages/network/simple-http-server/system.d/simple-http-server.service index 65d73ab46e..74a9a96ab2 100644 --- a/projects/ArchR/packages/network/simple-http-server/system.d/simple-http-server.service +++ b/projects/ArchR/packages/network/simple-http-server/system.d/simple-http-server.service @@ -3,6 +3,7 @@ Description=simple-http-server Wants=network-pre.target After=network-pre.target RequiresMountsFor=/storage +ConditionPathExists=/storage/.cache/services/simplehttp.conf [Service] ExecStart=/usr/bin/bash -c "source /etc/profile.d/001-functions && /usr/bin/simple-http-server -i -p 80 -a root:$(get_setting root.password) -s -u /storage" diff --git a/projects/ArchR/packages/network/syncthing/daemons/007-syncthing b/projects/ArchR/packages/network/syncthing/daemons/007-syncthing index d1d7a96362..cb45e7de91 100755 --- a/projects/ArchR/packages/network/syncthing/daemons/007-syncthing +++ b/projects/ArchR/packages/network/syncthing/daemons/007-syncthing @@ -1,3 +1,4 @@ STATE=$(get_setting syncthing.enabled) SVC="syncthing" +CONF="syncthing.conf" DAEMONS=("syncthing") diff --git a/projects/ArchR/packages/network/syncthing/system.d/syncthing.service b/projects/ArchR/packages/network/syncthing/system.d/syncthing.service index 590983e4cf..c641546872 100644 --- a/projects/ArchR/packages/network/syncthing/system.d/syncthing.service +++ b/projects/ArchR/packages/network/syncthing/system.d/syncthing.service @@ -1,6 +1,7 @@ [Unit] Description=Start SyncThing After=archr.service +ConditionPathExists=/storage/.cache/services/syncthing.conf [Service] Type=simple diff --git a/projects/ArchR/packages/network/tailscale/daemons/004-tailscaled b/projects/ArchR/packages/network/tailscale/daemons/004-tailscaled index f50adfbbf3..1358f6e108 100755 --- a/projects/ArchR/packages/network/tailscale/daemons/004-tailscaled +++ b/projects/ArchR/packages/network/tailscale/daemons/004-tailscaled @@ -1,3 +1,4 @@ STATE=$(get_setting tailscale.up) SVC="tailscaled" +CONF="tailscaled.conf" DAEMONS=("tailscaled") diff --git a/projects/ArchR/packages/network/tailscale/system.d/tailscaled.service b/projects/ArchR/packages/network/tailscale/system.d/tailscaled.service index 4a58f01f3a..79d1a16e90 100644 --- a/projects/ArchR/packages/network/tailscale/system.d/tailscaled.service +++ b/projects/ArchR/packages/network/tailscale/system.d/tailscaled.service @@ -4,6 +4,7 @@ Documentation=https://tailscale.com/kb/ Wants=network-pre.target After=network-pre.target systemd-resolved.service RequiresMountsFor=/storage +ConditionPathExists=/storage/.cache/services/tailscaled.conf [Service] EnvironmentFile=/storage/.config/tailscaled.defaults diff --git a/projects/ArchR/packages/network/zerotier-one/daemons/004-zerotier-one b/projects/ArchR/packages/network/zerotier-one/daemons/004-zerotier-one index fd5f4d5533..50913074a9 100755 --- a/projects/ArchR/packages/network/zerotier-one/daemons/004-zerotier-one +++ b/projects/ArchR/packages/network/zerotier-one/daemons/004-zerotier-one @@ -1,3 +1,4 @@ STATE=$(get_setting zerotier.up) SVC="zerotier-one" +CONF="zerotier.conf" DAEMONS=("zerotier-one") diff --git a/projects/ArchR/packages/network/zerotier-one/system.d/zerotier-one.service b/projects/ArchR/packages/network/zerotier-one/system.d/zerotier-one.service index 8b0ba6a561..cb088c28bd 100644 --- a/projects/ArchR/packages/network/zerotier-one/system.d/zerotier-one.service +++ b/projects/ArchR/packages/network/zerotier-one/system.d/zerotier-one.service @@ -3,6 +3,7 @@ Description=zerotier-one Wants=network-pre.target After=network-pre.target RequiresMountsFor=/storage +ConditionPathExists=/storage/.cache/services/zerotier.conf [Service] ExecStart=/usr/sbin/zerotier-one /storage/.config/zerotier/ diff --git a/projects/ArchR/packages/sysutils/systemd/config/sysctl.d/archr.conf b/projects/ArchR/packages/sysutils/systemd/config/sysctl.d/archr.conf index 2169da5069..3121911001 100644 --- a/projects/ArchR/packages/sysutils/systemd/config/sysctl.d/archr.conf +++ b/projects/ArchR/packages/sysutils/systemd/config/sysctl.d/archr.conf @@ -1,5 +1,9 @@ kernel.nmi_watchdog=0 -vm.swappiness=1 +# vm.swappiness=100 is the JELOS/ROCKNIX doctrine for zram+THP+MGLRU: +# aggressively swap anonymous memory into compressed RAM to keep physical +# RAM unfragmented for Huge Page allocations. archr-memory-manager applies +# this at boot regardless; we mirror it here for static coherence. +vm.swappiness=100 vm.laptop_mode=0 vm.dirty_writeback_centisecs=1500 vm.dirty_expire_centisecs=3000 diff --git a/projects/ArchR/packages/sysutils/systemd/package.mk b/projects/ArchR/packages/sysutils/systemd/package.mk index deb097e50a..5dd048a246 100644 --- a/projects/ArchR/packages/sysutils/systemd/package.mk +++ b/projects/ArchR/packages/sysutils/systemd/package.mk @@ -319,5 +319,8 @@ post_install() { enable_service systemd-timesyncd.service enable_service systemd-timesyncd-setup.service enable_service systemd-resolved.service - enable_service debug-shell.service + # debug-shell.service is for emergency root access via tty9 — keeping it + # enabled in production wastes RAM (a getty-like process) and exposes a + # passwordless root shell. Disable by default; users that want it can + # enable from settings. } diff --git a/projects/ArchR/packages/sysutils/systemd/tmpfiles.d/z_01_archr.conf b/projects/ArchR/packages/sysutils/systemd/tmpfiles.d/z_01_archr.conf index c2933807fe..e6d7eadba8 100644 --- a/projects/ArchR/packages/sysutils/systemd/tmpfiles.d/z_01_archr.conf +++ b/projects/ArchR/packages/sysutils/systemd/tmpfiles.d/z_01_archr.conf @@ -5,4 +5,5 @@ d /run/archr 0755 root root - - d /run/archr/debug 0755 root root - - d /run/dbus 0755 root root - - d /storage/.cache/rfkill 0755 root root - - +d /storage/.cache/mesa_shader_cache 0755 root root - - L+ /var/lib/systemd/rfkill - - - - /storage/.cache/rfkill diff --git a/weston_pkg_0.2.squashfs b/weston_pkg_0.2.squashfs new file mode 100644 index 0000000000..cec79544ec Binary files /dev/null and b/weston_pkg_0.2.squashfs differ