From 88e7de56c2e3335a2e616bf1f85b54ea8827c71f Mon Sep 17 00:00:00 2001 From: Philippe Simons Date: Wed, 20 Aug 2025 17:43:40 +0200 Subject: [PATCH] linux/kernel: bump to 6.16.3 --- ..._add_display_engine_3_3_de33_support.patch | 140 ---- ...ctection_for_anbernic_rg35xx_devices.patch | 49 -- ...ara_arm64_sunxi_h616_enable_mali_gpu.patch | 599 ------------------ ...ippe_drm_panfrost_enable_g31_on_h616.patch | 260 -------- .../patches/linux/9999-remove-log-spam.patch | 8 +- ...fi_ath12k_install_pairwise_key_first.patch | 218 ------- projects/ROCKNIX/packages/linux/package.mk | 7 +- 7 files changed, 6 insertions(+), 1275 deletions(-) delete mode 100644 projects/ROCKNIX/devices/H700/patches/linux/H700/0004-v3_20250215_ryan_asoc_sun4i_codec_add_headphone_dectection_for_anbernic_rg35xx_devices.patch delete mode 100644 projects/ROCKNIX/devices/H700/patches/linux/H700/0005-v2_20250416_andre_przywara_arm64_sunxi_h616_enable_mali_gpu.patch delete mode 100644 projects/ROCKNIX/devices/H700/patches/linux/H700/0006-v2_20250403_simons_philippe_drm_panfrost_enable_g31_on_h616.patch delete mode 100644 projects/ROCKNIX/devices/SM8550/patches/linux/0600-20250523_quic_bqiang_wifi_ath12k_install_pairwise_key_first.patch diff --git a/projects/ROCKNIX/devices/H700/patches/linux/H700/0001-v8_20250310_ryan_drm_sun4i_add_display_engine_3_3_de33_support.patch b/projects/ROCKNIX/devices/H700/patches/linux/H700/0001-v8_20250310_ryan_drm_sun4i_add_display_engine_3_3_de33_support.patch index 1051488ff6..378fe65a2a 100644 --- a/projects/ROCKNIX/devices/H700/patches/linux/H700/0001-v8_20250310_ryan_drm_sun4i_add_display_engine_3_3_de33_support.patch +++ b/projects/ROCKNIX/devices/H700/patches/linux/H700/0001-v8_20250310_ryan_drm_sun4i_add_display_engine_3_3_de33_support.patch @@ -611,46 +611,6 @@ index 9845a187bdf6..317a27cf590b 100644 -- 2.48.1 -From git@z Thu Jan 1 00:00:00 1970 -Subject: [PATCH v8 6/11] dt-bindings: allwinner: add H616 DE33 clock - binding -From: Ryan Walklin -Date: Mon, 10 Mar 2025 22:09:52 +1300 -Message-Id: <20250310092345.31708-7-ryan@testtoast.com> -MIME-Version: 1.0 -Content-Type: text/plain; charset="utf-8" -Content-Transfer-Encoding: 7bit - -The Allwinner H616 and variants have a new display engine revision -(DE33). - -Add a clock binding for the DE33. - -Signed-off-by: Ryan Walklin -Acked-by: Conor Dooley -Reviewed-by: Chen-Yu Tsai ---- -Changelog v2..v3: -- Separate content into three patches for three separate subsystems ---- - .../devicetree/bindings/clock/allwinner,sun8i-a83t-de2-clk.yaml | 1 + - 1 file changed, 1 insertion(+) - -diff --git a/Documentation/devicetree/bindings/clock/allwinner,sun8i-a83t-de2-clk.yaml b/Documentation/devicetree/bindings/clock/allwinner,sun8i-a83t-de2-clk.yaml -index 70369bd633e4..7fcd55d468d4 100644 ---- a/Documentation/devicetree/bindings/clock/allwinner,sun8i-a83t-de2-clk.yaml -+++ b/Documentation/devicetree/bindings/clock/allwinner,sun8i-a83t-de2-clk.yaml -@@ -25,6 +25,7 @@ properties: - - const: allwinner,sun50i-a64-de2-clk - - const: allwinner,sun50i-h5-de2-clk - - const: allwinner,sun50i-h6-de3-clk -+ - const: allwinner,sun50i-h616-de33-clk - - items: - - const: allwinner,sun8i-r40-de2-clk - - const: allwinner,sun8i-h3-de2-clk --- -2.48.1 - From git@z Thu Jan 1 00:00:00 1970 Subject: [PATCH v8 7/11] dt-bindings: allwinner: add H616 DE33 mixer binding @@ -727,106 +687,6 @@ index b75c1ec686ad..274f5e632733 100644 -- 2.48.1 -From git@z Thu Jan 1 00:00:00 1970 -Subject: [PATCH v8 8/11] clk: sunxi-ng: ccu: add Display Engine 3.3 (DE33) - support -From: Ryan Walklin -Date: Mon, 10 Mar 2025 22:09:54 +1300 -Message-Id: <20250310092345.31708-9-ryan@testtoast.com> -MIME-Version: 1.0 -Content-Type: text/plain; charset="utf-8" -Content-Transfer-Encoding: 7bit - -The DE33 is a newer version of the Allwinner Display Engine IP block, -found in the H616, H618, H700 and T507 SoCs. DE2 and DE3 are already -supported by the mainline driver. - -The DE33 in the H616 has mixer0 and writeback units. The clocks -and resets required are identical to the H3 and H5 respectively, so use -those existing structs for the H616 description. - -There are two additional 32-bit registers (at offsets 0x24 and 0x28) -which require clearing and setting respectively to bring up the -hardware. The function of these registers is currently unknown, and the -values are taken from the out-of-tree driver. - -Add the required clock description struct and compatible string to the -DE2 driver. - -Signed-off-by: Ryan Walklin ---- -Changelog v2..v3: -- Lowercase hex value - -Changelog v2..v3: -- Correct #include for writel() - -Changelog v4..v5: -- Whitespace fix ---- - drivers/clk/sunxi-ng/ccu-sun8i-de2.c | 25 +++++++++++++++++++++++++ - 1 file changed, 25 insertions(+) - -diff --git a/drivers/clk/sunxi-ng/ccu-sun8i-de2.c b/drivers/clk/sunxi-ng/ccu-sun8i-de2.c -index f2aa71206bc2..a6cd0f988859 100644 ---- a/drivers/clk/sunxi-ng/ccu-sun8i-de2.c -+++ b/drivers/clk/sunxi-ng/ccu-sun8i-de2.c -@@ -5,6 +5,7 @@ - - #include - #include -+#include - #include - #include - #include -@@ -239,6 +240,16 @@ static const struct sunxi_ccu_desc sun50i_h5_de2_clk_desc = { - .num_resets = ARRAY_SIZE(sun50i_h5_de2_resets), - }; - -+static const struct sunxi_ccu_desc sun50i_h616_de33_clk_desc = { -+ .ccu_clks = sun8i_de2_ccu_clks, -+ .num_ccu_clks = ARRAY_SIZE(sun8i_de2_ccu_clks), -+ -+ .hw_clks = &sun8i_h3_de2_hw_clks, -+ -+ .resets = sun50i_h5_de2_resets, -+ .num_resets = ARRAY_SIZE(sun50i_h5_de2_resets), -+}; -+ - static int sunxi_de2_clk_probe(struct platform_device *pdev) - { - struct clk *bus_clk, *mod_clk; -@@ -291,6 +302,16 @@ static int sunxi_de2_clk_probe(struct platform_device *pdev) - goto err_disable_mod_clk; - } - -+ /* -+ * The DE33 requires these additional (unknown) registers set -+ * during initialisation. -+ */ -+ if (of_device_is_compatible(pdev->dev.of_node, -+ "allwinner,sun50i-h616-de33-clk")) { -+ writel(0, reg + 0x24); -+ writel(0x0000a980, reg + 0x28); -+ } -+ - ret = devm_sunxi_ccu_probe(&pdev->dev, reg, ccu_desc); - if (ret) - goto err_assert_reset; -@@ -335,6 +356,10 @@ static const struct of_device_id sunxi_de2_clk_ids[] = { - .compatible = "allwinner,sun50i-h6-de3-clk", - .data = &sun50i_h5_de2_clk_desc, - }, -+ { -+ .compatible = "allwinner,sun50i-h616-de33-clk", -+ .data = &sun50i_h616_de33_clk_desc, -+ }, - { } - }; - MODULE_DEVICE_TABLE(of, sunxi_de2_clk_ids); --- -2.48.1 - From git@z Thu Jan 1 00:00:00 1970 Subject: [PATCH v8 9/11] drm: sun4i: de33: vi_scaler: add Display Engine 3.3 (DE33) support diff --git a/projects/ROCKNIX/devices/H700/patches/linux/H700/0004-v3_20250215_ryan_asoc_sun4i_codec_add_headphone_dectection_for_anbernic_rg35xx_devices.patch b/projects/ROCKNIX/devices/H700/patches/linux/H700/0004-v3_20250215_ryan_asoc_sun4i_codec_add_headphone_dectection_for_anbernic_rg35xx_devices.patch deleted file mode 100644 index 7fdcd3b2e9..0000000000 --- a/projects/ROCKNIX/devices/H700/patches/linux/H700/0004-v3_20250215_ryan_asoc_sun4i_codec_add_headphone_dectection_for_anbernic_rg35xx_devices.patch +++ /dev/null @@ -1,49 +0,0 @@ -From git@z Thu Jan 1 00:00:00 1970 -Subject: [PATCH v3 4/5] arm64: dts: allwinner: h700: Add hp-det-gpios for - Anbernic RG35XX -From: Chris Morgan -Date: Sat, 15 Feb 2025 11:02:26 +1300 -Message-Id: <20250214220247.10810-5-ryan@testtoast.com> -MIME-Version: 1.0 -Content-Type: text/plain; charset="utf-8" -Content-Transfer-Encoding: 7bit - -Add support for headphone insertion detection via GPIO for the -RG35XX series, and add the corresponding routing to the codec node. - -Signed-off-by: Chris Morgan -Signed-off-by: Ryan Walklin -Tested-by: Philippe Simons - --- -Changelog v1..v2: -- Remove vendor prefix from GPIO description. -- Whitespace fix - -Changelog v2..v3: -- Add Tested-by tag - ---- - .../boot/dts/allwinner/sun50i-h700-anbernic-rg35xx-2024.dts | 5 ++++- - 1 file changed, 4 insertions(+), 1 deletion(-) - -diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h700-anbernic-rg35xx-2024.dts b/arch/arm64/boot/dts/allwinner/sun50i-h700-anbernic-rg35xx-2024.dts -index a231abf1684ad..b482fdf1fdba8 100644 ---- a/arch/arm64/boot/dts/allwinner/sun50i-h700-anbernic-rg35xx-2024.dts -+++ b/arch/arm64/boot/dts/allwinner/sun50i-h700-anbernic-rg35xx-2024.dts -@@ -178,8 +178,11 @@ reg_vcc5v: regulator-vcc5v { /* USB-C power input */ - }; - - &codec { -- allwinner,audio-routing = "Line Out", "LINEOUT"; -+ /* Both speakers and headphone jack connected to 74HC4052D analog mux*/ -+ allwinner,audio-routing = "Speaker", "LINEOUT", -+ "Headphone", "LINEOUT"; - allwinner,pa-gpios = <&pio 8 5 GPIO_ACTIVE_HIGH>; // PI5 -+ hp-det-gpios = <&pio 8 3 GPIO_ACTIVE_HIGH>; // PI3 - status = "okay"; - }; - --- -2.48.1 - diff --git a/projects/ROCKNIX/devices/H700/patches/linux/H700/0005-v2_20250416_andre_przywara_arm64_sunxi_h616_enable_mali_gpu.patch b/projects/ROCKNIX/devices/H700/patches/linux/H700/0005-v2_20250416_andre_przywara_arm64_sunxi_h616_enable_mali_gpu.patch deleted file mode 100644 index 43bc09ffac..0000000000 --- a/projects/ROCKNIX/devices/H700/patches/linux/H700/0005-v2_20250416_andre_przywara_arm64_sunxi_h616_enable_mali_gpu.patch +++ /dev/null @@ -1,599 +0,0 @@ -From git@z Thu Jan 1 00:00:00 1970 -Subject: [PATCH v2 1/4] dt-bindings: power: Add Allwinner H6/H616 PRCM PPU -From: Andre Przywara -Date: Wed, 16 Apr 2025 23:48:36 +0100 -Message-Id: <20250416224839.9840-2-andre.przywara@arm.com> -MIME-Version: 1.0 -Content-Type: text/plain; charset="utf-8" -Content-Transfer-Encoding: 7bit - -The Allwinner H6 and some later SoCs contain some bits in the PRCM (Power -Reset Clock Management) block that control some power domains. -Those power domains include the one for the GPU, the PLLs and some -analogue circuits. - -Signed-off-by: Andre Przywara -Reviewed-by: Rob Herring (Arm) ---- - .../power/allwinner,sun50i-h6-prcm-ppu.yaml | 42 +++++++++++++++++++ - 1 file changed, 42 insertions(+) - create mode 100644 Documentation/devicetree/bindings/power/allwinner,sun50i-h6-prcm-ppu.yaml - -diff --git a/Documentation/devicetree/bindings/power/allwinner,sun50i-h6-prcm-ppu.yaml b/Documentation/devicetree/bindings/power/allwinner,sun50i-h6-prcm-ppu.yaml -new file mode 100644 -index 0000000000000..7eaff9baf7268 ---- /dev/null -+++ b/Documentation/devicetree/bindings/power/allwinner,sun50i-h6-prcm-ppu.yaml -@@ -0,0 +1,42 @@ -+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) -+%YAML 1.2 -+--- -+$id: http://devicetree.org/schemas/power/allwinner,sun50i-h6-prcm-ppu.yaml# -+$schema: http://devicetree.org/meta-schemas/core.yaml# -+ -+title: Allwinner SoCs PRCM power domain controller -+ -+maintainers: -+ - Andre Przywara -+ -+description: -+ The Allwinner Power Reset Clock Management (PRCM) unit contains bits to -+ control a few power domains. -+ -+properties: -+ compatible: -+ enum: -+ - allwinner,sun50i-h6-prcm-ppu -+ - allwinner,sun50i-h616-prcm-ppu -+ - allwinner,sun55i-a523-prcm-ppu -+ -+ reg: -+ maxItems: 1 -+ -+ '#power-domain-cells': -+ const: 1 -+ -+required: -+ - compatible -+ - reg -+ - '#power-domain-cells' -+ -+additionalProperties: false -+ -+examples: -+ - | -+ prcm_ppu: power-controller@7010210 { -+ compatible = "allwinner,sun50i-h616-prcm-ppu"; -+ reg = <0x07010250 0x10>; -+ #power-domain-cells = <1>; -+ }; --- -2.46.3 - -From git@z Thu Jan 1 00:00:00 1970 -Subject: [PATCH v2 2/4] pmdomain: sunxi: add H6 PRCM PPU driver -From: Andre Przywara -Date: Wed, 16 Apr 2025 23:48:37 +0100 -Message-Id: <20250416224839.9840-3-andre.przywara@arm.com> -MIME-Version: 1.0 -Content-Type: text/plain; charset="utf-8" -Content-Transfer-Encoding: 7bit - -The Allwinner Power Reset Clock Management (RPCM) block contains a few -bits that control some power domains. The most prominent one is the one -for the Mali GPU. On the Allwinner H6 this domain is enabled at reset, so -we didn't care about it so far, but the H616 defaults to it being disabled. - -Add a power domain driver for those bits. Some BSP code snippets and -some spare documentation describe three bits, slightly different between -the H6 and H616, so add three power domains for each SoC, connected to -their compatible string. - -Signed-off-by: Andre Przywara ---- - drivers/pmdomain/sunxi/Kconfig | 10 + - drivers/pmdomain/sunxi/Makefile | 1 + - drivers/pmdomain/sunxi/sun50i-h6-prcm-ppu.c | 208 ++++++++++++++++++++ - 3 files changed, 219 insertions(+) - create mode 100644 drivers/pmdomain/sunxi/sun50i-h6-prcm-ppu.c - -diff --git a/drivers/pmdomain/sunxi/Kconfig b/drivers/pmdomain/sunxi/Kconfig -index 17781bf8d86d7..43eecb3ea9819 100644 ---- a/drivers/pmdomain/sunxi/Kconfig -+++ b/drivers/pmdomain/sunxi/Kconfig -@@ -8,3 +8,13 @@ config SUN20I_PPU - help - Say y to enable the PPU power domain driver. This saves power - when certain peripherals, such as the video engine, are idle. -+ -+config SUN50I_H6_PRCM_PPU -+ tristate "Allwinner H6 PRCM power domain driver" -+ depends on ARCH_SUNXI || COMPILE_TEST -+ depends on PM -+ select PM_GENERIC_DOMAINS -+ help -+ Say y to enable the Allwinner H6/H616 PRCM power domain driver. -+ This is required to enable the Mali GPU in the H616 SoC, it is -+ optional for the H6. -diff --git a/drivers/pmdomain/sunxi/Makefile b/drivers/pmdomain/sunxi/Makefile -index ec1d7a2fb21db..c1343e1237599 100644 ---- a/drivers/pmdomain/sunxi/Makefile -+++ b/drivers/pmdomain/sunxi/Makefile -@@ -1,2 +1,3 @@ - # SPDX-License-Identifier: GPL-2.0-only - obj-$(CONFIG_SUN20I_PPU) += sun20i-ppu.o -+obj-$(CONFIG_SUN50I_H6_PRCM_PPU) += sun50i-h6-prcm-ppu.o -diff --git a/drivers/pmdomain/sunxi/sun50i-h6-prcm-ppu.c b/drivers/pmdomain/sunxi/sun50i-h6-prcm-ppu.c -new file mode 100644 -index 0000000000000..d59644499dfe0 ---- /dev/null -+++ b/drivers/pmdomain/sunxi/sun50i-h6-prcm-ppu.c -@@ -0,0 +1,208 @@ -+// SPDX-License-Identifier: GPL-2.0-only -+/* -+ * Copyright (C) Arm Ltd. 2024 -+ * -+ * Allwinner H6/H616 PRCM power domain driver. -+ * This covers a few registers inside the PRCM (Power Reset Clock Management) -+ * block that control some power rails, most prominently for the Mali GPU. -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+/* -+ * The PRCM block covers multiple devices, starting with some clocks, -+ * then followed by the power rails. -+ * The clocks are covered by a different driver, so this driver's MMIO range -+ * starts later in the PRCM MMIO frame, not at the beginning of it. -+ * To keep the register offsets consistent with other PRCM documentation, -+ * express the registers relative to the beginning of the whole PRCM, and -+ * subtract the PPU offset this driver is bound to. -+ */ -+#define PD_H6_PPU_OFFSET 0x250 -+#define PD_H6_VDD_SYS_REG 0x250 -+#define PD_H616_ANA_VDD_GATE BIT(4) -+#define PD_H6_CPUS_VDD_GATE BIT(3) -+#define PD_H6_AVCC_VDD_GATE BIT(2) -+#define PD_H6_GPU_REG 0x254 -+#define PD_H6_GPU_GATE BIT(0) -+ -+struct sun50i_h6_ppu_pd { -+ struct generic_pm_domain genpd; -+ void __iomem *reg; -+ u32 gate_mask; -+ bool negated; -+}; -+ -+#define FLAG_PPU_ALWAYS_ON BIT(0) -+#define FLAG_PPU_NEGATED BIT(1) -+ -+struct sun50i_h6_ppu_desc { -+ const char *name; -+ u32 offset; -+ u32 mask; -+ unsigned int flags; -+}; -+ -+static const struct sun50i_h6_ppu_desc sun50i_h6_ppus[] = { -+ { "AVCC", PD_H6_VDD_SYS_REG, PD_H6_AVCC_VDD_GATE }, -+ { "CPUS", PD_H6_VDD_SYS_REG, PD_H6_CPUS_VDD_GATE }, -+ { "GPU", PD_H6_GPU_REG, PD_H6_GPU_GATE }, -+}; -+static const struct sun50i_h6_ppu_desc sun50i_h616_ppus[] = { -+ { "PLL", PD_H6_VDD_SYS_REG, PD_H6_AVCC_VDD_GATE, -+ FLAG_PPU_ALWAYS_ON | FLAG_PPU_NEGATED }, -+ { "ANA", PD_H6_VDD_SYS_REG, PD_H616_ANA_VDD_GATE, FLAG_PPU_ALWAYS_ON }, -+ { "GPU", PD_H6_GPU_REG, PD_H6_GPU_GATE, FLAG_PPU_NEGATED }, -+}; -+ -+struct sun50i_h6_ppu_data { -+ const struct sun50i_h6_ppu_desc *descs; -+ int nr_domains; -+}; -+ -+static const struct sun50i_h6_ppu_data sun50i_h6_ppu_data = { -+ .descs = sun50i_h6_ppus, -+ .nr_domains = ARRAY_SIZE(sun50i_h6_ppus), -+}; -+ -+static const struct sun50i_h6_ppu_data sun50i_h616_ppu_data = { -+ .descs = sun50i_h616_ppus, -+ .nr_domains = ARRAY_SIZE(sun50i_h616_ppus), -+}; -+ -+#define to_sun50i_h6_ppu_pd(_genpd) \ -+ container_of(_genpd, struct sun50i_h6_ppu_pd, genpd) -+ -+static bool sun50i_h6_ppu_power_status(const struct sun50i_h6_ppu_pd *pd) -+{ -+ bool bit = readl(pd->reg) & pd->gate_mask; -+ -+ return bit ^ pd->negated; -+} -+ -+static int sun50i_h6_ppu_pd_set_power(const struct sun50i_h6_ppu_pd *pd, -+ bool set_bit) -+{ -+ u32 reg = readl(pd->reg); -+ -+ if (set_bit) -+ writel(reg | pd->gate_mask, pd->reg); -+ else -+ writel(reg & ~pd->gate_mask, pd->reg); -+ -+ return 0; -+} -+ -+static int sun50i_h6_ppu_pd_power_on(struct generic_pm_domain *genpd) -+{ -+ const struct sun50i_h6_ppu_pd *pd = to_sun50i_h6_ppu_pd(genpd); -+ -+ return sun50i_h6_ppu_pd_set_power(pd, !pd->negated); -+} -+ -+static int sun50i_h6_ppu_pd_power_off(struct generic_pm_domain *genpd) -+{ -+ const struct sun50i_h6_ppu_pd *pd = to_sun50i_h6_ppu_pd(genpd); -+ -+ return sun50i_h6_ppu_pd_set_power(pd, pd->negated); -+} -+ -+static int sun50i_h6_ppu_probe(struct platform_device *pdev) -+{ -+ struct device *dev = &pdev->dev; -+ struct genpd_onecell_data *ppu; -+ struct sun50i_h6_ppu_pd *pds; -+ const struct sun50i_h6_ppu_data *data; -+ void __iomem *base; -+ int ret, i; -+ -+ data = of_device_get_match_data(dev); -+ if (!data) -+ return -EINVAL; -+ -+ pds = devm_kcalloc(dev, data->nr_domains, sizeof(*pds), GFP_KERNEL); -+ if (!pds) -+ return -ENOMEM; -+ -+ ppu = devm_kzalloc(dev, sizeof(*ppu), GFP_KERNEL); -+ if (!ppu) -+ return -ENOMEM; -+ -+ ppu->num_domains = data->nr_domains; -+ ppu->domains = devm_kcalloc(dev, data->nr_domains, -+ sizeof(*ppu->domains), GFP_KERNEL); -+ if (!ppu->domains) -+ return -ENOMEM; -+ -+ platform_set_drvdata(pdev, ppu); -+ -+ base = devm_platform_ioremap_resource(pdev, 0); -+ if (IS_ERR(base)) -+ return PTR_ERR(base); -+ -+ for (i = 0; i < data->nr_domains; i++) { -+ struct sun50i_h6_ppu_pd *pd = &pds[i]; -+ const struct sun50i_h6_ppu_desc *desc = &data->descs[i]; -+ -+ pd->genpd.name = desc->name; -+ pd->genpd.power_off = sun50i_h6_ppu_pd_power_off; -+ pd->genpd.power_on = sun50i_h6_ppu_pd_power_on; -+ if (desc->flags & FLAG_PPU_ALWAYS_ON) -+ pd->genpd.flags = GENPD_FLAG_ALWAYS_ON; -+ pd->negated = !!(desc->flags & FLAG_PPU_NEGATED); -+ pd->reg = base + desc->offset - PD_H6_PPU_OFFSET; -+ pd->gate_mask = desc->mask; -+ -+ ret = pm_genpd_init(&pd->genpd, NULL, -+ !sun50i_h6_ppu_power_status(pd)); -+ if (ret) { -+ dev_warn(dev, "Failed to add %s power domain: %d\n", -+ desc->name, ret); -+ goto out_remove_pds; -+ } -+ ppu->domains[i] = &pd->genpd; -+ } -+ -+ ret = of_genpd_add_provider_onecell(dev->of_node, ppu); -+ if (!ret) -+ return 0; -+ -+ dev_warn(dev, "Failed to add provider: %d\n", ret); -+out_remove_pds: -+ for (i--; i >= 0; i--) -+ pm_genpd_remove(&pds[i].genpd); -+ -+ return ret; -+} -+ -+static const struct of_device_id sun50i_h6_ppu_of_match[] = { -+ { .compatible = "allwinner,sun50i-h6-prcm-ppu", -+ .data = &sun50i_h6_ppu_data }, -+ { .compatible = "allwinner,sun50i-h616-prcm-ppu", -+ .data = &sun50i_h616_ppu_data }, -+ { } -+}; -+MODULE_DEVICE_TABLE(of, sun50i_h6_ppu_of_match); -+ -+static struct platform_driver sun50i_h6_ppu_driver = { -+ .probe = sun50i_h6_ppu_probe, -+ .driver = { -+ .name = "sun50i-h6-prcm-ppu", -+ .of_match_table = sun50i_h6_ppu_of_match, -+ /* Power domains cannot be removed while they are in use. */ -+ .suppress_bind_attrs = true, -+ }, -+}; -+module_platform_driver(sun50i_h6_ppu_driver); -+ -+MODULE_AUTHOR("Andre Przywara "); -+MODULE_DESCRIPTION("Allwinner H6 PRCM power domain driver"); -+MODULE_LICENSE("GPL"); --- -2.46.3 - -From git@z Thu Jan 1 00:00:00 1970 -Subject: [PATCH v2 3/4] arm64: dts: allwinner: h616: Add Mali GPU node -From: Andre Przywara -Date: Wed, 16 Apr 2025 23:48:38 +0100 -Message-Id: <20250416224839.9840-4-andre.przywara@arm.com> -MIME-Version: 1.0 -Content-Type: text/plain; charset="utf-8" -Content-Transfer-Encoding: 7bit - -The Allwinner H616 SoC contains a Mali-G31 MP2 GPU, which is of the Mali -Bifrost family. There is a power domain specifically for that GPU, which -needs to be enabled to make use of the it. - -Add the DT nodes for those two devices, and link them together through -the "power-domains" property. -Any board wishing to use the GPU would need to enable the GPU node and -specify the "mali-supply" regulator. - -Signed-off-by: Andre Przywara -Reviewed-by: Jernej Skrabec ---- - .../arm64/boot/dts/allwinner/sun50i-h616.dtsi | 21 +++++++++++++++++++ - 1 file changed, 21 insertions(+) - -diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi -index cdce3dcb8ec02..ceedae9e399b6 100644 ---- a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi -+++ b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi -@@ -150,6 +150,21 @@ soc { - #size-cells = <1>; - ranges = <0x0 0x0 0x0 0x40000000>; - -+ gpu: gpu@1800000 { -+ compatible = "allwinner,sun50i-h616-mali", -+ "arm,mali-bifrost"; -+ reg = <0x1800000 0x40000>; -+ interrupts = , -+ , -+ ; -+ interrupt-names = "job", "mmu", "gpu"; -+ clocks = <&ccu CLK_GPU0>, <&ccu CLK_BUS_GPU>; -+ clock-names = "core", "bus"; -+ power-domains = <&prcm_ppu 2>; -+ resets = <&ccu RST_BUS_GPU>; -+ status = "disabled"; -+ }; -+ - crypto: crypto@1904000 { - compatible = "allwinner,sun50i-h616-crypto"; - reg = <0x01904000 0x800>; -@@ -874,6 +889,12 @@ r_ccu: clock@7010000 { - #reset-cells = <1>; - }; - -+ prcm_ppu: power-controller@7010250 { -+ compatible = "allwinner,sun50i-h616-prcm-ppu"; -+ reg = <0x07010250 0x10>; -+ #power-domain-cells = <1>; -+ }; -+ - nmi_intc: interrupt-controller@7010320 { - compatible = "allwinner,sun50i-h616-nmi", - "allwinner,sun9i-a80-nmi"; --- -2.46.3 - -From git@z Thu Jan 1 00:00:00 1970 -Subject: [PATCH v2 4/4] arm64: dts: allwinner: h616: enable Mali GPU for - all boards -From: Andre Przywara -Date: Wed, 16 Apr 2025 23:48:39 +0100 -Message-Id: <20250416224839.9840-5-andre.przywara@arm.com> -MIME-Version: 1.0 -Content-Type: text/plain; charset="utf-8" -Content-Transfer-Encoding: 7bit - -All Allwinner H616/H618 SoCs contain a Mali G31 MP2 GPU. - -Enable the DT nodes for that GPU, and specify the regulator providing -power to the VDD_GPU pins of the package. The rest of the DT node is set -by the SoC, so is not board specific. - -Signed-off-by: Andre Przywara -Acked-by: Jernej Skrabec ---- - arch/arm64/boot/dts/allwinner/sun50i-h313-tanix-tx1.dts | 5 +++++ - .../boot/dts/allwinner/sun50i-h616-bigtreetech-cb1.dtsi | 5 +++++ - arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero.dtsi | 4 ++++ - arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts | 4 ++++ - arch/arm64/boot/dts/allwinner/sun50i-h616-x96-mate.dts | 5 +++++ - .../boot/dts/allwinner/sun50i-h618-longan-module-3h.dtsi | 5 +++++ - .../arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero2w.dts | 5 +++++ - arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero3.dts | 4 ++++ - .../boot/dts/allwinner/sun50i-h618-transpeed-8k618-t.dts | 5 +++++ - .../boot/dts/allwinner/sun50i-h700-anbernic-rg35xx-2024.dts | 5 +++++ - 10 files changed, 47 insertions(+) - -diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h313-tanix-tx1.dts b/arch/arm64/boot/dts/allwinner/sun50i-h313-tanix-tx1.dts -index 17e6aef67aaf9..7906b79c03898 100644 ---- a/arch/arm64/boot/dts/allwinner/sun50i-h313-tanix-tx1.dts -+++ b/arch/arm64/boot/dts/allwinner/sun50i-h313-tanix-tx1.dts -@@ -79,6 +79,11 @@ &ehci0 { - status = "okay"; - }; - -+&gpu { -+ mali-supply = <®_dcdc1>; -+ status = "okay"; -+}; -+ - &ir { - status = "okay"; - }; -diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616-bigtreetech-cb1.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h616-bigtreetech-cb1.dtsi -index d12b01c5f41b6..bebfeb2a337a3 100644 ---- a/arch/arm64/boot/dts/allwinner/sun50i-h616-bigtreetech-cb1.dtsi -+++ b/arch/arm64/boot/dts/allwinner/sun50i-h616-bigtreetech-cb1.dtsi -@@ -67,6 +67,11 @@ &cpu0 { - cpu-supply = <®_dcdc2>; - }; - -+&gpu { -+ mali-supply = <®_dcdc1>; -+ status = "okay"; -+}; -+ - &mmc0 { - vmmc-supply = <®_dldo1>; - /* Card detection pin is not connected */ -diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero.dtsi -index 908fa3b847a66..a8644fb52b04e 100644 ---- a/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero.dtsi -+++ b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero.dtsi -@@ -77,6 +77,10 @@ &emac0 { - status = "okay"; - }; - -+&gpu { -+ status = "okay"; -+}; -+ - &mdio0 { - ext_rgmii_phy: ethernet-phy@1 { - compatible = "ethernet-phy-ieee802.3-c22"; -diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts -index a360d8567f955..f2e3300e078a9 100644 ---- a/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts -+++ b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts -@@ -24,6 +24,10 @@ &emac0 { - phy-supply = <®_dcdce>; - }; - -+&gpu { -+ mali-supply = <®_dcdcc>; -+}; -+ - &mmc0 { - vmmc-supply = <®_dcdce>; - }; -diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616-x96-mate.dts b/arch/arm64/boot/dts/allwinner/sun50i-h616-x96-mate.dts -index 968960ebf1d18..085f3e4e8eaa8 100644 ---- a/arch/arm64/boot/dts/allwinner/sun50i-h616-x96-mate.dts -+++ b/arch/arm64/boot/dts/allwinner/sun50i-h616-x96-mate.dts -@@ -50,6 +50,11 @@ &ehci2 { - status = "okay"; - }; - -+&gpu { -+ mali-supply = <®_dcdcc>; -+ status = "okay"; -+}; -+ - &ir { - status = "okay"; - }; -diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h618-longan-module-3h.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h618-longan-module-3h.dtsi -index e92d150aaf1c1..3f416d129b727 100644 ---- a/arch/arm64/boot/dts/allwinner/sun50i-h618-longan-module-3h.dtsi -+++ b/arch/arm64/boot/dts/allwinner/sun50i-h618-longan-module-3h.dtsi -@@ -10,6 +10,11 @@ &cpu0 { - cpu-supply = <®_dcdc2>; - }; - -+&gpu { -+ mali-supply = <®_dcdc1>; -+ status = "okay"; -+}; -+ - &mmc2 { - pinctrl-names = "default"; - pinctrl-0 = <&mmc2_pins>; -diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero2w.dts b/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero2w.dts -index a0fe7a9afb77c..b340bbcb710de 100644 ---- a/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero2w.dts -+++ b/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero2w.dts -@@ -69,6 +69,11 @@ &ehci1 { - - /* USB 2 & 3 are on the FPC connector (or the exansion board) */ - -+&gpu { -+ mali-supply = <®_dcdc1>; -+ status = "okay"; -+}; -+ - &mmc0 { - cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */ - bus-width = <4>; -diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero3.dts b/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero3.dts -index e1cd7572a14ce..c51d4d9120dee 100644 ---- a/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero3.dts -+++ b/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero3.dts -@@ -27,6 +27,10 @@ &ext_rgmii_phy { - motorcomm,clk-out-frequency-hz = <125000000>; - }; - -+&gpu { -+ mali-supply = <®_dcdc1>; -+}; -+ - &mmc0 { - /* - * The schematic shows the card detect pin wired up to PF6, via an -diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h618-transpeed-8k618-t.dts b/arch/arm64/boot/dts/allwinner/sun50i-h618-transpeed-8k618-t.dts -index f828ca1ce51ef..efe0faa252f5e 100644 ---- a/arch/arm64/boot/dts/allwinner/sun50i-h618-transpeed-8k618-t.dts -+++ b/arch/arm64/boot/dts/allwinner/sun50i-h618-transpeed-8k618-t.dts -@@ -69,6 +69,11 @@ &ehci1 { - status = "okay"; - }; - -+&gpu { -+ mali-supply = <®_dcdc1>; -+ status = "okay"; -+}; -+ - &ir { - status = "okay"; - }; -diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h700-anbernic-rg35xx-2024.dts b/arch/arm64/boot/dts/allwinner/sun50i-h700-anbernic-rg35xx-2024.dts -index 7e17ca07892dd..f1efaf6d06831 100644 ---- a/arch/arm64/boot/dts/allwinner/sun50i-h700-anbernic-rg35xx-2024.dts -+++ b/arch/arm64/boot/dts/allwinner/sun50i-h700-anbernic-rg35xx-2024.dts -@@ -197,6 +197,11 @@ &ehci0 { - status = "okay"; - }; - -+&gpu { -+ mali-supply = <®_dcdc2>; -+ status = "okay"; -+}; -+ - &mmc0 { - vmmc-supply = <®_cldo3>; - disable-wp; --- -2.46.3 - diff --git a/projects/ROCKNIX/devices/H700/patches/linux/H700/0006-v2_20250403_simons_philippe_drm_panfrost_enable_g31_on_h616.patch b/projects/ROCKNIX/devices/H700/patches/linux/H700/0006-v2_20250403_simons_philippe_drm_panfrost_enable_g31_on_h616.patch deleted file mode 100644 index 616106cd54..0000000000 --- a/projects/ROCKNIX/devices/H700/patches/linux/H700/0006-v2_20250403_simons_philippe_drm_panfrost_enable_g31_on_h616.patch +++ /dev/null @@ -1,260 +0,0 @@ -From git@z Thu Jan 1 00:00:00 1970 -Subject: [PATCH v2 1/3] drm/panfrost: Add PM runtime flag -From: Philippe Simons -Date: Thu, 03 Apr 2025 07:52:08 +0200 -Message-Id: <20250403055210.54486-2-simons.philippe@gmail.com> -MIME-Version: 1.0 -Content-Type: text/plain; charset="utf-8" -Content-Transfer-Encoding: 7bit - -When the GPU is the only device attached to a single power domain, -core genpd disable and enable it when gpu enter and leave runtime suspend. - -Some power-domain requires a sequence before disabled, -and the reverse when enabled. - -Add GPU_PM_RT flag, and implement in -panfrost_device_runtime_suspend/resume. - -Reviewed-by: Steven Price -Signed-off-by: Philippe Simons ---- - drivers/gpu/drm/panfrost/panfrost_device.c | 33 ++++++++++++++++++++++ - drivers/gpu/drm/panfrost/panfrost_device.h | 3 ++ - 2 files changed, 36 insertions(+) - -diff --git a/drivers/gpu/drm/panfrost/panfrost_device.c b/drivers/gpu/drm/panfrost/panfrost_device.c -index a45e4addcc19..93d48e97ce10 100644 ---- a/drivers/gpu/drm/panfrost/panfrost_device.c -+++ b/drivers/gpu/drm/panfrost/panfrost_device.c -@@ -406,11 +406,36 @@ void panfrost_device_reset(struct panfrost_device *pfdev) - static int panfrost_device_runtime_resume(struct device *dev) - { - struct panfrost_device *pfdev = dev_get_drvdata(dev); -+ int ret; -+ -+ if (pfdev->comp->pm_features & BIT(GPU_PM_RT)) { -+ ret = reset_control_deassert(pfdev->rstc); -+ if (ret) -+ return ret; -+ -+ ret = clk_enable(pfdev->clock); -+ if (ret) -+ goto err_clk; -+ -+ if (pfdev->bus_clock) { -+ ret = clk_enable(pfdev->bus_clock); -+ if (ret) -+ goto err_bus_clk; -+ } -+ } - - panfrost_device_reset(pfdev); - panfrost_devfreq_resume(pfdev); - - return 0; -+ -+err_bus_clk: -+ if (pfdev->comp->pm_features & BIT(GPU_PM_RT)) -+ clk_disable(pfdev->clock); -+err_clk: -+ if (pfdev->comp->pm_features & BIT(GPU_PM_RT)) -+ reset_control_assert(pfdev->rstc); -+ return ret; - } - - static int panfrost_device_runtime_suspend(struct device *dev) -@@ -426,6 +451,14 @@ static int panfrost_device_runtime_suspend(struct device *dev) - panfrost_gpu_suspend_irq(pfdev); - panfrost_gpu_power_off(pfdev); - -+ if (pfdev->comp->pm_features & BIT(GPU_PM_RT)) { -+ if (pfdev->bus_clock) -+ clk_disable(pfdev->bus_clock); -+ -+ clk_disable(pfdev->clock); -+ reset_control_assert(pfdev->rstc); -+ } -+ - return 0; - } - -diff --git a/drivers/gpu/drm/panfrost/panfrost_device.h b/drivers/gpu/drm/panfrost/panfrost_device.h -index cffcb0ac7c11..861555ceea65 100644 ---- a/drivers/gpu/drm/panfrost/panfrost_device.h -+++ b/drivers/gpu/drm/panfrost/panfrost_device.h -@@ -36,10 +36,13 @@ enum panfrost_drv_comp_bits { - * enum panfrost_gpu_pm - Supported kernel power management features - * @GPU_PM_CLK_DIS: Allow disabling clocks during system suspend - * @GPU_PM_VREG_OFF: Allow turning off regulators during system suspend -+ * @GPU_PM_RT: Allow disabling clocks and asserting the reset control during -+ * system runtime suspend - */ - enum panfrost_gpu_pm { - GPU_PM_CLK_DIS, - GPU_PM_VREG_OFF, -+ GPU_PM_RT - }; - - struct panfrost_features { --- -2.49.0 - -From git@z Thu Jan 1 00:00:00 1970 -Subject: [PATCH v2 2/3] drm/panfrost: add h616 compatible string -From: Philippe Simons -Date: Thu, 03 Apr 2025 07:52:09 +0200 -Message-Id: <20250403055210.54486-3-simons.philippe@gmail.com> -MIME-Version: 1.0 -Content-Type: text/plain; charset="utf-8" -Content-Transfer-Encoding: 7bit - -Tie the Allwinner compatible string to the GPU_PM_RT feature bits that will -toggle the clocks and the reset line whenever the power domain is changing -state. - -Signed-off-by: Philippe Simons ---- - drivers/gpu/drm/panfrost/panfrost_drv.c | 8 ++++++++ - 1 file changed, 8 insertions(+) - -diff --git a/drivers/gpu/drm/panfrost/panfrost_drv.c b/drivers/gpu/drm/panfrost/panfrost_drv.c -index 0f3935556ac7..9470c04c5487 100644 ---- a/drivers/gpu/drm/panfrost/panfrost_drv.c -+++ b/drivers/gpu/drm/panfrost/panfrost_drv.c -@@ -776,6 +776,13 @@ static const struct panfrost_compatible default_data = { - .pm_domain_names = NULL, - }; - -+static const struct panfrost_compatible allwinner_h616_data = { -+ .num_supplies = ARRAY_SIZE(default_supplies) - 1, -+ .supply_names = default_supplies, -+ .num_pm_domains = 1, -+ .pm_features = BIT(GPU_PM_RT), -+}; -+ - static const struct panfrost_compatible amlogic_data = { - .num_supplies = ARRAY_SIZE(default_supplies) - 1, - .supply_names = default_supplies, -@@ -859,6 +866,7 @@ static const struct of_device_id dt_match[] = { - { .compatible = "mediatek,mt8186-mali", .data = &mediatek_mt8186_data }, - { .compatible = "mediatek,mt8188-mali", .data = &mediatek_mt8188_data }, - { .compatible = "mediatek,mt8192-mali", .data = &mediatek_mt8192_data }, -+ { .compatible = "allwinner,sun50i-h616-mali", .data = &allwinner_h616_data }, - {} - }; - MODULE_DEVICE_TABLE(of, dt_match); --- -2.49.0 - -From git@z Thu Jan 1 00:00:00 1970 -Subject: [PATCH v2 3/3] drm/panfrost: reorder pd/clk/rst sequence -From: Philippe Simons -Date: Thu, 03 Apr 2025 07:52:10 +0200 -Message-Id: <20250403055210.54486-4-simons.philippe@gmail.com> -MIME-Version: 1.0 -Content-Type: text/plain; charset="utf-8" -Content-Transfer-Encoding: 7bit - -According to Mali manuals, the powerup sequence should be -enable pd, asserting the reset then enabling the clock and -the reverse for powerdown. - -Tested-by: John Williams -Signed-off-by: Philippe Simons ---- - drivers/gpu/drm/panfrost/panfrost_device.c | 38 +++++++++++----------- - 1 file changed, 19 insertions(+), 19 deletions(-) - -diff --git a/drivers/gpu/drm/panfrost/panfrost_device.c b/drivers/gpu/drm/panfrost/panfrost_device.c -index 93d48e97ce10..5d35076b2e6d 100644 ---- a/drivers/gpu/drm/panfrost/panfrost_device.c -+++ b/drivers/gpu/drm/panfrost/panfrost_device.c -@@ -209,10 +209,20 @@ int panfrost_device_init(struct panfrost_device *pfdev) - - spin_lock_init(&pfdev->cycle_counter.lock); - -+ err = panfrost_pm_domain_init(pfdev); -+ if (err) -+ return err; -+ -+ err = panfrost_reset_init(pfdev); -+ if (err) { -+ dev_err(pfdev->dev, "reset init failed %d\n", err); -+ goto out_pm_domain; -+ } -+ - err = panfrost_clk_init(pfdev); - if (err) { - dev_err(pfdev->dev, "clk init failed %d\n", err); -- return err; -+ goto out_reset; - } - - err = panfrost_devfreq_init(pfdev); -@@ -229,25 +239,15 @@ int panfrost_device_init(struct panfrost_device *pfdev) - goto out_devfreq; - } - -- err = panfrost_reset_init(pfdev); -- if (err) { -- dev_err(pfdev->dev, "reset init failed %d\n", err); -- goto out_regulator; -- } -- -- err = panfrost_pm_domain_init(pfdev); -- if (err) -- goto out_reset; -- - pfdev->iomem = devm_platform_ioremap_resource(pfdev->pdev, 0); - if (IS_ERR(pfdev->iomem)) { - err = PTR_ERR(pfdev->iomem); -- goto out_pm_domain; -+ goto out_regulator; - } - - err = panfrost_gpu_init(pfdev); - if (err) -- goto out_pm_domain; -+ goto out_regulator; - - err = panfrost_mmu_init(pfdev); - if (err) -@@ -268,16 +268,16 @@ int panfrost_device_init(struct panfrost_device *pfdev) - panfrost_mmu_fini(pfdev); - out_gpu: - panfrost_gpu_fini(pfdev); --out_pm_domain: -- panfrost_pm_domain_fini(pfdev); --out_reset: -- panfrost_reset_fini(pfdev); - out_regulator: - panfrost_regulator_fini(pfdev); - out_devfreq: - panfrost_devfreq_fini(pfdev); - out_clk: - panfrost_clk_fini(pfdev); -+out_reset: -+ panfrost_reset_fini(pfdev); -+out_pm_domain: -+ panfrost_pm_domain_fini(pfdev); - return err; - } - -@@ -287,11 +287,11 @@ void panfrost_device_fini(struct panfrost_device *pfdev) - panfrost_job_fini(pfdev); - panfrost_mmu_fini(pfdev); - panfrost_gpu_fini(pfdev); -- panfrost_pm_domain_fini(pfdev); -- panfrost_reset_fini(pfdev); - panfrost_devfreq_fini(pfdev); - panfrost_regulator_fini(pfdev); - panfrost_clk_fini(pfdev); -+ panfrost_reset_fini(pfdev); -+ panfrost_pm_domain_fini(pfdev); - } - - #define PANFROST_EXCEPTION(id) \ --- -2.49.0 - diff --git a/projects/ROCKNIX/devices/SM8250/patches/linux/9999-remove-log-spam.patch b/projects/ROCKNIX/devices/SM8250/patches/linux/9999-remove-log-spam.patch index fa740e9a45..32d97598cd 100644 --- a/projects/ROCKNIX/devices/SM8250/patches/linux/9999-remove-log-spam.patch +++ b/projects/ROCKNIX/devices/SM8250/patches/linux/9999-remove-log-spam.patch @@ -75,13 +75,13 @@ diff -rupbN linux.orig/drivers/firmware/psci/psci.c linux/drivers/firmware/psci/ diff -rupbN linux.orig/drivers/remoteproc/qcom_q6v5_pas.c linux/drivers/remoteproc/qcom_q6v5_pas.c --- linux.orig/drivers/remoteproc/qcom_q6v5_pas.c 2024-10-19 13:35:30.157005891 +0000 +++ linux/drivers/remoteproc/qcom_q6v5_pas.c 2024-11-04 05:06:06.991809741 +0000 -@@ -316,8 +316,8 @@ static int adsp_start(struct rproc *rpro +@@ -316,8 +316,8 @@ static int qcom_pas_start(struct rproc *rproc) - ret = qcom_scm_pas_auth_and_reset(adsp->pas_id); + ret = qcom_scm_pas_auth_and_reset(pas->pas_id); if (ret) { -- dev_err(adsp->dev, +- dev_err(pas->dev, - "failed to authenticate image and release reset\n"); -+ //dev_err(adsp->dev, ++ //dev_err(pas->dev, + //"failed to authenticate image and release reset\n"); goto release_pas_metadata; } diff --git a/projects/ROCKNIX/devices/SM8550/patches/linux/0600-20250523_quic_bqiang_wifi_ath12k_install_pairwise_key_first.patch b/projects/ROCKNIX/devices/SM8550/patches/linux/0600-20250523_quic_bqiang_wifi_ath12k_install_pairwise_key_first.patch deleted file mode 100644 index 4a51a5be08..0000000000 --- a/projects/ROCKNIX/devices/SM8550/patches/linux/0600-20250523_quic_bqiang_wifi_ath12k_install_pairwise_key_first.patch +++ /dev/null @@ -1,218 +0,0 @@ -From git@z Thu Jan 1 00:00:00 1970 -Subject: [PATCH 1/2] wifi: ath12k: avoid bit operation on key flags -From: Baochen Qiang -Date: Fri, 23 May 2025 11:49:01 +0800 -Message-Id: <20250523-ath12k-unicast-key-first-v1-1-f53c3880e6d8@quicinc.com> -MIME-Version: 1.0 -Content-Type: text/plain; charset="utf-8" -Content-Transfer-Encoding: 7bit - -WMI_KEY_PAIRWISE and WMI_KEY_GROUP are not bit fields, change -bit operation to direct assignment to avoid confusion. - -Tested-on: WCN7850 hw2.0 PCI WLAN.HMT.1.0-03427-QCAHMTSWPL_V1.0_V2.0_SILICONZ-1.15378.4 -Tested-on: QCN9274 hw2.0 PCI WLAN.WBE.1.3.1-00217-QCAHKSWPL_SILICONZ-1 - -Signed-off-by: Baochen Qiang -Reviewed-by: Vasanthakumar Thiagarajan ---- - drivers/net/wireless/ath/ath12k/mac.c | 4 ++-- - 1 file changed, 2 insertions(+), 2 deletions(-) - -diff --git a/drivers/net/wireless/ath/ath12k/mac.c b/drivers/net/wireless/ath/ath12k/mac.c -index 88b59f3ff87af8b48cb3fafcd364fd9ced4ff197..eb3c6d10e116b098d44cd94ba8e0257a77b54af8 100644 ---- a/drivers/net/wireless/ath/ath12k/mac.c -+++ b/drivers/net/wireless/ath/ath12k/mac.c -@@ -4881,9 +4881,9 @@ static int ath12k_mac_set_key(struct ath12k *ar, enum set_key_cmd cmd, - } - - if (key->flags & IEEE80211_KEY_FLAG_PAIRWISE) -- flags |= WMI_KEY_PAIRWISE; -+ flags = WMI_KEY_PAIRWISE; - else -- flags |= WMI_KEY_GROUP; -+ flags = WMI_KEY_GROUP; - - ret = ath12k_install_key(arvif, key, cmd, peer_addr, flags); - if (ret) { --- -2.34.1 - -From git@z Thu Jan 1 00:00:00 1970 -Subject: [PATCH 2/2] wifi: ath12k: install pairwise key first -From: Baochen Qiang -Date: Fri, 23 May 2025 11:49:02 +0800 -Message-Id: <20250523-ath12k-unicast-key-first-v1-2-f53c3880e6d8@quicinc.com> -MIME-Version: 1.0 -Content-Type: text/plain; charset="utf-8" -Content-Transfer-Encoding: 7bit - -As station, WCN7850 firmware requires pairwise key to be installed before -group key. Currently host does not care about this, so it is up to kernel -or userspace to decide which one will be installed first. In case above -requirement is not met, WCN7850 firmware's EAPOL station machine is messed -up, and finally connection fails [1]. - -Reorder key install for station interface in that case: this is done by -caching group key first; Later when pairwise key arrives, both can be -installed in required order. - -Tested-on: WCN7850 hw2.0 PCI WLAN.HMT.1.0-03427-QCAHMTSWPL_V1.0_V2.0_SILICONZ-1.15378.4 -Tested-on: QCN9274 hw2.0 PCI WLAN.WBE.1.3.1-00217-QCAHKSWPL_SILICONZ-1 - -Closes: https://bugzilla.kernel.org/show_bug.cgi?id=218733 -Link: https://lore.kernel.org/all/AS8P190MB12051DDBD84CD88E71C40AD7873F2@AS8P190MB1205.EURP190.PROD.OUTLOOK.COM # [1] -Signed-off-by: Baochen Qiang -Reviewed-by: Vasanthakumar Thiagarajan ---- - drivers/net/wireless/ath/ath12k/core.h | 4 ++ - drivers/net/wireless/ath/ath12k/mac.c | 76 ++++++++++++++++++++++++++++++---- - drivers/net/wireless/ath/ath12k/wmi.h | 1 + - 3 files changed, 74 insertions(+), 7 deletions(-) - -diff --git a/drivers/net/wireless/ath/ath12k/core.h b/drivers/net/wireless/ath/ath12k/core.h -index 941db6e49d6eaeb03783f7714d433259d887820b..eeaaa0616e48c3cf34f2769a1979e2f67888ac25 100644 ---- a/drivers/net/wireless/ath/ath12k/core.h -+++ b/drivers/net/wireless/ath/ath12k/core.h -@@ -345,6 +345,10 @@ struct ath12k_link_vif { - bool is_sta_assoc_link; - - struct ath12k_reg_tpc_power_info reg_tpc_info; -+ -+ bool group_key_valid; -+ struct wmi_vdev_install_key_arg group_key; -+ bool pairwise_key_done; - }; - - struct ath12k_vif { -diff --git a/drivers/net/wireless/ath/ath12k/mac.c b/drivers/net/wireless/ath/ath12k/mac.c -index eb3c6d10e116b098d44cd94ba8e0257a77b54af8..05a17ad2eaeea00c938b16d22fb8e7605dfb4007 100644 ---- a/drivers/net/wireless/ath/ath12k/mac.c -+++ b/drivers/net/wireless/ath/ath12k/mac.c -@@ -4731,14 +4731,13 @@ static int ath12k_install_key(struct ath12k_link_vif *arvif, - .key_len = key->keylen, - .key_data = key->key, - .key_flags = flags, -+ .ieee80211_key_cipher = key->cipher, - .macaddr = macaddr, - }; - struct ath12k_vif *ahvif = arvif->ahvif; - - lockdep_assert_wiphy(ath12k_ar_to_hw(ar)->wiphy); - -- reinit_completion(&ar->install_key_done); -- - if (test_bit(ATH12K_FLAG_HW_CRYPTO_DISABLED, &ar->ab->dev_flags)) - return 0; - -@@ -4747,7 +4746,7 @@ static int ath12k_install_key(struct ath12k_link_vif *arvif, - /* arg.key_cipher = WMI_CIPHER_NONE; */ - arg.key_len = 0; - arg.key_data = NULL; -- goto install; -+ goto check_order; - } - - switch (key->cipher) { -@@ -4775,19 +4774,82 @@ static int ath12k_install_key(struct ath12k_link_vif *arvif, - key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV | - IEEE80211_KEY_FLAG_RESERVE_TAILROOM; - -+check_order: -+ if (ahvif->vdev_type == WMI_VDEV_TYPE_STA && -+ arg.key_flags == WMI_KEY_GROUP) { -+ if (cmd == SET_KEY) { -+ if (arvif->pairwise_key_done) { -+ ath12k_dbg(ar->ab, ATH12K_DBG_MAC, -+ "vdev %u pairwise key done, go install group key\n", -+ arg.vdev_id); -+ goto install; -+ } else { -+ /* WCN7850 firmware requires pairwise key to be installed -+ * before group key. In case group key comes first, cache -+ * it and return. Will revisit it once pairwise key gets -+ * installed. -+ */ -+ arvif->group_key = arg; -+ arvif->group_key_valid = true; -+ ath12k_dbg(ar->ab, ATH12K_DBG_MAC, -+ "vdev %u group key before pairwise key, cache and skip\n", -+ arg.vdev_id); -+ -+ ret = 0; -+ goto out; -+ } -+ } else { -+ arvif->group_key_valid = false; -+ } -+ } -+ - install: -- ret = ath12k_wmi_vdev_install_key(arvif->ar, &arg); -+ reinit_completion(&ar->install_key_done); - -+ ret = ath12k_wmi_vdev_install_key(arvif->ar, &arg); - if (ret) - return ret; - - if (!wait_for_completion_timeout(&ar->install_key_done, 1 * HZ)) - return -ETIMEDOUT; - -- if (ether_addr_equal(macaddr, arvif->bssid)) -- ahvif->key_cipher = key->cipher; -+ if (ether_addr_equal(arg.macaddr, arvif->bssid)) -+ ahvif->key_cipher = arg.ieee80211_key_cipher; -+ -+ if (ar->install_key_status) { -+ ret = -EINVAL; -+ goto out; -+ } -+ -+ if (ahvif->vdev_type == WMI_VDEV_TYPE_STA && -+ arg.key_flags == WMI_KEY_PAIRWISE) { -+ if (cmd == SET_KEY) { -+ arvif->pairwise_key_done = true; -+ if (arvif->group_key_valid) { -+ /* Install cached GTK */ -+ arvif->group_key_valid = false; -+ arg = arvif->group_key; -+ ath12k_dbg(ar->ab, ATH12K_DBG_MAC, -+ "vdev %u pairwise key done, group key ready, go install\n", -+ arg.vdev_id); -+ goto install; -+ } -+ } else { -+ arvif->pairwise_key_done = false; -+ } -+ } -+ -+out: -+ if (ret) { -+ /* In case of failure userspace may not do DISABLE_KEY -+ * but triggers re-connection directly, so manually reset -+ * status here. -+ */ -+ arvif->group_key_valid = false; -+ arvif->pairwise_key_done = false; -+ } - -- return ar->install_key_status ? -EINVAL : 0; -+ return ret; - } - - static int ath12k_clear_peer_keys(struct ath12k_link_vif *arvif, -diff --git a/drivers/net/wireless/ath/ath12k/wmi.h b/drivers/net/wireless/ath/ath12k/wmi.h -index ac18f75e04492b62594acb159e3b43b81bd6c392..63302302cf87058a87ba99c294810823f714779b 100644 ---- a/drivers/net/wireless/ath/ath12k/wmi.h -+++ b/drivers/net/wireless/ath/ath12k/wmi.h -@@ -3746,6 +3746,7 @@ struct wmi_vdev_install_key_arg { - u32 key_idx; - u32 key_flags; - u32 key_cipher; -+ u32 ieee80211_key_cipher; - u32 key_len; - u32 key_txmic_len; - u32 key_rxmic_len; --- -2.34.1 - diff --git a/projects/ROCKNIX/packages/linux/package.mk b/projects/ROCKNIX/packages/linux/package.mk index 72e176652b..26bc20ddd6 100644 --- a/projects/ROCKNIX/packages/linux/package.mk +++ b/projects/ROCKNIX/packages/linux/package.mk @@ -31,11 +31,8 @@ case ${DEVICE} in ;; *) case ${DEVICE} in - H700) - PKG_VERSION="6.15.2" - ;; - SM8250|SM8550) - PKG_VERSION="6.16" + SM8250|SM8550|H700) + PKG_VERSION="6.16.3" ;; *) PKG_VERSION="6.12.40"