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Alexandre Belloni bcc5fd49a0 clk: at91: add a driver for the h32mx clock

Newer SoCs have two different AHB interconnect. The AHB 32 bits Matrix
interconnect (h32mx) has a clock that can be setup at the half of the h64mx
clock (which is mck). The h32mx clock can not exceed 90 MHz.

Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>

2014-09-22 11:38:59 +02:00

at91_pmc.h

clk: at91: add a driver for the h32mx clock

2014-09-22 11:38:59 +02:00

bcm2835.h

…

clk-conf.h

clk: Support for clock parents and rates assigned from device tree

2014-07-25 15:16:27 -07:00

mxs.h

ARM: mxs: remove custom .init_time hook

2013-09-29 21:09:34 +02:00