Moritz Fischer 6376931bab fpga: zynq-fpga: Fix unbalanced clock handling ...

This commit fixes the unbalanced clock handling, where
a failed probe would leave the clock with an enable count of -1.

Reported-by: Josh Cartwright <joshc@ni.com>
Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

2015-10-23 16:49:12 -07:00

..

fpga-mgr.c

…

Kconfig

fpga manager: Adding FPGA Manager support for Xilinx Zynq 7000

2015-10-17 21:57:16 -07:00

Makefile

fpga manager: Adding FPGA Manager support for Xilinx Zynq 7000

2015-10-17 21:57:16 -07:00

socfpga.c

fpga manager: add driver for socfpga fpga manager

2015-10-07 18:08:15 +01:00

zynq-fpga.c

fpga: zynq-fpga: Fix unbalanced clock handling

2015-10-23 16:49:12 -07:00