linux-apfs

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Catalin Marinas 53631b54c8 arm64: Floating point and SIMD

This patch adds support for FP/ASIMD register bank saving and restoring
during context switch and FP exception handling to generate SIGFPE.
There are 32 128-bit registers and the context switching is currently
done non-lazily. Benchmarks on real hardware are required before
implementing lazy FP state saving/restoring.

Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Nicolas Pitre <nico@linaro.org>
Acked-by: Olof Johansson <olof@lixom.net>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>

2012-09-17 13:42:13 +01:00

vdso

arm64: VDSO support

2012-09-17 13:42:09 +01:00

asm-offsets.c

…

cputable.c

arm64: CPU support

2012-09-17 13:41:59 +01:00

entry-fpsimd.S

arm64: Floating point and SIMD

2012-09-17 13:42:13 +01:00