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Chris Metcalf
2f9ac29eec
This change enables unaligned userspace memory access via a kernel fast path on tilegx. The kernel tracks user PC/instruction pairs per-thread using a direct-mapped cache in userspace. The cache maps those PC/instruction pairs to JIT'ed instruction sequences that load or store using byte-wide load store intructions and then synthesize 2-, 4- or 8-byte load or store results. Once an instruction has been seen to generate an unaligned access once, subsequent hits on that instruction typically require overhead of only around 50 cycles if cache and TLB is hot. We support the prctl() PR_GET_UNALIGN / PR_SET_UNALIGN sys call to enable or disable unaligned fixups on a per-process basis. To do this we pull some of the tilepro unaligned support out of the single_step.c file; tilepro uses instruction disassembly for both single-step and unaligned access support. Since tilegx actually has hardware singlestep support, though, it's cleaner to keep the tilegx unaligned access code in a separate file. While we're at it, properly rename the tilepro-specific types, etc., to have tilepro suffixes instead of generic tile suffixes. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
47 lines
1.5 KiB
C
47 lines
1.5 KiB
C
/*
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* Copyright 2010 Tilera Corporation. All Rights Reserved.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation, version 2.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
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* NON INFRINGEMENT. See the GNU General Public License for
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* more details.
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*/
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#ifndef _ASM_TILE_SECTIONS_H
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#define _ASM_TILE_SECTIONS_H
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#define arch_is_kernel_data arch_is_kernel_data
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#include <asm-generic/sections.h>
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/* Text and data are at different areas in the kernel VA space. */
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extern char _sinitdata[], _einitdata[];
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/* Write-once data is writable only till the end of initialization. */
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extern char __w1data_begin[], __w1data_end[];
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/* Not exactly sections, but PC comparison points in the code. */
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extern char __rt_sigreturn[], __rt_sigreturn_end[];
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#ifdef __tilegx__
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extern char __start_unalign_asm_code[], __end_unalign_asm_code[];
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#else
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extern char sys_cmpxchg[], __sys_cmpxchg_end[];
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extern char __sys_cmpxchg_grab_lock[];
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extern char __start_atomic_asm_code[], __end_atomic_asm_code[];
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#endif
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/* Handle the discontiguity between _sdata and _text. */
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static inline int arch_is_kernel_data(unsigned long addr)
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{
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return addr >= (unsigned long)_sdata &&
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addr < (unsigned long)_end;
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}
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#endif /* _ASM_TILE_SECTIONS_H */
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