Pull libata updates from Tejun Heo:
"Mostly low level driver specific changes.
Two changes are somewhat noteworthy. First, Dan's patchset to support
per-port msix interrupt handling for ahci, which was tried last cycle
but had to be backed out due to a couple issues, is back and seems to
be working fine. Second, libata exception handling now uses
usleep_range() instead of msleep() for sleeps < 20ms which can make
things snappier in some corner cases"
* 'for-4.5' of git://git.kernel.org/pub/scm/linux/kernel/git/tj/libata:
libata: skip debounce delay on link resume
ata: ahci_brcmstb: disable DIPM support
ata: ahci_brcmstb: enable support for ALPM
drivers: libata-core: Use usleep_range() instead of msleep() for short sleeps (<20 ms)
sata_sx4: correctly handling failed allocation
ata: ahci_brcmstb: add support for MIPS-based platforms
ahci: qoriq: Adjust the default register values on ls1021a
ahci: qoriq: Update the default Rx watermark value
ahci: qoriq: Adjust the default register values on ls1043a
ahci: compile out msi/msix infrastructure
ata: core: fix irq description on AHCI single irq systems
ata: ahci_brcmstb: remove unused definitions
ata: ahci_brcmstb: add a quirk for MIPS-based platforms
ata: ahci_brcmstb: disable NCQ for MIPS-based platforms
ata: sata_rcar: Remove obsolete platform_device_id entries
sata_rcar: Add compatible string for r8a7795
ahci: kill 'intr_status'
ahci: switch from 'threaded' to 'hardirq' interrupt handling
ahci: per-port msix support
The link resume logic uses a 200msec delay while debouncing
the SControl register. The rationale behind that delay is
to accommodate some PHYs that behave badly if their SStatus/
SControl registers are pounded immediately on resume.
The Broadcom STB SATA PHY does not seem to have this issue.
This patch introduces a new link flag that allows platforms
to skip the debounce delay if it isn't needed.
Signed-off-by: Danesh Petigara <dpetigara@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Tejun Heo <tj@kernel.org>
The Broadcom STB SATA host controller does not support device
initiated power management. Disable support for this feature
so the driver never sends SETFEATURES commands to the device
to enable/disable DIPM.
Signed-off-by: Danesh Petigara <dpetigara@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Tejun Heo <tj@kernel.org>
Enable support for ALPM in the host controller's capabilities
register. Also adjust the PLL timeout to give it enough time
to lock when the port exits slumber mode.
tj: minor style updates
Signed-off-by: Danesh Petigara <dpetigara@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Tejun Heo <tj@kernel.org>
Since msleep() may sleep longer than intended time for values less
than 20ms, this patch allows the use of usleep_range for waits less
that 20ms. usleep_range is a finer precision implementation of
msleep and is designed to be a drop-in replacement for udelay
where a precise sleep/busy-wait is unnecessary.
More details can be found at http://lkml.org/lkml/2007/8/3/250
and in Documentation/timers/timers-howto.txt.
This change has been done to improve the performace in PIO6 mode
which is used by viking flash.
Cc: xe-kernel@external.cisco.com
Signed-off-by: Anil Veliyankara Madam <aveliyan@cisco.com>
Signed-off-by: Shikha Jain <shikjain@cisco.com>
Signed-off-by: Tejun Heo <tj@kernel.org>
Since kzalloc can be failed in memory pressure, return error when failed.
Signed-off-by: Insu Yun <wuninsu@gmail.com>
Signed-off-by: Tejun Heo <tj@kernel.org>
The BCM7xxx ARM-based and MIPS-based platforms share a similar hardware
block for AHCI SATA3.
This new compatible string, "brcm,bcm7425-ahci", may be used for most
MIPS-based platforms of 40nm process technology.
Signed-off-by: Jaedon Shin <jaedon.shin@gmail.com>
Tested-by: Florian Fainelli <f.fainelli@gmail.com>
Acked-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: Tejun Heo <tj@kernel.org>
Updated the registers' values to enhance SATA performance and
reliability on ls1021a soc.
Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com>
Signed-off-by: Tejun Heo <tj@kernel.org>
The PTC[RXWM] sets the watermark value for Rx FIFO. The default
value 0x20 might be insufficient for some hard drives. If the
watermark value is too small, a single-cycle overflow may occur
and is reported as a CRC or internal error in the PxSERR register.
Updated the value to 0x29 according to the validation test.
All LS platforms are affected.
Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com>
Signed-off-by: Tejun Heo <tj@kernel.org>
Updated the registers' values to enhance SATA performance and
reliability.
Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com>
Signed-off-by: Tejun Heo <tj@kernel.org>
Every attempt to issue a read log page command lockup the controller.
The command is currently sent if the sata device includes the devlsp feature
to read out the timing data.
This attempt to read the data, locks up the controller and the device
is not recognzied correctly (failed to set xfermode) and cannot be accessed.
This was found on Freescale P1013/P1022 and T4240 CPUs
using a ATP IG mSATA 4GB with the devslp feature.
fsl-sata ff718000.sata: Sata FSL Platform/CSB Driver init
[ 1.254195] scsi0 : sata_fsl
[ 1.256004] ata1: SATA max UDMA/133 irq 74
[ 1.370666] fsl-gianfar ethernet.3: enabled errata workarounds, flags: 0x4
[ 1.470671] fsl-gianfar ethernet.4: enabled errata workarounds, flags: 0x4
[ 1.775584] ata1: Signature Update detected @ 504 msecs
[ 1.947594] ata1: SATA link up 3.0 Gbps (SStatus 123 SControl 300)
[ 1.948366] ata1.00: ATA-8: ATP IG mSATA, 20150311, max UDMA/133
[ 1.948371] ata1.00: 7732368 sectors, multi 0: LBA
[ 1.948843] ata1.00: failed to get Identify Device Data, Emask 0x1
[ 1.948857] ata1.00: failed to set xfermode (err_mask=0x40)
[ 7.467557] ata1: Signature Update detected @ 504 msecs
[ 7.639560] ata1: SATA link up 3.0 Gbps (SStatus 123 SControl 300)
[ 7.651320] ata1.00: failed to get Identify Device Data, Emask 0x1
[ 7.651360] ata1.00: failed to set xfermode (err_mask=0x40)
[ 7.655628] ata1: limiting SATA link speed to 1.5 Gbps
[ 7.659458] ata1.00: limiting speed to UDMA/133:PIO3
[ 13.163554] ata1: Signature Update detected @ 504 msecs
[ 13.335558] ata1: SATA link up 3.0 Gbps (SStatus 123 SControl 300)
[ 13.347298] ata1.00: failed to get Identify Device Data, Emask 0x1
[ 13.347334] ata1.00: failed to set xfermode (err_mask=0x40)
[ 13.351601] ata1.00: disabled
[ 13.353278] ata1: exception Emask 0x50 SAct 0x0 SErr 0x800 action 0x6 frozen t4
[ 13.359281] ata1: SError: { HostInt }
[ 13.361644] ata1: hard resetting link
Signed-off-by: Andreas Werner <andreas.werner@men.de>
Signed-off-by: Tejun Heo <tj@kernel.org>
Some controller lockup on a ata_read_log_page.
Add new ata port flag ATA_FLAG_NO_LOG_PAGE which can used
to blacklist a controller.
If this flag is set, any attempt to read a log page returns an error
without actually issuing the command.
Signed-off-by: Andreas Werner <andreas.werner@men.de>
Signed-off-by: Tejun Heo <tj@kernel.org>
Quoting Arnd:
The AHCI driver is used for some on-chip devices that do not use PCI
for probing, and it can be built even when CONFIG_PCI is disabled, but
that now results in a build failure:
ata/libahci.c: In function 'ahci_host_activate_multi_irqs':
ata/libahci.c:2475:4: error: invalid use of undefined type 'struct msix_entry'
ata/libahci.c:2475:21: error: dereferencing pointer to incomplete type 'struct msix_entry'
Add ifdef CONFIG_PCI_MSI infrastructure to compile out the multi-msi and
multi-msix code.
Reported-by: Arnd Bergmann <arnd@arndb.de>
Tested--by: Arnd Bergmann <arnd@arndb.de>
[arnd: fix up pci enabled case]
Reported-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Fixes: d684a90d38 ("ahci: per-port msix support")
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Signed-off-by: Tejun Heo <tj@kernel.org>
On my machine with single irq AHCI just the PCI id is printed as
description in /proc/interrupts.
I found a related discussion from beginning of this year:
http://www.gossamer-threads.com/lists/linux/kernel/2117335
Seems like 4f37b50476 ("libata: Use dev_name() for request_irq() to
distinguish devices") tried to fix displaying a proper interrupt
description for one scenario but broke it for another one.
The mentioned discussion ended in the current situation being
considered as broken but w/o a patch to fix it.
The following patch is based on a proposal in this mail thread.
Now the interrupt is properly described as:
PCI-MSI 512000-edge ahci[0000:00:1f.2]
By combining both values also the scenario that commit 4f37b50476
("libata: Use dev_name() for request_irq() to distinguish devices")
refers to should still be fine. There it should look like this now:
ahci[20100000.ide]
Using managed memory allocation ensures that the irq description
lives at least as long as the interrupt.
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
Signed-off-by: Tejun Heo <tj@kernel.org>
Cc: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
When I connect an Intel SSD to SATA SIL controller (PCI ID 1095:3114), any
TRIM command results in I/O errors being reported in the log. There is
other similar error reported with TRIM and the SIL controller:
https://bugs.centos.org/view.php?id=5880
Apparently the controller doesn't support TRIM commands. This patch
disables TRIM support on the SATA SIL controller.
ata7.00: exception Emask 0x0 SAct 0x0 SErr 0x0 action 0x0
ata7.00: BMDMA2 stat 0x50001
ata7.00: failed command: DATA SET MANAGEMENT
ata7.00: cmd 06/01:01:00:00:00/00:00:00:00:00/a0 tag 0 dma 512 out
res 51/04:01:00:00:00/00:00:00:00:00/a0 Emask 0x1 (device error)
ata7.00: status: { DRDY ERR }
ata7.00: error: { ABRT }
ata7.00: device reported invalid CHS sector 0
sd 8:0:0:0: [sdb] tag#0 FAILED Result: hostbyte=DID_OK driverbyte=DRIVER_SENSE
sd 8:0:0:0: [sdb] tag#0 Sense Key : Illegal Request [current] [descriptor]
sd 8:0:0:0: [sdb] tag#0 Add. Sense: Unaligned write command
sd 8:0:0:0: [sdb] tag#0 CDB: Write same(16) 93 08 00 00 00 00 00 21 95 88 00 20 00 00 00 00
blk_update_request: I/O error, dev sdb, sector 2200968
Signed-off-by: Mikulas Patocka <mpatocka@redhat.com>
Cc: stable@kernel.org
Signed-off-by: Tejun Heo <tj@kernel.org>
Current code doesn't update port value of Port Multiplier(PM) when
sending FIS of softreset to device, command will fail if FBS is
enabled.
There are two ways to fix the issue: the first is to disable FBS
before sending softreset command to PM device and the second is
to update port value of PM when sending command.
For the first way, i can't find any related rule in AHCI Spec. The
second way can avoid disabling FBS and has better performance.
Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com>
Signed-off-by: Tejun Heo <tj@kernel.org>
Cc: stable@vger.kernel.org
Whereas ARM-based platforms have four phy interface registers and
information, the MIPS-based platforms have only three registers, and
there are no information and documentation. In the original BSP, It
using "strict-ahci" did not control these registers.
Signed-off-by: Jaedon Shin <jaedon.shin@gmail.com>
Tested-by: Florian Fainelli <f.fainelli@gmail.com>
Acked-by: Brian Norris <computersforpeace@gmail.com>
The most MIPS-based platforms need to disable NCQ while have the NCQ
capability in HOST_CAP, and several ARM-based platforms (eg. BCM7349A0,
BCM7445A0, BCM7445B0) need to disable too.
Signed-off-by: Jaedon Shin <jaedon.shin@gmail.com>
Tested-by: Florian Fainelli <f.fainelli@gmail.com>
Acked-by: Brian Norris <computersforpeace@gmail.com>
Since commit c99cd90d98 ("ARM: shmobile: r8a7779: Remove legacy
SoC code"), R-Car SoCs are only supported in generic DT-only ARM
multi-platform builds. The driver doesn't need to match platform
devices by name anymore, hence remove the remaining platform_device_id
entries and platform device support.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Tejun Heo <tj@kernel.org>
The newly added suspend/resume implementation for ahci_mvebu causes
a link error when CONFIG_PM_SLEEP is disabled:
ERROR: "ahci_platform_suspend_host" [drivers/ata/ahci_mvebu.ko] undefined!
ERROR: "ahci_platform_resume_host" [drivers/ata/ahci_mvebu.ko] undefined!
This adds the same #ifdef here that exists in the ahci_platform driver
which defines the above functions.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Fixes: d6ecf15814 ("ata: ahci_mvebu: add suspend/resume support")
Acked-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Tejun Heo <tj@kernel.org>
This field in achi_port_priv was only used to support threaded
interrupts. Now that we are hardirq only it can be deleted.
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Signed-off-by: Tejun Heo <tj@kernel.org>
For high frequency I/O the overhead of threaded interrupts impacts
performance. A quick out-of-the-box test (i.e. no affinity tuning)
shows ~10% random read performance at ~20% less cpu. The cpu wins
appear to be from reduced lock contention.
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Signed-off-by: Tejun Heo <tj@kernel.org>
Some AHCI controllers support per-port MSI-X vectors. At the same time
the Linux AHCI driver needs to support one-off architectures that
implement a single MSI-X vector for all ports. The heuristic for
enabling AHCI ports becomes, in order of preference:
1/ per-port multi-MSI-X
2/ per-port multi-MSI
3/ single MSI
4/ single MSI-X
5/ legacy INTX
This all depends on AHCI implementations with potentially broken MSI-X
requesting less vectors than the number of ports. If this assumption is
violated we will need to start explicitly white-listing AHCI-MSIX
implementations.
Reported-by: Ricardo Neri <ricardo.neri@intel.com>
[ricardo: fix struct msix_entry handling]
Reported-by: kernel test robot <ying.huang@linux.intel.com>
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Signed-off-by: Tejun Heo <tj@kernel.org>
Linus Torvalds
Danesh Petigara
Anil Veliyankara Madam
Insu Yun
Jaedon Shin
Tang Yuantian
Andreas Werner
Dan Williams
Heiner Kallweit
Mikulas Patocka
Xiangliang Yu
Geert Uytterhoeven
Kouei Abe
Arnd Bergmann
Dan Williams