Most WDT driver modules return ENODEV during modprobe if
no valid device was found, but w83697hf_wdt returns EIO.
Let w83697hf_wdt return ENODEV.
Signed-off-by: Stanislav Kholmanskikh <stanislav.kholmanskikh@oracle.com>
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
On archs like S390 or um this driver cannot build nor work.
Make it depend on HAS_IOMEM to bypass build failures.
drivers/built-in.o: In function `dw_wdt_drv_probe':
drivers/watchdog/dw_wdt.c:302: undefined reference to `devm_ioremap_resource'
Signed-off-by: Richard Weinberger <richard@nod.at>
Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
If the watchdog has already triggered for whatever reason, it won't restart
unless the trigger is reset.
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
Major difference is that the watchdog control and counter registers
are different on both chips.
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
Instead of requiring the user to provide an IO address per module
parameter, auto-detect it as well as supported chips.
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
Try to reset the watchdog counter 4 or 2 times more often than actually
requested, to avoid spurious watchdog reset.
If this is not possible because of the min_heartbeat value, reset it at
the min_heartbeat period.
Signed-off-by: Boris BREZILLON <b.brezillon@overkiz.com>
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
Use the min_heartbeat value instead of the calculated heartbeat value for
the first watchdog reset to avoid spurious watchdog reset.
Resetting the watchdog counter during init might lead to a watchdog fault
reset because the watchdog counter has to be running for at least
min_heartbeat.
Resetting the watchdog counter after heartbeat might lead to a watchdog
timeout reset because the watchdog counter is running for more than
max_heartbeat time.
Using min_heartbeat instead of heartbeat does not guarantee that the
watchdog won't trigger a reset, but at least it reduces the chances to be
in such a case.
Signed-off-by: Boris BREZILLON <b.brezillon@overkiz.com>
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
Fix the secs_to_ticks macro in case 0 is passed as an argument.
Signed-off-by: Boris BREZILLON <b.brezillon@overkiz.com>
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
The at91sam9 watchdog timer can only be configured once, and the current
implementation tries to configure it in a static way:
- 2 seconds timeout
- wdt restart every 500ms
If the timer has already been configured with different values, it returns an
error and do not create any watchdog device.
This is not critical if the watchdog is disabled, but if it has been enabled with
different timeout values it will lead to a SoC reset.
This patch series tries to address this issue by adapting the heartbeat value
according the WDT timer config:
- it first tries to configure the timer as requested.
- if it fails it fallbacks to the current config, adapting its heartbeat timer
to the needs
This patch series also move to a dynamically allocated at91wdt device instead
of the static instance.
It adds a new at91 wdt type: software. This new type make use of the at91 wdt
interrupt to trigger a software reboot.
Finally it adds several properties to the device tree bindings.
Signed-off-by: Boris BREZILLON <b.brezillon@overkiz.com>
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
mach-moxart lacks a separate register for reset; as a workaround,
add a function that can be hooked to arm_pm_restart.
Signed-off-by: Jonas Jensen <jonas.jensen@gmail.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
'sirfsoc_wdt_of_match' is always compiled in. Hence the
helper macro is not needed.
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
This patch is being submitted to output a general string when the panic comes
in that informs the user of the possible places to look for the source of the
NMI. Because various systems log the message in different places this would
give a single display of where to go look instead of code that acts on all
these different server names or IDs.
Signed-off-by: Thomas Mingarelli <thomas.mingarelli@hp.com>
Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
There is nothing ARM specific in this driver, and we intend to use it on the
Xtensa architecture. Also, clk.h now includes stubs for !CONFIG_HAVE_CLK, so
the driver should build anyway.
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Acked-by: Jamie Iles <jamie@jamieiles.com>
Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
We should set watchdog timer to be disabled in low power mode,
as there is no service running in background, otherwise, system
will reset unexpected.
Signed-off-by: Anson Huang <b20788@freescale.com>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
A good watchdog driver is supposed to report when it was responsible
for resetting the system. Implement this for the s3c2410, at least on
exynos5250 and exynos5420 where we already have a pointer to the PMU
registers to read the information.
Note that exynos4 SoCs also provide the reset status, but providing
that is left as an exercise for future changes and is not plumbed up
in this patch series. Also note the exynos4 SoCs don't appear to need
any PMU config, which is why this patch separates the concepts of
having PMU Registers vs. needing PMU Config.
Signed-off-by: Doug Anderson <dianders@chromium.org>
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
Add device tree support for exynos5250 and 5420 SoCs and use syscon regmap interface
to configure AUTOMATIC_WDT_RESET_DISABLE and MASK_WDT_RESET_REQUEST registers of PMU
to mask/unmask enable/disable of watchdog in probe and s2r scenarios.
Signed-off-by: Leela Krishna Amudala <l.krishna@samsung.com>
Signed-off-by: Doug Anderson <dianders@chromium.org>
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
The existing watchdog timeout worked OK but didn't deal with
rounding in an ideal way when dividing out all of its clocks.
Specifically if you had a timeout of 32 seconds and an input clock of
66666666, you'd end up setting a timeout of 31.9998 seconds and
reporting a timeout of 31 seconds.
Specifically DBG printouts showed:
s3c2410wdt_set_heartbeat: count=16666656, timeout=32, freq=520833
s3c2410wdt_set_heartbeat: timeout=32, divisor=255, count=16666656 (0000ff4f)
and the final timeout reported to the user was:
((count / divisor) * divisor) / freq
(0xff4f * 255) / 520833 = 31 (truncated from 31.9998)
the technically "correct" value is:
(0xff4f * 255) / (66666666.0 / 128) = 31.9998
By using "DIV_ROUND_UP" we can be a little more correct.
s3c2410wdt_set_heartbeat: count=16666688, timeout=32, freq=520834
s3c2410wdt_set_heartbeat: timeout=32, divisor=255, count=16666688 (0000ff50)
and the final timeout reported to the user:
(0xff50 * 255) / 520834 = 32
the technically "correct" value is:
(0xff50 * 255) / (66666666.0 / 128) = 32.0003
We'll use a DIV_ROUND_UP to solve this, generally erroring on the side
of reporting shorter values to the user and setting the watchdog to
slightly longer than requested:
* Round input frequency up to assume watchdog is counting faster.
* Round divisions by divisor up to give us extra time.
At the same time we can avoid a for loop by just doing the right math.
Signed-off-by: Doug Anderson <dianders@chromium.org>
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
On modern SoCs the watchdog timer is parented on a clock that doesn't
change every time we have a cpufreq change. That means we don't need
to constantly adjust the watchdog timer, so avoid registering for and
dealing with cpufreq transitions unless we've actually got
CONFIG_ARM_S3C24XX_CPUFREQ defined.
Note that this is more than just an optimization. The s3c2410
watchdog driver actually pats the watchdog on every CPU frequency
change. On modern systems these happen many times per second (even in
a system where "nothing" is happening). That effectively makes any
userspace watchdog program useless (the watchdog is constantly patted
by the kernel). If we need ARM_S3C24XX_CPUFREQ defined on a
multiplatform kernel we'll need to make sure that kernel supports
common clock and change this to user common clock framework.
Signed-off-by: Doug Anderson <dianders@chromium.org>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
This patch adds a watchdog driver for devices controlled through GPIO,
(Analog Devices ADM706, Maxim MAX823, National NE555 etc).
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
The keystone arch uses the same IP watchdog, so add "ti,keystone-wdt"
compatible and correct identity.
The Keystone arch is using clocks in DT and source clock for watchdog
has to be specified, so add this to binding.
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
Currently, the davinci watchdog can be read while counting,
so we can add ability to report the remaining time before
the system will reboot.
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
Some SoCs, like Keystone 2, can support more than one WDT and each
watchdog device has to use it's own base address, clock source,
watchdog device, so add new davinci_wdt_device structure to hold
device data.
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Reviewed-by: Guenter roeck <linux@roeck-us.net>
Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
To reduce code duplicate and increase code readability use WDT core
code to handle WDT interface.
Remove io_lock as the WDT core uses mutex to lock each wdt device.
Remove wdt_state as the WDT core tracks state with its own variable.
The watchdog_init_timeout() can read timeout value from timeout-sec
property if the passed value is out of bounds. The heartbeat is
initialized in next way. If heartbeat is not set thought module
parameter, try to read it's value from WDT node timeout-sec property.
If node has no one, use default value.
The heartbeat is hold in wdd->timeout by WDT core, so use it in
order to set timeout period.
Davinci WDT can't be stopped and once it's expired - it can be
rearmed only after hardware reset, that's why nowayout feature
is enforced.
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
Stanislav Kholmanskikh
Richard Weinberger
Guenter Roeck
Boris BREZILLON
Naresh Bhat
Jonas Jensen
Christophe Leroy
Sachin Kamat
Thomas Mingarelli
Baruch Siach
Anson Huang
Doug Anderson
Leela Krishna Amudala
Alexander Shiyan
Ivan Khoronzhuk