Commit Graph

2985 Commits

Author SHA1 Message Date
Mark Brown c70efb8515 Merge remote-tracking branches 'spi/topic/s3c64xx', 'spi/topic/ti-qspi' and 'spi/topic/txx9' into spi-next 2015-11-04 11:02:16 +00:00
Mark Brown 4c84518523 Merge remote-tracking branches 'spi/topic/omap-100k', 'spi/topic/omap-uwire', 'spi/topic/owner', 'spi/topic/pxa' and 'spi/topic/pxa2xx' into spi-next 2015-11-04 11:02:12 +00:00
Mark Brown fc579056af Merge remote-tracking branches 'spi/topic/fsl-dspi', 'spi/topic/mpc512x', 'spi/topic/mtk', 'spi/topic/oc-tiny' and 'spi/topic/octeon' into spi-next 2015-11-04 11:02:10 +00:00
Mark Brown 8a9e77653f Merge remote-tracking branches 'spi/topic/coldfire' and 'spi/topic/dw' into spi-next 2015-11-04 11:02:09 +00:00
Mark Brown c2da04dc21 Merge remote-tracking branches 'spi/topic/bcm53xx', 'spi/topic/bcm63xx', 'spi/topic/bfin-sport', 'spi/topic/bfin5xx' and 'spi/topic/bitbang' into spi-next 2015-11-04 11:02:06 +00:00
Mark Brown 076fcb17dd Merge remote-tracking branches 'spi/topic/ath97', 'spi/topic/atmel', 'spi/topic/au1550', 'spi/topic/bcm2835' and 'spi/topic/bcm2835aux' into spi-next 2015-11-04 11:02:04 +00:00
Mark Brown 8c60348575 Merge remote-tracking branch 'spi/topic/doc' into spi-next 2015-11-04 11:02:03 +00:00
Mark Brown f0a2a049f5 Merge remote-tracking branch 'spi/topic/davinci' into spi-next 2015-11-04 11:02:02 +00:00
Mark Brown 3e7018def4 Merge remote-tracking branch 'spi/topic/core' into spi-next 2015-11-04 11:02:02 +00:00
Mark Brown 5ba838c97b Merge remote-tracking branches 'spi/fix/atmel', 'spi/fix/imx', 'spi/fix/omap2-mcspi', 'spi/fix/ti-qspi' and 'spi/fix/xilinx' into spi-linus 2015-11-04 11:01:58 +00:00
Mark Brown 26cc44f8a3 Merge remote-tracking branch 'spi/fix/core' into spi-linus 2015-11-04 11:01:58 +00:00
Jarkko Nikula 0db642151a spi: pxa2xx: Rework self-initiated platform data creation for non-ACPI
Extend the pxa2xx_spi_acpi_get_pdata() so that it can create platform data
also on platforms that do not support ACPI or if CONFIG_ACPI is not set.
Now it is expected that "pxa2xx-spi" platform device is either created with
explicit platform data or has an ACPI companion device.

However there is only little in pxa2xx_spi_acpi_get_pdata() that is really
dependent on ACPI companion and it can be reworked to cover also cases
where "pxa2xx-spi" device doesn't have ACPI companion and is created
without platform data.

Do this by renaming the pxa2xx_spi_acpi_get_pdata(), moving it outside of
CONFIG_ACPI test and changing a few runtime tests there to support non-ACPI
case. Only port/bus ID setting based on ACPI _UID is dependent on ACPI and
is moved to own function inside CONFIG_ACPI.

Purpose of this to support non-ACPI case for those PCI enumerated compound
devices that integrate both LPSS SPI host controller and integrated DMA
engine under the same PCI ID and which are registered in MFD layer instead
of in spi-pxa2xx-pci.c.

Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-10-30 11:18:05 +09:00
Jarkko Nikula b7c08cf85c spi: pxa2xx: Add support for Intel Broxton
LPSS SPI in Intel Broxton is otherwise the same than in Intel Sunrisepoint
but it supports up to four chip selects per port and has different FIFO
thresholds. Patch adds support for two Broxton SoC variants.

Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-10-30 11:18:05 +09:00
Jarkko Nikula 8b136baa58 spi: pxa2xx: Detect number of enabled Intel LPSS SPI chip select signals
SPI capabilities register located in private registers space of newer
Intel LPSS SPI host controllers tell in register bits 12:9 which chip
select signals are enabled.

Use that information for detecting the number of chip selects. For
simplicity we assume chip selects are enabled one after another without
disabled chip selects between. For instance CS0 | CS1 | CS2 but not
CS0 | CS1 | CS3.

Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-10-30 11:18:05 +09:00
Jarkko Nikula d0283eb2db spi: pxa2xx: Add output control for multiple Intel LPSS chip selects
Intel LPSS SPI host controllers in upcoming Intel platforms can have up
to 4 chip selects per port. Extend chip select control in
lpss_ssp_cs_control() by adding a code that selects the active chip
select output prior to changing the state. Detection for number of
enabled chip select signals will be added by another patch.

Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-10-30 11:18:05 +09:00
Jarkko Nikula 624ea72ebd spi: pxa2xx: Use LPSS prefix for defines that are Intel LPSS specific
Rename a few defines that are specific to Intel LPSS SPI private
registers with LPSS prefix. It makes easier to distinguish them from
common defines.

Suggested-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-10-30 11:18:05 +09:00
Yuan Yao 5a60adafb9 spi: Add DSPI support for layerscape family
LS1043a and LS2080A in the Layerscape family also support DSPI, make
DSPI selectable for these hardwares.

Signed-off-by: Yuan Yao <yao.yuan@freescale.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-10-30 10:25:53 +09:00
Felipe Balbi e6b5140b70 spi: ti-qspi: improve ->remove() callback
there's no need to call pm_runtime_get_sync()
followed by pm_runtime_put(). We should, instead,
just call pm_runtime_put_sync() and pm_runtime_disable().

Signed-off-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-10-30 10:24:57 +09:00
Ricardo Ribalda Delgado eca37c7c11 spi/spi-xilinx: Fix race condition on last word read
Some users have reported that in polled mode the driver fails randomly
to read the last word of the transfer.

The end condition used for the transmissions (in polled and irq mode)
has been the TX_EMPTY flag. But Lars-Peter Clausen has identified a delay
from the TX_EMPTY to the actual end of the data rx.

I believe that this race condition has not been detected until now
because of the latency added by the IRQ handler or the PCIe bridge.
This bugs affects setups with low latency access to the spi core.

This patch replaces the readout logic:

For all the words, except the last one, the TX_EMPTY flag is used (and
cached).

If !TX_EMPY or is the last word. The status register is read and the
RX_EMPTY flag is used.

The performance is not affected: there is an extra read of the
Status Register, but the readout can start as soon as there is a word
in the buffer.

Reported-by: Edward Kigwana <ekigwana@scires.com>
Initial-fix-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@gmail.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Cc: stable@vger.kernel.org
2015-10-29 09:03:42 +09:00
Andrew F. Davis 3821a065f5 spi: Drop owner assignment from spi_drivers
An spi_driver does not need to set an owner, it will be populated by the
driver core.

Signed-off-by: Andrew F. Davis <afd@ti.com>
Acked-by: Jonathan Cameron <jic23@kernel.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-10-28 10:30:17 +09:00
Andrew F. Davis ca5d248542 spi: Add THIS_MODULE to spi_driver in SPI core
Add spi_register_driver helper macro that adds THIS_MODULE to
spi_driver for the registering driver. We rename and modify
the existing spi_register_driver to enable this.

Signed-off-by: Andrew F. Davis <afd@ti.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-10-28 10:30:12 +09:00
Franklin S Cooper Jr abeedb0159 spi: Setup the master controller driver before setting the chipselect
SPI controllers may need to be properly setup before chip selects
can be used. Therefore, wait until the spi controller has a chance
to perform their setup procedure before trying to use the chip
select.

This also insures that the chip selects pins are in a good
state before asseting them which otherwise may cause confusion.

Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
Tested-by: Grygorii Strashko <grygorii.strashko@ti.com>
Tested-by: Ivan Khoronzhuk <ivan.khoronzhuk@linaro.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-10-28 09:34:18 +09:00
Andy Shevchenko d7ef54ca12 spi: dw: replace magic constant by DW_SPI_DR
The offset 0x60 is the offset of the data register defined as DW_SPI_DR in the
header file. Use it.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-10-28 09:17:48 +09:00
Leilk Liu 37457607ec spi: mediatek: mt8173 spi multiple devices support
mt8173 IC spi HW has 4 gpio group, it's possible to support
max <= 4 slave devices, even mtk spi HW is not congruent to spi core.
1. When a device do a spi_message transfer, spi HW should know
   which pad-group this device is on, and then writes pad-select
   register.
2. Mtk pad-select register just selects which MISO pin HW will
   receive data. For example, pad-select=1(select spi1 pins), HW just
   receives data from spi1 MISO, but it still send waveform to all 4
   group cs/clk/mosi. If cs pin in other groups is still spi mode,
   after spi1 is selected(by active cs pin), devices on other group
   will also be selected.

Signed-off-by: Leilk Liu <leilk.liu@mediatek.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-10-27 13:33:42 +09:00
Leilk Liu 58a984c79a spi: mediatek: handle controller_data in mtk_spi_setup
controller_data is related with device, so move to master->setup
function.

Signed-off-by: Leilk Liu <leilk.liu@mediatek.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-10-27 13:33:42 +09:00