Commit Graph

45 Commits

Author SHA1 Message Date
Vineet Gupta e55af4da02 ARC: smp: Introduce smp hook @init_early_smp for Master core
This adds a platform agnostic early SMP init hook which is called on
Master core before calling setup_processor()

  setup_arch()
     smp_init_cpus()
         smp_ops.init_early_smp()
     ...
     setup_processor()

How this helps:
 - Used for one time init of certain SMP centric IP blocks, before
   calling setup_processor() which probes various bits of core,
   possibly including this block

 - Currently platforms need to call this IP block init from their
   init routines, which doesn't make sense as this is specific to ARC
   core and not platform and otherwise requires copy/paste in all
   (and hence a possible point of failure)

e.g. MCIP init is called from 2 platforms currently (axs10x and sim)
which will go away once we have this.

This change only adds the hooks but they are empty for now. Next commit
will populate them and remove the explicit init calls from platforms.

Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2015-10-28 16:13:40 +05:30
Vineet Gupta 964cf28f9d ARC: boot log: move helper macros to header for reuse
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2015-10-17 17:48:25 +05:30
Vineet Gupta e78fdfef84 ARCv2: spinlock/rwlock/atomics: Delayed retry of failed SCOND with exponential backoff
This is to workaround the llock/scond livelock

HS38x4 could get into a LLOCK/SCOND livelock in case of multiple overlapping
coherency transactions in the SCU. The exclusive line state keeps rotating
among contenting cores leading to a never ending cycle. So break the cycle
by deferring the retry of failed exclusive access (SCOND). The actual delay
needed is function of number of contending cores as well as the unrelated
coherency traffic from other cores. To keep the code simple, start off with
small delay of 1 which would suffice most cases and in case of contention
double the delay. Eventually the delay is sufficient such that the coherency
pipeline is drained, thus a subsequent exclusive access would succeed.

Link: http://lkml.kernel.org/r/1438612568-28265-1-git-send-email-vgupta@synopsys.com
Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2015-08-04 09:26:34 +05:30
Vineet Gupta e13c42ecbe ARCv2: Fix the peripheral address space detection
With HS 2.1 release, the peripheral space register no longer contains
the uncached space specifics, causing the kernel to panic early on.
So read the newer NON VOLATILE AUX register to get that info.

Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2015-08-03 19:34:07 +05:30
Vineet Gupta 624b71ee20 ARCv2: support HS38 releases
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2015-07-13 13:33:23 +05:30
Vineet Gupta b631788ab4 ARC: slightly refactor macros for boot logging
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2015-07-09 17:36:33 +05:30
Vineet Gupta aa93e8ef98 ARCv2: clocksource: Introduce 64bit local RTC counter
Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2015-06-22 14:06:56 +05:30
Vineet Gupta 4255b07f2c ARCv2: STAR 9000793984: Handle return from intr to Delay Slot
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2015-06-22 14:06:55 +05:30
Vineet Gupta 1f6ccfff63 ARCv2: Support for ARCv2 ISA and HS38x cores
The notable features are:
    - SMP configurations of upto 4 cores with coherency
    - Optional L2 Cache and IO-Coherency
    - Revised Interrupt Architecture (multiple priorites, reg banks,
        auto stack switch, auto regfile save/restore)
    - MMUv4 (PIPT dcache, Huge Pages)
    - Instructions for
	* 64bit load/store: LDD, STD
	* Hardware assisted divide/remainder: DIV, REM
	* Function prologue/epilogue: ENTER_S, LEAVE_S
	* IRQ enable/disable: CLRI, SETI
	* pop count: FFS, FLS
	* SETcc, BMSKN, XBFU...

Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2015-06-22 14:06:55 +05:30
Vineet Gupta 10d11e580c ARC: uncached base is hard constant for ARC, don't save it
ioremap already uses the hard define, just make sure BCR value matches
that

Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2015-06-22 14:06:54 +05:30
Vineet Gupta 036b2c5664 ARC: explicit'ify uboot support
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2015-06-19 18:09:27 +05:30
Vineet Gupta 565a9b497c ARC: RIP broken 64bit RTSC
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2015-06-19 18:09:24 +05:30
Vineet Gupta a44ec8bd2a ARC: Fix RTT boot printing
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2015-04-13 15:15:17 +05:30
Vineet Gupta 4c86231c14 ARC: fix /proc/cpuinfo for offline cpus
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2015-02-02 17:08:37 +05:30
Vineet Gupta 5637208253 ARC: boot: cpu feature print enhancements
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2014-10-13 14:46:22 +05:30
Vineet Gupta c4b9856b5e ARC: boot: consolidate cross-checking of h/w and s/w
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2014-10-13 14:46:22 +05:30
Vineet Gupta 435abb6daf ARC: RIP @running_on_hw
* No active users of this flag anymore

* flag itself was no longer usable with new simualtor which acts just like
  hardware, not providing the special chip-id = 0xffff which good old
  ISS used to do.

Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2014-10-13 14:46:17 +05:30
Vineet Gupta d7f8a085d4 ARC: [plat*] move code out of .init_machine into common
All the platforms do the same thing in init_machine callback so move it
out of callback into caller of callback

Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2014-10-13 14:46:13 +05:30
Vineet Gupta 619f30188f ARC: Allow SMP kernel to build/boot on UP-only infrastructure
In light of recent SNAFU with SMP build, allow simple platform to build
as SMP but run UP.

* Remove the dependence on simulation SMP extension to enable quick
  build/test iterations of SMP kernel.

* In absence of platform SMP registration, prevent the NULL smp feature
  name from borkign the system

Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2014-09-27 14:49:01 +05:30
Vineet Gupta e57d339a62 ARC: [cmdline] support External Device Trees from u-boot
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2014-01-16 18:53:16 +05:30
Vineet Gupta 59ed941353 ARC: [cmdline] uboot cmdline handling rework
* Moved cmdline copy from asm to "C" - allows for more robust checking
  of pointer validity etc.

* Remove the Kconfig option to do so, base it on a runtime value passed
  by u-boot

Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2014-01-16 18:49:38 +05:30
Linus Torvalds 10d0c9705e Merge tag 'devicetree-for-3.13' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux
Pull devicetree updates from Rob Herring:
 "DeviceTree updates for 3.13.  This is a bit larger pull request than
  usual for this cycle with lots of clean-up.

   - Cross arch clean-up and consolidation of early DT scanning code.
   - Clean-up and removal of arch prom.h headers.  Makes arch specific
     prom.h optional on all but Sparc.
   - Addition of interrupts-extended property for devices connected to
     multiple interrupt controllers.
   - Refactoring of DT interrupt parsing code in preparation for
     deferred probe of interrupts.
   - ARM cpu and cpu topology bindings documentation.
   - Various DT vendor binding documentation updates"

* tag 'devicetree-for-3.13' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (82 commits)
  powerpc: add missing explicit OF includes for ppc
  dt/irq: add empty of_irq_count for !OF_IRQ
  dt: disable self-tests for !OF_IRQ
  of: irq: Fix interrupt-map entry matching
  MIPS: Netlogic: replace early_init_devtree() call
  of: Add Panasonic Corporation vendor prefix
  of: Add Chunghwa Picture Tubes Ltd. vendor prefix
  of: Add AU Optronics Corporation vendor prefix
  of/irq: Fix potential buffer overflow
  of/irq: Fix bug in interrupt parsing refactor.
  of: set dma_mask to point to coherent_dma_mask
  of: add vendor prefix for PHYTEC Messtechnik GmbH
  DT: sort vendor-prefixes.txt
  of: Add vendor prefix for Cadence
  of: Add empty for_each_available_child_of_node() macro definition
  arm/versatile: Fix versatile irq specifications.
  of/irq: create interrupts-extended property
  microblaze/pci: Drop PowerPC-ism from irq parsing
  of/irq: Create of_irq_parse_and_map_pci() to consolidate arch code.
  of/irq: Use irq_of_parse_and_map()
  ...
2013-11-12 16:52:17 +09:00
Vineet Gupta 8e457d6a75 ARC: Annotate some functions as static
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2013-11-06 10:40:37 +05:30
Rob Herring be5973117b arc: remove unnecessary prom.h includes
Remove unnecessary prom.h includes in preparation to remove prom.h.

Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Acked-by: Vineet Gupta <vgupta@synopsys.com>
Acked-by: Grant Likely <grant.likely@linaro.org>
2013-10-09 20:04:01 -05:00
Rob Herring 880beb8807 arc: use common of_flat_dt_match_machine
Convert arc to use the common of_flat_dt_match_machine function.

Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Acked-by: Vineet Gupta <vgupta@synopsys.com>
2013-10-09 20:03:55 -05:00