Presently most of the 29-bit physical parts do P1/P2 segmentation
with a 1:1 cached/uncached mapping, jumping between the two to
control the caching behaviour. This provides the basic infrastructure
to maintain this behaviour on 32-bit physical parts that don't map
P1/P2 at all, using a shiny new linker section and corresponding
fixmap entry.
Signed-off-by: Stuart Menefy <stuart.menefy@st.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This implements kernel-level atomic rollback built on top of gUSA,
as an alternative non-IRQ based atomicity method. This is generally
a faster method for platforms that are lacking the LL/SC pairs that
SH-4A and later use, and is only supportable on legacy cores.
Signed-off-by: Stuart Menefy <stuart.menefy@st.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Shoves a magic word in to the empty_zero_page section for the
bootloader to work out whether to start the kernel in 29-bit
or 32-bit mode.
[ Renesas CPUs already take care of the initial PMB mappings entirely
in hardware and decide on 29-bit/32-bit physical depending on which
pin powered up the CPU, so this is mostly for ST parts. -- PFM ].
Signed-off-by: Stuart Menefy <stuart.menefy@st.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
mem= can't be used to grow the size of kernel memory, so provide a
warning to that effect.
Signed-off-by: Stuart Menefy <stuart.menefy@st.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This adds support for the SH7263 (SH-2A) CPU.
This particular CPU is a superset of SH7203, adding some additional
peripheral blocks and hooking up additional (reserved on SH7203)
vectors in the INTC block.
No visibly nasty surprises, yet..
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This was using the absolute path, which was confusing the make target.
Switch it to just 'zImage', as per powerpc.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Stuart Menefy
Paul Mundt
Nobuhiro Iwamatsu
Yuichi Nakamura