Patch from Daniel Jacobowitz
In order for userspace to find saved coprocessor registers, move them from
struct rt_sigframe into struct ucontext. Also allow space for glibc's
sigset_t, so that userspace and kernelspace can use the same ucontext
layout. Define the magic numbers for iWMMXt in the header file for easier
reference. Include the size of the coprocessor data in the magic numbers.
Also define magic numbers and layout for VFP, not yet saved.
Signed-off-by: Daniel Jacobowitz <dan@codesourcery.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
GDB couldn't reliably tell the difference between the old and new
non-rt sigframes, so provide it with a number at the beginning which
will never appear in the old sigframe, and hence provide gdb with a
reliable way to tell the two apart.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Gather the common sigmask savbing code inside setup_sigcontext(), and
rename the function setup_sigframe(). Pass it a sigframe structure.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Gather the sigmask restoration code inside restore_sigcontext(), and
rename the function restore_sigframe(). Pass it a sigframe structure.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
sigframe is now a contained subset of rt_sigframe, so we can start
to re-use code which accesses sigframe data for both rt and non-rt
signals.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
ucontext contains both the sigcontext and sigmask structures, and
is also used for rt signal contexts. Re-use this structure for
non-rt signals.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
There's not much point in splitting the sigmask between two different
locations, so copy it entirely into a proper sigset_t. This will
eventually allow rt_sigframe and sigframe to share more code.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
These two members appear to be surplus to requirements. Discussing
this issue with glibc folk:
| > Additionally, do you see any need for these weird "puc" and "pinfo"
| > pointers in the kernels rt_sigframe structure? Can we kill them?
|
| We can kill them. I checked with Phil B. about them last week, and he
| didn't remember any reason they still needed to be there. And nothing
| should know where they are on the stack. Unfortunately, doing this
| will upset GDB, which knows that the saved registers are 0x88 bytes
| above the stack pointer on entrance to an rt signal trampoline; but,
| since puc and pinfo are quite recognizable, I can adapt GDB to support
| the new layout if you want to remove them.
So remove them.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The page size encoding passed to tlbie is incorrect for new-style
large pages. This fixes it. This doesn't affect anything on older
machines because mmu_psize_defs[psize].penc (the page size encoding)
is 0 for 4k and 16M pages (the two are distinguished by a separate "is
a large page" bit).
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
This patch sets the max_cache_size value required to tune up
scheduler in SMP systems. Otherwise, the calculated
migration_cost is too high and task scheduling may lock up.
Signed-off-by: Krzysztof Helt <krzysztof.h1@wp.pl>
Signed-off-by: David S. Miller <davem@davemloft.net>
* master.kernel.org:/pub/scm/linux/kernel/git/davem/sparc-2.6:
[SPARC64]: Avoid JBUS errors on some Niagara systems.
[FUSION]: Fix mptspi.c build with CONFIG_PM not set.
[TG3]: Handle Sun onboard tg3 chips more correctly.
[SPARC64]: Dump local cpu registers in sun4v_log_error()
Both Integrator and Versatile were using set_irq_handler() and
enable_irq(), and working around the initialisation of the
chained interrupt, instead of the more correct
set_irq_chained_handler() function. Fix Integrator and
Versatile to use the right function, and remove these work-arounds.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Doing PCI config space accesses to non-present PCI slots
can result in fatal JBUS errors if the PCI config access
hypervisor call is performed on cpus other than the boot
cpu.
PCI config space accesses to present PCI slots works just
fine.
Recursively traverse the OBP device tree under the PCI
controller node and record all present device IDs into
a small hash table.
Avoid the hypervisor call for any PCI config space access
attempt for a device not recorded in the hash table.
Signed-off-by: David S. Miller <davem@davemloft.net>
The IBM Cell blade firmware might confuse the kernel to think it's a
pSeries machine. This fixes it for now. With a bit of luck, the firmware
will be updated to avoid that in the future but currently that patch is
needed.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
The code in prom_init.c calling the firmware
ibm,client-architecture-support method on pSeries has a bug where it
fails to properly pass the instance handle of the firmware object when
trying to call a method. Result ranges from the call doing nothing to
the firmware crashing. (Found by Segher, thanks !)
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Segher Boessenkool <segher@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
This fixes a bug found by Dave Jones that means that it is possible
for userspace to provoke a machine check on 32-bit kernels. This
also fixes a couple of other places where I found similar problems
by inspection.
Signed-off-by: Paul Mackerras <paulus@samba.org>
From: Lennert Buytenhek <buytenh@wantstofly.org>
The recent renaming of m48t86's ->readb() and ->writeb() platform driver
methods (2d7b20c188) to ->readbyte() and
->writebyte() to fix the ia64 build broke the build of the cirrus ep93xx
ARM platform. This patch fixes it up.
Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org>
Cc: Alessandro Zummo <a.zummo@towertech.it>
Cc: Russell King <rmk@arm.linux.org.uk>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
From: "Andy Currid" <ACurrid@nvidia.com>
This patch fixes a kernel panic during boot that occurs on NVIDIA platforms
that have HPET enabled.
When HPET is enabled, the standard timer IRQ is routed to IOAPIC pin 2 and is
advertised as such in the ACPI APIC table - but an earlier workaround in the
kernel was ignoring this override. The fix is to honor timer IRQ overrides
from ACPI when HPET is detected on an NVIDIA platform.
Signed-off-by: Andy Currid <acurrid@nvidia.com>
Cc: "Brown, Len" <len.brown@intel.com>
Cc: "Yu, Luming" <luming.yu@intel.com>
Cc: Andi Kleen <ak@muc.de>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Daniel Jacobowitz
Russell King
Arnd Bergmann
Randy Dunlap
Linus Torvalds
David S. Miller
Krzysztof Helt
Arnd Bergmann
Benjamin Herrenschmidt
Paul Mackerras
Lennert Buytenhek
Andy Currid