Commit Graph

1143 Commits

Author SHA1 Message Date
Chris Wilson 77d07fd9d7 drm/i915/lvds: Remove busy wait for powering down the panel
Just assume that it will turn off...

Reported-by: Sitsofe Wheeler <sitsofe@yahoo.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-09-12 13:24:16 +01:00
Chris Wilson b222f26733 drm/i915/i2c: The bit-banging interface controls the delay, drop ours
Remove our redundant udelay() as the timings are already handled by the
i2c-algo-bit controller.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-09-11 22:28:13 +01:00
Chris Wilson fe255d0028 drm/i915/dp: Convert a udelay(17000) to a sleep during link-off
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-09-11 21:37:48 +01:00
Chris Wilson 5eddb70ba2 drm/i915: Use macros to switch between equivalent pipe registers
The purpose is to make the code much easier to read and therefore reduce
the possibility for bugs.

A side effect is that it also makes it much easier for the compiler,
reducing the object size by 4k -- from just a few functions!

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-09-11 19:27:12 +01:00
Chris Wilson 4ed765f966 drm/i915: Tidy Ironlake watermark computation
Refactor the common code into seperate functions and use the MIN(large,
small) buffer calculation for self-refresh watermarks.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-09-11 10:59:57 +01:00
Chris Wilson bed4a6734b drm/i915: Fix updating FBC
We need to track different state on each generation in order to detect
when we need to refresh the FBC registers.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-09-11 10:50:55 +01:00
Jesse Barnes ea056c14a2 drm/i915: enable thermal reporting for IPS
Thermal reporting may not be enabled by default on some machines, so
enable the appropriate bits to allow IPS to get the data it needs from
the CPU thermal device.

Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-09-11 10:49:34 +01:00
Chris Wilson 8b3016c4f4 Merge branch 'drm-intel-fixes' into drm-intel-next 2010-09-11 09:49:58 +01:00
Chris Wilson 021357acc8 drm/i915: Use the real FDI frequency for determining b/w
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-09-10 23:13:51 +01:00
Chris Wilson 8c4223bee9 drm/i915: Only call udelay() when waiting for clocks to stabilise
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-09-10 23:13:51 +01:00
Chris Wilson d5e0d2f519 drm/i915: Ensure all PLL registers are flushed before a udelay()
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-09-10 23:13:50 +01:00
Jesse Barnes c64e311e65 drm/i915: set FDI RX TU size to match transmit size
This allows FDI error checking to work.

Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-09-10 23:13:49 +01:00
Jesse Barnes de9c27bf70 drm/i915: don't write TU size to N1 reg
TU size is only part of the M1 and M2 regs, not the N regs.  This keeps
us from overwriting a reserved field.

Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-09-10 23:13:48 +01:00
Jesse Barnes 0e23b99d25 drm/i915: split Ironlake FDI enable function
Easier to read, and will pair up with a disable function.

Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-09-10 23:13:48 +01:00
Jesse Barnes c98e9dcf90 drm/i915: enable PCH PLL, FDI training and transcoder even for eDP
eDP panels require these to be set up prior to panel power sequencing,
or they'll fail to power on due to an "asset not ready" check.  And of
course, eDP panels attached to anything other than DP_A need them
enabled regardless, since they'll be driven from the CPU through FDI out
to the PCH.

Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-09-10 23:13:47 +01:00
Jesse Barnes 7e7d76c306 drm/i915: use i915 and Ironlake CRTC enable/disable functions in prepare/commit
This will allow us to optimize our prepare/commit paths a bit better.

Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
[ickle: minor tweak to handle the cursor across pipe resizing]
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-09-10 23:12:55 +01:00
Jesse Barnes 4d12fe0b48 drm/i915: don't unlock panel regs
This was just a workaround for some broken Ironlake CRTC code.

Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-09-10 22:23:45 +01:00
Jesse Barnes 0b8765c6e7 drm/i915: split i9xx CRTC enable/disable code
So we can use it for CRTC prepare/commit.

Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-09-10 22:23:45 +01:00
Jesse Barnes 6be4a6078e drm/i915: split Ironlake CRTC enable/disable code
This way we can also use it in CRTC prepare/commit.  Also makes it
easier to split out FDI and other code.

Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-09-10 22:23:44 +01:00
Chris Wilson e642abbf30 drm/i915: Adapt workqueue to new alloc_workqueue interface
create_singlethreaded_workqueue() is being phased out for a new
concurrency managed task infrastructure.

Adapt our workqueue constructor to explicitly create a domain that only
allows the execution of a single task at any time. All the tasks are
expected to require the dev->struct_mutex, so would block concurrency of
other tasks if we allow more than a single i915 task to be run at once.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-09-10 16:04:41 +01:00
Jesse Barnes dd8849c8f5 drm/i915: don't enable self-refresh on Ironlake
We don't know how to enable it safely, especially as outputs turn on and
off.  When disabling LP1 we also need to make sure LP2 and 3 are already
disabled.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=29173
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=29082
Reported-by: Chris Lord <chris@linux.intel.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Tested-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Cc: stable@kernel.org
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-09-10 15:11:43 +01:00
Chris Wilson 5ba2aaaaa1 drm/i915/debug: Include Ironlake in self-refresh status
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-09-09 19:14:06 +01:00
Chris Wilson df0e924883 drm/i915: Make the connector->encoder relationship explicit
Currently we have a exact mapping of a connector onto an encoder for its
whole lifetime. Make this an explicit property of the structure and so
simplify the code.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2010-09-09 17:00:43 +01:00
Chris Wilson f875c15a4f drm/i915: Use the direct mapping of pipe->crtc
Why iterate all the crtcs to find the pipe, when we already know which
crtc is attached to which pipe?

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2010-09-09 17:00:36 +01:00
Chris Wilson 4ef69c7a64 drm/i915: Rename intel_encoder->enc to base for consistency
[Patch is slightly larger than is strictly necessary to fixup
surrounding checkpatch.pl errors.]

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2010-09-09 17:00:13 +01:00