Remove the circular buffering mechanism for exceptions. Instead, point RETX
at a safe location from which to fetch three NOPs.
This safe location is now in the fixed code area, and also used for certain
anomaly workarounds, to ensure that user space can find a valid ICPLB when
things are built with CONFIG_MPU.
Also, save I/DCPLB_FAULT_ADDRESS when lowering to level 5, since the hardware
reg is valid only at exception level.
Signed-off-by: Bernd Schmidt <bernds_cb1@t-online.de>
Signed-off-by: Bryan Wu <cooloney@kernel.org>
- add platform device resources in board files
- add new bfin_sir.h to each machines
Signed-off-by: Graf Yang <graf.yang@analog.com>
Signed-off-by: Bryan Wu <cooloney@kernel.org>
The irq setup code no longer calls gpio request and free.
This patch also changes the default gpio_free behavior on Blackfin.
A freed GPIO keeps it's last state, and is not defaulted back to
an input. This is also what all other architectures do.
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
Signed-off-by: Bryan Wu <cooloney@kernel.org>
detect the memory available in the system on the fly by default
rather than forcing people to set this manually in the kconfig
Signed-off-by: Mike Frysinger <vapier.adi@gmail.com>
Signed-off-by: Bryan Wu <cooloney@kernel.org>
http://blackfin.uclinux.org/gf/project/uclinux-dist/tracker/?action=TrackerItemEdit&tracker_item_id=3978
Section data_l1_cacheline_aligned should be defined in
link script of kernel, when L1 data sram bank A is not available.
In bf536 with all data cache is enabled, there is no L1 data sram.
Current link script won't define section data_l1.cacheline_aligned in
this case. But, if user select put cacheline_aligned data into l1 sram
in kernel menuconfig, these data will be dropped and access to these
data will trigger data CPLB exception.
Do panic in l1 relocation code as well.
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Signed-off-by: Bryan Wu <cooloney@kernel.org>
- allow bootrom to be readable from supervisor mode
- delete unused local variable "addr"
- punt unused local defines of cplbinfo.c
Signed-off-by: Mike Frysinger <vapier.adi@gmail.com>
Signed-off-by: Bryan Wu <cooloney@kernel.org>
The DMA base registers are available in a global named "base_addr" for
every Blackfin variant. Give this a more descriptive name, and remove
duplicate tables from some drivers.
Signed-off-by: Bernd Schmidt <bernds_cb1@t-online.de>
Signed-off-by: Bryan Wu <cooloney@kernel.org>
Mike Frysinger
Michael Hennerich
Sonic Zhang
Bernd Schmidt
Graf Yang
Mike Frysinger
Robin Getz
Grace Pan