Commit Graph

652 Commits

Author SHA1 Message Date
Nicolas Pitre 499b2ea11f [ARM] 3103/1: ARM EABI: stack pointer must be 64-bit aligned (part 2)
Patch from Nicolas Pitre

We must make sure that assembly code that modifies the stack pointer
before calling a C function does it so it remains 64-bit aligned.

Signed-off-by: Nicolas Pitre <nico@cam.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2006-01-14 16:18:09 +00:00
Nicolas Pitre 2dede2d8e9 [ARM] 3102/1: ARM EABI: stack pointer must be 64-bit aligned after a CPU exception
Patch from Nicolas Pitre

The ARM EABI says that the stack pointer has to be 64-bit aligned for
reasons already mentioned in patch #3101 when calling C functions.

We therefore must verify and adjust sp accordingly when taking an
exception from kernel mode since sp might not necessarily be 64-bit
aligned if the exception occurs in the middle of a kernel function.

If the exception occurs while in user mode then no sp fixup is needed as
long as sizeof(struct pt_regs) as well as any additional syscall data
stack space remain multiples of 8.

Signed-off-by: Nicolas Pitre <nico@cam.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2006-01-14 16:18:08 +00:00
Russell King fa0fe48fcc [ARM] Separate VIC (vectored interrupt controller) support from Versatile
Other machines may wish to make use of the VIC support code, so
move it to arch/arm/common.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2006-01-13 21:30:48 +00:00
Russell King 5ff3fd2716 [ARM] Remove useless 'default n' from Kconfig files
The default is already 'n' so there's no need to explicitly state it.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2006-01-13 21:09:17 +00:00
Hyok S. Choi afeb90ca08 [ARM] Support register switch in nommu mode
This patch adds register switch support in nommu mode.

Signed-off-by: Hyok S. Choi <hyok.choi@samsung.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2006-01-13 21:05:25 +00:00
Nicolas Pitre 946d4935fc [ARM] 3260/1: remove phys_ram from struct machine_desc (part 2)
Patch from Nicolas Pitre

This field is redundent since it must be equal to PHYS_OFFSET anyway.

Now that no code uses it anymore, mark it deprecated and remove all
initializations from the tree.

Signed-off-by: Nicolas Pitre <nico@cam.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2006-01-13 20:51:52 +00:00
Nicolas Pitre 2df96b34aa [ARM] 3259/1: remove phys_ram from struct machine_desc (part 1)
Patch from Nicolas Pitre

This field is redundent since it must be equal to PHYS_OFFSET anyway.

First, let's  use PHYS_OFFSET directly instead.

Signed-off-by: Nicolas Pitre <nico@cam.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2006-01-13 20:51:46 +00:00
Lennert Buytenhek dd29c72771 [ARM] 3257/1: ixp2000: map in scratch and sram
Patch from Lennert Buytenhek

For the ixp2000 netdev driver, we need to map in a chunk of SRAM (to
store the transmit and receive descriptors) and the scratch get/put
area (so that we can use the scratchpad rings in the cpu for managing
the descriptors.)  These are the final two mappings needed for the
netdev driver and the last missing piece for the driver in mainline
to work.

Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2006-01-13 20:51:43 +00:00
Linus Torvalds bf785ee0ae Merge master.kernel.org:/home/rmk/linux-2.6-arm 2006-01-12 12:23:49 -08:00
Arjan van de Ven 00431707be [ARM] Convert some arm semaphores to mutexes
The arm clock semaphores are strict mutexes, convert them to the new
mutex implementation

Signed-off-by: Arjan van de Ven <arjan@infradead.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2006-01-12 18:42:23 +00:00
Russell King f4619025a5 [ARM] Allow r2 to be passed through the decompressor to the kernel
This is part of a patch from Marc Singer to allow r2 to be
passed to the kernel.  Marc's original comments follow:

This revised R2 (atags pointer) patch incorporates comments from Nico
Pitre and Ben Dooks. It modifies the head.S files such that the R2
value set by the bootloader is conveyed to the kernel startup code.
The kernel head.S heuristically validates the pointer. It will set R2
to zero if it believes the pointer is invalid. Presently, it requires
that the ATAGS list reside in the first 16KiB of physical RAM.
Relaxing this contraint may be both desirable as well as tricky.

Signed-off-by: Marc Singer <elf@buici.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2006-01-12 17:17:57 +00:00
Al Viro 32d39a9355 [PATCH] arm: task_stack_page()
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-01-12 09:08:56 -08:00
Al Viro 5520582392 [PATCH] arm: end_of_stack()
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-01-12 09:08:56 -08:00
Al Viro 815d5ec86e [PATCH] arm: task_pt_regs()
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-01-12 09:08:55 -08:00
Al Viro e7c1b32fd3 [PATCH] arm: task_thread_info()
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-01-12 09:08:55 -08:00
Catalin Marinas 90303b1023 [ARM] 3256/1: Make the function-returning ldm's use sp as the base register
Patch from Catalin Marinas

If the low interrupt latency mode is enabled for the CPU (from ARMv6
onwards), the ldm/stm instructions are no longer atomic. An ldm instruction
restoring the sp and pc registers can be interrupted immediately after sp
was updated but before the pc. If this happens, the CPU restores the base
register to the value before the ldm instruction but if the base register
is not sp, the interrupt routine will corrupt the stack and the restarted
ldm instruction will load garbage.

Note that future ARM cores might always run in the low interrupt latency
mode.

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2006-01-12 16:53:51 +00:00
Catalin Marinas 6b090a25fe [ARM] 3234/1: Update cpu_architecture() to deal with the new ID format
Patch from Catalin Marinas

Since ARM1176, the CPU ID format has changed and it will also be used for
future ARM architectures.

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2006-01-12 16:28:16 +00:00
Kevin Hilman 37134cd55d [ARM] 3209/1: Configurable DMA-consistent memory region
Patch from Kevin Hilman

This patch increase available DMA-consistent memory allocated by dma_coherent_alloc(). The default remains at 2M (defined in asm/memory.h) and each platform has the ability to override in asm/arch-foo/memory.h.

Signed-off-by: Kevin Hilman <kevin@hilman.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2006-01-12 16:12:21 +00:00
Randy Dunlap a941564458 [PATCH] capable/capability.h (arch/)
arch: Use <linux/capability.h> where capable() is used.

Signed-off-by: Randy Dunlap <rdunlap@xenotime.net>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-01-11 18:42:14 -08:00
Andrew Victor 49978db4f3 [ARM] 3247/1: AT91RM9200 support for 2.6 (Cogent CSB337 & CSB637 boards) (Patch
#3244)

Patch from Andrew Victor

This patch adds support to the 2.6 kernel series for the Atmel
AT91RM9200 processor.

This patch is the support for the Cogent CSB337 and CSB637 boards.

Signed-off-by: Andrew Victor <andrew@sanpeople.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2006-01-10 16:59:29 +00:00
Andrew Victor f0a13854be [ARM] 3243/2: AT91RM9200 support for 2.6 (Atmel DK & EK boards)
Patch from Andrew Victor

This patch adds support to the 2.6 kernel series for the Atmel
AT91RM9200 processor.

This patch is the support for Atmel's DK and EK boards.

Signed-off-by: Andrew Victor <andrew@sanpeople.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2006-01-10 16:59:28 +00:00
Jesper Juhl 3c6bee1d40 [PATCH] turn "const static" into "static const"
ICC likes to complain about storage class not being first, GCC doesn't
care much (except for cases like "inline static").
have a hard time seeing how it could break anything.

Thanks to Gabriel A. Devenyi for pointing out
http://linuxicc.sourceforge.net/ which is what made me create this patch.

Signed-off-by: Jesper Juhl <jesper.juhl@gmail.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-01-10 08:01:55 -08:00
Linus Torvalds a457aa6c2b Merge git://git.kernel.org/pub/scm/linux/kernel/git/bunk/trivial 2006-01-09 17:06:53 -08:00
Adrian Bunk 93b1fae491 spelling: s/trough/through/
Additionally, one comment was reformulated by Joe Perches <joe@perches.com>.

Signed-off-by: Adrian Bunk <bunk@stusta.de>
2006-01-10 00:13:33 +01:00
Ben Dooks fe38ea5623 [ARM] 3246/1: S3C24XX - retab clock list in arch/arm/mach-s3c2410/clock.c
Patch from Ben Dooks

Properly tabulate the clock table in arch/arm/mach-s3c2410/clock.c
and put the requisite commas on the end of the structs.

Fix the comment about clock enable and disable in the setup code

Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2006-01-09 21:16:18 +00:00