BF524 is the same as BF525, except the speed of the processor
BF526 is the same as BF527, except the speed of the processor
Signed-off-by: Bryan Wu <cooloney@kernel.org>
support two cascaded AD73322 cards, more uncached DMA
memory is needed, so add a choice to provide 4M DMA memory
Signed-off-by: Cliff Cai <cliff.cai@analog.com>
Signed-off-by: Bryan Wu <cooloney@kernel.org>
FSVOtest in this case, since I don't have the hardware...
However, all changes seen by gcc are actually
- explicit cast to unsigned short in return expression of functions
returning unsigned short
- csum_fold() return type changed from unsigned int to __sum16
(unsigned short), same as for all other architecture and as net/* expects;
expression actually returned is ((~(sum << 16)) >> 16) with sum being
unsigned 32bit, so it's (a) going to fit into the range of unsigned short
and (b) had been unsigned all along, so no sign expansion mess happened.
Tested-by: Bryan Wu <cooloney@kernel.org>
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
Signed-off-by: David Miller <davem@davemloft.net>
Signed-off-by: Bryan Wu <cooloney@kernel.org>
When transferring to IRQ5 from an exception, save SYSCFG in memory across the
transfer and clear the trace bit.
When we get a single step exception, check whether we can safely clear the
trace bit in SYSCFG. We can (and should) clear it after the first instruction
of the interrupt handler; the first insn saves SYSCFG to the stack in all
handlers.
Signed-off-by: Bernd Schmidt <bernds_cb1@t-online.de>
Signed-off-by: Bryan Wu <cooloney@kernel.org>
This modifies <asm-blackfin/types.h> to use the <asm-generic/int-*.h>
generic include files.
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Cc: Bryan Wu <cooloney@kernel.org>
Unaligned access is ok for the following arches:
cris, m68k, mn10300, powerpc, s390, x86
Arches that use the memmove implementation for native endian, and
the byteshifting for the opposite endianness.
h8300, m32r, xtensa
Packed struct for native endian, byteshifting for other endian:
alpha, blackfin, ia64, parisc, sparc, sparc64, mips, sh
m86knommu is generic_be for Coldfire, otherwise unaligned access is ok.
frv, arm chooses endianness based on compiler settings, uses the byteshifting
versions. Remove the unaligned trap handler from frv as it is now unused.
v850 is le, uses the byteshifting versions for both be and le.
Remove the now unused asm-generic implementation.
Signed-off-by: Harvey Harrison <harvey.harrison@gmail.com>
Acked-by: David S. Miller <davem@davemloft.net>
Cc: <linux-arch@vger.kernel.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
- add platform device resources in board files
- add new bfin_sir.h to each machines
Signed-off-by: Graf Yang <graf.yang@analog.com>
Signed-off-by: Bryan Wu <cooloney@kernel.org>
If the new value written to the PLL_CTL or VR_CTL register is the
same as the previous value, the PLL wake-up will occur immediately
(PLL is already locked), but the core and system clock will be
bypassed for the PLL_LOCKCNT duration. For this interval, code will
execute at the CLKIN rate instead of at the expected CCLK rate.
Software should guard against this condition by comparing the
current value to the new value before writing the new value.
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
Signed-off-by: Bryan Wu <cooloney@kernel.org>
The DMA base registers are available in a global named "base_addr" for
every Blackfin variant. Give this a more descriptive name, and remove
duplicate tables from some drivers.
Signed-off-by: Bernd Schmidt <bernds_cb1@t-online.de>
Signed-off-by: Bryan Wu <cooloney@kernel.org>
Javier Herrero
Bryan Wu
Michael Hennerich
Cliff Cai
Al Viro
Mike Frysinger
Bernd Schmidt
Vitja Makarov
H. Peter Anvin
Harvey Harrison
Mike Frysinger
Graf Yang
Sonic Zhang
Robert P. J. Day