Switch to WARN if no adapter name is given, otherwise we won't know who
missed to do that. Add error message if device registration fails.
Update error message for missing algo to match style of the others.
Signed-off-by: Wolfram Sang <wsa-dev@sang-engineering.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Move recovery init to a seperate function to let have
i2c_register_adapter() less lines and to avoid goto and a label.
Refactor string handling there for consistency and to save some bytes.
Signed-off-by: Wolfram Sang <wsa-dev@sang-engineering.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Added ACPI support for the I2C controller present on Broadcom's
Vulcan ARM64 processor. ACPI ID used by the controller is BRCM9007.
Changed the xlp9xx_i2c_get_frequency() function to use
device_property_read_u32() API so that the "clock-frequency" value
can be read from _DSD in ACPI mode.
Signed-off-by: Tanmay Jagdale <tanmay.jagdale@broadcom.com>
Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
This driver should be buildable with COMPILE_TEST so
add this to the dependency for it.
Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
There is no code protecting i2c_dev to be freed after it is returned
from i2c_dev_get_by_minor() and using it to access the value which we
already have (minor) isn't safe really.
Avoid using it and get the adapter directly from 'minor'.
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Reviewed-by: Jean Delvare <jdelvare@suse.de>
Tested-by: Jean Delvare <jdelvare@suse.de>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
The i801 chip can handle the Host Notify feature since ICH 3 as mentioned
in http://www.intel.com/content/dam/doc/datasheet/82801ca-io-controller-hub-3-datasheet.pdf
Enable the functionality unconditionally and propagate the alert
on each notification.
With a T440s and a Synaptics touchpad that implements Host Notify, the
payload data is always 0x0000, so I am not sure if the device actually
sends the payload or if there is a problem regarding the implementation.
Tested-by: Andrew Duggan <aduggan@synaptics.com>
Signed-off-by: Benjamin Tissoires <benjamin.tissoires@redhat.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
On a CRC error while using hardware-supported PEC, an additional
error bit is set in the auxiliary status register. If this bit
isn't cleared, all subsequent operations will fail, essentially
hanging the controller.
The fix is simple: check, report, and clear the bit in
i801_check_post(). Also, in case the driver starts with the
hardware in that state, clear it in i801_check_pre() as well.
Signed-off-by: Ellen Wang <ellen@cumulusnetworks.com>
Tested-by: Jean Delvare <jdelvare@suse.de>
Reviewed-by: Jean Delvare <jdelvare@suse.de>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
This driver does not do anything special in module init/exit. This patch
eliminates the module init/exit boilerplate code by utilizing the
module_isa_driver macro.
Signed-off-by: William Breathitt Gray <vilhelm.gray@gmail.com>
[wsa: remove two empty lines while here]
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
This driver does not do anything special in module init/exit. This patch
eliminates the module init/exit boilerplate code by utilizing the
module_isa_driver macro.
Signed-off-by: William Breathitt Gray <vilhelm.gray@gmail.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
On some platforms, such as Intel Medfield, the I2C slave devices are enumerated
through SFI tables where bus numbering is expected to be defined in the OS.
Make the bus number allocation robust for such platforms.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
I believe i2c-designware-baytrail.c doesn't have strict dependency that
Intel SoC IOSF Sideband support must be always built-in in order to be
able to compile support for Intel Baytrail I2C bus sharing HW semaphore.
Redefine build dependencies so that CONFIG_IOSF_MBI=y is required only
when CONFIG_I2C_DESIGNWARE_PLATFORM is built-in.
Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com>
Acked-by: David Box <david.e.box@linux.intel.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
qup_i2c_issue_read() derives the address from i2c_msg.
This called in the read path when I2C_M_RD flag is set.
Therefore, use the 8 bit address helper function.
Signed-off-by: Naveen Kaje <nkaje@codeaurora.org>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Among the bus errors reported from the QUP_MASTER_STATUS register
only NACK is considered and transfer gets suspended, while
other errors are ignored. Correct this and suspend the transfer
for other errors as well. This avoids unnecessary 'timeouts' which
happens when waiting for events that would never happen when there
is already an error condition on the bus. Also the error handling
procedure should be the same for both NACK and other bus errors in
case of dma mode. So correct that as well.
Signed-off-by: Sricharan R <sricharan@codeaurora.org>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
With CONFIG_DEBUG_SG is enabled and when dma mode is used, below dump is seen,
------------[ cut here ]------------
kernel BUG at include/linux/scatterlist.h:140!
Internal error: Oops - BUG: 0 [#1] PREEMPT SMP
Modules linked in:
CPU: 0 PID: 1 Comm: swapper/0 Not tainted 4.4.0-00459-g9f087b9-dirty #7
Hardware name: Qualcomm Technologies, Inc. APQ 8016 SBC (DT)
task: ffffffc036868000 ti: ffffffc036870000 task.ti: ffffffc036870000
PC is at qup_sg_set_buf.isra.13+0x138/0x154
LR is at qup_sg_set_buf.isra.13+0x50/0x154
pc : [<ffffffc0005a0ed8>] lr : [<ffffffc0005a0df0>] pstate: 60000145
sp : ffffffc0368735c0
x29: ffffffc0368735c0 x28: ffffffc036873752
x27: ffffffc035233018 x26: ffffffc000c4e000
x25: 0000000000000000 x24: 0000000000000004
x23: 0000000000000000 x22: ffffffc035233668
x21: ffffff80004e3000 x20: ffffffc0352e0018
x19: 0000004000000000 x18: 0000000000000028
x17: 0000000000000004 x16: ffffffc0017a39c8
x15: 0000000000001cdf x14: ffffffc0019929d8
x13: ffffffc0352e0018 x12: 0000000000000000
x11: 0000000000000001 x10: 0000000000000001
x9 : ffffffc0012b2d70 x8 : ffffff80004e3000
x7 : 0000000000000018 x6 : 0000000030000000
x5 : ffffffc00199f018 x4 : ffffffc035233018
x3 : 0000000000000004 x2 : 00000000c0000000
x1 : 0000000000000003 x0 : 0000000000000000
Process swapper/0 (pid: 1, stack limit = 0xffffffc036870020)
Stack: (0xffffffc0368735c0 to 0xffffffc036874000)
sg_set_bug expects that the buf parameter passed in should be from
lowmem and a valid pageframe. This is not true for pages from
dma_alloc_coherent which can be carveouts, hence the check fails.
Change allocation of sg buffers from dma_coherent memory to kzalloc
to fix the issue. Note that now dma_map/unmap is used to make the
kzalloc'ed buffers coherent before passing it to the dmaengine.
Signed-off-by: Sricharan R <sricharan@codeaurora.org>
Reviewed-by: Andy Gross <andy.gross@linaro.org>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
- new method to caculate i2c timings for rk3399:
There was an timing issue about "repeated start" time at the I2C
controller of version0, controller appears to drop SDA at .875x (7/8)
programmed clk high. On version 1 of the controller, the rule(.875x)
isn't enough to meet tSU;STA
requirements on 100k's Standard-mode. To resolve this issue,
sda_update_config, start_setup_config and stop_setup_config for I2C
timing information are added, new rules are designed to calculate
the timing information at new v1.
- pclk and function clk are separated at rk3399
Signed-off-by: David Wu <david.wu@rock-chips.com>
Tested-by: Caesar Wang <wxt@rock-chips.com>
Tested-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
[wsa: fixed whitespace issue]
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Wolfram Sang
Axel Lin
Tanmay Jagdale
Ben Dooks
viresh kumar
Andy Shevchenko
Benjamin Tissoires
Ellen Wang
William Breathitt Gray
Jarkko Nikula
Weifeng Voon
Naveen Kaje
Sricharan R
David Wu