Commit Graph

286 Commits

Author SHA1 Message Date
Olof Johansson 24025f6f58 Merge branch 'next/dt-samsung' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/dt
From Kukjin Kim:

Here is Samsung DT for v3.8 and this is including DT for EXYNOS4X12
SoC, SMDK4412 board, pinctrl for exynos4x12, TMU, MFC, SATA and SATA
PHY.

As I commented on [4/7], this branch merged pinctrl/samsung to support
pinctrl for exynos4x12 without useless merge conflicts.

* 'next/dt-samsung' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: (32 commits)
  ARM: EXYNOS: DT Support for SATA and SATA PHY
  ARM: dts: Remove broken-voltage property from sdhci node for exynos4210-trats
  ARM: dts: Add node for touchscreen for exynos4210-trats
  ARM: dts: Add node for touchscreen voltage regulator for exynos4210-trats
  ARM: dts: Add node for i2c3 bus for exynos4210-trats
  ARM: dts: Add nodes for GPIO keys available on Trats
  ARM: dts: Update for pinctrl-samsung driver for exynos4210-trats
  ARM: dts: Add nodes for pin controllers for exynos4x12
  pinctrl: samsung: Add support for EXYNOS4X12
  gpio: samsung: Skip registration if pinctrl driver is present on EXYNOS4X12
  ARM: EXYNOS: Skip wakeup-int setup if pinctrl driver is used on EXYNOS4X12
  ARM: dts: add board dts file for EXYNOS4412 based SMDK board
  ARM: dts: Add support for EXYNOS4X12 SoCs
  ARM: EXYNOS: Add devicetree node for TMU driver for exynos5
  ARM: EXYNOS: Add devicetree node for TMU driver for exynos4
  ARM: EXYNOS: Add MFC device tree support
  ARM: dts: Enable serial controllers on Origen and SMDKV310
  Documentation: Update samsung-pinctrl device tree bindings documentation
  pinctrl: samsung: Add GPIO to IRQ translation
  pinctrl: exynos: Set pin function to EINT in irq_set_type of wake-up EINT
  ...

Add/add conflicts in:
	arch/arm/boot/dts/exynos5250-smdk5250.dts
	arch/arm/boot/dts/exynos5250.dtsi
	arch/arm/mach-exynos/mach-exynos5-dt.c

Signed-off-by: Olof Johansson <olof@lixom.net>
2012-11-21 11:30:32 -08:00
Tomasz Figa 6edc794a5f pinctrl: samsung: Add support for EXYNOS4X12
This patch extends the driver with any necessary SoC-specific
definitions to support EXYNOS4X12 SoCs.

Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Thomas Abraham <thomas.abraham@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2012-11-19 10:02:07 +09:00
Kukjin Kim bab797f8e3 Merge remote-tracking branch 'pinctrl/samsung' into next/pinctrl-samsung 2012-11-19 10:00:41 +09:00
Axel Lin 924da31416 pinctrl: samsung and exynos need to depend on OF && GPIOLIB
This patch fixes below build error when !CONFIG_OF_GPIO.

  CC      drivers/pinctrl/pinctrl-samsung.o
drivers/pinctrl/pinctrl-samsung.c: In function 'samsung_pinctrl_parse_dt_pins':
drivers/pinctrl/pinctrl-samsung.c:557:19: warning: unused variable 'prop' [-Wunused-variable]
drivers/pinctrl/pinctrl-samsung.c: In function 'samsung_gpiolib_register':
drivers/pinctrl/pinctrl-samsung.c:797:5: error: 'struct gpio_chip' has no member named 'of_node'
make[2]: *** [drivers/pinctrl/pinctrl-samsung.o] Error 1
make[1]: *** [drivers/pinctrl] Error 2
make: *** [drivers] Error 2

The samsung pinctrl driver supports only device tree enabled
platforms. Thus make PINCTRL_SAMSUNG depend on OF && GPIOLIB.

The reason to depend on GPIOLIB is CONFIG_OF_GPIO only available
when GPIOLIB is selected.

Since PINCTRL_EXYNOS4 select PINCTRL_SAMSUNG, thus also make
PINCTRL_EXYNOS4 depend on OF && GPIOLIB.

Signed-off-by: Axel Lin <axel.lin@ingics.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-11-06 10:02:14 +01:00
Vipul Kumar Samar 0504271c8d pinctrl: SPEAr1340: Add clcd sleep mode pin configuration
CLCD pads must be configured differently for sleep mode. This patch adds support
for clcd_sleep_pingroup.

Signed-off-by: Vipul Kumar Samar <vipulkumar.samar@st.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-11-05 12:34:32 +01:00
Deepak Sikri 35d1480694 pinctrl: SPEAr1340: Make DDR reset & clock pads as gpio
Some gpio pins are used to control DDR reset and clock enable while the system
is moved into Low power. This patch adds in the corresponding GPIO entries in
the pads_as_gpio_pins to ensure the pads are available as gpio's.

Signed-off-by: Deepak Sikri <deepak.sikri@st.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-11-05 12:34:26 +01:00
Shiraz Hashim 0e6f1e5c39 pinctrl: SPEAr1310: add register entries for enabling pad direction
Pad direction must also be updated for SPEAr1310, while setting pads values.
This patch adds support for that.

Signed-off-by: Shiraz Hashim <shiraz.hashim@st.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-11-05 12:34:23 +01:00
Vipul Kumar Samar f7c5b3d574 pinctrl: SPEAr1310: Separate out pci pins from pcie_sata pin group
SPEAr1310 has separate PCI and PCIe implementations which are not muxed with
each other. Presently they have been implemented as muxed together with SATA and
are represented wrongly in the software.

In reality only PCIe and SATA implementations are muxed with each other. This
patch separates out pci pins creating a new pingroup and function for pci.

Signed-off-by: Vipul Kumar Samar <vipulkumar.samar@st.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Reviewed-by: Shiraz Hashim <shiraz.hashim@st.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-11-05 12:34:20 +01:00
Vipul Kumar Samar 82a2deb93c pinctrl: SPEAr1310: Fix value of PERIP_CFG reigster and MCIF_SEL_SHIFT
This patch fixes two macros: PERIP_CFG registers offset and MCIF selection
shift.

Signed-off-by: Vipul Kumar Samar <vipulkumar.samar@st.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-11-05 12:33:57 +01:00
Shiraz Hashim b06fbfdb06 pinctrl: SPEAr1310: fix clcd high resolution pin group name
All group names in SPEAr pinctrl have "_grp" at the end of their name. Do the
same for clcd_high_res_grp.

Signed-off-by: Shiraz Hashim <shiraz.hashim@st.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-11-05 12:33:46 +01:00
Deepak Sikri b06bf9a905 pinctrl: SPEAr320: Correct pad mux entries for rmii/smii
pin entries of rmii and smii are interchanged by mistake. Fix it.

Signed-off-by: Deepak Sikri <deepak.sikri@st.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-11-05 12:33:41 +01:00
Shiraz Hashim a778005589 pinctrl: SPEAr3xx: correct register space to configure pwm
To have pwm on pad no. 34 we also need to select between pwm and SD_LED
functions. Add this to pwm pin mux register configuration.

Signed-off-by: Shiraz Hashim <shiraz.hashim@st.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Reviewed-by: Vipin Kumar <vipin.kumar@st.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-11-05 12:33:37 +01:00
Viresh Kumar 0b53fa3535 pinctrl: SPEAr: Don't update all non muxreg bits on pinctrl_disable
Not all bits of a register are used for pinctrl in SPEAr. So only update bits
relevant to pinctrl using muxreg->mask.

Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-11-05 12:33:34 +01:00
Linus Walleij 38843e2921 pinctrl/nomadik: pass DT node to the irqdomain
When creating the simple irqdomain, pass the DT node pointer along,
as is apropriate.

Acked-by: Lee Jones <lee.jones@linaro.org>
Reported-by: Gabriel Fernandez <gabriel.fernandez@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-10-23 11:52:25 +02:00
Linus Walleij 832b6cdf72 pinctrl/nomadik: use zero as default irq_start
The irqdomain semantics were supposed to be such that a linear
domain would be used if the passed first_irq was zero or
negative, but I got it wrong so only passing zero as first_irq
will work properly. Well, zero is NO_IRQ these days so let's
pass zero. The semantics of irqdomain_add_simple() will be
fixed in a separate patch.

Acked-by: Lee Jones <lee.jones@linaro.org>
Reported-by: Rikard Olsson <rikard.p.olsson@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-10-23 11:52:19 +02:00
Wei Yongjun b4dd784ba8 pinctrl: fix missing unlock on error in pinctrl_groups_show()
Add the missing unlock on the error handle path in function
pinctrl_groups_show().

Cc: stable@kernel.org
Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-10-23 10:35:10 +02:00
Linus Walleij 268300be0e pinctrl/nomadik: use irq_create_mapping()
Since in the DT case, the linear domain path will not allocate
descriptors for the IRQs, we need to use irq_create_mapping()
for mapping hwirqs to Linux IRQs, so these descriptors get
created on-the-fly in this case.

ChangeLog v1->v2:

- Just use irq_create_mapping() in the .to_irq function since
  this is called before unmasking or enabling any interrupt
  lines, so irq_find_mapping() should be sufficient for the
  IRQ handler function.

Cc: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-10-23 10:33:39 +02:00
Haojian Zhuang 7ae9d71e8d pinctrl: remove mutex lock in groups show
Mutex is locked duplicatly by pinconf_groups_show() and
pin_config_group_get(). It results dead lock. So avoid to lock mutex
in pinconf_groups_show().

Cc: stable@kernel.org
Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-10-18 20:27:31 +02:00
Pritesh Raithatha a03690e444 pinctrl: tegra: correct bank for pingroup and drv pingroup
Cc: stable@kernel.org
Signed-off-by: Pritesh Raithatha <praithatha@nvidia.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-10-17 19:49:28 +02:00
Pritesh Raithatha 154f3ebf53 pinctrl: tegra: set low power mode bank width to 2
Cc: stable@kernel.org
Signed-off-by: Pritesh Raithatha <praithatha@nvidia.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-10-17 19:47:06 +02:00
Tomasz Figa a19fe2d45c pinctrl: samsung: Add GPIO to IRQ translation
Some drivers require a way to translate GPIO pins to their IRQ numbers.

This patch adds the .to_irq() gpiolib callback to pinctrl-samsung
driver, which creates (if not present yet) and returns an IRQ mapping
for given GPIO pin.

Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Reviewed-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Thomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-10-15 09:10:12 +02:00
Tomasz Figa 22b9ba033b pinctrl: exynos: Set pin function to EINT in irq_set_type of wake-up EINT
Pins used as wake-up interrupts need to be configured as EINTs. This
patch adds the required configuration code to exynos_wkup_irq_set_type,
to set the pin as EINT when its interrupt trigger type is configured.

Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Reviewed-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Thomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-10-15 09:10:12 +02:00
Tomasz Figa a04b07c0fc pinctrl: samsung: Use per-bank IRQ domain for wake-up interrupts
This patch reworks wake-up interrupt handling in pinctrl-exynos driver,
so each pin bank, which provides wake-up interrupts, has its own IRQ
domain.

Information about whether given pin bank provides wake-up interrupts,
how many and whether they are separate or muxed are parsed from device
tree.

It gives following advantages:
  - interrupts can be specified in device tree in a more readable way,
    e.g. :
    	device {
		/* ... */
		interrupt-parent = <&gpx2>;
		interrupts = <4 0>;
		/* ... */
	};
  - the amount and layout of interrupts is not hardcoded in the code
    anymore, but defined in SoC-specific structure
  - bank and pin of each wake-up interrupt can be easily identified, to
    allow operations, such as setting the pin to EINT function, from
    irq_set_type() callback

Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Reviewed-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Thomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-10-15 09:10:12 +02:00
Tomasz Figa d3a7b9e3a1 pinctrl: samsung: Use one GPIO chip per pin bank
This patch modifies the pinctrl-samsung driver to register one GPIO chip
per pin bank, instead of a single chip for all pin banks of the
controller.

It simplifies GPIO accesses a lot (constant time instead of looping
through the list of banks to find the right one) and should have a good
effect on performance of any bit-banging driver.

In addition it allows to reference GPIO pins by a phandle to the bank
node and a local pin offset inside of the bank (similar to previous
gpiolib driver), which is more clear and readable than using indices
relative to the whole pin controller.

Example:
	device {
		/* ... */
		gpios = <&gpk0 4 0>;
		/* ... */
	};

Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Reviewed-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Thomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-10-15 09:10:12 +02:00
Tomasz Figa 595be7268a pinctrl: exynos: Use one IRQ domain per pin bank
Instead of registering one IRQ domain for all pin banks of a pin
controller, this patch implements registration of per-bank domains.

At a cost of a little memory overhead (~2.5KiB for all GPIO interrupts
of Exynos4x12) it simplifies driver code and device tree sources,
because GPIO interrupts can be now specified per banks.

Example:
	device {
		/* ... */
		interrupt-parent = <&gpa1>;
		interrupts = <3 0>;
		/* ... */
	};

Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Reviewed-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Thomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-10-15 09:10:12 +02:00